Printed circuit board

Abstract

To provide a printed circuit board that contains a glass layer and that does not generate errors and improves reliability even if it proceeds through processes and inspections that use light.SOLUTION: The present disclosure relates to a printed circuit board which includes a glass layer including a first region having a first transmittance and a second region having a second transmittance different from the first transmittance and a first wiring layer placed on the glass layer.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present disclosure relates to printed circuit boards. [Background technology]

[0002] Recently, with the development of artificial intelligence (AI) technology, multi-chip packages including memory chips such as HBM (High Bandwidth Memory) and processor chips such as CPU (Central Processing Unit), GPU (Graphics Processing Unit), ASIC (Application Specific Integrated Circuit), and FPGA (Field Programmable Gate Array) are being used to process data that has increased exponentially. Therefore, attempts to use glass materials have been ongoing. However, because glass materials are transparent, problems have arisen during processes that use light. Summary of the Invention [Problem to be solved by the invention]

[0003] One of several objects of the present disclosure is to provide a printed circuit board that includes a glass layer.

[0004] Another of several objects of the present disclosure is to provide a printed circuit board that is error-free when subjected to optical processes and inspections.

[0005] Another of several objects of the present disclosure is to provide a printed circuit board that can improve reliability. [Means for solving the problem]

[0006] One of several solutions proposed throughout this disclosure is to provide a printed circuit board including a glass layer including a first region having a first transmittance and a second region having a second transmittance different from the first transmittance, and a first wiring layer disposed on the glass layer.

[0007] Another of several solutions proposed through the present disclosure is to provide a printed circuit board including a glass layer having a first region located on the inside and a second region located on the outside with respect to the stacking direction, and a first wiring layer disposed on the glass layer, wherein the transmittance of the second region is lower than the transmittance of the first region. Effect of the Invention

[0008] Among other advantages of the present disclosure is the provision of a printed circuit board that includes a glass layer.

[0009] Another advantage of the present disclosure is that it provides a printed circuit board that is error-free even when subjected to optical processes and inspections.

[0010] Another advantage of the present disclosure is that it is possible to provide a printed circuit board that can improve reliability. [Brief description of the drawings]

[0011] [Figure 1] FIG. 1 is a block diagram illustrating a schematic example of an electronic device system. [Diagram 2] FIG. 1 is a perspective view illustrating an example of an electronic device. [Diagram 3] FIG. 1 is a cross-sectional view illustrating an example of a printed circuit board. [Figure 4] FIG. 11 is a cross-sectional view illustrating another example of a printed circuit board. [Figure 5a] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 5b] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 5c] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 5d] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 5e] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 5f] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 5g] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 5h] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 5i] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 6a] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 6b] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 6c] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 6d] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 6e] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 6f] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 6g] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 6h] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. [Figure 6i] 1A to 1C are cross-sectional views each showing an example of a method for manufacturing a printed circuit board. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Hereinafter, the present disclosure will be described with reference to the accompanying drawings. The shapes and sizes of elements in the drawings may be scaled (or highlighted or simplified) for a clearer description.

[0013] electronic equipment FIG. 1 is a block diagram illustrating an example of an electronic device system.

[0014] Referring to the drawing, an electronic device 1000 houses a main board 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the main board 1010. These are also coupled to other electronic components described below to form various signal lines 1090.

[0015] The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPU), graphic processors (e.g., GPU), digital signal processors, encryption processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). In addition, these chip-related components 1020 may be combined with each other. The chip-related components 1020 may be in the form of a package including the above-mentioned chips and electronic components.

[0016] The network-related components 1030 may include, but are not limited to, any other wireless and wired protocols designated as Wi-Fi (such as the IEEE 802.11 family), WiMAX (such as the IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and beyond, and may include any of numerous other wireless or wired standards and protocols. The network-related components 1030 may also be combined with the chip-related components 1020 together.

[0017] The other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (low temperature co-firing ceramics), EMI (electromagnetic interference) filters, MLCC (multi-layer ceramic capacitors), etc. However, the other components 1040 are not limited to these, and may include passive elements in the form of chip components used for various other applications. The other components 1040 may also be combined with the chip-related components 1020 and / or the network-related components 1030.

[0018] Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that may or may not be physically and / or electrically connected to the main board 1010. Examples of other electronic components include, but are not limited to, a camera module 1050, an antenna module 1060, a display 1070, and a battery 1080. Other electronic components may include, but are not limited to, an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a compact disk (CD), a digital versatile disk (DVD), and the like. In addition, other electronic components used for various purposes may be included depending on the type of electronic device 1000.

[0019] The electronic device 1000 may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive, etc. However, the electronic device 1000 is not limited to these, and may be any other electronic device that processes data.

[0020] FIG. 2 is a perspective view that illustrates an example of an electronic device.

[0021] Referring to the drawings, the electronic device may be, for example, a smartphone 1100. A motherboard 1110 is housed inside the smartphone 1100, and various components 1120 are physically and / or electrically connected to the motherboard 1110. In addition, other components, such as a camera module 1130 and / or a speaker 1140, which may or may not be physically and / or electrically connected to the motherboard 1110, are housed inside the smartphone 1100. Some of the components 1120 may be the above-mentioned chip-related components, for example, a component package 1121, but are not limited thereto. The component package 1121 may be in the form of a printed circuit board on which electronic components including active components and / or passive components are mounted on a surface. Alternatively, the component package 1121 may be in the form of a printed circuit board in which active components and / or passive components are built in. Meanwhile, the electronic device is not necessarily limited to the smartphone 1100, but may be other electronic devices as described above.

[0022] Printed Circuit Board FIG. 3 is a cross-sectional view that illustrates an example of a printed circuit board.

[0023] Referring to FIG. 3, an example printed circuit board may include a glass layer 100 including a first region 101 having a first transmittance and a second region 102 having a second transmittance different from the first transmittance, a 1-1 wiring layer 121-1 arranged on the upper surface of the glass layer 100, a 1-1 insulating layer 111-1 arranged on the upper surface of the glass layer 100 and covering the 1-1 wiring layer 121-1, a 1-2 wiring layer 121-2 arranged on the lower surface of the glass layer 100, and a 1-2 insulating layer 111-2 arranged on the lower surface of the glass layer 100 and covering the 1-2 wiring layer 121-2.

[0024] The printed circuit board according to the embodiment includes the glass layer 100 and can have excellent flatness and can be advantageous in warpage control through a low coefficient of thermal expansion (CTE). In particular, the printed circuit board according to the embodiment can have the glass layer 100 as a core layer, which can be advantageous in warpage control even in a step of laminating other insulating layers. Furthermore, even if the 1-1 insulating layer 111-1, the 1-2 insulating layer 111-2, and the 2nd insulating layer 112 are sequentially laminated on the glass layer 100, the flatness can be further improved, which can be advantageous in forming a high-density fine circuit having a fine pitch. Furthermore, the number of layers of the printed circuit board can be reduced through the characteristics of glass having a variable dielectric property of, for example, Dk2.5 to 11, and the degree of freedom in design can be further increased.

[0025] The printed circuit board according to an example has a structure in which the glass layer 100 has a first region 101 and a second region 102 having different transmittances, and light incident from the upper side or the lower side of the glass layer 100 cannot transmit through the glass layer 100. Specifically, based on the lamination direction of the printed circuit board, the inside of the glass layer 100 corresponds to the first region 101, and the outside of the glass layer 100 corresponds to the second region 102, and the second transmittance of the second region 102 may be lower than the first transmittance of the first region 101. This is a result of forming the second region 102 on the upper and lower sides of the glass layer 100, respectively, by processing the upper and lower sides of the glass layer 100 composed only of the first region 101. The second region 102 may have a different microstructure from the first region 101, and the transmittance may be different depending on the difference in the microstructure.

[0026] In FIG. 3, the second region 102 is depicted as being formed with a certain boundary, but is not limited thereto, and the boundary may be uneven or unclear depending on the degree of processing. The microstructure can be observed by photographing a cut cross section of the printed circuit board with a scanning microscope, and regions having different structures from adjacent regions can be distinguished and understood. Meanwhile, the first region 101 and the second region 102 can also be distinguished as having different transmittances. The second region 102 has a lower transmittance than the first region 101 and can correspond to a region through which light cannot pass. That is, a region with a transmittance of a certain value or less can be the second region 102. In this case, the second transmittance of the second region 102 can be preferably 30% or less, but is not necessarily limited thereto, and the first region 101 and the second region 102 can be distinguished as the second transmittance being a certain percentage or less of the first transmittance.

[0027] The glass layer 100 is divided into a first region 101 and a second region 102, and the second region 102 cannot transmit light, so that the influence on the wiring on the opposite side during AOI (Automated Optical Inspection) inspection can be small. If the glass layer 100 is composed of only the first region 101, light can transmit through the glass layer 100, so when light for AOI inspection is irradiated from the upper side of the glass layer 100, there is a high possibility that an error will occur because the wiring arranged on the lower side is recognized. That is, when AOI inspection is performed on the upper side of the glass layer 100, it is appropriate to inspect only the 1-1 wiring layer 121-1 arranged on the upper surface of the glass layer 100, but since the glass layer 100 can transmit light, the 1-2 wiring layer 121-2 arranged on the lower surface of the glass layer 100 can be recognized and recognized as defective. That is, even though the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 are formed on different surfaces, an error may occur in which the wiring layer on the lower side is detected in the AOI inspection performed on the upper side. The same error may occur when the inspection is performed on the lower side. The AOI inspection is presented only as an example, and errors may occur when the glass layer 100 is composed of only the first region 101 when performing inspection and processing using light. For example, even when an alignment mark is formed to align the wiring, there may be cases where the marks on the upper and lower sides are misidentified from each other, and there may be various errors that may occur because the glass layer 100 is transparent. Meanwhile, in the printed circuit board according to an example, the glass layer 100 includes the second region 102, which is not transparent to light or has a low transmittance, and therefore such errors may not occur. The same effect can be obtained when the 1-1 insulating layer 111-1 or the 1-2 insulating layer 111-2 disposed on the glass layer 100 is transparent.

[0028] The glass layer 100 may include glass, which is an amorphous solid. Glass may include, for example, pure silicon dioxide (about 100% SiO2), soda-lime glass, borosilicate glass, alumino-silicate glass, and the like. Alternative glass materials, such as, but not limited to, fluoroglass, phosphate glass, chalcogenide glass, and the like, may also be used as the material of the glass layer 100. In addition, other additives may be included to form a glass having specific physical properties. These additives may include calcium carbonate (e.g., lime) and sodium carbonate (e.g., soda), as well as magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, and antimony, as well as carbonates and / or oxides of such elements and other elements. The glass layer 100 is a layer that is distinct from materials containing glass fibers (glass fiber, glass cloth, glass fabric), such as copper clad laminate (CCL) and prepreg (PPG), and can be understood as, for example, sheet glass. The glass layer 100 can also be in a state where the sheet glass is supported by a support such as another core.

[0029] The second region 102 of the glass layer 100 may be disposed on the upper and lower surfaces of the glass layer 100 and may extend to the inside of the glass layer 100. This may correspond to a result of processing the upper and lower sides of the glass layer 100. Specifically, the second region 102 may be formed along the upper and lower surfaces of the glass layer 100 on which the through vias 130 are not formed by irradiating the upper and lower sides of the glass layer 100 with a laser. The laser may be an ultrafast laser, but is not necessarily limited thereto. The shorter the laser irradiation period, the more deformation of the microstructure may occur. For example, a picosecond-scale laser may be more preferable than a nanosecond-scale laser, and a femtosecond-scale laser may be more advantageous for deformation of the microstructure of the glass layer 100. In this case, it may be more preferable to use a bar-shaped laser rather than a spot-shaped laser to deform the microstructure over a wide area. By using a bar-shaped laser, the second region 102 can be formed relatively uniformly, and the boundary between the first region 101 and the second region 102 can be observed to be formed relatively uniformly. However, the method of processing the second region 102 of the glass layer 100 is not necessarily limited to the above-mentioned method, and a method of deforming the microstructure by injecting different substances such as impurities into the upper and lower sides of the glass layer 100 is also possible, and the second region 102 can be formed through physical or chemical deformation by other methods. In other words, it means that any method that allows a technician in the relevant technical field to deform the microstructure of the glass layer 100 can be used without any restrictions.

[0030] 3 shows that the second region 102 is formed on each of the upper and lower surfaces of the glass layer 100, but this is not necessarily limited thereto, and the second region 102 may be formed on either the upper or lower surface of the glass layer 100. It is sufficient that the second region 102 is formed on either the upper or lower surface of the glass layer 100 as long as light from the upper side cannot reach the lower side or light from the lower side cannot reach the upper side.

[0031] Meanwhile, the thickness of the first region 101 of the glass layer 100 may be smaller than the thickness of the second region 102. The thickness of the first region 101 and the thickness of the second region 102 may be measured by photographing a cut cross section of the printed circuit board using a scanning microscope, and the thickness may be an average value of thicknesses measured at any five points. Meanwhile, since the boundary between the second region 102 and the first region 101 may not be flat and may have an uneven boundary, the method is not limited to the above, and the boundary surface between the first region 101 and the second region 102 may be set by borrowing a roughness measurement method. That is, the thickness of the first region 101 and the thickness of the second region 102 can be measured by measuring the average position of the boundary between the first region 101 and the second region 102 using a method for measuring the center line average roughness Ra, or the thickness of each of the boundaries between the first region 101 and the second region 102 can be measured by setting the boundaries based on the deviation of the five highest points and the five lowest points from the average position using a method for measuring the 10-point average roughness Rz. Since the second region 102 is formed by processing the glass layer 100 composed of the first region 101 to deform the microstructure, the second region 102 can correspond to a region penetrated by a processing means such as a laser. Therefore, the thickness of the second region 102 can be smaller than the thickness of the first region 101.

[0032] Meanwhile, the glass layer 100 of the printed circuit board according to an embodiment may include colored glass. The glass layer 100 may be processed to have a color by injecting impurities into the glass layer 100, but is not limited thereto, and a printed circuit board may be manufactured using the colored glass layer 100. When the glass layer 100 has a color, a polarization method may be used to control errors that may occur on the lower side when a process using light from the upper side is performed. The glass layer 100 having a color may mean that the first region 101 and the second region 102 of the glass layer 100 are all colored, but is not limited thereto, and may mean that only the second region 102 of the glass layer is processed to have a color.

[0033] The 1-1 insulating layer 111-1, the 1-2 insulating layer 111-2, and the 2nd insulating layer 112 may be disposed on the upper surface and the lower surface of the glass layer 100, respectively. The 1-1 insulating layer 111-1, the 1-2 insulating layer 111-2, and the 2nd insulating layer 112 may each include an organic insulating material. The organic insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material including an inorganic filler, an organic filler, and / or a glass fiber (glass fiber, glass cloth, glass fabric) together with a resin. For example, the insulating material may be a non-photosensitive insulating material such as ABF (Ajinomoto Build-up Film) or PPG (Prepreg), but is not limited thereto, and other polymer materials may be used. The insulating material may also be a photosensitive insulating material such as PID (Photo Imageable Dielectric). The insulating material may also include an adhesive sheet such as BS (Bonding Sheet).

[0034] The 1-1 insulating layer 111-1 and the 1-2 insulating layer 111-2 may each include the same insulating material, and the second insulating layer 112 may also include the same insulating material. Specifically, the 1-1 insulating layer 111-1, the 1-2 insulating layer 111-2, and the second insulating layer 112 may each preferably include ABF (Ajinomoto Build-up Film), but are not limited thereto, and may also include other organic insulating materials. Also, without being limited thereto, the 1-1 insulating layer 111-1, the 1-2 insulating layer 111-2, and the second insulating layer 112 may each include different materials. The 1-1 insulating layer 111-1 and the 1-2 insulating layer 111-2 are disposed on the upper and lower surfaces of the glass layer 100, so that at least a portion of the second region 102 of the glass layer 100 may be in contact with the 1-1 insulating layer 111-1 and / or the 1-2 insulating layer 111-2.

[0035] The 1-1 wiring layer 121-1, the 1-2 wiring layer 121-2, and the second wiring layer 122 may each include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or an alloy thereof. Preferably, the metal may include copper (Cu), but is not limited thereto. Each wiring layer may perform various functions according to the design. For example, the wiring layer may include a signal pattern, a power pattern, a ground pattern, and the like. Each of these patterns may have various forms, such as a line, a plane, and a pad. The 1-1 wiring layer 121-1, the 1-2 wiring layer 121-2, and the second wiring layer 122 may each include a first metal layer 141 and a second metal layer 142 disposed on the first metal layer 141. The first metal layer 141 may include an electroless plating layer (or chemical copper), or a sputtering layer, or may include both as necessary. The second metal layer 142 may be formed of an electrolytic plating layer (or electrolytic copper) using the first metal layer 141 as a seed layer, or may be made of a metal foil (or copper foil).

[0036] At least a portion of the 1-1 wiring layer 121-1 and at least a portion of the 1-2 wiring layer 121-2 may be arranged to be offset from each other with respect to the glass layer 100. The 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 being arranged to be offset from each other may mean that a region where the 1-1 wiring layer 121-1 is formed on the upper surface of the glass layer 100 and a region where the 1-2 wiring layer 121-2 is formed on the lower surface of the glass layer 100 do not correspond to each other or are symmetrical to each other. That is, as shown by the arrow in FIG. 3, it may mean that a region where the 1-1 wiring layer 121-1 is not formed on the upper surface of the glass layer 100 and a region where the 1-2 wiring layer 121-2 is formed may exist on the lower surface of the glass layer 100 based on the cross-sectional view of the printed circuit board. The reverse case is of course possible.

[0037] If the glass layer 100 does not have the second region 102, an error may occur due to the 1-2 wiring layer 121-2 formed on the lower surface of the glass layer 100, not the 1-1 wiring layer 121-1 formed on the upper surface of the glass layer 100, during a process using light from above. In this case, if the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 are arranged symmetrically with respect to the glass layer 100, such an error may not occur, but if the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 are arranged to be shifted with respect to the glass layer 100, such an inspection error may occur. On the other hand, in the printed circuit board according to one example, even though the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 are arranged to be shifted from each other, such an error may not occur because the glass layer 100 has the second region 102. In other words, since the glass layer 100 includes the second region 102 having the second transmittance, the design freedom of the 1-1 wiring layer 121-1 arranged on the upper surface of the glass layer 100 and the 1-2 wiring layer 121-2 arranged on the lower surface of the glass layer 100 can be increased.

[0038] The through via 130 penetrating the glass layer 100 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or an alloy thereof. Preferably, the metal may include copper (Cu), but is not limited thereto. The through via 130 may penetrate between the upper and lower surfaces of the glass layer 100. The upper and lower surfaces of the through via 130 may be substantially coplanar with the upper and lower surfaces of the glass layer 100. In FIG. 3, the through via 130 is shown as a so-called filled via, which is filled with a metal layer penetrating the upper and lower surfaces of the glass layer 100, but is not limited thereto, and may be a conformal via arranged along the wall surface of a via hole, and a specific method of forming the through via 130 is not limited thereto. The through via 130 may perform various functions according to the design. For example, the through via 130 may include a ground via, a power via, a signal via, etc. The through via 130 may have a substantially circular, elliptical, or polygonal shape on a plane, but is not limited thereto, and may have a composite shape in which various shapes are combined into one on a plane, for example, from the viewpoint of ensuring close contact due to an increase in specific surface area. The side surface of the through via 130 may be substantially perpendicular to the upper and lower surfaces of the through via 130, but is not limited thereto, and may be tapered to have an hourglass shape or the like on a cross section as necessary.

[0039] The upper and lower surfaces of the through via 130 may be covered by the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2, respectively. As a result, the through via 130 may be formed, and then the glass layer 100 is planarized so that the upper and lower surfaces of the through via 130 are substantially coplanar with the upper and lower surfaces of the glass layer 100, respectively, and then the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 are formed. That is, the first metal layer 141, which functions as a seed layer for the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2, has a structure in which the upper and lower surfaces of the through via 130 are covered, respectively.

[0040] The printed circuit board according to an example may further include a first via layer 131 that connects the 1-1 wiring layer 121-1 and the second wiring layer 122 to each other, connects the 1-2 wiring layer 121-2 and the second wiring layer 122 to each other, or connects the second wiring layers 122 to each other. In this case, the first via layer 131 may penetrate at least a portion of the 1-1 insulating layer 111-1, at least a portion of the 1-2 insulating layer 111-2, or at least a portion of the second insulating layer 112.

[0041] Each of the first via layers 131 may include a metal. The metal may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or an alloy thereof. Preferably, the metal may include copper (Cu), but is not limited thereto. Each of the first via layers 131 may include a filled via that fills a via hole, but may also include a conformal via that is disposed along the wall surface of the via hole. The first via layer 131 may perform various functions according to the design. For example, it may include a ground via, a power via, a signal via, and the like. Each of the first via layers 131 may include an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper). It may also include a sputtering layer instead of the electroless plating layer (or chemical copper), or it may include both as necessary.

[0042] Although the printed circuit board according to the embodiment has been described as having the second insulating layer 112 laminated on each of the 1-1 insulating layer 111-1 and the 1-2 insulating layer 111-2, the embodiment is not limited thereto, and the second insulating layer 112 may include a plurality of insulating layers as necessary. That is, the second insulating layer 112 may be composed of one or more insulating layers. Meanwhile, as a non-limiting example, the second insulating layer 112 may be disposed on only one of the insulating layers, the 1-1 insulating layer 111-1 or the 1-2 insulating layer 111-2, to have an asymmetric structure. The glass layer 100 has high rigidity and is less likely to warp, so that an asymmetric substrate can be realized. Since the second insulating layer 112 is composed of one or more insulating layers, the second wiring layer 122 may also include one or more wiring layers, and the first via layer 131 connecting them to each other may also include one or more via layers.

[0043] The printed circuit board according to an example may further include a solder resist layer 150 disposed on the second insulating layer 112. The solder resist layer 150 is disposed on the outermost side of the printed circuit board to protect the printed circuit board from the outside. The solder resist layer 150 may be a known solder resist, and may include, but is not limited to, a liquid or film type solder resist, and may be other types of insulating materials, and may include a thermosetting resin and an inorganic filler dispersed in the thermosetting resin, but may not include glass fiber. The insulating resin may be a photosensitive insulating resin, and the filler may be, but is not limited to, an inorganic filler and / or an organic filler, and may be other polymer materials as necessary. The solder resist layer 150 may have an opening, and at least a portion of the second wiring layer 122 may be exposed through the opening. The second wiring layer 122 exposed through the opening may be connected to a main board or another printed circuit board, or may be connected to another element such as a semiconductor chip. If necessary, a surface treatment layer may be further formed on the pattern exposed through the opening, or a metal bump may be further formed on the pattern exposed through the opening.

[0044] Meanwhile, the printed circuit board according to the embodiment is not limited to the configuration shown in Fig. 3 and may further include other general configurations of a printed circuit board, that is, may further include configurations that can be utilized by a person having ordinary skill in the art.

[0045] FIG. 4 is a cross-sectional view that illustrates another example of a printed circuit board.

[0046] Referring to FIG. 4, in the printed circuit board according to the other example, the second region 102 of the glass layer 100 may have a different structure from the printed circuit board according to the example.

[0047] The second region 102 may be formed in at least a part of the upper and lower surfaces of the glass layer 100 where the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 are not formed. This may occur because the step of processing the glass layer 100 to form the second region 102 is performed after the step of forming the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2. That is, when the second region 102 is formed by deforming the microstructure of the glass layer 100 from above by laser processing after forming the 1-1 wiring layer 121-1 based on the upper surface of the glass layer 100, the second region 102 may be formed along the upper surface of the glass layer 100 where the 1-1 wiring layer 121-1 is not formed. Based on the lower surface of the glass layer 100, the second region may be formed along the lower surface of the glass layer 100 where the 1-2 wiring layer 121-2 is not formed. That is, the second region 102 can be formed and carved in a region excluding the region where the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 are formed. At this time, the second region 102 can be disposed in a region where the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 are not formed, and thus, a part of the first region 101 can be disposed so as to contact the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2.

[0048] 4, the second region 102 is shown to be formed vertically along the boundary between the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2, but is not limited thereto, and the boundary between the first region 101 and the second region 102 may be expressed in various ways depending on the method of processing the glass layer 100. In particular, the change in the microstructure may not occur in a fixed direction, in which case a structure may be formed in which a portion of the second region 102 penetrates into the lower portions of the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2.

[0049] Meanwhile, the configuration similar to that of the printed circuit board according to the one example, other than the arrangement of the second region 102, can be applied to the printed circuit board according to the other example, and therefore a duplicated description thereof will be omitted.

[0050] Printed circuit board manufacturing method 5a to 5i are cross-sectional views that roughly show an example of a method for manufacturing a printed circuit board.

[0051] 5a, a glass layer 100 is prepared. The glass layer 100 may be composed of only a first region 101 and may be in a state in which light can be transmitted. The glass layer 100 may be in the form of a glass plate or may be in a state in which it is attached within a core or other supporting means such as a jig.

[0052] 5b to 5d, a through via 130 may be formed penetrating the upper and lower surfaces of the glass layer 100. The step of forming the through via 130 in the glass layer 100 may include a step of forming a through hole h penetrating the glass layer 100, a step of forming a metal layer on the inner wall of the through hole h, and a step of filling the through hole h. The step of forming the through via in the glass layer 100 may be performed using any method known in the art for forming a through glass via (TGV) without any limitations.

[0053] Meanwhile, in Fig. 5b to Fig. 5d, the through via 130 is formed only inside the glass layer 100, but the present invention is not limited thereto, and the through via 130 may extend on the upper and lower surfaces of the glass layer 100. In this case, the final step of forming the through via 130 may further include a step of planarizing the upper and lower surfaces of the glass layer 100, so that the upper and lower surfaces of the glass 100 and the upper and lower surfaces of the through via 130 are substantially coplanar, as shown in Fig. 5d. In this case, the planarization process may be performed by chemical-mechanical polishing, but the present invention is not limited thereto.

[0054] 5e, a second region 102 may be formed in the glass layer 100. The step of forming the second region 102 may be performed by irradiating an ultrashort laser, but is not limited thereto, and any method capable of changing the microstructure of the glass layer 100 may be used without limitation. This is the same as the description of the printed circuit board above.

[0055] 5f to 5g, the method may include forming a 1-1 wiring layer 121-1 and a 1-2 wiring layer 121-2 on the glass layer 100, and then forming a 1-1 insulating layer 111-1 and a 1-2 insulating layer 111-2. The 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 may be formed through separate processes, or may be formed together in a single process. The 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 may be formed by forming a first metal layer 141 and forming a second metal layer 142 on the first metal layer 141, respectively. At this time, referring to FIG. 5g, an AOI inspection may be performed. In FIG. 5g, the AOI inspection is shown to be performed on the upper side of the glass layer 100, but is not limited thereto, and may be performed on the lower side. Meanwhile, the AOI inspection may be performed in a step of FIG. 5f before the step of FIG. 5g. After the second region 102 of the glass layer 100 is formed, light from above cannot pass through the glass layer 100, so there is little possibility of errors occurring when performing an inspection.

[0056] 5h, the second wiring layer 122 may be formed on the 1-1 insulating layer 111-1 and the 1-2 insulating layer 111-2, and the first via layer 131 may be formed to connect the second wiring layer 122 to the 1-1 wiring layer 121-1 or the 1-2 wiring layer 121-2, respectively. The first via layer 131 and the second wiring layer 122 may be formed through a step of forming a first metal layer 141 and a second metal layer 142 after forming a via hole penetrating at least a part of the 1-1 insulating layer 111-1 or the 1-2 insulating layer 111-2, but is not necessarily limited thereto. In the step of forming the second wiring layer 122, an alignment mark may be detected to align the position where the second wiring layer 122 is to be formed, and in this case, the second region 102 of the glass layer 100 may not be affected by the opposite side.

[0057] Referring to FIG. 5i, a second insulating layer 112, a second wiring layer 122, and a first via layer 131 may be further formed, and a solder resist layer 150 may be formed on the second insulating layer 112.

[0058] The manufacturing method of the example printed circuit board is not necessarily limited to the above-mentioned content, and since the example printed circuit board may further include other configurations, the manufacturing method may also be partially added or modified.

[0059] 6a to 6i are cross-sectional views that roughly show an example of a method for manufacturing a printed circuit board.

[0060] 6e to 6f, after the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 are respectively formed on the glass layer 100, the second region 102 of the glass layer 100 may be formed. The method of forming the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 and the method of forming the second region 102 are similar to the steps of the method of manufacturing a printed circuit board according to an example, and therefore, repeated description will be omitted.

[0061] In another example of a method for manufacturing a printed circuit board, after forming the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2, the second region 102 is formed in the glass layer 100, so that the second region 102 can be formed in an area where the 1-1 wiring layer 121-1 and the 1-2 wiring layer 121-2 are not formed.

[0062] In the method for manufacturing a printed circuit board according to another example, the explanation of the steps other than the formation of the 1-1 wiring layer 121-1, the 1-2 wiring layer 121-2, and the second region 102 may be the same as in the method for manufacturing a printed circuit board according to the one example, and therefore, duplicate explanations therefor will be omitted.

[0063] In the present disclosure, the expressions "enclose" and "cover" may include not only the case of entirely covering but also the case of at least partially covering, and may include not only the case of directly covering but also the case of indirectly covering. Furthermore, the expression "fill" may include not only the case of completely filling but also the case of roughly filling, for example, the case where some gaps or voids are present.

[0064] In the present disclosure, this may include process errors, positional deviations, measurement errors, etc. that occur during the manufacturing process. For example, being substantially perpendicular may include not only being completely perpendicular, but also being roughly perpendicular. Furthermore, being substantially coplanar may include not only being exactly on the same plane, but also being roughly on the same plane.

[0065] In the present disclosure, the same insulating material can mean not only the completely same insulating material, but also the same type of insulating material. Thus, the compositions of the insulating materials are substantially the same, but the specific composition ratios thereof can differ slightly.

[0066] In the present disclosure, the shape on a cross section may refer to the cross-sectional shape when an object is cut vertically or when the object is viewed from a side, and the shape on a plane may refer to the planar shape when an object is cut horizontally or when the object is viewed from a top or bottom.

[0067] In this disclosure, for convenience, terms such as lower, bottom, and lower surface are used to mean the downward direction based on the cross section of the drawing, and terms such as upper, top, and upper surface are used to mean the opposite direction. However, this is a definition of directions for convenience of explanation, and the scope of the claims is not particularly limited by the description of the directions, and the concepts of up / down can be changed at any time.

[0068] In the present disclosure, the term "connected" refers to a concept that includes not only direct connection but also indirect connection via an adhesive layer or the like. Moreover, the term "electrically connected" refers to a concept that includes both physical connection and non-connection. Furthermore, expressions such as "first" and "second" are used to distinguish one component from another, and do not limit the order and / or importance of the corresponding components. In some cases, the first component may be named the second component, and similarly the second component may be named the first component, without departing from the scope of the right.

[0069] The expression "one example" used in the present disclosure does not mean the same embodiment as the other, but is provided to emphasize and describe the unique features that are different from each other. However, the above-mentioned one example does not exclude being realized in combination with the features of another example. For example, even if the matter described in a particular example is not described in another example, it can be understood as being related to the other example, unless there is a description in the other example that is opposite or contradictory to the matter.

[0070] The terms used in the present disclosure are merely used to describe an example and are not intended to limit the present disclosure. In this case, the singular expression includes the plural expression unless the context clearly indicates otherwise. [Explanation of symbols]

[0071] 100 glass layers 101 First area 102 Second area 111-1 1st insulating layer 111-2 1st and 2nd insulating layers 121-1 1st-1 wiring layer 121-2 1st-2nd wiring layer 112 Second insulating layer 122 2nd wiring layer 130 Through Via 131 First via layer 141 1st metal layer 142 Second metal layer 150 Solder resist layer h Through hole 1000 electronic equipment 1010 Mainboard 1020 Chip related parts 1030 Network related parts 1040 Other parts 1050 Camera 1060 Antenna 1070 display 1080 Battery 1090 Signal Line 1100 Smartphone 1110 Motherboard 1120 parts 1121 Parts Package 1130 Camera Module 1140 Speaker

Claims

1. a glass layer including a first region having a first transmittance and a second region having a second transmittance different from the first transmittance; a first wiring layer disposed on the glass layer.

2. the second regions are located on the upper and lower sides of the glass layer, The printed circuit board of claim 1 , wherein at least a portion of the first region is centrally located between an upper side and a lower side of the glass layer.

3. The printed circuit board of claim 2 , wherein the second permeability is lower than the first permeability.

4. The printed circuit board of claim 3 , wherein the thickness of the first region is greater than the thickness of the second region.

5. the first wiring layer includes a 1-1 wiring layer disposed on an upper surface of the glass layer and a 1-2 wiring layer disposed on a lower surface of the glass layer; 2. The printed circuit board according to claim 1, wherein at least a portion of the 1-1 wiring layer is disposed so as to be misaligned with at least a portion of the 1-2 wiring layer.

6. The printed circuit board according to claim 2 , wherein the second regions are disposed in at least a portion of the glass layer where the first wiring layer is not disposed.

7. The printed circuit board of claim 1 , wherein the glass layer comprises a colored glass.

8. a through via penetrating the glass layer to connect the first wiring layers to each other; the first wiring layer includes a first metal layer and a second metal layer disposed on the first metal layer; The printed circuit board according to claim 1 , wherein the first metal layer of the first wiring layer covers upper and lower surfaces of the through via.

9. a first insulating layer disposed on the glass layer and covering the first wiring layer; one or more second insulating layers disposed on the first insulating layer; 9. The printed circuit board of claim 8, further comprising: one or more second wiring layers disposed on or within the one or more second insulating layers.

10. The printed circuit board according to claim 9 , further comprising a solder resist layer disposed on the second insulating layer and including an opening that exposes at least a portion of the second wiring layer.

11. a glass layer having a first region located on an inner side and a second region located on an outer side based on a lamination direction; a first wiring layer disposed on the glass layer; The transmittance of the second region is lower than the transmittance of the first region.

12. a first insulating layer disposed on the glass layer and covering the first wiring layer; The printed circuit board of claim 11 , wherein at least a portion of the second region is in contact with the first insulating layer.

13. The printed circuit board according to claim 11 , wherein a portion of the first region contacts the first wiring layer.

14. The printed circuit board of claim 11 , wherein the thickness of the first region is greater than the thickness of the second region.

15. The printed circuit board of claim 11 , wherein the second region is located on at least a portion of the upper surface and at least a portion of the lower surface of the glass layer, respectively, and extends inwardly of the glass layer.

Images