Display device

Abstract

To provide a semiconductor device having a capacitative element capable of increasing a charge capacity with a high opening ratio.SOLUTION: A semiconductor device comprises: a transistor on a substrate; a conductive film having a first light transmissivity on the substrate; an oxide insulation film that covers the transistor and provides an opening part on the conductive film having the first light transmissivity; a nitrogen insulation film on the oxide insulation film, contacted to the conductive film having the first light transmissivity in the opening part; a conductive film having a second light transmissivity that is connected to the transistor to form a concave part in the opening part; and an organic resin film that fills the concave part of the conductive film having the second light transmissivity.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device or a display device including an oxide semiconductor. [Background technology]

[0002] It is used in many flat panel displays, such as liquid crystal displays and light-emitting displays. The transistors used are made of amorphous silicon and single crystal silicon formed on a glass substrate. The silicon semiconductor is made of silicon semiconductor such as polycrystalline silicon or polysilicon. Transistors using semiconductors are also used in integrated circuits (ICs).

[0003] In recent years, metal oxides that exhibit semiconducting properties have been used in transistors instead of silicon semiconductors. In this specification, the term "oxide" refers to a metal oxide that exhibits semiconductor properties. Let us call it a semiconductor.

[0004] For example, a transistor using zinc oxide or an In-Ga-Zn oxide as an oxide semiconductor may be used. A transistor is manufactured and used as a switching element for pixels of a display device. Techniques have been disclosed (see Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0006] The capacitance element has a pair of electrodes and a dielectric film between them. The other electrode is a gate electrode, a source electrode, a drain electrode, or the like that constitutes a transistor. In many cases, the light-shielding conductive film is used.

[0007] In addition, in a liquid crystal display device, the larger the charge capacity of the capacitance element, the more In such a situation, it is necessary to extend the period during which the alignment of the liquid crystal molecules in the liquid crystal element can be kept constant. When displaying a still image, the period can be extended without rewriting the image data. This reduces the number of times the power is turned on, which is expected to reduce power consumption.

[0008] In order to increase the charge capacity of the capacitance element, the area occupied by the capacitance element is increased. However, there is a way to increase the area where the pair of electrodes overlap. In a display device, a light-shielding conductive film is used to increase the area where a pair of electrodes overlap. If the area of ​​the conductive film is increased, the aperture ratio of the pixel is reduced, and the display quality of the image is degraded. Such a problem is particularly noticeable in a high-resolution liquid crystal display device.

[0009] On the other hand, in liquid crystal display devices, display defects occur due to disturbances in the alignment of liquid crystal molecules. Disorders in the alignment of liquid crystal molecules include disclination and light leakage.

[0010] Near the alignment film, one end of the liquid crystal molecule rises up from the alignment film and is aligned. In this case, the direction from the end closest to the alignment film to the raised end was projected orthogonally onto the substrate surface. The direction of the pretilt is called the "pretilt direction". The angle between the long axis of the liquid crystal molecule and the alignment film is called the "pretilt direction". This is called the "pretilt angle."

[0011] The pretilt angles of adjacent liquid crystal molecules are almost the same, but the pretilt directions are different. The alignment problem of the liquid crystal molecules caused by this is called "disclination". This causes linear defects in pixels when the liquid crystal display device displays white.

[0012] In addition, the liquid crystal molecules may be distorted due to the unevenness of the region where the alignment film is to be formed (hereinafter referred to as the formation region). The misalignment of liquid crystal molecules caused by different pretilt angles of the molecules is called "light leakage." This causes a decrease in contrast when the liquid crystal display device displays black.

[0013] In view of the above, one embodiment of the present invention provides a capacitance-reducing film having a high aperture ratio and capable of increasing a charge capacity. Another object of the present invention is to provide a semiconductor device having a quantum dot. Another object of the present invention is to provide a semiconductor device with high contrast. An object of one embodiment is to provide a semiconductor device using a light-transmitting electrode.

[0014] The description of these problems does not preclude the existence of other problems. It is understood that an embodiment need not address all of these issues. [Means for solving the problem]

[0015] One embodiment of the present invention is a semiconductor device including a transistor over a substrate and a first light-transmitting conductive film over the substrate. an oxide film that covers the transistor and has an opening on the first light-transmitting conductive film; A first light-transmitting conductive film is formed over the insulating film and the oxide insulating film in the opening. a second insulating film connected to the transistor and having a recess in the opening; a conductive film having a light-transmitting property and an organic resin film filling a recess of the conductive film having a light-transmitting property; , and is a semiconductor device having the same.

[0016] Another embodiment of the present invention is a semiconductor device including a transistor over a substrate and a first light-transmitting conductive film over the substrate. a first conductive film that covers the transistor and has an opening provided on the first light-transmitting conductive film; an oxide insulating film; and a first light-transmitting conductive film over the oxide insulating film and in an opening. A nitride insulating film is formed in contact with the conductive film, and the nitride insulating film is connected to the transistor and a recess is formed in the opening. a second light-transmitting conductive film having a first insulating film and an opening formed therein, The angle between a surface of the first light-transmitting conductive film and a side surface of the oxide insulating film is 5° or more. 5° or less, preferably 5° to 30°, and more preferably 10° to 20°. The semiconductor device is a semiconductor device having the above-mentioned structure. It may have.

[0017] A transistor is made up of a gate electrode formed on a substrate and a gate An insulating film, an oxide semiconductor film in contact with the gate insulating film, and a pair of conductive films in contact with the oxide semiconductor film. The first light-transmitting conductive film is in contact with the gate insulating film.

[0018] In addition, the oxide semiconductor film is formed at the same time as the first light-transmitting conductive film.

[0019] The first light-transmitting conductive film and the oxide semiconductor film are formed of In, Ga, or Zn. At least one of the following is included. Effect of the Invention

[0020] According to one embodiment of the present invention, a capacitance element having a high aperture ratio and capable of increasing a charge capacity is provided. According to one embodiment of the present invention, a semiconductor device having a control According to one embodiment of the present invention, a semiconductor device having a high resistance can be manufactured. Therefore, a semiconductor device can be manufactured using an electrode having such a property. [Brief description of the drawings]

[0021] [Figure 1] 1A and 1B are a block diagram and a circuit diagram illustrating one embodiment of a semiconductor device. [Diagram 2] FIG. 1 is a top view illustrating one embodiment of a semiconductor device. [Diagram 3] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 4] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Diagram 5] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 6] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 7] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 8] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 9] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 10] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 11] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 12] FIG. 1 is a top view illustrating one embodiment of a semiconductor device. [Figure 13] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 14] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 15]1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 16] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 17] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 18] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 19] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 20] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 21] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 22] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Diagram 23] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 24] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Diagram 25] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 26] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 27] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 28] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 29] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Diagram 30] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Diagram 31] FIG. 1 is a diagram showing an electron microbeam diffraction pattern of an oxide semiconductor. [Diagram 32] FIG. 1 is a diagram showing an electron microbeam diffraction pattern of an oxide semiconductor. [Diagram 33] 1A and 1B are diagrams illustrating a touch sensor according to an embodiment. [Diagram 34] 1A to 1C are diagrams illustrating examples of configurations of a touch panel and an electronic device according to an embodiment. [Diagram 35] 1A and 1B are diagrams illustrating a pixel including a touch sensor according to an embodiment; [Diagram 36] 1A to 1C are diagrams illustrating operations of a touch sensor and a pixel according to an embodiment; [Figure 37] 1 is a block diagram showing a configuration example of a semiconductor device; [Figure 38] 1 is a timing chart illustrating an example of a method for driving a semiconductor device. [Figure 39] 1A to 1C are diagrams illustrating electronic devices using a semiconductor device which is one embodiment of the present invention. [Diagram 40] 1A to 1C are diagrams illustrating electronic devices using a semiconductor device which is one embodiment of the present invention. [Diagram 41] FIG. 1 is a diagram illustrating a STEM image. [Diagram 42] FIG. 2 is a diagram illustrating an image observed through a polarizing microscope. [Diagram 43] FIG. 13 is a diagram for explaining calculation results. [Diagram 44] FIG. 1 is a diagram for explaining an SEM image. [Diagram 45] FIG. 1 is a diagram illustrating a STEM image. [Figure 46] FIG. 2 is a diagram illustrating an image observed through a polarizing microscope. [Figure 47] FIG. 2 is a diagram illustrating a sample structure. [Figure 48] FIG. 1 is a diagram illustrating sheet resistance. [Figure 49] FIG. 1 is a diagram illustrating sheet resistance. [Figure 50] FIG. 1 is a diagram illustrating sheet resistance. [Figure 51] FIG. 1 is a diagram for explaining the measurement results of SIMS. [Figure 52] FIG. 1 is a diagram illustrating the measurement results of ESR. [Diagram 53] FIG. 1 is a diagram illustrating the measurement results of ESR. [Figure 54] A diagram explaining a bulk model of an InGaZnO4 crystal. [Figure 55] A diagram illustrating the formation energies and thermodynamic transition levels of VoH. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0022] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and the embodiments and aspects of the present invention may be modified without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications may be made to the embodiments and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments and examples. In the following embodiments and examples, the same parts or parts having similar functions are In the case of parts, the same reference numerals or the same hatch patterns are used in common among different drawings, and the repetition The explanation of the repetition will be omitted.

[0023] In each figure described in this specification, the size, thickness, or area of ​​each component is indicated by the following formula: The figures may be exaggerated for clarity and are not necessarily limited to scale. stomach.

[0024] In addition, the terms "first," "second," "third," etc., used in this specification are used interchangeably to avoid confusion of components. The number is added for convenience and is not intended to be a numerical limit. The terms can be replaced with "second" or "third" as appropriate for explanation.

[0025] The function of the "source" and "drain" is to change the direction of the current during circuit operation. For this reason, in this specification, the terms "sauce" and "dressing" are used interchangeably. The terms "in" and "in" may be used interchangeably.

[0026] Voltage is the potential difference between two points, and potential is the electrostatic field at a certain point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in a particle. Generally, the potential difference between a potential at a certain point and a reference potential (for example, ground potential) This is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, potential may be read as voltage. In this specification, voltage may be read as potential.

[0027] In this specification, when an etching process is performed after a photolithography process, After the etching process, the mask formed in the photolithography process is removed. .

[0028] (Embodiment 1) In this embodiment, a semiconductor device according to one embodiment of the present invention and a manufacturing method thereof will be described with reference to drawings. Please refer to the following for explanation.

[0029] FIG. 1A shows a liquid crystal display device as an example of a semiconductor device. The display device includes a pixel portion 101, a scanning line driver circuit 104, and a signal line driver circuit 106, each of which is m lines arranged in parallel or approximately in parallel and whose potentials are controlled by the scanning line driving circuit 104 The scanning lines 107 are arranged parallel or approximately parallel to each other, and are driven by a signal line driving circuit 106. The pixel section 101 further includes a matrix. The pixel array has a plurality of pixels 301 arranged in a square shape. The pixel has capacitance lines 115 arranged in rows or substantially parallel to each other. 7, they may be arranged parallel or approximately parallel to each other. The semiconductor memory device 04 and the signal line driver circuit 106 may be collectively referred to as a driver circuit portion.

[0030] Each scanning line 107 corresponds to one of the pixels 301 arranged in m rows and n columns in the pixel section 101. The signal lines 109 are electrically connected to the n pixels 301 arranged in any one row. is m pixels 301 arranged in m rows and n columns, and m pixels 301 arranged in any one of the columns. 1. m and n are both integers of 1 or more. is m pixels 301 arranged in m rows and n columns, and m pixels 301 arranged in any one of the columns. 1. The capacitance lines 115 are arranged parallel to each other along the scanning lines 107. In the case where the pixels 301 are arranged in m rows and n columns, any one of the pixels 301 may be arranged in a matrix of m rows and n columns. The pixel array 301 is electrically connected to n pixels 301 arranged in a row.

[0031] FIG. 1B shows a circuit that can be used for the pixel 301 of the liquid crystal display device shown in FIG. The configuration is shown.

[0032] The pixel 301 shown in FIG. 1B includes a liquid crystal element 132, a transistor 103, and a capacitor element 105 and has.

[0033] The potential of one of the pair of electrodes of the liquid crystal element 132 is appropriately set according to the specifications of the pixel 301. The alignment state of the liquid crystal element 132 is set by the written data. A common potential (C) is applied to one of a pair of electrodes of the liquid crystal element 132 in each pixel circuit 111. A potential (mon potential) may be applied to the pair of electrodes of the liquid crystal element 132 for each pixel 301 in each row. A different potential may be applied to one side. Or, in the case of IPS or FFS mode, It is also possible to connect one of a pair of electrodes of the crystal element 132 to a capacitance line CL.

[0034] For example, the liquid crystal display device including the liquid crystal element 132 can be driven in a TN mode, ST mode, or the like. N mode, VA mode, ASM (Axially Symmetric Aligned Micro-cell mode, OCB (Optically Compensated) d Birefringence mode, FLC (Ferroelectric Li quid Crystal) mode, AFLC (AntiFerroelectric) mode Liquid Crystal mode, MVA mode, PVA (Patterned Vertical Alignment) mode, IPS mode, FFS mode, or Even if you use TBA (Transverse Bend Alignment) mode, In addition to the above-mentioned driving method, the liquid crystal display device can be driven by ECB (Electron Beam Controlled) driving method. ctrically Controlled Birefringence) mode, P DLC (Polymer Dispersed Liquid Crystal) mode , PNLC (Polymer Network Liquid Crystal) mode However, the present invention is not limited to these, and the liquid crystal element and its driving method may be used. A variety of formulas can be used.

[0035] Also, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent. The liquid crystal element may be configured by the liquid crystal that exhibits the blue phase. Since it is short and optically isotropic, alignment treatment is not required and viewing angle dependency is small.

[0036] In the pixel 301 in the mth row and the nth column, the source electrode and the drain electrode of the transistor 103 One of them is electrically connected to the signal line DL_n, and the other is the other of the pair of electrodes of the liquid crystal element 132. The gate electrode of the transistor 103 is electrically connected to the scanning line GL_m. The transistor 103 is electrically connected to the , and has a function of controlling the writing of data of the data signal.

[0037] One of a pair of electrodes of the capacitor 105 is connected to a wiring (hereinafter, a capacitor line CL) to which a potential is supplied. The other one is electrically connected to the other of the pair of electrodes of the liquid crystal element 132 . The potential value of the capacitance line CL is appropriately set according to the specifications of the pixel 301. The capacitor 05 functions as a storage capacitor for storing written data. In the case of the IPS mode or the FFS mode, one of the pair of electrodes of 105 is connected to the liquid crystal element 132. It is also possible for the electrode to be electrically connected to one of the pair of electrodes.

[0038] For example, in a liquid crystal display device having the pixel 301 shown in FIG. The pixels 301 in each row are selected in sequence, the transistors 103 are turned on, and the data signal Write data.

[0039] The pixel 301 to which the data has been written is held by turning off the transistor 103. By performing this process row by row, an image can be displayed.

[0040] In this specification and the like, an example of a liquid crystal display device using a liquid crystal element is a transmission type liquid crystal display device. Crystal display device, transflective type liquid crystal display device, reflective type liquid crystal display device, direct view type liquid crystal display device, projection type An example of a liquid crystal element is a device that uses the optical modulation effect of liquid crystal to convert light into light. There is an element that controls the transmission or non-transmission. The element is composed of a pair of electrodes and a liquid crystal layer. The optical modulation of the liquid crystal is achieved by the electric field applied to the liquid crystal (the electric field in the lateral direction). , including a vertical electric field or a diagonal electric field). Examples of liquid crystal elements include nematic liquid crystal, cholesteric liquid crystal, smectic liquid crystal, and decanted liquid crystal. Discotic liquid crystal, thermotropic liquid crystal, lyotropic liquid crystal, low molecular weight liquid crystal, polymer liquid Polymer-dispersed liquid crystal (PDLC), Ferroelectric liquid crystal, Antiferroelectric liquid crystal, Main-chain liquid crystal, Side-chain high- Examples of such liquid crystals include molecular liquid crystals and banana-shaped liquid crystals.

[0041] Next, a specific example of a liquid crystal display device using liquid crystal elements in the pixels 301 will be described. Here, a top view of the pixel 301 shown in FIG. 1(B) is shown in FIG. 2. The counter electrode and the liquid crystal element are omitted.

[0042] In FIG. 2, the conductive film 304c functioning as the scanning line is oriented in a direction substantially perpendicular to the signal line ( The conductive film 310d, which functions as a signal line, is provided so as to extend in the center (left and right direction). The capacitor extends in a direction substantially perpendicular to the line (vertical direction in the figure). The conductive film 310f is provided so as to extend in a direction parallel to the signal lines. The conductive film 304c is electrically connected to the scanning line driver circuit 104 (see FIG. 1A). The conductive film 310d functions as a signal line, and the conductive film 31 Of is electrically connected to the signal line driver circuit 106 (see FIG. 1(A)).

[0043] The transistor 103 is provided in a region where the scanning line and the signal line intersect. The gate electrode 304c functions as a conductive film, and the gate insulating film 304b functions as a gate electrode. ) The oxide semiconductor film 308b in which the channel region is formed on the gate insulating film , and the conductive films 310d and 310e functioning as a source electrode and a drain electrode. Note that the conductive film 304c also functions as a scan line and overlaps with the oxide semiconductor film 308b. The conductive film 310d functions as a gate electrode of the transistor 103. The region overlapping with the oxide semiconductor film 308b is the source of the transistor 103. In FIG. 2, the scanning lines are arranged in a top view. In this case, the end of the scan line is located outside the end of the oxide semiconductor film 308b. It functions as a light-shielding film that blocks light from a light source such as a backlight. The oxide semiconductor film 308b included in the transistor is not irradiated with light, and thus the electrical characteristics of the transistor are prevented from changing. It can be suppressed.

[0044] In addition, the conductive film 310e has a light-transmitting property that functions as a pixel electrode in the opening 362c. The conductive film 316b is electrically connected to the conductive film 316b.

[0045] The capacitor 105 includes a light-transmitting conductive film 308c formed over a gate insulating film and a A dielectric film formed of a nitride insulating film provided on the transistor 103 and a pixel electrode That is, the capacitor 105 is configured with a transparent conductive film 316b. The capacitor 105 has a conductive film that functions as a capacitor line in the opening 362. It is connected to the conductive film 310f.

[0046] Here, it is preferable that the conductive film 316b has a rectangular shape as shown in FIG. However, one aspect of the present invention is not limited thereto. For example, the conductive film 316b is Like the pixel electrodes in IPS and MVA mode liquid crystal displays, The structure may be a comb-like structure having a groove.

[0047] In this way, since the capacitor 105 has a light-transmitting property, the capacitor 105 is large in the pixel 301. Therefore, the aperture ratio can be increased, typically by 50%. It is possible to set the electric field strength to 55% or more, preferably 60% or more. For example, a liquid crystal display device with high resolution can be obtained. In such a device, the area of ​​the pixel is reduced and the area of ​​the capacitance element is also reduced. In a liquid crystal display device with a high sensitivity, the charge capacity stored in the capacitance element is small. However, since the capacitor 105 shown in this embodiment has a light-transmitting property, the capacitor By providing the second insulating film, it is possible to increase the aperture ratio while obtaining a sufficient charge capacity in each pixel. Typically, high-resolution monitors have pixel densities of 200 ppi or more, or even 300 ppi or more. The present invention can be suitably used in liquid crystal display devices.

[0048] In addition, the pixel 301 shown in FIG. 2 has a side that is parallel to the conductive film 304c that functions as a scan line. In comparison, the side parallel to the conductive film 310d functioning as a signal line is shorter, and The conductive film 310f functioning as a line is parallel to the conductive film 310d functioning as a signal line. As a result, the area of ​​the conductive film 310f in the pixel 301 is reduced. This allows the aperture ratio to be increased. Since the conductive film 310f is in direct contact with the light-transmitting conductive film 308c without using a connection electrode, Furthermore, the aperture ratio can be increased.

[0049] In addition, according to one embodiment of the present invention, the aperture ratio can be increased even in a high-resolution liquid crystal display device. This allows efficient use of light from a light source such as a backlight, and thus makes it possible to improve the liquid crystal display device The power consumption can be reduced.

[0050] Next, a cross-sectional view taken along dashed line CD in FIG. 2 is shown in FIG. 3. In FIG. 3, A driver circuit portion (a top view is omitted) including a scanning line driver circuit 104 and a signal line driver circuit 106. ) is shown in a cross-sectional view of FIG. AB. In this embodiment, a vertical electric field type semiconductor device is used. A liquid crystal display device will now be described.

[0051] The liquid crystal display device shown in this embodiment has a liquid crystal display device between a pair of substrates (a substrate 302 and a substrate 342). The element 322 is sandwiched.

[0052] The liquid crystal element 322 is connected to a light-transmitting conductive film 316b above the substrate 302 to control the alignment. A liquid crystal layer 320 and a conductive film 350 are arranged in a liquid crystal display device. Note that the light-transmitting conductive film 316b is used as one electrode of the liquid crystal element 322. The conductive film 350 functions as the other electrode of the liquid crystal element 322. In this embodiment, a planarization film 317 is provided between a light-transmitting conductive film 316b and an alignment film 318. The planarization film 317 is a light-transmitting conductive film that functions at least as a pixel electrode. The organic resin film is filled in the recesses of the conductive film 316b. The recess is a region through which the backlight of the liquid crystal display device passes, i.e., a light-transmitting conductive film. The opening of the insulating film 312 on the conductive film 308c is filled with the planarizing film 317. That is, the unevenness of the formation region can be reduced. The depth of the recess can be reduced by adjusting the depth of the insulating film 318. This corresponds to a thickness of 2.

[0053] The planarization film 317 is preferably light-transmitting. For example, the planarization film 317 may be a color filter or a black matrix. For example, the planarization film 317 may have a function of a color filter. If there is a pixel, for example, red pixels, blue pixels, and green pixels, In this case, a colored flattening film 317 may be formed.

[0054] Thus, a liquid crystal display device is a device that has liquid crystal elements. The liquid crystal display device includes a driving circuit for driving a plurality of pixels. A control circuit, a power supply circuit, a signal generating circuit, a backlight module, etc., are arranged in It is also called a liquid crystal module.

[0055] In the driver circuit portion, a conductive film 304a functions as a gate electrode, and a gate insulating film The insulating film 305 and the insulating film 306 functioning as a channel region are formed in the oxide semiconductor film 30. 8a, the conductive films 310a and 310b functioning as a source electrode and a drain electrode The oxide semiconductor film 308a constitutes the transistor 102. The oxide semiconductor film 308a is provided over the gate insulating film. Moreover, insulating films 312 and 314 are provided as protective films on the conductive films 310a and 310b. It is being done.

[0056] In the pixel portion, a conductive film 304c functions as a gate electrode, and a gate insulating film The insulating film 305 and the insulating film 306 are formed on the gate insulating film. a conductive film 310 serving as a source electrode and a drain electrode; The oxide semiconductor film 308b is a gate The insulating film 312 and the insulating film 313 are provided on the conductive films 310d and 310e. 314 is provided as a protective film.

[0057] In addition, a light-transmitting conductive film 316b functioning as a pixel electrode is formed between the insulating film 312 and the insulating film 316b. The insulating film 314 is connected to the conductive film 310e through an opening provided therein.

[0058] In addition, a light-transmitting conductive film 308c functioning as one electrode and a dielectric film The insulating film 314 serving as the other electrode and the light-transmitting conductive film 316b serving as the other electrode form a capacitor. The light-transmitting conductive film 308c is provided over the gate insulating film. .

[0059] In the driving circuit section, the conductive film 304a and the conductive film 304c are formed at the same time. 4b and the conductive film 31 The light-transmitting conductive film 310c is formed at the same time as the light-transmitting conductive film 316b. Connected via 6a.

[0060] The conductive film 304b and the light-transmitting conductive film 316a are formed by the insulating film 305, the insulating film 306, The connection is made through an opening provided in the insulating film 312 and the insulating film 314. The conductive film 316a having a light-transmitting property is formed in the insulating film 312 and the insulating film 314. Connect at the mouth.

[0061] In this embodiment, the light-transmitting conductive film 30 which is one electrode of the capacitor 105 In order to increase the conductivity of 8c, an opening is provided in the insulating film 312. The conductive film 308c having a light-transmitting property is in contact with the insulating film 314 formed using a nitride insulating film. However, the conductive layer in the opening functions as a pixel electrode. A recess is formed in the conductive film 316b having the above structure. The device has a planarization film 317 on a light-transmitting conductive film 316b that functions as a pixel electrode. Therefore, the concave portion of the light-transmitting conductive film 316b is filled with the planarization film 317. The level difference on the surface of the planarization film 317 is small. As a result, the alignment film provided on the planarization film 317 The unevenness of the surface of 318 is reduced, and the alignment irregularity of the liquid crystal can be reduced. This can reduce display defects in liquid crystal display devices.

[0062] Here, the components of the display device shown in FIG. 3 will be described below.

[0063] There is no particular restriction on the material of the substrate 302, but it should be strong enough to withstand the subsequent heat treatment. For example, glass substrates, ceramic substrates, quartz substrates, and sa A fire substrate or the like may be used as the substrate 302. Also, silicon, silicon carbide, etc. Single crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, It is also possible to use SOI substrates, etc., and semiconductor elements are provided on these substrates. The substrate 302 may be a glass substrate. Combined, 6th generation (1500mm x 1850mm), 7th generation (1870mm x 2200mm ), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 2800mm ), 10th generation (2950mm x 3400mm) and other large area substrates, A liquid crystal display device can be manufactured.

[0064] In addition, a flexible substrate is used as the substrate 302, and a transistor is formed directly on the flexible substrate. Alternatively, a release layer may be provided between the substrate 302 and the transistor. After completing a part or the whole of the element part on it, it is separated from the substrate 302 and attached to another substrate. In this case, the transistors can be mounted on substrates with poor heat resistance or flexible substrates. It can also be printed on other circuit boards.

[0065] The conductive films 304a, 304b, and 304c may be made of aluminum, chromium, copper, or tantalum. , titanium, molybdenum, tungsten, or the above-mentioned metal elements The alloy may be formed using an alloy containing the above-mentioned metal elements or a combination of the above-mentioned metal elements. In addition, the present invention uses a metal element selected from one or more of manganese and zirconium. The conductive films 304a, 304b, and 304c may have a single-layer structure or a two-layer or more layer structure. For example, a single layer structure of an aluminum film containing silicon, A two-layer structure in which a titanium film is laminated on a titanium nitride film, a two-layer structure in which a titanium film is laminated on a titanium nitride film, A two-layer structure in which a tungsten film is laminated on a titanium nitride film, a tantalum nitride film or a tungsten nitride film A two-layer structure in which a tungsten film is laminated on a stainless film, a titanium film, and an aluminum film on the titanium film. There are three-layer structures, such as a laminate of an aluminum film and a titanium film on top of that. Titanium, tantalum, tungsten, molybdenum, chromium, neodymium, scandium Alternatively, an alloy film or a nitride film made of one or more elements selected from the group consisting of aluminum and arsenic may be used. stomach.

[0066] The conductive films 304a, 304b, and 304c are made of indium tin oxide or tungsten oxide. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide A conductive material having light transmitting properties, such as indium tin oxide doped with silicon oxide, is used. In addition, the conductive material having light transmitting properties and the metal element may be laminated. It is also possible.

[0067] The conductive films 304a, 304b, and 304c and the insulating film which functions as a part of the gate insulating film Between the film 305, an In-Ga-Zn-based oxynitride film, an In-Sn-based oxynitride film, an In -Ga-based oxynitride film, In-Zn-based oxynitride film, Sn-based oxynitride film, In-based oxynitride film A nitride film, a metal nitride film (InN, ZnN, etc.), etc. may be provided. These films have a voltage of 5 eV or more, Preferably, the work function is 5.5 eV or more, and is greater than the electron affinity of the oxide semiconductor. Therefore, the threshold voltage of a transistor including an oxide semiconductor can be shifted in the positive direction. This makes it possible to realize a switching element with what is called a normally-off characteristic. In the case of using an a-Zn-based oxynitride film, the thickness of the film is at least larger than that of the oxide semiconductor films 308a and 308b. In the present invention, an In-Ga-Zn-based oxynitride film having a higher nitrogen concentration, specifically, 7 atomic % or more, is used.

[0068] An insulating film 305, an insulating film 306, and an insulating film 307 are formed on the substrate 302 and the conductive films 304a, 304c, and 304b. The insulating film 305 and the insulating film 306 are formed on the transistor 1 of the driving circuit section. 02 and serves as a gate insulating film of the transistor 103 in the pixel portion 101. Possesses the ability.

[0069] The insulating film 305 may be, for example, silicon nitride, silicon oxynitride, aluminum nitride, It is preferable to form the insulating film using a nitride such as aluminum oxide nitride.

[0070] The insulating film 306 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, Silicon nitride, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn-based gold The insulating film 306 may be formed of a metal oxide or the like, and may be formed as a single layer or a multilayer. Hafnium Silicate (HfSiO x ), nitrogen-doped hafnium silicate (Hf S x O y N z ), nitrogen-doped hafnium aluminate (HfAl x O y N z ), By using high-k materials such as hafnium oxide and yttrium oxide, This can reduce the gate leakage.

[0071] The total thickness of the insulating film 305 and the insulating film 306 is preferably 5 nm or more and 400 nm or less. Preferably, the thickness is 10 nm or more and 300 nm or less, and more preferably, 50 nm or more and 250 nm or less. It is good.

[0072] Over the insulating film 306, oxide semiconductor films 308a and 308b and a light-transmitting conductive film 30 The oxide semiconductor film 308a is formed in a position overlapping with the conductive film 304a. The oxide film is formed on the insulating film 101 and functions as a channel region of the transistor 102 in the driver circuit section. The semiconductor film 308b is formed in a position overlapping with the conductive film 304c. The light-transmitting conductive film 308c functions as a channel region of the capacitor 103. It serves as one of the electrodes of 5.

[0073] The oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c are typically are In-Ga oxide film, In-Zn oxide film, In-M-Zn oxide film (M is Al, T i, Ga, Y, Zr, La, Ce, Nd, or Hf).

[0074] Note that the oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c are In In the case of an M-Zn oxide film, when the sum of In and M is 100 atomic %, The atomic ratio of In and M is preferably 25 atomic % or more of In and 75 atomic % or more of M. ic% or less, more preferably In is 34 atomic % or more and M is 66 atomic % Less than.

[0075] The oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c The gap is 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. In this way, by using an oxide semiconductor with a wide energy gap, The off current can be reduced.

[0076] The oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c each have a thickness of 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 100 nm or less. The length should be between m and 50 nm.

[0077] The oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c were formed using In: Use In-Ga-Zn oxide with an atomic ratio of Ga:Zn=1:1:1 or 3:1:2 Note that the oxide semiconductor films 308a and 308b and the light-transmitting conductive film 3 The atomic ratios of 08c are subject to a margin of error of ±20% from the atomic ratios listed above. Includes.

[0078] The oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c are all gate electrodes. The insulating film 306 is formed on the insulating film 307, but the impurity concentration is different. In contrast to the oxide semiconductor films 308a and 308b, the conductive film 308c has a light-transmitting property. For example, the hydrogen concentration in the oxide semiconductor films 308a and 308b is 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 less than , preferably 1 x 10 18 atoms / cm 3 Less than or equal to 5×10 17 ato ms / cm 3 Less than 1×10, more preferably 16 atoms / cm 3 is less than or equal to The hydrogen concentration in the conductive film 308c having the above property is 8×10 19 atoms / cm 3 End , preferably 1 x 10 20 atoms / cm 3 More preferably, 5×10 20 ato ms / cm 3 In addition, the light-transmitting The hydrogen concentration in the conductive film 308c having this structure is two times, preferably ten times or more.

[0079] In addition, the light-transmitting conductive film 308c has a lower resistance than the oxide semiconductor films 308a and 308b. The resistivity of the light-transmitting conductive film 308c is low compared to that of the oxide semiconductor films 308a and 308b. b resistivity 1×10 -8 more than 1x10 -1 It is preferable that the ratio is less than 1 / 2. 1×10 -3 Ωcm or more 1×10 4 Ωcm, and more preferably a resistivity of 1×10 - 3 Ωcm or more 1×10 -1 It is preferable that the resistivity is less than Ωcm.

[0080] The oxide semiconductor films 308a and 308b contain silicon or carbon, which is one of the Group 14 elements. When the oxide semiconductor films 308a and 308b contain oxygen, oxygen vacancies increase, and the oxide semiconductor films 308a and 308b become n-type. As a result, the concentrations of silicon and carbon in the oxide semiconductor films 308a and 308b are The concentration (obtained by secondary ion mass spectrometry) was calculated as 2×10 18 atoms / cm 3 Below Lower, preferably 2 x 10 17 atoms / cm 3 The following applies.

[0081] In addition, the oxide semiconductor films 308a and 308b were analyzed by secondary ion mass spectrometry. The concentration of alkali metal or alkaline earth metal in the solution is 1×10 18 atoms / cm 3 Below Lower, preferably 2 x 10 16 atoms / cm3 The following are alkali metals and alkalis: When an earth metal combines with an oxide semiconductor, it can generate carriers, which can be used to As a result, the off-state current of the oxide semiconductor films 308a and 308b may increase. It is preferred to reduce the concentration of alkali or alkaline earth metals.

[0082] In addition, when the oxide semiconductor films 308a and 308b contain nitrogen, the charge carrier This causes the electrons to be generated, increasing the carrier density and making it easier to become n-type. Transistors using oxide semiconductors tend to be normally-on. It is preferable that the amount of nitrogen in the semiconductor film is reduced as much as possible. The nitrogen concentration obtained by mass spectrometry is 5×10 18 atoms / cm 3 To be more specific: is preferred.

[0083] The oxide semiconductor films 308a and 308b are formed using oxide semiconductor films with low carrier density. For example, the oxide semiconductor films 308a and 308b have a carrier density of 1×10 17 pieces / cm 3 Less than or equal to 1×10 15 pieces / cm 3 Less than 1×10, more preferably 13 pieces / cm 3 Less than or equal to 1×10 11 pieces / cm 3 The following oxide semiconductor film is used.

[0084] In addition, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use a material with an appropriate composition according to the required properties (e.g., the resultant mobility, threshold voltage, etc.). In order to obtain semiconductor characteristics of the transistor, the carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. It is preferable to use such a material.

[0085] The oxide semiconductor films 308a and 308b are formed by forming the oxide semiconductor film 308a and the oxide semiconductor film 308b on the insulating film 306 and the insulating film 312. Since it is in contact with a film made of a material that can improve the interface characteristics with the conductor film, it is acid-resistant. The oxide semiconductor films 308a and 308b function as semiconductors. The transistor having 08b has excellent electrical characteristics.

[0086] Note that the oxide semiconductor films 308a and 308b have a low impurity concentration and a low density of defect states. By using a low-temperature oxide semiconductor film, a transistor with excellent electrical characteristics can be manufactured. In this embodiment, the impurity concentration is low and the defect level density is low (there is little oxygen vacancy). High purity authentic or substantially high purity authentic. Since highly intrinsic oxide semiconductors have few carrier generation sources, it is possible to reduce the carrier density. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film may be formed. The electrical characteristics of a transistor are such that the threshold voltage is negative (also called normally-on). In addition, high-purity intrinsic or substantially high-purity intrinsic oxide semiconductors Since the defect level density of the thin film is low, the trap level density may also be low. A highly intrinsic or substantially highly purified intrinsic oxide semiconductor film has an extremely small off-state current and Channel width is 1×10 6 Even if the device has a channel length L of 10 μm, the When the voltage between the drain electrodes (drain voltage) is in the range of 1V to 10V, the off-state current is Below the measurement limit of the conductor parameter analyzer, i.e. 1×10 -13 A or lower characteristic Therefore, a transistor in which a channel region is formed in the oxide semiconductor film can be obtained. The change in electrical characteristics of the oxide semiconductor may be small, resulting in a highly reliable transistor. Charges trapped in the trap levels of the semiconductor film take a long time to disappear. Therefore, oxides with high trap state density are A transistor in which a channel region is formed in a semiconductor film may have unstable electrical characteristics. The impurities include hydrogen, nitrogen, alkali metals, and alkaline earth metals.

[0087] On the other hand, the light-transmitting conductive film 308c is formed in the opening 362 (see FIG. 6A). The insulating film 314 is in contact with the insulating film 314. The insulating film 314 is used to prevent impurities from the outside, such as water and alkali metals. The insulating film 31 is a film that prevents an alkaline earth metal or the like from diffusing into the oxide semiconductor film. Therefore, hydrogen in the insulating film 314 is transferred to the oxide semiconductor films 308a and 308b. When hydrogen diffuses into an oxide semiconductor film formed at the same time, the hydrogen is mixed with oxygen in the oxide semiconductor film. As a result, the oxide semiconductor film has high electrical conductivity. In other words, it can be said to be an oxide semiconductor film with high conductivity. The oxide semiconductor films 308a and 308b are mainly made of the same material, and the hydrogen concentration is lower than that of the oxide semiconductor films 308a and 308b. The metal oxide having a higher electrical conductivity due to being higher than the conductive films 308a and 308b is This is referred to as a conductive film 308c.

[0088] The oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c are, for example, For example, a non-single crystal structure may be used. The non-single crystal structure is, for example, CAAC-OS (CAAC-OS) described later. xis Aligned Crystalline Oxide Semiconductor tor), polycrystalline structure, microcrystalline structure (described later), or amorphous structure. In the amorphous structure, the defect density is the highest, and the CAAC-OS structure has the lowest defect density. Note that the oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c are The crystallinity is the same.

[0089] Note that the oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c are non-transparent. Crystalline structure region, microcrystalline structure region, polycrystalline structure region, CAAC-OS region, single crystal The mixed film may be, for example, an amorphous film having two or more of the above-mentioned structural regions. The regions are: microcrystalline structure, polycrystalline structure, CAAC-OS, single crystal structure. In some cases, the mixed membrane may have a single layer structure of two or more regions of the above structure. For example, amorphous structure regions, microcrystalline structure regions, polycrystalline structure regions, CAAC-OS regions In some cases, the semiconductor device may have a laminated structure of two or more of the regions of the single crystal structure.

[0090] However, one aspect of the embodiment of the present invention is not limited to this. In some cases, it is possible that 8c is not in contact with the insulating film 314.

[0091] In addition, one aspect of the embodiment of the present invention is not limited to this. In some cases, the oxide semiconductor film 308c may be formed in a separate process from the oxide semiconductor film 308a or 308b. In that case, the light-transmitting conductive film 308c may be formed by the oxide semiconductor film 308. For example, the conductive film 308a and the conductive film 308b may be made of different materials. c is indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, etc. It may be formed using

[0092] In the liquid crystal display device described in this embodiment, a capacitor is formed in addition to an oxide semiconductor film of a transistor. A light-transmitting conductive film that functions as a pixel electrode is formed on one of the electrodes of the capacitor. The other electrode of the element is used. Since the step of forming a film is not required, the manufacturing steps of the liquid crystal display device can be reduced. Since the pair of electrodes is formed of a conductive film having a light-transmitting property, the light-transmitting property is obtained. As a result, the area occupied by the capacitive element can be increased while increasing the aperture ratio of the pixel.

[0093] The conductive films 310a, 310b, 310c, 310d, and 310e are made of aluminum. Minium, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, Silver, tantalum, or tungsten, or an alloy with this as its main component. It is used as a single layer structure or a multilayer structure. For example, a single layer structure of an aluminum film containing silicon is used. A two-layer structure with a titanium film laminated on an aluminum film, and a titanium film laminated on a tungsten film a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film; A titanium film or titanium nitride film and an aluminum film overlaid on the titanium film or titanium nitride film. A three-layer structure is formed by laminating a titanium film or a copper film on top of the titanium film or a titanium nitride film. A molybdenum film or a molybdenum nitride film and the molybdenum film or the molybdenum nitride film An aluminum film or copper film is layered on top, and a molybdenum film or nitride film is then layered on top of that. There are three-layer structures that form a molybdenum film. A transparent conductive material containing lead may also be used.

[0094] An insulating film 306, oxide semiconductor films 308a and 308b, a light-transmitting conductive film 308c, An insulating film 312 is formed on the conductive films 310a, 310b, 310c, 310d, and 310e. An insulating film 314 is formed. The insulating film 312 is made of an oxide semiconductor, similar to the insulating film 306. It is preferable to use a material capable of improving the interface characteristics with the film, and the oxide insulating film is preferably Here, the insulating film 312 can be formed by using insulating films 312a and 31 2b is laminated to form it.

[0095] The insulating film 312a is an oxide insulating film that transmits oxygen. When the insulating film 312b is formed on the oxide semiconductor films 308a and 308b, It also functions as a film for reducing damage to the conductive film 308c having optical properties.

[0096] The insulating film 312a has a thickness of 5 nm to 150 nm, preferably 5 nm to 500 nm. A silicon oxide film, a silicon oxynitride film, or the like having a thickness of 0 nm or less can be used. In the specification, a silicon oxynitride film is a film having a composition in which the oxygen content is higher than that of nitrogen. A silicon nitride oxide film is a film that contains more nitrogen than oxygen. This refers to a thin membrane.

[0097] In addition, it is preferable that the insulating film 312a has a small amount of defects. Therefore, the spin density of the signal at g=2.001 originating from the silicon dangling bond is Degree is 3 x 10 17 spins / cm 3 This is because the insulating film 312 If the density of defects in a is high, oxygen will bind to the defects, and the insulating film 312a will This is because the amount of oxygen that passes through the material decreases.

[0098] In addition, the insulating film 312a, the oxide semiconductor films 308a and 308b, and the light-transmitting conductive film It is preferable that the amount of defects at the interface with the film 308c is small. As a result, defects in the oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c are The spin density of the signal appearing at g=1.93 is 1×10 17 spins / cm 3 below , and more preferably below the lower limit of detection.

[0099] In the insulating film 312a, all of the oxygen that entered the insulating film 312a from the outside is Some oxygen does not move outside the insulating film 312a and remains in the insulating film 312a. As oxygen enters the insulating film 312a, oxygen contained in the insulating film 312a moves out of the insulating film 312a. This may cause oxygen transfer in the insulating film 312a.

[0100] When an oxide insulating film that transmits oxygen is formed as the insulating film 312a, The insulating film 312a is formed on the oxide semiconductor layer 311. The conductive film 308c can be transferred to the films 308a and 308b and the light-transmitting conductive film 308c.

[0101] An insulating film 312b is formed in contact with the insulating film 312a. It is preferable to form the insulating film using an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. An oxide insulating film that contains more oxygen than the stoichiometric composition is easily oxidized by heating. A part of the element is released. The oxide insulating film contains more oxygen than the oxygen that satisfies the stoichiometric composition. In TDS analysis, the amount of oxygen released was 1.0 x 10 18 atoms / cm 3 More than 3.0×10 20 atoms / cm 3 The oxide insulating film It is.

[0102] The insulating film 312b has a thickness of 30 nm to 500 nm, preferably 50 nm or more. A silicon oxide film, a silicon oxynitride film, or the like having a thickness of 400 nm or less can be used.

[0103] In addition, it is preferable that the insulating film 312b has a small amount of defects. Therefore, the spin density of the signal at g=2.001 originating from the silicon dangling bond is Degree is 1.5 x 10 18 spins / cm 3 Less than or even 1×10 18 spins / cm 3 The insulating film 312b is preferably an oxide film or less than the insulating film 312a. Since the semiconductor films 308a and 308b and the light-transmitting conductive film 308c are separated from each other, The defect density may be higher than that of the insulating film 312a.

[0104] The insulating film 314 is made of a blocker such as oxygen, hydrogen, water, an alkali metal, or an alkaline earth metal. By providing the nitride insulating film having a masking effect, the oxide semiconductor films 308a, 308b, and The diffusion of oxygen from the conductive film 308c having a light-transmitting property to the outside can be prevented. The insulating film may be silicon nitride, silicon oxynitride, aluminum nitride, or aluminum oxynitride. Nium, etc.

[0105] In addition, the material has a blocking effect against oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. An oxide insulating film having a blocking effect against oxygen, hydrogen, water, etc. is provided over the nitride insulating film. As the oxide insulating film having a blocking effect against oxygen, hydrogen, water, and the like, an oxide insulating film may be used. Aluminum, aluminum oxide nitride, gallium oxide, gallium oxide nitride, yttrium oxide Examples include yttrium oxide, yttrium nitride, hafnium oxide, and hafnium nitride. In order to control the charge capacity of the element, oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. A nitride insulating film or an oxide insulating film is appropriately provided on the nitride insulating film having a blocking effect. Good too.

[0106] In addition, conductive films 316a and 316b having light-transmitting properties are formed over the insulating film 314. The light-transmitting conductive film 316a is conductive in the opening 364a (see FIG. 6C). The conductive film 304b is electrically connected to the conductive film 304b in the opening 364b (see FIG. 6C). 10c. That is, the connection between the conductive film 304b and the conductive film 310c. The light-transmitting conductive film 316b functions as an electrode. 3. The conductive film 310e is electrically connected to the conductive film 310e at the region 310a and functions as a pixel electrode of the pixel. The light-transmitting conductive film 316b functions as one of a pair of electrodes of a capacitor. It is possible.

[0107] In order to form a connection structure in which the conductive film 304b and the conductive film 310c are in direct contact with each other, Before forming the conductive film 310c, a pattern is formed in order to form openings in the insulating films 305 and 306. However, as shown in Figure 3, the mask is transparent. The conductive film 316a having the following structure connects the conductive film 304b and the conductive film 310c. There is no need to form a connection portion where the conductive film 304b and the conductive film 310c are in direct contact with each other. In other words, the number of steps in the manufacture of a liquid crystal display device can be reduced. is possible.

[0108] The light-transmitting conductive films 316a and 316b are made of indium oxide containing tungsten oxide. Indium Zinc Oxide with Tungsten Oxide, Indium Zinc Oxide with Titanium Oxide Oxide, indium tin oxide with titanium oxide, ITO, indium zinc oxide, oxide ketone A light-transmitting conductive material such as indium-tin oxide doped with indium can be used. do.

[0109] The planarization film 317 is made of an organic resin such as acrylic resin, polyimide, or epoxy resin. The planarization film 317 may have a thickness of at least 1500 nm, which is equal to or greater than the thickness of the insulating film 312. Preferably, the thickness of the flattening film 317 is set to be equal to or larger than the thickness of the insulating film 312 and equal to or smaller than 1000 nm. By making the thickness of the insulating film 312 or more, a planarizing film is formed in the recesses of the light-transmitting conductive film 316b. 317 can be filled in, and the unevenness of the region where the alignment film 318 is formed is reduced. If the thickness of the planarizing film 317 is large, the liquid crystal molecules contained in the liquid crystal layer 320 may be When controlling the orientation of the light, a voltage is applied to the conductive film 316b having a light transmitting property and functioning as a pixel electrode. The voltage applied to the flattening film 317 becomes large, and the power consumption becomes high. Therefore, the thickness of the flattening film 317 is set to 150 0 nm or less is preferable.

[0110] By forming the planarization film 317 using an organic resin, it is possible to form a film that functions at least as a pixel electrode. The recesses of the light-transmitting conductive film 316b can be filled with the planarizing film 317. It is possible to reduce uneven alignment of the liquid crystal molecules that make up the liquid crystal layer 320.

[0111] The alignment film 318 may be made of an organic resin such as polyimide. The film thickness should be 40 nm or more and 100 nm or less, and more preferably 50 nm or more and 90 nm or less. By setting the film thickness in this range, the pretilt angle of the liquid crystal molecules can be increased. It is possible. By increasing the pretilt angle of the liquid crystal molecules, disclination can be reduced. It is possible to do so.

[0112] In addition, a film having color (hereinafter, referred to as a color film 346) is formed on the substrate 342. The colored film 346 functions as a color filter. A light-shielding film 344 is formed on the substrate 342 and is adjacent to the light-shielding film 344. The colored film 346 does not necessarily have to be provided. For example, a liquid crystal In some cases, such as when the display device is black and white, the color film 346 may not be provided.

[0113] The colored film 346 may be any colored film that transmits light in a specific wavelength range. For example, A red (R) color filter that transmits light in the red wavelength range, and a green (G) color filter that transmits light in the green wavelength range. A green (G) color filter transmits light in the blue wavelength range, and a blue (B) color filter transmits light in the blue wavelength range. A filter or the like can be used.

[0114] The light-shielding film 344 may be made of a metal or other material as long as it has a function of blocking light in a specific wavelength range. Alternatively, an organic insulating film containing a black pigment or the like can be used.

[0115] In addition, an insulating film 348 is formed on the colored film 346. The insulating film 348 is planarized. The function of the colored film 346 is to prevent impurities contained therein from diffusing toward the liquid crystal element. It has the function of controlling

[0116] In addition, a conductive film 350 is formed on the insulating film 348. The conductive film 350 is The liquid crystal element has a function as the other of the pair of electrodes. An alignment film 352 is formed on the films 316 a and 316 b and the conductive film 350 .

[0117] In addition, the liquid crystal layer 3 is provided between the conductive films 316a and 316b having light transmitting properties and the conductive film 350. The liquid crystal layer 320 is formed on the substrate 3 using a sealing material (not shown). The sealing material is used to prevent moisture from entering the device. In order to suppress oxidation, it is preferable to have a structure in which the inorganic material is in contact with the inorganic material.

[0118] In addition, a liquid crystal layer 320 is provided between the conductive films 316a and 316b having light-transmitting properties and the conductive film 350. A spacer may be provided to maintain the thickness (also called the cell gap) of the pixel.

[0119] Regarding a method for manufacturing an element portion provided on a substrate 302 in the liquid crystal display device shown in FIG. 4 to 7. In this embodiment, the element portion provided on the substrate 302 is In this case, it refers to the region sandwiched between the substrate 302 and the alignment film 318.

[0120] First, prepare a substrate 302. Here, a glass substrate is used as the substrate 302.

[0121] Next, a conductive film is formed on the substrate 302, and the conductive film is processed into a desired region. The conductive films 304a, 304b, and 304c are formed. The formation of c is performed by forming a mask by a first patterning in a desired region, and then covering the mask. It can be formed by etching the uncut areas (see FIG. 4(A)).

[0122] The conductive films 304a, 304b, and 304c are typically formed by deposition or CVD. The insulating film can be formed by a method such as sputtering or spin coating.

[0123] Next, an insulating film 305 is formed on the substrate 302 and the conductive films 304a, 304b, and 304c. Then, an insulating film 306 is formed over the insulating film 305 (see FIG. 4A).

[0124] The insulating film 305 and the insulating film 306 are formed by a sputtering method, a CVD method, or the like. When the insulating film 305 and the insulating film 306 are successively formed in a vacuum, impurities are easily removed. This is preferable because it suppresses the inclusion of

[0125] Next, an oxide semiconductor film 307 is formed over the insulating film 306 (see FIG. 4B).

[0126] The oxide semiconductor film 307 can be formed by a sputtering method, a coating method, a pulsed laser deposition method, a laser deposition method, or the like. The thin film can be formed by using a method such as ablation.

[0127] Next, the oxide semiconductor film 307 is processed into a desired region to form an island-shaped oxide semiconductor film 3 The oxide semiconductor films 308a, 308b, and 308d are formed. The formation of 08d involves forming a mask by second patterning in a desired area, and then forming the mask The etching can be performed by etching the area not covered by the The etching process can be dry, wet, or a combination of both. (See FIG. 4(C)).

[0128] After that, heat treatment is performed to remove the oxide semiconductor films 308a, 308b, and 308d. Hydrogen, water, and the like contained in the oxide semiconductor films 308a, 308b, and 308d are released. As a result, the concentration of hydrogen in the highly purified oxide semiconductor film 308 may be reduced. The temperature of the heat treatment is typically 2 The temperature is 50° C. or higher and 650° C. or lower, preferably 300° C. or higher and 500° C. or lower. The treatment temperature is typically 300° C. to 400° C., preferably 320° C. to 370° C. By doing the following, it is possible to reduce warping and shrinkage of the board even in large area boards. and the yield is improved.

[0129] The heat treatment can be performed using an electric furnace, an RTA device, or the like. This allows heat treatment at a temperature above the distortion point of the substrate for a short period of time. It is possible to shorten the heat treatment time and reduce the warping of the substrate during heat treatment. This is particularly preferable for large area substrates.

[0130] The heat treatment is carried out in an atmosphere of nitrogen, oxygen, or ultra-dry air (water content of 20 ppm or less, preferably air at less than 1 ppm, preferably less than 10 ppb), or rare gases (argon, helium The above-mentioned nitrogen, oxygen, ultra-dry air, or rare gas may be added to the water atmosphere. It is preferable that the material does not contain hydrogen, water, etc. Also, after heat treatment in a nitrogen or rare gas atmosphere, Alternatively, the oxide semiconductor film may be heated in an oxygen or ultra-dry air atmosphere. Hydrogen, water, and the like can be released and oxygen can be supplied to the oxide semiconductor film. As a result, the amount of oxygen vacancies in the oxide semiconductor film can be reduced.

[0131] In addition, when the film formation temperature of the insulating film 311a to be formed later is set to 280° C. or more and 400° C. or less, In this case, hydrogen, water, and the like contained in the oxide semiconductor films 308a, 308b, and 308d are released. Since this is possible, the heat treatment is not necessary.

[0132] Next, a conductive film 3 is formed over the insulating film 306 and the oxide semiconductor films 308a, 308b, and 308d. 09 (see Figure 5(A)).

[0133] The conductive film 309 can be formed by, for example, a sputtering method.

[0134] Next, the conductive film 309 is processed into a desired region to form conductive films 310a, 310b, and 311. In addition, the conductive films 310a, 310b, 310c, 310d, and 310e are formed. The formation of 10d and 310e involves forming a mask by third patterning in a desired area. The regions not covered by the mask can be etched to form the etched region (FIG. 5). (See (B)).

[0135] Next, the insulating film 306, the oxide semiconductor films 308a, 308b, and 308d, and the conductive film 31 Insulating films 311a and 310b are formed on the insulating films 310a, 310b, 310c, 310d, and 310e. 1b is laminated to form an insulating film 311 (see FIG. 5(C)).

[0136] After the insulating film 311a is formed, the insulating film 311b is successively formed without exposing it to the air. After the insulating film 311a is formed, the flow rate of the source gas is preferably set to 1000 μm without exposing the insulating film 311a to the atmosphere. At least one of the pressure, the high frequency power, and the substrate temperature is adjusted to continuously form the insulating film 311b. This reduces the concentration of impurities originating from atmospheric components at the interface between the insulating films 311a and 311b. In addition, oxygen contained in the insulating film 311b can be removed by the oxide semiconductor films 308a and 308b. The oxide semiconductor films 308a, 308b, and 308d can be moved to the oxide semiconductor films 308a, 308b, and 308d. The amount of oxygen vacancy in 08d can be reduced.

[0137] The insulating film 311a is made of a silicon oxide film placed in a processing chamber of a plasma CVD apparatus that has been evacuated to a vacuum. The substrate is kept at a temperature of 180° C. or higher and 400° C. or lower, preferably 200° C. or higher and 370° C. or lower, and processed. A raw material gas is introduced into the chamber to set the pressure in the processing chamber at 20 Pa or more and 250 Pa or less, more preferably Preferably, the pressure is 100 Pa or more and 250 Pa or less, and high frequency power is applied to the electrode provided in the processing chamber. Depending on the conditions of supply, a silicon oxide film or a silicon oxynitride film can be formed. .

[0138] As the source gas for the insulating film 311a, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of deposition gases containing silicon include silane, disilane, and trisilane. Examples of oxidizing gases include oxygen, ozone, nitrous oxide, Nitrogen dioxide, etc.

[0139] By using the above conditions, an oxide insulating film that transmits oxygen is formed as the insulating film 311a. In addition, by providing the insulating film 311a, the insulating film 311b to be formed later can be formed. In the formation process, damage to the oxide semiconductor films 308a, 308b, and 308d can be reduced. It is Noh.

[0140] The insulating film 311a was placed in a processing chamber of a plasma CVD apparatus that was evacuated to a vacuum. The substrate is kept at 280°C or higher and 400°C or lower, and a source gas is introduced into the processing chamber. The pressure is set to 100 Pa or more and 250 Pa or less, and high frequency power is applied to the electrode installed in the treatment chamber. Depending on the conditions of supply, the insulating film 311a may be a silicon oxide film or a silicon oxynitride film. can be formed.

[0141] Under the above film formation conditions, the substrate temperature is set to the film formation temperature of the insulating film 311a, whereby silicon As a result, the insulating film 311a is dense and oxygen-permeable. A hard oxide insulating film, typically 0.5% by weight hydrofluoric acid at 25°C, is used. The etching rate of the silicon oxide when the silicon oxide is etched is 10 nm / min or less, preferably 8 nm / min or less. A silicon nitride film or a silicon oxynitride film can be formed.

[0142] In addition, in this process, the insulating film 311a is formed while being heated. In this process, hydrogen, water, and the like contained in the oxide semiconductor films 308a, 308b, and 308d are released. It is possible.

[0143] In addition, since heating is performed in the step of forming the insulating film 311a, the oxide semiconductor film 308a , 308b, 308d are exposed for a short heating time, and the oxide semi-conductor caused by the heat treatment is The amount of oxygen released from the conductive film can be reduced. The amount of oxygen deficiency can be reduced.

[0144] Furthermore, by setting the pressure in the processing chamber to 100 Pa or more and 250 Pa or less, the insulating film 311 The water content in a is reduced, which reduces the variation in the electrical characteristics of transistors. At the same time, the fluctuation of the threshold voltage can be suppressed.

[0145] In addition, by setting the pressure in the processing chamber to 100 Pa or more and 250 Pa or less, the insulating film 311a In the deposition, damage to the oxide semiconductor films 308a, 308b, and 308d can be reduced. The amount of oxygen vacancies in the oxide semiconductor films 308a, 308b, and 308d can be reduced by In particular, the formation of the insulating film 311a or the insulating film 311b to be formed later can be reduced. By increasing the film temperature, typically to a temperature higher than 220° C., the oxide semiconductor film 30 A part of the oxygen contained in 8a, 308b, and 308d is easily eliminated, and oxygen vacancies are easily formed. In addition, in order to improve the reliability of the transistor, the amount of defects in the insulating film 311b to be formed later is reduced. The amount of oxygen released is easily reduced by using film formation conditions that allow for the However, it may be difficult to reduce the oxygen vacancies in the membranes 308a, 308b, and 308d. While the insulating film 311a is being formed, the pressure in the processing chamber is set to 100 Pa or more and 250 Pa or less. By reducing damage to the oxide semiconductor films 308a, 308b, and 308d in the Even if the amount of oxygen desorbed from the insulating film 311b is small, the oxide semiconductor films 308a, 308b, and 308 It is possible to reduce the oxygen vacancies in d.

[0146] In addition, by increasing the amount of oxidizing gas to 100 times or more the amount of deposition gas containing silicon, It is possible to reduce the amount of hydrogen contained in the insulating film 311a. Since the amount of hydrogen mixed into the conductive films 308a, 308b, and 308d can be reduced, the transistor Therefore, the negative shift of the threshold voltage can be suppressed.

[0147] The insulating film 311b is made of a silicon oxide film placed in a processing chamber of a plasma CVD apparatus that has been evacuated to a vacuum. The substrate is maintained at 180° C. or higher and 280° C. or lower, more preferably 200° C. or higher and 240° C. or lower. A raw material gas is introduced into the processing chamber to set the pressure in the processing chamber to 100 Pa or more and 250 Pa or less. More preferably, the pressure should be between 100 Pa and 200 Pa, and the pressure should be 0. 17W / cm 2 More than 0.5W / cm 2 Less than or equal to 0.25 W / cm 2 More than 0 .35W / cm 2 Silicon oxide or oxynitride is formed by supplying the following high frequency power. A silicon nitride film is formed.

[0148] As the source gas for the insulating film 311b, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of deposition gases containing silicon include silane, disilane, and trisilane. Examples of oxidizing gases include oxygen, ozone, nitrous oxide, Nitrogen dioxide, etc.

[0149] The insulating film 311b is formed under the following conditions: Supplying electric power increases the efficiency of decomposing the source gas in the plasma, and oxygen radicals increase. However, as the oxidation of the source gas progresses, the oxygen content in the insulating film 311b becomes smaller than the stoichiometric composition. However, when the substrate temperature is the deposition temperature of the insulating film 311b, Because the bond between silicon and oxygen is weak, some of the oxygen is released when heated. Oxidation that contains more oxygen than satisfies the stoichiometric composition and in which some of the oxygen is released by heating In addition, the oxide semiconductor films 308a, 308b, and 308d can be formed on the insulating film. In the step of forming the insulating film 311b, The insulating film 311a serves as a protective film for the oxide semiconductor films 308a, 308b, and 308d. As a result, damage to the oxide semiconductor films 308a, 308b, and 308d can be reduced while providing high power. The insulating film 311b can be formed by using low-density high-frequency power.

[0150] In addition, in the film formation conditions of the insulating film 311b, the deposition property including silicon in the oxidizing gas is By increasing the flow rate of the gas, it is possible to reduce the number of defects in the insulating film 311b. Generally speaking, the ESR measurement shows that the g value is 2.001, which is due to the dangling bond of silicon. The spin density of the signal that appears in 17 spins / cm 3 Less than 3 x 10 17 spins / cm 3 Less than or equal to 1.5×10 17 spins / cm 3 Below This makes it possible to form an oxide insulating film with fewer defects, which results in improved reliability of the transistor. can be increased.

[0151] Next, a heat treatment is performed. The temperature of the heat treatment is typically 150° C. or higher but not higher than the substrate distortion point. Preferably, the temperature is 200° C. or higher and 450° C. or lower, and more preferably, the temperature is 300° C. or higher and 450° C. or lower. The temperature of the heat treatment is typically 300° C. or higher and 400° C. or lower, preferably By keeping the temperature between 320℃ and 370℃, there is no warping or shrinkage even in large area substrates. It is possible to reduce the amount of the defects, thereby improving the yield.

[0152] The heat treatment can be performed using an electric furnace, an RTA device, or the like. Therefore, heat treatment can be performed at a temperature above the distortion point of the substrate for a short period of time. The processing time can be reduced.

[0153] Heat treatment is carried out in a vacuum of nitrogen, oxygen, or ultra-dry air (water content of 20 ppm or less, preferably 1 ppm). pm or less, preferably 10 ppb or less air), or rare gases (argon, helium, etc.) In addition, the above-mentioned nitrogen, oxygen, ultra-dry air, or rare gas may be mixed with hydrogen, water, or the like. It is preferable that the above is not included.

[0154] By this heat treatment, part of oxygen contained in the insulating film 311b is oxidized to the oxide semiconductor film 308a , 308b, and 308d, and the oxide semiconductor films 308a, 308b, and 308d are formed of the oxide semiconductor films 308a, 308b, and 308d. As a result, oxygen vacancies in the oxide semiconductor films 308a and 308b can be reduced. b, 308d, the amount of oxygen vacancies can be further reduced.

[0155] In addition, when the insulating films 311a and 311b contain water, hydrogen, etc., the insulating films 311a and 311b are used to block the water, hydrogen, etc. Then, the insulating film 313 having a function of bonding is formed and heat treatment is performed to form the insulating film 311a. Water, hydrogen, and the like contained in the oxide semiconductor film 311b move to the oxide semiconductor films 308a, 308b, and 308d. However, defects are generated in the oxide semiconductor films 308a, 308b, and 308d. By this heating, water, hydrogen, etc. contained in the insulating films 311a and 311b can be desorbed. It is possible to reduce the variation in the electrical characteristics of the transistors and to reduce the variation in the threshold voltage. can be suppressed.

[0156] In addition, by forming the insulating film 311b on the insulating film 311a while heating, an oxide semiconductor Oxygen is transferred to the oxide semiconductor films 308a, 308b, and 308d. b, 308d, it is possible to reduce the oxygen vacancies contained in the steel without the heat treatment. It's not necessary.

[0157] In addition, when the conductive films 310a, 310b, 310c, 310d, and 310e are formed, The oxide semiconductor films 308a, 308b, and 308d are damaged by the etching of the film. The back channels (oxide semiconductor films 308a and 308b) of the oxide semiconductor films 308a and 308b are In 08b, the surface facing the conductive films 304a and 304c functioning as gate electrodes is However, oxygen vacancies occur on the opposite surface of the insulating film 311b. By using an oxide insulating film containing more oxygen than silicon, The oxygen vacancies on the channel side can be repaired. The defects in 308a and 308b can be reduced, improving the reliability of the transistor. It can be raised.

[0158] Note that this heat treatment may be performed after the opening 362, which will be formed later, is formed.

[0159] Next, the insulating film 311 is processed into a desired region to form an insulating film 312 and an opening 362. The insulating film 312 and the opening 362 are formed in a desired region by forming a fourth pattern. A mask is formed by etching, and the area not covered by the mask is etched. It can be formed by the above (see FIG. 6(A)).

[0160] Note that the opening 362 is formed so that the surface of the oxide semiconductor film 308d is exposed. The opening 362 can be formed by, for example, dry etching. However, the method for forming the opening 362 is not limited to this, and may be a wet etching method or the like. Alternatively, a combination of dry etching and wet etching may be used.

[0161] Next, the insulating film 313 is formed over the insulating film 312 and the oxide semiconductor film 308d (FIG. 6( See B).

[0162] The insulating film 313 is made of a material that is free of impurities from the outside, such as oxygen, hydrogen, water, alkali metals, It is preferable to use a material that prevents an alkaline earth metal or the like from diffusing into the oxide semiconductor film. , and preferably contains hydrogen, typically an inorganic insulating material containing nitrogen, such as a nitride The insulating film 313 can be formed by, for example, a CVD method or a sputtering method. The film can be formed by using a coating method.

[0163] When the insulating film 313 is formed by plasma CVD or sputtering, the oxide semiconductor The insulating film 313 is exposed to plasma, and oxygen vacancies are generated in the oxide semiconductor film. impurities from the outside, such as water, alkali metals, alkaline earth metals, etc., The membrane is made of a material that prevents hydrogen from diffusing into the body membrane, and it also contains hydrogen. When hydrogen in the film 313 diffuses into the oxide semiconductor film 308d, In the oxide semiconductor film, hydrogen is bonded to oxygen, and electrons serving as carriers are generated. When hydrogen enters the oxygen vacancies, electrons are generated as carriers. The oxide semiconductor film 308d has high conductivity and becomes the light-transmitting conductive film 308c. .

[0164] In addition, the insulating film 313 is preferably formed at a high temperature in order to enhance blocking properties. For example, the substrate temperature is 100° C. or higher and 400° C. or lower, more preferably 300° C. or higher and 400° C. or lower. In addition, when the oxide semiconductor film is formed at a high temperature, the oxide semiconductor film is preferably formed at a high temperature. Oxygen is released from the oxide semiconductors used as 308a and 308b, and the carrier concentration increases. Since a phenomenon in which this occurs can occur, the temperature must be set at a level at which this phenomenon does not occur.

[0165] Next, the insulating film 313 is processed into a desired region to form an insulating film 314 and an opening 364. The insulating film 314 and the openings 364a, 364b, and 364c are formed. b, 364c form a mask by fifth patterning in a desired area, and the mask This can be achieved by etching the areas not covered by the metal (see FIG. 6(C)). .

[0166] The opening 364a is formed so that the surface of the conductive film 304a is exposed. The opening 364b is formed so as to expose the conductive film 310c. The conductive film 310e is formed so as to be exposed.

[0167] The openings 364a, 364b, and 364c can be formed, for example, by dry etching. However, the method for forming the openings 364a, 364b, and 364c may be different. The etching method is not limited to this, and may be a wet etching method or a dry etching method. A formation method in which wet etching is combined may also be used.

[0168] Next, a conductive film 31 is formed on the insulating film 314 so as to cover the openings 364a, 364b, and 364c. 5 (see FIG. 7(A)).

[0169] The conductive film 315 can be formed by, for example, a sputtering method.

[0170] Next, the conductive film 315 is processed into a desired region to form a light-transmitting conductive film 316a, The light-transmitting conductive films 316a and 316b are formed. A mask is formed on the region by a sixth patterning, and the region not covered by the mask is It can be formed by etching (see FIG. 7(B)).

[0171] Next, a planarizing film 317 is formed so as to cover the insulating film 314 and the conductive films 316a and 316b. (See Figure 7(C).)

[0172] The planarization film 317 can be formed by a method such as spin coating, dip coating, slit coating, or ink coating. By forming the planarization film 317 using a wet method such as an ink jet method or a printing method, It is possible to form a planarization film 317 with a flat surface without being affected by the unevenness of the region. The flattening film 317 is formed by using a spin coating method, a dip coating method, a slit coating method, etc. In this case, after the composition is applied, a mask is formed by a seventh patterning in a desired area. The area not covered by the mask is etched to form a planarizing film 317. It is possible.

[0173] Through the above steps, a pixel portion having a transistor and a driver circuit portion are formed on the substrate 302. In the manufacturing process shown in this embodiment, the first to sixth steps or the third steps The first to seventh patternings, i.e., six or seven masks, are used to pattern transistors and capacitors. The elements can be formed simultaneously.

[0174] Note that in this embodiment, hydrogen contained in the insulating film 314 is diffused into the oxide semiconductor film 308d. The oxide semiconductor film 308d was dispersed to increase the conductivity. The oxide semiconductor film 308d is covered with a mask, and impurities, typically hydrogen, boron, or lithium, are introduced into the oxide semiconductor film 308d. Addition of tin, antimony, rare gas elements, alkali metals, alkaline earth metals, etc. The oxide semiconductor film 308d may be doped with hydrogen or boron to increase the conductivity. The method of adding elements such as phosphorus, tin, antimony, and rare gas elements is ion doping. On the other hand, when an alkali metal or an alkaline earth metal is added to the oxide semiconductor film 308d, As a method for adding a metal or the like, a method of exposing a solution containing the impurity to the oxide semiconductor film 308d is used. There is a law.

[0175] Various films such as the oxide semiconductor film and the inorganic insulating film disclosed in the above embodiments can be formed by sputtering. and plasma CVD (Chemical Vapor Deposition) method. However, it may be formed by other methods, for example, a thermal CVD method. As an example of the method, MOCVD (Metal Organic Chemical Vapor Deposition) Deposition method and ALD (Atomic Layer Deposition) method n) method may be used.

[0176] Thermal CVD is a film formation method that does not use plasma, so defects can occur due to plasma damage. This has the advantage that no additional steps are required.

[0177] In the thermal CVD method, the source gas and the oxidizing agent are fed into the chamber at the same time, and the chamber is heated to atmospheric pressure. Alternatively, a film is formed by reacting the reactants near or on the substrate under reduced pressure and depositing the reactants on the substrate. You may go.

[0178] In addition, in the ALD method, the pressure inside the chamber is set at atmospheric pressure or reduced pressure, and the source gas for the reaction is The gases may be introduced into the chamber in sequence, and the film may be formed by repeating the gas introduction sequence. For example, by switching each switching valve (also called high-speed valve), two or more types of The above source gases are supplied to the chamber in order, and the first source gas is supplied to the chamber in order to prevent the mixture of the source gases. An inert gas (such as argon or nitrogen) is introduced simultaneously with or after the raw material gas. The second source gas is introduced. When an inert gas is introduced at the same time, the inert gas is It acts as a carrier gas, and even if an inert gas is introduced at the same time as the second source gas is introduced, In addition, the first source gas is discharged by evacuation instead of introducing an inert gas. After that, a second source gas may be introduced. The first source gas is adsorbed on the surface of the substrate to form a first layer. The first layer is deposited on the second layer by reacting with the second source gas introduced later. This process is repeated several times while controlling the gas introduction sequence until the desired thickness is reached. By doing so, a thin film with excellent step coverage can be formed. The thickness of the thin film is determined by the gas introduction. The thickness can be precisely adjusted by changing the number of times the sequence is repeated. This is suitable for producing miniature FETs.

[0179] Thermal CVD methods such as MOCVD and ALD have been disclosed in the embodiments described above. It is possible to form various films such as oxide semiconductor films and inorganic insulating films. For example, In-Ga In the case of forming a -Zn-O film, trimethylindium, trimethylgallium, and dimethyl Methyl zinc is used. The chemical formula for trimethylindium is In(CH3)3. The chemical formula for trimethylgallium is Ga(CH3)3. Dimethylzinc The chemical formula is Zn(CH3)2. In addition, the combination is not limited to these, and trime Triethylgallium (chemical formula Ga(C2H5)3) can also be used instead of triethylgallium. Diethylzinc (chemical formula Zn(C2H5)2) can also be used instead of dimethylzinc. can.

[0180] For example, when forming a hafnium oxide film using a film forming apparatus that uses ALD, the solvent and a liquid containing a hafnium precursor compound (hafnium alkoxide solution, typically tetra The raw material gas is vaporized with tetramethyl tert-butyl amide hafnium (TDMAH) as an oxidizing agent. Two types of gases are used: tetrakisdimethylamidohafnium (TDA) and ozone (O3). The chemical formula is Hf[N(CH3)2]4. Other material liquids include tetrakis(ethoxycarbonyl) (ethylmethylamido) hafnium.

[0181] For example, when forming an aluminum oxide film using an ALD deposition system, A liquid containing a catalyst and an aluminum precursor compound (e.g., trimethylaluminum (TMA)) is added. Two types of gases are used: vaporized source gas and H2O as an oxidizing agent. The chemical formula for aluminum is Al(CH3)3. Other liquid materials include Tris( Dimethylamido)aluminum, triisobutylaluminum, aluminum tris(2 ,2,6,6-tetramethyl-3,5-heptanedionate).

[0182] For example, when forming a silicon oxide film using a deposition system that uses ALD, Chlorodisilane is adsorbed onto the surface to be coated, the chlorine contained in the adsorbed matter is removed, and the oxidizing gas (O 2. Nitrous oxide (NO) radicals are supplied to react with the adsorbed material.

[0183] For example, an oxide semiconductor film, such as In-Ga-Zn- When forming an O film, In(CH3)3 gas and O3 gas are introduced in sequence. Then, Ga(CH3)3 gas and O3 gas are introduced simultaneously to form a GaO layer. Then, Zn(CH3)2 gas and O3 gas are introduced simultaneously to form a ZnO layer. The order of these layers is not limited to this example. A mixed compound layer such as an aO layer, an In-Zn-O layer, or a Ga-Zn-O layer may be formed. In addition, instead of O3 gas, H2O gas obtained by bubbling with an inert gas such as Ar was used. However, it is preferable to use O3 gas that does not contain H. In(CH3)3 gas is also used. Alternatively, In(C2H5)3 gas may be used. Ga(C2H5)3 gas may be used instead of In(CH3)3 gas. Alternatively, n(C2H5)3 gas may be used, or Zn(CH3)2 gas may be used.

[0184] Next, the element portion provided on the substrate 342 provided opposite the substrate 302 will be described below. Here, the element portion provided on the substrate 342 is a substrate 342. and the alignment film 352.

[0185] First, a substrate 342 is prepared. The substrate 342 is made of the same material as that of the substrate 302. Next, a light-shielding film 344 and a colored film 346 are formed on the substrate 342 (FIG. 8(A) )reference).

[0186] The light-shielding film 344 and the colored film 346 are formed of various materials by a printing method, an ink-jet method, They are formed at desired positions by an etching method using photolithography technology.

[0187] Next, an insulating film 348 is formed on the light-shielding film 344 and the colored film 346 (see FIG. 8(B)). ).

[0188] The insulating film 348 is made of an organic insulating material such as an acrylic resin, an epoxy resin, or a polyimide. By forming the insulating film 348, for example, the colored film 34 It is possible to prevent impurities contained in the liquid crystal layer 6 from diffusing to the liquid crystal layer 320 side. However, the insulating film 348 is not necessarily required, and a structure in which the insulating film 348 is not formed may be used. Good too.

[0189] Next, a conductive film 350 is formed over the insulating film 348 (see FIG. 8C). For this purpose, the materials shown in the conductive films 316a and 316b can be used.

[0190] Through the above steps, the structure formed on the substrate 342 can be formed.

[0191] Next, the insulating film 31 formed on the substrate 302 and the substrate 342, more specifically, on the substrate 302, 4. The conductive films 316a and 316b having light transmitting properties and the conductive film 35 formed on the substrate 342 0, an alignment film 318 and an alignment film 352 are formed. The film can be formed by using a rubbing method, a photo-alignment method, or the like. A liquid crystal layer 320 is formed between the substrate 342 and the liquid crystal layer 320. or by bonding the substrate 302 and the substrate 342 together and then using the capillary phenomenon. An injection method for injecting liquid crystal can be used.

[0192] Through the above steps, the liquid crystal display device shown in FIG. 3 can be manufactured.

[0193] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do.

[0194] <Variation 1> A modification of the planarization film 317 in the first embodiment will be described with reference to FIG. 3, AB is a cross-sectional view of the drive circuit portion, and CD is a cross-sectional view of the pixel portion.

[0195] FIG. 9 shows a planarization film 317a that is not provided on the entire substrate 302, and a light-transmitting conductive film 3 3 in that it is provided on the alignment film 316a and 316b. , a region in contact with the planarizing film 317a and a region in contact with the insulating film 314.

[0196] In the pixel portion, the display region is provided with a light-transmitting conductive film 316b which functions as a pixel electrode. Therefore, at least a flat area is formed on the light-transmitting conductive film 316b. By forming the alignment film 317a, it is possible to reduce unevenness in the region where the alignment film 318 is to be formed. As a result, it is possible to reduce display defects caused by poor alignment of liquid crystal molecules.

[0197] Here, a method for manufacturing the liquid crystal display device shown in FIG. 9 will be described with reference to FIGS. I will explain it below.

[0198] As in the first embodiment, the steps of FIG. 4 to FIG. 7(A) are carried out to obtain a semiconductor device as shown in FIG. 10(A). On the substrate 302, conductive films 304a, 304b, and 304c functioning as gate electrodes, The insulating film 305 and the insulating film 306 functioning as gate insulating films, the oxide semiconductor film 308a, 08b, 308d, conductive films 310a, 310b, 310c, 310d, 310e, insulating films 312, an insulating film 314, a conductive film 315, and a planarization film 317 are formed. In the above, the first to fifth patterning processes are performed to form the conductive film 304a. , 304b, 304c, oxide semiconductor films 308a, 308b, 308d, and conductive film 310a , 310b, 310c, 310d, 310e, opening 362, and openings 364a, 36 4b, forming 364c.

[0199] Next, the planarization film 317 is processed into a desired region, so that a planarization film is formed as shown in FIG. The planarizing film 317a is formed. The planarizing film 317a is formed by the following steps. When the photoresist is used, a mask is formed by a sixth patterning in a desired area. The regions not covered by the mask can be etched to form the insulating film. In the case where the flattening film 317a is made of a photosensitive resin, a desired region is subjected to the sixth patterning. Further exposure and development can form a planarizing film 317a.

[0200] Next, the planarizing film 317a is used as a mask to remove the conductive film 315 in the area not covered by the mask. By etching, the conductive films 316a and 316b having light transmitting properties can be formed. Here, the light-transmitting conductive films 316a and 316b and the planarizing film 317a are The patterning for forming the planarization film 317a is not performed separately. Since the conductive films 316a and 316b having light transmitting properties can be formed by turning, Therefore, it is possible to reduce the number of patterning steps. That is, the transistor, the capacitor, and the planarization film 317a are simultaneously formed using six masks. It is possible.

[0201] After FIG. 10(C), a heat treatment is performed, and the end portion is curved as shown in FIG. As a result, the planarization film 317b in the region where the alignment film 318 is to be formed can be formed. The temperature of the heat treatment can be set to 100° C. The heat treatment may be performed at a temperature equal to or lower than the baking temperature of the conductive film 316a and the conductive film 316b having light-transmitting properties. A flattening film 317a having an end located on the substrate 16b may be formed. As shown in the figure, the end of the planarization film is located outside the light-transmitting conductive films 316a and 316b. 317b can be formed.

[0202] <Variation 2> A modified example of a liquid crystal display device using a liquid crystal element in the pixel 301 will be described. A top view of the pixel 301 shown in FIG. 1(B) is shown in FIG. 12. The same configurations as those in the first embodiment and the first modification are omitted. Here, the first modification of the first embodiment is used to function as a pixel electrode. A conductive film and a planarizing film are formed, and this modification can be appropriately applied to the first embodiment. .

[0203] In FIG. 12, the opening 374c is provided inside the opening 372c, which is the same as that shown in FIG. 2 in that an opening 372 is provided instead of the opening 362. The conductive film 310e functions as a pixel electrode in the opening 374c. The light-transmitting conductive film 316b is electrically connected to the light-transmitting conductive film 316b.

[0204] Next, a cross-sectional view taken along the dashed line CD in FIG. 12 is shown in FIG. 13. A cross-sectional view of the drive circuit portion (a top view is omitted) is shown at AB.

[0205] As shown in FIG. 13, the insulating film 306 and the insulating film 312 are provided on the conductive film 304b. 14A) and an opening 374 provided in the insulating film 314. The opening 374a (see FIG. 14(C)) is an opening The opening 374a (see FIG. 14(C)) is located inside the opening 372a (see FIG. 14(A)). In the illustrated example, the conductive film 304b and the light-transmitting conductive film 316a are connected to each other.

[0206] In addition, an opening 372b (FIG. 14(A)) provided in the insulating film 312 is formed on the conductive film 310c. 14C). The opening 374b (see FIG. 14C) is a same as the opening 372b (see FIG. 14A). In the opening 374b (see FIG. 14C), the conductive film 310c and a light-transmitting conductive film 316a are connected thereto.

[0207] In addition, an opening 372c (FIG. 14(A)) provided in the insulating film 312 is formed on the conductive film 310e. 14C). The opening 374c (see FIG. 14C) is a same as the opening 372c (see FIG. 14A). In the opening 374c (see FIG. 14C), the conductive film 310e and a light-transmitting conductive film 316b are connected thereto.

[0208] In addition, an opening 372 provided in the insulating film 312 is formed on the light-transmitting conductive film 308c. (See FIG. 14A.) In the opening 372, the conductive film 308 having light-transmitting properties is The portion c is in contact with the insulating film 314 .

[0209] A connection portion between the conductive film 304b and the light-transmitting conductive film 316a, the conductive film 310c, and the light-transmitting conductive film 316b are The conductive film 310e and the light-transmitting conductive film 316b are connected to each other. The connection parts are covered with an insulating film 305 and / or an insulating film 314. The insulating film 314 and the insulating film 315 are resistant to impurities from the outside, such as water, alkali metals, alkaline earth metals, etc. The insulating film is made of a material that prevents metals and the like from diffusing into the oxide semiconductor film. In addition, the side surfaces of the openings 372a, 372b, 372c, and 372 (see FIG. 14(A)) are insulated. The insulating film 305 and / or the insulating film 314 are covered with the insulating film 305 and / or the insulating film 314. Since an oxide semiconductor film is provided on the side of the gate electrode, impurities from the outside, such as water and alkaline metals, can be prevented. The conductive film 304b, the conductive films 310c and 310e, and the light-transmitting The oxide semiconductor film included in the transistor is This prevents the diffusion of the semiconductor into the semiconductor substrate. This prevents the fluctuation of the electrical characteristics of the transistor. This makes it possible to improve the reliability of the liquid crystal display device.

[0210] A method for manufacturing an element portion provided on a substrate 302 in a liquid crystal display device shown in FIG. This will be explained using Figures 4, 5, 14, and 15.

[0211] As in the first embodiment, a gate electrode is formed on a substrate 302 through the steps shown in FIG. and an insulating film 304a, 304b, and 304c that functions as a gate insulating film. 05, the insulating film 306, the oxide semiconductor films 308a, 308b, and 308d, and the conductive film 310a. , 310b, 310c, 310d, and 310e, and an insulating film 311 are formed. In the above, first to third patterning are performed to form the conductive film 304a. , 304b, 304c, oxide semiconductor films 308a, 308b, 308d, and conductive film 310a , 310b, 310c, 310d, and 310e.

[0212] Thereafter, in the same manner as in the first embodiment, a heat treatment is performed to remove oxygen contained in the insulating film 311b. A part of the oxide semiconductor film is transferred to the oxide semiconductor films 308a and 308b. The amount of oxygen vacancies in the oxide semiconductor film contained in b can be reduced.

[0213] Next, as shown in FIG. 14(A), the insulating film 311 is processed into a desired region to form an insulating film. The film 312 and the openings 372, 372b, and 372c are formed. The insulating film 306, which is a part of the insulating film, is processed into a desired region to form an opening 372a. The insulating film 305, the insulating film 312, and the openings 372, 372a, 372b, and 372c The formation is performed by forming a mask by the fourth patterning in a desired region, and covering the mask. The openings 372, 372a can be formed by etching the areas that are not covered by the insulating film. , 372b, and 372c may be formed by the method of forming the opening 362 shown in the first embodiment. The method can be used.

[0214] In this etching step, at least the opening 372a is formed, so that the subsequent In the etching step using the mask formed in the fifth patterning, etching It is possible to reduce the amount of

[0215] Next, the insulating film 305, the conductive films 310c and 310e, the insulating film 312, and the oxide semiconductor film An insulating film 313 is formed on 308d (see FIG. 14B).

[0216] Next, in the same manner as in the first embodiment, the insulating film 313 is processed into a desired region, so that the insulating film 3 14, and openings 374a, 374b, and 374c are formed. The openings 374a, 374b, and 374c are formed by forming a fifth patterning mask in a desired area. The mask can be formed by forming a mask and then etching the area not covered by the mask. (See Figure 14(C)).

[0217] Next, similarly to the first embodiment, an insulating A conductive film 315 is formed on the conductive film 314. In addition, the conductive film 315 is formed on the conductive film 315 by the method according to the first modification of the first embodiment. The planarization film 317a is formed in the same manner as above (see FIG. 15(A)). When the flattening film 317a is made of a non-photosensitive resin, the sixth pattern is formed in a desired region. forming a mask by etching and then etching the areas not covered by the mask; In addition, when the flattening film 317a is made of a photosensitive resin, A desired region is exposed and developed by the sixth patterning to form a planarizing film 317a. It is possible.

[0218] Next, the planarizing film 317a is used as a mask to remove the conductive film 315 in the area not covered by the mask. By etching, conductive films 316a and 316b having light-transmitting properties are formed (FIG. 15( See B).

[0219] Through the above steps, a pixel portion having a transistor and a driver circuit portion are formed on the substrate 302. In the manufacturing process shown in this embodiment, the first to sixth patterned This means that transistors and capacitors can be formed simultaneously using six masks. do.

[0220] In the case of a process in which the opening 372a is not formed in FIG. 14(A), In the etching process, the insulating film 305, the insulating film 306, the insulating film 312, and the insulating film 31 4 must be etched, which means the amount of etching is greater than for other openings. Therefore, there is variation in the etching process, and in some areas, The opening 374a is not formed, and the conductive film 316a and the conductive film 317b having a light-transmitting property are formed later. However, in this embodiment, the contact failure occurs twice. In order to form the openings 372a and 374a by the etching process, As a result, the yield of liquid crystal display devices is improved. In this embodiment, the opening 372a is used for the description. The mouth 374b and the opening 374c have the same effect.

[0221] In this modification, in the etching process shown in FIG. 14(A), the opening 372a is The insulating film 306 and the insulating film 312 were etched to form the insulating film 306. 305, the insulating film 306, and the insulating film 312 may be etched. As a result, as shown in FIG. In the etching step C), only the insulating film 314 is etched in all the openings. Since the amount of etching is the same, etching defects are further reduced. It is possible.

[0222] <Variation 3> A modified example of a liquid crystal display device using a liquid crystal element in the pixel 301 will be described. In the liquid crystal display device shown in FIG. 13, the light-transmitting conductive film 308c is However, it may be structured so that it is in contact with the insulating film 305. In this case, Since there is no need to provide an opening 362, the conductive films 316a and 316b having light transmitting properties are It is possible to reduce the step on the surface. It is possible to reduce the alignment disorder. In addition, it is possible to manufacture a liquid crystal display device with high contrast. It is possible.

[0223] In such a structure, an insulating film is formed before the oxide semiconductor film 307 is formed in FIG. The film 306 may be selectively etched to expose a part of the insulating film 305 .

[0224] <Modification 4> Here, a modification of the liquid crystal display device shown in the first embodiment will be described with reference to FIGS. In FIG. 16, AB shows a cross-sectional view of the driving circuit section, and CD shows a cross-sectional view of the pixel section. In this example, the first modification shown in the first embodiment is used to function as a pixel electrode. The conductive film and the planarizing film are formed, and the conductive film and the planarizing film are formed as appropriate in the first embodiment, the second modification, and the third modification. , this modified example can be applied.

[0225] The liquid crystal display device shown in FIG. 16 has a channel The difference is that a protection transistor is used.

[0226] In the driver circuit portion, a conductive film 304a functions as a gate electrode, and a gate insulating film The insulating film 305 and the insulating film 306 functioning as a channel region are formed in the oxide semiconductor film 30. 8a, the conductive films 310a and 310b functioning as a source electrode and a drain electrode The transistor 102 is formed between the oxide semiconductor film 308a and the conductive films 310a and 310b. An insulating film 312 that functions as a channel protective film is provided. An insulating film 314 is provided as a protective film on the layers 10b and 310c.

[0227] In the pixel portion, a conductive film 304c functions as a gate electrode, and a gate insulating film The insulating film 305 and the insulating film 306 are formed on the gate insulating film. a conductive film 310 serving as a source electrode and a drain electrode; The oxide semiconductor film 308b and the conductive film 310e constitute the transistor 103. Between 10d and 310e, an insulating film 312 that functions as a channel protective film is provided. In addition, an insulating film 314 is formed over the conductive films 310d and 310e and the light-transmitting conductive film 308c. It is provided as a protective film.

[0228] In addition, a light-transmitting conductive film 316b functioning as a pixel electrode is provided on the insulating film 314. In the opening, the conductive film 310e is connected.

[0229] In addition, a light-transmitting conductive film 308c functioning as one electrode and a dielectric film The insulating film 314 serving as the other electrode and the light-transmitting conductive film 316b serving as the other electrode form a capacitor. The element 105 is formed.

[0230] In the driving circuit section, the conductive film 304a and the conductive film 304c are formed at the same time. 4b and the conductive film 31 The light-transmitting conductive film 310c is formed at the same time as the light-transmitting conductive film 316b. Connected via 6a.

[0231] In this modification, the conductive films 310a, 310b, 310d, and 310e are etched. At this time, the regions of the oxide semiconductor films 308 a and 308 b that become channel regions are formed by insulating film 31 2, the edges forming the conductive films 310a, 310b, 310d, and 310e are By the above-mentioned process, the regions to be the channel regions in the oxide semiconductor films 308a and 308b are Furthermore, the insulating film 312 contains more oxygen than the stoichiometric composition. Therefore, part of the oxygen contained in the insulating film 312 is transferred to the oxide semiconductor films 308a and 308b. The amount of oxygen vacancies contained can be reduced.

[0232] A method for manufacturing an element portion provided on a substrate 302 in a liquid crystal display device shown in FIG. This will be explained using Figures 4, 17, and 18.

[0233] As in the first embodiment, a gate electrode is formed on the substrate 302 through the process shown in FIG. conductive films 304a, 304b, and 304c, an insulating film 305 functioning as a gate insulating film, and An insulating film 306 and oxide semiconductor films 308a, 308b, and 308d are formed. In the process, a first patterning and a second patterning are performed to form a conductive film 304. a, 304b, and 304c, and oxide semiconductor films 308a, 308b, and 308d are formed. .

[0234] Next, as shown in FIG. 17A, the insulating film 311a and the insulating film 3 11b is laminated to form an insulating film 311.

[0235] Thereafter, in the same manner as in the first embodiment, a heat treatment is performed to remove some of the oxygen contained in the insulating film 311. Oxygen is transferred from the oxide semiconductor film 308a to the oxide semiconductor film 308b. The amount of oxygen vacancies in the oxide semiconductor film included in 08b can be reduced.

[0236] Next, as shown in FIG. 17(B), the insulating film 311 is processed into a desired region, and then oxidized. An insulating film 312 is formed on the semiconductor films 308a and 308b. When the insulating film 306 is formed of the same material as the insulating film 312, a part of the insulating film 306 is etched. Only the regions covered with the oxide semiconductor films 308a and 308b remain. The film 306 and the insulating film 312 are formed by forming a mask in a desired area by a third patterning. The mask can be formed by depositing a layer of silicon dioxide on the silicon substrate and then etching the areas not covered by the mask. do.

[0237] Next, a conductive film is formed over the insulating film 305, the insulating film 306, and the oxide semiconductor films 308a and 308b. After the formation, the conductive films 310a, 310b, 310c, and 310d are formed through the same process as in the first embodiment. 10d and 310e are formed (see FIG. 17(C)). , 310c, 310d, and 310e are formed in desired areas by a fourth patterning. The mask is then formed and the area not covered by the mask is etched to form the can be done.

[0238] Next, the insulating film 305, the insulating film 312, the oxide semiconductor film 308d, the conductive films 310a and 31 An insulating film 313 is formed on the layers 310b, 310c, 310d, and 310e (see FIG. 18(A)). .

[0239] Next, similarly to the first embodiment, the insulating film 305 and the insulating film 313 are processed into desired regions. In this way, the insulating film 314 and the openings 384a, 384b, and 384c are formed. The border 314 and the openings 384a, 384b, 384c are arranged to define a fifth pattern in the desired area. A mask is formed by etching, and the area not covered by the mask is etched. It is possible to form (see FIG. 18(B)).

[0240] Next, similarly to the first embodiment, an insulating A conductive film is formed on the film 314. In addition, a flat film is formed on the conductive film in the same manner as in the first modification of the first embodiment. The planarization film 317a is formed by the method described above. When the insulating layer is made of a conductive resin, a mask is formed in a desired area by a sixth patterning process. The regions not covered by the mask can be etched to form the insulating film. When the flattening film 317a is made of a photosensitive resin, a desired region is patterned by a sixth patterning. Then, the planarization film 317a can be formed by exposing and developing the planarization film 317a. By using 317a as a mask, the conductive film in the area not covered by the mask is etched. Light-transmitting conductive films 316a and 316b are formed (see FIG. 18C).

[0241] Through the above steps, a pixel portion having a transistor and a driver circuit portion are formed on the substrate 302. In the manufacturing process shown in this embodiment, the first to sixth patterned This means that transistors and capacitors can be formed simultaneously using six masks. do.

[0242] <Variation 5> Here, modifications of the liquid crystal display device shown in the first embodiment will be described with reference to FIGS. In FIG. 19, AB shows a cross-sectional view of the drive circuit portion, and CD shows a cross-sectional view of the drive circuit portion. A cross-sectional view of a pixel portion is shown. Note that, in this example, the pixel electrode functioning as the pixel electrode is formed by using the first embodiment. A light-transmitting conductive film and a planarizing film are formed, and the same is applied to the first modification of the first embodiment. A light-transmitting conductive film and a planarizing film which function as a pixel electrode can be formed.

[0243] The liquid crystal display device shown in FIG. 19 has an insulating film 3 In the opening 92, the oxide semiconductor film 308a is connected to the conductive films 310a and 310b. However, a difference is that the oxide semiconductor film 308b is connected to the conductive films 310d and 310e. In addition, the insulating film 394 is provided between the insulating film 314 and the light-transmitting conductive film 316b. is different.

[0244] In the driver circuit portion, a conductive film 304a functions as a gate electrode, and a gate insulating film The insulating film 305 and the insulating film 306 functioning as a channel region are formed in the oxide semiconductor film 30. 8a, an insulating film 392 covering the oxide semiconductor film 308a, and an oxide semiconductor film A conductive film 310a that is in contact with the semiconductor film 308a and functions as a source electrode and a drain electrode. The conductive films 310a, 310b, and 310b constitute the transistor 102. On the substrate 10c, an insulating film 312, an insulating film 314, and an insulating film 394 are provided as protective films. is.

[0245] In the pixel portion, a conductive film 304c functions as a gate electrode, and a gate insulating film The insulating film 305 and the insulating film 306 are formed on the gate insulating film. the oxide semiconductor film 308b, the insulating film 392 covering the oxide semiconductor film 308b, and the insulating film 39 The oxide semiconductor film 308b is in contact with the oxide semiconductor film 308b through the opening 2, and the source electrode and the drain electrode are The functioning conductive films 310d and 310e constitute the transistor 103. On the layers 310d and 310e, the insulating films 312, 314, and 394 are provided as protective films. It is set up as such.

[0246] In addition, a light-transmitting conductive film 316b functioning as a pixel electrode is formed between the insulating film 312 and the insulating film 316b. The conductive film 310e is connected to the insulating film 314 through an opening provided in the insulating film 394.

[0247] In addition, a light-transmitting conductive film 308c functioning as one electrode and a dielectric film The insulating film 314 and the insulating film 394 function as the other electrode. The capacitance element 105 is formed by 16b.

[0248] The insulating film 392 is formed of an oxide insulating film because it is in contact with the oxide semiconductor films 308a and 308b. The insulating film 392 is preferably formed using a material similar to that of the insulating film 306. The insulating film 392 can be formed of an oxide insulating material that is permeable to oxygen, similar to the insulating film 312a. As a result, the oxygen contained in the insulating film 312b is The oxide semiconductor film 308a and 308b can be transferred to the oxide semiconductor film 30 It is possible to reduce oxygen vacancies in the oxide semiconductor films 8a and 308b. It is preferable that the number of defects at the interfaces between 308a, 308b and the insulating film 392 is small.

[0249] The insulating film 394 is provided to control the charge capacitance of the capacitor 105. The film 394 can be formed using an oxide insulating film or a nitride insulating film as appropriate. The insulating film 394 is formed by a CVD method (chemical vapor deposition method) using an organic silane gas. By using a thin oxide insulating film, typically a silicon oxide film, it is possible to improve the flatness. Note that the insulating film 314 allows the capacitor 105 to obtain a predetermined charge capacitance. If this is possible, the insulating film 394 does not need to be provided.

[0250] In this modification, the conductive films 310a, 310b, 310d, and 310e are etched. At that time, since the oxide semiconductor films 308 a and 308 b are covered with the insulating film 392, The oxide semiconductor films 10a, 310b, 310d, and 310e are formed by etching. The insulating film 312 has a stoichiometric composition. The insulating film 312 is formed of an oxide insulating film containing more oxygen than the insulating film 312. Part of the oxygen contained in the oxide semiconductor film 308a and 308b is transferred to the oxide semiconductor film 308a and 308b. The amount of oxygen vacancies contained in 308a and 308b can be reduced.

[0251] A method for manufacturing an element portion provided on a substrate 302 in a liquid crystal display device shown in FIG. This will be explained with reference to FIG. 4 and FIG. 20 to FIG.

[0252] As in the first embodiment, a gate electrode is formed on a substrate 302 through the steps shown in FIG. 4(A) to FIG. 4(C). Conductive films 304a, 304b, and 304c function as gate electrodes, and The insulating film 305 and the insulating film 306 are formed of oxide semiconductor films 308a, 308b, and 308d. In this process, a first patterning and a second patterning are performed, The conductive films 304a, 304b, and 304c, the oxide semiconductor films 308a, 308b, and It forms 08d.

[0253] Next, as shown in FIG. 20A, an insulating film 390 is formed. It is formed under the same conditions as those for 305 or the insulating film 311a.

[0254] Next, the insulating film 390 is processed into desired regions to form openings 391, 391a, 391b, and 391c. The insulating film 392 having the insulating layers 391b, 391c, and 391d is formed. Then, a mask is formed in a desired area by a third patterning, and the area not covered by the mask is removed. This can be achieved by etching away the unwanted areas.

[0255] Next, a conductive film is formed over the oxide semiconductor films 308a and 308b and the insulating film 392. Through the same process as in the first embodiment, conductive films 310a, 310b, 310c, 310d, and 10e is formed (see FIG. 20(C)). Note that the conductive films 310a, 310b, and 310c , 310d, 310e are formed by forming a mask by a fourth patterning in a desired area. The region not covered by the mask can be etched away to form the insulating film.

[0256] Next, the insulating film 392 and the conductive films 310a, 310b, 310c, 310d, and 310e are An insulating film 311 is formed thereon (see FIG. 21(A)).

[0257] Next, the insulating film 311 is processed into a desired region to form an insulating film 31 having an opening 393. The insulating film 312 and the opening 393 are formed in a desired region by forming a fifth patterning. The mask is formed by etching the area not covered by the mask. This can be achieved (see FIG. 21(B)).

[0258] Next, as shown in FIG. 21C, the oxide semiconductor film 308d, the insulating film 392, and the opening An insulating film 313 and an insulating film 394 are formed to cover the film 393 .

[0259] The insulating film 394 is formed by a CVD method, a sputtering method, or the like.

[0260] Next, in the same manner as in the first embodiment, the insulating film 305, the insulating film 306, the insulating film 392, and the insulating film 3 12, the insulating film 314 and the insulating film 394 are processed into desired regions to form openings 365a, The openings 365a, 365b, and 365c are formed in the desired area. A mask is formed by a sixth patterning in the area, and the area not covered by the mask is It can be formed by etching (see FIG. 22(A)).

[0261] Next, a conductive film is formed on the conductive film 304b, the conductive films 310c and 310e, and the insulating film 394. After that, the conductive films 316a and 316b are formed through the same process as in the first embodiment (FIG. 22( The conductive films 316a and 316b are formed by forming the seventh pattern in a desired region. A mask is formed by etching, and the area not covered by the mask is etched. , can be formed.

[0262] Next, as shown in FIG. 22(C), a planarizing film 317 is formed in the same manner as in the first embodiment.

[0263] Through the above steps, a pixel portion having a transistor and a driver circuit portion are formed on the substrate 302. In the manufacturing process shown in this embodiment, the first to seventh patterns can be formed. This means that transistors and capacitors can be formed simultaneously using seven masks. do.

[0264] (Embodiment 2) In the present embodiment, the structure is different from that of the first embodiment, and therefore the light leakage that causes the display defect is prevented. A liquid crystal display device capable of reducing this will be described with reference to FIGS.

[0265] In FIG. 23, in the insulating film 312 having the opening 362 (see FIG. 24(C)), The angle between the surface of the light-transmitting conductive film 308c and the side surface of the insulating film 312 (hereinafter, the angle The difference from the first embodiment is that the insulating film 314 and the conductive film 3 This embodiment differs from the first embodiment in that no flattening film is provided on 16a and 316b.

[0266] The conductive film 308c having a light-transmitting property and the insulating film 3 The taper angle of the 12 side surface is set to 5° or more and 45° or less, preferably 5° or more and 30° or less, and By setting the angle to be preferably 10° or more and 20° or less, the insulating film 312 is provided with the insulating film 314 interposed therebetween. The unevenness of the conductive film 316b having light-transmitting properties is reduced. Since the unevenness of the formation area is reduced, the alignment disorder of the liquid crystal molecules contained in the liquid crystal layer 320 is reduced. It is possible.

[0267] In addition, by reducing the unevenness of the region where the alignment film 318 is formed, the thickness of the alignment film 318 is The thickness of the alignment film 318 affects the pretilt angle of the liquid crystal molecules. Therefore, the pretilt angle of the liquid crystal molecules can be controlled by increasing the uniformity of the thickness of the alignment film 318. Typically, when the pretilt angle of the liquid crystal molecules is set to 6° or more, a disclination can be achieved. This makes it difficult for friction to occur.

[0268] For these reasons, in order to reduce the unevenness of the region where the alignment film 318 is formed, a light-transmitting conductive film is used. The taper angle of the side surfaces of the conductive film 308c and the insulating film 312 is set to 5° or more and 45° or less, preferably 5° By setting the angle to be 10° or more and 30° or less, and more preferably 10° or more and 20° or less, the pre-heating of the liquid crystal molecules can be improved. The alignment film 3 is arranged so that the tilt angle is such that disclination is unlikely to occur. 18, and the alignment disorder of the liquid crystal molecules contained in the liquid crystal layer 320 can be reduced. In addition, by reducing the step in the region where the alignment film 318 is formed, light leakage can be reduced. It is possible to reduce

[0269] Here, a method for manufacturing the liquid crystal display device shown in FIG. 23 will be described with reference to FIGS. I will explain it below.

[0270] As in the first embodiment, a gate electrode is formed on a substrate 302 through the steps shown in FIG. Conductive films 304a, 304b, and 304c function as electrodes, and insulating films function as gate insulating films. The insulating film 305 and the insulating film 306, the oxide semiconductor films 308a, 308b, and 308d, and the conductive film 3 10a, 310b, 310c, 310d, and 310e, an insulating film 311 is formed. In this process, first to third patterning are performed to form the conductive film 3 04a, 304b, 304c, oxide semiconductor films 308a, 308b, 308d, conductive film 3 10a, 310b, 310c, 310d, and 310e.

[0271] Next, as shown in FIG. 24(A), a mask 33 is formed in a desired area by a fourth patterning. Form 0.

[0272] Next, a heat treatment is performed to form a mask 330 and an insulating layer 340 as shown in FIG. 24(B). The angle of the surface of the film 311 is reduced, forming a mask 332 with curved sides.

[0273] Next, the insulating film 311 in the area not covered by the mask 332 is etched to form the insulating film 311 shown in FIG. As shown in FIG. 24(C), the taper angle of the side surface is 5° to 45°, preferably 5° or more. The insulating film 312 is formed so that the inclination angle is 30° or less, and more preferably 10° or more and 20° or less. It is preferable to use dry etching for the etching step. In the etching process, the thickness of the mask 332 is gradually reduced, and the area of ​​the mask 332 is As a result, the insulating film 311 is gradually exposed while the etching is performed. It is possible to perform etching by etching, and the taper angle of the side of the insulating film 312 to be formed can be reduced. It is possible.

[0274] Thereafter, in the same manner as in the first embodiment, the insulating film 314, the conductive films 316a and 31 6b, and an alignment film 318 are formed.

[0275] Through the above steps, a pixel portion having a transistor and a driver circuit portion are formed on the substrate 302. In the manufacturing process shown in this embodiment, the first to sixth patterned This means that transistors and capacitors can be formed simultaneously using six masks. do.

[0276] (Embodiment 3) In this embodiment, a liquid crystal display device having the structure of the first and second embodiments will be described. This will be explained with reference to FIG.

[0277] In FIG. 25, in an element portion provided on a substrate 302, a conductive film 3 having a light transmitting property is The angle between the surface of 08c and the side of the insulating film 312 (hereinafter referred to as the taper angle) is small. This is different from the first embodiment. The structure and formation method of 312 can be used appropriately.

[0278] The tapered angle between the surface of the light-transmitting conductive film 308c and the side surface of the insulating film 312 is small. By providing the insulating film 312 on the element portion, the recess in the area to be the display area is formed in the conductive film 316b. As a result, in the planarization film 317 in the vicinity of the display area, Since the influence of the unevenness of the insulating film 312 is mitigated, the flattening film 317 is smaller than that of the first embodiment. As a result, the liquid crystal layer 320 can be prevented from being damaged. It is possible to further reduce the alignment disorder of the crystal molecules. By reducing the step, it is possible to further reduce the light leakage.

[0279] (Embodiment 4) In this embodiment, a modification applicable to the transistors described in Embodiments 1 and 2 will be described. An example of the shape will be explained.

[0280] <Modification 1, Regarding the Undercoat Insulating Film> In the transistors 102 and 103 described in Embodiments 1 and 2, Accordingly, a base insulating film is provided between the substrate 302 and the conductive films 304a, 304b, and 304c. The materials for the base insulating film include silicon oxide, silicon oxynitride, and silicon nitride. Silicon oxide, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide The materials for the base insulating film include silicon nitride and aluminum oxide nitride. , gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, etc. Impurities, typically alkali metals, water, hydrogen, etc., are introduced from the substrate 302 into the oxide semiconductor film 30 8a, 308b can be suppressed.

[0281] The base insulating film can be formed by a sputtering method, a CVD method, or the like.

[0282] <Modification 2: Gate insulating film> In the transistors 102 and 103 described in Embodiments 1 and 2, In this case, the laminated structure of the insulating film that functions as the gate insulating film can be modified. , the transistor 103 will be used for explanation.

[0283] As shown in FIG. 26A, the gate insulating film is made up of an insulating film 305 and an insulating film 306. The layers are stacked in order starting from the conductive film 304c that functions as an electrode.

[0284] By providing the insulating film 305 made of a nitride insulating film on the conductive film 304c side, the conductive film 3 Impurities from 04c, typically hydrogen, nitrogen, alkali metals, or alkaline earth metals etc. can be prevented from moving to the oxide semiconductor film 308b.

[0285] In addition, the insulating film 306 formed of an oxide insulating film is provided on the oxide semiconductor film 308b side. As a result, the density of defect states at the interface between the insulating film 306 and the oxide semiconductor film 308b can be reduced. As a result, a transistor with little deterioration in electrical characteristics can be obtained. Note that the insulating film 306 is formed of a material having a stoichiometric composition containing oxygen, similar to the insulating film 312b. When the oxide insulating film containing as much oxygen as possible is used, the insulating film 306 and the oxide semiconductor film This is more preferable because it is possible to further reduce the defect state density at the 308b interface. It is.

[0286] As shown in FIG. 26A, the insulating film 305 is a nitride insulating film 305 having few defects. a and a nitride insulating film 305b having high hydrogen blocking properties are arranged in this order from the conductive film 304c side. The insulating film 305 may be a nitride insulating film having few defects. By providing the film 305a, the dielectric strength of the gate insulating film can be improved. By providing the nitride insulating film 305b having a high hydrogen blocking property, the conductive film 304c and the nitride insulating film 305b can be prevented from being damaged. Therefore, hydrogen can be prevented from moving from the oxide semiconductor film 305a to the oxide semiconductor film 308b. Cut.

[0287] An example of a method for forming the nitride insulating films 305a and 305b shown in FIG. 26(A) will be described below. First, a mixture of silane, nitrogen, and ammonia was used as the source gas for plasma C. A silicon nitride film with few defects is formed as the nitride insulating film 305a by the VD method. The raw material gas is switched to a mixture of silane and nitrogen, and the hydrogen concentration is low. A silicon nitride film capable of blocking is formed as a nitride insulating film 305b. By using this method, it is possible to obtain a nitride having few defects and having a blocking property against hydrogen. A gate insulating film can be formed by stacking insulating films.

[0288] Alternatively, as shown in FIG. 26B, the insulating film 305 has a high impurity blocking property. The nitride insulating film 305c, the nitride insulating film 305a having few defects, and the hydrogen blocking property The nitride insulating film 305b and the conductive film 304c are laminated in this order. The insulating film 305 is a nitride insulating film 305c having high impurity blocking properties. By providing the conductive film 304c, impurities, typically hydrogen, nitrogen, alkali metals, etc., can be prevented from being generated. Alternatively, the alkaline earth metal or the like can be prevented from moving to the oxide semiconductor film 308b. do.

[0289] An example of a method for producing the nitride insulating films 305a, 305b, and 305c shown in FIG. 26(B) will be described below. First, a mixture of silane, nitrogen, and ammonia was used as the source gas. The plasma CVD method is used to create a silicon nitride film with high impurity blocking properties, called a nitride insulating film. Next, the flow rate of ammonia is increased to form a nitride film with fewer defects. Next, the source gas is changed to silane and nitride. By switching to a pure mixed gas, hydrogen concentration is low and hydrogen can be blocked. A silicon nitride film is formed as the nitride insulating film 305b. An insulating film 3 in which a nitride insulating film having few defects and a blocking property against impurities is laminated 05 can be formed.

[0290] <Modification 3: Pair of Electrodes> In the liquid crystal display devices described in Embodiments 1 and 2, the conductive films 310a and 310 Materials that can be used for 310b, 310c, 310d, and 310e will be described. Now, the transistor 103 will be used for explanation.

[0291] The conductive film 310d provided in the transistor 103 described in Embodiments 1 and 2 , 310e, tungsten, titanium, aluminum, copper, molybdenum, chromium, It is preferable to use a conductive material that easily bonds with oxygen, such as tantalum or an alloy. As a result, oxygen contained in the oxide semiconductor film 308b and oxygen contained in the conductive films 310d and 310e The conductive material is bonded to the oxide semiconductor film 308b, and a region with many oxygen vacancies is formed in the oxide semiconductor film 308b. In addition, a conductive material for forming the conductive films 310d and 310e in the oxide semiconductor film 308b is As a result, as shown in Figure 27, the oxide semiconductor In the conductive film 308b, a low resistance region 3 is formed in the vicinity of the region in contact with the conductive films 310d and 310e. The low resistance regions 334a and 334b ​​are formed by the conductive films 310d and 310c. It is in contact with 10e and is formed between the insulating film 306 and the conductive films 310d and 310e. Since the resistive regions 334a and 334b ​​have high conductivity, the oxide semiconductor film 308b and the conductive film 31 It is possible to reduce the contact resistance with 0d and 310e, and increase the on-current of the transistor. It is possible to increase the size.

[0292] The conductive films 310d and 310e are made of the conductive material that easily bonds with oxygen and titanium nitride. Alternatively, a laminated structure may be formed with a conductive material that does not easily bond with oxygen, such as tantalum nitride or ruthenium. By forming such a laminated structure, the boundaries between the conductive films 310d and 310e and the insulating film 312a are On the other hand, it is possible to prevent the conductive films 310d and 310e from being oxidized. , it is possible to suppress the increase in resistance of 310e.

[0293] <Modification 4: Oxide Semiconductor Film> In the manufacturing method of the transistors 102 and 103 described in Embodiments 1 and 2, After forming the conductive films 310a, 310b, 310d, and 310e, the oxide semiconductor film 308 The oxide semiconductor films 308a and 308b are exposed to plasma generated in an oxidizing atmosphere. Oxygen can be supplied to 8b. The oxidizing atmosphere can be oxygen, ozone, or nitrous oxide. In the plasma treatment, the atmosphere is made of nitrogen dioxide, etc. The oxide semiconductor films 308a and 308b are exposed to plasma generated without applying a bias. As a result, the oxide semiconductor films 308a and 308b are not damaged, and The oxygen contained in the oxide semiconductor films 308a and 308b can be supplied. In addition, the amount of defects can be reduced by the etching treatment. Removal of impurities remaining on the surface of 308b, such as halogens such as fluorine and chlorine, etc. can be done.

[0294] <Modification 5: Regarding Oxide Semiconductor Film> In the transistors 102 and 103 described in Embodiments 1 and 2, In this embodiment, the transistor 103 is I will use this to explain.

[0295] In the transistor illustrated in FIG. 28, an oxide film is formed between the insulating film 306 and the conductive films 310d and 310e. A multi-layer film 336 including a nitride semiconductor film is formed.

[0296] The multilayer film 336 includes an oxide semiconductor film 336a and an oxide film 336b. The film 336 has a two-layer structure. A part of the oxide semiconductor film 336a serves as a channel region. In addition, an insulating film 312a is formed in contact with the multilayer film 336, and the insulating film 312a functions as an insulating film. An oxide film 336b is formed in contact with the oxide semiconductor film 312a. An oxide film 336b is provided between 36a and the insulating film 312a.

[0297] The oxide film 336b is composed of one or more elements constituting the oxide semiconductor film 336a. The oxide film 336b is an oxide film containing one of the elements constituting the oxide semiconductor film 336a. Since the oxide semiconductor film 336a and the oxide film 336b are formed as described above, Therefore, the movement of carriers is not hindered at the interface. This increases the field effect mobility of the transistor.

[0298] The oxide film 336b is typically made of In-Ga oxide, In-Zn oxide, In-Mn oxide, or In-Zn-Zn oxide. Zn oxide (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd or Hf), In addition, the energy of the bottom of the conduction band is closer to the vacuum level than that of the oxide semiconductor film 336a. The energy of the bottom of the conduction band of the oxide film 336b and the conduction band of the oxide semiconductor film 336a are The difference in energy from the lower end of the band is 0.05 eV or more, 0.07 eV or more, or 0.1 eV or more , or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0. That is, the electron affinity of the oxide film 336b and the electron affinity of the oxide semiconductor film 336a are The difference from the electron affinity is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0 .15eV or more and 2eV or less, 1eV or less, 0.5eV or less, or 0.4eV or less It is.

[0299] The oxide film 336b contains In, and thus the carrier mobility (electron mobility) is increased. This is preferable.

[0300] The oxide film 336b is made of Al, Ti, Ga, Y, Zr, La, Ce, Nd or Hf. By having a higher atomic ratio of In than In, the following effects may be obtained. (1) Oxide (2) Enlarging the energy gap of the oxide film 336b. (3) To block impurities from the outside. (4) Compared to the oxide semiconductor film 336a (5) Al, Ti, Ga, Y, Zr, La, Ce, Nd or Hf is a metal element with strong bonding strength with oxygen, so it is easily mixed with Al, Ti, Ga, Y, Zr, La, By having Ce, Nd or Hf in a higher atomic ratio than In, oxygen vacancies are less likely to occur. do.

[0301] When the oxide film 336b is an In-M-Zn oxide, the atomic ratio of In to M is In When the sum of In and M is 100 atomic %, In is preferably 50 atomic %. %, M is 50 atomic % or more, and more preferably, In is less than 25 atomic %. and M is 75 atomic% or more.

[0302] The oxide semiconductor film 336a and the oxide film 336b are made of In-M-Zn oxide (M is an In-Zn oxide). In the case of Al, Ti, Ga, Y, Zr, La, Ce, Nd or Hf, the oxide semiconductor film 3 Compared with 36a, the M (Al, Ti, Ga, Y, Zr, La , Ce, Nd, or Hf) is in a large atomic ratio. At least 1.5 times, preferably at least 2 times, more preferably at least 2 times, more preferably at least 1.5 ...2 times, more preferably at least 2 times, more preferably at least 2 times, more preferably at least 2 times, more preferably This is an atomic ratio that is more than three times higher.

[0303] The oxide semiconductor film 336a and the oxide film 336b are made of In-M-Zn oxide (M is an In-Zn oxide). Al, Ti, Ga, Y, Zr, La, Ce, Nd or Hf), oxide film 336b The oxide semiconductor film 336a is In:M If Zn=x2:y2:z2 [atomic ratio], then y1 / x1 is greater than y2 / x2. Preferably, y1 / x1 is 1.5 times or more larger than y2 / x2. More preferably, y1 / x1 is more than twice as large as y2 / x2, and more preferably, y1 / x1 is more than y2 / x 2. At this time, in the oxide film 336b, y1 is equal to or larger than x1. This is preferable because a transistor including the oxide semiconductor film can have stable electrical characteristics. However, when y1 is three times or more of x1, Since the field effect mobility is decreased, y1 is preferably less than three times x1.

[0304] For example, the oxide semiconductor film 336a may have a composition of In:Ga:Zn=1:1:1 or 3:1: In-Ga-Zn oxide having an atomic ratio of 1:2 can be used. In:Ga:Zn=1:3:n (n is an integer between 2 and 8), 1:6:m (m is 2 or an integer of 1:9:6 or less), or In-Ga-Zn oxide with an atomic ratio of 1:9:6 Note that the atomic ratio of the oxide semiconductor film 336a to the oxide film 336b can be The above atomic ratios are subject to a margin of error of ±20%. In the conductive film 336a, when the ratio of Zn is equal to or higher than Ga, CAAC-OS is easily formed. Very preferable.

[0305] The oxide film 336b is an oxide semiconductor film when the insulating film 312b is formed later. It also functions as a membrane to mitigate damage to 336a.

[0306] The thickness of the oxide film 336b is 3 nm to 100 nm, preferably 3 nm to 50 nm. m or less.

[0307] Similarly to the oxide semiconductor film 336a, the oxide film 336b has a non-single crystal structure, for example. The non-single crystal structure may be, for example, a CAAC-OS (C Axis Aligned Array) structure, which will be described later. ed Crystalline Oxide Semiconductor), polycrystalline structure The structure includes a microcrystalline structure, which will be described later, or an amorphous structure.

[0308] Note that the oxide semiconductor film 336a and the oxide film 336b form an amorphous region and a microcrystalline region. It has two or more types of crystal structure region, polycrystalline structure region, CAAC-OS region, and single crystal structure region. The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, and , a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. In addition, the mixed film may have regions of, for example, an amorphous structure and a microcrystalline structure. , a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. The material may have a laminated structure having a plurality of layers.

[0309] Here, the oxide film 336b is provided between the oxide semiconductor film 336a and the insulating film 312a. Therefore, impurities and Even if a trap state is formed due to a defect, the trap state and the oxide semiconductor film 336a As a result, electrons flowing through the oxide semiconductor film 336a are transported to the trap state. This makes it possible to increase the on-state current of the transistor and also to reduce the electric field In addition, when an electron is captured in a trap level, the electron This results in a negative fixed charge. As a result, the threshold voltage of the transistor fluctuates. However, because there is a gap between the oxide semiconductor film 336a and the trap states, Therefore, it is possible to reduce the capture of electrons in the trap level, and the fluctuation of the threshold voltage is reduced. can be reduced.

[0310] In addition, the oxide film 336b can block impurities from the outside. In addition, the amount of impurities that moves from the oxide semiconductor film 336a to the oxide semiconductor film 336a can be reduced. For these reasons, the oxide semiconductor film 336a is not easily formed with oxygen vacancies. It is possible to reduce the impurity concentration and the amount of oxygen vacancies in the silicon substrate.

[0311] Note that the oxide semiconductor film 336a and the oxide film 336b are not simply stacked. Continuous junctions (here, specifically, structures in which the energy at the bottom of the conduction band changes continuously between each film) In other words, trap centers and recombination centers are formed at the interfaces of each film. The layer structure is designed so that there are no impurities that would form defect levels like the center. Impurities are present between the stacked oxide semiconductor film 336a and the stacked oxide film 336b. When this happens, the continuity of the energy band is lost, and carriers are trapped or recombined at the interface. They combine and disappear.

[0312] To form continuous junctions, a multi-chamber deposition system equipped with a load lock chamber is required. Each film is laminated in succession using a sputtering device without exposing it to the air. Each chamber in the sputtering apparatus is required for the oxide semiconductor film. In order to remove impurities such as water as much as possible, an adsorption type vacuum pump such as a cryopump is used. High vacuum pump (5×10 -7 Pa~1×10 -4 It is preferable to use a temperature of up to about 10 Pa. Alternatively, a turbo molecular pump and cold trap can be combined to separate the chamber from the exhaust system. It is preferable to prevent the backflow of gases into the bar, especially gases containing carbon or hydrogen. stomach.

[0313] In FIG. 28, the multilayer film 336 is made up of an oxide semiconductor film 336a and an oxide film 336b. However, an oxide film 3 is further provided between the insulating film 306 and the oxide semiconductor film 336a. In this case, the insulating film 306 and the oxide semiconductor film 307 may be provided as a three-layer structure. The thickness of the oxide film provided between the conductive films 336a is preferably smaller than that of the oxide semiconductor film 336a. The thickness of the oxide film is preferably 1 nm or more and 5 nm or less, more preferably 1 nm or more and 3 nm or less. This makes it possible to reduce the amount of variation in the threshold voltage of the transistor.

[0314] <Modification 6: Oxide Semiconductor Film> In the fifth modification, the structure of the multilayer film including the oxide semiconductor film can be modified as appropriate. Here, the transistor 103 is used for description.

[0315] As shown in FIG. 29, the insulating film 306 and the insulating film 312a are provided with an oxide semiconductor film between them. A multi-layer film 336 is formed.

[0316] The multilayer film 336 is an oxide film formed between the insulating film 306 and the conductive films 310d and 310e. A semiconductor film 336a and an oxide semiconductor film 336b are formed over the conductive films 310d and 310e. In addition, part of the oxide semiconductor film 336a is a channel region. In addition, an insulating film 312a is formed so as to contact the multilayer film 336. An oxide film 336b is formed in contact with the insulating film 312a. An oxide film 336b is provided between the conductor film 336a and the insulating film 312a.

[0317] In the transistor 103 shown in this modification, the conductive films 310d and 310e are formed on the oxide semiconductor film 3. Since the oxide semiconductor film 36a is in contact with the oxide semiconductor film 36b, the oxide semiconductor film 36a is in contact with the oxide semiconductor film 36b. The contact resistance between the conductive films 310d and 310e and the transistor 336a is low, and the on-current is improved. It is Sta.

[0318] In the transistor 103 shown in this modification, the conductive films 310d and 310e are oxide semiconductors. Since the oxide semiconductor film 336a is in contact with the conductive film 310d, 310 The oxide film 336b can be thickened without increasing the contact resistance with the electrode 336e. By doing so, plasma damage during the formation of the insulating film 312b or the insulating films 312a and 312b are prevented. The trap level generated by the inclusion of a constituent element of 12b or the like is formed between the oxide semiconductor film 336a and the oxide In other words, the formation of the ion implantation film 336b in the vicinity of the interface with the ion implantation film 336c can be suppressed. The transistor can improve the on-current and reduce the variation of the threshold voltage at the same time.

[0319] <Modification 7: Transistor structure> In the transistors 102 and 103 described in Embodiments 1 and 2, In this case, a plurality of gate electrodes can be provided that face each other with an oxide semiconductor film interposed therebetween. will be explained using the transistor 103.

[0320] The transistor 103 shown in FIG. 30 includes a conductive film 304c provided over a substrate 302. In addition, the insulating film 305 and the insulating film 306 formed on the substrate 302 and the conductive film 304c are The oxide semiconductor film 3 overlaps with the conductive film 304c with the insulating films 305 and 306 interposed therebetween. The insulating film 308 includes an oxide semiconductor film 308b and conductive films 310d and 310e in contact with the oxide semiconductor film 308b. In addition, an insulating film is formed over the insulating film 306, the oxide semiconductor film 308b, and the conductive films 310d and 310e. The insulating film 312, which is a laminate of the insulating film 312a and the insulating film 312b, and the insulating film 314 are formed. In addition, the insulating film 312 and the insulating film 314 overlap with the oxide semiconductor film 308b. The conductive film 316c is

[0321] The conductive film 304c and the conductive film 316c face each other with the oxide semiconductor film 308b interposed therebetween. The conductive film 304c and the conductive film 316c function as gate electrodes. By forming the insulating film 316a and the conductive film 316b simultaneously, the number of steps can be reduced. This is preferable because it is possible

[0322] The transistor 103 in this modification has a conductive layer facing the oxide semiconductor layer 308b therebetween. The conductive film 304c and the conductive film 316c have different potentials. By applying this voltage, the threshold voltage of the transistor 103 can be controlled.

[0323] In addition, the configuration and method described in this embodiment may be applied to configurations and methods described in other embodiments and examples. and the like.

[0324] (Embodiment 5) In this embodiment, a transistor included in the semiconductor device described in the above embodiment is In the semiconductor film 308, the oxide semiconductor films 308a and 308b, the light-transmitting conductive film 308c, and the An embodiment that can be applied to the layer film 336 will be described. Although this will be described as an example, the oxide film included in the multilayer film can also have a similar structure.

[0325] The oxide semiconductor film is an oxide semiconductor having a single crystal structure (hereinafter referred to as a single crystal oxide semiconductor). , a polycrystalline oxide semiconductor (hereinafter referred to as a polycrystalline oxide semiconductor), oxide semiconductors having an amorphous structure (hereinafter referred to as microcrystalline oxide semiconductors) and amorphous oxide semiconductors having an amorphous structure (hereinafter referred to as The oxide semiconductor film may be formed of one or more of the following: The oxide semiconductor film may be made of an amorphous oxide semiconductor. The oxide semiconductor may be composed of a single crystal oxide semiconductor having a crystal grain. oxide semiconductor, CAAC-OS, polycrystalline oxide semiconductor, microcrystalline oxide semiconductor, and amorphous oxide semiconductor We will explain about this.

[0326] <Single crystal oxide semiconductor> For example, a single crystal oxide semiconductor has a low impurity concentration and a low density of defect states (oxygen vacancies). Therefore, the carrier density can be reduced. The transistors used in the channel region rarely have normally-on electrical characteristics. In addition, since the density of defect states in a single crystal oxide semiconductor is low, the density of trap states is also low. Therefore, a transistor using a single crystal oxide semiconductor for a channel region may In this case, the change in electrical characteristics may be small, resulting in a highly reliable transistor.

[0327] <caac-os> CAAC-OS is a type of oxide semiconductor film that has multiple crystal parts. The crystal part is so large that it fits inside a cube with one side less than 100 nm. The crystal parts contained in S are contained within a cube with one side less than 10 nm, less than 5 nm, or less than 3 nm. The CAAC-OS has a smaller defect level than the microcrystalline oxide semiconductor film. It has the characteristic of low density. CAAC-OS is explained in detail below.

[0328] CAAC-OS was analyzed using a transmission electron microscope (TEM). When observed under a quartz microscope, clear boundaries between the crystals were observed. It is difficult to confirm the grain boundary. It can be said that the AAC-OS is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0329] The CAAC-OS was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation ) It can be confirmed that the metal atoms are arranged in layers in the crystal part. Each layer is formed by reflecting the unevenness of the surface on which the CAAC-OS film is to be formed (also called the surface on which the film is to be formed) or the upper surface. The shape is a reflection of the CAAC-OS and is arranged parallel to the surface on which the CAAC-OS is formed or the upper surface.

[0330] On the other hand, the CAAC-OS was observed by TEM from a direction roughly perpendicular to the sample surface (planar TEM). When observed, it was found that the metal atoms in the crystals were arranged in triangular or hexagonal shapes. However, there is no regularity in the arrangement of metal atoms between different crystal parts. .

[0331] Cross-sectional and planar TEM observations revealed that the crystals of CAAC-OS have an orientation. It can be seen that.

[0332] X-ray diffraction (XRD) was used for CAAC-OS. For example, the structure of CAAC-OS with InGaZnO4 crystals was analyzed using the In the out-of-plane analysis, a peak appears at a diffraction angle (2θ) of approximately 31°. This peak is often attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the CAAC-OS crystal has a c-axis orientation, and the c-axis is approximately perpendicular to the surface on which the CAAC-OS is formed or the upper surface. It can be seen that it is facing the right direction.

[0333] On the other hand, in-plane X-ray irradiation is performed on CAAC-OS in which X-rays are incident from a direction approximately perpendicular to the c-axis. In the analysis by the ane method, a peak may appear at 2θ around 56°. This peak is This is attributed to the (110) plane of the InGaZnO4 crystal. For a semiconductor, 2θ is fixed at around 56°, and the normal vector of the sample surface is set as the axis (φ axis). When the sample is rotated and analyzed (φ scan), the crystal plane equivalent to the (110) plane is obtained. In contrast, in the case of CAAC-OS, 2θ is set at 56°. Even when φ is fixed in the vicinity and scanned, no clear peak appears.

[0334] From the above, it is considered that the orientation of the a-axis and the b-axis is irregular between different crystal parts in CAAC-OS. However, the crystal has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface on which the crystal is formed or the upper surface. Therefore, the layered arrangement confirmed by the cross-sectional TEM observation mentioned above is consistent with the Each layer of metal atoms is a plane parallel to the ab plane of the crystal.

[0335] The crystals were formed when the CAAC-OS was formed or after a crystallization process such as a heat treatment. As described above, the c-axis of the crystal is aligned along the surface on which the CAAC-OS is formed or the top surface. Therefore, for example, the shape of CAAC-OS is When the crystal is changed by etching, the c-axis of the crystal is aligned with the surface on which the CAAC-OS is formed or the top surface. It may not be parallel to the normal vector.

[0336] In addition, the crystallinity in the CAAC-OS may not be uniform. When the crystal part is formed by crystal growth from the vicinity of the top surface of the CAAC-OS, The area may have a higher crystallinity than the area near the surface to be formed. When impurities are added to the OS, the crystallinity of the region to which the impurities are added changes, resulting in partial crystallization. Regions of different crystallinity may also form.

[0337] In addition, the out-of-plane method of CAAC-OS with InGaZnO4 crystals In the analysis by , in addition to the peak at 2θ near 31°, a peak also appeared at 2θ near 36°. The peak at 2θ around 36° may be due to the c-axis orientation in some CAAC-OS. The CAAC-OS has a peak at 2θ of around 31°. It is preferable that the compound has a peak at 2θ of about 36°.

[0338] In addition, for example, in the electron diffraction pattern of CAAC-OS, spots (bright spots) are observed. In particular, electron beams with a beam diameter of 10 nm or less, or 5 nm or less The electron diffraction pattern obtained using the method is called a microelectron diffraction pattern. 1 is an example of an electron microdiffraction pattern of a sample having an AAC-OS. Cut the CAAC-OS film perpendicular to the surface to be formed, and cut it into thin pieces with a thickness of about 40 nm. In addition, the electron beam with a diameter of 1 nm is irradiated from the direction perpendicular to the cut surface of the sample. As shown in FIG. 31, the electron micro diffraction pattern of CAAC-OS shows that the spots are It is known to be measured.

[0339] CAAC-OS can be formed, for example, by reducing the impurity concentration. Here, the impurities are the main impurities of oxide semiconductors, such as hydrogen, carbon, silicon, and transition metal elements. In particular, elements such as silicon are metal elements that make up oxide semiconductors. Therefore, when the element removes oxygen from the oxide semiconductor, the oxygen In addition, iron, nickel, and other elements can disrupt the atomic arrangement of semiconductors and reduce their crystallinity. Heavy metals, argon, carbon dioxide, etc. have large atomic (or molecular) radii, so they are acidic. This can disrupt the atomic arrangement of the oxide semiconductor and reduce the crystallinity of the oxide semiconductor. CAAC-OS is an oxide semiconductor with a low impurity concentration. Impurities present in the semiconductor layer may act as a carrier generation source.

[0340] In the CAAC-OS, the distribution of the crystal parts may not be uniform. In the process of forming C-OS, when crystal growth is performed from the surface side of the oxide semiconductor, The proportion of crystalline parts may be higher near the surface than near the bottom. -When impurities are mixed into the OS, the crystallinity of the crystal part in the region where the impurities are mixed is reduced. It may go down.

[0341] In addition, the CAAC-OS can be formed by, for example, reducing the density of defect states. In an oxide semiconductor, for example, when there is oxygen vacancy, the density of defect states increases. The loss acts as a carrier trap or a carrier generation source by capturing hydrogen. To form a CAAC-OS, for example, oxygen vacancies are introduced into an oxide semiconductor. Therefore, CAAC-OS is an oxide with a low density of defect states. Alternatively, the CAAC-OS is an oxide semiconductor with few oxygen vacancies.

[0342] In CAAC-OS, the constant photocurrent measurement method (CPM) The absorption coefficient derived by the current method is 1×10 -3 / cm or less, good Preferably 1×10 -4 / cm, more preferably less than 5×10 -5 / cm. The absorption coefficient is the energy (depending on the wavelength) corresponding to the localized level caused by oxygen vacancies and impurity contamination. Since the density of defect states in the CAAC-OS is positively correlated with the lattice constant (r / s), the density of defect states in the CAAC-OS is extremely low.

[0343] In addition, the absorption coefficient curve obtained by CPM measurement shows that the arbor due to the tail of the band is By removing the absorption coefficient called the defect tail, the absorption coefficient due to the defect level can be calculated using the following formula: The Urbach tail can be calculated from the This refers to a region in the absorption coefficient curve that has a certain slope, and this slope is called the Urbach Energy It's called ghee.

[0344]

number

[0345] Here, α(E) represents the absorption coefficient at each energy, and α u represents the absorption coefficient according to the Urbach tail.

[0346] In addition, a transistor using CAAC-OS that is highly pure and truly or substantially highly pure and truly has little variation in electrical characteristics due to irradiation with visible light or ultraviolet light.

[0347] <Fabrication method of CAAC-OS> The c-axis of the crystal part included in CAAC-OS aligns in a direction parallel to the normal vector of the surface to be formed of CAAC-OS or the normal vector of the surface. Therefore, depending on the shape of CAAC-OS (the cross-sectional shape of the surface to be formed or the cross-sectional shape of the surface), they may face different directions. Note that the direction of the c-axis of the crystal part is a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface when CAAC-OS is formed. The crystal part is formed by film formation or by performing a crystallization treatment such as heat treatment after film formation.

[0348] Three methods can be cited as the formation method of CAAC-OS.

[0349] The first method is to form an oxide semiconductor film with a film formation temperature of 100°C or higher and 450°C or lower, so as to form crystal parts in which the c-axis of the crystal parts included in the oxide semiconductor film aligns in a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface.

[0350] The second method is to perform a heat treatment at 200°C or higher and 700°C or lower after forming the oxide semiconductor film with a thin thickness, so as to form crystal parts in which the c-axis of the crystal parts included in the oxide semiconductor film aligns in a direction parallel to the normal vector of the surface to be formed or the normal vector of the surface. ​​​​​​​​

[0351] The third method is to form a thin oxide semiconductor film as a first layer, and then heat the film at 200° C. or higher for 700 Heat treatment at 0.4 °C or less is performed, and then a second oxide semiconductor film is formed. The c-axis of the crystal part contained in the conductive film is aligned with the normal vector of the surface on which it is formed or the normal vector of the surface. This is a method for forming crystal parts that are aligned in parallel directions.

[0352] Here, a method for forming a CAAC-OS using the first method will be described.

[0353] <Target and target preparation method> In addition, the CAAC-OS can be used as a sputtering target for a polycrystalline oxide semiconductor. The sputtering target is used to deposit a thin film. When the ions collide, the crystalline regions in the sputtering target cleave from the ab plane. The sputtered particles are either flat or pellet-shaped with a surface parallel to the ab plane. In this case, the plate-like or pellet-like sputtered particles may become crystalline. By reaching the target surface while maintaining this state, a CAAC-OS film can be formed. .

[0354] In addition, in order to form a CAAC-OS film, the following conditions are preferably applied.

[0355] By reducing the amount of impurities mixed in during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the film formation chamber can be In addition, the impurity concentration in the deposition gas may be reduced. Film formation at -80°C or lower, preferably -100°C or lower, more preferably -120°C or lower Gas is used.

[0356] In addition, by increasing the heating temperature (for example, the substrate heating temperature) of the surface to be formed during film formation, After the sputtering particles reach the target surface, they migrate. The temperature is set to 100° C. or higher and 740° C. or lower, preferably 200° C. or higher and 500° C. or lower. By increasing the temperature of the surface during film formation, plate-shaped or pellet-shaped sputtering particles When the electrons reach the surface on which the electrons are to be formed, migration occurs on the surface on which the electrons are to be formed, and the electrons are sputtered. The flat surface of the oxide particles adheres to the surface on which they are to be formed. The diameter (equivalent circle diameter) of the surface parallel to the ab plane is 1 nm or more and 30 nm or less. Or, the thickness is about 1 nm to 10 nm. The grains may be in the form of hexagonal columns whose hexagonal faces are parallel to the ab plane. The direction perpendicular to the hexagonal faces is the c-axis direction.

[0357] In addition, the sputtering target is sputtered using oxygen cations. Therefore, the plasma damage during film formation can be reduced. When it hits the surface of the ring target, the crystallinity of the sputtering target decreases. It is possible to suppress the crystallization or amorphization.

[0358] In addition, the sputtering target is sputtered using oxygen or argon cations. When the sputtering particles in the form of a plate or pellet are hexagonal columns, The corners of the square faces can be positively charged. By having a charge of 1, the positive charges in a single sputtering particle repel each other, It can maintain a flat or pellet-like shape.

[0359] The corners of the faces of the plate-like or pellet-like sputtered particles have a positive charge. For this reason, it is preferable to use a direct current (DC) power supply. However, RF power sources are not suitable for deposition on large substrates. It is difficult to apply it to a sputtering device. In addition, DC power is more preferable than AC power for the following reasons: A power supply is considered preferred.

[0360] When an AC power source is used, adjacent targets alternate between cathode and anode potentials. If the plate-shaped or pellet-shaped sputtering particles are positively charged, they will By repelling each other, the flat or pellet-like shape can be maintained. However, when an AC power source is used, there will be a moment when no electric field is applied, so The charge on the pellet-shaped sputtering particles disappears, and the Therefore, it is recommended to use a DC power supply rather than an AC power supply. It can be seen that it is preferable to

[0361] In addition, by increasing the oxygen ratio in the deposition gas and optimizing the power, plasma damage during deposition is reduced. The oxygen ratio in the deposition gas is preferably 30% by volume or more, and more preferably 100% by volume or more. Expressed as volume percent.

[0362] As an example of a sputtering target, an In-Ga-Zn compound target is The details are shown below.

[0363] InO X powder, GaO Y Powder, and ZnO Z The powders are mixed in a specified molar ratio and pressurized. Then, it is heated at a temperature between 1000℃ and 1500℃ to produce polycrystalline In-G The target is a Zn-based compound. The pressure treatment is performed while cooling (or cooling naturally). The reaction may be performed while heating or while heating. In addition, X, Y and Z are any positive numbers. Here, the predetermined molar ratio is, for example, InO X powder, GaO Y Powder and ZnO Z powder However, 2:2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3, 3:1:2, 1: The ratio is 3:2, 1:6:4, or 1:9:6. The powder type and the mixture ratio are The ol ratio may be appropriately changed depending on the sputtering target to be produced.

[0364] By using a sputtering target in the above manner, the thickness is uniform and In this way, an oxide semiconductor film with uniform crystal orientation can be formed.

[0365] <Polycrystalline oxide semiconductor> The polycrystalline oxide semiconductor includes a plurality of crystal grains. The following may be present:

[0366] In the case of polycrystalline oxide semiconductors, for example, crystal grains can be confirmed in TEM images. Crystal grains contained in a polycrystalline oxide semiconductor may be, for example, , 2nm to 300nm, 3nm to 100nm, or 5nm to 50nm In addition, polycrystalline oxide semiconductors are often observed with a grain size of 100 nm or less in a TEM image. In some cases, the boundaries between the amorphous parts and the crystal grains, and the boundaries between the crystal grains, can be confirmed. In the case of a polycrystalline oxide semiconductor, for example, grain boundaries may be observed in a TEM image.

[0367] The polycrystalline oxide semiconductor has, for example, a plurality of crystal grains, and the crystal grains have different orientations. In addition, the polycrystalline oxide semiconductor may be analyzed by, for example, an XRD apparatus. When the out-of-plane analysis was performed, a peak was observed near 31° 2θ, which indicates orientation. In addition, a peak showing a plurality of types of orientation may appear. For example, spots may be observed in an electron diffraction pattern.

[0368] A polycrystalline oxide semiconductor has high crystallinity and therefore high electron mobility. Therefore, a transistor using a polycrystalline oxide semiconductor for a channel region has a high current. However, in polycrystalline oxide semiconductors, impurities may segregate at grain boundaries. In addition, the grain boundaries of a polycrystalline oxide semiconductor become defect states. Since the channel region of a polycrystalline oxide semiconductor may be a carrier generation source or a trap state, The transistor using CAAC-OS for the channel region is In all cases, the electrical characteristics may vary significantly, resulting in a transistor with low reliability.

[0369] The polycrystalline oxide semiconductor is formed by a heat treatment at a high temperature or a laser light treatment. can be done.

[0370] <Microcrystalline oxide semiconductor> In the microcrystalline oxide semiconductor film, it is difficult to clearly identify the crystal parts in the TEM observation image. The crystal parts included in the microcrystalline oxide semiconductor film may be 1 nm or more and 100 nm or less in thickness. In particular, the size of the particles is between 1 nm and 10 nm. Nanocrystals (nc) are microcrystals with a diameter of 1 nm or less, or between 1 nm and 3 nm. The oxide semiconductor film having stal is The nc-OS film is called a crystalline oxide semiconductor film. In TEM images, it is sometimes difficult to clearly identify grain boundaries.

[0371] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or less). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts, and therefore no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analysis method. For example, XRD, which uses X-rays with a diameter larger than that of the crystal part, is used for nc-OS films. When structural analysis is performed using the out-of-plane method, the crystal planes are In addition, the peaks shown in the figure are not detected in the nc-OS film because the probe diameter is larger than that in the crystalline region. Electron beam diffraction (also called selected area electron beam diffraction) using an electron beam of 50 nm or more (for example) When the diffraction pattern is changed to nc-OS film, a halo-like diffraction pattern is observed. The probe diameter is close to or smaller than the size of the crystal part (for example, 1 nm to 30 nm). When electron beam diffraction (also called nanobeam electron beam diffraction) is performed using the electron beam shown below, In addition, when the nc-OS film was subjected to nanobeam electron diffraction, a circular pattern was observed. In addition, for the nc-OS film, a bright area (ring-shaped) may be observed. When performing nanobeam electron diffraction, multiple spots may be observed within a ring-shaped region. be.

[0372] Figure 32 shows the nanobeam electron diffraction patterns of the sample with the nc-OS film at different measurement points. In this example, the sample was cut in a direction perpendicular to the surface on which the nc-OS film was formed. The thickness of the slice is reduced to 10 nm or less. The sagittal beam is incident from a direction perpendicular to the cut surface of the sample. When nanobeam electron diffraction is performed on a sample, a diffraction pattern showing the crystal planes is obtained. It was found that no orientation to a specific crystal plane was observed.

[0373] The nc-OS film is an oxide semiconductor film that has higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, the crystal orientation is not regular between different crystal parts. The OS film has a higher density of defect states than the CAAC-OS film.

[0374] Therefore, the nc-OS film may have a higher carrier density than the CAAC-OS film. An oxide semiconductor film having a high carrier density may have high electron mobility. In some cases, a transistor using an nc-OS film has high field-effect mobility. The nc-OS film has a higher defect density than the CAAC-OS film, which leads to carrier transport. Therefore, the transistor using the nc-OS film is Compared to transistors using OS films, the electrical characteristics fluctuate greatly and the reliability is low. However, the nc-OS film can be formed even if it contains a relatively large amount of impurities. Therefore, it is easier to form than the CAAC-OS film, and is preferably used depending on the application. Therefore, a semiconductor having a transistor using an nc-OS film can be The devices may be capable of being manufactured productively.

[0375] <Method for manufacturing microcrystalline oxide semiconductor film> Next, a method for forming a microcrystalline oxide semiconductor film will be described below. The film is heated to a temperature of from room temperature to 75° C., preferably from room temperature to 50° C., in an atmosphere containing oxygen. The film is formed by sputtering under an oxygen-containing atmosphere. As a result, oxygen vacancies in the microcrystalline oxide semiconductor film are reduced, and the film includes a microcrystalline region. This can be done.

[0376] By reducing oxygen vacancies in a microcrystalline oxide semiconductor film, the film has stable physical properties. In particular, when a semiconductor device is manufactured by using a microcrystalline oxide semiconductor film, The oxygen vacancies in the microcrystalline oxide semiconductor film act as donors, and carriers are introduced into the microcrystalline oxide semiconductor film. This generates electrons that are the cause of fluctuations in the electrical characteristics of the semiconductor device. By manufacturing a semiconductor device using a microcrystalline oxide semiconductor film in which defects are reduced, Therefore, a high-performance semiconductor device can be obtained.

[0377] In the microcrystalline oxide semiconductor film, oxygen vacancies occur when the oxygen partial pressure in the film formation atmosphere is increased. More specifically, the oxygen partial pressure in the film formation atmosphere is preferably reduced to 33%. It is preferable that the amount is equal to or more than that.

[0378] Note that a target used in forming the microcrystalline oxide semiconductor film by a sputtering method is The CAAC-OS can use the same target and its preparation method as those of the CAAC-OS.

[0379] In addition, nc-OS can be formed even if it contains a relatively large amount of impurities. It is easier to form than CAAC-OS and can be used preferably for some applications. For example, nc-OS can be formed by a deposition method such as sputtering using an AC power source. The sputtering method using an AC power source is capable of depositing a film on a large substrate with high uniformity. Therefore, it is possible to develop a semiconductor device having a transistor with nc-OS in the channel region. The device can be produced productively.

[0380] <Amorphous oxide semiconductor> For example, an amorphous oxide semiconductor has a disordered atomic arrangement and does not have a crystal part. An amorphous oxide semiconductor has an amorphous state like quartz, for example, and has regular atomic arrangement. Not seen.

[0381] In amorphous oxide semiconductors, for example, it is difficult to confirm crystalline parts in TEM images. It may be the case.

[0382] Amorphous oxide semiconductors are analyzed by the out-of-plane method using an XRD device. In addition, when the amorphous oxide semiconductor film is For example, a halo pattern may be observed in the electron diffraction pattern. For example, no spots can be observed in the ultrafine electron beam diffraction pattern of a compound semiconductor film. A halo pattern may be observed.

[0383] Amorphous oxide semiconductors are formed by, for example, containing a high concentration of impurities such as hydrogen. Therefore, the amorphous oxide semiconductor may be formed by, for example, It is an oxide semiconductor containing

[0384] When an oxide semiconductor contains a high concentration of impurities, defects such as oxygen vacancies occur in the oxide semiconductor. Therefore, an amorphous oxide semiconductor with a high impurity concentration has a high density of defect states. In addition, amorphous oxide semiconductors have low crystallinity, so The defect level density is higher than that of

[0385] Therefore, the amorphous oxide semiconductor has a higher carrier density than the nc-OS. Therefore, a transistor using an amorphous oxide semiconductor for a channel region has a Therefore, normally-on electrical characteristics are required. In some cases, an amorphous oxide semiconductor can be suitably used for a transistor in which defects are formed. Since the density of states is high, the density of trap states may also be high. Transistors using conductors for the channel region use CAAC-OS or nc-OS for the channel region. Compared to transistors used in the field, these transistors have large fluctuations in electrical characteristics and are less reliable. However, amorphous oxide semiconductors contain a relatively large amount of impurities due to the deposition method. Since the film can be formed by the above method, the film can be easily formed and is preferably used depending on the application. For example, spin coating, sol-gel, dipping, spraying, etc. method, screen printing method, contact printing method, inkjet printing method, roll coating method Alternatively, the amorphous oxide semiconductor may be formed by a film forming method such as a mist CVD method. A semiconductor device having a transistor in which an amorphous oxide semiconductor is used for a channel region has a high productivity. It can be made taller.

[0386] In addition, for example, the density of an oxide semiconductor is high when the number of defects is small. For example, when the crystallinity of hydrogen or the like is high, the density of the oxide semiconductor is high. For example, single-crystal oxide semiconductors have a high density when the concentration of impurities such as hydrogen is low. It may be denser than AC-OS. For example, CAAC-OS is a microcrystalline oxide. In addition, polycrystalline oxide semiconductors, for example, can have a higher density than microcrystalline oxide semiconductors. In addition, for example, a microcrystalline oxide semiconductor may have a higher density than an amorphous oxide semiconductor. The density may be higher than that of an oxide semiconductor.

[0387] (Embodiment 6) In this embodiment, a human body to which the semiconductor device of one embodiment of the present invention can be applied is The interface will be explained. In particular, the sensor that can detect the proximity or contact of the object to be detected will be described. A configuration example of a touch sensor will be described below.

[0388] Touch sensors include capacitive, resistive, surface elastic, infrared, and optical. Various methods can be used, such as the method.

[0389] Representative examples of capacitive touch sensors include surface capacitive touch sensors and projected capacitive touch sensors. In addition, the projected capacitive type has a self-driving function, which is mainly due to the difference in the driving method. There are capacitance type, mutual capacitance type, etc. Here, when using the mutual capacitance type, multiple points can be detected simultaneously. This is preferable because it enables multiple points to be detected (also called multi-touch).

[0390] Here, we will explain the touch sensor in detail, but in addition to this, cameras (infrared cameras The system detects the movement (gesture) of the object to be detected (e.g., finger or hand) and the user's gaze. Sensors that can detect point movements are used as a human interface. It is also possible.

[0391] <Example of sensor detection method> 33(A) and (B) are schematic diagrams showing the configuration of a mutual capacitance type touch sensor and input / output A touch sensor includes a pair of electrodes, and a capacitance is formed between the electrodes. An input voltage is input to one of the pair of electrodes. It is equipped with a detection circuit that detects the current (or the potential of the other electrode).

[0392] For example, as shown in FIG. 33(A), when a square wave is used as the input voltage waveform, the output voltage A waveform having a sharp peak is detected as a flow waveform.

[0393] As shown in FIG. 33(B), when a conductive object to be detected approaches or comes into contact with the capacitance, In this case, the charge capacity between the electrodes decreases, and the output current value decreases accordingly.

[0394] In this way, the change in capacitance can be calculated using the change in output current (or potential) relative to the input voltage. By detecting the object, the proximity or contact of the object to be detected can be detected.

[0395] <Touch sensor configuration example> FIG. 33C shows a configuration example of a touch sensor having a plurality of capacitors arranged in a matrix. Shows.

[0396] The touch sensor is made up of a number of wirings extending in the X direction (horizontal direction of the paper) and The wiring has a plurality of wirings that intersect and extend in the Y direction (the vertical direction of the paper). A capacitance is formed in the

[0397] In addition, the wiring extending in the X direction is used to carry the input voltage or common potential (including the ground potential and reference potential). In addition, a detection circuit (for example , source meter, sense amplifier, etc.) are electrically connected, and the current (or is the electric potential).

[0398] The touch sensor is designed so that the input voltage is input in sequence to multiple wirings extending in the X direction. By scanning in the Y direction and detecting changes in the current (or potential) flowing through the wiring extending in the Y direction, This enables two-dimensional sensing of the object to be detected.

[0399] <Touch panel configuration example> Below, a configuration example of a touch panel including a display unit having a plurality of pixels and a touch sensor will be described. An example in which the touch panel is incorporated into an electronic device will be described.

[0400] FIG. 34(A) is a schematic cross-sectional view of an electronic device equipped with a touch panel.

[0401] The electronic device 3530 includes a housing 3531 and at least a touch panel 3532 disposed in the housing 3531. 532, a battery 3533, and a control unit 3534. The touch panel 3532 is also The control unit 3534 is electrically connected to the display unit via wiring 3535. The display of the image and the sensing operation of the touch sensor are controlled. Electrically connected to the control unit 3534 via wiring 3536 to supply power to the control unit 3534 It is possible.

[0402] The touch panel 3532 is provided so that its display surface side is exposed outside the housing 3531. An image is displayed on the exposed surface of the touch panel 3532, and a touch panel 3533 is displayed on the exposed surface of the touch panel 3532. It is possible to detect a detection target.

[0403] 34B to 34D show configuration examples of a touch panel.

[0404] The touch panel 3532 shown in FIG. 34B includes a first substrate 3541 and a second substrate 354. A display panel 3540 having a display unit 3542 and a touch sensor 3544 are provided between the display panel 3540 and the touch sensor 3544. It includes a third substrate 3545 and a protection substrate 3546 .

[0405] The display panel 3540 may be a liquid crystal display device using a liquid crystal element, electronic paper, or the like. Various display devices can be applied. The touch panel 3532 is a display panel 3540. Depending on the circumstances, a backlight, a polarizing plate, etc. may be provided separately.

[0406] Since the object to be detected comes into contact with or is close to one surface of the protective substrate 3546, at least that surface It is preferable that the mechanical strength of the surface is increased. For example, the surface is strengthened by ion exchange or air cooling. The glass is physically or chemically treated to apply compressive stress to its surface. It can be used for a protective substrate 3546. Or, it can be used for a plastic substrate with a coated surface. A flexible substrate such as a plastic film may be used. A film may also be provided.

[0407] The touch sensor 3544 is provided on at least one surface of the third substrate 3545. Alternatively, a pair of electrodes constituting the touch sensor 3544 is formed on both sides of the third substrate 3545. In order to make the touch panel thinner, a flexible film may be used as the third substrate 3545. The touch sensor 3544 may be formed on a pair of substrates (including a film). A clamped configuration may also be used.

[0408] In FIG. 34B, a protection substrate 3546 and a third substrate having a touch sensor 3544 are Although the configuration shown is bonded with adhesive layer 3547, these are not necessarily bonded. In addition, the third substrate 3545 and the display panel 3540 may be bonded together by an adhesive layer. This may also be configured.

[0409] The touch panel 3532 shown in FIG. 34B is a display panel and a substrate having a touch sensor. The touch panel having such a configuration is called an external touch panel. This type of configuration allows the display panel and touch sensor to be By stacking these, the touch sensor function is realized on the display panel. This allows touch panels to be easily manufactured without any special manufacturing process. It can be manufactured.

[0410] The touch panel 3532 shown in FIG. 34C has a touch sensor 3544 on the second substrate 35. The touch panel having such a configuration is provided on the surface of the protection substrate 3546 of the touch panel 43. This can also be called an on-cell type touch panel. Since the number of sheets can be reduced, the touch panel can be made thinner and lighter.

[0411] In the touch panel 3532 shown in FIG. 34(D), a touch sensor 3544 is disposed on a protection substrate 354. With this configuration, the display panel and the touch panel are Since the sensors can be made separately, touch panels can be easily made. Furthermore, the number of substrates required can be reduced, making the touch panel thinner and lighter. This can be achieved.

[0412] The touch panel 3532 shown in FIG. 34(E) has a touch sensor 3544 connected to the display panel 35. The touch panel having such a configuration is provided on the inner side of the pair of substrates of 40. This can also be called a cell-type touch panel. With this type of configuration, the number of substrates required is reduced. Since the number of touch panels can be reduced, the touch panel can be made thinner and lighter. The panel is a first substrate, for example, formed by transistors, wiring, electrodes, etc., provided in the display unit 3542. A circuit that functions as a touch sensor is fabricated on the plate 3541 or the second substrate 3543. In addition, when an optical touch sensor is used, a photoelectric conversion element is It may be configured to include the above.

[0413] <Example of in-cell touch panel configuration> The following describes the configuration of a touch panel in which a touch sensor is incorporated in a display unit having multiple pixels. Here, a liquid crystal element is used as a display element provided in a pixel. Here is an example.

[0414] FIG. 35(A) shows one of the pixel circuits provided in the display unit of the touch panel exemplified in this configuration example. FIG. 1 is an equivalent circuit diagram of a portion

[0415] One pixel has at least a transistor 3503 and a liquid crystal element 3504. A wiring 3501 is connected to the gate of the transistor 3503, and a wiring 3502 is connected to either the source or drain. 02 are electrically connected to each other.

[0416] The pixel circuit includes a plurality of wirings extending in the X direction (for example, wiring 3510_1, wiring 3510_2, _2) and a plurality of wirings (for example, wiring 3511) extending in the Y direction, which are mutually The electrodes are disposed so as to intersect with each other, and a capacitance is formed therebetween.

[0417] In addition, among the pixels provided in the pixel circuit, some adjacent pixels are The electrodes of the liquid crystal elements are electrically connected to each other to form one block. The lock is divided into island blocks (e.g., block 3515_1, block 3515_2) and , a linear block extending in the Y direction (e.g., block 3516) In addition, although FIG. 35 shows only a part of the pixel circuit, these two types of The blocks are arranged repeatedly in the X and Y directions.

[0418] The wiring 3510_1 (or 3510_2) extending in the X direction is arranged in an island-shaped block 351 5_1 (or block 3515_2). The wiring 3510_1 extending in the X direction is discontinuous along the X direction via a line-shaped block. The island-shaped blocks 3515_1 arranged in the Y direction are electrically connected to each other. The existing wiring 3511 is electrically connected to the line-shaped block 3516 .

[0419] FIG. 35B shows a plurality of wirings 3510 extending in the X direction and a plurality of wirings 3510 extending in the Y direction. FIG. 3 is an equivalent circuit diagram showing a connection configuration of the wiring 3511. An input voltage or a common potential can be input to the wiring 3 extending in the Y direction. A ground potential is input to each of the wirings 3511, or the wiring 3511 is electrically connected to the detection circuit. It is possible.

[0420] <Touch panel operation example> Hereinafter, the operation of the above-mentioned touch panel will be described with reference to FIG.

[0421] As shown in FIG. 36(A), one frame period is divided into a writing period and a detection period. The write period is a period during which image data is written to the pixels, and the wiring 3510 (gate line On the other hand, during the detection period, sensing is performed by the touch sensor. During this period, the wirings 3510 extending in the X direction are selected in sequence and an input voltage is input.

[0422] FIG. 36B is an equivalent circuit diagram during the writing period. A common potential is input to both the wiring 3510 extending in the Y direction and the wiring 3511 extending in the Y direction. can be.

[0423] FIG. 36(C) is an equivalent circuit diagram at a certain point in the detection period. Each of the wirings 3511 extending in the X direction is electrically connected to a detection circuit. Of the wiring 3510, the input voltage is input to the selected one, and the other A common potential is input.

[0424] In this way, the image writing period and the period for sensing by the touch sensor are separated. This prevents touch noise caused by pixel writing noise. The decrease in sensitivity of the sensor can be suppressed.

[0425] (Embodiment 7) In this embodiment mode, a driving method for reducing power consumption of a display device will be described. A display device in which an oxide semiconductor transistor is used in a pixel is driven by the driving method of this embodiment. Further reduction in power consumption can be achieved. An example of reducing power consumption in a liquid crystal display device will now be described.

[0426] FIG. 37 is a block diagram showing a configuration example of a liquid crystal display device according to the present embodiment. As shown, the liquid crystal display device 500 has a liquid crystal panel 501 as a display module, and further , a control circuit 510 and a counter circuit.

[0427] The liquid crystal display device 500 receives an image signal (Video) which is digital data, and a liquid crystal panel. A synchronization signal (SYNC) is input to control rewriting of the screen of the panel 501. The signals include, for example, a horizontal synchronization signal (Hsync), a vertical synchronization signal (Vsync), and There are reference clock signals (CLK), etc.

[0428] The liquid crystal panel 501 includes a display unit 530, a scanning line driving circuit 540, and a data line driving circuit 550. The display unit 530 has a plurality of pixels 531. The pixels 531 in the same row are shared. The pixels 531 in the same column are connected to a common scanning line 541 to a scanning line driving circuit 540. The data line 551 is connected to a data line driving circuit 550 .

[0429] The liquid crystal panel 501 is supplied with a common voltage (Vcom) and a high power supply voltage ( The common voltage (Vcom) is supplied to the display unit 5. 30 pixels 531.

[0430] The data line driving circuit 550 processes the input image signal, generates a data signal, and The scanning line driving circuit 540 outputs a data signal to the data line 551. A scanning signal for selecting a pixel 531 to be scanned is output to a scanning line 541.

[0431] The pixel 531 is a switch whose electrical connection with the data line 551 is controlled by a scanning signal. When the switching element is turned on, a signal is sent from the data line 551 to the pixel 531. The data signal is written.

[0432] The electrode to which Vcom is applied corresponds to the common electrode.

[0433] The control circuit 510 is a circuit for controlling the entire liquid crystal display device 500. It is equipped with a circuit that generates a control signal for the circuit that constitutes 0.

[0434] The control circuit 510 controls the scanning line driver 540 and the data line driver 540 in response to a synchronization signal (SYNC). The scanning line driving circuit 540 has a control signal generating circuit that generates a control signal for the scanning line driving circuit 550. The control signals include a start pulse (GSP) and a clock signal (GCLK). A start pulse (SSP), a clock signal (SC For example, the control circuit 510 may generate clock signals (GCLK, SCLK) and This generates multiple clock signals with the same period but shifted phases.

[0435] The control circuit 510 also receives an image signal (Vide The output of the data line driver circuit 550 is controlled by the data line driver circuit 550.

[0436] The data line driving circuit 550 is a digital / analog conversion circuit (hereinafter, a DA conversion circuit 55 The DA conversion circuit 552 converts the image signal into an analog signal, and outputs a data signal. Generate a number.

[0437] When the image signal input to the liquid crystal display device 500 is an analog signal, the control circuit The signal is converted into a digital signal by a line 510 and output to a liquid crystal panel 501 .

[0438] The image signal is composed of image data for each frame. The control circuit 510 processes the image signal. Based on the information obtained by this processing, the output of the image signal to the data line driving circuit 550 is controlled. Therefore, the control circuit 510 detects the movement from the image data for each frame. When the motion detection unit 511 determines that there is no motion, Then, the control circuit 510 stops outputting the image signal to the data line driving circuit 550 and the motion is disabled. If it is determined that the image signal is not output, the output of the image signal is resumed.

[0439] There are no particular restrictions on the image processing for motion detection performed by the motion detection unit 511. For example, a motion detection method may be to extract differential data from image data between two consecutive frames. The difference data obtained can be used to determine whether there is movement or not. There are also methods for detecting motion vectors.

[0440] The liquid crystal display device 500 is also provided with an image signal correction circuit that corrects the input image signal. For example, a voltage higher than the voltage corresponding to the gray level of the image signal can be applied to the pixel 531. The image signal is corrected so that the image can be written in the correct manner. In this way, the image signal is corrected and processed to drive the control circuit 510. The method of changing the frame frequency of the image signal is called overdrive. When performing double-speed driving to drive the liquid crystal display device 500 at an integer multiple, the control circuit 510 Create image data that interpolates between two frames, or display black between two frames. It is only necessary to generate image data for this purpose.

[0441] Below, using the timing chart shown in FIG. 38, we will explain how to deal with moving images such as video images, The operation of the liquid crystal display device 500 for displaying a motionless image such as a still image will now be described. FIG. 38 shows a vertical synchronization signal (Vsync) and a data line 550 from the data line driving circuit 550. The signal waveform of the data signal (Vdata) outputted to 51 is shown.

[0442] FIG. 38 is a timing chart of the liquid crystal display device 500 during a 3m frame period. So, there is motion in the image data for the first k frame period and the last j frame period. In other frame periods, there is no motion in the image data. Note that k and j are each 1 An integer greater than or equal to m-2 inclusive.

[0443] During the first k frame period, the motion detector 511 detects motion in the image data of each frame. Based on the result of the determination by the motion detector 511, the control circuit 510 The data signal (Vdata) is output to the data line 551 .

[0444] Then, the motion detection unit 511 performs image processing for motion detection, and the k+1th frame If it is determined that there is no motion in the image data, the control circuit 510 determines whether the motion detector 511 detects the motion. Based on the result, in the k+1-th frame period, the image signal (Vid eo) is stopped. Furthermore, in order to stop rewriting of the display unit 530, Therefore, a control signal (start pulse signal) to the scanning line driving circuit 540 and the data line driving circuit 550 is The control circuit 510 stops the supply of the signal (the signal, the clock signal, etc.). 1, the data line driving circuit 550 is turned on until a determination result that there is motion in the image data is obtained. output of the image signal, output of control signals to the scanning line driving circuit 540 and the data line driving circuit 550 The force is stopped and rewriting of the display unit 530 stops.

[0445] In this specification, "not supplying" a signal to the liquid crystal panel means that the signal is not supplied. Applying a voltage to the wiring that is different from the voltage specified for operating the circuit, or This refers to putting wiring into an electrically floating state.

[0446] When rewriting of the display unit 530 is stopped, the electric field in the same direction continues to be applied to the liquid crystal element. This may cause the liquid crystal in the liquid crystal element to deteriorate. Regardless of the result of the motion detection unit 511, the control circuit 510 outputs a scan signal at a predetermined timing. A signal is supplied to the line driving circuit 540 and the data line driving circuit 550, and a data A signal is written to the data line 551 to invert the direction of the electric field applied to the liquid crystal element. .

[0447] The polarity of the data signal input to the data line 551 is determined based on Vcom. The polarity is positive when the data signal voltage is higher than Vcom, and negative when it is lower. is the polarity.

[0448] Specifically, as shown in FIG. 38, in the (m+1)th frame period, the control circuit 510 , and outputs control signals to the scanning line driving circuit 540 and the data line driving circuit 550. The data line driving circuit 550 outputs an image signal Video to the data line driving circuit 550. During this period, the polarity of the data signal (Vdata) output to the data line 551 is inverted. The data signal (Vdata) is output to the data line 551. In the (m+1)th frame period and the (2m+1)th frame period in which the polarity is not detected, The inverted data signal (Vdata) is written to the data line 551. During the period when there is no change, the display unit 530 is rewritten intermittently, so that the power consumption due to the rewriting is This makes it possible to reduce costs and prevent deterioration of the liquid crystal element.

[0449] Then, the motion detection unit 511 detects whether there is any motion in the image data of the (2m+1)th frame and thereafter. When it is determined that the scanning line driving circuit 540 and the data line driving circuit 550 are to be driven, the control circuit 510 and rewrites the display unit 530.

[0450] As described above, according to the driving method of FIG. 38, the effectiveness of the motion of the image data (Video) is improved. Regardless of whether or not the data signal (Vdata) is inverted in polarity every m frame periods. On the other hand, the rewriting of the display unit 530 is performed for a period during which an image including a movement is displayed for each frame. The display unit 530 is rewritten, and the period during which a still image is displayed is every m frames. As a result, the power consumption associated with rewriting the display can be reduced. This makes it possible to suppress the increase in power consumption caused by an increase in the driving frequency and the number of pixels. Cut.

[0451] As described above, the liquid crystal display device 500 has a mode for displaying moving images and a mode for displaying still images. By changing the driving method of the LCD device in each mode, deterioration of the LCD can be suppressed and the display quality can be improved. It is therefore possible to provide a power-saving liquid crystal display device while maintaining a high level of image quality.

[0452] In addition, when displaying a still image, if the pixels are rewritten every frame, the human eye cannot read the rewritten pixels. In some cases, the image may appear as flickering, which can cause eye fatigue. Since the pixels of a display device are rewritten less frequently during the display period of a still image, this is effective in reducing eye fatigue. It is.

[0453] Therefore, it is possible to use a liquid crystal panel in which a backplane is formed using oxide semiconductor transistors. This provides a small- to medium-sized LCD display device with high resolution and low power consumption that is highly suitable for portable electronic devices. It is possible to do so.

[0454] In order to prevent deterioration of the liquid crystal, the interval between polarity inversions of the data signal (here, m frame periods) is The time between the start and end of the pulse should be 2 seconds or less, and preferably 1 second or less.

[0455] In addition, the motion detection of the image data was performed by the motion detection unit 511 of the control circuit 510. The motion detection unit 511 does not need to output the motion data. Alternatively, the signal may be input to the control circuit 510 from outside.

[0456] The condition for determining that there is no motion in the image data is the image data between two consecutive frames. The number of frames required for the determination does not depend on the data, but on the usage pattern of the liquid crystal display device 500. For example, if there is no motion in the image data of consecutive m frames, In this case, rewriting of the display unit 530 may be stopped.

[0457] In the present embodiment, a liquid crystal display device is used as the display device. The driving method of the above embodiment can be used for other display devices, for example, light-emitting display devices.

[0458] The structures and methods described in this embodiment may be used in conjunction with structures and methods described in other embodiments and examples. and the like.

[0459] (Embodiment 8) The semiconductor device according to one embodiment of the present invention can be applied to various electronic devices (including game machines). The electronic equipment includes a television set (television or television receiver) (also called a receiver.) Computer monitors, digital cameras, digital video cameras digital photo frames, mobile phones, portable game consoles, personal digital assistants, audio playback equipment These electronic devices include gaming machines (pachinko machines, slot machines, etc.) and game cabinets. An example of the device is shown in FIG.

[0460] FIG. 39(A) shows a table 9000 having a display section. A display unit 9003 is built into the housing 9001, and an image is displayed on the display unit 9003. It is possible to support the housing 9001 with four legs 9002. The housing 9001 also includes a power cord 9005 for supplying power.

[0461] The semiconductor device described in any of the above embodiments can be used for the display portion 9003. Therefore, the display quality of the display portion 9003 can be improved.

[0462] The display unit 9003 has a touch input function. By touching the display button 9004 displayed on the screen with a finger or the like, the screen can be operated or information can be input. It also allows communication with and control of other home appliances, It may also be a control device that controls other home appliances by operating the screen.

[0463] In addition, the screen of the display unit 9003 can be fixed to the floor by a hinge provided in the housing 9001. It can also be placed vertically and used as a television set. A large-screen television set will take up a lot of free space, but it can be placed on a table. If the display unit is built into the device, the space in the room can be used more effectively.

[0464] FIG. 39(B) shows a television device 9100. A display unit 9103 is incorporated in a housing 9101, and an image is displayed on the display unit 9103. In this example, the housing 9101 is supported by a stand 9105. The figure shows a configuration in which

[0465] The television device 9100 can be operated using an operation switch provided on the housing 9101 or a separate remote control. This can be done by using a remote control operation device 9110. The channel and volume can be controlled by the 9109, and the display 9103 shows The remote control device 9110 can control the video. A display unit 9107 for displaying information output from the device 9110 may be provided.

[0466] A television device 9100 shown in FIG. 39(B) includes a receiver, a modem, and the like. The television device 9100 can receive general television broadcasts using a receiver. Furthermore, by connecting to a wired or wireless communication network via a modem, Either directional (from sender to receiver) or bidirectional (between sender and receiver, or between receivers, etc.) ) information communication is also possible.

[0467] The semiconductor device described in any of the above embodiments can be used for the display portions 9103 and 9107. This makes it possible to improve the display quality of the television device.

[0468] FIG. 39C shows a computer 9200, which includes a main body 9201, a housing 9202, a display unit 9 203, keyboard 9204, external connection port 9205, pointing device 920 6, etc.

[0469] The semiconductor device described in any of the above embodiments can be used for the display portion 9203. Therefore, the display quality of the computer 9200 can be improved.

[0470] The display unit 9203 has a touch input function. 03 Touch the display buttons with your finger to operate the screen or input information. It can also communicate with other home appliances or control them, making the screen It may also be used as a control device to control other home appliances by operation. For example, an image sensor If a semiconductor device having a sensor function is used, the display portion 9203 can have a touch input function. This can be done.

[0471] FIG. 40(A) and FIG. 40(B) show a tablet terminal that can be folded in two. 9631a, the tablet terminal is in an open state. 9631b, a display mode changeover switch 9034, a power switch 9035, a power saving mode It has a mode changeover switch 9036, a fastener 9033, and an operation switch 9038.

[0472] The semiconductor device described in any of the above embodiments includes a display portion 9631a and a display portion 9631b. Therefore, it is possible to improve the display quality of tablet devices. Cut.

[0473] A part of the display unit 9631a can be used as a touch panel area 9632a. By touching the operation keys 9638 displayed on the display unit 96, data can be input. In 31a, as an example, half of the area has a display function only, and the other half The display unit 96 has a touch panel function, but is not limited to this. The entire area of ​​the display unit 931a may have a touch panel function. The entire surface of 631a is made to display keyboard buttons to serve as a touch panel, and the display section 9631b is made to display It can be used as a display screen.

[0474] In addition, in the display unit 9631b, as in the display unit 9631a, The part of the touch panel can be the area 9632b of the touch panel. Touch the area where the mode display switch button 9639 is displayed with your finger or a stylus. A keyboard button can be displayed on the display portion 9631b.

[0475] In addition, the touch panel area 9632a and the touch panel area 9632b are simultaneously You can also use touch input.

[0476] A display mode changeover switch 9034 is used to change the display orientation, such as portrait or landscape. You can switch between black and white and color display. The switch 9036 is a switch that turns on and off when the tablet terminal is in use and is detected by a light sensor built into the tablet terminal. The brightness of the display can be optimized according to the amount of light. In addition to sensors, other detection devices such as gyros, acceleration sensors, etc. that detect tilt may be incorporated.

[0477] FIG. 40A shows an example in which the display area of ​​the display portion 9631b is the same as that of the display portion 9631a. However, there is no particular limitation, and one size may be different from the other size. The quality of the display may also be different. For example, one display panel may provide a higher resolution display than the other. It may also be used as a rule.

[0478] FIG. 40(B) shows the tablet terminal in a closed state. The tablet terminal includes a housing 9630 and a solar cell 9 40B, the charge / discharge control circuit 96 As an example of the 34, a configuration having a battery 9635 and a DC-DC converter 9636 is described below. This is shown.

[0479] In addition, since the tablet device can be folded in half, the case 9630 can be folded when not in use. Therefore, the display portions 9631a and 9631b can be protected. This makes it possible to provide a tablet device that is highly durable and reliable even when used for a long period of time.

[0480] In addition, the tablet terminals shown in Figs. 40(A) and 40(B) can be used in various Functions that display information (still images, videos, text images, etc.), calendars, dates or times A function to display the information on the display, and a function to operate the information displayed on the display by touch input or editing. It has touch input function, function to control processing by various software (programs), etc. It is possible.

[0481] The solar cell 9633 attached to the surface of the tablet device supplies power to the touch panel. The solar cell 9633 can supply the light to a display unit, a video signal processor, or the like. , which can be provided on one or both sides of the housing 9630, and can efficiently charge the battery 9635. The battery 9635 is preferably a rechargeable battery. The use of lithium ion batteries has the advantage of enabling miniaturization.

[0482] The configuration and operation of the charge / discharge control circuit 9634 shown in FIG. A block diagram is shown in FIG. 40(C) and will be explained. In FIG. 40(C), a solar cell 9633 and a battery 9 635, DC-DC converter 9636, converter 9637, switches SW1 to SW3 , a display unit 9631, a battery 9635, a DC-DC converter 963 6. The converter 9637 and the switches SW1 to SW3 are configured to perform the charge / discharge control shown in FIG. This corresponds to the circuit 9634 .

[0483] First, an example of operation when power is generated by the solar cell 9633 due to external light will be described. The power generated by the solar cell is converted to a voltage to charge the Battery 9635. The CDC converter 9636 steps up or steps down the voltage. When power is supplied from the solar cell 9633, switch SW1 is turned on and the converter The voltage is increased or decreased by a voltage converter 9637 to a voltage required for the display unit 9631. When no display is to be made on the display unit 9631, the switch SW1 is turned off and the switch SW2 is turned on. It is sufficient to configure it so that the power is turned on and the battery 9635 is charged.

[0484] The solar cell 9633 is shown as an example of a power generating means, but is not limited thereto. , and other power generation methods such as piezoelectric elements and thermoelectric conversion elements (Peltier elements) For example, the battery 9635 may be charged. A non-contact power transmission module that transmits and receives power and charges, or a combination of other charging methods This may also be configured.

[0485] Note that the structure described in this embodiment mode may be appropriately combined with structures described in other embodiments. It can be used. EXAMPLES

[0486] In this example, a liquid crystal display device was manufactured using the method of embodiment 1. This paper explains the structure of the device and the evaluation of the alignment of liquid crystal molecules.

[0487] First, a manufacturing process of the sample 1 will be described. In this embodiment, the sample 1 is manufactured as shown in FIGS. This will be explained using the pixel section (CD).

[0488] First, as shown in FIG. 4A, a glass substrate is used as a substrate 302. A conductive film 304c was formed.

[0489] A tungsten film with a thickness of 200 nm was formed by sputtering, and the first photolithography was performed. A mask is formed on the tungsten film by a lithography process, and the tungsten film is then etched using the mask. Part of the film was etched by dry etching to form a conductive film 304c.

[0490] Next, an insulating film 305 functioning as a gate insulating film and an insulating film 30 6 was formed.

[0491] The insulating film 305 is a first silicon nitride film having a thickness of 50 nm, a second silicon nitride film having a thickness of 300 nm, A silicon nitride film and a third silicon nitride film with a thickness of 50 nm were laminated by the plasma CVD method. It was formed.

[0492] As the insulating film 306, a silicon oxynitride film having a thickness of 50 nm is formed by the plasma CVD method. Successful.

[0493] Next, as shown in FIG. 4B, an oxide semiconductor film 307 was formed over the insulating film 306.

[0494] As the oxide semiconductor film 307, an In-Ga-Zn oxide film having a thickness of 35 nm was formed by sputtering. The In-Ga-Zn oxide film was formed by the deposition method. The composition of the chip was In:Ga:Zn=1:1:1.

[0495] Next, a mask is formed over the oxide semiconductor film 307 by a second photolithography process. Then, part of the oxide semiconductor film 307 is etched using the mask by a wet etching method. As a result, oxide semiconductor films 308b and 308d were formed as shown in FIG. 4C.

[0496] Next, as shown in FIG. 5A, a conductive film 309 was formed.

[0497] The conductive film 309 is a tungsten film having a thickness of 50 nm, an aluminum film having a thickness of 400 nm, A 200 nm thick titanium film was then formed by laminating a 200 nm thick silicon film on the SiO2 film by sputtering.

[0498] Next, a mask is formed on the conductive film 309 by a third photolithography process. A part of the conductive film 309 is etched by dry etching using a quartz crystal. As shown in FIG. 1, conductive films 310d and 310e were formed.

[0499] Next, as shown in FIG. 5C, the insulating film 306, the oxide semiconductor films 308b and 308d, An insulating film 311a and an insulating film 311b are formed on the conductive films 310d and 310e.

[0500] As the insulating film 311a, a silicon oxynitride film having a thickness of 50 nm is formed by a plasma CVD method. The insulating film 311a is an oxygen-permeable insulating film.

[0501] As the insulating film 311b, a silicon oxynitride film having a thickness of 400 nm is formed by a plasma CVD method. The insulating film 311b contains more oxygen than the oxygen required for the stoichiometric composition. The insulating film contains oxygen and part of the oxygen is released by heating.

[0502] Next, a mask is formed on the insulating film 311b by a fourth photolithography process. A part of the insulating film 311a and the insulating film 311b is etched by a dry etching method using a mask. By this, an insulating film 312 having an opening 362 was formed as shown in FIG. 6(A).

[0503] Next, a heat treatment is performed to remove water, nitrogen, hydrogen, etc. from the insulating film 312 and to Part of oxygen contained in the film 312 was supplied to the oxide semiconductor film 308b. Then, the substrate was subjected to a heat treatment at 350° C. for 1 hour in an oxygen atmosphere.

[0504] Next, as shown in FIG. 6B, an insulating film 312 is formed over the oxide semiconductor film 308d. 313 was formed.

[0505] As the insulating film 313, a silicon oxynitride film having a thickness of 100 nm is formed by a plasma CVD method. After this, a 200 nm thick silicon oxide film was deposited by plasma CVD using organosilane gas. The laminate was formed by a lamination method.

[0506] Next, a mask is formed on the insulating film 313 by a fifth photolithography process. A part of the insulating film 312 and the insulating film 313 is etched by dry etching using a quartz crystal. As a result, an opening 364c was formed as shown in FIG. 6(C).

[0507] Next, as shown in FIG. 7A, a conductive film 315 was formed.

[0508] As the conductive film 315, an ITO film containing silicon oxide having a thickness of 100 nm is sputtered. Then, a heat treatment was performed in a nitrogen atmosphere at 250° C. for 1 hour.

[0509] Next, a mask is formed on the conductive film 315 by a sixth photolithography process. A part of the conductive film 315 is etched by wet etching using a quartz crystal. As shown in FIG. 2B, a conductive film 316b was formed.

[0510] Next, as shown in FIG. 7C, a planarizing film 317 is formed on the insulating film 314 and the conductive film 316b. was formed.

[0511] The composition is applied onto the insulating film 314 and the conductive film 316b and baked to form an acrylic film having a thickness of 400 nm. A polyimide resin film was formed as a flattening film 317 .

[0512] Next, an alignment film 318 (see FIG. 3) was formed on the flattening film 317.

[0513] Through the above steps, an element portion was fabricated on the substrate 302. This sample was designated as Sample 1. .

[0514] In addition, a device portion was prepared in which no planarizing film was formed in Sample 1. This sample was called Sample 2. do.

[0515] Samples 1 and 2 were observed under a scanning transmission electron microscope (STEM). The results of observation by Mission Electron Microscopy are shown in Figure 41. show.

[0516] FIG. 41A is an STE image of a cross section of the insulating film 312 near the opening in the sample 2. FIG. 41B is an M image of the cross section of the insulating film 312 near the opening of the sample 1. This is a STEM image.

[0517] As shown in FIG. 41B, the planarization film 317 is formed in the recessed portion of the light-transmitting conductive film 316b. The thickness of the planarization film 317 is greater than that of the insulating film 312. It can be seen that the conductive material 16b is filled in the recesses of the insulating film 312. A planarization film 317 is also formed on the conductive film 316b. It can be seen that the surface roughness of the facing film 318 is small.

[0518] On the other hand, as shown in FIG. 41A, in the sample 2 in which the flattening film 317 is not formed, the orientation A step is formed in the film 318. Furthermore, in the light-transmitting conductive film 316b, In the recesses, the thickness of the alignment film 318 is large, and the thickness of the conductive film 316 having light transmission property on the insulating film 312 is small. On the upper surface b, the thickness of the alignment film 318 is thin. In other words, it is clear that the thickness of the alignment film 318 is not uniform. Light.

[0519] Next, in the same manner as in the first embodiment, the light-shielding film 344, the colored film 346, the insulating film 348, and the conductive film 3 50 and a substrate 342 on which an alignment film 352 is formed. After providing the sealing material, a liquid crystal material is dropped between the substrate 342 and the sealing material by a dispenser method. Next, the substrate 302 and the substrate 342 are fixed together using a sealant, and the liquid crystal display device is completed. It was made.

[0520] Here, the liquid crystal display device manufactured using Sample 1 is referred to as Sample 3. The liquid crystal display device thus fabricated is designated as Sample 4.

[0521] Next, the alignment of the liquid crystal molecules in Samples 3 and 4 was evaluated using a polarizing microscope. The pixel area was observed. FIG. 42(A) shows the backlight transmittance of Sample 4 at 100%. FIG. 42(B) shows the observed image of the pixel part when the backlight is turned on. The observed image of the pixel part when the transmittance is 100%. FIG. 42(D) shows an observed image of the pixel portion when the backlight transmittance is set to 0%. 13 is an observed image of a pixel portion of Sample 3 when the backlight transmittance is set to 0%.

[0522] In FIG. 42(A), a line defect 401 caused by disclination is observed. In FIG. 42(B), no display defects are observed. In FIG. 42(C), no light leakage is observed. In FIG. 42(D), no display defect is observed. Therefore, by filling the recesses of the conductive film having light transmitting properties with a planarizing film, the display of the liquid crystal display device can be improved. It is understood that the number of defects can be reduced.

[0523] The relationship between the thickness of the flattening film and the driving voltage of the liquid crystal display device is shown in FIG. As shown in.

[0524] Figure 43(A) shows the model used in the calculation. A 500 nm thick insulating layer is placed on a substrate 410. A plurality of insulating films 411 were provided, and the insulating films 411 were spaced apart by 1 0 μm. In addition, a pixel electrode 41 having a thickness of 100 nm was formed on the substrate 410 and the insulating film 411. 3 was provided on the pixel electrode 413. The planarization film 415 was made of acrylic resin. A pixel electrode 419 having a thickness of 100 nm was provided. A liquid crystal layer 417 is provided between the pixel electrodes 413 and 419. μm.

[0525] Here, in the planarization film 415, the thickness of the planarization film 415 provided on the insulating film 411 is The results of calculating the driving voltage of the liquid crystal display device by changing t are shown in FIG. The calculation was performed with thickness t set to 0 nm, 100 nm, 400 nm, 700 nm, and 900 nm. As a comparative example, the driving voltage of a liquid crystal display device not provided with the planarizing film 415 was calculated. The relationship between the driving voltage and the transmittance is shown in FIG. 43(B). In FIG. 43(B), the horizontal axis is the liquid crystal display (LCD). The vertical axis represents the driving voltage of the liquid crystal display device, and the vertical axis represents the normalized transmittance.

[0526] From FIG. 43(B), when a planarizing film is provided on the pixel electrode, the driving voltage increases. As the thickness of the flattening film increases, the driving voltage increases. Even if a flattening film is provided, the voltage is the same as when no flattening film is provided on the pixel electrode. A planarizing film may be provided on the electrode. EXAMPLES

[0527] In this embodiment, a liquid crystal display device was manufactured using the method of the second embodiment. This paper explains the structure of the device and the evaluation of the alignment of liquid crystal molecules.

[0528] First, a manufacturing process of the sample 5 will be described. In this embodiment, the manufacturing process of the sample 5 will be described with reference to FIGS. The pixel area (CD) shown in FIG. 4 will be used for the explanation. Note that the same manufacturing process as for Sample 1 will be explained. Details are omitted.

[0529] As in the first embodiment, a gate electrode and a gate electrode are formed on a substrate 302 through the steps shown in FIG. 4 to FIG. 5(C). the conductive film 304c functioning as a gate insulating film, the insulating film 305 functioning as a gate insulating film, and the insulating film 30 6, oxide semiconductor films 308b and 308d, conductive films 310d and 310e, and an insulating film 311 are formed. In this process, first to third patternings were performed, The conductive film 304c, the oxide semiconductor films 308b and 308d, and the conductive films 310d and 310 It forms e.

[0530] Next, as shown in FIG. 24(A), a fourth patterning is performed on a desired region on the insulating film 311. A mask 330 was formed by this.

[0531] Next, a heat treatment is performed to form a mask 330 and an insulating layer 340 as shown in FIG. 24(B). The angle formed by the surfaces of the film 311 is reduced, and a mask 332 with curved sides is formed.

[0532] Here, a heat treatment is performed in a nitrogen atmosphere at 170° C. for 15 minutes to form a mask 332. Ta.

[0533] Next, the insulating film 311 is etched by dry etching using the mask 332. Then, an insulating film 312 having an opening 362 was formed as shown in FIG.

[0534] Next, as shown in FIG. 7A, a conductive film 315 was formed in the same manner as in Example 1.

[0535] Next, a mask is formed on the conductive film 315 by a sixth photolithography process. A part of the conductive film 315 is etched by wet etching using a quartz crystal. As shown in FIG. 2B, a conductive film 316b was formed.

[0536] Next, an alignment film 318 (see FIG. 3) was formed over the conductive film 316b.

[0537] Through the above steps, an element portion was fabricated on the substrate 302. This sample was designated as Sample 5. .

[0538] In addition, in the sample 5, the heat treatment for forming the mask 332 shown in FIG. 24(B) was not performed. Then, the insulating film 311 is etched using the mask 330 to form an insulating film 311 having an opening 362. The element part was fabricated by forming 12. This sample was designated as sample 6.

[0539] The surfaces of Samples 5 and 6 were observed using a scanning electron microscope (SEM). The results of observation using a 100 mm long microscope are shown in FIG.

[0540] FIG. 44(A) is an SEM image of the surface of sample 6 observed from the alignment film 318 side. In FIG. 44(A), the SEM image of the area surrounded by the dashed line A observed at a high magnification is shown in FIG. ), and a SEM image of the region enclosed by the dashed line B observed at a high magnification is shown in FIG. 44(C).

[0541] In addition, in sample 5, the same areas as those in FIG. 44(B) and FIG. 44(C) were observed at a high magnification. The SEM images are shown in FIG. 44(D) and FIG. 44(E), respectively.

[0542] FIG. 44(A) is an SEM image at a magnification of 1000 times, and FIG. 44(B) to FIG. 4(E) is an SEM image at a magnification of 10,000 times.

[0543] In comparison with FIG. 44(B) and FIG. 44(C), the openings shown in FIG. 44(D) and FIG. 44(E) It can be seen that the taper angle of the end of portion 362 is small.

[0544] Next, in the insulating film 312 of Sample 5 and Sample 6, In order to observe the taper angle of the side surface of the insulating film 312, the cross sections of the samples 5 and 6 were observed. The results are shown in Figure 45. Figure 45 is a STEM image at a magnification of 40,000 times.

[0545] FIG. 45(A) shows an STE image of a cross section of the insulating film 312 near the opening in the sample 6. FIG. 45(B) is an M image of the cross section of the insulating film 312 near the opening in the sample 5. This is a STEM image.

[0546] As shown in FIG. 45B, in Sample 5, the surface of the conductive film 308c having light-transmitting properties and the insulating film The taper angle between the side of 312 and the surface of the substrate is 16°. The taper angle between the surface of the light-transmitting conductive film 308c and the side surface of the insulating film 312 is gradually increased. The taper angle on the light-transmitting conductive film 308c side is 45°, and the taper angle on the insulating film 31 On side 4, the taper angle is 85°.

[0547] From the above, the insulating film 312 having the opening 362 is formed by using the second embodiment. As a result, unevenness of the light-transmitting conductive film 316b formed over the insulating film 312 can be reduced. It is possible.

[0548] Next, in the same manner as in the first embodiment, the light-shielding film 344, the colored film 346, the insulating film 348, and the conductive film 3 50 and a substrate 342 on which an alignment film 352 is formed. After providing the sealing material, a liquid crystal material is dropped between the substrate 342 and the sealing material by a dispenser method. Next, the substrate 302 and the substrate 342 are fixed together using a sealant, and the liquid crystal display device is completed. It was made.

[0549] Here, the liquid crystal display device manufactured using Sample 5 is referred to as Sample 7. The liquid crystal display device thus fabricated is designated as Sample 8.

[0550] Next, the alignment of the liquid crystal molecules in Samples 7 and 8 was evaluated. The pixel area was observed. FIG. 46(A) shows the backlight transmittance of Sample 8 at 100%. FIG. 46(B) shows the observed image of the pixel part when the backlight is turned on. The observed image of the pixel part when the transmittance is 100%. FIG. 46(D) shows an observed image of the pixel portion when the backlight transmittance is set to 0%. 13 is an observed image of a pixel portion of Sample 7 when the backlight transmittance is set to 0%.

[0551] In FIG. 46(A), a line defect 431 caused by disclination is observed. In addition, in FIG. 46(B), a defect 433 caused by disclination is observed. However, the defect 433 shown in FIG. 46(B) is a smaller defect. 46(D), light leakage 403 is observed, but display defects are observed. From the above, by reducing the taper angle of the insulating film having the opening, It is understood that display defects of the display device can be reduced. EXAMPLES

[0552] In this example, the resistance of the oxide semiconductor film and the multilayer film is measured using FIGS. He explains.

[0553] First, the structure of the sample will be described with reference to FIG.

[0554] FIG. 47A is a top view of Samples 9 to 12, and is a cross-sectional view taken along dashed line A1-A2. The results are shown in Figures 47(B), (C), and (D). Samples 9 to 12 have the same top view. The cross-sectional views of sample 9 are different because the laminated structure of the cross section is different. A cross-sectional view of sample 10 is shown in FIG. 47(C), cross-sectional views of samples 11 and 12 are shown in FIG. 47(D), and Each is shown below.

[0555] In the sample 9, an insulating film 1903 is formed on a glass substrate 1901, and an insulating film 1903 is formed on the insulating film 1903. An insulating film 1904 is formed, and an oxide semiconductor film 1905 is formed over the insulating film 1904. In addition, both ends of the oxide semiconductor film 1905 are covered with conductive films 1907 and 1909 which function as electrodes. The oxide semiconductor film 1905 and the conductive films 1907 and 1909 are covered with insulating films 1910 and 1911. The insulating films 1910 and 1911 are provided with openings 1913 and 1915. In the openings, conductive films 1907 and 1909 are exposed.

[0556] In the sample 10, an insulating film 1903 is formed on a glass substrate 1901. An insulating film 1904 is formed, and an oxide semiconductor film 1905 is formed over the insulating film 1904. In addition, conductive films 1907 and 1909 functioning as electrodes are provided on both ends of the oxide semiconductor film 1905. The oxide semiconductor film 1905 and the conductive films 1907 and 1909 are covered with an insulating film 1911. The insulating film 1911 has openings 1917 and 1919. In the openings, the conductive films 1907 and 1909 are exposed.

[0557] In the samples 11 and 12, an insulating film 1903 is formed on a glass substrate 1901. An insulating film 1904 is formed on the insulating film 1903, and a multilayer film 1906 is formed on the insulating film 1904. In addition, both ends of the multilayer film 1906 are covered with conductive films 1907 and 1909 that function as electrodes. The multilayer film 1906 and the conductive films 1907 and 1909 are covered with an insulating film 1911. 1911 has openings 1917 and 1919. Thus, the conductive films 1907 and 1909 are exposed.

[0558] In this manner, Samples 9 to 12 each include the oxide semiconductor film 1905 or the multilayer film 1906. The structure of the insulating film in contact with the top is different. Sample 9 has an oxide semiconductor film 1905 and an insulating film 1910. In Sample 10, the oxide semiconductor film 1905 and the insulating film 1911 are in contact with each other. In Sample 11 and Sample 12, the multilayer film 1906 and the insulating film 1911 are in contact with each other.

[0559] Next, the method for preparing each sample will be described.

[0560] First, a method for preparing sample 9 will be described.

[0561] On a glass substrate 1901, an insulating film 1903 is formed by a plasma CVD method. A silicon nitride film with a thickness of nm was formed.

[0562] Next, on the insulating film 1903, an insulating film 1904 is formed by a plasma CVD method. A silicon oxynitride film having a thickness of nm was formed.

[0563] Next, a metal oxide target ( In:Ga:Zn=1:1:1) was used, and IGZ with a thickness of 35 nm was formed by sputtering. Then, an O film was formed. Then, it was etched using a mask formed by a photolithography process. A bonding treatment was performed to form an oxide semiconductor film 1905.

[0564] Next, a thick insulating film 1903 and an oxide semiconductor film 1905 are formed by a sputtering method. A 50 nm thick tungsten film, a 400 nm thick aluminum film, and a 100 nm thick tungsten film were After laminating the titanium films in order, they are etched using a mask formed by a photolithography process. A conductive film 1907 and a conductive film 1909 were formed by performing a plating treatment.

[0565] Next, the insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 190 On the substrate 9, a silicon oxynitride film having a thickness of 450 nm is formed as an insulating film 1910 by a plasma CVD method. After the film was formed, it was heat-treated for 1 hour in a mixed atmosphere of nitrogen and oxygen at 350°C. .

[0566] Next, on the insulating film 1910, an insulating film 1911 is formed by a plasma CVD method. A silicon nitride film with a thickness of nm was formed.

[0567] Next, after providing a mask on the insulating film 1911 by a photolithography process, Then, an etching process is performed to form openings 1913 and 1914 in the insulating film 1910 and the insulating film 1911. 15 was formed.

[0568] Sample 9 was prepared by the above steps.

[0569] Next, a method for preparing the sample 10 will be described.

[0570] The insulating film 1903, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 19 On the insulating film 1910, a 450 nm thick oxide nitride silicon film is formed by plasma CVD. After the silicon film was formed, it was heat-treated for 1 hour in a mixed atmosphere of nitrogen and oxygen at 350°C. After that, the insulating film 1910 was removed.

[0571] Next, the insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 190 9, a silicon nitride film having a thickness of 50 nm is formed as an insulating film 1911 by a plasma CVD method. A film was formed.

[0572] Next, after providing a mask on the insulating film 1911 by a photolithography process, Then, an etching process was performed to form openings 1917 and 1919 in the insulating film 1911 .

[0573] Sample 10 was prepared by the above steps.

[0574] Next, a method for preparing sample 11 will be described.

[0575] In Sample 11, a multilayer film 1906 was used instead of the oxide semiconductor film 1905 in Sample 10. The multilayer film 1906 is formed by depositing a metal oxide target (In:Ga: Zn=1:3:2) and a 10 nm thick IGZO film was formed by sputtering. Then, a metal oxide target (In:Ga:Zn=1:1:1) was used for sputtering. A 10 nm thick IGZO film was then deposited by the ion beam deposition method, followed by deposition of a metal oxide target (In:G A 10 nm thick IGZO film was formed by sputtering using a ZnO film of 1:3:2. Then, etching was performed using a mask formed by photolithography. Thus, a multilayer film 1906 was formed.

[0576] Sample 11 was prepared by the above steps.

[0577] Next, a method for preparing the sample 12 will be described.

[0578] In Sample 12, a multilayer film 1906 was used instead of the oxide semiconductor film 1905 of Sample 10. In addition, the thickness of the IGZO film that constitutes the multilayer film 1906 in sample 12 is larger than that in sample 11. The multilayer film 1906 is formed by depositing a metal oxide target (In: A 20 nm thick IGZO film was formed by sputtering using a Ga:Zn=1:3:2) Then, a metal oxide target (In:Ga:Zn=1:1:1) was used for sputtering. A 15 nm thick IGZO film was deposited by the deposition method, followed by deposition of a metal oxide target (I n:Ga:Zn=1:3:2) and sputtered IGZO with a thickness of 10 nm. A film was formed. Then, etching was performed using a mask formed by a photolithography process. A coating process was performed to form a multilayer film 1906.

[0579] Sample 12 was prepared by the above steps.

[0580] Next, the oxide semiconductor film 1905 and the multilayer film 1906 provided in Samples 9 to 12 In sample 9, the openings 1913 and 1915 were filled with a proton. The sheet resistance of the oxide semiconductor film 1905 was measured by contacting the probe. In the case of sample 12, the probe is brought into contact with the openings 1917 and 1919, and the oxide The sheet resistance of the semiconductor film 1905 and the multilayer film 1906 was measured. In the oxide semiconductor film 1905 and the multilayer film 1906 in FIG. 12, the conductive film 1907 and the conductive The width of the film 1909 facing each other is 1 mm, and the distance between the conductive film 1907 and the conductive film 1909 is 10 In Samples 9 to 12, the conductive film 1907 was set to a ground potential, and the conductive A voltage of 1 V was applied to the film 1909.

[0581] The sheet resistances of Samples 9 to 12 are shown in FIG.

[0582] The sheet resistance of sample 9 is about 1×10 11 Ω / sq. Also, the sheet of sample 10 The sheet resistance of sample 11 was 4410 Ω / sq. The sheet resistance of Sample 12 was 2930 Ω / sq.

[0583] In this way, the difference in the insulating film in contact with the oxide semiconductor film 1905 and the multilayer film 1906 Therefore, the oxide semiconductor film 1905 and the multilayer film 1906 have different sheet resistances.

[0584] When the sheet resistances of the above-mentioned Samples 9 to 12 are converted into resistivities, Sample 9 has the following: 3.9×10 5 Ωcm, sample 10 is 9.3×10 -3 Ωcm, sample 11 is 1.3×1 0 -2 Ωcm, sample 12 is 1.3×10 -2 It was Ωcm.

[0585] Sample 9 is a silicon oxynitride film that is in contact with an oxide semiconductor film 1905 and is used as an insulating film 1910. The oxide semiconductor film 1905 is a nitride film used as an insulating film 1911. On the other hand, Samples 10 to 12 each include an oxide semiconductor film 1905, A silicon nitride film used as an insulating film 1911 is formed on the multilayer film 1906. In this manner, the oxide semiconductor film 1905 and the multilayer film 1906 are formed in a state where the insulating film 1911 is formed. When the oxide semiconductor film 1905 and the multilayer film 1906 are provided in contact with the silicon nitride film used as the insulating film, Defects, typically oxygen vacancies, are formed in the silicon nitride film. moves or diffuses into the oxide semiconductor film 1905 and the multilayer film 1906. , the electrical conductivity of the oxide semiconductor film 1905 and the multilayer film 1906 is improved.

[0586] For example, in the case where an oxide semiconductor film is used for a channel formation region of a transistor, It is preferable that a silicon oxynitride film is provided in contact with the oxide semiconductor film so as to form a As a light-transmitting conductive film used for an electrode of a quantum well, the following films are shown in Samples 10 to 12. It is preferable that a silicon nitride film is provided in contact with the oxide semiconductor film or the multilayer film. By using such a structure, it is possible to form a transistor having an oxide semiconductor layer in a channel formation region. The oxide semiconductor film or multilayer film used for the electrode of the capacitor element is formed in the same process. The resistivity of the oxide semiconductor film and the multilayer film can be changed even when the oxide semiconductor film and the multilayer film are formed by the above method.

[0587] Next, for Samples 10 and 11, the sheet resistance of the samples stored in a high-temperature and high-humidity environment was The conditions for each sample used are explained below. In some cases, the conditions used were different from those of Samples 10 and 11. Samples with the same structure as Sample 10 and Sample 11 but different preparation conditions are named Sample 10a and Sample 11, respectively. The other sample is designated as sample 11a.

[0588] First, a method for producing the sample 10a will be described.

[0589] An insulating film 1903 and an insulating film 1904 were formed on a glass substrate 1901 .

[0590] A metal oxide target (In: A 35 nm thick IGZO film was formed by sputtering using a Ga:Zn=1:1:1 After that, the film was etched using a mask formed by a photolithography process. After the treatment, heat treatment is performed at 350° C. or 450° C. to form an oxide semiconductor film 1905. Successful.

[0591] A 50 nm thick insulating film was formed over the insulating film 1903 and the oxide semiconductor film 1905 by a sputtering method. After stacking a 400 nm thick titanium film and a 400 nm thick copper film in order, a photolithography process is performed. The conductive film 1907 and the conductive film 1909 are then etched using a mask formed from the above. was formed.

[0592] Next, the insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 190 On the substrate 9, a silicon oxynitride film having a thickness of 450 nm is formed as an insulating film 1910 by a plasma CVD method. After the film was formed, it was heat-treated for 1 hour in a mixed atmosphere of nitrogen and oxygen at 350°C. .

[0593] Next, the insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 190 9, a silicon nitride film having a thickness of 50 nm is formed as an insulating film 1911 by a plasma CVD method. The silicon nitride film was formed at a temperature of 220° C. or 350° C.

[0594] Next, after providing a mask on the insulating film 1911 by a photolithography process, Then, an etching process is performed to form openings 1913 and 1914 in the insulating film 1910 and the insulating film 1911. 15 was formed.

[0595] Through the above steps, the sample 10a was fabricated.

[0596] Next, a method for producing the sample 11a will be described.

[0597] The sample 11a uses a multilayer film 1906 instead of the oxide semiconductor film 1905 of the sample 10a. The multilayer film 1906 is formed by depositing a metal oxide target (In:G A 10 nm thick IGZO film was formed by sputtering using a ZnO film of 1:1:1. Then, a metal oxide target (In:Ga:Zn=1:3:2) was used for sputtering. A 10 nm thick IGZO film was formed using the ring method. After that, a photolithography process was performed. After etching using a mask formed by A heat treatment was performed to form a multilayer film 1906.

[0598] Through the above steps, sample 11a was fabricated.

[0599] Next, the oxide semiconductor film 1905 and the multilayer film 1906 provided in the sample 10a and the sample 11a were The sheet resistance of the opening 1917 was measured in the samples 10a and 11a. A probe is brought into contact with the opening 1919, and the oxide semiconductor film 1905 and the multilayer film 190 The sheet resistance of the oxide semiconductor film 1905 in Sample 10a and Sample 11a was measured. , and in the multilayer film 1906, the width at which the conductive film 1907 and the conductive film 1909 face each other is set to 1. The distance between the conductive film 1907 and the conductive film 1909 was set to 10 μm. In the samples 0a and 11a, the conductive film 1907 was set to the ground potential, and 1 V was applied to the conductive film 1909. In addition, in an atmosphere of 60° C. and 95% humidity, samples 10a and 11a were After storing for 60 hours and 130 hours, the sheet resistance of each sample was measured.

[0600] The sheet resistance values ​​of the samples 10a and 11a are shown in FIG. The lines indicate that the deposition temperature of the silicon nitride film formed as the insulating film 1911 in each sample was 220 The black markers indicate the temperature at which the sample is heated, and the dashed line indicates 350°C. The oxide semiconductor film 1905 was formed and then subjected to heat treatment at 350° C. The marker is formed by heating the oxide semiconductor film 1905 or the multilayer film 1906 at 450° C. The rounded corners indicate that each sample has an oxide semiconductor film 1905. The triangular marker indicates that each sample has a multilayer film 1906, i.e. In FIG. 49, after the multilayer film 1906 is formed, The measurement results of sample 11a heated at 350°C, i.e., the black triangles are plotted. do not have.

[0601] As shown in FIG. 49, Samples 10a and 11a have low sheet resistance and are suitable for use as electrodes of a capacitance element. It can be seen that the sheet resistance is less than 0.2Ω / sq., which is a desirable value. It can be seen that the sample 10a and the sample 11a have a small amount of fluctuation in the sheet resistance with time. Therefore, the oxide semiconductor film or multilayer film in contact with the silicon nitride film is Since the variation in the sheet resistance is small, the conductive film having a light-transmitting property used for the electrode of the capacitor element can be used. It can be used as such.

[0602] Next, in the samples 10a and 11a, the substrate temperatures were set to 25° C., 60° C., and 150° C. The results of measuring the sheet resistance of each sample are shown in FIG. The deposition temperature of the silicon nitride film formed as the insulating film 1911 in the samples 10a and 11a After the oxide semiconductor film 1905 or the multilayer film 1906 is formed, The samples were heat-treated at 100°C. The black circles indicate the measurement results of sample 10a, and the black circles indicate the measurement results of sample 10b. The filled triangle markers indicate the measurement results of sample 11a.

[0603] As shown in FIG. 50, even if the substrate temperature is increased, the oxide semiconductor film 1905 and the multilayer film 1906 It can be seen that the gate resistance value does not change. The oxide semiconductor film or multilayer film in contact with the silicon nitride film can be called a degenerate semiconductor. The layered film has a small variation in sheet resistance even when the substrate temperature changes, so it is suitable for use as an electrode for a capacitance element. The conductive film having a light-transmitting property can be used as the conductive film having a light-transmitting property.

[0604] The configuration shown in this embodiment may be appropriately combined with the configurations shown in other embodiments or embodiments. It can be used. EXAMPLES

[0605] In this example, impurity analysis of an oxide semiconductor film and an insulating film formed over the oxide semiconductor film was performed. This will be explained with reference to FIG. 51.

[0606] In this embodiment, two types of samples (hereinafter referred to as samples) were used for impurity analysis. 13, and sample 14) were prepared.

[0607] First, the method for preparing Sample 13 will be described below.

[0608] For sample 13, an IGZO film was formed on a glass substrate, and then a silicon nitride film was formed thereon. After that, heat treatment was performed at 450°C for 1 hour in a nitrogen atmosphere, followed by a mixed gas of nitrogen and oxygen. Heat treatment was performed at 450°C for 1 hour in an atmosphere (nitrogen = 80%, oxygen = 20%).

[0609] The conditions for forming the IGZO film were as follows: sputtering with a metal oxide target (In:Ga:Zn=1:1:1) was used, and Ar / O2=100 / 100sccm (O2 = 50%), pressure = 0.6 Pa, deposition power = 5000 W, substrate temperature = 170 °C. A 100 nm thick IGZO film was deposited.

[0610] The silicon nitride film was formed under the following conditions: SiH4 / N2 / N H3=50 / 5000 / 100sccm, pressure=100Pa, deposition power=1000W, A silicon nitride film was formed to a thickness of 100 nm under the condition of a plate temperature of 220°C.

[0611] Next, a method for preparing Sample 14 will be described below.

[0612] An IGZO film is formed on a glass substrate, and then a silicon oxynitride film and a silicon nitride film are formed. After that, a heat treatment was performed at 450°C for 1 hour in a nitrogen atmosphere, and then a nitrogen Heat treatment at 450℃ for 1 hour in a nitrogen and oxygen mixed gas atmosphere (nitrogen = 80%, oxygen = 20%) The theory was carried out.

[0613] The deposition conditions for the IGZO film and the silicon nitride film were the same as those for sample 13. The silicon oxynitride film was formed under the following conditions: , SiH4 / N2O=30 / 4000sccm, pressure=40Pa, deposition power=150W, A silicon oxynitride film with a thickness of 50 nm is formed at a substrate temperature of 220°C. E-CVD method, SiH4 / N2O=160 / 4000sccm, pressure=200Pa, The deposition power was 1500 W and the substrate temperature was 220°C. A silicon film was formed.

[0614] The impurity analysis results of Samples 13 and 14 are shown in FIG.

[0615] The impurity analysis was carried out using secondary ion mass spectrometry (SIMS). Using Ion Mass Spectrometry, the particles were separated in the direction of the arrow shown in Figure 51. That is, the measurements were taken from the glass substrate side.

[0616] FIG. 51(A) shows the hydrogen (H) concentration profile obtained by measuring sample 13. FIG. 51(B) shows the hydrogen (H) concentration profile obtained by measuring sample 14. It is.

[0617] From Figure 51(A), the hydrogen (H) concentration in the IGZO film is 1.0×10 20 atoms / c m 3 It can be seen that the hydrogen (H) concentration in the silicon nitride film is 1.0×10 2 3 atoms / cm 3 In addition, from Figure 51(B), the hydrogen in the IGZO film (H) Concentration is 5.0×10 19 atoms / cm 3 It can be seen that nitric oxide The hydrogen (H) concentration in the silicon oxide film is 3.0×10 21 atoms / cm 3 To be I understand.

[0618] Due to its measurement principle, SIMS analysis cannot measure the area near the sample surface or the layer boundaries between films of different materials. It is known that it is difficult to obtain accurate data near the surface. When analyzing the distribution of hydrogen (H) in the thickness direction by SIMS, the area in which the target film exists is In the range, there is no extreme fluctuation, and the average value in the region where almost constant intensity is obtained is adopted. do.

[0619] In this way, by changing the composition of the insulating film in contact with the IGZO film, the water in the IGZO film Differences were confirmed in the concentration of iodine (H).

[0620] For example, when the above-mentioned IGZO film is used in the channel formation region of a transistor, Sample 1 As shown in FIG. 4, a silicon oxynitride film is preferably provided in contact with the IGZO film. As a light-transmitting conductive film used for the electrodes of the capacitor element, IGZO is used as shown in Sample 13. It is preferable to provide a silicon nitride film in contact with the film. The IGZO film used for the channel formation region of the transistor and the I The hydrogen concentration in the IGZO film can be changed even when the GZO film and the IGZO film are fabricated using the same process. EXAMPLES

[0621] In this example, the amount of defects in the oxide semiconductor film and the multilayer film was measured using FIGS. He explains.

[0622] First, the structure of the sample will be described.

[0623] Sample 15 is a 35 nm-thick oxide semiconductor film formed on a quartz substrate and an oxide semiconductor A nitride insulating film having a thickness of 100 nm is formed on the film.

[0624] Samples 16 and 17 are a 30 nm thick multilayer film formed on a quartz substrate and a 30 nm thick multilayer film. The multilayer film of Sample 16 has a thickness of 100 nm. A first IGZO film having a thickness of 10 nm, a second IGZO film having a thickness of 10 nm, and a third IGZO film having a thickness of 10 nm The sample 17 has a first IGZO film with a thickness of 20 nm. The O film, the second IGZO film with a thickness of 15 nm, and the third IGZO film with a thickness of 10 nm were stacked in this order. In comparison with Sample 15, Samples 16 and 17 each have a structure in which a semiconductor layer is formed instead of an oxide semiconductor film. The difference is that it has a multilayer film.

[0625] Sample 18 is a 100 nm-thick oxide semiconductor film formed on a quartz substrate and an oxide semiconductor A 250 nm thick oxide insulating film was formed on the solid film, and a 10 nm thick oxide insulating film was formed on the solid film. The sample 18 has a nitride insulating film with a thickness of 0 nm. The difference is that the conductor film is not in contact with the nitride insulating film but is in contact with the oxide insulating film.

[0626] Next, the method for preparing each sample will be described.

[0627] First, a method for preparing the sample 15 will be described.

[0628] A 35 nm thick IGZO film was formed on a quartz substrate as an oxide semiconductor film. The film was formed by sputtering using a metal oxide target (In:Ga:Z n=1:1:1, Ar / O2=100sccm / 100sccm (O2=50%) ), pressure = 0.6 Pa, film formation power = 5000 W, and substrate temperature = 170°C.

[0629] Next, as the first heat treatment, a heat treatment was performed in a nitrogen atmosphere at 450° C. for 1 hour, and then Heating for 1 hour in a nitrogen and oxygen mixed gas atmosphere (nitrogen = 80%, oxygen = 20%) at 450℃ Processing was carried out.

[0630] Next, a silicon nitride film having a thickness of 100 nm is formed as a nitride insulating film on the oxide semiconductor film. The conditions for forming the silicon nitride film were SiH4 / N2 / NH 3=50 / 5000 / 100sccm, pressure=100Pa, deposition power=1000W, substrate The following conditions were used: temperature = 350°C.

[0631] Next, as a second heat treatment, heat treatment was performed at 250° C. in a nitrogen atmosphere for 1 hour.

[0632] Sample 15 was prepared by the above steps.

[0633] Next, a method for preparing the sample 16 will be described.

[0634] In Sample 16, a multilayer film was formed instead of the oxide semiconductor film in Sample 15. A metal oxide target (In:Ga:Zn= 1:3:2), Ar / O2=180 / 20sccm (O2=10%), pressure=0. The first IGZ was formed with a thickness of 10 nm under the conditions of 6 Pa, deposition power = 5000 W, and substrate temperature = 25 °C. Next, a metal oxide target (In:Ga:Zn =1:1:1), Ar / O2=100 / 100sccm (O2=50%), pressure= The second layer was deposited to a thickness of 10 nm under the conditions of 0.6 Pa, deposition power of 5000 W, and substrate temperature of 170°C. Next, a metal oxide target (In:Ga Zn=1:3:2) was used, and the pressure was Ar / O2=180 / 20sccm (O2=10%). The third layer was deposited to a thickness of 10 nm under the conditions of pressure = 0.6 Pa, deposition power = 5000 W, and substrate temperature = 25 °C. An IGZO film was formed.

[0635] The other steps were the same as those of Sample 15. Sample 16 was formed by the above steps.

[0636] Next, a method for preparing Sample 17 will be described.

[0637] In Sample 17, a multilayer film was formed instead of the oxide semiconductor film of Sample 15. The first IGZO film was deposited on a quartz substrate under the same conditions as the first IGZO film shown in Sample 16. Next, the first IGZO film was formed by sputtering. A second IGZO film was deposited with a thickness of 15 nm using the same conditions as for the GZO film. A third IGZO film with a thickness of 10 nm was formed using the same conditions as those for the third IGZO film shown in 16. The membrane was

[0638] The other steps were the same as those of Sample 15. Sample 17 was formed by the above steps.

[0639] Next, a method for preparing the sample 18 will be described.

[0640] Sample 18 was prepared by growing a 100 nm thick oxide semiconductor film on a quartz substrate under the same conditions as sample 15. A film was formed.

[0641] Next, using the same conditions as those for Sample 15, a first heat treatment was carried out.

[0642] Next, a first silicon oxynitride film having a thickness of 50 nm was formed as an oxide insulating film over the oxide semiconductor film. A silicon oxynitride film and a second silicon oxynitride film having a thickness of 200 nm were formed. D method, SiH4 / N2O=30 / 4000sccm, pressure=40Pa, deposition power=1 A first silicon oxynitride film was formed to a thickness of 50 nm under the conditions of 50 W and substrate temperature = 220 °C. Then, using the PE-CVD method, SiH4 / N2O=160 / 4000sccm, pressure = 200 Pa, deposition power = 1500 W, substrate temperature = 220 °C. A second silicon oxynitride film was formed. Note that the second silicon oxynitride film was formed in a stoichiometric manner. The film contains more oxygen than fills the composition.

[0643] Next, using the same conditions as for Sample 15, a silicon nitride film with a thickness of 100 nm was formed on the oxide insulating film. was formed.

[0644] Next, a second heat treatment was carried out using the same conditions as for Sample 15.

[0645] Through the above steps, sample 18 was formed.

[0646] Next, ESR measurements were performed on Samples 15 to 18. The ESR measurements were performed at a predetermined temperature. From the value of the magnetic field (H0) at which microwave absorption occurs, g = hν / βH0 is used to find g Here, ν is the frequency of the microwave. h is the Planck constant. and β is the Bohr magneton, both constants.

[0647] Here, the ESR measurements were performed under the following conditions: The measurement temperature was room temperature (25°C), and the The 2GHz radio frequency power (microwave power) was set to 20mW, and the magnetic field direction was set to the same as that of the sample. The film surface was parallel to the

[0648] The oxide semiconductor films and multilayer films included in Samples 15 to 17 were subjected to ESR measurement. The first derivative curves are shown in FIG. 52. FIG. 52(A) shows the measurement results for Sample 15, and FIG. 52(B) shows the measurement results for Sample 15. ) shows the measurement results for sample 16, and FIG. 52(C) shows the measurement results for sample 17.

[0649] The first differential curve obtained by ESR measurement of the oxide semiconductor film included in sample 18 is shown in Figure 53. show.

[0650] In FIG. 52(A) to FIG. 52(C), sample 15 was oxidized at a g value of 1.93. A signal with symmetry due to defects in the semiconductor film was detected. In Fig. 17, a symmetric signal due to defects in the multilayer film was detected at a g value of 1.95. The spin density at g-value 1.93 in sample 15 is 2.5×10 19 spi ns / cm 3 is the sum of the spin densities for the g values ​​of 1.93 and 1.95 in sample 16. is 1.6 x 10 19 spins / cm 3 The g value in sample 17 is 1.93 and The sum of the spin densities of 1.95 is 2.3 × 10 19 spins / cm 3 That is, It can be seen that the oxide semiconductor film and the multilayer film contain defects. An example of a defect in a multilayer film is an oxygen vacancy.

[0651] In FIG. 53, Sample 18 is a multilayer structure including the oxide semiconductor film of Sample 15, the oxide semiconductor film of Sample 16, and the oxide semiconductor film of Sample 17. Although the oxide semiconductor film is thicker than the single-layer film, it has symmetry due to defects. No signal was detected, i.e., below the detection limit (here, the detection limit is 3.7 × 10 16 s pins / cm 3 From this, the amount of defects contained in the oxide semiconductor film was It turns out that it is difficult to detect.

[0652] The oxide semiconductor film or multilayer film is covered with a nitride insulating film, here a nitride insulating film formed by PE-CVD. When the silicon film comes into contact with the oxide semiconductor film or multilayer film, defects, typically oxygen vacancies, are formed. On the other hand, when an oxide insulating film, a silicon oxynitride film, is used for an oxide semiconductor film, When the silicon oxynitride film is provided with the oxygen content, the excess oxygen contained in the silicon oxynitride film, i.e., the oxygen content that satisfies the stoichiometric composition, Therefore, more oxygen diffuses into the oxide semiconductor film than in the case where the oxide semiconductor film is heated. Therefore, defects in the oxide semiconductor film are not increased.

[0653] From the above, as shown in Samples 15 to 17, the oxide semiconductor film or multilayer film in contact with the nitride insulating film has defects, typically a large amount of oxygen deficiency and high conductivity, and thus can be used as an electrode of a capacitive element. On the other hand, as shown in Sample 18, the oxide semiconductor film or multilayer film in contact with the oxide insulating film has a small amount of oxygen deficiency and low conductivity, and thus can be used as a channel formation region of a transistor. The body film or multilayer film has many defects, typically a large amount of oxygen deficiency and high conductivity, and thus can be used as an electrode of a capacitive element. Here, as shown in Sample 18, the oxide semiconductor film or multilayer film in contact with the oxide insulating film has a small amount of oxygen deficiency and low conductivity, and thus can be used as a channel formation region of a transistor. The body film or multilayer film has a small amount of oxygen deficiency and low conductivity, and thus can be used as a channel formation region of a transistor.

[0654] Here, the reason for the reduction in the resistivity of the oxide semiconductor film and multilayer film in contact with the nitride insulating film will be described below.

[0655] <Energy and Stability between Existence Forms of H> First, the results of calculating the energy and stability of the form of H present in the oxide semiconductor film will be described. Here, InGaZnO4 was used as the oxide semiconductor film. The structure used in the calculation was based on an 84-atom bulk model obtained by doubling the hexagonal unit cell of InGaZnO4 in the a-axis and b-axis directions.

[0656] In the bulk model, a model was prepared in which one O atom bonded to three In atoms and one Zn atom was replaced by an H atom (see Fig. 54(A)). Also, in Fig. 54(A), a view of the ab plane in the InO layer as seen from the c-axis is shown in Fig. 54(B). The region where one O atom bonded to three In atoms and one Zn atom was removed is denoted as oxygen deficiency Vo and is shown by a broken line in Figs. 54(A) and 54(B). Also, the H atom located in the oxygen deficiency Vo is denoted as VoH. The region where one O atom bonded to three In atoms and one Zn atom was removed is denoted as oxygen deficiency Vo and is shown by a broken line in Figs. 54(A) and 54(B). Also, the H atom located in the oxygen deficiency Vo is denoted as VoH.

[0657] In the bulk model, a model was prepared in which one O atom bonded to three In atoms and one Zn atom was replaced by an H atom (see Fig. 54(A)). Also, in Fig. 54(A), a view of the ab plane in the InO layer as seen from the c-axis is shown in Fig. 54(B). The region where one O atom bonded to three In atoms and one Zn atom was removed is denoted as oxygen deficiency Vo and is shown by a broken line in Figs. 54(A) and 54(B). Also, the H atom located in the oxygen deficiency Vo is denoted as VoH.

[0658] Also, in the bulk model, a model was prepared in which one O atom bonded to three In atoms and one Zn atom was replaced by an H atom​​​​ In the vicinity of the Vo, one Ga atom is removed from the ab plane. A model was prepared in which an H atom is bonded to an O atom bonded to an atom and two Zn atoms (Figure 54 In addition, in FIG. 54(C), the ab plane of the InO layer is viewed from the c-axis. This is shown in FIG. 54(D). In FIG. 54(C) and FIG. 54(D), the oxygen vacancy Vo is indicated by a dashed line. In addition, the structure has a vacancy Vo and has one Ga atom and one Ga atom on the ab plane near the oxygen vacancy Vo. A model with an H atom bonded to an O atom bonded to two Zn atoms is denoted as Vo+H. .

[0659] For the above two models, optimization calculations were performed with the lattice constants fixed, and the total energy was calculated as The smaller the total energy value, the more stable the structure.

[0660] The calculations were performed using the first-principles calculation software VASP (The Vienna Ab ini The calculation conditions are shown in Table 1.

[0661] [Table 1] The electronic state pseudopotential is the Projector Augmented Wave (P The potential generated by the General AW method is used as the functional. ized-Gradient-Approximation / Perdew-Burke -Ernzerhof) was used.

[0662] The calculated total energies of the two models are shown in Table 2.

[0663] [Table 2]

[0664] From Table 2, the total energy of VoH is 0.78 eV lower than that of Vo+H. Therefore, it can be said that VoH is more stable than Vo+H. Therefore, when an H atom approaches an oxygen vacancy (Vo), it is considered that the H atom is more likely to be incorporated into the oxygen vacancy (Vo) than to bond with an O atom.

[0665] <Thermodynamic state of VoH> Next, the formation energy and charge state of VoH in which an H atom is incorporated into an oxygen vacancy (Vo) will be explained based on the calculation results. The formation energy of VoH varies depending on the charge state and also depends on the Fermi energy. Therefore, the stable charge state of VoH depends on the Fermi energy. Here, the state in which VoH releases one electron is denoted as (VoH) and the state in which VoH captures one electron is denoted as (VoH) and the state without electron transfer is denoted as (VoH + ) and the state in which VoH captures one electron is denoted as (VoH) - and the state without electron transfer is denoted as (VoH ) 0 The formation energies of (VoH) + , (VoH) - , and (VoH) 0 were calculated respectively.

[0666] The first-principles calculation software VASP was used for the calculation. The calculation conditions are shown in Table 3.

[0667]

Table 3

[0668] In addition, the formation energy of oxygen vacancies was calculated assuming a dilute limit of oxygen vacancy concentration. The energies were calculated by correcting for the excess broadening of the electrons and holes into the conduction band and valence band. The upper end of the valence band of a perfect crystal is taken as the energy origin, and the shift in the valence band due to defect structures is Corrections were made using the average electrostatic potential.

[0669] In Figure 55(A), (VoH) + , (VoH) - , (VoH) 0 The respective formation energies The horizontal axis is the Fermi level, and the vertical axis is the formation energy. The solid line indicates the ) + The dashed line shows the formation energy of (VoH) 0 The dashed line indicates the formation energy of (VoH) - The formation energy of VoH is also shown. The charge of VoH is (VoH) + From (Vo H) 0 Through (VoH) - The transition level from

[0670] Figure 55(B) shows the thermodynamic transition level of VoH. From the calculation results, InGaZnO The energy gap of 4 is 2.739 eV. The valence band energy is 0e V, the transition level (ε(+ / -)) is 2.62 eV, which is located just below the conduction band. This shows that the incorporation of H atoms into the oxygen vacancies (Vo) results in the formation of InGaZ It can be seen that nO4 becomes n-type.

[0671] When the oxide semiconductor film is exposed to plasma, the oxide semiconductor film is damaged, and the oxide semiconductor In the conductive film, defects, typically oxygen vacancies, are generated. When the oxide semiconductor film comes into contact with the nitride insulating film, hydrogen contained in the nitride insulating film moves to the oxide semiconductor film. Hydrogen enters the oxygen vacancies in the oxide semiconductor film, forming VoH in the oxide semiconductor film. As a result, the oxide semiconductor film becomes n-type and the resistivity decreases. The oxide semiconductor film in contact with the first electrode can be used as an electrode of a capacitor.

Claims

1. A pixel includes a transistor, a capacitor, and a display element. one of a source and a drain of the transistor is electrically connected to a first electrode of the display element; a display device in which one of a source and a drain of the transistor is electrically connected to one electrode of the capacitor element, a first conductive film having a region disposed above an insulating surface and functioning as a gate electrode of the transistor; a first insulating film having a region disposed above the first conductive film and functioning as a gate insulating film of the transistor; an oxide semiconductor film having a region disposed above the first insulating film and having a channel region of the transistor; a second conductive film having a region located above the first insulating film, functioning as the other electrode of the capacitor, and having a light-transmitting property; a second insulating film having a region disposed above the oxide semiconductor film and a region disposed above the second conductive film; a third conductive film electrically connected to the oxide semiconductor film and to the first electrode; a fourth conductive film that is electrically connected to the oxide semiconductor film, has a function as a first wiring electrically connected to the other of the source and the drain of the transistor, and has a region extending in a first direction across the pixel and an adjacent pixel; a fifth conductive film electrically connected to the second conductive film, having a function as a second wiring for supplying a potential to the second conductive film, and having a region extending in the first direction across the pixel and an adjacent pixel; a third insulating film having a region disposed above the second conductive film, a region disposed above the third conductive film, a region disposed above the fourth conductive film, and a region disposed above the fifth conductive film; a second electrode of the display element having a region disposed above the first electrode; the first electrode has a region disposed above the third insulating film, the second conductive film has a region that does not overlap the fifth conductive film and a region that does not overlap the second insulating film; the fifth conductive film does not overlap with the fourth conductive film; Display device.

2. A pixel includes a transistor, a capacitor, and a display element. one of a source and a drain of the transistor is electrically connected to a first electrode of the display element; a display device in which one of a source and a drain of the transistor is electrically connected to one electrode of the capacitor element, a first conductive film having a region disposed above an insulating surface and functioning as a gate electrode of the transistor; a first insulating film having a region disposed above the first conductive film and functioning as a gate insulating film of the transistor; an oxide semiconductor film having a region disposed above the first insulating film and having a channel region of the transistor; a second conductive film having a region located above the first insulating film, functioning as the other electrode of the capacitor, and having a light-transmitting property; a second insulating film having a region disposed above the oxide semiconductor film and a region disposed above the second conductive film; a third conductive film electrically connected to the oxide semiconductor film and to the first electrode; a fourth conductive film that is electrically connected to the oxide semiconductor film, has a function as a first wiring electrically connected to the other of the source and the drain of the transistor, and has a region extending in a first direction across the pixel and an adjacent pixel; a fifth conductive film electrically connected to the second conductive film, having a function as a second wiring for supplying a potential to the second conductive film, and having a region extending in the first direction across the pixel and an adjacent pixel; a third insulating film having a region disposed above the second conductive film, a region disposed above the third conductive film, a region disposed above the fourth conductive film, and a region disposed above the fifth conductive film; a second electrode of the display element having a region disposed above the first electrode; the first electrode has a region disposed above the third insulating film, the second conductive film has a region that does not overlap the fifth conductive film and a region that does not overlap the second insulating film; the fifth conductive film does not overlap with the fourth conductive film, the second conductive film does not overlap with the third conductive film; Display device.

3. A pixel includes a transistor, a capacitor, and a display element. one of a source and a drain of the transistor is electrically connected to a first electrode of the display element; a display device in which one of a source and a drain of the transistor is electrically connected to one electrode of the capacitor element, a first conductive film having a region disposed above an insulating surface and functioning as a gate electrode of the transistor; a first insulating film having a region disposed above the first conductive film and functioning as a gate insulating film of the transistor; an oxide semiconductor film having a region disposed above the first insulating film and having a channel region of the transistor; a second conductive film having a region located above the first insulating film, functioning as the other electrode of the capacitor, and having a light-transmitting property; a second insulating film having a region disposed above the oxide semiconductor film and a region disposed above the second conductive film; a third conductive film electrically connected to the oxide semiconductor film and to the first electrode; a fourth conductive film that is electrically connected to the oxide semiconductor film, has a function as a first wiring electrically connected to the other of the source and the drain of the transistor, and has a region extending in a first direction across the pixel and an adjacent pixel; a fifth conductive film electrically connected to the second conductive film, having a function as a second wiring for supplying a potential to the second conductive film, and having a region extending in the first direction across the pixel and an adjacent pixel; a third insulating film having a region disposed above the second conductive film, a region disposed above the third conductive film, a region disposed above the fourth conductive film, and a region disposed above the fifth conductive film; a second electrode of the display element having a region disposed above the first electrode; the first electrode has a region disposed above the third insulating film, the second conductive film has a region that does not overlap the fifth conductive film and a region that does not overlap the second insulating film; the fifth conductive film does not overlap with the fourth conductive film, the second conductive film does not overlap with the fourth conductive film; Display device.

4. A pixel includes a transistor, a capacitor, and a display element. one of a source and a drain of the transistor is electrically connected to a first electrode of the display element; a display device in which one of a source and a drain of the transistor is electrically connected to one electrode of the capacitor element, a first conductive film having a region disposed above an insulating surface and functioning as a gate electrode of the transistor; a first insulating film having a region disposed above the first conductive film and functioning as a gate insulating film of the transistor; an oxide semiconductor film having a region disposed above the first insulating film and having a channel region of the transistor; a second conductive film having a region located above the first insulating film, functioning as the other electrode of the capacitor, and having a light-transmitting property; a second insulating film having a region disposed above the oxide semiconductor film and a region disposed above the second conductive film; a third conductive film electrically connected to the oxide semiconductor film and to the first electrode; a fourth conductive film that is electrically connected to the oxide semiconductor film, has a function as a first wiring electrically connected to the other of the source and the drain of the transistor, and has a region extending in a first direction across the pixel and an adjacent pixel; a fifth conductive film electrically connected to the second conductive film, having a function as a second wiring for supplying a potential to the second conductive film, and having a region extending in the first direction across the pixel and an adjacent pixel; a third insulating film having a region disposed above the second conductive film, a region disposed above the third conductive film, a region disposed above the fourth conductive film, and a region disposed above the fifth conductive film; a second electrode of the display element having a region disposed above the first electrode; the first electrode has a region disposed above the third insulating film, the second conductive film has a region that does not overlap the fifth conductive film and a region that does not overlap the second insulating film; the fifth conductive film does not overlap with the fourth conductive film, the second conductive film does not overlap with the third conductive film, the second conductive film does not overlap with the fourth conductive film; Display device.

5. In any one of claims 1 to 4, the oxide semiconductor film contains In, Ga, and Zn; Display device.

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