Semiconductor device

Abstract

To provide a highly reliable semiconductor device having an oxide semiconductor.SOLUTION: With a semiconductor device, an oxide semiconductor layer includes: a first region overlapping with a source electrode; a second region overlapping with a drain electrode; and a third region that does not overlap with the source electrode and the drain electrode. A film thickness of the oxide semiconductor layer in the third region is smaller than that in the first and the second regions. One end of the oxide semiconductor layer in the third region has a first taper. The other end of the oxide semiconductor layer in the third region has a second taper. An end of the source electrode has a third taper. An end of the drain electrode has a fourth taper. The first and the third tapers have a continuous shape. The second and the fourth tapers have a continuous shape.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a semiconductor device including an oxide semiconductor and a manufacturing method thereof. [Background technology]

[0002] A transistor using a semiconductor film formed on an insulating surface is indispensable for a semiconductor device. The manufacturing of transistors is limited by the heat resistance of the substrate, Amorphous silicon, which can be formed at a relatively low temperature, and SiO2, which is formed using laser light or catalytic elements. A transistor having an active layer made of polysilicon or the like obtained by crystallization is used in a semiconductor display device. It has become the mainstream transistor used in

[0003] In recent years, the high mobility provided by polysilicon and the low-temperature properties provided by amorphous silicon have been A new semiconductor material called oxide semiconductor has been developed that has both uniform device characteristics and excellent thermal conductivity. Metal oxides that exhibit semiconducting properties have been attracting attention. For example, indium oxide, a well-known metal oxide, is used in liquid crystal displays and other Metal oxides that exhibit semiconducting properties include, for example, , tungsten oxide, tin oxide, indium oxide, zinc oxide, etc. A transistor using a metal oxide that exhibits these characteristics in the channel formation region is already known ( Patent Document 1 and Patent Document 2). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0005] The transistors used in semiconductor devices have a small variation in threshold voltage due to degradation over time. In addition, it is desirable that the off-state current is low. The variation in threshold voltage due to deterioration over time is small. By using small transistors, the reliability of the semiconductor device can be improved. By using a transistor with a low current, the power consumption of a semiconductor device can be reduced. .

[0006] An object of the present invention is to provide a method for manufacturing a highly reliable semiconductor device. Another object of the present invention is to provide a method for manufacturing a semiconductor device with low power consumption. Another object of the present invention is to provide a semiconductor device having high reliability. One object of the present invention is to provide a semiconductor device.

[0007] Also, there is a semiconductor device called a power device that has high withstand voltage and is capable of controlling a large current. Currently, silicon is the main semiconductor material used in semiconductor devices. It is said that the physical properties of semiconductor elements that have been used up to now are reaching their theoretical limits. In order to realize a power device that can control a high voltage and a large current, it is necessary to improve the characteristics. There is a demand for new semiconductor materials that can withstand high voltages, have high conversion efficiency, and have high switching speeds. Examples of semiconductor materials that have the potential to improve various properties include silicon carbide and gallium nitride. Examples of compound semiconductors include silicon carbide, whose band gap is 3.26 The band gap of gallium nitride is 3.39 eV, and that of silicon is about three times that of silicon. It has a large band gap, which is advantageous for improving the breakdown voltage of semiconductor devices and reducing power loss. It is known that:

[0008] However, compound semiconductors such as silicon carbide and gallium nitride require high processing temperatures. The process temperature for silicon carbide is about 1500°C, while that for gallium nitride is about 1500°C. The temperature is approximately 1100°C, and it is impossible to form a film on a glass substrate, which has a low heat resistance. Therefore, it is not possible to use inexpensive glass substrates, and it is not possible to accommodate larger substrates. Semiconductor devices using compound semiconductors such as silicon nitride and gallium nitride are not suitable for mass production. This is an obstacle to practical application.

[0009] In view of the above problems, a semiconductor device for high power use using a new semiconductor material that is highly mass-producible is being developed. One of the purposes of the present invention is to provide [Means for solving the problem]

[0010] The present inventors have found that impurities such as hydrogen and water present in an oxide semiconductor film cause a shift in the threshold voltage. The researchers focused on the fact that this is a factor that causes deterioration over time in transistors. The oxide semiconductor film contains a large amount of hydrogen or water as an impurity. In view of this, in one embodiment of the present invention, a method for removing moisture, hydrogen, or the like from an oxide semiconductor film is disclosed. After the oxide semiconductor film is formed in order to reduce impurities, the oxide semiconductor film is exposed. In a reduced pressure atmosphere, in an inert gas atmosphere such as nitrogen or rare gas, in an oxygen gas atmosphere, or in an ultra Dry air (measured using a CRDS (Cavity Ring Down Laser Spectroscopy) type dew point meter When the moisture content is measured, it should be 20 ppm or less (-55°C in terms of dew point), preferably 1 ppm or less. The first heat treatment is performed under an atmosphere of 10 ppb or less of air. In order to further reduce impurities such as moisture or hydrogen in the semiconductor film, ion implantation or In the method, oxygen is added to the oxide semiconductor film by ion doping or the like, and then the oxide semiconductor film is again With the semiconductor film exposed, it is heated in a reduced pressure atmosphere, in an inert gas atmosphere such as nitrogen or rare gas, or in an oxygen atmosphere. Under nitrogen gas atmosphere or ultra-dry air (CRDS (Cavity Ring Down Laser Spectroscopy) When measured using a dew point meter, the moisture content is 20 ppm or less (-55°C in dew point equivalent). The second heat treatment is performed under an atmosphere of preferably 1 ppm or less, preferably 10 ppb or less (air). Do the following.

[0011] By the first heat treatment, impurities such as moisture or hydrogen in the oxide semiconductor film are reduced. However, this problem has not been completely eliminated and there is still room for improvement. This is believed to be due to hydrogen or hydroxyl groups bonded to the constituent metals. In the method, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like. By this, a bond between a metal constituting the oxide semiconductor and hydrogen or a bond between the metal and a hydroxyl group can be formed. and react these hydrogen or hydroxyl groups with oxygen to produce water. Then, by carrying out a second heat treatment after the addition of oxygen, the hydrogen that had remained strongly was eliminated. In addition, impurities such as hydroxyl groups can be easily eliminated as water.

[0012] By removing impurities such as moisture and hydrogen, the material becomes an i-type (intrinsic semiconductor) or an oxide that is very close to the i-type. If it were possible to obtain a compound semiconductor, it would be possible to develop transistors in which the threshold voltage is shifted by the above-mentioned impurities. This can prevent the deterioration of the characteristics of the transistor from being accelerated and reduce the off-current. impurities such as hydrogen or water contained in the oxide semiconductor are removed, and the oxide semiconductor is subjected to secondary ion mass spectrometry. (SIMS: Secondary Ion Mass Spectroscopy) The measured hydrogen concentration in the oxide semiconductor is 5×10 19 / cm 3 Hereinafter, preferably 5×10 18 / cm 3 Less than or equal to 5×10 17 / cm 3 The following is more preferable: is 1×10 16 / cm 3 In addition, the oxide semiconductor that can be measured by Hall effect measurement The carrier density of the membrane is 1×10 14 cm -3 Less than 1 x 10 12 cm -3 Not yet More preferably, it is 1×10 11 cm -3 That is, the oxide semiconductor The carrier density of the conductive film is close to zero. The band gap is preferably 2 eV or more. The potential is preferably 2.5 eV or more, and more preferably 3 eV or more. By using an oxide semiconductor film that has been highly purified by the above method, the off-state current of a transistor can be reduced. It is possible.

[0013] The above two heat treatments are performed at temperatures between 300℃ and 850℃ (or below the distortion point of the glass substrate). It is desirable to carry out this heat treatment within the temperature range. Note that this heat treatment should not exceed the heat resistance temperature of the substrate used. The effect of desorption of water or hydrogen by heat treatment was examined using the Thermogravimetric Desorption Spectroscopy (TDS) method. This was confirmed by thermal desorption spectroscopy (TGA). It has been approved.

[0014] The heat treatment is performed in a furnace or by rapid thermal annealing (RTA). The RTA method uses a lamp light source and moves the substrate into a heated gas for a short period of time. There is a method for performing heat treatment. The RTA method shortens the time required for heat treatment to less than 0.1 hours. It can also be time.

[0015] Specifically, a transistor using a highly purified oxide semiconductor film as described above can be For example, the channel width W is 1×10 4 Even if the device has a channel length of 3 μm, the off-current 10 -13 A or less, subthreshold swing value (S value) is about 0.1V / dec. (Gate insulating film thickness 100 nm) characteristics are obtained. The off-state current when the voltage is below 0 V, that is, the leakage current, is This is significantly lower than that of a transistor using

[0016] In addition, a transistor using a highly purified oxide semiconductor (purified OS) The temperature dependence of the off-current is almost nonexistent. This is because the electron donor (donor) in the oxide semiconductor By removing impurities that become a nucleator, the oxide semiconductor is highly purified, and the conductivity type is limited. This is because the Fermi level is located in the center of the forbidden band. This is because the energy gap of oxide semiconductors is 3 eV or more, and thermally excited carriers are extremely In addition, the source and drain electrodes are in a degenerate state. This is also the reason why there is no temperature dependency. Most of the carriers are injected from the electrode into the oxide semiconductor. This lack of temperature dependence can explain the above characteristic (no temperature dependence of off-current). do.

[0017] Oxide semiconductors include In-Sn-Ga-Zn-O oxide semiconductors, which are quaternary metal oxides. , In-Ga-Zn-O oxide semiconductors, which are ternary metal oxides, and In-Sn-Zn-O In-Al-Zn-O oxide semiconductors, In-Al-Zn-O oxide semiconductors, Sn-Ga-Zn-O oxide Semiconductors, Al-Ga-Zn-O oxide semiconductors, Sn-Al-Zn-O oxide semiconductors, etc. , In-Zn-O oxide semiconductors and Sn-Zn-O oxide semiconductors, which are binary metal oxides body, Al-Zn-O oxide semiconductor, Zn-Mg-O oxide semiconductor, Sn-Mg-O Oxide semiconductors, In-Mg-O oxide semiconductors, In-Ga-O oxide semiconductors, In -O-based oxide semiconductors, Sn-O-based oxide semiconductors, Zn-O-based oxide semiconductors, etc. In the present specification, for example, an In-Sn-Ga-Zn-O oxide is Semiconductors are those that contain indium (In), tin (Sn), gallium (Ga), and zinc (Zn). The stoichiometric composition ratio is not particularly important. The compound semiconductor may include silicon.

[0018] Alternatively, the oxide semiconductor may have the chemical formula InMO3(ZnO) m (m>0) Here, M represents one or more metal elements selected from Ga, Al, Mn, and Co. vinegar.

[0019] Here, the analysis of the hydrogen concentration in the oxide semiconductor film and the conductive film will be described. The hydrogen concentration in the semiconductor film and the conductive film was measured by secondary ion mass spectrometry (SIMS). SIMS analysis is performed using 2D ion mass spectroscopy (SIMS). In principle, it is difficult to obtain accurate data near the sample surface or near the interface between layers of different materials. It is known that it is difficult to obtain a uniform distribution of hydrogen concentration in the film. When analyzing with SIMS, there is no extreme fluctuation in the values ​​in the area where the target film exists. The average value in the region where a nearly constant value is obtained is adopted as the hydrogen concentration. When the thickness of the film to be measured is thin, the hydrogen concentration in the adjacent film affects the film thickness. In some cases, it may not be possible to find an area where the value of The maximum or minimum value of the hydrogen concentration is adopted as the hydrogen concentration in the film. In the region where If not present, the value at the inflection point is taken as the hydrogen concentration.

[0020] The transistor may be a bottom gate type or a top gate type. A bottom-gate transistor is a transistor in which the gate is on an insulating surface. a gate electrode, a gate insulating film on the gate electrode, and a gate insulating film overlapping the gate electrode An oxide semiconductor film, a source electrode and a drain electrode on the oxide semiconductor film, The top-gate transistor has an insulating film over an oxide semiconductor film. An oxide semiconductor film on the edge surface, a gate insulating film on the oxide semiconductor film, and A gate electrode and a source electrode overlap with the oxide semiconductor film and function as a conductive film. and a drain electrode and an insulating film on the source electrode, the drain electrode, and the oxide semiconductor film. Bottom-contact transistors have a gate electrode on an insulating surface and a gate a gate insulating film, a source electrode and a drain electrode on the gate insulating film, an oxide semiconductor film that is on the electrode and overlaps with the gate electrode on the gate insulating film; The gate insulating film includes a source electrode, a drain electrode, and an insulating film over the oxide semiconductor film.

[0021] In addition, the oxide semiconductor film is formed by sputtering or the like, and the oxide semiconductor film is also formed after the film formation. The hydrogen or water present around the semiconductor film is easily incorporated into the film. Water or hydrogen is a donor. Since the oxide semiconductor itself is easily formed with the ions, it is an impurity in the oxide semiconductor itself. In one embodiment, after the source electrode and the drain electrode are formed, the source electrode, the drain electrode and An insulating film using an insulating material with high barrier properties may be formed so as to cover the oxide semiconductor film. It is desirable to use an insulating material with high barrier properties for the insulating film. As a highly insulating film, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or a nitride oxide film is used. In the case where a plurality of laminated insulating films are used, the above Silicon oxide films and silicon oxynitride films, which contain a lower ratio of nitrogen than insulating films with high barrier properties, are The insulating film having a low nitrogen ratio is formed on the side closer to the oxide semiconductor film. A barrier layer having a barrier property is sandwiched between the source electrode, the drain electrode, and the oxide semiconductor film so as to overlap the source electrode, the drain electrode, and the oxide semiconductor film. By using an insulating film having a barrier property, Moisture or other substances may be present in the gate insulating film or in the vicinity of the interface between the oxide semiconductor film and other insulating films. can prevent impurities such as hydrogen from entering.

[0022] In addition, an insulating film using a material with high barrier properties may be provided between a gate electrode and an oxide semiconductor film. The film has a structure in which an insulating film such as a silicon oxide film or a silicon oxynitride film, which has a low ratio of nitrogen, is laminated. A gate insulating film such as a silicon oxide film or a silicon oxynitride film may be formed on the semiconductor substrate. is formed between the insulating film having a barrier property and the oxide semiconductor film. By using this method, impurities in the atmosphere such as moisture or hydrogen, or arsenic contained in the substrate can be removed. Impurities such as alkali metals and heavy metals may enter the oxide semiconductor film, the gate insulating film, or the oxide Therefore, it is possible to prevent the semiconductor from penetrating into the interface between the semiconductor film and another insulating film and its vicinity. Effect of the Invention

[0023] It is possible to provide a method for manufacturing a semiconductor device having high reliability. In addition, a highly reliable semiconductor device can be provided. In addition, a semiconductor device with low power consumption can be provided.

[0024] In addition, since high-voltage semiconductor elements can be fabricated at low film formation temperatures, large-scale manufacturing is possible. A semiconductor device for power applications can be provided. [Brief description of the drawings]

[0025] [Figure 1] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Diagram 2] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Diagram 3] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 4] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Diagram 5] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 6] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 7] FIG. [Figure 8] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 9] FIG. [Figure 10] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 11] 1A and 1B are a top view and a cross-sectional view of electronic paper. [Figure 12] FIG. 1 is a block diagram of a semiconductor display device. [Figure 13] FIG. 2 illustrates a configuration of a signal line driver circuit. [Figure 14] FIG. 1 is a circuit diagram showing a configuration of a shift register. [Figure 15] 1A and 1B are a diagram illustrating one embodiment of a shift register and a timing chart illustrating the operation of the shift register; [Figure 16] FIG. [Figure 17] FIG. 1 is a diagram showing a configuration of a module of a liquid crystal display device. [Figure 18] FIG. [Figure 19] 1A to 1C are diagrams of electronic devices using semiconductor devices. [Figure 20] FIG. 1 is a longitudinal cross-sectional view of an inverted staggered transistor including an oxide semiconductor. [Figure 21] FIG. 21 is an energy band diagram (schematic diagram) taken along the line A-A' of FIG. 20. [Figure 22] (A) shows a state in which a positive voltage (VG>0) is applied to the gate electrode (GE), and (B) shows a state in which a negative voltage (VG<0) is applied to the gate electrode (GE). [Figure 23] A diagram showing the relationship between the vacuum level, the work function of a metal (φM), and the electron affinity of an oxide semiconductor (χ). DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and the embodiments and aspects of the present invention may be modified without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications may be made to the details. However, the present invention should not be construed as being limited to the description of the following embodiment.

[0027] The present invention is applicable to integrated circuits such as microprocessors and image processing circuits, RF tags, semiconductors, etc. The semiconductor device can be used to manufacture various semiconductor devices, such as display devices. This refers to any device that can function by utilizing semiconductor characteristics, including semiconductor display devices, semiconductor circuits, etc. All electronic devices are semiconductor devices. Semiconductor display devices include liquid crystal display devices, organic light-emitting devices, Light-emitting devices with light-emitting elements such as OLEDs in each pixel, electronic paper, DMD (Digital Micromirror Device), PDP (Plasma Display Panel), FED(Field Emission Display) y) and other semiconductor display devices having circuit elements using semiconductor films in their driving circuits. It falls into that category.

[0028] (Embodiment 1) A bottom-gate transistor having a channel-etched structure will be taken as an example of a transistor according to one embodiment of the present invention. A structure of a transistor included in a semiconductor device and a manufacturing method thereof will be described.

[0029] As shown in FIG. 1(A), a gate electrode 101 is formed on a substrate 100 .

[0030] There is no significant limitation on the substrate that can be used as the substrate 100 having an insulating surface. At the very least, it is necessary for the material to have heat resistance sufficient to withstand subsequent heat treatment. For example, A glass substrate manufactured by a fusion method or a float method can be used. If the temperature of the subsequent heat treatment is high, the plate should have a distortion point of 730°C or higher. The glass substrate may be made of, for example, aluminosilicate glass or aluminoborosilicate glass. Glass materials such as fluoride glass and barium borosilicate glass are used. By containing more barium oxide (BaO) than boron oxide, more practical resistance is achieved. Thermal glass is obtained. For this reason, a glass substrate containing more BaO than B2O3 is used. is preferred.

[0031] Instead of the above glass substrate, an insulating substrate such as a ceramic substrate, a quartz substrate, or a sapphire substrate may be used. A substrate made of an insulating material may be used. Alternatively, crystallized glass may be used. A substrate having an insulating film provided on the surface of a metal substrate such as a stainless alloy may also be used.

[0032] In addition, substrates made of flexible synthetic resins such as plastics generally have a low heat resistance. However, as long as it can withstand the processing temperatures in the subsequent manufacturing steps, it is possible to use As a plastic substrate, polyethylene terephthalate (P Polyesters such as Polyethersulfone (PES), Polyethylene naphtha (PET), etc. Polyether ether ketone (PEN), polycarbonate (PC), polyether ether ketone (PEE K), polysulfone (PSF), polyetherimide (PEI), polyarylate (PA R), polybutylene terephthalate (PBT), polyimide, acrylonitrile butadiene Polystyrene resin, polyvinyl chloride, polypropylene, polyvinyl acetate, acrylic resin, etc. Examples include:

[0033] An insulating film serving as a base film may be formed between the substrate 100 and the gate electrode 101. Examples of the base film include a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a silicon nitride oxide film, and a nitride film. Either a single layer of aluminum film or a single layer of aluminum oxide nitride film, or multiple layers of aluminum oxide nitride film In particular, it is preferable to use an insulating film having a high barrier property, such as silicon nitride, as the undercoat film. A bare film, a silicon nitride oxide film, an aluminum nitride film, an aluminum nitride oxide film, or the like is used. By this, impurities in the atmosphere such as moisture or hydrogen, or arsenic contained in the substrate 100 can be removed. Impurities such as alkali metals and heavy metals may enter the oxide semiconductor film, the gate insulating film, or the oxide Therefore, it is possible to prevent the semiconductor from penetrating into the interface between the semiconductor film and another insulating film and its vicinity.

[0034] In this specification, an oxynitride is a material having a composition in which oxygen is more abundant than nitrogen. Nitrogen oxide is a substance that contains more nitrogen than oxygen. It refers to a substance.

[0035] The material of the gate electrode 101 is molybdenum, titanium, chromium, tantalum, tungsten, nickel, etc. Conductive materials made of metals such as chromium, chromium, and scandium, and alloys made mainly of these metals. The conductive film or the nitride of these metals can be used in a single layer or a multilayer structure. If it can withstand the temperature of the heat treatment performed in the process, the metal material is aluminum. Aluminum or copper can be used. Aluminum or copper avoids the problems of heat resistance and corrosion. To avoid this, it is recommended to use it in combination with high melting point metal materials. High melting point metal materials include: Molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, etc. There can be.

[0036] For example, a gate electrode 101 having a two-layer laminate structure may be formed by depositing molybdenum on an aluminum film. A two-layer structure with a molybdenum film laminated on a copper film, or a two-layer structure with a molybdenum film laminated on a copper film, or a two-layer structure in which a titanium nitride film or a tantalum nitride film is laminated on a copper film; It is preferable to have a two-layer structure in which a molybdenum film is laminated with a gate electrode. The electrode 101 may be an aluminum film, an aluminum-silicon alloy film, or an aluminum The intermediate layer is an alloy film of tungsten and titanium or an alloy film of aluminum and neodymium. The structure is a laminate of a tungsten nitride film, a titanium nitride film, or a titanium film as upper and lower layers. It is preferable that

[0037] In addition, the gate electrode 101 may be made of indium oxide, an indium oxide tin oxide alloy, or Zinc oxide alloy, zinc oxide, zinc aluminum oxide, zinc aluminum oxynitride, or oxide By using a transparent oxide conductive film such as zinc gallium oxide, the aperture ratio of the pixel area is improved. It can be done.

[0038] The thickness of the gate electrode 101 is 10 nm to 400 nm, preferably 100 nm to 200 nm. In this embodiment, a 150 nm sputtering method using a tungsten target is used. After forming a conductive film for the gate electrode of m, the conductive film is etched into a desired shape. The gate electrode 101 is formed by patterning. It is preferable that the end of the electrode is tapered, since this improves the coverage of the gate insulating film to be laminated thereon. The resist mask may be formed by an ink-jet method. When the ink jet method is used, no photomask is used, which reduces manufacturing costs.

[0039] Next, a gate insulating film 102 is formed on the gate electrode 101. The gate insulating film 102 is A silicon oxide film, a silicon nitride film, a silicon oxynitride film, a silicon nitride film, a silicon oxide ... Silicon oxide film, silicon oxynitride film, aluminum oxide film, aluminum nitride film, aluminum oxynitride film A single layer of niobium, aluminum oxide, hafnium oxide or tantalum oxide is used. The gate insulating film 102 can be formed by stacking layers. It is desirable to minimize the content of the silicon oxide film. A silicon target or a quartz target is used as the target, and a sputtering gas is The treatment is carried out using oxygen or a mixed gas of oxygen and argon.

[0040] By removing impurities, an oxide semiconductor that has been made i-type or substantially i-type (highly purified) Since the gate insulating film (a semiconductor made of a metal oxide) is extremely sensitive to the interface state and the interface charge, The interface with the gate insulating film 102 is important. The GI film is required to be of high quality.

[0041] For example, high-density plasma CVD using microwaves (2.45 GHz) produces dense, high-insulation-voltage This is preferable because it allows the formation of a high-quality insulating film with high purity oxide semiconductor and high-quality gate. By closely contacting the insulating film, the interface state is reduced and the interface characteristics are improved. Because it is possible.

[0042] Of course, if a good quality insulating film can be formed as a gate insulating film, sputtering is also possible. Other deposition methods such as the plasma CVD method and the like can be applied. Even if the insulating film has a gate insulating film quality and an interface property with an oxide semiconductor that are modified by In any case, the quality of the gate insulating film is good, and the oxidation Any material may be used as long as it can reduce the interface state density with the solid semiconductor and form a good interface.

[0043] Insulating films made of materials with high barrier properties, silicon oxide films with a low nitrogen ratio, and oxynitride films The gate insulating film 102 may have a structure in which an insulating film such as a silicon film is laminated. In this case, the insulating film such as a silicon oxide film or a silicon oxynitride film has a barrier property and an oxidizing property. The insulating film with high barrier properties is formed between the semiconductor film and the silicon nitride film. Examples of the barrier film include a silicon film, an aluminum nitride film, and an aluminum oxide nitride film. By using an insulating film with this property, impurities in the atmosphere such as moisture or hydrogen, or Impurities such as alkali metals and heavy metals contained in the oxide semiconductor film and the gate insulating film 1 02, or to the interface between the oxide semiconductor film and other insulating films or to the vicinity thereof. In addition, a silicon oxide film or an oxynitride film having a low ratio of nitrogen in contact with the oxide semiconductor film can be used. By forming an insulating film such as a silicon film, the insulating film made of a material with high barrier properties can be directly oxidized. This can prevent contact with the semiconductor film.

[0044] For example, the first gate insulating film is formed by sputtering to a thickness of 50 nm to 200 nm. The following silicon nitride films (SiN y (y>0) is formed, and a second gate insulating film is formed on the first gate insulating film. The insulating film is a silicon oxide film (SiO x (x>0) The gate insulating film 102 may be formed with a thickness of 100 nm. can be set appropriately depending on the characteristics required for the transistor, and is within the range of 350 nm to 400 nm. It can be about m.

[0045] In this embodiment, a silicon nitride film having a thickness of 50 nm is formed by sputtering. The gate insulating film 10 has a structure in which a silicon oxide film having a thickness of 100 nm formed by the above method is laminated. Form 2.

[0046] In order to prevent hydrogen, hydroxyl groups, and moisture from being contained in the gate insulating film 102 as much as possible, As a pretreatment for film formation, a gate electrode 101 is formed in a preheating chamber of a sputtering device. The substrate 100 is preheated to remove impurities such as hydrogen and moisture adsorbed on the substrate 100. The preheating temperature is preferably 100° C. or higher and 400° C. or lower. The temperature is preferably 150°C or higher and 300°C or lower. A pump is preferable. However, this preheating process may be omitted.

[0047] Next, a film having a thickness of 2 nm to 200 nm, preferably 3 nm, is deposited on the gate insulating film 102. The oxide semiconductor film 10 has a thickness of 3 nm to 20 nm, and more preferably has a thickness of 50 nm to 30 nm. The oxide semiconductor film 103 is formed by sputtering using an oxide semiconductor as a target. The oxide semiconductor film 103 is formed in a rare gas (eg, argon) atmosphere. Sputtering method under an atmosphere of oxygen, or under an atmosphere of rare gas (e.g., argon) and oxygen It can be formed by:

[0048] Note that before the oxide semiconductor film 103 was formed by a sputtering method, argon gas was introduced. A reverse sputtering process is performed to generate plasma, and dust particles adhering to the surface of the gate insulating film 102 are removed. It is preferable to remove the target. Reverse sputtering is a method of sputtering a target by applying no voltage to the target. In a nitrogen atmosphere, a voltage is applied to the substrate side using an RF power source to generate plasma near the substrate. It is also possible to use nitrogen or helium instead of the argon atmosphere. Alternatively, the treatment may be carried out in an argon atmosphere to which oxygen, nitrous oxide, etc. have been added. Alternatively, the treatment may be performed in an argon atmosphere to which chlorine, carbon tetrafluoride, or the like has been added.

[0049] For the oxide semiconductor film 103, any of the above-described oxide semiconductors can be used.

[0050] In this embodiment, an oxide containing In (indium), Ga (gallium), and Zn (zinc) is used. A 30 nm thick In-Ga-Zr alloy was obtained by sputtering using a gallium nitride semiconductor target. A nO-based non-single crystal film is used as the oxide semiconductor film 103. For example, the atomic ratio of each metal is In:Ga:Zn=1:1:0.5, In:Ga:Zn=1:1 Zn=1:1:2, or an oxide semiconductor target having a composition ratio of In:Ga:Zn=1:1:2. The oxide semiconductor film 103 can be grown in a rare gas (typically, argon) atmosphere. The process is carried out in air, oxygen, or a rare gas (typically argon) and oxygen atmosphere. It can be formed by sputtering. The film may be formed using a target containing 2% by weight or more and 10% by weight or less of iO2. The filling rate of the oxide semiconductor target containing In, Ga, and Zn is 90% or more and 100% or more. The filling rate of the oxide semiconductor target is preferably 95% or more and 99.9% or less. By using such a material, the oxide semiconductor film formed becomes a dense film.

[0051] The substrate is held in a processing chamber maintained in a reduced pressure state, and hydrogen and A sputtering gas from which moisture and oxygen have been removed is introduced, and a metal oxide is used as a target to sputter the metal oxide on the substrate 100. During the deposition, the substrate temperature is preferably set to 100° C. or higher and 600° C. or lower. Preferably, the temperature may be 200° C. or more and 400° C. or less. In this way, the impurity concentration in the formed oxide semiconductor film can be reduced. Damage caused by tarring is reduced. To remove residual moisture in the processing chamber, an adsorption type It is preferable to use a vacuum pump. For example, a cryopump, an ion pump, a titanium sa It is preferable to use a blimpation pump. Also, as the exhaust means, a turbo pump is used. A cold trap may be added to the vacuum chamber. The chamber may be filled with, for example, hydrogen atoms, water (HO) or other compounds containing hydrogen atoms (more preferably carbon Since the exhaust gas contains the oxide semiconductor film formed in the deposition chamber, This can reduce the concentration of impurities.

[0052] As an example of the deposition conditions, the distance between the substrate and the target is 100 mm, and the pressure is 0.6 Pa. The conditions were: DC power supply 0.5kW, oxygen (oxygen flow rate 100%) atmosphere. In addition, when a pulsed direct current (DC) power supply is used, the particles that are generated during film formation are called This is preferable because it can reduce dust that may be generated and the film thickness distribution can be made uniform. The thickness is 5 nm to 30 nm. The appropriate thickness varies depending on the oxide semiconductor material used. The thickness may be selected appropriately depending on the material.

[0053] Note that in order to prevent hydrogen, a hydroxyl group, and moisture from being contained in the oxide semiconductor film 103, In order to prepare the gate insulating film 102, the gate insulating film 102 is heated in a preheating chamber of the sputtering device as a pretreatment for the film formation. The substrate 100 on which the SiO 2 is formed is preheated to remove impurities such as hydrogen and moisture adsorbed on the substrate 100. It is preferable to desorb and exhaust the gas. The preheating temperature is 100°C to 400°C. The temperature is preferably 150° C. or higher and 300° C. or lower. A cryopump is preferable. This preheating process can be omitted. The pre-heating is performed before the insulating film 113 is formed, up to the source electrode 111 and the drain electrode 112. The same procedure may be carried out on the formed substrate 100 .

[0054] There are two types of sputtering: RF sputtering, which uses a high-frequency power source for the sputtering power supply, and D There is also the C sputtering method, which uses a pulsed bias. The RF sputtering method is mainly used to deposit insulating films, while the DC sputtering method is The deposition method is mainly used when forming a metal film.

[0055] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of films in the same chamber. It is also possible to form a film by discharging two or more materials at the same time.

[0056] In addition, a magnetron sputtering method using a magnet mechanism inside the chamber is used. The ECR device uses a plasma generated by microwaves instead of glow discharge. There is a sputtering device that uses the sputtering method.

[0057] In addition, as a method for forming a film using a sputtering method, a target material and a sputtering gas are interposed during film formation. Reactive sputtering method to form a compound thin film by chemically reacting with the silicon component. There is also a bias sputtering method in which a voltage is also applied to the substrate during film formation.

[0058] The gate insulating film 102 and the oxide semiconductor film 103 are successively formed without being exposed to the air. By continuously forming the film without exposing it to the air, the interface is free from water and hydrochloric acid. Each layer interface is free from contamination by atmospheric components and impurities floating in the air, such as carbon. Since it is possible to form a semiconductor device having a structure similar to that described above, it is possible to reduce variations in the transistor characteristics.

[0059] Next, as shown in FIG. 1B, the oxide semiconductor film 103 is etched or otherwise removed to a desired shape. The gate insulating film is formed at a position where the gate electrode 101 overlaps the gate electrode 101. An island-shaped oxide semiconductor film 104 is formed over the oxide semiconductor film 102 .

[0060] A resist mask for forming the island-shaped oxide semiconductor film 104 is formed by an inkjet method. If the resist mask is formed by the inkjet method, no photomask is required. This allows for reduced manufacturing costs.

[0061] In addition, when a contact hole is formed in the gate insulating film 102, the process is performed by forming an island-shaped oxide This can be performed when the semiconductor film 104 is formed.

[0062] Note that the etching for forming the island-shaped oxide semiconductor film 104 is performed by dry etching. Dry etching may be performed by wet etching or by both. The gas used may be a gas containing chlorine (chlorine-based gas, such as chlorine (Cl2), boron trichloride ( BCl3), silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc. are preferred. In addition, gases containing fluorine (fluorine-based gases, such as carbon tetrafluoride (CF4), sulfur hexafluoride (SF 6), nitrogen trifluoride (NF3), trifluoromethane (CHF3), etc.), hydrogen bromide (HB r), oxygen (O2), and rare gases such as helium (He) and argon (Ar) A gas containing , etc. can be used.

[0063] As a dry etching method, parallel plate type RIE (Reactive Ion Etch) ing method and ICP (Inductively Coupled Plasma) A combined plasma etching method can be used. It is possible to etch into the desired shape. The etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side) were set so that The amount of power used, the temperature of the electrode on the substrate, etc. are adjusted appropriately.

[0064] The etching solution used for wet etching is a mixture of phosphoric acid, acetic acid, and nitric acid, Organic acids such as enoic acid and oxalic acid can be used. The etching solution used after wet etching may be The etchant waste, including the removed material, is The liquid may be purified and the materials contained therein may be reused. By recovering and reusing materials such as indium contained in the membrane, resources can be used effectively. Costs can be reduced.

[0065] Note that reverse sputtering is performed before a conductive film is formed in the next step, and the island-shaped oxide semiconductor film 104 and It is also preferable to remove resist residues adhering to the surface of the gate insulating film 102. .

[0066] Next, the mixture is heated under a reduced pressure, an inert gas atmosphere such as nitrogen or a rare gas, an oxygen gas atmosphere, or The dew point was measured using a dew point meter that uses ultra-dry air (CRDS (Cavity Ring Down Laser Spectroscopy)). The moisture content measured by the method is 20 ppm or less (-55°C in terms of dew point), preferably 1 ppm or less. The oxide semiconductor film 10 is subjected to a fluorine-containing gas atmosphere (air atmosphere, more preferably 10 ppb or less). The oxide semiconductor film 104 is subjected to first heat treatment. By performing heat treatment on the oxide semiconductor film 104, As shown in FIG. 1, the oxide semiconductor film 105 from which moisture and hydrogen are released is formed. If heat treatment is performed at 300℃ to 850℃ (or at a temperature below the distortion point of the glass substrate), The RTA method allows dehydration or dehydrogenation in a short time, so the glass substrate It is possible to treat the material at a temperature exceeding the strain point. The oxide semiconductor film 104 was heated in a nitrogen atmosphere using an electric furnace at a substrate temperature of After heating for 1 hour at 450℃, the material was placed in a cool, dark place without contact with air or water. Thus, the oxide semiconductor film 105 is obtained.

[0067] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat from a heating element such as a resistance heating element. The apparatus may be equipped with a device for heating the object to be treated by radiation. For example, a GRTA (Gas Rapid Thermal Anneal) equipment, LRTA (Lamp Rapid Thermal Annealing equipment such as RTA (Rapid Thermal Annealing) The LRTA device can be used with halogen lamps, metal halide lamps, etc. lamp, xenon arc lamp, carbon arc lamp, high pressure sodium lamp, high pressure A device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp such as a mercury lamp. The GRTA device is a device that performs heat treatment using high-temperature gas.

[0068] For example, in the first heat treatment, the substrate is transferred into a gas heated to a high temperature of 650° C. to 700° C. After heating for a few minutes, the substrate is moved and taken out of the heated gas. TA may be performed. Using GRTA allows high-temperature heat treatment in a short time.

[0069] In the heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen introduced into the heat treatment device does not contain any hydrogen or other elements. The purity of rare gases such as helium, neon, and argon is preferably 6N (99.9999%) or higher. Preferably, 7N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less, It is preferable that the concentration of the ion exchange resin is 0.1 ppm or less.

[0070] Next, as shown in FIG. 1D, the oxide semiconductor film is subjected to ion implantation or ion doping. Oxygen is added by using the ion implantation method or the ion doping method. By adding oxygen to the oxide semiconductor film 105, an oxide semiconductor film to which oxygen is added in excess is obtained. The film 107 is formed. By adding oxygen, the metal and hydrogen constituting the oxide semiconductor are or the bond between the metal and the hydroxyl group, and The group reacts with oxygen to produce water. This makes it easier to eliminate impurities such as hydrogen or hydroxyl groups as water.

[0071] In the ion implantation method, a source gas is turned into plasma, and ion species contained in the plasma are extracted. The ion species having a predetermined mass are accelerated and then subjected to mass separation to be treated as an ion beam. The ion doping method is a method of injecting ions into a material. Ion species are extracted from the plasma by the action of a specific electric field, and the extracted ion species are analyzed by mass spectrometry. This method involves accelerating the ions without releasing them and injecting them into the workpiece as an ion beam. By adding oxygen using ion implantation, impurities such as metal elements are converted into oxides together with oxygen. The ion doping method can prevent the ions from being added to the semiconductor film. Compared to implantation, the area irradiated with the ion beam can be made larger, so the ion doping method By adding oxygen using the doping method, the tact time can be shortened.

[0072] When oxygen gas is used to add oxygen by ion implantation, the acceleration voltage should be set to 5 kV or higher and 100 kV or less, dose of 1×10 13 ions / cm 2 More than 1×10 16 ions / cm 2 The following would suffice.

[0073] In addition to the addition of oxygen to the oxide semiconductor film 105 by ion implantation, The substrate on which the semiconductor film 105 is formed is heated to 300° C. or higher and 850° C. or lower (or to a glass Heat treatment may be performed within a temperature range below the distortion point of the substrate.

[0074] Next, a second heat treatment is performed under the same conditions as the first heat treatment. Specifically, the reaction can be carried out under a reduced pressure atmosphere, under an inert gas atmosphere such as nitrogen or a rare gas, or in an oxygen atmosphere. Under nitrogen gas atmosphere or ultra-dry air (CRDS (Cavity Ring Down Laser Spectroscopy) When measured using a dew point meter, the moisture content is 20 ppm or less (-55°C in dew point equivalent). In an atmosphere of preferably 1 ppm or less, more preferably 10 ppb or less (air), If heat treatment is performed at 300℃ to 850℃ (or at a temperature below the distortion point of the glass substrate), The RTA method allows dehydration or dehydrogenation in a short time, so the glass substrate It is possible to treat the material at a temperature exceeding the strain point. Using an electric furnace, the substrate temperature was kept at 450°C for 1 hour in a nitrogen atmosphere. After the heat treatment, the material is not exposed to the air and water and hydrogen are prevented from re-mixing. The oxide semiconductor film 108 is obtained as shown in FIG. This may be carried out multiple times after the formation of the body membrane 108.

[0075] In one embodiment of the present invention, oxygen is added to the oxide semiconductor film 105 to form an oxide semiconductor. The bond between the metal and hydrogen or the bond between the metal and a hydroxyl group is broken, and These hydrogen or hydroxyl groups react with oxygen to produce water. Therefore, after the addition of oxygen, By carrying out the second heat treatment, impurities such as hydrogen or hydroxyl groups that have remained strongly are converted into water. Therefore, the islands formed by the heat treatment can be easily removed. The oxide semiconductor film 108 has a shape similar to that of the oxide semiconductor film 108. Since impurities such as hydrogen and the like are removed, the oxide semiconductor film 105 after the first heat treatment is Furthermore, it becomes i-type (intrinsic semiconductor) or close to i-type. The above impurities cause the semiconductor to desorb and become i-type (intrinsic semiconductor) or very close to i-type. This prevents the deterioration of transistor characteristics, such as a shift in the value voltage, and reduces the off-current. It can be reduced.

[0076] Also, at 85°C, 2 x 10 6 V / cm, 12-hour gate bias and thermal stress test (BT In the test, when impurities were added to the oxide semiconductor, The bonds to the main component are broken by a strong electric field (B: bias) and high temperature (T: temperature), generating The dangling bonds induce a drift in the threshold voltage (Vth). However, As described above, the interface characteristics between the gate insulating film and the oxide semiconductor film are improved, and the oxide semiconductor film is also resistant to oxidation. By removing impurities, especially hydrogen and water, from the semiconductor film, the BT test is Therefore, a more stable transistor can be obtained.

[0077] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat from a heating element such as a resistance heating element. The apparatus may be equipped with a device for heating the object to be treated by radiation. For example, a GRTA (Gas Rapid Thermal Anneal) equipment, LRTA (Lamp Rapid Thermal Annealing equipment such as RTA (Rapid Thermal Annealing) The LRTA device can be used with halogen lamps, metal halide lamps, etc. lamp, xenon arc lamp, carbon arc lamp, high pressure sodium lamp, high pressure A device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp such as a mercury lamp. The GRTA device is a device that performs heat treatment using high-temperature gas.

[0078] For example, in the second heat treatment, the substrate is transferred into a gas heated to a high temperature of 650°C to 700°C. After heating for a few minutes, the substrate is moved and taken out of the heated gas. TA may be performed. Using GRTA allows high-temperature heat treatment in a short time.

[0079] In the heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen introduced into the heat treatment device does not contain any hydrogen or other elements. The purity of rare gases such as helium, neon, and argon is preferably 6N (99.9999%) or higher. Preferably, 7N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less, It is preferable that the concentration of the ion exchange resin is 0.1 ppm or less.

[0080] Through the above process, the concentration of hydrogen in the oxide semiconductor film can be reduced and the oxide semiconductor film can be highly purified. This makes it possible to stabilize the oxide semiconductor film. By heat treatment, an oxide semiconductor film with extremely low carrier density and a wide band gap is formed. Therefore, a transistor can be manufactured using a large-area substrate. Therefore, mass productivity can be improved. By using a semiconductor film, it is possible to achieve high voltage resistance, low short channel effect, and high on-off ratio. It is possible to fabricate a transistor with low resistance.

[0081] Next, as shown in FIG. 2A, a A conductive film that becomes a source electrode and a drain electrode (including wiring formed in the same layer as these electrodes) is formed. After the formation, the conductive film is patterned to form a source electrode 111 and a drain electrode 11 The conductive film may be formed by sputtering or vacuum deposition. The materials for the conductive film that will be the doped electrode (including the wiring formed in the same layer) are Al, Elements selected from Cr, Cu, Ta, Ti, Mo, and W, or elements containing the above elements Examples of the alloy include an alloy film made of the above elements, and an alloy film made of a combination of the above elements. A high melting point metal film such as Cr, Ta, Ti, Mo, or W is laminated on the upper or lower side of the metal film. In addition, Si, Ti, Ta, W, Mo, Cr, Nd, Sc, Y, etc. An Al material that contains elements that prevent the formation of hillocks and whiskers in the Al film. By using this, it is possible to improve heat resistance.

[0082] The conductive film may have a single layer structure or a laminated structure of two or more layers. A single-layer structure of an aluminum film containing titanium, a two-layer structure of a titanium film laminated on an aluminum film, and a Ti A Ti film is then laminated on top of the Ti film, an aluminum film is then laminated on top of the Ti film, and a Ti film is then formed on top of that. Three-layer structure, etc.

[0083] Also, conductive material that becomes the source electrode and the drain electrode (including wiring formed in the same layer as these) The film may be formed of a conductive metal oxide. In2O3, tin oxide (SnO2), zinc oxide (ZnO), indium oxide Tin oxide alloy (In2O3-SnO2, abbreviated as ITO), indium oxide zinc oxide alloy (In2O3-ZnO) or the metal oxide material containing silicon or silicon oxide The mixture can be used.

[0084] When a heat treatment is performed after the conductive film is formed, the conductive film is required to have heat resistance to withstand the heat treatment. It is preferable that

[0085] Then, a resist mask is formed on the conductive film, and selective etching is performed to form a source electrode 1. 11. After forming the drain electrode 112, the resist mask is removed.

[0086] In the photolithography process, ultraviolet light or KrF laser light is used for exposure when forming a resist mask. The lower end and the drain electrode adjacent to each other on the oxide semiconductor film 108 are The channel length L of the transistor to be formed later is determined by the gap width between the drain electrode and the bottom end of the In addition, when performing exposure with a channel length L of less than 25 nm, the exposure time is set to a value of several nm to several tens of nm. Extreme ultraviolet light with an extremely short wavelength of 1.5 m is used. This is used for exposure when forming a resist mask in the photolithography process. Exposure to extreme ultraviolet light is The resolution is high and the depth of focus is large. Therefore, the channel length L of the transistor to be formed later is It is also possible to make the thickness 10 nm or more and 1000 nm or less, which will increase the operating speed of the circuit. Furthermore, since the off-state current value is extremely small, power consumption can also be reduced.

[0087] Note that the conductive film is etched so as not to remove the oxide semiconductor film 108 as much as possible. The materials and etching conditions are adjusted appropriately.

[0088] In this embodiment, a titanium film is used as the conductive film, and a solution containing ammonia and hydrogen peroxide (a The conductive film is wet-etched using ammonia / peroxide mixture to form a source electrode 111, The drain electrode 112 is formed. Specifically, the solution containing ammonia / hydrogen peroxide is 31% by weight. A mixture of 28% hydrogen peroxide, 28% ammonia water, and water in a volume ratio of 5:2:2. Using a solution or gas containing chlorine (Cl2), boron chloride (BCl3), etc. Alternatively, the conductive film may be dry etched.

[0089] When the source electrode 111 and the drain electrode 112 are formed by the above patterning, island-like The exposed portion of the oxide semiconductor film 108 is partially etched, so that an island-shaped oxide semiconductor A groove (concave) may be formed in the body film 108. A resist mask for forming the electrode 112 may be formed by an ink-jet method. If the mask is formed by the inkjet method, no photomask is used, so the manufacturing cost is reduced. can be reduced.

[0090] In order to reduce the number of photomasks and steps used in the photolithography process, A resist mask formed by a multi-tone mask that gives multiple levels of intensity to the light is used. The resist mask formed using the multi-tone mask may be a multi-layer mask. The shape can be further modified by etching. Therefore, it can be used in multiple etching processes to process different patterns. A single multi-tone mask can be used to register at least two different patterns. Therefore, the number of exposure masks can be reduced, and the corresponding The photolithography process can also be eliminated, making it possible to simplify the process.

[0091] Next, a plasma treatment is performed using a gas such as N2O, N2, or Ar. The annealing process removes adsorbed water and other substances adhering to the exposed surface of the oxide semiconductor film. Alternatively, the plasma treatment may be performed using a mixed gas of oxygen and argon.

[0092] After the plasma treatment, as shown in FIG. 2(B), the source electrode 111 and the drain electrode The insulating film 113 is formed so as to cover the electrode 112 and the oxide semiconductor film 108. 3 is preferably a single-layer insulating film that contains as little impurities as possible, such as moisture and hydrogen. The insulating film 113 may contain hydrogen or may be formed of a plurality of insulating films. When hydrogen is introduced into the oxide semiconductor film, the hydrogen penetrates the oxide semiconductor film, or the hydrogen is absorbed into the oxide semiconductor film. This causes the back channel of the oxide semiconductor film to become low-resistance (n-type), resulting in a parasitic Therefore, the insulating film 113 should contain as little hydrogen as possible. It is important that hydrogen is not used in the film formation process so that the insulating film 113 is a thin film. It is desirable to use a material with high barrier properties. For example, a nitride insulating film with high barrier properties is used. A silicon film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide nitride film, or the like is used. In the case where a plurality of laminated insulating films are used, the insulating film having a high barrier property can be used. In addition, insulating films such as silicon oxide films and silicon oxynitride films with a low nitrogen ratio are used as the oxide semiconductor film 1. Then, an insulating film with a low nitrogen ratio is sandwiched between the source electrode 1 and the source electrode 2. 11, a barrier film having a barrier property is provided so as to overlap with the drain electrode 112 and the oxide semiconductor film 108. An insulating film is formed. By using an insulating film having a barrier property, In the gate insulating film 102, or at the interface between the oxide semiconductor film 108 and other insulating films and in the vicinity thereof In addition, impurities such as moisture and hydrogen can be prevented from entering the oxide semiconductor film. Form an insulating film such as a silicon oxide film or a silicon oxynitride film with a low nitrogen ratio in contact with 108. In this way, the insulating film using a material with a high barrier property is in direct contact with the oxide semiconductor film 108. This can be prevented.

[0093] In this embodiment, a silicon oxide film having a thickness of 200 nm is formed by sputtering. The insulating film 113 has a structure in which a silicon nitride film having a thickness of 100 nm formed by a method is laminated. The substrate temperature during film formation may be set to a temperature between room temperature and 300° C. in this embodiment. The temperature is 100°C.

[0094] Note that heat treatment may be performed after the insulating film 113 is formed. In a gas (argon, helium, etc.) atmosphere, preferably at 200°C to 400°C The subsequent process is carried out, for example, at 250° C. or higher and 350° C. or lower. In this embodiment, for example, the process is carried out in a nitrogen atmosphere. Alternatively, the source electrode 111 and the drain electrode 11 Before forming the oxide semiconductor film 2, the oxide semiconductor film 2 was heated at high temperature for a short time in the same manner as the heat treatment performed on the oxide semiconductor film 2. RTA treatment may be performed. After the exposed region of the oxide semiconductor film 108 and the insulating film 113 containing oxygen are provided in contact with each other, By the heat treatment, oxygen is supplied to the oxide semiconductor film 108; The region of the compound semiconductor film 108 in contact with the insulating film 113 is selectively made into an oxygen-excess state. As a result, it is possible to obtain a structure that satisfies the stoichiometric composition ratio, and the gate electrode The channel formation region overlapping with 101 becomes an I-type, improving the electrical characteristics of the transistor and The timing of the heat treatment is determined based on the insulating film thickness. There is no particular limitation as long as it is after the formation of 113, and other processes, such as heat treatment during resin film formation, This process also serves as a heat treatment to reduce the resistance of the transparent conductive film, so there is no need to increase the number of processes. It is possible to do so.

[0095] Through the above steps, the transistor 114 is formed.

[0096] FIG. 2C shows a top view of the transistor 114 shown in FIG. The cross-sectional view taken along dashed line A1-A2 in FIG.

[0097] The transistor 114 includes a gate electrode 101 formed on a substrate 100 having an insulating surface. A gate insulating film 102 is formed on the gate electrode 101, and a gate electrode is formed on the gate insulating film 102. The oxide semiconductor film 108 overlapping the electrode 101 and the oxide semiconductor film 108 formed thereon A pair of source electrodes 111 and drain electrodes 112 are provided. The insulating film 113 formed over the oxide semiconductor film 108 may be included in the semiconductor device 14. The transistor 114 shown in FIG. The oxide semiconductor film 108 is partly etched between the first and second electrodes to form a channel etch structure. do.

[0098] In addition, the transistor 114 has been described as having a single gate structure. If necessary, a transistor having a multi-gate structure having a plurality of channel formation regions is also formed. It is possible.

[0099] Next, a conductive film is formed on the insulating film 113 and then patterned to form a As shown in FIG. 3(A), a back gate electrode 115 is formed at a position overlapping with the oxide semiconductor film 108. The back gate electrode 115 may be formed on the gate electrode 101 or the source electrode 11. The first and drain electrodes 112 can be formed using the same material and structure.

[0100] The thickness of the back gate electrode 115 is 10 nm to 400 nm, preferably 100 nm to 20 In this embodiment, a structure in which a titanium film, an aluminum film, and a titanium film are laminated is used. A conductive film having a structure is formed. Then, a resist mask is formed by photolithography. Then, unnecessary parts are removed by etching to process the conductive film into a desired shape (patterning). By performing a process of etching, the back gate electrode 115 is formed.

[0101] Next, as shown in FIG. 3B, an insulating film 116 is formed so as to cover the back gate electrode 115. The insulating film 116 is formed by absorbing moisture, hydrogen, oxygen, and the like in the atmosphere, which may damage the characteristics of the transistor 114. It is desirable to use materials with high barrier properties that can prevent the material from affecting the properties of the material. For example, insulating films with high barrier properties include silicon nitride films, silicon oxynitride films, and aluminum nitride films. Alternatively, an aluminum oxide nitride film or the like may be formed by plasma CVD or sputtering. In order to obtain a barrier effect, the insulating film 11 may be formed as a single layer or a multilayer. It is preferable that the film 6 is formed to a thickness of, for example, 15 nm to 400 nm.

[0102] In this embodiment, a 300 nm insulating film is formed by plasma CVD. The film formation conditions are as follows: The flow rate of silane gas was 4 sccm, the flow rate of nitrous oxide was 800 sccm, and the substrate temperature was 4 Let's assume that the temperature is 00℃.

[0103] FIG. 3C shows a top view of the semiconductor device shown in FIG. 1 corresponds to a cross-sectional view taken along dashed line A1-A2 in FIG.

[0104] Note that in FIG. 3B, the backgate electrode 115 covers the entire oxide semiconductor film 108. However, the present invention is not limited to this configuration. It is sufficient that the insulating film 104 overlaps with at least part of a channel formation region of the oxide semiconductor film 108. stomach.

[0105] The back gate electrode 115 may be in an electrically insulating floating state. In the latter case, the back gate electrode 115 may be in a state where a potential is applied thereto. The potential may be the same as that of the gate electrode 101, or may be a fixed potential such as ground. The level of the potential applied to the back gate electrode 115 can be controlled. Thus, the threshold voltage of the transistor 114 can be controlled.

[0106] As in this embodiment, impurities such as hydrogen and water contained in the oxide semiconductor film are removed as much as possible. How does purifying an oxide semiconductor film affect transistor characteristics? The following is an explanation of this.

[0107] FIG. 20 is a cross-sectional view of a transistor using an oxide semiconductor. An oxide semiconductor film (OS) is provided with a gate insulating film (GI) interposed therebetween, and a source electrode (S) and a drain electrode (D) are provided, and on the source electrode (S) and the drain electrode (D) An insulating film is provided on the

[0108] FIG. 21 shows an energy band diagram (schematic diagram) in the cross section taken along the line A-A' shown in FIG. In FIG. 21, black circles (●) represent electrons and white circles (○) represent holes. When a positive voltage (VD>0) is applied to the drain electrode (D), The dashed line indicates the case where no voltage is applied to the gate electrode (GE) (VG=0), and the solid line indicates the gate This shows the case where a positive voltage (VG>0) is applied to the gate electrode (GE). When no current is applied, the high potential barrier causes a large electric field from the source electrode (S) to the oxide semiconductor film ( This indicates the off state in which no carriers (electrons) are injected into the gate (OS) side, and no current flows. When a positive voltage is applied to the gate electrode (GE), the potential barrier decreases and the oxide semiconductor film (O S) in the on state.

[0109] FIG. 22 is an energy band diagram (schematic diagram) in the cross section taken along line B-B' in FIG. 20. FIG. 22(A) shows the state where a positive voltage (VG>0) is applied to the gate electrode (GE). This shows the on-state where carriers (electrons) flow between the source electrode and the drain electrode. FIG. 22(B) shows a state in which a negative voltage (VG<0) is applied to the gate electrode (GE). The off state (no minority carriers flow) is shown.

[0110] Figure 23 shows the relationship between the vacuum level and the work function (φ M ) and the electron affinity (χ) of the oxide semiconductor Shows.

[0111] At room temperature, electrons in metals are degenerate, and the Fermi level is located within the conduction band. Conventional oxide semiconductors are generally n-type, and the Fermi level (Ef) in this case is Located away from the intrinsic Fermi level (Ei) in the center of the gap and closer to the conduction band (Ec) In the oxide semiconductor, part of the hydrogen acts as a donor, and the oxide semiconductor becomes an n-type It is known that oxygen vacancies are also a factor in the formation of n-type semiconductors. It is known that there is.

[0112] In contrast, the oxide semiconductor according to the present invention can remove hydrogen, which is an n-type impurity, from the oxide semiconductor. The oxide semiconductor is highly purified by removing impurities other than the main component of the oxide semiconductor as much as possible. By removing oxygen vacancies, the oxide semiconductor becomes intrinsic (i-type) or as close to intrinsic as possible. That is, instead of adding impurities to make the oxide semiconductor i-type, By removing impurities such as silicon and water, and oxygen vacancies as much as possible, the i-type (intrinsic semiconductor) is highly purified. The present invention is characterized by obtaining an oxide semiconductor that is as close to an i-type (intrinsic semiconductor) as possible. With the above configuration, the Fermi level (Ef) is intrinsic to the Fermi level (Ei) as shown by the arrow. You can get as close as possible to the same level.

[0113] The band gap (Eg) of the oxide semiconductor is 3.15 eV and the electron affinity (χ) is 4.3 V. It is said that the work function of titanium (Ti) that constitutes the source and drain electrodes is The electron affinity (χ) of the oxide semiconductor is approximately equal to that of the metal-oxide semiconductor interface. In this case, no Schottky barrier is formed for electrons.

[0114] At this time, the electrons are transferred to the gate insulating film and the highly purified oxide semiconductor as shown in FIG. The electrons move through the lowest energetically stable portion on the oxide semiconductor side at the interface with the oxide semiconductor.

[0115] In FIG. 22B, when a negative voltage is applied to the gate electrode (GE), the minority capacitance Since the rear hole is essentially zero, the current is very close to zero.

[0116] For example, if the channel width (W) of a transistor is 1×10 4 μm and channel length (L) is 3 μm Even if the element has an off-current of 10 -13 A or less, the subthreshold swing value An S value of 0.1 V / dec. (gate insulating film thickness 100 nm) can be obtained.

[0117] In this way, we have tried to minimize the amount of impurities such as water and hydrogen other than the main components of oxide semiconductors. By highly purifying the oxide semiconductor film, the operation of a transistor can be improved. This can be done.

[0118] Note that in this embodiment, the oxide semiconductor film 103 is processed into a desired shape to form an island-like oxide semiconductor film. After forming the conductive film 104, a first heat treatment, oxygen addition, and a second heat treatment are performed. However, the present invention is not limited to this structure. The oxide semiconductor film 103 before the formation of the oxide semiconductor film 4 is subjected to first heat treatment, addition of oxygen, and second After the heat treatment, the shape of the oxide semiconductor film is processed to form an island-shaped oxide semiconductor film. Alternatively, the oxide semiconductor film 103 may be subjected to the first heat treatment and then The shape of the conductor film is processed to form an island-shaped oxide semiconductor film, and then the island-shaped oxide semiconductor Oxygen may be added to the film and a second heat treatment may be performed. After the first heat treatment and the addition of oxygen to the film 103, the shape of the oxide semiconductor film is changed. An island-shaped oxide semiconductor film is formed by processing the island-shaped oxide semiconductor film. The heat treatment may be performed as described above.

[0119] 4, the oxide semiconductor film 103 is subjected to first heat treatment, addition of oxygen, and second heat treatment. In the case where the shape of the oxide semiconductor film is processed to form an island-shaped oxide semiconductor film after the heat treatment, A manufacturing method for the above case will be described below.

[0120] First, the gate electrode 101 is formed on the substrate 100 according to the above-mentioned manufacturing process. A gate insulating film 102 and an oxide semiconductor film 103 are formed on a gate electrode 101 in this order. By this, the state shown in FIG. 1(A), that is, the state shown in FIG. 4(A) is produced. Next, As shown in FIG. 4B, the oxide semiconductor film 103 is subjected to first heat treatment, so that water is removed. The oxide semiconductor film 150 from which hydrogen is released is formed. As this has already been mentioned, the explanation will be omitted here.

[0121] Next, as shown in FIG. 4C, the oxide semiconductor film 150 is doped with a fluorine atom or a fluorine atom. By adding oxygen by ion implantation or the like, an oxide semiconductor to which excess oxygen has been added is obtained. A film 151 is formed. The specific method of adding oxygen has already been described, so here, The addition of oxygen reduces the bond between the metal and hydrogen that constitutes the oxide semiconductor. or by breaking the bond between the metal and the hydroxyl group and converting the hydrogen or hydroxyl group into It reacts with oxygen to produce water, so impurities can be removed by a second heat treatment. Hydrogen or hydroxyl groups, which are substances, can be easily eliminated as water. In parallel with the addition of oxygen to the oxide semiconductor film 150 by the addition method, the oxide semiconductor film 150 For the substrate on which the glass is formed, the temperature is 300°C to 850°C (or below the distortion point of the glass substrate) The heat treatment may be performed within a temperature range of 1000 to 2000° C.

[0122] Next, a second heat treatment is performed under the same conditions as the first heat treatment. By performing the second heat treatment, the oxide semiconductor film 1 can be formed as shown in FIG. By adding oxygen to the oxide semiconductor film 150, an oxide semiconductor is obtained. The bond between the metal and hydrogen or the bond between the metal and hydroxyl group is broken, and these hydrogen The hydrogen or hydroxyl groups react with oxygen to produce water. By carrying out heat treatment, impurities such as hydrogen or hydroxyl groups that had remained strongly are converted into water, Therefore, the island-like oxide formed by the heat treatment can be easily removed. The semiconductor film 152 contains moisture or hydrogen that has not been removed by the first heat treatment. Since impurities such as SiO 2 and SiO 2 are removed, the oxide semiconductor film 150 is more stable than the oxide semiconductor film 150 after the first heat treatment. Furthermore, it becomes an i-type (intrinsic semiconductor) or as close to an i-type as possible. Impurities such as moisture and hydrogen are eliminated. However, since it becomes an i-type (intrinsic semiconductor) or as close to i-type as possible, the above impurities cause the threshold voltage to This prevents the deterioration of transistor characteristics, such as the shift of the off-state current, and reduces the off-state current. It is possible.

[0123] Next, as shown in FIG. 4E, the oxide semiconductor film 152 is etched or otherwise removed to a desired shape. The gate insulating film is formed at a position where the gate electrode 101 overlaps the gate electrode 101. An island-shaped oxide semiconductor film 153 is formed over the oxide semiconductor film 102. Since this has already been described, the description will be omitted here.

[0124] In addition, before the subsequent process of forming the source electrode and the drain electrode shown in FIG. Then, a reverse sputtering process is performed to form a film on the surface of the island-shaped oxide semiconductor film 153 and the gate insulating film 102. It is preferable to remove any adhering resist residues.

[0125] Through the above process, the concentration of hydrogen in the oxide semiconductor film can be reduced and the oxide semiconductor film can be highly purified. This makes it possible to stabilize the oxide semiconductor film. By heat treatment, an oxide semiconductor film with extremely low carrier density and a wide band gap is formed. Therefore, a transistor can be manufactured using a large-area substrate. Therefore, mass productivity can be improved. By using a semiconductor film, it is possible to achieve high voltage resistance, low short channel effect, and high on-off ratio. It is possible to fabricate a transistor with low resistance.

[0126] (Embodiment 2) In this embodiment, the present invention is suitable for power devices that can control a higher voltage or a larger current. The structure and manufacturing method of the transistor will be described. Or parts and steps having similar functions can be performed in the same manner as in embodiment 1. , and a repeated explanation will be omitted.

[0127] As shown in FIG. 5A, after forming an insulating film 201 as a base film on a substrate 200, a first The electrode 202 is formed.

[0128] The substrate used for the substrate 200 is the same as that described for the substrate 100 in the first embodiment. For the material, structure and thickness of the insulating film 201, see the description of the embodiment. Please refer to the description of the undercoat film shown in 1.

[0129] The first electrode 202 is made of aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten, etc. A metal element selected from the group consisting of tin, tin, yttrium, and the like, or a composite material containing the above-mentioned metal elements. It is made of an alloy of the above-mentioned metal elements. A metal element selected from one or more of aluminum, zirconium, beryllium, and thorium. The first electrode 202 may have a single-layer structure or a laminate structure of two or more layers. For example, a single layer structure of an aluminum film containing silicon, Two-layer structure with titanium film laminated on tungsten film, two-layer structure with titanium film laminated on tungsten film The structure is a titanium film, an aluminum film is layered on top of the titanium film, and a titanium film is layered on top of that. In addition, titanium, tantalum, and An element selected from tungsten, molybdenum, chromium, neodymium, and scandium, Alternatively, a film made up of a combination of multiple layers, an alloy film, or a nitride film may be used.

[0130] The first electrode 202 is made of indium tin oxide or indium oxide containing tungsten oxide. Indium Zinc Oxide with Tungsten Oxide, Indium Zinc Oxide with Titanium Oxide Oxide, indium tin oxide containing titanium oxide, indium zinc oxide, silicon oxide A light-transmitting conductive material such as doped indium tin oxide can also be used. In addition, a laminated structure of the above-mentioned light-transmitting conductive material and the above-mentioned metal element may be used.

[0131] The first electrode 202 is formed by depositing a conductive film on the substrate 200 by sputtering, CVD, or vacuum deposition. A resist mask is formed on the conductive film by a photolithography process. The conductive film can be etched using the resist mask. The first electrode 202 is formed by a printing method or an inkjet method without using a photolithography process. By forming the first electrode 202 in a tapered shape, the number of steps can be reduced. This is preferable because it improves the coverage of the gate insulating film that is formed later. The angle between the end of the pole 202 and the insulating film 201 is set to 30° or more and 60° or less, preferably 40° or less. By setting the angle to between 15° and 50°, the coverage of the gate insulating film to be formed later can be improved. can be done.

[0132] In this embodiment, a conductive film to be the first electrode 202 is formed by a sputtering method. A 50 nm titanium film is formed, a 100 nm aluminum film is formed, and a 50 nm Next, a resist mask formed by a photolithography process is The first electrode 202 is formed by etching using a photolithography process. Instead of a resist mask formed by a lithography method, a resist mask was created by an inkjet method. By manufacturing the product in a single process, the number of steps can be reduced.

[0133] Next, an island-shaped oxide semiconductor film 203 is formed over the first electrode 202. The film 203 can be formed by a sputtering method, a coating method, a printing method, or the like. In this embodiment, an oxide semiconductor film is formed over the first electrode 202 by a sputtering method, and then The oxide semiconductor film is processed into a desired shape by etching or the like, whereby an island-shaped oxide semiconductor film is formed. A conductive film 203 is formed. The oxide semiconductor film is then etched under a rare gas (for example, argon) atmosphere. , in an oxygen atmosphere, or in an atmosphere of rare gas (e.g., argon) and oxygen, by sputtering. It can be formed more.

[0134] Note that the etching for forming the island-shaped oxide semiconductor film 203 is the same as that described in Embodiment 1. The etching for forming the island-shaped oxide semiconductor film is performed by referring to the description of the etching for forming the island-shaped oxide semiconductor film. However, the edge of the island-shaped oxide semiconductor film 203 formed by etching and the first The angle between the electrodes 202 is set to 30° or more and 60° or less, preferably 40° or more and 50° or less. This is preferable because it is possible to improve the coverage of the gate insulating film to be formed later. I wish.

[0135] Note that before the oxide semiconductor film is formed by a sputtering method, argon gas is introduced to the plasma In order to remove dust adhering to the surface of the first electrode 202, reverse sputtering is performed to generate ions. Reverse sputtering is a method in which a target is sputtered in an argon atmosphere without applying a voltage to the target. A voltage is applied to the substrate side using an RF power source to generate plasma near the substrate and modify the surface. In addition, nitrogen, helium, etc. may be used instead of the argon atmosphere. Alternatively, the treatment may be carried out in an atmosphere in which oxygen, nitrous oxide, etc. are added to an argon atmosphere. Alternatively, the treatment may be performed in a fluorine atmosphere to which chlorine, carbon tetrafluoride, or the like has been added.

[0136] The oxide semiconductor film 203 can be formed using any of the above-described oxide semiconductors.

[0137] In this embodiment, an oxide containing In (indium), Ga (gallium), and Zn (zinc) is used. A 30 nm thick In-Ga-Zr alloy was obtained by sputtering using a gallium nitride semiconductor target. A nO-based non-single crystal film is used as the oxide semiconductor film 203. For example, the atomic ratio of each metal is In:Ga:Zn=1:1:0.5, In:Ga:Zn=1:1 Zn=1:1:2, or an oxide semiconductor target having a composition ratio of In:Ga:Zn=1:1:2. In addition, the oxide semiconductor film can be formed under a rare gas (typically, argon) atmosphere. , in an oxygen atmosphere, or in an atmosphere of rare gas (typically argon) and oxygen. In addition, when the sputtering method is used, SiO2 The film may be formed using a target containing 2% by weight or more and 10% by weight or less of In. The filling rate of the oxide semiconductor target containing Ga and Zn is 90% or more and 100% or less. The filling rate is preferably 95% or more and 99.9% or less. As a result, the formed oxide semiconductor film becomes a dense film.

[0138] The substrate is held in a processing chamber maintained in a reduced pressure state, and hydrogen and A sputtering gas from which moisture and oxygen have been removed is introduced, and a metal oxide is used as a target to sputter the metal oxide on the substrate 200. During the deposition, the substrate temperature is preferably set to 100° C. or higher and 600° C. or lower. Preferably, the temperature may be 200° C. or more and 400° C. or less. In this way, the impurity concentration in the formed oxide semiconductor film can be reduced. Damage caused by tarring is reduced. To remove residual moisture in the processing chamber, an adsorption type It is preferable to use a vacuum pump. For example, a cryopump, an ion pump, a titanium sa It is preferable to use a blimpation pump. Also, as the exhaust means, a turbo pump is used. A cold trap may be added to the vacuum chamber. The chamber may be filled with, for example, hydrogen atoms, water (HO) or other compounds containing hydrogen atoms (more preferably carbon Since the exhaust gas contains the oxide semiconductor film formed in the deposition chamber, This can reduce the concentration of impurities.

[0139] In this embodiment, as an example of the deposition conditions of the oxide semiconductor film, the substrate temperature is room temperature, and the substrate and the substrate are heated to 1000.degree. The distance between the get and the target was 110 mm, the pressure was 0.4 Pa, the direct current (DC) power supply was 0.5 kW, and oxygen was and argon (oxygen flow rate 15sccm: argon flow rate 30sccm) atmosphere is suitable. In addition, when a pulsed direct current (DC) power supply is used, the particles generated during film formation are This is preferable because it can reduce dust, which is called "dust," and the film thickness distribution can be made uniform. is 1 μm or more, preferably 3 μm or more, and more preferably 10 μm or more. The appropriate thickness varies depending on the oxide semiconductor film material used, and the thickness should be selected appropriately depending on the material. That's good.

[0140] Note that in order to prevent hydrogen, a hydroxyl group, and moisture from being contained in the oxide semiconductor film 203 as much as possible, In order to achieve this, the first electrode 202 is heated in a preheating chamber of the sputtering device as a pretreatment for film formation. The formed substrate 200 is preheated to remove impurities such as hydrogen and moisture adsorbed on the substrate 200. It is preferable to separate the gas and evacuate the gas. The preheating temperature is 100℃ to 400℃. The temperature is preferably 150° C. or higher and 300° C. or lower. A Lyopump is preferable. This preheating process can be omitted. The pre-heating may be performed on the substrate 200 on which the gate electrode has been formed before the insulating film is formed. good.

[0141] There are two types of sputtering: RF sputtering, which uses a high-frequency power source for the sputtering power supply, and D There is also the C sputtering method, which uses a pulsed bias. The RF sputtering method is mainly used to deposit insulating films, while the DC sputtering method is The deposition method is mainly used when forming a metal film.

[0142] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The equipment can deposit layers of different materials in the same chamber, or multiple types of films in the same chamber. It is also possible to form a film by discharging two or more materials at the same time.

[0143] In addition, a magnetron sputtering method using a magnet mechanism inside the chamber is used. The ECR device uses a plasma generated by microwaves instead of glow discharge. There is a sputtering device that uses the sputtering method.

[0144] In addition, as a method for forming a film using a sputtering method, a target material and a sputtering gas are interposed during film formation. Reactive sputtering method to form a compound thin film by chemically reacting with the silicon component. There is also a bias sputtering method in which a voltage is also applied to the substrate during film formation.

[0145] Next, the mixture is heated under a reduced pressure, an inert gas atmosphere such as nitrogen or a rare gas, an oxygen gas atmosphere, or The dew point was measured using a dew point meter that uses ultra-dry air (CRDS (Cavity Ring Down Laser Spectroscopy)). The moisture content measured by the method is 20 ppm or less (-55°C in terms of dew point), preferably 1 ppm or less. The oxide semiconductor film 203 is subjected to a first treatment under an air atmosphere (preferably 10 ppb or less). By subjecting the oxide semiconductor film 203 to the heat treatment, the oxide semiconductor film 203 is transformed into a film as shown in FIG. In this manner, the oxide semiconductor film 205 from which moisture and hydrogen are eliminated is formed. C. or higher and 850.degree. C. or lower (or a temperature equal to or lower than the distortion point of the glass substrate). By using the RTA method, dehydration or dehydrogenation can be performed in a short time, so the strain point of the glass substrate can be reduced. In this embodiment, a heat treatment apparatus, which is an electric heat treatment apparatus, is used. The oxide semiconductor film 203 was heated in a nitrogen atmosphere at a substrate temperature of 450 After heating for 1 hour at ℃, the mixture was remixed with water and hydrogen without exposure to air. The intrusion of oxygen is prevented, and an oxide semiconductor film 205 is obtained.

[0146] For a detailed explanation of the heat treatment device used in the first heat treatment, This has already been described in form 1, so it will be omitted here.

[0147] In addition, in the heat treatment, nitrogen or rare gas such as helium, neon, or argon is mixed with water. It is preferable that the nitrogen introduced into the heat treatment device does not contain any hydrogen or other elements. The purity of rare gases such as helium, neon, and argon is preferably 6N (99.9999%) or higher. Preferably, 7N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less, It is preferable that the concentration of the ion exchange resin is 0.1 ppm or less.

[0148] Next, as shown in FIG. 5C, the oxide semiconductor film 205 is subjected to ion implantation or ion implantation. Oxygen is added by using a doping method, such as ion implantation or ion doping. By adding oxygen to the oxide semiconductor film 205 using the above-mentioned method, an oxide semiconductor film to which oxygen is added in excess can be obtained. A semiconductor film 207 is formed. By adding oxygen, the metal and water constituting the oxide semiconductor are The bond between the metal and the hydroxyl group is broken, and the hydrogen or The hydroxyl groups react with oxygen to produce water. This allows the second heat treatment to be carried out later. This makes it easier to eliminate impurities such as hydrogen or hydroxyl groups as water.

[0149] When oxygen gas is used to add oxygen by ion implantation, the acceleration voltage should be set to 5 kV or higher and 100 kV or less, dose of 1×10 13 ions / cm 2 More than 1×10 16 ions / cm 2 The following would suffice.

[0150] In addition to the addition of oxygen to the oxide semiconductor film 205 by ion implantation, The substrate on which the semiconductor film 205 is formed is heated to 300° C. or higher and 850° C. or lower (or to a glass Heat treatment may be performed within a temperature range below the distortion point of the substrate.

[0151] Next, a second heat treatment is performed under the same conditions as the first heat treatment. Specifically, the reaction can be carried out under a reduced pressure atmosphere, under an inert gas atmosphere such as nitrogen or a rare gas, or in an oxygen atmosphere. Under nitrogen gas atmosphere or ultra-dry air (CRDS (Cavity Ring Down Laser Spectroscopy) When measured using a dew point meter, the moisture content is 20 ppm or less (-55°C in dew point equivalent). In an atmosphere of preferably 1 ppm or less, preferably 10 ppb or less, C. or higher and 850.degree. C. or lower (or a temperature equal to or lower than the distortion point of the glass substrate). By using the RTA method, dehydration or dehydrogenation can be performed in a short time, so the strain point of the glass substrate can be reduced. In this embodiment, a heat treatment apparatus, which is an electric heat treatment apparatus, is used. The substrate was heated in a nitrogen atmosphere at 450°C for 1 hour. After the treatment, the oxide semiconductor film 208 is formed without being exposed to the air and without being recontaminated by water or hydrogen. Note that the heat treatment may be performed multiple times after the island-shaped oxide semiconductor film 208 is formed. stomach.

[0152] In one embodiment of the present invention, an oxide semiconductor is formed by adding oxygen to the oxide semiconductor film 205. The bond between the metal and hydrogen or the bond between the metal and a hydroxyl group is broken, and These hydrogen or hydroxyl groups react with oxygen to produce water. Therefore, after the addition of oxygen, By carrying out the second heat treatment, impurities such as hydrogen or hydroxyl groups that have remained strongly are converted into water. Therefore, the islands formed by the heat treatment can be easily removed. The oxide semiconductor film 208 has a shape similar to that of the oxide semiconductor film 208. Since impurities such as hydrogen and the like are removed, the oxide semiconductor film 205 after the first heat treatment is Furthermore, it becomes i-type (intrinsic semiconductor) or close to i-type. The above impurities cause the semiconductor to desorb and become i-type (intrinsic semiconductor) or very close to i-type. This prevents the deterioration of transistor characteristics, such as a shift in the value voltage, and reduces the off-current. It can be reduced.

[0153] Also, at 85°C, 2 x 10 6 V / cm, 12-hour gate bias and thermal stress test (BT In the test, when impurities were added to the oxide semiconductor, The bonds to the main component are broken by a strong electric field (B: bias) and high temperature (T: temperature), generating The dangling bonds induce a drift in the threshold voltage (Vth). However, As described above, the interface characteristics between the gate insulating film and the oxide semiconductor film are improved, and the oxide semiconductor film is also resistant to oxidation. By removing impurities, especially hydrogen and water, from the semiconductor film, the BT test is Therefore, a more stable transistor can be obtained.

[0154] For a detailed explanation of the heat treatment device used in the second heat treatment, This has already been described in form 1, so it will be omitted here.

[0155] In the heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen introduced into the heat treatment device does not contain any hydrogen or other elements. The purity of rare gases such as helium, neon, and argon is preferably 6N (99.9999%) or higher. Preferably, 7N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less, It is preferable that the concentration of the ion exchange resin is 0.1 ppm or less.

[0156] Through the above process, the concentration of hydrogen in the oxide semiconductor film can be reduced and the oxide semiconductor film can be highly purified. This makes it possible to stabilize the oxide semiconductor film. By heat treatment, an oxide semiconductor film with extremely low carrier density and a wide band gap is formed. Therefore, a transistor can be manufactured using a large-area substrate. Therefore, mass productivity can be improved. By using a semiconductor film, it is possible to achieve high voltage resistance, low short channel effect, and high on-off ratio. It is possible to fabricate a transistor with low resistance.

[0157] Next, as shown in FIG. 5E, a second electrode 211 is formed over the oxide semiconductor film 208. The material and structure of the conductive film used for the second electrode 211 are the same as those of the first electrode 202. The second electrode 211 can be formed in the same manner as described above. It can be implemented in the same manner as the first electrode 202 .

[0158] In this embodiment, a photolithography process is performed to form a lithographic pattern on a conductive film that is to become the second electrode 211. A resist mask is formed, and the conductive film is etched using the resist mask to form a second conductive film. Here, a conductive film having a thickness of 50 nm is used as the second electrode 211. A titanium film, an aluminum film having a thickness of 100 nm, and a titanium film having a thickness of 50 nm are laminated in this order. The angle between the edge of the second electrode 211 and the oxide semiconductor film 208 is set to be greater than or equal to 30° and less than or equal to 60°. .degree. or less, preferably 40.degree. to 50.degree. This is preferable because it can improve the coverage. The second electrode 202 is formed at a position spaced apart from the first electrode 202 without contacting the first electrode 202 .

[0159] One of the first electrode 202 and the second electrode 211 serves as a source electrode of a transistor, and the other serves as a The other electrode functions as the drain electrode.

[0160] After the second electrode 211 is formed, heat treatment may be performed. The temperature for the heat treatment is 400° C. The temperature is set to 850° C. or lower, preferably 400° C. or higher but lower than the distortion point of the substrate. The substrate is placed in an electric furnace, which is a type of heat treatment device, and nitrogen is applied to the oxide semiconductor film 208. The heat treatment was performed at 450°C for 1 hour under an inert gas atmosphere such as rare gas. After that, by not exposing the oxide semiconductor film to the air, hydrogen, water, a hydroxyl group, hydride, or the like is prevented from being added to the oxide semiconductor film. By preventing re-entry of hydrogen, the hydrogen concentration is further reduced and the hydrogen is highly purified, resulting in i-type or essentially In this way, an i-type oxide semiconductor film can be obtained.

[0161] In the heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the heat treatment does not contain hydrogen, water, hydroxyl groups, hydrides, etc. The purity of nitrogen or rare gases such as helium, neon, and argon introduced into the treatment equipment must be 6N or less. (99.9999%) or more, preferably 7N (99.99999%) or more (i.e. impurities It is preferable to keep the concentration at 1 ppm or less, and preferably at 0.1 ppm or less.

[0162] FIG. 7A shows the first electrode 202, the oxide semiconductor film 208, and the second electrode 21 in FIG. 7A shows a top view of the semiconductor device 1. The cross-sectional view taken along the dashed line B1-B2 in FIG. 7A corresponds to FIG. Equivalent.

[0163] Next, as shown in FIG. 6A, the first electrode 202, the oxide semiconductor film 208, the second electrode A gate insulating film 212 is formed so as to cover the electrode 211, and a gate electrode is formed on the gate insulating film 212. The electrode 213 is formed on the gate insulating film 212 by a plasma CVD method, a sputtering method, or the like. Using the above, silicon oxide film, silicon nitride film, silicon oxynitride film, silicon nitride oxide film, aluminum oxide film, Aluminum film, aluminum nitride film, aluminum oxynitride film, aluminum nitride oxide film, aluminum oxide film, A tantalum oxide film or a tantalum oxide film can be formed as a single layer or a laminated layer.

[0164] The gate insulating film 212 is made of hafnium silicate (HfSiO x ), N is added HfSi x O y , nitrogen-doped hafnium aluminate (HfAlO x ), oxidation Use of high-k materials such as hafnium oxide and yttrium oxide reduces gate leakage. Furthermore, high-k materials and silicon oxide films, silicon nitride films, and oxynitride films can be used. A laminate of at least one of a silicon film, a silicon oxynitride film, and an aluminum oxide film The thickness of the gate insulating film 212 is set to 50 nm or more and 500 nm or less. By increasing the thickness of the gate insulating film 212, the gate leakage current can be reduced. It is possible.

[0165] It is desirable that the gate insulating film 212 contains as little impurities as possible, such as moisture and hydrogen. When forming a silicon oxide film by the ion beam deposition method, a silicon target is used as the target. The sputtering gas is oxygen or a mixture of oxygen and argon. This is done using a gas.

[0166] By removing impurities, an oxide semiconductor that has been made i-type or substantially i-type (highly purified) Since the gate insulating film (a semiconductor made of a metal oxide) is extremely sensitive to the interface state and the interface charge, The interface with the highly purified oxide semiconductor is important. The GI film is required to be of high quality.

[0167] For example, high-density plasma CVD using microwaves (2.45 GHz) produces dense, high-insulation-voltage This is preferable because it allows the formation of a high-quality insulating film with high purity oxide semiconductor and high-quality gate. By closely contacting the insulating film, the interface state is reduced and the interface characteristics are improved. Because it is possible.

[0168] Of course, if a good insulating film can be formed as the gate insulating film 212, sputtering is also possible. Other film formation methods such as the ring method and plasma CVD method can be applied. The film quality of the gate insulating film 212 and the interface characteristics with the oxide semiconductor are modified by heat treatment. In any case, it is of course important that the film quality as a gate insulating film is good. If the interface state density with the oxide semiconductor can be reduced and a good interface can be formed, good.

[0169] Insulating films made of materials with high barrier properties, silicon oxide films with a low nitrogen ratio, and oxynitride films The gate insulating film 212 may be formed to have a structure in which an insulating film such as a silicon film is laminated. In this case, the insulating film such as a silicon oxide film or a silicon oxynitride film has a barrier property and an oxidizing property. The insulating film with high barrier properties is formed between the semiconductor film and the silicon nitride film. Examples of the barrier film include a silicon film, an aluminum nitride film, and an aluminum oxide nitride film. By using an insulating film with this property, impurities in the atmosphere such as moisture or hydrogen, or Impurities such as alkali metals and heavy metals contained in the oxide semiconductor film and the gate insulating film 2 12 or the interface between the oxide semiconductor film and other insulating films and its vicinity. In addition, a silicon oxide film or an oxynitride film having a low ratio of nitrogen in contact with the oxide semiconductor film can be used. By forming an insulating film such as a silicon film, the insulating film made of a material with high barrier properties can be directly oxidized. This can prevent contact with the semiconductor film.

[0170] For example, the first gate insulating film may be a silicon oxide film (S iO x (x>0) is formed, and a second gate insulating film is sputtered on the first gate insulating film. Silicon nitride films (SiN) with a thickness of 50 nm to 200 nm are formed by the tapping method. y (y>0 )) may be laminated to form a gate insulating film having a thickness of 100 nm. 0.4 Pa, high frequency power supply 1.5 kW, oxygen and argon (oxygen flow rate 25 sccm: argon A 100 nm thick film was deposited by RF sputtering under an atmosphere of 25 sccm (oxygen flow rate: 1:1). A silicon oxide film is formed.

[0171] In order to prevent hydrogen, hydroxyl groups, and moisture from being contained in the gate insulating film 212 as much as possible, As a pretreatment for film formation, the first electrode 202 and the oxide were heated in a preheating chamber of the sputtering device. The substrate 200 on which the semiconductor film 208 and the second electrode 211 are formed is preheated. It is preferable to desorb and exhaust impurities such as hydrogen and moisture adsorbed on the surface of the substrate. The temperature is 100°C or higher and 400°C or lower, preferably 150°C or higher and 300°C or lower. The exhaust means provided in the preheating chamber is preferably a cryopump. The process may be omitted.

[0172] Note that after the gate insulating film 212 is formed, heat treatment may be performed. Under air or inert gas atmosphere (nitrogen, helium, neon, argon, etc.) The temperature is preferably 200° C. or higher and 400° C. or lower, for example, 250° C. or higher and 350° C. or lower. In the embodiment, for example, a heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. As a result of the treatment, the oxide semiconductor film 208 came into contact with the silicon oxide forming the gate insulating film 212. Even if oxygen vacancies occur during the second heat treatment, the oxide The supply of oxygen from silicon reduces the oxygen vacancies that act as donors, and the stoichiometric composition ratio is In this case, the oxide semiconductor film 208 can be made to be i-type or substantially i-type. The timing of this heat treatment is after the formation of the gate insulating film 212. As long as the thickness is not particularly limited, it may be formed in other steps, for example, the gate electrode 213 and the insulating film 2 14, or after forming any one of the wiring 215, wiring 216, and wiring 217. In addition, it can be used in combination with other heat treatments, such as a heat treatment for reducing the resistance of a transparent conductive film. This can be done without increasing the number of steps.

[0173] The material of the gate electrode 213 is molybdenum, titanium, chromium, tantalum, tungsten, nickel, etc. Conductive materials made of metals such as chromium, chromium, and scandium, and alloys made mainly of these metals. The conductive film or the nitride of these metals can be used in a single layer or a multilayer structure. If it can withstand the temperature of the heat treatment performed in the process, the metal material is aluminum. Aluminum or copper can be used. Aluminum or copper avoids the problems of heat resistance and corrosion. To avoid this, it is recommended to use it in combination with high melting point metal materials. High melting point metal materials include: Molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, etc. There can be.

[0174] For example, the gate electrode 213 having a two-layer laminate structure may be formed by depositing molybdenum on an aluminum film. A two-layer structure with a molybdenum film laminated on a copper film, or a two-layer structure with a molybdenum film laminated on a copper film, or a two-layer structure in which a titanium nitride film or a tantalum nitride film is laminated on a copper film; It is preferable to have a two-layer structure in which a molybdenum film is laminated with a gate electrode. The electrode 213 may be an aluminum film, an aluminum-silicon alloy film, or an aluminum The intermediate layer is an alloy film of tungsten and titanium or an alloy film of aluminum and neodymium. The structure is a laminate of a tungsten nitride film, a titanium nitride film, or a titanium film as upper and lower layers. It is preferable that

[0175] In addition, the gate electrode 213 may be made of indium oxide, an alloy of indium oxide and tin oxide, or Zinc oxide alloy, zinc oxide, zinc aluminum oxide, zinc aluminum oxynitride, or oxide By using a light-transmitting oxide conductive film such as zinc gallium oxide for the gate electrode 213, The aperture ratio of the element portion can be improved.

[0176] The thickness of the gate electrode 213 is 10 nm to 400 nm, preferably 100 nm to 200 nm. In this embodiment, a 150 nm sputtering method using a tungsten target is used. After forming a conductive film for the gate electrode of m, the conductive film is etched into a desired shape. The gate electrode 213 is formed by patterning. At least, the gate insulating film 212 is disposed in a position overlapping with an end portion of the oxide semiconductor film 208. At the end of the oxide semiconductor film 208, the gate insulating film 212 is formed. A channel forming region is formed in a portion 218 that overlaps with the gate electrode 213. If the end of the gate electrode 213 is tapered, the insulating film laminated thereon may be damaged. This is preferable because it improves the coverage of 214. If the resist mask is formed by the inkjet method, a photomask is not required. This reduces manufacturing costs.

[0177] Next, as shown in FIG. 6B, the first electrode 202, the oxide semiconductor film 208, the second electrode An insulating film 214 is formed so as to cover the electrode 211, the gate insulating film 212 and the gate electrode 213. After that, contact holes 221, 222, and 223 are It is desirable that the insulating film 214 contains as little impurities as possible, such as moisture and hydrogen. The insulating film may be a single layer, or may be made up of a plurality of laminated insulating films. The film 214 may be, for example, a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, or a nitriding film. oxide insulating film such as aluminum nitride film, silicon nitride film, silicon oxynitride film, aluminum nitride film A nitride insulating film such as an aluminum nitride oxide film or an oxide insulating film is used. The insulating film 214 may be a laminate of an insulating film having a high barrier property and a nitride insulating film. A film, for example, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film By using a tungsten film or the like, the oxide semiconductor film 208, the gate insulating film 212, or the like can be formed. Impurities such as moisture or hydrogen are present at the interface between the oxide semiconductor film 208 and other insulating films and in the vicinity thereof. can be prevented from entering.

[0178] In this embodiment, a silicon oxide film having a thickness of 200 nm is formed by sputtering. The insulating film 214 has a structure in which a silicon nitride film having a thickness of 100 nm formed by a method is laminated. When the insulating film 214 is formed by a sputtering method, the substrate 200 is heated to 100 High purity, heated to temperatures between ℃ and 400℃, with hydrogen, water, hydroxyl groups, hydrides, etc. removed A sputtering gas containing nitrogen is introduced and an insulating film 214 is formed using a silicon semiconductor target. In this case, hydrogen, water, hydroxyl groups, or hydrogenated carbon remaining in the processing chamber may be removed. It is preferable to form the insulating film while removing the substances and the like.

[0179] Note that heat treatment may be performed after the insulating film 214 is formed. Under an atmosphere (nitrogen, helium, neon, argon, etc.), preferably at 200°C The heating is performed at a temperature of from 250° C. to 350° C., for example.

[0180] The contact holes 221, 222, and 223 are photo A resist mask is formed by a lithography process, and the gate insulating film 212 and the insulating film 214 are The contact hole 221 can be formed by selectively removing a part of the As a result, a part of the gate electrode 213 is exposed. A part of the electrode 211 is exposed. In addition, when these contact holes are formed, the gate electrode of the first electrode 202 is exposed. In the area not covered by the electrode 213, the first electrode 202 is exposed. A hole may be formed.

[0181] Next, as shown in FIG. 6(C), the contact holes 221, 222, A conductive film is formed on the insulating film 214 so as to cover the contact hole 223, and then etching is performed. The conductive film is processed into a desired shape by the above-mentioned steps, and wiring 215, wiring 216, and wiring 217 are formed. The resist mask used in the etching may be formed by an ink-jet method. If the resist mask is formed by the inkjet method, a photomask is not used, so the manufacturing process is This reduces manufacturing costs.

[0182] The wiring 215 is connected to the gate electrode 213 via a contact hole 221. The line 216 is connected to the second electrode 211 through a contact hole 222. 217 is connected to the gate electrode 213 via a contact hole 223. When these wirings are formed, the wirings connected to the first electrode 202 through the contact holes are It may be formed.

[0183] The wiring 215, the wiring 216, and the wiring 217 have the same structure and material as the first electrode 202. The insulating film can be formed by a similar manufacturing method using a conductive film.

[0184] Through the above steps, the transistor 220 is formed.

[0185] FIG. 7B shows a top view of the transistor 220 shown in FIG. The cross-sectional view taken along the dashed line B1-B2 corresponds to FIG. 6(C). 230 is a wiring formed simultaneously with the wiring 215, the wiring 216, and the wiring 217. It is connected to the first electrode 202 via a cut hole 231 .

[0186] As described above, the concentration of hydrogen in the oxide semiconductor film can be reduced and the oxide semiconductor film can be highly purified. In addition, the oxide semiconductor film can be stabilized by the heat treatment at a temperature equal to or lower than the glass transition temperature. This method allows the formation of an oxide semiconductor film with an extremely low carrier density and a wide band gap. Therefore, a transistor can be manufactured using a large-area substrate. Mass production can be improved. In addition, the hydrogen concentration is reduced and the oxide semiconductor is highly purified. By using a thin film, the transistor has high voltage resistance, low short channel effect, and high on-off ratio. A transistor can be fabricated.

[0187] In this embodiment, a region of the oxide semiconductor film 208 different from the second electrode 211 is The entire portion formed in the region is covered with the gate electrode 213. The second electrode 211 may be formed in a region of the oxide semiconductor film 208 different from the region of the second electrode 211. At least a part of the portion that is covered by the gate electrode 213 may be covered. Of the first electrode 202 and the second electrode 211, the electrode that functions as the drain electrode is The electrode functioning as the drain electrode may be connected to the gate electrode 213. 213, the transistor can function as a diode. can.

[0188] The source electrode and the drain electrode of the transistor are determined by the polarity and the potential of the transistor. The name is changed depending on the difference in potential between the electrodes. Generally, n-channel In a transistor with a low potential, the electrode to which a high potential is applied is called the source electrode. The electrode that is connected to the drain electrode is called the drain electrode. The electrode to which a low potential is applied is called the drain electrode, and the electrode to which a high potential is applied is called the source electrode. In this specification, for convenience, it is assumed that the source electrode and the drain electrode are fixed. In this paper, the transistor connections are explained by setting the potentials as shown above. The names of the source and drain electrodes are interchangeable.

[0189] In this specification, the term "connection" means an electrical connection, and is a connection capable of transmitting a current or voltage. This corresponds to a possible state.

[0190] Here, the drain breakdown voltage of the transistor described in this embodiment will be described.

[0191] When the electric field in the semiconductor reaches a certain threshold, impact ionization occurs, and the high electric field creates a The accelerated carriers collide with the crystal lattice, generating electron-hole pairs. When the electric field accelerates, the electron-hole pairs generated by impact ionization are further accelerated by the electric field. Repeated collision ionization leads to an avalanche breakdown in which the current increases exponentially. Ionization occurs when carriers (electrons, holes) gain kinetic energy above the band gap of a semiconductor. Therefore, the larger the band gap, the more likely it is that impact ionization will occur. The electric field generated becomes stronger.

[0192] The band gap of oxide semiconductors is 3.15 eV, which is 1.0 times that of silicon. Since this is larger than 0.74 eV, avalanche breakdown is less likely to occur. Transistors using semiconductors have high drain withstand voltages, and even when a high electric field is applied, the on-current This makes it less likely that an exponential rise in

[0193] Next, hot carrier degradation of a transistor including an oxide semiconductor will be described.

[0194] Hot carrier degradation occurs when electrons accelerated to high speeds collide with the gate insulator near the drain in the channel. The charges are injected into the insulating film and become fixed charges, or a trap level is formed at the gate insulating film interface. This can cause degradation of transistor characteristics such as threshold voltage fluctuation and gate leakage. The cause of hot carrier degradation is channel hot electron injection (CHE). injection) and drain avalanche hot carrier injection (DAHC injection).

[0195] Since silicon has a narrow band gap, electrons are generated in an avalanche manner due to avalanche breakdown. The number of electrons accelerated to a high enough speed to overcome the barrier to the gate insulating film increases. However, since the oxide semiconductor described in this embodiment has a wide band gap, it is possible to suppress avalanche It is less susceptible to shear breakdown and has higher resistance to hot carrier degradation than silicon. The band gap of silicon carbide, which is one of the piezoelectric materials, and the band gap of oxide semiconductors Although the power dissipation is the same, the mobility of the oxide semiconductor is about two orders of magnitude smaller, so the electrons are accelerated more slowly. In particular, hot carrier degradation is less likely to occur than with silicon carbide, and the drain withstand voltage is high. I can say.

[0196] From the above, a transistor using an oxide semiconductor has a high drain withstand voltage. A drain withstand voltage of 100 V or more, preferably 500 V or more, and more preferably 1 kV or more. It is possible.

[0197] Here, we compare silicon carbide, a typical example of a transistor, with an oxide semiconductor. The following shows how to use 4H-SiC as silicon carbide.

[0198] Oxide semiconductors and 4H-SiC have several things in common. The intrinsic carrier density is Here is an example. According to the Fermi-Dirac distribution, the intrinsic carrier density of an oxide semiconductor is 1 0 -7 cm -3 This is estimated to be about 6.7 × 10 -1 1 cm -3 Similarly, this is an extremely low value.

[0199] In addition, the energy band gap of oxide semiconductors is 3.0 eV to 3.5 eV, and 4H -The energy band gap of SiC is 3.26 eV, making it a wide-gap semiconductor. In this respect, oxide semiconductors and silicon carbide have something in common.

[0200] However, the manufacturing temperatures for oxide semiconductors and silicon carbide are significantly different. Silicon carbide generally requires heat treatment at 1500℃ to 2000℃. Compound semiconductors are heated at temperatures between 300℃ and 500℃ (below the glass transition temperature, up to about 700℃). It is possible to fabricate transistors on large-area substrates using a single process. In addition, the throughput can be increased.

[0201] In addition, silicon carbide transistors use PN junctions, so donor or A doping process with impurities (such as phosphorus and boron) that can act as acceptors is required. The number of manufacturing steps increases. On the other hand, a transistor using an oxide semiconductor does not have a PN junction. This allows for a reduction in manufacturing steps and an improvement in throughput, and also makes it possible to manufacture large-area substrates. It is possible to use.

[0202] In the case of an oxide semiconductor, the density of scattering (DOS) in the band gap Although there have been many studies on the physical properties of the DOS, these studies have not fully explained the DOS itself. In this embodiment, the idea of ​​oxidizing water and hydrogen, which can be the cause of DOS, is not included. By removing the oxide from the semiconductor, a highly purified oxide semiconductor is produced. This is based on the idea of ​​reducing the amount of waste as much as possible. This enables the production of industrial products that are

[0203] In addition, oxygen is supplied to the dangling bonds of metals that are generated due to oxygen deficiency, and oxygen vacancies are formed. By reducing the DOS, a more highly purified (i-type) oxide semiconductor can be obtained. For example, it is possible to form an oxide film containing an excess of oxygen in close contact with the channel formation region. By supplying oxygen from the oxide film, it is possible to reduce DOS caused by oxygen defects. .

[0204] Defects in oxide semiconductors are caused by excess hydrogen at shallow levels 0.1 to 0.2 eV below the conduction band, or by oxidation. These defects are believed to be caused by deep levels due to a lack of elements. The technical idea of ​​thoroughly removing hydrogen and providing a sufficient amount of oxygen is correct. cormorant.

[0205] In addition, although oxide semiconductors are generally n-type, in this embodiment, impurities, particularly water and By removing hydrogen, the i-type is realized. In this respect, unlike silicon, which does not have impurities added It can be said that this is not just an i-type product made by adding a new technology, but rather contains a completely new technological concept.

[0206] In addition, by making the oxide semiconductor an i-type transistor, the temperature characteristics of the transistor are good. Generally speaking, the current-voltage characteristics of a transistor in the temperature range from -25°C to 150°C The on-current, off-current, field effect mobility, S value, and threshold voltage fluctuate little in There is almost no degradation of the current-voltage characteristics due to temperature.

[0207] Note that the transistor including an oxide semiconductor described in this embodiment is a transistor including a silicon carbide The mobility is about two orders of magnitude lower than that of the transistor used in the present study, but the Increasing the channel width (W) increases the transistor current value and improves device characteristics. It can be done.

[0208] The technical idea of ​​the present embodiment is to form a reverse oxide semiconductor without further adding impurities. By intentionally removing impurities such as water and hydrogen that are unintentionally present in oxide semiconductors, The purpose of the present invention is to purify the semiconductor itself. In other words, the water or hydrogen that constitutes the donor level is removed. Furthermore, oxygen vacancies are reduced, and oxygen is sufficiently supplied to the main component material constituting the oxide semiconductor. This results in a highly purified oxide semiconductor.

[0209] By forming an oxide semiconductor film, 20 cm -3 Hydrogen at this level is detected by SIMS (secondary ion This is measured by mass spectrometry. The water or hydrogen that causes this donor level is intentionally removed, In addition, oxygen (one of the components of oxide semiconductors) is also reduced when water or hydrogen is removed. ) is added to the oxide semiconductor to purify it and make it electrically i-type (intrinsic). ) semiconductor.

[0210] In addition, in this embodiment, the smaller the amount of water and hydrogen in the oxide semiconductor, the better. The fewer the carriers, the better. That is, the carrier density is 1×10 1 4 cm -3 Less than 1 x 10 12 cm -3 Less than, and more preferably, less than the measurement limit 1×10 11 cm -3 Furthermore, in the technical concept of this embodiment, zero Ideally, the carrier density should be close to zero. By doing so, the oxide semiconductor becomes a path through which carriers pass in the transistor. As a result, the oxide semiconductor is a highly purified i-type (intrinsic) semiconductor, By making the carriers zero or very few, the transistor is in the off state. The technical idea of ​​this embodiment is to be able to make Ioff extremely low.

[0211] In addition, the oxide semiconductor functions as a path and does not have carriers. If the i-type (intrinsic) is highly purified so that there is no or very little carriers, the carriers The source electrode is supplied by the drain electrode.

[0212] Note that the transistor having the structure described in this embodiment can be used in the same manner as in Embodiment 1. In contrast to a lateral transistor in which the channel is formed approximately parallel to the substrate, The occupied area can be reduced, which allows the transistors to be miniaturized.

[0213] In this manner, impurities other than the main components of the oxide semiconductor film, typically hydrogen, water, a hydroxyl group, or By purifying the material to minimize the amount of hydrides, etc., the operation of the transistors is improved. In particular, it is possible to improve the breakdown voltage, reduce the short channel effect, and The turn-off ratio can be increased.

[0214] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes.

[0215] (Embodiment 3) In this embodiment, a bottom-gate transistor having a channel protection structure is taken as an example. The structure and manufacturing method of the body device will be described. The functional parts and steps can be performed in the same manner as in the first embodiment, so that the The explanation will be omitted.

[0216] As shown in FIG. 1(E) of the first embodiment, the steps up to the second heat treatment are performed in the same manner. As shown in FIG. 8A, the region of the oxide semiconductor film 108 that overlaps with the gate electrode 101 That is, a channel protective film is formed on the oxide semiconductor film 108 so as to overlap with the channel formation region. By providing the channel protective film 130, the oxide semiconductor film 108 Damage to the channel formation region during subsequent processes (during etching) This prevents the film from being thinned by plasma or etching agents. The reliability can be improved.

[0217] The channel protection film 130 is made of an inorganic material containing oxygen (silicon oxide, silicon oxynitride, silicon nitride oxide, etc.). The channel protection film 130 can be formed by plasma CVD or thermal CVD. The channel protection film can be formed by a vapor phase growth method such as a sputtering method. After the film is formed, the shape of the film is processed by etching. Here, silicon oxide is formed by sputtering. A bare film is formed and etched using a photolithography mask to create a chara Then, a protective film 130 is formed on the substrate.

[0218] After the channel protective film 130 is formed, a heat treatment may be performed. In an active gas atmosphere (nitrogen, helium, neon, argon, etc.), preferably The heating is performed at a temperature of 200° C. or higher and 400° C. or lower, for example, 250° C. or higher and 350° C. or lower. For example, heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. The portion that will become the channel formation region is in contact with the channel protection film 130, which is an insulating film containing oxygen. After the oxide semiconductor film 108 is formed, heat treatment is performed to supply oxygen to the oxide semiconductor film 108. Therefore, the region of the oxide semiconductor film 108 in contact with the channel protective film 130 is selectively oxidized. As a result, at least the channel of the oxide semiconductor film 108 can be made to be in an excess state. In the region in contact with the protective film 130, oxygen vacancies were generated by the second heat treatment. Even if the oxygen vacancies are small, it is possible to reduce the oxygen vacancies that act as donors and achieve a structure that satisfies the stoichiometric composition ratio. The channel forming region overlapping with the gate electrode 101 is made to be i-type or substantially i-type. As a result, the electrical characteristics of the transistor can be improved and the variation in the electrical characteristics can be reduced. The timing of carrying out this heat treatment is not particularly limited as long as it is after the formation of the channel protection film 130. It is not used in other processes, such as the heat treatment during resin film formation, and to reduce the resistance of the transparent conductive film. By combining this with the heat treatment in step 2, it is possible to perform this without increasing the number of steps.

[0219] Next, as shown in FIG. 8B, a source electrode and a drain electrode are formed over the oxide semiconductor film 108. After forming a conductive film that will become an electrode (including wiring formed in the same layer), the conductive film is etched. The source electrode 131 and the drain electrode 132 are formed by processing the semiconductor substrate into a desired shape by etching or the like. The material, film thickness and structure of the source electrode 131 and the drain electrode 132, and the manufacturing method thereof Regarding the source electrode 111 and the drain electrode 112 shown in the first embodiment, Please refer to the above.

[0220] Next, a plasma treatment is performed using a gas such as N2O, N2, or Ar. The annealing process removes adsorbed water and other substances adhering to the exposed surface of the oxide semiconductor film. Alternatively, the plasma treatment may be performed using a mixed gas of oxygen and argon.

[0221] After the plasma treatment, as shown in FIG. 8(C), the source electrode 131 and the drain electrode An insulating film 13 is formed to cover the electrode 132, the channel protective film 130, and the oxide semiconductor film 108. The material, thickness, structure, and manufacturing method of the insulating film 133 are described in the embodiment. 1. The description of the insulating film 113 can be referred to.

[0222] Note that heat treatment may be performed after the insulating film 133 is formed. Under an atmosphere (nitrogen, helium, neon, argon, etc.), preferably at 200°C The heating is performed at a temperature of 250° C. to 350° C., for example. Then, heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere.

[0223] Through the above steps, the transistor 140 is formed.

[0224] FIG. 9 illustrates a top view of the transistor 140 illustrated in FIG. The cross-sectional view taken along the dashed line C1-C2 corresponds to FIG.

[0225] The transistor 140 formed according to the above manufacturing method includes a gate electrode 101 and a gate a gate insulating film 102 on the electrode 101; and an oxide semiconductor film 108 on the gate insulating film 102. A channel protection film 130 on the oxide semiconductor film 108 and a source electrode 130 on the oxide semiconductor film 108 The transistor 140 further comprises an oxide semiconductor The conductive film 108, the source electrode 131, the drain electrode 132, and the insulating film 130 on the channel protective film 130 It may also have a border membrane 133 .

[0226] In addition, the transistor 140 has been described as having a single gate structure. If necessary, a transistor having a multi-gate structure having a plurality of channel formation regions is also formed. It is possible.

[0227] Next, a conductive film is formed on the insulating film 133, and then the conductive film is patterned to form a As shown in FIG. 10(A), a back gate electrode 145 is disposed at a position overlapping with the oxide semiconductor film 108. The back gate electrode 145 may be formed on the gate electrode 101 or the source electrode 102. The drain electrode 31 and the drain electrode 132 can be formed using the same material and structure.

[0228] The thickness of the back gate electrode 145 is 10 nm to 400 nm, preferably 100 nm to 20 In this embodiment, a structure in which a titanium film, an aluminum film, and a titanium film are laminated is used. A conductive film having a structure is formed. Then, a resist mask is formed by photolithography. Then, unnecessary parts are removed by etching to process the conductive film into a desired shape (patterning). By performing a process of etching, the back gate electrode 145 is formed.

[0229] Next, as shown in FIG. 10B, an insulating film 146 is formed to cover the back gate electrode 145. The insulating film 146 is formed to prevent moisture, hydrogen, oxygen, and the like from being present in the atmosphere from entering the transistor 140. It is desirable to use a material with high barrier properties that can prevent the characteristics from being affected. For example, insulating films with high barrier properties include silicon nitride films, silicon oxynitride films, and aluminum nitride films. A film, or an aluminum nitride oxide film, etc., is formed by plasma CVD or sputtering. In order to obtain a barrier effect, the insulating film 1 may be formed as a single layer or a laminated layer. It is preferable that the film 46 is formed to a thickness of, for example, 15 nm to 400 nm.

[0230] In this embodiment, a 300 nm insulating film is formed by plasma CVD. The film formation conditions are as follows: The flow rate of silane gas was 4 sccm, and the flow rate of nitrous oxide (N2O) was 800 sccm. The substrate temperature is set to 400°C.

[0231] FIG. 10C shows a top view of the semiconductor device shown in FIG. 1 corresponds to a cross-sectional view taken along dashed line C1-C2 in FIG.

[0232] Note that in FIG. 10B, the back gate electrode 145 covers the entire oxide semiconductor film 108. However, the present invention is not limited to this configuration. As long as the insulating film 104 overlaps with at least a part of a channel formation region of the oxide semiconductor film 108, good.

[0233] The back gate electrode 145 may be in an electrically insulating floating state. In the latter case, the back gate electrode 145 may be in a state where a potential is applied thereto. The potential may be the same as that of the gate electrode 101, or may be a fixed potential such as ground. The level of the potential applied to the back gate electrode 145 can be controlled. Thus, the threshold voltage of the transistor 140 can be controlled.

[0234] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes.

[0235] (Embodiment 4) In this embodiment, one of the semiconductor display devices formed by the manufacturing method of the present invention is The configuration of a semiconductor display device called electronic paper or digital paper will be described. .

[0236] Electronic paper is a type of display that can control the gradation by applying voltage and has a memory function. Specifically, the display element used in the electronic paper is a non-aqueous electrophoretic display element. A dynamic display element in which liquid crystal droplets are dispersed in a polymer material between two electrodes. LC (polymer dispersed liquid crystal) method table Display element, display having chiral nematic liquid crystal or cholesteric liquid crystal between two electrodes The element has charged particles between two electrodes, and the particles are moved through the powder by an electric field. A powder migration type display element can be used. A non-aqueous electrophoretic display element can also be used. The display element is a liquid dispersion in which charged particles are dispersed between two electrodes. A display element having a dispersion liquid in which fine particles are dispersed, on two electrodes sandwiching an insulating film, A twisting ball with two different colored hemispheres, each charged with a different electric charge, is placed between two electrodes. a display element in which a plurality of charged particles are dispersed in a solvent; This includes a display element having a black capsule between two electrodes.

[0237] FIG. 11A shows a pixel portion 700 of electronic paper, a signal line driver circuit 701, and a scanning line driver circuit 702. A top view of the circuit 702 is shown.

[0238] The pixel portion 700 has a plurality of pixels 703. A signal line 707 is routed to the inside of the pixel portion 700. The scanning lines 708 are routed to within the pixel section 700 .

[0239] Each pixel 703 includes a transistor 704, a display element 705, and a storage capacitor 706. The gate electrode of the transistor 704 is connected to one of the scanning lines 708. The source electrode and drain electrode of the transistor 704 are connected to one of the signal lines 707 and the other It is connected to the pixel electrode of the display element 705 .

[0240] In FIG. 11A, the voltage applied between the pixel electrode and the counter electrode of the display element 705 is maintained. A storage capacitor 706 is connected in parallel to the display element 705 to maintain the display. If the memory capacity of 05 is high enough to maintain the display, the retention capacity of 70 It is not necessary to provide 6.

[0241] In FIG. 11A, each pixel has one transistor functioning as a switching element. The structure of the active matrix type pixel portion in which the pixel electrode is provided has been described. The electronic paper to be used is not limited to this configuration. Alternatively, elements such as capacitors, resistors, and coils may be connected in addition to the transistors. stomach.

[0242] FIG. 11(B) shows an example of electrophoretic electronic paper with microcapsules. 7 shows a cross-sectional view of a display element 705 provided on a substrate 703.

[0243] The display element 705 includes a pixel electrode 710, a counter electrode 711, and a pixel electrode 710 and a counter electrode and a microcapsule 712 to which a voltage is applied by a transistor 70. One of the four source or drain electrodes 713 is connected to the pixel electrode 710 .

[0244] Inside the microcapsule 712, positively charged white pigment such as titanium oxide and carbon Negatively charged black pigments such as lanthanum black are enclosed together with a dispersion medium such as oil. According to the voltage of the video signal applied to the pixel electrode 710, the pixel electrode and the counter electrode By applying a voltage between them, the black pigment is attracted to the positive electrode side and the white pigment is attracted to the negative electrode side. , it is possible to perform gradation display.

[0245] In FIG. 11B, the microcapsules 712 are disposed between the pixel electrode 710 and the counter electrode 711. However, the present invention uses this structure. The structure is not limited to the above, and may be formed by a microcapsule 712, a pixel electrode 710, and a counter electrode 711. The space formed may be filled with a gas such as air or an inert gas. In this case, the microcapsules 712 are attached to the pixel electrodes 710 and the counter electrodes 711 by adhesive or the like. It is desirable to fix both or either one of them.

[0246] The number of microcapsules 712 included in the display element 705 is as shown in FIG. A single display element 705 may have multiple microcapsules 712. Alternatively, multiple display elements 705 may have one microcapsule 712. For example, two display elements 705 may share one microcapsule 712. A positive voltage is applied to the pixel electrode 710 of the display element 705, and a positive voltage is applied to the pixel electrode 710 of the other display element 705. Suppose a negative voltage is applied to the pixel electrode 710. In this case, a positive voltage is applied to In the area overlapping with the pixel electrode 710 to which the voltage is applied, a black face is formed within the microcapsule 712. The white pigment is attracted to the pixel electrode 710 side, and the white pigment is attracted to the counter electrode 711 side. Conversely, in the area overlapping with the pixel electrode 710 to which a negative voltage is applied, the microcapsule In the cell 712, the white pigment is attracted to the pixel electrode 710 side, and the black pigment is attracted to the counter electrode 71 It gravitates towards one side.

[0247] Next, regarding a specific method for driving electronic paper, the above-mentioned electrophoretic electronic paper will be Let me explain with an example.

[0248] The operation of electronic paper can be explained by dividing it into an initialization period, a writing period, and a retention period. Yes, it is possible.

[0249] Before switching the image to be displayed, the grayscale of each pixel in the pixel area is first reset during the initialization period. By unifying the display elements, the display elements are initialized. By initializing the display elements, the residual image is prevented. Specifically, in the electrophoretic type, each pixel is displayed in either white or black. , the gray scale displayed by the microcapsules 712 of the display element 705 is adjusted.

[0250] In this embodiment, an initialization video signal for displaying black is input to the pixels, and then a video signal for displaying white is input to the pixels. The initialization operation will be described when an initialization video signal such as that shown in the figure is input to a pixel. For example, in the case of an electrophoretic electronic paper in which an image is displayed facing the counter electrode 711 side, In this case, first, the black pigment in the microcapsule 712 is placed on the counter electrode 711 side, and the white pigment is placed on the image side. A voltage is applied to the display element 705 so that it faces the base electrode 710. The white pigment in the cell 712 faces the counter electrode 711 side, and the black pigment faces the pixel electrode 710 side. Then, a voltage is applied to the display element 705 .

[0251] Also, if the initialization video signal is input to the pixel only once, the image displayed before the initialization period Depending on the gradation, the movement of the white pigment and the black pigment in the microcapsule 712 may be incomplete. Even after the initialization period ends, the gradation displayed between the pixels remains the same. Therefore, a negative voltage - Vp is applied to the pixel electrode 710 multiple times to display black. It is desired to display white by applying a positive voltage Vp to the pixel electrode 710 multiple times. I wish.

[0252] If the gray scale displayed by the display element of each pixel before the initialization period is different, The minimum number of times that the video signal must be input for display before the initialization period also differs. The number of times the initialization video signal is input between pixels is changed according to the gray scale that was set. In this case, the pixels that no longer need to input the initialization video signal may be It is a good idea to input the supply voltage Vcom.

[0253] In addition, the voltage Vp or voltage −Vp of the initialization video signal is applied to the pixel electrode 710 multiple times. In order to achieve this, during the period in which the selection signal pulse is applied to each scanning line, the scanning line is A series of operations in which an initialization video signal is input to the pixels of the line having the By applying the voltage Vp or voltage −Vp of the initialization video signal to the pixel electrode 710 multiple times, Thus, the movement of the white pigment and the black pigment in the microcapsule 712 is converged to form a gap between pixels. It is possible to prevent a difference in gray scale from occurring in the pixel portion and initialize the pixels in the pixel portion.

[0254] In the initialization period, each pixel does not first display black and then display white. Alternatively, in the initialization period, each pixel may display black after the first pixel displays white. It is also possible to display white, then black, and then white again.

[0255] The timing at which the initialization period starts is the same for all pixels in the pixel section. It is not necessary to do this for each pixel, or for each pixel that belongs to the same line. The timing at which the initialization period starts may be made different.

[0256] Next, in the writing period, a video signal having image information is input to the pixels.

[0257] When displaying an image using the entire pixel area, power is applied to all the scanning lines in sequence during one frame period. A selection signal with a shifted voltage pulse is input. Then, a pulse appears in the selection signal. During one line period, video signals having image information are input to all signal lines. do.

[0258] The white light in the microcapsule 712 changes in response to the voltage of the video signal applied to the pixel electrode 710. The color pigment and the black pigment move to the pixel electrode 710 side or the counter electrode 711 side, forming a display element. The child 705 displays the gray scale.

[0259] In addition, during the writing period, the voltage of the video signal is applied to the pixel electrode 710 multiple times, as in the initialization period. Therefore, during the period when the selection signal pulse is applied to each scanning line, A series of operations of inputting a video signal to pixels of a line having the scanning line is described below. Do this multiple times.

[0260] Next, in the retention period, a common voltage Vcom is input to all pixels via the signal lines, and then the scanning No selection signal is input to the line or no video signal is input to the signal line. The white and black pigments in the microcapsules 712 of 705 correspond to the pixel electrodes 710. The arrangement is maintained unless a positive or negative voltage is applied between the opposing electrodes 711. Therefore, the gray scale displayed by the display element 705 is maintained. The displayed image is maintained during the retention period.

[0261] The display element used in electronic paper requires a voltage to change the gradation of the liquid crystal. For light emitting elements such as liquid crystal elements used in display devices and organic light emitting elements used in light emitting devices Therefore, the transistors in the pixels used as switching elements tend to be In the write period, the potential difference between the source electrode and the drain electrode of the transistor 704 becomes large. Therefore, the off current becomes high, which causes the potential of the pixel electrode 710 to fluctuate, causing display disturbance. However, in one embodiment of the present invention, an oxide semiconductor film having an extremely low impurity concentration is The active layer of the transistor 704 is made of a gate electrode and The off-state current when the voltage between the source electrodes is almost zero, i.e., the leakage current, is extremely low. Therefore, during the writing period, the voltage between the source electrode and the drain electrode of the transistor 704 Even if the potential difference becomes large, the off-current is suppressed, and the display error caused by the fluctuation of the potential of the pixel electrode 710 is prevented. In addition, the pixel used as a switching element can be prevented from being disturbed. During the writing period, the transistor 704 has a potential difference between its source electrode and drain electrode of However, in one embodiment of the present invention, the transistor 704 This reduces the variation in threshold voltage due to degradation over time, improving the reliability of electronic paper. It can improve sexuality.

[0262] This embodiment mode can be implemented in combination with the above embodiment modes.

[0263] (Embodiment 5) FIG. 12A shows an example of a block diagram of an active matrix semiconductor display device. A pixel portion 5301, a first scanning line driver circuit 5302, a second scanning line driver circuit 5303, and a third scanning line driver circuit 5304 are provided on a substrate 5300 of the display device. The pixel portion 5301 includes a scanning line driver circuit 5303 and a signal line driver circuit 5304. The signal lines are arranged extending from a signal line driver circuit 5304, and a plurality of scanning lines are arranged as first scanning lines. The driver circuit 5302 and the second scanning line driver circuit 5303 are arranged to extend from each other. At the intersections of the scanning lines and the signal lines, pixels each having a display element are arranged in a matrix. The display device substrate 5300 is made of a flexible printed circuit board (FPC). A timing control circuit 5305 (controller d Circuit) and other connections are connected to the timing control circuit 5305 (controller , also called a control IC).

[0264] In FIG. 12A, a first scanning line driver circuit 5302, a second scanning line driver circuit 5303, a signal The signal line driver circuit 5304 is formed on one substrate 5300 together with the pixel portion 5301. Therefore, the number of external components such as driver circuits can be reduced, which not only reduces the size of the display device, The cost can be reduced by reducing the number of assembly and inspection processes. When an external driving circuit is provided, it becomes necessary to extend the wiring, and the number of connections between the wiring increases. When a driver circuit is provided on the same substrate 5300, the number of connections between the wirings can be reduced. This prevents a drop in yield due to poor connections between the driver circuit and the pixel area, and improves the connection points. This can prevent a decrease in reliability due to low mechanical strength caused by the above-mentioned problem.

[0265] The timing control circuit 5305 is, for example, A first scanning line driving circuit start signal (GSP1), a scanning line driving circuit clock signal (GCK1). The timing control circuit 5305 also supplies the second scanning line driving circuit For example, the second scanning line driver circuit start signal (GSP2) (start The signal line supplies the clock signal (GCK2) for the scanning line driver circuit. A start signal (SSP) for the signal line driver circuit and a clock for the signal line driver circuit are input to the driver circuit 5304. Clock signal (SCK), data for video signal (DATA) (also simply called video signal), The first scanning line driving circuit 5302 and the second scanning line driving circuit 5303 are connected to each other. It is possible to omit one of the scanning line driver circuit 5302 and the scanning line driver circuit 5303 .

[0266] In FIG. 12B, a circuit with a low driving frequency (for example, the first scanning line driving circuit 5302, 2) a scanning line driver circuit 5303) is formed on one substrate 5300 together with a pixel portion 5301. 5 shows a structure in which a signal line driver circuit 5304 is formed on a substrate different from that of a pixel portion 5301. In addition, the analog circuit used in the sampling circuit of the signal line driver circuit 5304 is A circuit with a low driving frequency such as a log switch is partially integrated with the pixel section 5301 on one substrate. It is also possible to form the system on a plate 5300. By adopting this, the yield reduction caused by the above-mentioned connection failure and the mechanical strength of the connection part can be reduced. The system is designed to reduce costs by reducing assembly and inspection processes, avoiding low quality products and other problems. The advantages of the system on panel can be enjoyed to some extent. Furthermore, the pixel part 5301, the scanning line drive A circuit 5302, a scanning line driver circuit 5303, and a signal line driver circuit 5304 are all formed on one substrate. Compared to a system-on-panel consisting of a LCD panel, the performance of the circuit with a high driving frequency can be improved. Furthermore, it is difficult to realize a large pixel area when using a single crystal semiconductor. It can be formed.

[0267] Next, a configuration of a signal line driver circuit using n-channel transistors will be described.

[0268] The signal line driver circuit shown in FIG. 13A includes a shift register 5601 and a sampling circuit. The sampling circuit 5602 includes a plurality of switching circuits 5602_1 1 to 5602_N (N is a natural number). Each of the n-channel transistors 5603_1 to 5603_k (k is a natural number) has.

[0269] The connection relationship of the signal line driver circuit will be described using the switching circuit 5602_1 as an example. Note that either one of the source electrode and the drain electrode of the transistor is connected to the first In the following, the first terminal will be referred to as the first terminal, and the other as the second terminal.

[0270] The first terminals of the transistors 5603_1 to 5603_k are connected to the wirings 5604_1 to 5604_k, respectively. 04_k. The wirings 5604_1 to 5604_k are connected to The second terminals of the transistors 5603_1 to 5603_k are connected to the signal line S1. The gate electrodes of the transistors 5603_1 to 5603_k are connected to the The input terminal 5602 is connected to a soft register 5601.

[0271] The shift register 5601 sequentially supplies higher level voltages to the wirings 5605_1 to 5605_N. (H level), and the switching circuits 5602_1 to 560 It has the function of selecting 2_N in sequence.

[0272] The switching circuit 5602_1 includes switches 5603_1 to 5603_k. By this, the wirings 5604_1 to 5604_k and the signal lines S1 to Sk are in a conductive state (first terminal The function of controlling the conduction between the first terminal and the second terminal, that is, the function of controlling the conduction between the first terminal and the second terminal of the wiring 5604_1 to 5604_k. The input terminal has a function of controlling whether or not a voltage is supplied to the signal lines S1 to Sk.

[0273] Next, the operation of the signal line driver circuit of FIG. 13(A) will be described with reference to the timing chart of FIG. 13(B). 13B, a wiring 5605_1 is connected from the shift register 5601. 1 to 5605_N, respectively, input timing signals Sout_1 to Sout_N; Video signals Vdata_1 to Vd are input to the wirings 5604_1 to 5604_k, respectively. The timing chart of ata_k is shown as an example.

[0274] Note that one operation period of the signal line driver circuit corresponds to one line period in the display device. 3(B) shows an example in which one line period is divided into periods T1 to TN. T1 to TN are periods for writing a video signal to one pixel belonging to a selected row. It is.

[0275] During the period T1 to the period TN, the shift register 5601 outputs a timing signal of H level. For example, in a period T1, the shift The register 5601 outputs an H-level signal to the wiring 5605_1. The transistors 5603_1 to 5603_k in the switching circuit 5602_1 are turned on. Then, the wirings 5604_1 to 5604_k and the signal lines S1 to Sk are brought into a conductive state. Then, Data (S1) to Data (Sk) are input to wiring 5604_1 to 5604_k. Data(S1) to Data(Sk) are respectively connected to transistors 5603_1 to 5603_5. Through 603_k, pixels in the first to kth columns of the pixels in the selected row are written. In this way, in the periods T1 to TN, the pixels in the selected row are sequentially switched to k columns at a time. The video signal is written in the next bit.

[0276] As described above, the video signal is written to the pixels in a number of columns. This reduces the number of devices and wiring required for connection to external circuits such as controllers. Also, the video signal is written to the pixels in multiple columns at a time, Therefore, the writing time can be extended, and insufficient writing of the video signal can be prevented. can be done.

[0277] Next, one mode of a shift register used in a signal line driver circuit or a scanning line driver circuit will be described. 14 and 15.

[0278] The shift register includes a first pulse output circuit 10_1 to an N-th pulse output circuit 10_N ( N is a natural number of 3 or more (see FIG. 14(A)). The first to N-th pulse output circuits 10_N are supplied with a first clock signal CK 1, a second clock signal CK2 from a second wiring 12, a third clock signal CK3 from a third wiring 13 A fourth clock signal CK4 is supplied through the fourth wiring 14. In the pulse output circuit 10_1, a start pulse SP1 (first start pulse In addition, the n-th pulse output circuit 10_n (n is 2 or more) in the second stage or later is input. In the upper N (a natural number less than N), the signal from the pulse output circuit 10_n-1 in the previous stage (the previous stage signal OUT(n-1)) is input. In the first pulse output circuit 10_1, a two-stage A signal from the third pulse output circuit 10_3 in the latter stage is input. In the nth pulse output circuit 10_n, the (n+2)th pulse output circuit 10_(n The signal from the next stage (called the next stage signal OUT(n+2)) is input. The pulse output circuit outputs a first pulse for input to the following and / or two preceding pulse output circuits. The output signals (OUT(1)(SR) to OUT(N)(SR)) and the inputs to other circuits, etc. The second output signals (OUT(1) to OUT(N)) are output. As shown in the figure, the last two stages of the shift register receive the next stage signal OUT(n+2). For example, the second start pulse SP2 and the third start pulse SP3 are not input. The configuration may be such that the signal SP3 is input to each of the input terminals.

[0279] The clock signal (CK) goes between H and L levels (low voltage) at regular intervals. Here, the first clock signal (CK1) to the fourth clock signal ( CK4) is delayed by 1 / 4 cycle in sequence. The fourth clock signal (CK1) to the fourth clock signal (CK4) are used to control the driving of the pulse output circuit, etc. conduct.

[0280] The first input terminal 21, the second input terminal 22, and the third input terminal 23 are connected to the first wiring 11 to The fourth wiring 14 is electrically connected to the fourth wiring 14. For example, in FIG. The first pulse output circuit 10_1 has a first input terminal 21 electrically connected to the first wiring 11. The second input terminal 22 is electrically connected to the second wiring 12, and the third input terminal 23 is The second pulse output circuit 10_2 is electrically connected to the third wiring 13. The first input terminal 21 is electrically connected to the second wiring 12, and the second input terminal 22 is electrically connected to the third wiring 13. The third input terminal 23 is electrically connected to the fourth wiring 14. There are.

[0281] Each of the first pulse output circuit 10_1 to the N-th pulse output circuit 10_N has a first input terminal a first input terminal 21, a second input terminal 22, a third input terminal 23, a fourth input terminal 24, a fifth input terminal The input terminal 25, the first output terminal 26, and the second output terminal 27 (see FIG. 14(B)). In the first pulse output circuit 10_1, a first clock signal is input to a first input terminal 21. A first clock signal CK1 is input to the first input terminal 22, a second clock signal CK2 is input to the third input terminal 23, and a third clock signal CK3 is input to the second input terminal 24. A third clock signal CK3 is input to the input terminal 23 of the second clock CLK1, and a start signal CK4 is input to the fourth input terminal 24 of the third clock CLK2. A pulse is input, the next stage signal OUT(3) is input to the fifth input terminal 25, and the first output A first output signal OUT(1)(SR) is output from a terminal 26, and a second output signal OUT(1)(SR) is output from a second output terminal 27. The second output signal OUT(1) is output.

[0282] Next, an example of a specific circuit configuration of the pulse output circuit is shown in FIG.

[0283] Each pulse output circuit includes a first transistor 31 to a thirteenth transistor 43. (See FIG. 15(A)). In addition, the above-mentioned first input terminal 21 to fifth input terminal 25, In addition to the first output terminal 26 and the second output terminal 27, a first high power supply potential VDD is supplied. A power supply line 51, a power supply line 52 to which a second high power supply potential VCC is supplied, and a power supply line 53 to which a low power supply potential VSS is supplied A signal is supplied to the first transistor 31 to the thirteenth transistor 43 from the power supply line 53 connected to the The relationship between the levels of the power supply potentials of the power supply lines in FIG. The first power supply potential VDD is set to a potential equal to or higher than the second power supply potential VCC, and the second power supply potential VCC is set to The potential is set to be higher than the third power supply potential VSS. The fourth clock signal (CK4) is a signal that alternates between H and L levels at regular intervals. When the voltage is H level, it is VDD, and when the voltage is L level, it is VSS. By making VDD higher than the potential VCC of the power supply line 52, the operation is not affected. Therefore, the potential applied to the gate electrode of the transistor can be kept low. This reduces the shift in threshold voltage and suppresses degradation.

[0284] In FIG. 15A, the first transistor 31 has a first terminal electrically connected to a power supply line 51. a second terminal electrically connected to a first terminal of a ninth transistor 39, and a gate electrode The second transistor 32 has a first terminal electrically connected to the fourth input terminal 24. The second terminal is electrically connected to the power supply line 53, and the second terminal is electrically connected to the first terminal of the ninth transistor 39. and a gate electrode electrically connected to the gate electrode of the fourth transistor 34. The third transistor 33 has a first terminal electrically connected to the first input terminal 21 and a second terminal electrically connected to the first input terminal 22. The second terminal is electrically connected to the first output terminal 26. The fourth transistor 34 is One terminal is electrically connected to the power supply line 53, and the second terminal is electrically connected to the first output terminal 26. The fifth transistor 35 has a first terminal electrically connected to the power supply line 53 and a second terminal electrically connected to the power supply line 53. The two terminals are the gate electrode of the second transistor 32 and the gate electrode of the fourth transistor 34. The gate electrode is electrically connected to the fourth input terminal 24. The transistor 36 has a first terminal electrically connected to the power supply line 52 and a second terminal electrically connected to the second transistor 36. The gate electrode of the fourth transistor 32 and the gate electrode of the fourth transistor 34 are electrically connected to each other. The seventh transistor 3 has a gate electrode electrically connected to the fifth input terminal 25. The seventh transistor has a first terminal electrically connected to the power supply line 52 and a second terminal electrically connected to the eighth transistor 38. The gate electrode is electrically connected to the second terminal and the gate electrode is electrically connected to the third input terminal 23. The eighth transistor 38 has a first terminal connected to the gate electrode of the second transistor 32 and The gate electrode of the transistor 34 of the first input terminal 2 is electrically connected to the gate electrode of the transistor 34 of the second input terminal 2. The ninth transistor 39 has a first terminal electrically connected to the first transistor 2. a second terminal of the second transistor 31 and a second terminal of the second transistor 32; The gate electrode of the third transistor 33 and the gate electrode of the tenth transistor 40 are supplied with a current. The gate electrode is electrically connected to the power supply line 52. The first terminal of the stator 40 is electrically connected to the first input terminal 21 and the second terminal of the stator 40 is electrically connected to the second output terminal 22. a gate electrode electrically connected to the second terminal of the ninth transistor 39; The eleventh transistor 41 has a first terminal electrically connected to the power supply line 53. The second terminal is electrically connected to the second output terminal 27, and the gate electrode of the second transistor The gate electrode of the fourth transistor 32 and the gate electrode of the fourth transistor 34 are electrically connected to each other. The twelfth transistor 42 has a first terminal electrically connected to the power supply line 53 and a second terminal is electrically connected to the second output terminal 27, and the gate electrode is The thirteenth transistor 43 has a first terminal electrically connected to the power supply line 53. the second terminal is electrically connected to the first output terminal 26, and the gate electrode is It is electrically connected to the gate electrode of the seventh transistor 37 .

[0285] In FIG. 15A, the gate electrode of the third transistor 33 and the gate electrode of the tenth transistor 4 The connection point of the gate electrode of transistor 0 and the second terminal of transistor 939 is referred to as node A. In addition, the gate electrode of the second transistor 32, the gate electrode of the fourth transistor 34, the second terminal of the fifth transistor 35, the second terminal of the sixth transistor 36, the second terminal of the eighth transistor The connection point of the first terminal of the transistor 38 and the gate electrode of the eleventh transistor 41 is node B. (See FIG. 15(A)).

[0286] The timing chart of a shift register having a plurality of pulse output circuits shown in FIG. The above is shown in FIG. 15(B).

[0287] As shown in FIG. 15A, in the ninth transistor in which the second power supply potential VCC is applied to the gate electrode, By providing the transistor 39, the following can be achieved before and after the bootstrap operation: The advantages are as follows:

[0288] In the absence of the ninth transistor 39 having the gate electrode to which the second potential VCC is applied, the boot When the potential of the node A rises due to the strap operation, the second terminal of the first transistor 31 The potential of the source electrode, which is the first power supply potential VDD, increases and becomes higher than the first power supply potential VDD. The source electrode of the first transistor 31 is switched to the first terminal side, that is, the power supply line 51 side. Therefore, in the first transistor 31, the gate electrode and the source electrode are A large bias voltage is applied between the gate and drain electrodes, which causes a large stress. This can cause the transistor to deteriorate. By providing a ninth transistor 39 to which C is applied, bootstrap operation The potential of the node A rises due to this, but the potential of the second terminal of the first transistor 31 does not rise. In other words, by providing the ninth transistor 39, As a result, a negative bias voltage is applied between the gate electrode and the source electrode of the first transistor 31. Therefore, by using the circuit configuration of this embodiment, , a negative bias voltage applied between the gate electrode and the source electrode of the first transistor 31 Since the resistance can be reduced, the deterioration of the first transistor 31 due to stress can be suppressed. Cut.

[0289] The ninth transistor 39 is provided at a position corresponding to the second gate of the first transistor 31. A terminal is connected between the gate electrode of the third transistor 33 and the gate electrode of the third transistor 34 via a first terminal and a second terminal. In the present embodiment, a plurality of pulse output circuits may be provided. In the case of a shift register, the signal line driver circuit has more stages than the scanning line driver circuit. The transistor 39 may be omitted, which has the advantage of reducing the number of transistors.

[0290] The active layers of the first transistor 31 to the thirteenth transistor 43 are made of oxide semiconductor. By using such a material, the off-state current of a transistor is reduced, and the on-state current and the field effect are also reduced. This can increase the resultant mobility and reduce the degree of degradation, making it possible to In addition, a transistor using an oxide semiconductor can be used in an amorphous Compared to transistors using base silicon, a high potential is applied to the gate electrode. The degree of deterioration of the transistor is small. Therefore, the power supply line that supplies the second power supply potential VCC The same operation can be obtained by supplying the first power supply potential VDD to the Since the number of lines can be reduced, the circuit can be made smaller.

[0291] The gate electrode of the seventh transistor 37 is connected to the third input terminal 23. A lock signal is supplied by the second input terminal 22 to the gate electrode of the eighth transistor 38. The clock signal to be input to the gate electrode of the seventh transistor is provided by the second input terminal 22. A clock signal is supplied to the eighth gate electrode by the third input terminal 23. The same effect can be achieved by changing the wiring relationship so that the clock signal is In the shift register shown in (A), the seventh transistor 37 and the eighth transistor The seventh transistor 37 is turned off and the eighth transistor 38 is turned on. On, then the seventh transistor 37 is off, and the eighth transistor 38 is off. By setting the input terminal 22 and the input terminal 23 in this state, the potentials of the second input terminal 22 and the third input terminal 23 are reduced. The drop in the potential of the node B is a drop in the potential of the gate electrode of the seventh transistor 37. , and occurs twice due to a drop in the potential of the gate electrode of the eighth transistor 38. On the other hand, in FIG. 15A, the seventh transistor 37 and the eighth transistor 38 are both on, the seventh transistor 37 is on, and the eighth transistor 38 is off. Then, the seventh transistor 37 is turned off and the eighth transistor 38 is turned off. By this, the potentials of the second input terminal 22 and the third input terminal 23 are reduced. The potential drop of the node B caused by the above is converted into the potential drop of the gate electrode of the eighth transistor 38. Therefore, the gate electrode of the seventh transistor 37 is connected to the third A clock signal CK3 is supplied from the third input terminal 23, and the gate of the eighth transistor 38 It is preferable that the electrode is connected in a wired relationship so that a clock signal CK2 is supplied from the second input terminal 22 to the This is because the number of fluctuations in the potential of the node B is reduced and noise is reduced. Because it is possible.

[0292] In this manner, the potentials of the first output terminal 26 and the second output terminal 27 are maintained at the L level. By configuring the node B to periodically receive a high-level signal during the period, the pulse output This makes it possible to suppress malfunction of the power circuit.

[0293] This embodiment mode can be implemented in combination with the above embodiment modes.

[0294] (Embodiment 6) The liquid crystal display device according to one embodiment of the present invention includes a transistor having a low off-state current and high reliability. Since the display uses a star, the display has high visibility and high reliability. The configuration of the liquid crystal display device according to the present invention will be described.

[0295] FIG. 16 illustrates an example of a cross-sectional view of a pixel in a liquid crystal display device according to one embodiment of the present invention. The transistor 1401 shown in FIG. 6 has a gate electrode 1402 formed on an insulating surface and a gate A gate insulating film 1403 on the gate electrode 1402 and a gate electrode on the gate insulating film 1403 An oxide semiconductor film 1404 overlapping with the electrode 1402 and a A conductive film 1406 that functions as a source electrode or a drain electrode and is formed in a laminated manner. The transistor 1401 further includes an oxide semiconductor film The insulating film 1407 formed on the insulating film 1404 may be included as a component of the insulating film 140. 7 includes a gate electrode 1402, a gate insulating film 1403, an oxide semiconductor film 1404, and a conductive film. The conductive film 1406a and the conductive film 1406b are formed so as to cover the conductive film 1406a and the conductive film 1406b.

[0296] An insulating film 1408 is formed on the insulating film 1407. An opening is provided in a part of 8, and the opening is adapted to be in contact with the conductive film 1406b. A pixel electrode 1410 is formed on the substrate 1410 .

[0297] Moreover, on the insulating film 1408, a spacer 141 for controlling the cell gap of the liquid crystal element is provided. The spacer 1417 is formed by etching the insulating film into a desired shape. However, by dispersing the filler on the insulating film 1408, the cell gap can be reduced. The loop may be controlled.

[0298] An alignment film 1411 is formed on the pixel electrode 1410. A counter electrode 1413 is provided at a position facing the pixel 10. An alignment film 1414 is formed on the side closer to the electrode 1410. 414 can be formed using organic resin such as polyimide or polyvinyl alcohol. The surface is then subjected to an orientation treatment such as rubbing to align the liquid crystal molecules in a certain direction. Rubbing is done by applying pressure to the alignment film with a rope wrapped in nylon or other cloth. This can be done by rotating the laser and rubbing the surface of the alignment film in a certain direction. It uses inorganic materials such as silicon oxide and has alignment properties by deposition without alignment treatment. It is also possible to directly form the alignment film 1411 and the alignment film 1414 .

[0299] The pixel electrode 1410 and the counter electrode 1413 are surrounded by a sealant 1416. The liquid crystal 1415 is provided in the region. The liquid crystal 1415 is injected by a dispenser type ( It is also possible to use a dripping method or a dip method. Filler may be mixed into the material 1416 .

[0300] A liquid crystal element formed by a pixel electrode 1410, a counter electrode 1413, and a liquid crystal 1415 The color filter may be overlapped with a color filter that allows light of a specific wavelength range to pass. The filter is formed on a substrate (opposite substrate) 1420 on which the opposite electrode 1413 is formed. The color filter is made by applying an organic resin, such as an acrylic resin with pigments dispersed therein, to a substrate. After being applied onto 420, it can be selectively formed using photolithography. In addition, after a polyimide resin in which a pigment is dispersed is applied onto the substrate 1420, etching is performed. Alternatively, a droplet discharge method such as an ink jet method may be used. In this way, a color filter can be selectively formed.

[0301] In addition, disclination caused by the disturbance in the alignment of the liquid crystal 1415 between pixels was visible. In order to prevent this, a light-shielding film capable of blocking light may be formed between the pixels. The shielding film uses organic resin containing black pigments such as carbon black and low-order titanium oxide. Alternatively, the shielding film can be formed of a film using chromium.

[0302] The pixel electrode 1410 and the counter electrode 1413 are made of, for example, indium tin oxide (I TSO), indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide ( Transparent conductive materials such as gallium doped zinc oxide (GZO) and gallium doped zinc oxide (IZO) can be used. In this embodiment, the pixel electrode 1410 and the counter electrode 1413 are provided with a light transmitting layer. An example of fabricating a transmissive liquid crystal element using a conductive film is shown, but the present invention is not limited to this structure. The liquid crystal display device according to one aspect of the present invention may be a semi-transmissive type or a reflective type.

[0303] In this embodiment, a TN (Twisted Nematic) liquid crystal display device is used. ) type, VA (Vertical Alignment) type, OCB (Opti cally Compensated Birefringence) type, IPS(In The transistor of the present invention can be applied to other liquid crystal display devices such as a two-plane switching type. A transistor can be used.

[0304] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so it is necessary to improve the temperature range. In order to achieve this, a liquid crystal composition containing 5% by weight or more of a chiral agent is used for the liquid crystal 1415. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent has a response speed of 10 μsec The time is short, from 100 μsec to 100 μsec, and since it is optically isotropic, no alignment process is required. Dependence on field angle is small.

[0305] Fig. 17 is a perspective view showing an example of the structure of a liquid crystal display device of the present invention. The display device includes a liquid crystal panel 1601 having a liquid crystal element formed between a pair of substrates, and a first diffusion plate 1602. 602, a prism sheet 1603, a second diffusion plate 1604, a light guide plate 1605, and a reflector It has a reflector 1606 , a light source 1607 , and a circuit board 1608 .

[0306] A liquid crystal panel 1601, a first diffusion plate 1602, a prism sheet 1603, and a second diffusion plate 1604 are arranged in a liquid crystal panel 1601. The scattering plate 1604, the light guide plate 1605, and the reflector plate 1606 are laminated in this order. A light source 607 is provided at the end of the light guide plate 1605 and diffused inside the light guide plate 1605. The light from 1607 passes through the first diffusion plate 1602, the prism sheet 1603, and the second diffusion plate The liquid crystal panel 1601 is uniformly irradiated by the light 1604 .

[0307] In this embodiment, a first diffusion plate 1602 and a second diffusion plate 1604 are used. However, the number of the diffusion plates is not limited to this, and may be one or more than two. The scattering plate may be provided between the light guide plate 1605 and the liquid crystal panel 1601. Even if the diffusion plate is provided only on the side closer to the liquid crystal panel 1601 than the reflective sheet 1603, It is preferable that the diffusion plate is provided only on the side closer to the light guide plate 1605 than the prism sheet 1603. It's fine if it is.

[0308] The cross section of the prism sheet 1603 is not limited to the sawtooth shape shown in FIG. It is only necessary that the shape be such that the light from the plate 1605 can be condensed onto the liquid crystal panel 1601 side.

[0309] The circuit board 1608 includes a circuit for generating various signals to be input to the liquid crystal panel 1601, The circuit board 16 is provided with circuits for processing these signals. 08 and the LCD panel 1601 are connected by FPC (Flexible Printed Circuit The above circuit is connected via a COG (Chip ON The liquid crystal panel 1601 may be connected using the MOS transistor (Glass) method, or one of the above circuits may be connected using the MOS transistor (Glass) method. Even if the part is connected to FPC1609 using the COF (Chip on Film) method good.

[0310] In FIG. 17, a control circuit for controlling the driving of a light source 1607 is provided on a circuit board 1608. The control circuit and the light source 1607 are connected via an FPC 1610. However, the control circuit may be formed in the liquid crystal panel 1601. In this case, the liquid crystal panel 1601 and the light source 1607 are connected by an FPC or the like. do.

[0311] FIG. 17 shows an edge-light type light source in which a light source 1607 is disposed at the edge of a liquid crystal panel 1601. In the liquid crystal display device of the present invention, the light source 1607 is directly below the liquid crystal panel 1601. It may be a direct type arranged in the

[0312] This embodiment mode can be implemented in appropriate combination with the above embodiment modes.

[0313] (Embodiment 7) In this embodiment, a light-emitting device in which a transistor according to one embodiment of the present invention is used for a pixel is constructed as follows. In this embodiment, a transistor for driving a light-emitting element is an n-type The cross-sectional structure of a pixel in this case will be described with reference to FIG. The case where the first electrode is a cathode and the second electrode is an anode will be described. The second electrode may be a cathode.

[0314] In FIG. 18A, a transistor 6031 is an n-type transistor, and a light emitting element 6033 emits light. A cross-sectional view of the pixel when taken out from the first electrode 6034 side is shown. The insulating film 6037 is covered with a partition wall 6038 having an opening. The first electrode 6034 is partially exposed at the opening of the partition wall 6038. In the opening, a first electrode 6034, an electroluminescent layer 6035, and a second electrode 6036 are arranged in this order. The layers are stacked on top of each other.

[0315] The first electrode 6034 is formed of a material or with a thickness that transmits light and has a small work function. The conductive material may be formed of a metal, an alloy, an electrically conductive compound, or a mixture thereof. Specifically, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr. Metals, alloys containing these metals (Mg:Ag, Al:Li, Mg:In, etc.), and their compounds In addition to calcium fluoride and calcium nitride, rare earth metals such as Yb and Er can also be used. In addition, when an electron injection layer is provided, other conductive films such as aluminum films can be used. The first electrode 6034 is then formed to a thickness that allows light to pass through (preferably 5 Furthermore, the conductive film is formed to a thickness of about 100 nm to 30 nm. A conductive film having light transmitting properties is formed by using a conductive oxide material so as to be in contact with the upper or lower part of the substrate. In this case, the sheet resistance of the first electrode 6034 may be suppressed. Oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), gallium-added Only conductive films using other transparent oxide conductive materials such as zinc oxide doped with ZnO (GZO) are used. It is also possible to use ITSO or indium oxide containing silicon oxide. A mixture of 20% zinc oxide (ZnO) may be used. In this case, it is preferable to provide an electron injection layer in the electroluminescent layer 6035.

[0316] The second electrode 6036 is formed of a material and a thickness that reflects or blocks light. It is made of a material suitable for use as an anode, such as titanium nitride, zirconium nitride, One or more of titanium, tungsten, nickel, platinum, chromium, silver, aluminum, etc. In addition to the single layer film, titanium nitride and aluminum-based films are laminated, titanium nitride films are also available. The three-layer structure of the film, the film mainly composed of aluminum, and the titanium nitride film is formed as the second electrode 6036. can be used.

[0317] The electroluminescent layer 6035 is composed of one or more layers. In this case, these layers are classified into a hole injection layer, a hole transport layer, a light emitting layer, and a The electroluminescent layer 6035 is a light-emitting layer, and can be classified into an electron transport layer, an electron injection layer, etc. In the case where the second layer has any one of a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer, From the first electrode 6034, an electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, and a hole injection layer are formed in this order. The boundaries between the layers do not necessarily need to be clear, and the layers that make up each other may be laminated. In some cases, the materials are mixed together and the interface is unclear. Organic materials can be used. It is possible to use any of the materials of the molecular system. The number of repeats (degree of polymerization) corresponds to a low polymer of about 2 to 20. The distinction between these is not necessarily strict, and these are the ones in which hole transport properties (hole mobility) are particularly important. For convenience, the hole injection layer is the layer that contacts the anode, and the The layer adjacent to the hole injection layer is called the hole transport layer to distinguish it from the other. Similarly, the layer in contact with the cathode is called the electron injection layer, and the layer in contact with the electron injection layer is called the electron transport layer. The light-emitting layer may also function as an electron transport layer, and is therefore also called a light-emitting electron transport layer.

[0318] In the case of the pixel shown in FIG. 18A, light emitted from the light emitting element 6033 is indicated by a white arrow. As indicated by , it can be taken out from the first electrode 6034 side.

[0319] Next, in FIG. 18B, a transistor 6041 is an n-type transistor, and a light emitting element 6043 emits a 1 is a cross-sectional view of a pixel in the case where light is extracted from the second electrode 6046 side. 41 is covered with an insulating film 6047, and a partition wall 604 having an opening is formed on the insulating film 6047. 8 is formed. A part of the first electrode 6044 is exposed at the opening of the partition wall 6048. In the opening, a first electrode 6044, an electroluminescent layer 6045, and a second electrode 6046 are disposed. are layered in order.

[0320] The first electrode 6044 is formed of a material and a thickness that reflects or blocks light and has a function. Formation of low-function metals, alloys, electrically conductive compounds, and mixtures of these. Specifically, alkali metals such as Li and Cs, and aluminum metals such as Mg, Ca, and Sr can be used. Potassium earth metals and alloys containing them (Mg:Ag, Al:Li, Mg:In, etc.), In addition to these compounds (calcium fluoride, calcium nitride), rare earth metals such as Yb and Er In addition, when an electron injection layer is provided, another conductive film such as aluminum can be used. It is also possible to use

[0321] The second electrode 6046 is formed of a material or with a thickness that transmits light and serves as an anode. The material is made of a suitable material for use. For example, indium tin oxide (ITO), zinc oxide ( ZnO), indium zinc oxide (IZO), gallium doped zinc oxide (GZO), etc. Other transparent conductive oxide materials can be used for the second electrode 6046. TSO or indium oxide containing silicon oxide, plus 2-20% zinc oxide (ZnO) A mixture of the above may be used for the second electrode 6046. Other examples include titanium nitride, zirconium nitride, titanium, tungsten, nickel, platinum, In addition to single-layer films made of one or more of chromium, silver, aluminum, etc., titanium nitride and aluminum A titanium nitride film and an aluminum-based film are stacked together. A three-layer structure with a titanium film can also be used for the second electrode 6046. When using a material other than a conductive material, the thickness should be such that light can pass through (preferably 5 nm to 3 A second electrode 6046 is formed with a thickness of about 100 nm.

[0322] The electroluminescent layer 6045 can be formed in the same manner as the electroluminescent layer 6035 in FIG. do.

[0323] In the case of the pixel shown in FIG. 18B, light emitted from the light emitting element 6043 is indicated by a white arrow. As shown, it can be taken out from the second electrode 6046 side.

[0324] Next, in FIG. 18C, a transistor 6051 is an n-type transistor, and a light emitting element 6053 emits light. A cross-sectional view of a pixel in the case where light is extracted from the first electrode 6054 side and the second electrode 6056 side. The transistor 6051 is covered with an insulating film 6057. A partition wall 6058 having an opening is formed. The first electrode is disposed at the opening of the partition wall 6058. The first electrode 6054 is partially exposed through the opening, and the first electrode 6054 and the electroluminescent layer 60 55 and a second electrode 6056 are laminated in that order.

[0325] The first electrode 6054 can be formed in the same manner as the first electrode 6034 in FIG. The second electrode 6056 is formed in the same manner as the second electrode 6046 in FIG. The electroluminescent layer 6055 can be formed in the same manner as the electroluminescent layer 6035 in FIG. It is possible.

[0326] In the case of the pixel shown in FIG. 18C, light emitted from the light emitting element 6053 is indicated by a white arrow. As shown in FIG. 6, the light can be taken out from the first electrode 6054 side and the second electrode 6056 side. .

[0327] This embodiment mode can be implemented in appropriate combination with other embodiment modes. EXAMPLES

[0328] By using the semiconductor device according to one embodiment of the present invention, highly reliable electronic devices and low power consumption can be achieved. In addition, a semiconductor display device according to one embodiment of the present invention can be provided. By using this technology, we can develop highly reliable electronic devices, highly visible electronic devices, and electronic devices with low power consumption. In particular, it is possible to provide a portable electronic device that is difficult to receive a constant supply of power. In the case of a device, a semiconductor device or a semiconductor display device with low power consumption according to one embodiment of the present invention is used as the device. By adding it to the components, benefits such as longer continuous use time can be obtained. In addition, by using a transistor with a low off-state current, it is possible to compensate for the high off-state current. Since redundant circuit design is no longer necessary, the integration density of integrated circuits used in semiconductor devices can be increased. This makes it possible to improve the performance of the semiconductor device.

[0329] In addition, in the semiconductor device of the present invention, the temperature of the heat treatment in the manufacturing process can be suppressed. Therefore, the substrate is made of flexible synthetic resin such as plastic, which has lower heat resistance than glass. It is possible to fabricate highly reliable transistors with excellent characteristics even on substrates. Therefore, by using the manufacturing method according to one embodiment of the present invention, a highly reliable, lightweight, and It is possible to provide a flexible semiconductor device. Polyesters, such as ethylene terephthalate (PET), polyethersulfone ( PES), polyethylene naphthalate (PEN), polycarbonate (PC), polyethylene Polyether ketone (PEEK), polysulfone (PSF), polyetherimide (PE I), polyarylate (PAR), polybutylene terephthalate (PBT), polyimide , acrylonitrile butadiene styrene resin, polyvinyl chloride, polypropylene, polyvinyl acetate Examples of the resin include vinyl acetate and acrylic resin.

[0330] The semiconductor device according to one embodiment of the present invention is applicable to a display device, a notebook personal computer, a recording medium, Image playback device equipped with a medium (typically DVD: Digital Versatile (Devices with a display that can play back recording media such as discs and display the images) In addition, a semiconductor device according to one embodiment of the present invention can be used in a power As child devices, mobile phones, portable game consoles, personal digital assistants, electronic books, video cameras, Digital still camera, goggle-type display (head-mounted display), navigation systems, audio playback devices (car audio, digital audio players, etc.) , copiers, facsimiles, printers, printer-combination machines, automated teller machines (A TM), vending machines, etc. Specific examples of these electronic devices are shown in Figure 19.

[0331] FIG. 19A shows an electronic book having a housing 7001, a display portion 7002, and the like. The semiconductor display device according to the embodiment can be used for the display portion 7002. By using a semiconductor display device according to one embodiment of the present invention, it is possible to provide a highly reliable electronic book reader and a highly visible display device. It is possible to provide electronic books with high display quality and low power consumption. The semiconductor device according to one embodiment of the present invention can be used in an integrated circuit for controlling the operation of an electronic book. The semiconductor device according to one aspect of the present invention can be used in an integrated circuit for controlling the operation of an electronic book. By using this device, it is possible to develop highly reliable e-books, e-books that consume less power, and e-books with high functionality. In addition, by using a flexible substrate, it is possible to provide a semiconductor device, Since the display device can be made flexible, it is flexible, lightweight, and easy to use. It is possible to provide e-books that are easy to read.

[0332] FIG. 19B shows a display device, which includes a housing 7011, a display portion 7012, a support 7013, and the like. The semiconductor display device according to one embodiment of the present invention can be used for the display portion 7012. By using a semiconductor display device according to one embodiment of the present invention for the display portion 7012, a highly reliable display can be obtained. It is possible to provide a display device capable of displaying with high visibility and a display device with low power consumption. In addition, the semiconductor device according to one embodiment of the present invention can be used as a centralized control circuit for controlling the driving of a display device. The present invention can be applied to an integrated circuit for controlling the driving of a display device. By using the semiconductor device, a highly reliable display device, a display device with low power consumption, It is possible to provide a highly functional display device. This includes all display devices for displaying information, such as for data entry, TV broadcast reception, and advertisement display.

[0333] FIG. 19C shows a display device, which includes a housing 7021, a display portion 7022, and the like. The semiconductor display device according to this embodiment can be used for the display portion 7022. By using a semiconductor display device according to one embodiment of the present invention, a display device with high reliability and high visibility can be provided. It is possible to provide a display device capable of high quality display and a display device with low power consumption. The semiconductor device according to one embodiment of the present invention can be used in an integrated circuit for controlling the driving of a display device. The semiconductor device according to one aspect of the present invention can be used in an integrated circuit for controlling the driving of a display device. By using the device, it is possible to produce highly reliable display devices, low power consumption display devices, and high performance display devices. In addition, by using a flexible substrate, it is possible to provide a semiconductor device, Since the display device can be made flexible, it is flexible, lightweight, and easy to use. Therefore, as shown in FIG. 19(C), a display device that is fixed to a fabric or the like can be provided. This allows the display device to be used in a variety of applications, greatly expanding the range of applications of the display device.

[0334] FIG. 19D shows a portable game machine. The portable game machine includes a housing 7031, a housing 7032, a display portion 7033, A display unit 7034, a microphone 7035, a speaker 7036, an operation key 7037, a star The semiconductor display device according to one embodiment of the present invention includes a display portion 7033, The display portion 7033 and the display portion 7034 can be used as an embodiment of the present invention. By using the semiconductor display device, a highly reliable portable game machine and a highly visible display device can be manufactured. It is possible to provide a portable game machine capable of displaying a game and a portable game machine with low power consumption. In addition, the semiconductor device according to one embodiment of the present invention is an integrated circuit for controlling the operation of a portable game machine. The present invention can be applied to an integrated circuit for controlling the operation of a portable game machine. By using the semiconductor device according to the embodiment, a highly reliable portable game machine and a portable game machine with low power consumption can be provided. It is possible to provide a mobile game machine and a highly functional portable game machine. The portable game machine shown has two display units 7033 and 7034. The number of display units that the wristband game machine has is not limited to this.

[0335] FIG. 19E shows a mobile phone. The mobile phone includes a housing 7041, a display unit 7042, an audio input unit 7043, The device has a voice output unit 7044, an operation key 7045, a light receiving unit 7046, etc. By converting the light received in the sensor into an electrical signal, an external image can be captured. The semiconductor display device according to one embodiment of the present invention can be used for the display portion 7042. By using a semiconductor display device according to one embodiment of the present invention, a highly reliable mobile phone, It is possible to provide a mobile phone capable of displaying with high visibility and a mobile phone with low power consumption. Further, the semiconductor device according to one embodiment of the present invention may be implemented in an integrated circuit for controlling the operation of a mobile phone. The present invention relates to an integrated circuit for controlling the operation of a mobile phone. By using the semiconductor device, it is possible to develop highly reliable mobile phones, mobile phones with low power consumption, and mobile phones with high functionality. A mobile phone may be provided.

[0336] FIG. 19(F) shows a portable information terminal, which includes a housing 7051, a display unit 7052, and operation keys 7053. The portable information terminal shown in FIG. 19(F) has a modem built in a housing 7051. The semiconductor display device according to one embodiment of the present invention can be used for the display portion 7052. By using a semiconductor display device according to one embodiment of the present invention for the display portion 7052, reliability can be improved. portable information terminals with high visibility, portable information terminals with low power consumption In addition, the semiconductor device according to one embodiment of the present invention can be used as a driving circuit for a portable information terminal. It can be used in integrated circuits for controlling the operation of portable information terminals. By using a semiconductor device according to one embodiment of the present invention for an integrated circuit, a highly reliable portable information terminal can be realized. Ultimately, it is possible to provide a portable information terminal with low power consumption and high functionality.

[0337] This embodiment can be implemented in appropriate combination with any of the above embodiment modes. [Explanation of symbols]

[0338] 10 Pulse output circuit 11 Wiring 12 Wiring 13 Wiring 14 Wiring 15 Wiring 21 Input terminal 22 Input terminal 23 Input terminal 24 Input terminals 25 Input terminal 26 Output terminal 27 Output terminal 31 Transistor 32 Transistor 33 Transistor 34 Transistor 35 Transistor 36 Transistor 37 Transistor 38 Transistor 39 Transistor 40 Transistor 41 Transistor 42 Transistor 43 Transistor 51 Power line 52 Power line 53 Power line 100 Substrates 101 Gate electrode 102 Gate insulating film 103 Oxide semiconductor film 104 Oxide semiconductor film 105 Oxide semiconductor film 107 Oxide Semiconductor Film 108 Oxide semiconductor film 111 Source electrode 112 Drain electrode 113 Insulating film 114 Transistor 115 Backgate electrode 116 Insulating film 130 Channel protection film 131 Source electrode 132 Drain electrode 133 Insulating Film 140 Transistor 145 Backgate electrode 146 Insulating Film 150 Oxide Semiconductor Film 151 Oxide Semiconductor Film 152 Oxide Semiconductor Film 153 Oxide Semiconductor Film 200 boards 201 Insulating film 202 Electrode 203 Oxide Semiconductor Film 205 Oxide Semiconductor Film 207 Oxide Semiconductor Film 208 Oxide Semiconductor Film 211 Electrode 212 Gate insulating film 213 Gate electrode 214 Insulating film 215 Wiring 216 Wiring 217 Wiring 218 parts 220 Transistor 221 Contact Hole 222 Contact Hole 223 Contact Hole 230 Wiring 231 Contact Hole 700 pixels 701 Signal line driver circuit 702 Scanning line driver circuit 703 pixels 704 Transistor 705 Display element 706 holding capacity 707 Signal Line 708 scan lines 710 Pixel electrode 711 Counter Electrode 712 Microcapsules 713 Drain electrode 714 Resin 1401 Transistor 1402 Gate electrode 1403 Gate insulating film 1404 Oxide semiconductor film 1406a Conductive film 1406b Conductive film 1407 Insulating film 1408 Insulating film 1410 Pixel electrode 1411 Orientation film 1413 Counter electrode 1414 Orientation film 1415 Liquid crystal 1416 Sealing material 1417 Spacer 1420 Substrate 1601 Liquid crystal panel 1602 Diffuser 1603 Prism sheet 1604 Diffuser 1605 Light guide plate 1606 Reflector 1607 Light source 1608 Circuit Board 1609 FPC 1610 FPC 5300 Board 5301 Pixel unit 5302 Scanning line driver circuit 5303 Scanning line driver circuit 5304 Signal line driver circuit 5305 Timing Control Circuit 5601 Shift Register 5602 Sampling Circuit 5603 Transistor 5604 Wiring 5605 Wiring 6031 Transistor 6033 Light emitting element 6034 Electrode 6035 Electroluminescent layer 6036 Electrode 6037 Insulating film 6038 Bulkhead 6041 Transistor 6043 Light emitting element 6044 Electrode 6045 Electroluminescent layer 6046 Electrode 6047 Insulating film 6048 Bulkhead 6051 Transistor 6053 Light emitting element 6054 Electrode 6055 Electroluminescent layer 6056 Electrode 6057 Insulating film 6058 Bulkhead 7001 Case 7002 Display section 7011 Case 7012 Display section 7013 Support stand 7021 Case 7022 Display section 7031 Case 7032 Case 7033 Display section 7034 Display section 7035 Microphone 7036 Speaker 7037 Operation Key 7038 Stylus 7041 Case 7042 Display section 7043 Audio input section 7044 Audio output section 7045 Operation key 7046 Light receiving section 7051 Case 7052 Display section 7053 Operation key

Claims

1. a transistor, a first insulating film, a second insulating film, and a pixel electrode; The transistor is A gate electrode; a gate insulating film on the gate electrode; an oxide semiconductor film containing In, Ga, and Zn on the gate insulating film; a source electrode and a drain electrode in contact with an upper surface of the oxide semiconductor film, the first insulating film is in contact with the oxide semiconductor film, the source electrode, and the drain electrode, and has a first opening; the first insulating film has a structure in which a silicon nitride film is laminated on a silicon oxide film, the second insulating film is disposed on the first insulating film and has a second opening overlapping the first opening; the pixel electrode is disposed on the second insulating film and is disposed so as to be in contact with an upper surface of one of the source electrode and the drain electrode through the first opening and the second opening; a width of the second opening in the upper surface of the second insulating film in a channel length direction of the transistor is larger than a width of the first opening in the upper surface of the first insulating film; a center of the width of the second opening is offset from a center of the width of the first opening in a channel length direction of the transistor.

2. a transistor, a first insulating film, a second insulating film, and a pixel electrode; The transistor is A gate electrode; a gate insulating film on the gate electrode; an oxide semiconductor film containing In, Ga, and Zn on the gate insulating film; a source electrode and a drain electrode in contact with an upper surface of the oxide semiconductor film, the first insulating film is in contact with the oxide semiconductor film, the source electrode, and the drain electrode, and has a first opening; the first insulating film has a structure in which a silicon nitride film is laminated on a silicon oxide film, the second insulating film is disposed on the first insulating film and has a second opening overlapping the first opening; the pixel electrode is disposed on the second insulating film and is disposed so as to be in contact with an upper surface of one of the source electrode and the drain electrode through the first opening and the second opening; a width of the second opening in the upper surface of the second insulating film in a channel length direction of the transistor is larger than a width of the first opening in the upper surface of the first insulating film; a center of a width of the second opening is shifted from a center of a width of the first opening in a channel length direction of the transistor; the first opening is disposed so as not to overlap the gate electrode; the second opening is disposed so as to overlap the gate electrode.

3. In claim 1 or 2, An alignment film is provided on the pixel electrode, the pixel electrode has a recess at the center of the first opening, The recess is filled with the alignment film.

Images