Display device

Abstract

To provide a semiconductor device and the like each of which has a high aperture ratio and a capacitive element enabling the charge capacity of the semiconductor device to be increased.SOLUTION: A semiconductor device includes: a transistor 103 including gate insulating films 305, 306, an oxide semiconductor film 308b, a gate electrode 304c partially overlapping with the oxide semiconductor film, and a pair of electrodes 310d, 310e in contact with the oxide semiconductor film; a capacitive element including a first light-transmitting conductive film 308c over the gate insulating film, a dielectric film (nitride insulating film) 314 over the first light-transmitting conductive film, and a second light-transmitting conductive film 316b over the dielectric film; an oxide insulating film 312 over the pair of electrodes of the transistor; and a nitride insulating film over the oxide insulating film. The dielectric film and the oxide insulating film have first openings 372, 372c over one of the pair of electrodes, and the first light-transmitting conductive film. The nitride insulating film has a second opening 374c over the one of the pair of electrodes, and the second opening is on an inner side than the first opening.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to an object, a process (including a method and a manufacturing method), a machine, a product (manufacture, In particular, the present invention relates to a composition of matter. One aspect of the present invention is a semiconductor device, a display device, a light-emitting device, a driving method thereof, or a manufacturing method thereof. In particular, one embodiment of the present invention relates to a semiconductor device including an oxide semiconductor, a display device, Or it relates to a light emitting device, etc.

[0002] In this specification, the term "semiconductor device" refers to a device that utilizes the electronic properties of semiconductors. The category includes all devices that can function in the field, such as electro-optical devices, semiconductor circuits, and electrical equipment. All of these are included in the semiconductor device. [Background technology]

[0003] In recent years, flat panel displays such as liquid crystal displays (LCDs) have become widespread. In a display device such as a flat panel display, the pixels are arranged in the row and column directions. In the pixel, a transistor which is a switching element and an electric A liquid crystal element is connected in series with the liquid crystal element, and a capacitance element is connected in parallel with the liquid crystal element. do.

[0004] The semiconductor material constituting the semiconductor film of the transistor is amorphous. Silicon semiconductors such as silicon or polysilicon (polycrystalline) are widely used.

[0005] Metal oxides that exhibit semiconductor properties (hereinafter, referred to as oxide semiconductors) are used in transistors. It is a semiconductor material that can be applied to the semiconductor film of zinc oxide or In-Ga-Zn oxide. Techniques for fabricating transistors using nitride semiconductors have been disclosed (Patent Document 1 and Patent Document 2). See reference 2.)

[0006] In order to increase the aperture ratio, a metal oxide film is provided on the same surface as the oxide semiconductor film of the transistor. The oxide semiconductor film and the pixel electrode connected to the transistor are provided at a predetermined distance from each other. A display device having such a capacitive element has been disclosed (see Patent Document 3). [Prior art documents] [Patent documents]

[0007] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A [Patent Document 3] U.S. Pat. No. 8,102,476 Summary of the Invention [Problem to be solved by the invention]

[0008] The capacitance element has a pair of electrodes and a dielectric film between them. The other electrode is a light-shielding electrode such as a gate electrode, source or drain that constitutes a transistor. In many cases, the insulating film is made of a conductive film having a

[0009] In addition, the larger the charge capacity of the capacitance element, the more the liquid crystal element will The period during which the alignment of the liquid crystal molecules can be kept constant can be extended. In a display device that displays an image, the period can be extended to reduce the number of times image data is rewritten. This can reduce the number of inputs and outputs, which is expected to reduce power consumption.

[0010] However, when one electrode of the capacitor is formed of a semiconductor film, the semiconductor film is Depending on the potential applied, the capacitance value charged to the capacitance element may be lower than the specified value. As a result, the period during which the alignment of the liquid crystal molecules in the liquid crystal element is kept constant becomes shorter, and the rewriting frequency of image data becomes shorter. The number of devices increases, and power consumption increases.

[0011] In order to increase the charge capacity of the capacitance element, the area occupied by the capacitance element is increased. Specifically, there is a method for increasing the area where a pair of electrodes overlap. In the above display device, a light-shielding layer is provided to increase the area where the pair of electrodes overlap. If the area of ​​the conductive film to be covered is increased, the aperture ratio of the pixel is reduced, and the display quality of the image is degraded.

[0012] In view of the above, one embodiment of the present invention provides a capacitance-reducing film having a high aperture ratio and capable of increasing a charge capacity. Another object of the present invention is to provide a semiconductor device having a quantum dot. One of the objects of the present invention is to provide a semiconductor device or the like capable of reducing power consumption. An object of one embodiment of the present invention is to provide a semiconductor device or the like with high resolution. Another embodiment of the present invention is a semiconductor device including an oxide semiconductor, in which electrical characteristics are improved. Another object of one embodiment of the present invention is to improve the light-emitting properties of a semiconductor device using an oxide semiconductor. It is an object of the present invention to improve the reliability of a semiconductor device or the like. Another object of the present invention is to control the oxygen content in an oxide semiconductor. An object of one embodiment is to control a transistor to be normally on. One embodiment of the present invention is to control the fluctuation, variation, or decrease in the threshold voltage of a transistor. Another object of one embodiment of the present invention is to provide a transistor having a low off-state current. Another object of one embodiment of the present invention is to provide a semiconductor device having a low off-state current. Another object of the present invention is to provide a semiconductor device with low power consumption. Another object of the present invention is to provide a display device that is easy on the eyes. Another object of one embodiment of the present invention is to provide a light-transmitting conductive film. Another object of the present invention is to provide a semiconductor device or the like using the same. Another object of the present invention is to provide a semiconductor device using a semiconductor film having a high optical property. An object of one embodiment is to provide a semiconductor device or the like using a light-transmitting electrode. Another object of one embodiment of the present invention is to provide a novel semiconductor device or the like. An object of one embodiment of the present invention is to provide a semiconductor device or the like with excellent characteristics.

[0013] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. Other issues can be extracted from the drawings, claims, etc. [Means for solving the problem]

[0014] One embodiment of the present invention is a gate insulating film, an oxide semiconductor film over the gate insulating film, and a gate insulating film. a gate electrode which is partially overlapped with the oxide semiconductor film through a film; a transistor having a first light-transmitting conductive film over a gate insulating film; a dielectric film on the first conductive film having light transmitting properties, and a second conductive film on the dielectric film having light transmitting properties; a capacitance element having a pair of electrodes of a transistor, an oxide insulating film on the pair of electrodes of the transistor, and a nitride film on the oxide insulating film. The dielectric film included in the capacitance element is a nitride insulating film, and the oxide insulating film is The insulating film has a first opening on one of the pair of electrodes and on the first light-transmitting conductive film. the nitride insulating film has a second opening on one of the pair of electrodes, the second opening being , is provided inside the first opening. Also, in the second opening on one of the pair of electrodes The second light-transmitting conductive film included in the capacitor is a pair of electrodes included in the transistor. Connect to one of the poles.

[0015] One embodiment of the present invention is a gate insulating film, an oxide semiconductor film over the gate insulating film, and a gate insulating film. a gate electrode which is partially overlapped with the oxide semiconductor film through a film; a transistor having a first light-transmitting conductive film over a gate insulating film; a dielectric film on the first conductive film having light transmitting properties, and a second conductive film on the dielectric film having light transmitting properties; a capacitance element having a pair of electrodes of a transistor, an oxide insulating film on the pair of electrodes of the transistor, and a nitride film on the oxide insulating film. The dielectric film included in the capacitance element is a nitride insulating film. The second light-transmitting conductive film is connected to one of a pair of electrodes included in a transistor. Furthermore, the oxide semiconductor film and the first light-transmitting conductive film have different hydrogen concentrations.

[0016] Note that the first light-transmitting conductive film preferably has a higher hydrogen concentration than the oxide semiconductor film. In the first conductive film having light-transmitting properties, secondary ion mass spectrometry (SIMS) Hydrogen concentration obtained by ondary ion mass spectrometry is 8 x 10 19 atoms / cm 3 More than 1×10 20 atoms / cm 3 More preferably, 5×10 20 atoms / cm 3 The oxide semiconductor film The hydrogen concentration obtained by secondary ion mass spectrometry is 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than 1 x 10 18 at oms / cm 3 Less than or equal to 5×10 17 atoms / cm 3 The following are more preferred Or 1×10 16 atoms / cm 3 The following is the result.

[0017] The first light-transmitting conductive film has a lower resistivity than the oxide semiconductor film. The resistivity of the conductive film having the above characteristic is 1×10 -8 1×10 times more - 1 times or less, typically 1×10 -3 Ωcm or more 1×10 4 Ωcm not yet More preferably, the resistivity is less than 1×10 -3 Ωcm or more 1×10 -1 Less than Ωcm It is good.

[0018] Note that the oxide semiconductor film and the first light-transmitting conductive film include microcrystalline regions. The region is the electron diffraction pattern using electron diffraction with a measurement range of 5 nmφ to 10 nmφ. In the turn, a plurality of spots arranged in a circular pattern are observed, and a limited-area electron beam is The film may have no spots in the diffraction pattern. The electron beam diffraction is ultrafine in the range of 10 nmφ or less, preferably 5 nmφ to 10 nmφ. This is called electron diffraction. The measurement range of selected area electron diffraction can be made 300 nmφ or more. The grain size of the crystal grains contained in the microcrystalline region is 10 nm or less. The multiple spots placed on the oxide semiconductor film were observed in the entire region in the thickness direction of the oxide semiconductor film. is preferred.

[0019] The oxide semiconductor film and the first light-transmitting conductive film contain indium or zinc. include. Effect of the Invention

[0020] According to one embodiment of the present invention, there is provided a semiconductor device having a capacitor element with an increased aperture ratio and an increased charge capacity. In addition, a semiconductor device with low power consumption can be provided. do. [Brief description of the drawings]

[0021] [Figure 1] 1A and 1B are a block diagram and a circuit diagram illustrating one embodiment of a semiconductor device. [Diagram 2] FIG. 1 is a top view illustrating one embodiment of a semiconductor device. [Diagram 3] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 4] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Diagram 5] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 6] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 7]1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 8] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 9] FIG. 1 is a top view illustrating one embodiment of a semiconductor device. [Figure 10] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 11] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 12] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 13] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 14] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 15] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 16] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 17] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a semiconductor device. [Figure 18] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 19] FIG. 1 is a top view illustrating one embodiment of a semiconductor device. [Figure 20] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 21] 1A to 1C are cross-sectional views of a transistor and a diagram illustrating a multilayer film. [Figure 22] FIG. 2 is a diagram illustrating a film forming apparatus. [Diagram 23] FIG. 2 is a diagram illustrating a film forming chamber. [Figure 24] FIG. 4 is a diagram illustrating a heating chamber. [Diagram 25] 1A and 1B are diagrams illustrating a touch sensor according to an embodiment. [Figure 26] 1A to 1C are diagrams illustrating examples of configurations of a touch panel and an electronic device according to an embodiment. [Figure 27] 1A and 1B are diagrams illustrating a pixel including a touch sensor according to an embodiment; [Figure 28] 1A to 1C are diagrams illustrating operations of a touch sensor and a pixel according to an embodiment; [Figure 29] FIG. 1 illustrates an example of an electronic device. [Diagram 30] FIG. 1 illustrates an example of an electronic device. [Diagram 31] FIG. 13 is a diagram showing the results of CPM measurement of an oxide semiconductor film. [Diagram 32] FIG. 13 is a diagram showing the results of CPM measurement of an oxide semiconductor film. [Diagram 33] FIG. 2 is a diagram illustrating a sample structure. [Diagram 34] FIG. 1 is a diagram illustrating sheet resistance. [Diagram 35] FIG. 1 is a diagram for explaining the measurement results of SIMS. [Diagram 36] FIG. 1 is a diagram illustrating the measurement results of ESR. [Figure 37] FIG. 1 is a diagram illustrating the measurement results of ESR. [Figure 38] 1 shows a cross-sectional TEM image of a CAAC-OS film. [Figure 39] Electron diffraction patterns of the CAAC-OS film. [Diagram 40] 1 shows a cross-sectional TEM image of a CAAC-OS film. [Diagram 41] 1 shows a cross-sectional TEM image and an X-ray diffraction spectrum of a CAAC-OS film. [Diagram 42] Electron diffraction patterns of the CAAC-OS film. [Diagram 43] 1 shows a cross-sectional TEM image and an X-ray diffraction spectrum of a CAAC-OS film. [Diagram 44] Electron diffraction patterns of the CAAC-OS film. [Diagram 45] 1 shows a cross-sectional TEM image and an X-ray diffraction spectrum of a CAAC-OS film. [Diagram 46] Electron diffraction patterns of the CAAC-OS film. [Figure 47] 1 shows a cross-sectional TEM image and a microelectron diffraction pattern of a microcrystalline oxide semiconductor film. [Figure 48]1 shows a planar TEM image and a selected area electron diffraction pattern of a microcrystalline oxide semiconductor film. [Figure 49] FIG. 1 is a conceptual diagram of an electron beam diffraction intensity distribution. [Figure 50] 1 is a microelectron beam diffraction pattern of a quartz glass substrate. [Figure 51] 1 shows a microelectron beam diffraction pattern of a microcrystalline oxide semiconductor film. [Figure 52] 1 shows a cross-sectional TEM image of a microcrystalline oxide semiconductor film. [Figure 53] 1 shows an XRD spectrum of a microcrystalline oxide semiconductor film. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0022] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and it is understood by those skilled in the art that various changes can be made in form and detail. The present invention is not limited to the description of the following embodiments. It is not something that is done.

[0023] In the configuration of the present invention described below, the same parts or parts having similar functions are designated by the same reference numerals. The same reference numerals are used in common among different drawings, and the repeated explanations are omitted. When referring to a part having a function, the hatch pattern shall be the same and no symbol shall be attached. There is.

[0024] In each figure described in this specification, the size of each structure, the thickness of the film, or the area is not shown for clarity. The figures may be exaggerated for illustrative purposes and are not necessarily limited to that scale.

[0025] In this specification and elsewhere, ordinal numbers such as 1st, 2nd, etc. are used for convenience. The order of steps or stacking is not intended to indicate the order of steps or stacking. It does not indicate a specific name for the purpose of reference.

[0026] In addition, the functions of the "source" and "drain" in one embodiment of the present invention are as follows: In some cases, such as when the direction of the current changes due to a change in the In this regard, the terms "source" and "drain" may be used interchangeably. .

[0027] Voltage is the potential difference between two points, and potential is the electrostatic field at a certain point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in a particle. Generally, the potential difference between a potential at a certain point and a reference potential (for example, ground potential) This is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, potential may be read as voltage. In this specification, voltage may be read as potential.

[0028] In this specification, a mask is formed by photolithography and an etching process is performed. After this, the mask is removed.

[0029] (Embodiment 1) In this embodiment, a semiconductor device which is one embodiment of the present invention will be described with reference to drawings. Note that in this embodiment, a liquid crystal display device is used as an example of a semiconductor device according to one embodiment of the present invention. explain.

[0030] <Configuration of Semiconductor Device> FIG. 1A shows an example of a semiconductor device. The semiconductor device shown in FIG. 0, a scanning line driving circuit 104, and a signal line driving circuit 106 are arranged in parallel or approximately in parallel. m scanning lines 107 are provided and the potentials of which are controlled by a scanning line driving circuit 104, The individual electrodes are arranged in parallel or approximately in parallel, and the potential is controlled by a signal line driver circuit 106. The pixel section 100 has n signal lines 109. The pixel array 301 includes a number of pixels 301. The pixels 301 are arranged parallel or approximately parallel to each other along the scanning line 107. The capacitance lines 115 are arranged along the signal lines 109. The scanning line driving circuit 104 and the signal line driving circuit 105 may be arranged in a row or substantially in parallel. The circuit 106 may be collectively referred to as a drive circuit section.

[0031] Each scanning line 107 corresponds to one of the pixels 301 arranged in m rows and n columns in the pixel section 100. The signal lines 109 are electrically connected to the n pixels 301 arranged in any one row. is m pixels 301 arranged in m rows and n columns, and m pixels 301 arranged in any one of the columns. 1. Both m and n are integers of 1 or more. is n pixels 301 arranged in any one of the rows among the pixels 301 arranged in m rows and n columns. 1. Capacitor lines 115 are arranged parallel to each other along the signal line 109. In the case where the pixels 301 are arranged in m rows and n columns, any one of the pixels 301 may be arranged in a matrix of m rows and n columns. The pixel array 302 is electrically connected to m pixels 301 arranged in a column.

[0032] FIG. 1B is an example of a circuit diagram of a pixel 301 included in the semiconductor device shown in FIG. The pixel 301 shown in FIG. 1B is electrically connected to the scanning line 107 and the signal line 109. A transistor 103, one electrode of which is electrically connected to the drain of the transistor 103. The other electrode of the capacitor 105 is electrically connected to a capacitor line 115 that supplies a constant potential. Then, the pixel electrode is electrically connected to the drain of the transistor 103 and one electrode of the capacitor 105. A wiring that supplies a common potential to an electrode (opposite electrode) that is connected to the pixel electrode. and a liquid crystal element 108 electrically connected to the liquid crystal display.

[0033] The liquid crystal element 108 is formed by a substrate on which the transistor 103 and the pixel electrode are formed and a counter electrode. The optical modulation effect of the liquid crystal sandwiched between the substrates allows light to pass or not pass. The optical modulation of liquid crystals is controlled by the electric field applied to the liquid crystal (vertical electric field The pixel electrodes are formed on a substrate. When a counter electrode (also called a common electrode) is formed in the liquid crystal, the electric field applied to the liquid crystal is in the horizontal direction. This results in an electric field of

[0034] Instead of the liquid crystal element 108, various display elements or light-emitting elements can be used. For example, an example of a display element or a light-emitting element is an electroluminescent (EL) element. EL elements (EL elements containing organic and inorganic materials, organic EL elements, inorganic EL elements), LE D (white LED, red LED, green LED, blue LED, etc.), transistor (current-dependent transistors that emit light when exposed to light, electron emitters, liquid crystal elements, electronic ink, electrophoretic elements, graphene Rating light bulbs (GLV), plasma displays (PDP), digital microphones Chromar mirror device (DMD), IMOD (Interference Modulation) elements, piezoelectric ceramic displays, carbon nanotubes, etc. Some have display media whose contrast, brightness, reflectance, transmittance, etc. change. An example of a display device using an EL element is an EL display. An example of a display device using this method is a field emission display (FED). is a flat panel display using the SED method (SED: Surface-conduction E LCD displays are used in the following applications: An example of the device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, etc.). play, reflective LCD, direct-view LCD, projection LCD) An example of a display device using electronic ink or electrophoretic elements is an electronic page. There are names such as Pa.

[0035] Next, a specific example of the pixel 301 of the liquid crystal display device will be described. FIG. 2A shows a top view of a part of the scanning line driver circuit 104. A top view of a is shown in FIG. 2(B). In FIG. 2(B), the counter electrode and the liquid crystal element are Omitted.

[0036] In FIG. 2A, a conductive film 304a functioning as a gate, a gate insulating film (FIG. 2A ) are not shown in the figure. The transistor 102 is formed by the conductive films 310a and 310b which function as an insulator. The compound semiconductor film 308a is provided on the gate insulating film. The conductive film 304b formed on the conductive film 304 and the conductive film 31 formed simultaneously with the conductive films 310a and 310b are 0c, the conductive film 304b, and the conductive film 310c are connected to each other by a light-transmitting conductive film 316a. The light-transmitting conductive film 316a is provided in the openings 372a and 374a. It connects to film 304b and to conductive film 310c in openings 372b and 374b.

[0037] In FIG. 2B, the conductive film 304c functioning as a scanning line is substantially perpendicular to the signal line. The conductive film 310d that functions as a signal line is provided so as to extend in the direction (the left-right direction in the figure). The capacitance line is provided by extending in a direction substantially perpendicular to the scanning line (the vertical direction in the drawing). The conductive film 310f extends in a direction parallel to the signal lines. The conductive film 304c functioning as a gate electrode is electrically connected to the scanning line driver circuit 104 (see FIG. 1A). , and a conductive film 310d functioning as a signal line and a conductive film 310b functioning as a capacitance line are connected to The film 310f is electrically connected to the signal line driving circuit 106 (see FIG. 1(A)). .

[0038] The transistor 103 is provided in a region where the scanning line and the signal line intersect. A conductive film 304c that functions as a gate insulating film (not shown in FIG. 2B), The oxide semiconductor film 308b on which the channel region is formed, the source and drain The transistor 103 is formed by the conductive films 310d and 310e that function as the The conductive film 304c also functions as a scan line. It functions as the gate of the transistor 103. The conductive film 310d also functions as a signal line. The region overlapping with the oxide semiconductor film 308b serves as the source or drain of the transistor 103. In FIG. 2B, the scanning line has an end that is an oxide film in the top view. Therefore, the scanning lines are located outside the edge of the semiconductor film 308b. As a result, the oxide film in the transistor The semiconductor film 308b is not irradiated with light, and therefore, the change in the electrical characteristics of the transistor can be suppressed. Cut.

[0039] The conductive film 310e is formed in the opening 374c provided inside the opening 372c. The conductive film 316b is electrically connected to a light-transmitting conductive film 316b which functions as a pixel electrode.

[0040] The capacitor 105 is connected to a conductive film 310f that functions as a capacitor line in the opening 372. The capacitor 105 is formed of a light-transmitting conductive film formed on a gate insulating film. a dielectric film formed of a nitride insulating film provided on the transistor 103; and a light-transmitting conductive film 316b that functions as a pixel electrode. The capacitive element 105 is transparent.

[0041] Since the capacitor 105 has a light-transmitting property, the capacitor 105 is disposed in the pixel 301a. Therefore, the aperture ratio can be increased, typically to 50 % or more, preferably 55% or more, and more preferably 60% or more. In addition, a semiconductor device with increased charge capacity can be obtained. In a semiconductor device, such as a liquid crystal display device, the area of ​​a pixel is becoming smaller, and the area of ​​a capacitance element is also becoming smaller. Therefore, in a semiconductor device with high resolution, the charge capacity stored in the capacitance element is However, since the capacitor 105 shown in this embodiment has a light-transmitting property, By providing the capacitance element in the pixel, it is possible to obtain a sufficient charge capacity in each pixel while increasing the aperture ratio. Typically, the pixel density is 200ppi or more, or even 300ppi. The present invention can be suitably used for high-resolution semiconductor devices having a resolution of i or higher.

[0042] In addition, the pixel 301a shown in FIG. 2B has a side parallel to the conductive film 304c that functions as a scanning line. The side parallel to the conductive film 310d functioning as a signal line is shorter than the side The conductive film 310f functioning as a capacitance line is parallel to the conductive film 310d functioning as a signal line. As a result, the area of ​​the conductive film 310f in the pixel 301a is Since the number of the conductors can be reduced, the aperture ratio can be increased. The conductive film 310f having a light-transmitting property is in direct contact with the conductive film 308c having a light-transmitting property without using a connection electrode. Therefore, the aperture ratio can be further increased.

[0043] In addition, according to one embodiment of the present invention, the aperture ratio can be increased even in a high-resolution display device. This allows the light from light sources such as backlights to be used efficiently, and reduces the power consumption of the display device. The force can be reduced.

[0044] Next, the cross-sectional view between the dashed lines AB and CD in FIG. 2 is shown in FIG. FIG. 3(B) shows an enlarged view of the portion surrounded by the dashed line E in FIG. 3(A). An enlarged view of the area enclosed by dashed line F in FIG. 3(C) is shown.

[0045] The liquid crystal display device shown in this embodiment has a liquid crystal display device between a pair of substrates (a substrate 302 and a substrate 342). The element 322 is sandwiched.

[0046] The liquid crystal element 322 is connected to a light-transmitting conductive film 316b above the substrate 302 to control the alignment. A liquid crystal layer 320 and a conductive film 350 are arranged in a liquid crystal display device. Note that the light-transmitting conductive film 316b is used as one electrode of the liquid crystal element 322. The conductive film 350 functions as the other electrode of the liquid crystal element 322 .

[0047] The driving method of a liquid crystal display device having a liquid crystal element includes TN mode, STN mode, VA mode, mode, ASM (Axially Symmetric Aligned Micro- cell) mode, OCB (Optically Compensated Biref ringence mode, FLC (Ferroelectric Liquid Cr ystal) mode, AFLC(AntiFerroelectric Liquid Crystal) mode, MVA(Multi-domain Vertical Al ignment) mode, PVA (Patterned Vertical Alignment) mode, ment) mode, IPS mode, FFS mode, or TBA (Transverse Bend Alignment mode, etc. may also be used. In addition to the above-mentioned driving method, the liquid crystal display device can be driven by an ECB (Electric Carrier Bipolar Transistor) or the like. lly Controlled Birefringence mode, PDLC (Poly lymer Dispersed Liquid Crystal) mode, PNLC( Polymer Network Liquid Crystal) mode, guest host However, there are various types of liquid crystal elements and their driving methods, and they are not limited to these. can be used.

[0048] Also, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent. The liquid crystal element may be configured by the liquid crystal that exhibits the blue phase. Since it is short and optically isotropic, alignment treatment is not required and viewing angle dependency is small.

[0049] In this embodiment, a vertical electric field type liquid crystal display device will be described.

[0050] Thus, a liquid crystal display device is a device that has liquid crystal elements. The liquid crystal display device includes a driving circuit for driving a plurality of pixels. A control circuit, a power supply circuit, a signal generating circuit, a backlight module, etc., are arranged in It is also called a liquid crystal module.

[0051] In the driver circuit portion, a conductive film 304a functions as a gate, and a gate insulating film and an oxide semiconductor film 308a in which a channel region is to be formed. The conductive films 310a and 310b functioning as a source and a drain of the transistor 10 The oxide semiconductor film 308a is provided over the insulating film 306. On the layers 310a and 310b, insulating films 312 and 314 are provided as protective films. .

[0052] In the pixel portion, a conductive film 304c functions as a gate, and a gate insulating film The insulating film 305 and the insulating film 306, the oxide semiconductor film 308b in which the channel region is to be formed, The transistor 103 is formed by the conductive films 310d and 310e which function as a source and a drain. The oxide semiconductor film 308b is provided over the insulating film 306. An insulating film 312 and an insulating film 314 are provided as protective films on the layers 310d and 310e.

[0053] In addition, a light-transmitting conductive film 316b functioning as a pixel electrode is formed between the insulating film 312 and the insulating film 316b. The insulating film 314 is connected to the conductive film 310e through an opening provided therein.

[0054] In addition, a light-transmitting conductive film 308c functioning as one electrode and a dielectric film The insulating film 314 serving as the other electrode and the light-transmitting conductive film 316b serving as the other electrode form a capacitor. The element 105 is formed. The light-transmitting conductive film 308c is provided over the insulating film 306. .

[0055] In the driving circuit section, the conductive film 304a and the conductive film 304c are formed at the same time. 4b and the conductive film 31 The light-transmitting conductive film 310c is formed at the same time as the light-transmitting conductive film 316b. Connected via 6a.

[0056] As shown in FIG. 3B, the insulating film 306 and the insulating film 312 are provided on the conductive film 304b. The opening 372a formed in the insulating film 305 and the opening 374a formed in the insulating film 314 are The opening 374a is located inside the opening 372a. In this case, the conductive film 304b and the light-transmitting conductive film 316a are connected to each other.

[0057] In addition, the conductive film 310c is provided with an opening 372b in the insulating film 312 and a conductive film 372b in the insulating film 312. 14 and an opening 374b provided inside the opening 372b. In the opening 374b, the conductive film 310c and the light-transmitting conductive film 316a is connected.

[0058] As shown in FIG. 3C, an opening 3 provided in an insulating film 312 is formed on the conductive film 310e. The insulating film 314 has a through hole 72c and an opening 374c formed in the insulating film 314. The opening 374c is located inside the opening 372c. The conductive film 316b is connected to the corresponding conductive film 316b.

[0059] In addition, an opening 372 provided in the insulating film 312 is formed on the light-transmitting conductive film 308c. In the opening 372, the light-transmitting conductive film 308c is in contact with the insulating film 314. do.

[0060] The insulating film 305 and the insulating film 314 are made of a material that does not contain external impurities such as water and alkaline metals. It is preferable to use a material that prevents metals, alkaline earth metals, and the like from diffusing into the oxide semiconductor film. It is preferable that the insulating material contains hydrogen, and typically contains nitrogen. Representative examples of the insulating film 305 and the insulating film 314 include Silicon nitride, silicon oxynitride, aluminum nitride, aluminum oxynitride, etc. Form.

[0061] The insulating films 306 and 312 are formed by using a material having a function of improving interface characteristics with the oxide semiconductor film. It is preferable to use a material that can be used, and typically, an inorganic insulating material containing oxygen is used. It is preferable that the insulating film 306 and the insulating film 31 be made of, for example, an oxide insulating film. Representative examples of 2 include silicon oxide, silicon oxynitride, aluminum oxide, and oxynitride. It is formed using aluminum oxide or the like.

[0062] A connection portion between the conductive film 304b and the light-transmitting conductive film 316a, the conductive film 310c, and the light-transmitting conductive film 316b are The conductive film 310e and the light-transmitting conductive film 316b are connected to each other. The connection parts are covered with an insulating film 305 and / or an insulating film 314. The insulating film 314 and the insulating film 315 are resistant to impurities from the outside, such as water, alkali metals, alkaline earth metals, etc. The opening 372a is formed of a material that prevents a metal or the like from diffusing into the oxide semiconductor film. , 372b, 372c, and the side surfaces of 372 are covered with an insulating film 305 and / or an insulating film 314. Since the oxide semiconductor film is provided between the insulating film 305 and the insulating film 314, External impurities, such as water, alkali metals, alkaline earth metals, etc., may cause the conductive film 304b, From the connection portion of the conductive films 310c and 310e and the light-transmitting conductive films 316a and 316b Therefore, diffusion of the fluorine atom into the oxide semiconductor film included in the transistor can be prevented. It is possible to prevent fluctuations in the electrical characteristics of the transistor, thereby improving the reliability of the semiconductor device. It is possible.

[0063] The light-transmitting conductive film 308c is formed simultaneously with the oxide semiconductor films 308a and 308b. The oxide semiconductor films 308a and 308b are formed on the insulating film 306. The insulating film 312 and the like are formed of a material that can improve interface characteristics with the oxide semiconductor film. Since the oxide semiconductor films 308a and 308b are in contact with the film formed on the oxide semiconductor film 308, the oxide semiconductor films 308a and 308b function as semiconductors. In addition, the transistor including the oxide semiconductor films 308a and 308b has excellent electrical characteristics. do.

[0064] However, one aspect of the embodiment of the present invention is not limited to this. 8c may be the oxide semiconductor film 308a or In that case, the light-transmitting conductive film 308c may be formed in a separate process from the conductive film 308b. The oxide semiconductor film 308a and the oxide semiconductor film 308b may be made of a different material. For example, the light-transmitting conductive film 308c is made of indium tin oxide (hereinafter, referred to as ITO). , or indium zinc oxide, etc.

[0065] On the other hand, the light-transmitting conductive film 308c is in contact with the insulating film 314 in the opening 372. The insulating film 314 is resistant to external impurities such as water, alkali metals, alkaline earth metals, etc. The film is formed of a material that prevents diffusion of hydrogen into the oxide semiconductor film and further contains hydrogen. Therefore, hydrogen in the insulating film 314 was formed simultaneously with the oxide semiconductor films 308a and 308b. When hydrogen diffuses into the oxide semiconductor film, it bonds with oxygen in the oxide semiconductor film and becomes a carrier As a result, the oxide semiconductor film becomes highly conductive and functions as a conductor. In other words, it can be said to be an oxide semiconductor film with high conductivity. The oxide semiconductor films 308a and 308b are mainly made of the same material as the oxide semiconductor films 308a and 308b, and the hydrogen concentration is The metal oxide having a higher electrical conductivity due to the temperature being higher than 08b is then subjected to a light-transmitting conductive film 3 It's called 08c.

[0066] However, one aspect of the embodiment of the present invention is not limited to this. 8c may not be in contact with the insulating film 314 depending on the circumstances. It is Noh.

[0067] The semiconductor device described in this embodiment includes a capacitor and an oxide semiconductor film. In addition, a light-transmitting conductive film that functions as a pixel electrode is formed. The other electrode of the capacitor element is used. Since the step of forming a conductive film is not required, the manufacturing steps of the semiconductor device can be reduced. Since the pair of electrodes is formed of a conductive film having a light-transmitting property, the light-transmitting property is obtained. As a result, the area occupied by the capacitive element can be increased while increasing the aperture ratio of the pixel.

[0068] Here, the characteristics of a transistor using an oxide semiconductor will be described. The transistor used is an n-channel transistor. Oxygen vacancies can generate carriers, which can degrade the electrical characteristics and reliability of transistors. For example, the threshold voltage of a transistor may be shifted in the negative direction, causing a gate When the gate voltage is 0V, the drain current may flow. When the voltage is 0V, the drain current flows. This is called a normally-on characteristic. A transistor that has this characteristic is called a depletion type transistor. A transistor that can be considered to have no drain current when the voltage is 0V is called a normally This is called an "off" characteristic, and a transistor that has this characteristic is called an enhancement type transistor. It's called Sta.

[0069] In the oxide semiconductor film 308b in which a channel region of a transistor is formed, defects and substitutions In general, it is preferable to reduce oxygen vacancies as much as possible. The spin density (oxide) of g=1.93 by electron spin resonance with a voltage parallel to the surface The defect density in the semiconductor film is reduced to below the detection limit of the measuring instrument. It is preferable to reduce the number of defects, typically oxygen vacancies, contained in the oxide semiconductor film as much as possible. By reducing the current, it is possible to prevent the transistor 103 from becoming a normally-on transistor. This makes it possible to improve the electrical characteristics and reliability of the semiconductor device. Power consumption can be reduced.

[0070] The negative shift in the threshold voltage of a transistor is not only due to oxygen vacancies, but also due to oxide It can also be caused by hydrogen contained in semiconductors (including hydrogen compounds such as water). Hydrogen contained in oxide semiconductors reacts with oxygen that is bonded to metal atoms to form water. The lattice from which oxygen has been removed (or the part from which oxygen has been removed) is left with a defect (which can also be called an oxygen defect). In addition, some of the hydrogen reacts with oxygen to generate electrons, which act as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen is a normally-on transistor. It tends to become a characteristic.

[0071] In the oxide semiconductor film 308b in which the channel region of the transistor 103 is formed, In the oxide semiconductor film 3, hydrogen is preferably reduced as much as possible. In 08b, the hydrogen concentration obtained by secondary ion mass spectrometry was 5×10 19 ato ms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than 1x1 0 18 atoms / cm 3 Less than or equal to 5×10 17 atoms / cm 3 below, More preferably, 1×1016 atoms / cm 3 The following applies.

[0072] The oxide semiconductor film 308b in which the channel region of the transistor 103 is formed is The concentration of alkali metals or alkaline earth metals obtained by secondary ion mass spectrometry was calculated by multiplying the concentration by 1× 10 18 atoms / cm 3 Less than or equal to 2×10 16 atoms / cm 3 Below Alkali metals and alkaline earth metals generate carriers when bonded to oxide semiconductors. This may cause the off-state current of the transistor 103 to be increased.

[0073] In this way, impurities (hydrogen, nitrogen, alkali metals or alkaline earth metals, etc.) can be removed. The oxide semiconductor film in which the channel region of the transistor 103 is formed is highly pure. By using a highly-degraded oxide semiconductor film, the transistor becomes an enhancement type. 3 can be prevented from becoming a normally-on transistor, and the off-state current of the transistor 103 can be extremely reduced. Therefore, a semiconductor device having good electrical characteristics can be manufactured. In this way, a semiconductor device with improved reliability can be manufactured.

[0074] The reason why the off-state current of a transistor using a highly purified oxide semiconductor film is low is that This can be proved by various experiments. For example, when the channel width is 1×10 6 Channel length L in μm Even if the element has a thickness of 10 μm, the voltage between the source and drain electrodes (drain voltage) is 1 In the range from V to 10 V, the off-state current is below the measurement limit of the semiconductor parameter analyzer. , i.e. 1 × 10 -13In this case, the off-current can be reduced to less than 1 A. The value divided by the channel width of the transistor is found to be less than 100 zA / μm. In addition, the capacitance element and the transistor are connected to each other, and the capacitance element is connected to the transistor. The off-state current is measured using a circuit that controls charge using the transistor. A highly purified oxide semiconductor film is used for a channel formation region of the transistor, and a capacitance element is formed. The off-state current of the transistor is measured based on the change in the amount of charge per unit time. As a result, when the voltage between the source and drain electrodes of the transistor is 3V, the current is several tens of yA / μm Therefore, a further low off-state current can be obtained by using a highly purified oxide semiconductor film. The transistor has an extremely low off-state current.

[0075] Here, other components of the liquid crystal display device shown in FIG. 3 will be described below.

[0076] Conductive films 304a, 304b, and 304c are formed on the substrate 302. 04a is formed in the scanning line driving circuit 104 and serves as the gate of a transistor in the driving circuit section. The conductive film 304c is formed in the pixel portion 100 and functions as a transistor in the pixel portion. The conductive film 304b functions as a gate of the scan line driver circuit 104. This connects to the conductive film 310c.

[0077] The substrate 302 may be made of aluminosilicate glass, aluminoborosilicate glass, barium oxide glass, or the like. A glass material such as borosilicate glass is used. For mass production, the substrate 302 is made of 8th generation glass. 2nd generation (2160mm x 2460mm), 9th generation (2400mm x 2800mm, or 450mm x 3050mm), 10th generation (2950mm x 3400mm) etc. Mother glass is preferably used. High processing temperatures and long processing times can cause significant damage to the mother glass. Therefore, when using mother glass for mass production, heat treatment in the manufacturing process is not preferred. Preferably, the temperature is 600°C or lower, more preferably, 450°C or lower, and even more preferably, 350°C or lower. It is desirable to do so.

[0078] The conductive films 304a, 304b, and 304c may be made of aluminum, chromium, copper, or tantalum. , titanium, molybdenum, tungsten, or the above-mentioned metal elements The alloy may be formed using an alloy containing the above-mentioned metal elements or a combination of the above-mentioned metal elements. The conductive films 304a, 304b, and 304c may have a single-layer structure or a laminated structure of two or more layers. For example, a two-layer structure in which a titanium film is laminated on an aluminum film, a titanium nitride film Two-layer structure with a titanium film laminated on top, and two-layer structure with a tungsten film laminated on a titanium nitride film , a two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film, A titanium film is laminated on the titanium film, an aluminum film is laminated on the aluminum film, and a titanium film is formed on the aluminum film. There are also three-layer structures, such as aluminum, titanium, tantalum, tungsten, and molybdenum. One or more combinations of elements selected from the group consisting of drenogen, chromium, neodymium, and scandium. An alloy film or a nitride film may also be used.

[0079] An insulating film 305, an insulating film 306, and an insulating film 307 are formed on the substrate 302 and the conductive films 304a, 304c, and 304b. The insulating film 305 and the insulating film 306 are formed on the transistor of the scanning line driving circuit 104. Functions as a gate insulating film of a transistor in the pixel section 100 has.

[0080] The insulating film 305 is preferably formed using a nitride insulating film. For example, Silicon film, silicon oxynitride film, aluminum nitride film, aluminum oxide nitride film, etc. In addition, when the insulating film 305 has a layered structure, the first The silicon nitride film is a silicon nitride film having few defects, and a second silicon nitride film is formed on the first silicon nitride film. It is preferable to provide a silicon nitride film that releases less hydrogen as the second silicon nitride film. As a result, hydrogen and nitrogen contained in the insulating film 305 are oxidized to the oxide semiconductor films 308a and 30 It is possible to suppress migration or diffusion to 8b.

[0081] Silicon oxynitride is an insulating material that contains more oxygen than nitrogen. Silicon nitride oxide is an insulating material in which the nitrogen content is greater than the oxygen content. This refers to...

[0082] The insulating film 306 is preferably formed using an oxide insulating film. For example, Silicon film, silicon oxynitride film, aluminum oxide film, aluminum oxynitride film, etc. It is sufficient to provide the insulating film 100 in the form of a laminate or a single layer.

[0083] The insulating film 306 is made of hafnium silicate (HfSiO x ), nitrogen-containing halide HfSi x O y N z ), hafnium aluminate with nitrogen (H fAl x O y N z ), hafnium oxide, yttrium oxide, and other high-k materials are used. This can reduce the gate leakage of the transistor 103.

[0084] Silicon nitride film has a higher dielectric constant than silicon oxide film, and can obtain the same capacitance. Since the thickness required for this is large, the gate insulating film can be physically thickened. , suppressing the decrease in the dielectric strength voltage of the transistor and even improving the dielectric strength voltage, This can suppress electrostatic damage.

[0085] Over the insulating film 306, oxide semiconductor films 308a and 308b and a light-transmitting conductive film The oxide semiconductor film 308a is formed so as to overlap with the conductive film 304a. The oxide layer is formed in the position and functions as a channel region of the transistor in the driving circuit section. The semiconductor film 308b is formed in a position overlapping with the conductive film 304c. The light-transmitting conductive film 308c functions as a channel region of the capacitor 105. It functions as one electrode.

[0086] The oxide semiconductor films 308a and 308b are oxide semiconductor films containing In or Ga. Representative examples include In-Ga oxide, In-Zn oxide, and In-M-Zn oxide (M is Al). , Ti, Ga, Y, Zr, La, Ce, Nd, or Hf).

[0087] When the oxide semiconductor films 308a and 308b are made of an In-M-Zn oxide, In and When the sum of In and M is 100 atomic %, the ratio of In and M atoms is preferably I n is less than 50 atomic %, M is 50 atomic % or more, and more preferably In is 25 atomic% or less, and M is 75 atomic% or more.

[0088] The contents of indium, gallium, and the like in the oxide semiconductor films 308a and 308b are determined based on the time of flight The results can be compared using time-of-flight secondary ion mass spectrometry (TOF-SIMS) and X-ray photoelectron spectroscopy (XPS). do.

[0089] The oxide semiconductor films 308a and 308b have an energy gap of 2 eV or more. Since the potential is 2.5 eV or more, and more preferably 3 eV or more, the potential of the transistor to be formed later is increased. The off current can be reduced.

[0090] The light-transmitting conductive film 308c is made of In, like the oxide semiconductor films 308a and 308b. or an oxide semiconductor film containing Ga and containing impurities. The impurities include hydrogen. Instead of hydrogen, boron, phosphorus, and sulfur can also be used as impurities. It may contain zinc, antimony, rare gas elements, alkali metals, alkaline earth metals, etc. .

[0091] The oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c are all gate electrodes. The oxide semiconductor film is formed on the insulating film and contains In or Ga. The impurity concentration is Specifically, the oxide semiconductor film 308a and the oxide semiconductor film 308b are different from the light-transmitting conductive film 308a and the oxide semiconductor film 308b. For example, the oxide semiconductor films 308a and 308b have a high impurity concentration. The hydrogen concentration is 5×10 19 atoms / cm 3 Less than 5 x 10 18 atom s / cm 3 less than 1×10 18 atoms / cm 3 More preferably, 5×10 17 atoms / cm 3 Less than 1×10, more preferably16 atoms / cm 3 The hydrogen concentration in the light-transmitting conductive film 308c is 8×10 19 at oms / cm 3 More than 1×10 20 atoms / cm 3 More preferably, 5×10 20 atoms / cm 3 The above is the case. The hydrogen concentration in the light-transmitting conductive film 308c is twice as high as that in the light-transmitting conductive film 308b, preferably 10 More than double.

[0092] In addition, the light-transmitting conductive film 308c has a lower resistance than the oxide semiconductor films 308a and 308b. The resistivity of the light-transmitting conductive film 308c is low compared to that of the oxide semiconductor films 308a and 308b. b resistivity 1×10 -8 1×10 times more -1 It is preferable that the ratio is less than 1 / 2. 1×10 -3 Ωcm or more 1×10 4 Ωcm, and more preferably a resistivity of 1×10 - 3 Ωcm or more 1×10 -1 It is preferable that the resistivity is less than Ωcm.

[0093] The oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c are, for example, The non-single crystal structure may be, for example, a CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor ), polycrystalline structure, microcrystalline structure (described later), or amorphous structure. , the amorphous structure has the highest density of defect states, and the CAAC-OS has the lowest density of defect states.

[0094] The oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c are, for example, The oxide semiconductor film may have an amorphous structure. For example, the atomic arrangement of the oxide semiconductor film is disordered. The oxide semiconductor film does not have a crystalline component. Alternatively, the amorphous oxide semiconductor film has a completely amorphous structure, for example. It has a structure and does not have any crystalline parts.

[0095] Note that the oxide semiconductor films 308a and 308b and the light-transmitting conductive film 308c are C The mixed film had two or more structural regions, namely, AAC-OS, microcrystalline structure, and amorphous structure. The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, and a CAAC-O The mixed film has, for example, an amorphous structure region and a microcrystalline structure region. The CAAC-OS region may have a laminated structure.

[0096] Note that the oxide semiconductor film may be, for example, single crystal.

[0097] The insulating film 306, the oxide semiconductor films 308a and 308b, and the light-transmitting conductive film 308 On the other hand, conductive films (hereinafter referred to as conductive films 310a, 310b, 310c, 310d, and 310e) are formed on the conductive films 310a, 310b, 310c, 310d, and 310e. The conductive film 310a is electrically connected to the oxide semiconductor film 308a. The transistor in the driver circuit portion is connected to the drain of the transistor. The conductive film 310b is electrically connected to the oxide semiconductor film 308a and is a driving circuit. The transistor in the conductive portion has a function as the other of the source and drain. The conductive film 310c is transparent through the openings provided in the insulating film 312 and the insulating film 314. The conductive film 310d is electrically connected to the conductive film 316a that is connected to the oxide semiconductor The film 308b is electrically connected to the source and drain of the transistor in the pixel portion. The conductive film 310e functions as a light-transmitting The source and It also functions as the other drain.

[0098] The conductive films 310a, 310b, 310c, 310d, and 310e are made of a conductive material. , aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum A metal consisting of tantalum, silver, tantalum, or tungsten, or a metal that has this as its main component. The alloy is used as a single layer or a multilayer structure. For example, a titanium film is stacked on an aluminum film. Two-layer structure with a titanium film on a tungsten film, two-layer structure with a copper-magnesium- A two-layer structure in which a copper film is laminated on an aluminum alloy film, a titanium film or a titanium nitride film, and An aluminum film or a copper film is laminated on the titanium film or the titanium nitride film, and then the aluminum film or the copper film is laminated on the titanium film or the titanium nitride film. A three-layer structure in which a titanium film or titanium nitride film is formed on top, a molybdenum film or molybdenum nitride film A molybdenum film and an aluminum film or a copper film are laminated on the molybdenum film or the molybdenum nitride film. A three-layer structure is formed by laminating a layer of a molybdenum film or a molybdenum nitride film on top of the layer of a silicon nitride film. A transparent conductive material containing indium oxide, tin oxide, or zinc oxide may also be used. .

[0099] An insulating film 306, oxide semiconductor films 308a and 308b, a light-transmitting conductive film 308c, An insulating film 312 is formed on the conductive films 310a, 310b, 310c, 310d, and 310e. An insulating film 314 is formed. The insulating film 312 is made of an oxide semiconductor, similar to the insulating film 306. It is preferable to use a material capable of improving the interface characteristics with the film. As with the insulating film 305, impurities from the outside, such as water, alkali metals, alkaline earth metals, etc. It is preferable to use a material that prevents a metal or the like from diffusing into the oxide semiconductor film.

[0100] The insulating film 312 is an oxide insulating film containing more oxygen than the oxygen required for the stoichiometric composition. In this way, oxygen can be prevented from being released from the oxide semiconductor film. At the same time, excess oxygen contained in the oxide insulating film is transferred to the oxide semiconductor film. For example, it is possible to measure the amount of oxygen vacancies by thermal desorption spectroscopy. The amount of oxygen molecules released is estimated to be 1.0×10 18 molecule / cm 3 Using an oxide insulating film with By this, the amount of oxygen vacancies in the oxide semiconductor films 308a and 308b can be reduced. Cut.

[0101] The insulating film 312 has a stacked structure. The first oxide insulating film is an oxide semiconductor film having a low interface state with the oxide semiconductor films 308a and 308b. A second oxide insulating film having the above stoichiometric composition is formed on the first oxide insulating film. An oxide insulating film containing as much oxygen as possible may be provided.

[0102] For example, the first oxide insulating film has a g value of 2.001 (E´ -center) spin density is 3.0×10 17 spins / cm 3 Hereinafter, preferably 5.0×10 16 spins / cm 3 The following oxide insulating film can be used to form an oxide semiconductor film. It is possible to reduce the interface states with 308a and 308b. The spin density at g value = 2.001 determined by the measurement is the dangling valence corresponds to the abundance of

[0103] In addition, conductive films 316a and 316b having light-transmitting properties are formed over the insulating film 314. The light-transmitting conductive film 316a is electrically connected to the conductive film 304b in the opening 374a. The conductive film 310c is electrically connected to the conductive film 310c through the opening 374b. The conductive film 304b functions as a connection electrode that connects the conductive film 310c to the conductive film 304b. The conductive film 316b is electrically connected to the conductive film 310e in the opening 374c, and the pixel voltage of the pixel The light-transmitting conductive film 316b functions as a pair of electrodes of the capacitor. It can function as one of the poles.

[0104] The light-transmitting conductive films 316a and 316b are made of indium oxide containing tungsten oxide. Indium Zinc Oxide with Tungsten Oxide, Indium Zinc Oxide with Titanium Oxide Oxide, indium tin oxide with titanium oxide, ITO, indium zinc oxide, oxide ketone A light-transmitting conductive material such as indium-tin oxide doped with indium can be used. do.

[0105] In addition, a film having color (hereinafter, referred to as a color film 346) is formed in contact with the substrate 342. The color film 346 functions as a color filter. The light-shielding film 344 adjacent to the pixel 6 is formed in contact with the substrate 342. It functions as a matrix. Also, the colored film 346 does not necessarily have to be provided. For example, In some cases, such as when the liquid crystal display device is black and white, the color film 346 may not be provided.

[0106] The colored film 346 may be any colored film that transmits light in a specific wavelength range. For example, A red (R) color filter that transmits light in the red wavelength range, and a green (G) color filter that transmits light in the green wavelength range. A green (G) color filter transmits light in the blue wavelength range, and a blue (B) color filter transmits light in the blue wavelength range. A filter or the like can be used.

[0107] The light-shielding film 344 may be made of a metal or other material as long as it has a function of blocking light in a specific wavelength range. Alternatively, an organic insulating film containing a black pigment or the like can be used.

[0108] An insulating film 348 is formed in contact with the colored film 346. The insulating film 348 has a flat The function of the colored film 346 is to prevent impurities contained therein from diffusing to the liquid crystal element side. It has an inhibitory function.

[0109] In addition, a conductive film 350 is formed in contact with the insulating film 348. The electrode functions as the other of the pair of electrodes of the liquid crystal element in the portion. An insulating film having a function as an alignment film is provided on the conductive films 316a and 316b and the conductive film 350. may be formed separately.

[0110] In addition, the liquid crystal layer 3 is provided between the conductive films 316a and 316b having light transmitting properties and the conductive film 350. The liquid crystal layer 320 is formed on the substrate 3 using a sealing material (not shown). The sealing material is used to prevent moisture from entering the device. In order to suppress oxidation, it is preferable to have a structure in which the inorganic material is in contact with the inorganic material.

[0111] In addition, a liquid crystal layer 320 is provided between the conductive films 316a and 316b having light-transmitting properties and the conductive film 350. A spacer may be provided to maintain the thickness (also called the cell gap) of the pixel.

[0112] <Method for manufacturing semiconductor device> A method for manufacturing an element portion provided on a substrate 302 shown in the semiconductor device shown in FIG. 4 to 7 will be used to explain this.

[0113] First, prepare a substrate 302. Here, a glass substrate is used as the substrate 302.

[0114] Next, a conductive film is formed on the substrate 302, and the conductive film is processed into a desired region. The conductive films 304a, 304b, and 304c are formed. The formation of c is performed by forming a mask by a first patterning in a desired region, and then covering the mask. It can be formed by etching the unbroken areas.

[0115] The conductive films 304a, 304b, and 304c are typically formed by deposition or CVD. The insulating film can be formed by a method such as sputtering or spin coating.

[0116] Here, a tungsten film with a thickness of 100 nm is deposited by sputtering as the conductive film. Next, a mask is formed by a photolithography process, and the mask is used to form a substrate. The tungsten film is dry etched to form conductive films 304a, 304b, and 304c. .

[0117] Next, an insulating film 305 is formed on the substrate 302 and the conductive films 304a, 304b, and 304c. Then, an insulating film 306 is formed over the insulating film 305 (see FIG. 4A).

[0118] The insulating film 305 and the insulating film 306 are formed by a sputtering method, a CVD method, or the like. When the insulating film 305 and the insulating film 306 are successively formed in a vacuum, impurities are easily removed. This is preferable because it suppresses the inclusion of

[0119] Here, a silicon nitride film having a thickness of 400 nm is formed as the insulating film 305 by plasma CVD. As the insulating film 306, a silicon oxynitride film having a thickness of 50 nm is formed. It is formed by the Zuma CVD method.

[0120] Next, an oxide semiconductor film 307 is formed over the insulating film 306 (see FIG. 4B).

[0121] The oxide semiconductor film 307 can be formed by a sputtering method, a coating method, a pulsed laser deposition method, a laser deposition method, or the like. The thin film can be formed by using a method such as ablation.

[0122] When the oxide semiconductor film 307 is formed by a sputtering method, plasma is generated. The power supply may be an RF power supply, an AC power supply, a DC power supply, or the like. .

[0123] The sputtering gas is a rare gas (typically argon), oxygen, or a mixture of a rare gas and oxygen. In the case of a mixture of rare gas and oxygen, the amount of oxygen gas is appropriately adjusted relative to the amount of rare gas. A higher ratio is preferred.

[0124] The target may be appropriately selected depending on the composition of the oxide semiconductor film 307 to be formed. Good.

[0125] Note that when the oxide semiconductor film 307 is formed by a sputtering method, for example, The substrate temperature is set to room temperature (for example, 20° C.) or higher and lower than 100° C., and preferably set to 100° C. or higher. The temperature is set to 450°C or less, and more preferably 170°C to 350°C, and the oxidation is performed while heating. A compound semiconductor film 307 may be formed.

[0126] Note that in order to reduce the hydrogen concentration in the oxide semiconductor film 307, When forming an oxide semiconductor film, each chamber in the sputtering device is filled with an oxide semiconductor. A cryopump that can remove as many impurities as possible, such as water and hydrogen, which are impurities for the membrane. A high vacuum pump (1×10 -4 Pa~5×10 - 7 It is preferable to use a turbo molecular pump and a cold trap. In combination, this prevents gases, especially those containing carbon or hydrogen, from flowing back into the chamber from the exhaust system. It is preferable to keep this in mind.

[0127] In order to reduce the hydrogen concentration in the oxide semiconductor film 307, the inside of the chamber was evacuated to a high vacuum. In addition, it is necessary to increase the purity of the sputtering gas. The dew point of the gas or argon is -40°C or less, preferably -80°C or less, and more preferably - By using gas that has been highly purified to 100℃ or less, more preferably -120℃ or less, This makes it possible to prevent moisture and the like from being taken into the compound semiconductor film as much as possible.

[0128] Here, the oxide semiconductor film 307 is a 35 nm-thick In-Ga-Zn oxide film (I A metal oxide target of n:Ga:Zn=1:1:1 was used.) was deposited by sputtering. It is formed.

[0129] Next, the oxide semiconductor film 307 is processed into a desired region to form an island-shaped oxide semiconductor film 3 For this reason, the oxide semiconductor films 308a, 308b, and 308d are formed. The oxide semiconductor films 308a, 308b, and 308d are formed of the same metal element. The formation of 08d involves forming a mask by second patterning in a desired area, and then forming the mask The etching can be performed by etching the area not covered by the The etching process can be dry, wet, or a combination of both. (See FIG. 4(C)).

[0130] Next, a first heat treatment is preferably performed. The first heat treatment is performed at a temperature of 250° C. or higher and 650° C. or higher. ℃ or less, preferably 300 ℃ to 500 ℃, in an inert gas atmosphere, an oxidizing gas atmosphere The first heat treatment may be performed in an atmosphere containing 10 ppm or more of fluorine or under reduced pressure. The atmosphere is an inert gas atmosphere, and then an oxidizing gas is introduced to replenish the oxygen that has been removed. The first heat treatment may be performed in an atmosphere containing 10 ppm or more of oxide semiconductor film 3. The crystallinity of the oxide semiconductors used for the insulating films 308a, 308b, and 308d is improved, and the insulating film 306 and removing impurities such as hydrogen and water from the oxide semiconductor films 308a, 308b, and 308d. Note that a first heating step may be performed before etching the oxide semiconductor. stomach.

[0131] Here, the specimen is heat-treated in a nitrogen atmosphere at 350°C for 1 hour, and then annealed in an oxygen atmosphere at 350°C. Heat treat.

[0132] Next, a conductive film 3 is formed over the insulating film 306 and the oxide semiconductor films 308a, 308b, and 308d. 09 (see Figure 5(A)).

[0133] The conductive film 309 can be formed by, for example, a sputtering method.

[0134] Here, a titanium film having a thickness of 50 nm, an aluminum film having a thickness of 400 nm, and a Then, a 100 nm thick titanium film is laminated on the SiO2 film by sputtering.

[0135] Next, the conductive film 309 is processed into a desired region to form conductive films 310a, 310b, and 311. In addition, the conductive films 310a, 310b, 310c, 310d, and 310e are formed. The formation of 10d and 310e involves forming a mask by third patterning in a desired area. The regions not covered by the mask can be etched to form the etched region (FIG. 5). (See (B)).

[0136] Next, the insulating film 306, the oxide semiconductor films 308a, 308b, and 308d, and the conductive film 31 An insulating film 311 is formed so as to cover the layers 310a, 310b, 310c, 310d, and 310e. (See FIG. 5(C)).

[0137] The insulating film 311 is made of a material having good interface characteristics with the oxide semiconductor films 308a, 308b, and 308d. It is preferable to use a material capable of improving the insulating property, typically an inorganic insulating material containing oxygen. It is preferable to use a material such as an oxide insulating film. The film 11 can be formed by using, for example, a CVD method, a sputtering method, or the like.

[0138] The insulating film 311 is made of an oxide film containing more oxygen than the oxygen that satisfies the stoichiometric composition. When the insulating film 311 is formed, the insulating film 311 can be formed under the following conditions. In the case where a silicon oxide film or a silicon oxynitride film is formed as the insulating film 311, The deposition conditions are as follows: The substrate is kept at a temperature of 180° C. or higher and 260° C. or lower, more preferably 180° C. or higher and 230° C. or lower. The pressure in the deposition chamber is kept at 100 Pa or more and 250 Pa or less by introducing the source gas into the deposition chamber. The pressure is preferably 100 Pa or more and 200 Pa or less, and the electrodes provided in the film formation chamber are 0.17W / cm 2 More than 0.5W / cm 2 Less than or equal to 0.25 W / cm 2 Below Upper 0.35W / cm 2 The object is to supply high frequency power as follows:

[0139] The source gas for the insulating film 311 is a deposition gas containing silicon, typically silane, diphenyl ether, etc. Examples of oxidizing gases include oxygen, ozone, and fluorinated silane. These include nitrous oxide and nitrogen dioxide.

[0140] The conditions for forming the insulating film 311 are as follows: high frequency power density in a film forming chamber with the above pressure. By supplying power, the efficiency of decomposition of the source gas in the plasma increases, and the number of oxygen radicals increases. As the oxidation of the source gas progresses, the oxygen content in the insulating film 311 becomes lower than the stoichiometric composition. However, when the substrate temperature is set to the above temperature, the bonding strength between silicon and oxygen becomes As a result, the oxygen in the stoichiometric composition is less than that of the oxygen in the stoichiometric composition. It is possible to form an oxide insulating film that contains more oxygen than the silicon oxide film and from which some of the oxygen is released by heating. Cut.

[0141] The insulating film 311 has a stacked structure, and the first oxide insulating film is made of at least an oxide semiconductor. An oxide insulating film is formed on the insulating film 308a and 308b so that the interface state between the insulating film 308a and 308b is low. A second oxide film is formed on the insulating film 308a and 308b. As the insulating film, an oxide insulating film containing more oxygen than the oxygen satisfying the above stoichiometric composition is provided. This is also fine.

[0142] The oxide insulating film having a low interface state with at least the oxide semiconductor films 308a and 308b is The oxide insulating film can be formed under the following conditions. The following describes the formation of a silicon oxide film or a silicon oxynitride film. The substrate placed in the vacuum-evacuated deposition chamber of the Zuma CVD device is heated to 180°C or higher and 400°C or lower. and more preferably, the temperature is kept at 200° C. or higher and 370° C. or lower. Deposition gas containing fluorine and oxidizing gas are introduced to keep the pressure in the deposition chamber at 20 Pa or more to 250 Pa or more. a or less, more preferably 40 Pa or more and 200 Pa or less, and an electrode provided in the film formation chamber This is the condition for supplying high frequency power to the

[0143] The source gas for the first oxide insulating film contains more oxygen than the oxygen required for the stoichiometric composition. The source gas can be applicable to the oxide insulating film. In the step of forming the oxide insulating film, at least the oxide semiconductor films 308a and 308b are protected. As a result, the second oxide insulating film is formed using high-frequency power with high power density. In addition, damage to the oxide semiconductor films 308a and 308b can be suppressed.

[0144] Here, the insulating film 311 has a stacked structure of a first oxide insulating film and a second oxide insulating film. The oxide insulating film of No. 1 was prepared by using silane at a flow rate of 30 sccm and dioxygen at a flow rate of 4000 sccm. Nitrogen was used as the source gas, the pressure in the deposition chamber was 200 Pa, and the substrate temperature was 220°C. Plasma C was generated by supplying 150W of RF power to parallel plate electrodes using a MHz RF power source. A silicon oxynitride film with a thickness of 50 nm is formed by the VD method. The raw material gases were silane at a flow rate of 200 sccm and dinitrogen monoxide at a flow rate of 4000 sccm. The pressure in the deposition chamber was 200 Pa, the substrate temperature was 220° C., and a high-frequency power source of 27.12 MHz was used. A thick film was formed by plasma CVD using a parallel plate electrode and 1500W of high frequency power. The silicon oxynitride film is formed to a thickness of 400 nm. 6000cm 2 This is a parallel plate type plasma CVD device, and the power supplied is This corresponds to a power density of 0.25 W / cm 2 It is.

[0145] Next, the insulating film 311 is processed into a desired region to form an insulating film 312 and an opening 372. , 372b, and 372c are formed. Furthermore, the insulating film 306, which is a part of the gate insulating film, is formed. The insulating film 306 and the insulating film 307 are processed into a desired region to form an opening 372a. 12, and the formation of openings 372, 372a, 372b, 372c allows the fourth A mask is formed by patterning, and the area not covered by the mask is etched. By this, it can be formed (see FIG. 6(A)).

[0146] Note that the opening 372 is formed so that the surface of the oxide semiconductor film 308d is exposed. The opening 372a is formed so that the surface of the insulating film 305 is exposed. The opening 372c is formed so that the surface of the conductive film 310c is exposed. The openings 372, 372a, 372b, and 372e are formed so that the surface of the insulating film 310e is exposed. The method for forming the insulating layer c may be, for example, a dry etching method. The method for forming the opening 372 is not limited to this, and may be a wet etching method or a drum etching method. Alternatively, a combination of dry etching and wet etching may be used. When forming the openings 372, 372a, 372b, and 372c using dry etching, The oxide semiconductor film 308d is exposed to plasma and is damaged. As a result, defects, typically oxygen vacancies, are generated in the oxide semiconductor film 308d. A conductive film 308c having low light transmitting properties is formed.

[0147] In addition, by forming at least the opening 372a in the etching process, During the etching process using the mask formed by the patterning of step 5, the amount of etching is reduced. It is possible to reduce

[0148] Next, the insulating film 305, the conductive films 310c and 310e, the insulating film 312, and the oxide semiconductor film An insulating film 313 is formed on 308d (see FIG. 6B).

[0149] The insulating film 313 is formed by removing impurities from the outside, such as water, alkali metals, and alkaline earth metals. It is preferable to use a material that prevents a metal or the like from diffusing into the oxide semiconductor film. It is preferable to use an inorganic insulating material containing nitrogen, for example, a nitride insulating film. The insulating film 313 can be formed by using, for example, a CVD method. .

[0150] The insulating film 313 contains hydrogen, and the hydrogen in the insulating film 313 diffuses into the oxide semiconductor film 308d. In the oxide semiconductor film 308d, hydrogen is bonded to oxygen, and electrons serving as carriers are generated. As a result, the conductivity of the oxide semiconductor film 308d becomes high and the light-transmitting conductive film is formed. This results in film 308c.

[0151] In addition, when a silicon nitride film is formed as the insulating film 313, the silicon nitride film is a block. In order to improve the thermal stability, it is preferable to form the film at a high temperature. For example, the substrate temperature is set to 100° C. or higher. The film is formed by heating the plate at a temperature below the strain point of the plate, preferably at a temperature between 300°C and 400°C. In addition, when the oxide semiconductor films 308a and 308b are formed at a high temperature, In some cases, oxygen is released from the oxide semiconductor, causing an increase in the carrier concentration. Therefore, the temperature should be set at a level at which such a phenomenon does not occur.

[0152] Here, the insulating film 313 is made of silane at a flow rate of 50 sccm and SiO2 at a flow rate of 5000 sccm. The source gases were nitrogen at a flow rate of 100 sccm and ammonia at a flow rate of 100 sccm. The pressure in the deposition chamber was set at 200 P. a) The substrate temperature was set to 220°C, and a 27.12MHz high-frequency power source was used to generate 1000W (power The density is 1.6×10 -1 W / cm 2 ) high frequency power was supplied to parallel plate electrodes. A silicon nitride film with a thickness of 50 nm is formed by the Zuma CVD method.

[0153] Next, the insulating film 313 is processed into a desired region to form an insulating film 314 and an opening 374. The insulating film 314 and the openings 374a, 374b, and 374c are formed. b, 374c form a mask by fifth patterning in a desired area, and the mask This can be achieved by etching the areas not covered by the metal (see FIG. 6(C)). .

[0154] The opening 374a is formed so that the surface of the conductive film 304b is exposed. The opening 374b is formed so that the surface of the conductive film 310c is exposed. 3c is formed so that the surface of the conductive film 310e is exposed.

[0155] The openings 374a, 374b, and 374c can be formed, for example, by dry etching. However, the method for forming the openings 374a, 374b, and 374c may be The etching method is not limited to this, and may be a wet etching method or a dry etching method. A formation method in which wet etching is combined may also be used.

[0156] In the case of a process in which the opening 372a is not formed in FIG. 6(A), the edge shown in FIG. In the coating process, the insulating film 305, the insulating film 306, the insulating film 312, and the insulating film 314 are This requires etching, which increases the amount of etching. Due to process variations, openings 374a are formed in some regions. This results in poor contact between the conductive film 304b and the light-transmitting conductive film 316a that is to be formed later. However, in this embodiment, the two etching steps In order to form the openings 372a and 374a, an edge is formed in the process of forming the openings. As a result, it is possible to improve the yield of semiconductor devices. Although the opening 374a has been described here, the opening 374b and the opening 374c may be used. The same effect is achieved in 74c.

[0157] Next, a conductive film 31 is formed on the insulating film 314 so as to cover the openings 374a, 374b, and 374c. 5 (see FIG. 7(A)).

[0158] The conductive film 315 can be formed by, for example, a sputtering method.

[0159] Here, the conductive film 315 is a silicon oxide film having a thickness of 100 nm formed by a sputtering method. A film of indium tin oxide containing potassium is formed.

[0160] Next, the conductive film 315 is processed into a desired region to form a light-transmitting conductive film 316a, The light-transmitting conductive films 316a and 316b are formed. A mask is formed on the region by a sixth patterning, and the region not covered by the mask is It can be formed by etching (see FIG. 7(B)).

[0161] Through the above steps, a pixel portion having a transistor and a driver circuit portion are formed on the substrate 302. In the manufacturing process shown in this embodiment, the first to sixth patterned This means that transistors and capacitors can be formed simultaneously using six masks. do.

[0162] Note that in this embodiment, hydrogen contained in the insulating film 314 is diffused into the oxide semiconductor film 308d. The oxide semiconductor film 308d was dispersed to increase the conductivity. The oxide semiconductor film 308d is covered with a mask, and impurities, typically hydrogen, boron, or lithium, are introduced into the oxide semiconductor film 308d. Addition of tin, antimony, rare gas elements, alkali metals, alkaline earth metals, etc. The oxide semiconductor film 308d may be doped with hydrogen or boron to increase the conductivity. The method of adding elements such as phosphorus, tin, antimony, and rare gas elements is ion doping. On the other hand, when an alkali metal or an alkaline earth metal is added to the oxide semiconductor film 308d, As a method for adding a metal or the like, a method of exposing a solution containing the impurity to the oxide semiconductor film 308d is used. There is a law.

[0163] Next, the structure formed on the substrate 342 provided opposite the substrate 302 will be described below. Provide an explanation.

[0164] First, a substrate 342 is prepared. The substrate 342 is made of the same material as that of the substrate 302. Next, a light-shielding film 344 and a colored film 346 are formed on the substrate 342 (FIG. 8(A) )reference).

[0165] The light-shielding film 344 and the colored film 346 are formed of various materials by a printing method, an ink-jet method, They are formed at desired positions by an etching method using photolithography technology.

[0166] Next, an insulating film 348 is formed on the light-shielding film 344 and the colored film 346 (see FIG. 8(B)). (see).

[0167] The insulating film 348 may be, for example, an organic insulating film made of acrylic resin or the like. By forming the insulating film 348, for example, impurities contained in the color film 346 can be removed. It is possible to suppress the diffusion of the liquid crystal layer 320 side. It is not necessary to provide the insulating film 348, and a structure in which the insulating film 348 is not formed may be used.

[0168] Next, a conductive film 350 is formed over the insulating film 348 (see FIG. 8C). For this purpose, the materials shown for the conductive film 315 can be used.

[0169] Through the above steps, the structure formed on the substrate 342 can be formed.

[0170] Next, the insulating film 31 formed on the substrate 302 and the substrate 342, more specifically, on the substrate 302, 4. The conductive films 316a and 316b having light transmitting properties and the conductive film 35 formed on the substrate 342 0, an alignment film 318 and an alignment film 352 are formed. The film can be formed by using a rubbing method, a photo-alignment method, or the like. A liquid crystal layer 320 is formed between the substrate 342 and the liquid crystal layer 320. or by bonding the substrate 302 and the substrate 342 together and then using the capillary phenomenon. An injection method for injecting liquid crystal can be used.

[0171] Through the above steps, the liquid crystal display device shown in FIG. 3 can be manufactured.

[0172] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do.

[0173] <Variation 1> Here, a modification of the pixel 301a of the semiconductor device shown in the first embodiment will be described with reference to FIGS. This will be explained using FIG.

[0174] In FIG. 9, the conductive film 304c functioning as the scanning line is oriented in a direction substantially perpendicular to the signal line ( The conductive film 310d, which functions as a signal line, is provided so as to extend in the center (left and right direction). The capacitor extends in a direction substantially perpendicular to the line (vertical direction in the figure). The conductive film 304d is provided so as to extend in a direction parallel to the scanning line. 1a, the pixel 301b shown in FIG. 9 has a conductive film 310d that functions as a signal line and a The side parallel to the conductive film 304c functioning as the scanning line is shorter than the row side. In addition, the conductive film 304d that functions as a capacitance line is provided extending in a direction parallel to the scanning line. The conductive film 304d functioning as a capacitance line is different from the conductive film 304 functioning as a scanning line. The difference is that it was formed at the same time as 4c.

[0175] The light-transmitting conductive film 308c is connected to the conductive film 310f. The conductive film 316c having a light-transmitting property is formed at the same time as the conductive film 316b having a light-transmitting property. Film 310f is formed simultaneously with conductive films 310d and 310e.

[0176] In addition, an opening 372d formed at the same time as the opening 372c is formed on the conductive film 304d. An opening 374d is formed at the same time as the opening 374c. On the upper side, an opening 372e formed at the same time as the opening 372c, and an opening 374c formed at the same time The opening 374d is formed by forming an opening 374e. The openings 374d and 374e are each an opening Located inside 372d and 372e.

[0177] In the opening 374d, the conductive film 304d and the light-transmitting conductive film 316c are connected to each other. In addition, in the opening 374e, the conductive film 310f and the light-transmitting conductive film 316 That is, in the cross-sectional view shown by AB in FIG. The conductive film 304d and the conductive film 310c are connected to each other through the light-transmitting conductive film 316a. The conductive film 310f is connected to the conductive film 316c having light transmitting properties. The light-transmitting conductive film 308c is used as a capacitance line through the light-transmitting conductive film 316c. The conductive film 304c is connected to the conductive film 304d which functions as a conductive film.

[0178] In the pixel 301b shown in FIG. 9, the side parallel to the conductive film 310d functioning as a signal line is The side parallel to the conductive film 304c functioning as a scanning line is shorter than the side parallel to the conductive film 304c functioning as a capacitance line. The conductive film 304d, which functions as a scanning line, extends in a direction parallel to the conductive film 304c, which functions as a scanning line. As a result, the area of ​​the conductive film 304d in the pixel can be reduced. This makes it possible to increase the aperture ratio.

[0179] <Variation 2> Here, a modification of the semiconductor device shown in the first embodiment will be described with reference to FIGS. 6 and 10. explain.

[0180] The semiconductor device illustrated in FIG. 10 has a conductive film 304 In the region between b and the conductive film 310c, the insulating film 305 which is a part of the gate insulating film and the protective film The insulating film 314, which is a part of the protective film, is in contact with the insulating film 305. The insulating film 306 and the insulating film 312 are not provided between the insulating film 306 and the insulating film 314. .

[0181] In addition, in a region between the conductive film 310e and the light-transmitting conductive film 308c, The insulating film 305, which is a part of the insulating film, and the insulating film 314, which is a part of the protective film, are in contact with each other. That is, the insulating film 306 and the insulating film 312 are formed between the insulating film 305 and the insulating film 314. is not provided.

[0182] The semiconductor device shown in FIG. 10 has openings 372, 372a, 372b, and 372c shown in FIG. In the process of forming 72c, an insulating film provided between the opening 372a and the opening 372b 306 and the insulating film 311 are removed. During the formation, a mask is formed to expose the region between the conductive film 304b and the conductive film 310c. The areas not covered by the mask are etched to form openings 372a and 37 2b, the insulating film 306 and the insulating film 311 provided between the first and second electrodes 2a and 2b can be removed.

[0183] In addition, in the process of forming the openings 372, 372a, 372b, and 372c shown in FIG. In this case, the insulating film 306 and the insulating film 311 are not provided between the opening 372c and the opening 372. That is, when forming a mask by the fourth patterning, the conductive film 310e and the transparent A mask is formed so as to expose the area between the conductive films 308c having optical properties. The area between the opening 372c and the opening 372 is etched away. The insulating films 306 and 311 can be removed.

[0184] As a result, in the semiconductor device shown in FIG. Therefore, the alignment of the liquid crystal material contained in the liquid crystal layer 320 can be improved. It is possible to reduce the disturbance. In addition, it is possible to manufacture a semiconductor device with high contrast. can be done.

[0185] <Modification 3> Here, modifications of the semiconductor device shown in the first embodiment will be described with reference to FIGS. This will be explained using FIG.

[0186] The semiconductor device illustrated in FIG. 11 has a conductive film 304 The opening formed on b is formed by two etching steps, and the conductive film 310c and the conductive The opening formed on the conductive film 310e is formed by a single etching process. Let us assume that.

[0187] A method for manufacturing the semiconductor device shown in FIG. 11 will be described below.

[0188] As in the first embodiment, a gate electrode is formed on a substrate 302 through the steps shown in FIG. the conductive films 304a, 304b, and 304c functioning as a gate insulating film; and the insulating film 305 functioning as a gate insulating film. The insulating film 306, the oxide semiconductor films 308a, 308b, and 308d, the conductive films 310a, 10b, 310c, 310d, 310e, an insulating film 311, and an insulating film 313 are formed.

[0189] Next, the insulating film 311 is processed into a desired region to form an insulating film 312 and an opening 372. Furthermore, the insulating film 306, which is a part of the gate insulating film, is processed into a desired region. In this case, the opening 372a is formed. That is, the openings 372b and 372c are formed. The insulating film 305, the insulating film 312, and the openings 372 and 372a may be formed as desired. A mask is formed by a fourth patterning in the region, and the region not covered by the mask is It can be formed by etching (see FIG. 12(A)).

[0190] Next, the insulating film 313 is formed over the conductive film 304b and the oxide semiconductor film 308d (FIG. 12 (See (B)).

[0191] Next, the insulating film 313 is processed into a desired region to form an insulating film 314 and an opening 374. In addition, the insulating film 314 and the openings 374a, 376b, and 376c are formed. b, 376c form a mask by fifth patterning in a desired area, and the mask The area not covered by the etchant can be etched away (see FIG. 12(C)). ).

[0192] The opening 374a is formed so that the surface of the conductive film 304b is exposed. The opening 376b is formed so as to expose the surface of the conductive film 310c. 3c is formed so that the surface of the conductive film 310e is exposed.

[0193] In the etching process, the insulating film 305 and the insulating film 3 13 is etched. On the other hand, in the openings 376b and 376c, the insulating film 312 and The insulating film 313 is etched. For this reason, the thicknesses of the insulating films 305 and 312 are set to be equal. By reducing the thickness, the amount of etching for each opening becomes equal, so the etching time in this process is As a result, the manufacturing process of the semiconductor device can be improved. It can increase retention.

[0194] Next, a conductive film 31 is formed on the insulating film 314 so as to cover the openings 374a, 376b, and 376c. 5 is formed (see FIG. 13(A)).

[0195] Next, the conductive film 315 is processed into a desired region to form a light-transmitting conductive film 316a, The light-transmitting conductive films 316a and 316b are formed. A mask is formed on the region by a sixth patterning, and the region not covered by the mask is It can be formed by etching (see FIG. 13(B)).

[0196] Through the above steps, semiconductor devices can be manufactured with high yield.

[0197] <Modification 4> Here, a modification of the semiconductor device shown in the first embodiment will be described with reference to FIGS. 6 and 14. explain.

[0198] The semiconductor device illustrated in FIG. 14 has a conductive film 304 The opening formed on b is formed in the insulating film 305, the insulating film 306, and the insulating film 312. The first opening is formed in the insulating film 314, and the second opening is formed in the insulating film 314. It is characterized by being located inside the opening of 1.

[0199] The semiconductor device shown in FIG. 14 has openings 372, 372a, 372b, and 372c shown in FIG. In the process of forming 72c, the insulating film 305 on the conductive film 304b may be removed. As a result, the first opening can be formed in the insulating film 305, the insulating film 306, and the insulating film 312. Cut.

[0200] In addition, as shown in FIG. 6(C), a mask is formed in a desired area by a fifth patterning. When etching the areas not covered by the mask, the insulating film 3 is removed from each opening. 13, it is possible to reduce the variation in etching in the process. As a result, the yield in the manufacturing process of the semiconductor device can be increased.

[0201] <Variation 5> In the semiconductor device shown in this embodiment mode and the modification, The transistor has conductive films 310a and 310b over oxide semiconductor films 308a and 308b. The insulating film 306 and the oxide semiconductor films 308a and 308b are provided. Conductive films 310a, 310b, 310d, and 310e may be provided between them.

[0202] <Variation 6> In the semiconductor device shown in this embodiment mode and the modification, The shape of the transistor is not limited to that shown in FIG. 2 and may be changed as appropriate. For example, in the conductive film 310d of the transistor, The upper surface shape of the surface that overlaps with the conductive film 310e and faces the conductive film 310e is U-shaped. (C-shape, U-shape, or horseshoe shape) and may surround the conductive film 310e. By using a shape like this, a sufficient channel width can be secured even if the transistor area is small. This allows the drain current (also called on-current) that flows when the transistor is turned on. .) can be increased.

[0203] <Variation 7> In the semiconductor device shown in this embodiment mode and the modification, Although a channel-etched transistor was shown as the transistor to be used, A channel protection type transistor can be used. By providing a channel protection film, The surfaces of the compound semiconductor films 308a and 308b are etched with an etchant or etchant used in the conductive film formation process. The oxide semiconductor films 308a and 308b and the channel protective film are not exposed to the etching gas. Impurities can be reduced. As a result, the flow between the source and drain electrodes of the transistor is It is possible to reduce the leakage current caused by the gate insulating film.

[0204] <Variation 8> In the semiconductor device shown in this embodiment mode and the modification, Although a transistor having one gate electrode is shown as a transistor to be used, an oxide semiconductor A transistor having two gate electrodes facing each other through the body membranes 308a and 308b is used. It is possible.

[0205] For example, by providing a conductive film that functions as a gate electrode over the insulating film 314, A transistor having two gate electrodes opposed to each other via semiconductor films 308a and 308b is formed. The conductive film can be formed simultaneously with the light-transmitting conductive films 316a and 316b. The conductive film may be formed at least over the oxide semiconductor films 308a and 308b. The two gate electrodes facing each other with oxide semiconductor films 308a and 308b interposed therebetween are overlapped with the panel region. The electrodes may be applied with different potentials or the same potential. Alternatively, one of the gate electrodes may be connected to any The potential of the other gate electrode may be a constant potential or may be ground potential.

[0206] In addition, by providing a conductive film that functions as a gate electrode on the insulating film 314, The effect of the change in temperature on the oxide semiconductor films 308a and 308b is reduced, and the reliability of the transistor is improved. In addition, the threshold voltage of the transistor can be controlled. do.

[0207] (Embodiment 2) In this embodiment, a semiconductor device which is one embodiment of the present invention will be described with reference to drawings. Note that in this embodiment, a liquid crystal display device is used as an example of a semiconductor device according to one embodiment of the present invention. Note that the description of the configuration that overlaps with the first embodiment will be omitted.

[0208] FIG. 15 is a cross-sectional view of the semiconductor device shown in this embodiment, and cross section AB is a cross-sectional view of a driver circuit. 15(A) is a cross-sectional view of the pixel portion, and cross-section CD is a cross-sectional view of the pixel portion. is shown in FIG. 15(B), and an enlarged view of the dashed line F in FIG. 15(A) is shown in FIG. 15(C).

[0209] In the semiconductor device described in this embodiment, the shape of an opening is realized in a driver circuit portion and a pixel portion. Specifically, in the step of forming the opening, a part of the gate insulating film is etched. After etching to form an opening, a light-transmitting conductive film is formed on the opening. It is characterized by:

[0210] As shown in FIG. 15B, an opening provided in the insulating film 306 is formed on the conductive film 304b. 382a, and an opening 384 provided in the insulating film 305, the insulating film 312, and the insulating film 314. The opening 384a is located inside the opening 382a. In this case, the conductive film 304b and the light-transmitting conductive film 316a are connected to each other.

[0211] In addition, an opening 38 provided in the insulating film 312 and the insulating film 314 is formed on the conductive film 310c. In the opening 384b, the conductive film 310c and the light-transmitting conductive film 316 a is connected.

[0212] As shown in FIG. 15C, an insulating film 312 and an insulating film 314 are formed on the conductive film 310e. In the opening 384c, the conductive film 310e and the light-transmitting The conductive film 316b having the same structure is connected.

[0213] The insulating film 306 has an opening 382. That is, a light-transmitting conductive film 308c is provided in the opening 382. The film 308c and the insulating film 305 are in contact with each other.

[0214] In this embodiment, the insulating film 305 in contact with the light-transmitting conductive film 308c is Impurities from the oxide semiconductor film, such as water, alkali metals, and alkaline earth metals, may enter the oxide semiconductor film. It is preferable to use a material that prevents diffusion, and more preferably, the material contains hydrogen. Preferably, an inorganic insulating material containing nitrogen, for example, a nitride insulating film, can be used.

[0215] The light-transmitting conductive film 308c is formed simultaneously with the oxide semiconductor films 308a and 308b. The light-transmitting conductive film 308c is an oxide semiconductor film having an insulating property in the opening 382. The insulating film 305 is in contact with the insulating film 305. The insulating film 305 is resistant to impurities from the outside, such as water, alkali metals, a film formed of a material that prevents an alkaline earth metal or the like from diffusing into the oxide semiconductor film; Further, hydrogen is contained in the insulating film 305. Thus, hydrogen in the insulating film 305 is absorbed in the oxide semiconductor films 308a and 308b. When hydrogen diffuses into an oxide semiconductor film formed at the same time, the hydrogen is converted into oxygen in the oxide semiconductor film. As a result, the oxide semiconductor film has high electrical conductivity. In this embodiment, the same material as the oxide semiconductor films 308a and 308b is used. Since the hydrogen concentration in the oxide semiconductor films 308a and 308b is higher than that in the oxide semiconductor films 308a and 308b, The metal oxide with enhanced conductivity is referred to as a light-transmitting conductive film 308c.

[0216] The semiconductor device described in this embodiment includes a capacitor and an oxide semiconductor film. In addition, a light-transmitting conductive film that functions as a pixel electrode is formed. The other electrode of the capacitor element is used. Since the step of forming a conductive film is not required, the manufacturing steps of the semiconductor device can be reduced. Since the pair of electrodes is formed of a conductive film having a light-transmitting property, the light-transmitting property is obtained. As a result, the area occupied by the capacitance element can be increased while increasing the aperture ratio of the pixel. By reducing the thickness of the insulating film 306, the surfaces of the conductive films 316a and 316b having light transmitting properties can be Therefore, the alignment disorder of the liquid crystal material contained in the liquid crystal layer 320 can be prevented. In addition, it is possible to manufacture a semiconductor device with high contrast. can.

[0217] <Method for manufacturing semiconductor device> Regarding a method for manufacturing an element portion provided on a substrate 302 shown in the semiconductor device shown in FIG. This will be explained with reference to FIG. 4, FIG. 16, and FIG.

[0218] As in the first embodiment, a conductive film that functions as a gate is formed on the substrate 302 through the process shown in FIG. the insulating film 305 functioning as a gate insulating film; A film 306 is formed. The conductive films 304a, 304b, and 304c functioning as gates are A mask is formed by a first patterning, and an area not covered by the mask is etched. It can be formed by etching.

[0219] Next, the insulating film 306 is processed into desired regions to form openings 382a and 382b. The openings 382a and 382 are formed in desired regions by a second patterning process. A mask is formed, and the area not covered by the mask is etched to form the This can be done (see FIG. 16(A)).

[0220] Next, similarly to the first embodiment, an oxide semiconductor film is formed, and then the oxide semiconductor film is By processing the oxide semiconductor film into the above-mentioned regions, island-shaped oxide semiconductor films 308a, 308b, and 308d are formed. Note that the oxide semiconductor films 308a, 308b, and 308d are formed in desired regions. A mask is formed by patterning, and the area not covered by the mask is etched. It can be formed by doing so (see FIG. 16(B)).

[0221] Next, similarly to the first embodiment, a first heat treatment is preferably performed.

[0222] Next, a conductive film is formed over the insulating film 306 and the oxide semiconductor films 308a, 308b, and 308d. After the formation, the conductive film is processed into a desired region, so that the conductive films 310a, 310b, and 31 In addition, the conductive films 310a, 310b, 310c, 310d, and 310e are formed. The formation of 10d and 310e involves forming a mask by a fourth patterning in a desired area. The mask can be formed by etching the areas not covered by the mask.

[0223] Next, the insulating film 306, the oxide semiconductor films 308a, 308b, and 308d, and the conductive film 31 An insulating film 311 and an insulating A film 313 is formed (see FIG. 16(C)).

[0224] Next, the insulating film 311 and the insulating film 313 are processed into desired regions, so that the insulating film 312 and The insulating film 314 and the openings 384a, 384b, and 384c are formed. The formation of the insulating film 312 and the insulating film 314, and the openings 384a, 384b, and 384c are performed as desired. A mask is formed on the region by a fifth patterning, and the region not covered by the mask is It can be formed by etching (see FIG. 17(A)).

[0225] Next, a conductive film is formed on the conductive film 304b, the conductive films 310c, 310d, and 310e, and the insulating film 314. After the film is formed, the conductive film is processed into a desired region to form a light-transmitting conductive film 316. The light-transmitting conductive films 316a and 316b are formed. A mask is formed by a sixth patterning in a desired region, and a region not covered by the mask is The insulating layer can be formed by etching the area (see FIG. 17(B)).

[0226] Through the above steps, a pixel portion having a transistor and a driver circuit portion are formed on the substrate 302. In the manufacturing process shown in this embodiment, the first to sixth patterned This means that transistors and capacitors can be formed simultaneously using six masks. do.

[0227] (Embodiment 3) In this embodiment, a semiconductor device which is one embodiment of the present invention will be described with reference to drawings. Note that in this embodiment, a liquid crystal display device is used as an example of a semiconductor device according to one embodiment of the present invention. In this embodiment, the description will be given using the embodiment 1, but it may be applied to the embodiment 2 as appropriate. It is possible to do so. Note that the description of the configuration overlapping with the first embodiment will be omitted. .

[0228] FIG. 18 is a cross-sectional view of the semiconductor device shown in this embodiment, and cross section AB is a cross-sectional view of the driver circuit portion. 1 is a cross-sectional view, and cross section CD is a cross-sectional view of a pixel portion.

[0229] In the semiconductor device shown in this embodiment, an insulating film 314 is provided on the insulating film 314 which is a protective film for a transistor. The insulating film 332 is preferably a film that reduces unevenness. In addition, the insulating film 332 functions as an insulating film. A conductive film formed below the insulating film 332 and a conductive film formed above the insulating film 332 It is possible to suppress the occurrence of parasitic capacitance that may occur between the

[0230] The insulating film 332 is a silicon oxide film formed by a CVD method using an organic silane gas. The silicon oxide film has excellent step coverage. The thickness of the contact film can be 300 nm or more and 600 nm or less.

[0231] The organic silane gas is ethyl silicate (TEOS: chemical formula Si(OC2H5)4), Tetramethylsilane (TMS: chemical formula Si(CH3)4), tetramethylcyclotetrasilane Octamethylcyclotetrasiloxane (TMCTS), Octamethylcyclotetrasiloxane (OMCTS), Hexamethasone Thiopropyldisilazane (HMDS), triethoxysilane (SiH(OC2H5)3), tris Using silicon-containing compounds such as dimethylaminosilane (SiH(N(CH3)2)3) It is possible.

[0232] The insulating film 332 is formed by using organic silane gas and oxygen, and the substrate temperature is set to 200° C. or higher and 55° C. or lower. 0°C or lower, preferably 220°C to 500°C, more preferably 300°C to 450°C It can be formed by the following CVD method.

[0233] The insulating film 332 may be made of a photosensitive or non-photosensitive organic resin. For example, acrylic resin may be used. resin, benzocyclobutene resin, epoxy resin, or siloxane resin. By using a photosensitive organic resin, the side surface of the opening can be curved. This makes it possible to make the step at the opening gentler.

[0234] When the insulating film 332 is provided over the insulating film 314, the insulating film 314 and the insulating film 332 are It functions as a dielectric film of the capacitance element 105. The insulating film 314 is made of a nitride insulating film. The nitride insulating film has a higher dielectric constant and lower internal stress than oxide insulating films such as silicon oxide. Therefore, the insulating film 332 is not used as the dielectric film of the capacitor element 105. When only the insulating film 314 is used, if the thickness of the insulating film 314 is small, the charge of the capacitance element 105 The capacity has become too large, and it is necessary to increase the speed at which image signals are written to the pixels while keeping power consumption low. On the other hand, if the thickness of the insulating film 314 is large, the internal stress becomes large. This causes the threshold voltage of the transistor to fluctuate, leading to deterioration of electrical characteristics. If the internal stress of the insulating film 314 becomes too large, the insulating film 314 is likely to peel off from the substrate 302. However, the insulating film 332 having a lower relative dielectric constant than the insulating film 314 is used. By using the insulating film 314 as a dielectric film of the capacitance element of the pixel, The dielectric constant of the dielectric film can be adjusted to a desired value without increasing the film thickness.

[0235] Here, a flat surface is formed between the insulating film 314 and the light-transmitting conductive films 316a and 316b. The insulating film 332 is provided with light-transmitting conductive films 316a and 316b and an alignment film 3. An insulating film 332 may be provided between the first and second electrodes 18 .

[0236] Between the insulating film 314 and the light-transmitting conductive films 316a and 316b, or The silicon oxide film is provided between the conductive films 316a and 316b and the alignment film 318. Therefore, the flatness of the surfaces of the light-transmitting conductive films 316a and 316b can be improved.

[0237] (Embodiment 4) In this embodiment, a semiconductor device which is one embodiment of the present invention will be described with reference to drawings. Note that in this embodiment, a liquid crystal display device is used as an example of a semiconductor device according to one embodiment of the present invention. In this embodiment, we will explain the FFS (Fringe Force Switching) method, which uses a lateral electric field to align liquid crystal molecules. The following description will be given using a liquid crystal display device in the E Field Switching mode. Description of configurations that overlap with those in the first embodiment will be omitted.

[0238] FIG. 19 is a top view of a pixel 301c of a liquid crystal display device in the FFS mode.

[0239] The conductive film 304c functioning as a scanning line is arranged in a direction substantially perpendicular to the signal line (the left-right direction in the drawing). The conductive film 310d that functions as a signal line is substantially perpendicular to the scanning line. It is connected to a common electrode and functions as a common wiring. The conductive film 310g is provided extending in a direction parallel to the signal lines.

[0240] The transistor 103 is provided in a region where the scanning line and the signal line intersect. The gate insulating film (not shown in FIG. 19) is a conductive film 304c that functions as a gate. ), an oxide semiconductor film 308b in which a channel region is formed on the gate insulating film, A transistor is formed by the conductive films 310d and 310e which function as a source and a drain. Note that the conductive film 304c also functions as a scan line and overlaps with the oxide semiconductor film 308b. The conductive film 310d serves as the gate of the transistor 103. The region overlapping with the oxide semiconductor film 308b is the source of the transistor 103. It acts as a source or drain.

[0241] The conductive film 310e is formed as a pixel electrode in the openings 372c and 374c. The light-transmitting conductive film 316d is electrically connected to the light-transmitting conductive film 316d.

[0242] The light-transmitting conductive film 316d functioning as a pixel electrode has an opening (slit). do.

[0243] In addition, the light-transmitting conductive film 308c formed at the same time as the oxide semiconductor film 308b is In this embodiment, the light-transmitting conductive film 308c is provided over the gate insulating film. The light-transmitting conductive film 308c functions as a common electrode. It is connected to a conductive film 310g that functions as wiring.

[0244] In this embodiment, the liquid crystal element includes a light-transmitting conductive film 3 that functions as a common electrode. 08c, a light-transmitting conductive film 316d functioning as a pixel electrode, and a liquid crystal layer. That is, the liquid crystal element has a light-transmitting property.

[0245] In addition, the conductive film 316d having a light-transmitting property and functioning as a pixel electrode has an opening (slit). That is, a light-transmitting conductive film 316d which functions as a pixel electrode and By applying an electric field between the conductive film 308c having a light-transmitting property and the conductive film 308c functioning as a conducting electrode, A light-transmitting conductive film 316d functioning as a base electrode, an insulating film, and a common electrode The overlapping region of the conductive film 308c functions as a capacitor element and also functions as a liquid crystal element. This allows the alignment of liquid crystal molecules to be controlled in a direction parallel to the substrate.

[0246] Next, a cross-sectional view taken along the dashed line CD in FIG. 19 is shown in FIG. The cross section is shown at AB.

[0247] The liquid crystal display device shown in this embodiment has a liquid crystal display device between a pair of substrates (a substrate 302 and a substrate 342). The element 323 is clamped.

[0248] The liquid crystal element 323 is formed by a light-transmitting conductive film 308c and an insulating film 31 4, a light-transmitting conductive film 316d, an alignment film 318, and a liquid crystal layer 320. The light-transmitting conductive film 308c functions as one electrode of the liquid crystal element 323. The conductive film 316d having the property functions as the other electrode of the liquid crystal element 323. Unlike the first embodiment, a light-transmitting conductive film is not provided on the substrate 342, and the insulating film 3 An alignment film 352 is provided on the substrate 48 .

[0249] In addition, an insulating film 314 is provided over a light-transmitting conductive film 308c that functions as a common electrode. A light-transmitting conductive film 316d functioning as a pixel electrode is formed over the insulating film 314. That is, a pair of electrodes constituting a liquid crystal element is provided on a substrate 302.

[0250] A light-transmitting conductive film 316d serving as a pixel electrode and a light-transmitting conductive film 316e serving as a common electrode By applying a voltage between the transparent conductive film 308c and the transparent conductive film 308b, a transparent conductive film that functions as a pixel electrode is formed. The conductive film 316d having a light-transmitting property, the insulating film, and the conductive film having a light-transmitting property functioning as a common electrode An electric field is generated between the films 308c, and the orientation of the liquid crystal molecules can be controlled in a direction parallel to the substrate. As a result, the FFS mode LCD device has a superior viewing angle and higher image quality.

[0251] (Embodiment 5) In this embodiment mode, the driver circuit portion and the pixel portion shown in any one of Embodiments 1 to 3 are The structure of a transistor that can be used in the above will be described with reference to FIG.

[0252] The transistor shown in FIG. 21A includes a conductive film 304a formed over a substrate 302 and a Insulating films 305 and 306 are formed on the plate 302 and the conductive film 304a. The multilayer film 380 thus formed, and the conductive film 310 formed on the insulating film 306 and the multilayer film 380 In addition, the transistor shown in FIG. More specifically, the insulating film formed on the multilayer film 380 and the conductive films 310a and 310b A configuration including 312 and 314 is also possible.

[0253] Depending on the type of conductive film used for the conductive films 310a and 310b, By removing oxygen from the n-type region or forming a mixed layer, a pair of n-type regions 383 are formed in the multilayer film 380. In FIG. 21A, the n-type region 383 is a conductive film in the multilayer film 380. The n-type region 383 can be formed in the region near the interface between the n-type region 310a and the n-type region 383. It can function as a source region and a drain region.

[0254] In the transistor shown in FIG. 21A, the conductive film 304a functions as a gate. The conductive film 310a functions as either a source or a drain, and the conductive film 310b functions as either a source or a drain. serves as the other drain.

[0255] In addition, in the transistor shown in FIG. 21A, the multilayer film 3 in the region overlapping with the conductive film 304a The distance between the conductive film 310a and the conductive film 310b in the semiconductor device 80 is called the channel length. The region is a region in the multilayer film 380 that overlaps with the conductive film 304a and is in contact with the conductive film 310a. The channel region is a region sandwiched between the gate electrodes 310b and 310c. The channel forming region is a region that includes the channel region. Here, the multilayer film 380 corresponds to the channel forming region.

[0256] Here, the multilayer film 380 will be described in detail with reference to FIG.

[0257] FIG. 21B is an enlarged view of the area surrounded by the dashed line in the multilayer film 380 shown in FIG. 21A. The multilayer film 380 includes an oxide semiconductor film 380a and an oxide film 380b.

[0258] The oxide semiconductor film 380a contains at least indium (In), zinc (Zn) and Mn (Al). In-M-Zn oxide containing metals such as I, Ga, Y, Zr, Sn, La, Ce or Hf Note that the oxide semiconductor film 380a is preferably a film represented by the formula (1) in the above embodiment. An oxide semiconductor material that can be used for the oxide semiconductor films 308a and 308b shown in the embodiment Alternatively, the formation method and the like can be appropriately adopted.

[0259] The oxide film 380b is composed of one or more elements constituting the oxide semiconductor film 380a. The energy of the conduction band minimum is 0.05 eV or more and 0.07 eV or more higher than that of the oxide semiconductor film 380a. eV or more, 0.1 eV or more or 0.15 eV or more and 2 eV or less, 1 eV or less, 0. The oxide film is close to the vacuum level of 5 eV or less or 0.4 eV or less. When an electric field is applied to the conductive film 304a, which functions as a A channel is formed in the oxide semiconductor film 380a having a small energy. By providing the oxide film 380b between the dielectric film 380a and the insulating film 306, The channel of the transistor can be formed in the oxide semiconductor film 380 a that is not in contact with the insulating film 312. do.

[0260] In addition, the oxide film 380b is composed of one or more of the elements constituting the oxide semiconductor film 380a. Therefore, interface scattering occurs between the oxide semiconductor film 380a and the oxide film 380b. Therefore, between the oxide semiconductor film 380a and the oxide film 380b, Since the movement of carriers is not hindered, the field effect mobility of the transistor is increased. An interface state is unlikely to be formed between the oxide semiconductor film 380a and the oxide film 380b. When there is an interface state between the conductor film 380a and the oxide film 380b, the interface serves as a channel. A second transistor with a different threshold voltage is formed, and the apparent threshold voltage of the transistor is Therefore, by providing the oxide film 380b, the transistor voltage may fluctuate. This makes it possible to reduce variations in electrical characteristics such as the threshold voltage of the transistor.

[0261] The oxide film 380b is made of In-M-Zn oxide (Al, Ti, Ga, Y, Zr, Sn , La, Ce, Hf, or other metal), and the number of M atoms is larger than that of the oxide semiconductor film 380a. Specifically, the oxide film 380b includes an oxide film having a high atomic ratio. The above elements are contained in an amount 1.5 times or more, preferably 2 times or more, more preferably 3 times or more, of 0a. Use an oxide film containing a high atomic ratio. The above elements bond more strongly with oxygen than indium. Therefore, it has a function of suppressing the occurrence of oxygen vacancies in the oxide film. The oxide semiconductor film 380b is an oxide film in which oxygen vacancies are less likely to occur than in the oxide semiconductor film 380a.

[0262] In other words, the oxide semiconductor film 380a and the oxide film 380b contain at least indium, zinc and I containing M (metals such as Al, Ti, Ga, Y, Zr, Sn, La, Ce, or Hf) When the oxide film 380b is an nM-Zn oxide, the oxide film 380b is In:M:Zn=x1:y1:z1[ the oxide semiconductor film 380a is In:M:Zn=x2:y2:z2 [atomic ratio] , it is preferable that y1 / x1 is greater than y2 / x2. y1 / x1 is y It is set to 1.5 times or more, preferably 2 times or more, and more preferably 3 times or more than 2 / x2. In this case, when y1 is equal to or larger than x1 in the oxide film 380b, the electrical characteristics of the transistor are However, if y1 is three times larger than x1, the transistor current Since the field effect mobility is reduced, y1 is preferably less than three times x1.

[0263] When the oxide semiconductor film 380a is an In-M-Zn oxide, the sum of In and M is When the atomic percentage of In is 100 atomic %, the atomic ratio of In and M is preferably 25 atomic %. mic% or more, M is less than 75 atomic%, and more preferably In is 34 atomic% % or more, and M is less than 66 atomic %. In addition, the oxide film 380b is In-M-Zn In the case of oxides, the sum of In and M is 100 atomic %. The ratio of In is preferably less than 50 atomic % and M is preferably 50 atomic % or more. More preferably, In is less than 25 atomic % and M is 75 atomic % or more.

[0264] The oxide semiconductor film 380a and the oxide film 380b contain, for example, indium, zinc, and An oxide semiconductor containing gallium can be used. 0a is In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=1:1:1; In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=3:1:2 or its vicinity The oxide film 380 can be formed by using a metal oxide target having an atomic ratio of b is In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=1:3:2, and I In-Ga-Zn oxide with n:Ga:Zn=1:3:4 [atomic ratio], In:Ga:Zn =1:6:2 [atomic ratio] In-Ga-Zn oxide, In:Ga:Zn=1:6:4 [ In-Ga-Zn oxide with In:Ga:Zn=1:6:10 [atomic ratio] In-Ga-Zn oxide, In-Ga-Z with In:Ga:Zn=1:9:6 [atomic ratio] It is formed by using a metal oxide target having an atomic ratio of n oxide or a metal oxide having an atomic ratio close to that. This can be done.

[0265] The thickness of the oxide semiconductor film 380a is 3 nm to 200 nm, preferably 3 nm to 50 nm. m is from 0.1 to 100 nm, and more preferably from 0.1 to 50 nm. The thickness of the film 380b is 3 nm to 100 nm, preferably 3 nm to 50 nm. do.

[0266] Next, the band structure of the multilayer film 380 will be described with reference to FIGS.

[0267] For example, the oxide semiconductor film 380a has an energy gap of 3.15 eV. Using n-Ga-Zn oxide, the oxide film 380b has an energy gap of 3.5 eV. The energy gap is measured using a spectroscopic ellipsometer (H Measurements can be performed using ORIBA JOBIN YVON UT-300.

[0268] Vacuum levels and valence band top energies of the oxide semiconductor film 380a and the oxide film 380b The difference (also called the ionization potential) was 8 eV and 8.2 eV, respectively. The energy difference between the vacuum level and the top of the valence band is measured by ultraviolet photoelectron spectroscopy (UPS). Raviolet Photoelectron Spectroscopy (P Measurements can be performed using a HI VersaProbe.

[0269] Therefore, the vacuum level and the conduction band minimum of the oxide semiconductor film 380a and the oxide film 380b are The energy difference (also called electron affinity) is 4.85 eV and 4.7 eV, respectively. .

[0270] FIG. 21C shows a schematic diagram of a part of the band structure of the multilayer film 380. A case where a silicon oxide film is provided in contact with the multilayer film 380 will be described. ) indicates the energy of the bottom of the conduction band of the silicon oxide film, and EcS1 indicates the energy of the oxide indicates the energy of the bottom of the conduction band of the semiconductor film 380a, and EcS2 indicates the energy of the bottom of the conduction band of the oxide film 380b. EcI2 indicates the energy of the conduction band edge of the silicon oxide film. 21A, EcI1 corresponds to the insulating film 306, and EcI2 corresponds to the insulating film 306 in FIG. In FIG. 1(A), this corresponds to insulating film 312.

[0271] As shown in FIG. 21C, in the oxide semiconductor film 380a and the oxide film 380b, The energy at the bottom of the conduction band changes smoothly without any barrier. In other words, it changes continuously. This is because the multilayer film 380 and the oxide semiconductor film 380a share the same element. The oxide semiconductor film 380a and the oxide film 380b each contain oxygen, and oxygen is transferred between the oxide semiconductor film 380a and the oxide film 380b. This can be said to be because a mixed layer is formed.

[0272] As shown in FIG. 21C, the oxide semiconductor film 380a of the multilayer film 380 serves as a well. In the transistor using the multilayer film 380, the channel region is formed in the oxide semiconductor film 380a. It can be seen that the multilayer film 380 is formed in such a manner that the energy of the conduction band minimum changes continuously. Since the oxide semiconductor film 380a and the oxide film 380b are oxidized, the oxide semiconductor film 380a and the oxide film 380b are continuously joined. It can also be said.

[0273] As shown in FIG. 21C, the oxide film 380b is located near the interface between the oxide film 380b and the insulating film 312. In the case of the oxide film 380b, a trap level due to impurities or defects may be formed. By this, the oxide semiconductor film 380a can be separated from the trap states. However, when the energy difference between EcS1 and EcS2 is small, the oxide semiconductor film 380 An electron at a can exceed the energy difference and reach the trap level. When holes are captured, negative charges are generated at the interface of the insulating film, and the threshold voltage of the transistor shifts in the positive direction. Therefore, when the energy difference between EcS1 and EcS2 is 0.1 eV or more, preferably 0.15 eV or more, the variation in the threshold voltage of the transistor is reduced, resulting in stable electrical characteristics, which is preferable. Also, FIG. 21(D) schematically shows a part of the band structure of the multilayer film 380, which is a modified example of the band structure shown in FIG. 21(C). Here, the case where a silicon oxide film is provided in contact with the multilayer film 380 will be described. Note that EcI1 shown in FIG. 21(D) represents the energy of the lower end of the conduction band of the silicon oxide film, EcS1 represents the energy of the lower end of the conduction band of the oxide semiconductor film 380a, and EcI2 represents the energy of the lower end of the conduction band of the silicon oxide film. Also, EcI1 corresponds to the insulating film 306 in FIG. 21(A), and EcI2 corresponds to the insulating film 312 in FIG. 21(A). In the transistor shown in FIG. 21(A), when forming the conductive films 310a and 310b, the upper part of the multilayer film 380, that is, the oxide film 380b may be etched. However, on the upper surface of the oxide semiconductor film 380a, a mixed layer of the oxide semiconductor film 380a and the oxide film 380b may be formed during the film formation of the oxide film 380b. For example, the oxide semiconductor film 380a is an In-Ga-Zn oxide formed using a target of In:Ga:Zn = 1:1:1 [atomic ratio] or an In-Ga-Zn oxide formed using a target of In:Ga:Zn = 3:1:2 [atomic ratio], and the oxide film 380b is an I

[0274] Also, FIG. 21(D) schematically shows a part of the band structure of the multilayer film 380, which is a modified example of the band structure shown in FIG. 21(C). Here, the case where a silicon oxide film is provided in contact with the multilayer film 380 will be described. Note that EcI1 shown in FIG. 21(D) represents the energy of the lower end of the conduction band of the silicon oxide film, EcS1 represents the energy of the lower end of the conduction band of the oxide semiconductor film 380a, and EcI2 represents the energy of the lower end of the conduction band of the silicon oxide film. Also, EcI1 corresponds to the insulating film 306 in FIG. 21(A), and EcI2 corresponds to the insulating film 312 in FIG. 21(A). Also, FIG. 21(D) schematically shows a part of the band structure of the multilayer film 380, which is a modified example of the band structure shown in FIG. 21(C). Here, the case where a silicon oxide film is provided in contact with the multilayer film 380 will be described. Note that EcI1 shown in FIG. 21(D) represents the energy of the lower end of the conduction band of the silicon oxide film, EcS1 represents the energy of the lower end of the conduction band of the oxide semiconductor film 380a, and EcI2 represents the energy of the lower end of the conduction band of the silicon oxide film. Also, EcI1 corresponds to the insulating film 306 in FIG. 21(A), and EcI2 corresponds to the insulating film 312 in FIG. 21(A). In the transistor shown in FIG. 21(A), when forming the conductive films 310a and 310b, the upper part of the multilayer film 380, that is, the oxide film 380b may be etched. However, on the upper surface of the oxide semiconductor film 380a, a mixed layer of the oxide semiconductor film 380a and the oxide film 380b may be formed during the film formation of the oxide film 380b. For example, the oxide semiconductor film 380a is an In-Ga-Zn oxide formed using a target of In:Ga:Zn = 1:1:1 [atomic ratio] or an In-Ga-Zn oxide formed using a target of In:Ga:Zn = 3:1:2 [atomic ratio], and the oxide film 380b is an I In the transistor shown in FIG. 21(A), when forming the conductive films 310a and 310b, the upper part of the multilayer film 380, that is, the oxide film 380b may be etched. However, on the upper surface of the oxide semiconductor film 380a, a mixed layer of the oxide semiconductor film 380a and the oxide film 380b may be formed during the film formation of the oxide film 380b. For example, the oxide semiconductor film 380a is an In-Ga-Zn oxide formed using a target of In:Ga:Zn = 1:1:1 [atomic ratio] or an In-Ga-Zn oxide formed using a target of In:Ga:Zn = 3:1:2 [atomic ratio], and the oxide film 380b is an I In the transistor shown in FIG. 21(A), when forming the conductive films 310a and 310b, the upper part of the multilayer film 380, that is, the oxide film 380b may be etched. However, on the upper surface of the oxide semiconductor film 380a, a mixed layer of the oxide semiconductor film 380a and the oxide film 380b may be formed during the film formation of the oxide film 380b.

[0275] In the transistor shown in FIG. 21(A), when forming the conductive films 310a and 310b, the upper part of the multilayer film 380, that is, the oxide film 380b may be etched. However, on the upper surface of the oxide semiconductor film 380a, a mixed layer of the oxide semiconductor film 380a and the oxide film 380b may be formed during the film formation of the oxide film 380b. For example, the oxide semiconductor film 380a is an In-Ga-Zn oxide formed using a target of In:Ga:Zn = 1:1:1 [atomic ratio] or an In-Ga-Zn oxide formed using a target of In:Ga:Zn = 3:1:2 [atomic ratio], and the oxide film 380b is an I In the transistor shown in FIG. 21(A), when forming the conductive films 310a and 310b, the upper part of the multilayer film 380, that is, the oxide film 380b may be etched. However, on the upper surface of the oxide semiconductor film 380a, a mixed layer of the oxide semiconductor film 380a and the oxide film 380b may be formed during the film formation of the oxide film 380b. For example, the oxide semiconductor film 380a is an In-Ga-Zn oxide formed using a target of In:Ga:Zn = 1:1:1 [atomic ratio] or an In-Ga-Zn oxide formed using a target of In:Ga:Zn = 3:1:2 [atomic ratio], and the oxide film 380b is an I

[0276] For example, the oxide semiconductor film 380a is an In-Ga-Zn oxide formed using a target of In:Ga:Zn = 1:1:1 [atomic ratio] or an In-Ga-Zn oxide formed using a target of In:Ga:Zn = 3:1:2 [atomic ratio], and the oxide film 380b is an I In the transistor shown in FIG. 21(A), when forming the conductive films 310a and 310b, the upper part of the multilayer film 380, that is, the oxide film 380b may be etched. However, on the upper surface of the oxide semiconductor film 380a, a mixed layer of the oxide semiconductor film 380a and the oxide film 380b may be formed during the film formation of the oxide film 380b. For example, the oxide semiconductor film 380a is an In-Ga-Zn oxide formed using a target of In:Ga:Zn = 1:1:1 [atomic ratio] or an In-Ga-Zn oxide formed using a target of In:Ga:Zn = 3:1:2 [atomic ratio], and the oxide film 380b is an I In-Ga-Zn oxide with n:Ga:Zn=1:3:2 [atomic ratio], or In:Ga In-Ga:Zn=1:6:4 [atomic ratio] metal oxide target was used. In the case of a Zn oxide, the Ga content of the oxide film 380b is higher than that of the oxide semiconductor film 380a. Since the amount is large, the GaOx layer or the oxide semiconductor film 380a is not formed on the upper surface of the oxide semiconductor film 380a. A mixed layer containing more Ga than 80a can be formed.

[0277] Therefore, even when the oxide film 380b is etched, the EcI The energy of the bottom of the conduction band on the 2 side becomes higher, resulting in the band structure shown in Figure 21(D). There are cases.

[0278] When the band structure shown in FIG. 21(D) is obtained, when observing the cross section of the channel region, In some cases, the multilayer film 380 appears to be composed of only the oxide semiconductor film 380a. On the other hand, substantially, a thin film is formed on the oxide semiconductor film 380a. Since a mixed layer containing a large amount of Ga is formed, the mixed layer can be regarded as a 1.5 layer. The mixed layer can be obtained by, for example, EDX analysis or the like, by determining the elements contained in the multilayer film 380. When the element is measured, the composition above the oxide semiconductor film 380a is analyzed to confirm the result. For example, the composition of the upper portion of the oxide semiconductor film 380a can be This can be confirmed by the fact that the Ga content is higher than in the composition.

[0279] In this embodiment, the multilayer film 380 includes an oxide semiconductor film 380a and an oxide The laminated structure of two layers, i.e., the film 380b and the film 380c, is illustrated above, but is not limited thereto. For example, A three-layer structure may be, for example, the structure shown in this embodiment. A structure in which an additional layer is provided under the multilayer film 380, i.e., under the oxide semiconductor film 380a The film provided under the oxide semiconductor film 380a may have a structure such as, for example, an oxide A similar configuration to that of the membrane 380b can be applied.

[0280] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do.

[0281] (Embodiment 6) In this embodiment, an oxide semiconductor included in the semiconductor device described in the above embodiment The light-transmitting conductive film will be described. 3, a light-transmitting conductive film 308c is formed simultaneously with an oxide semiconductor film and a nitride semiconductor film. The electrical conductivity of the film is increased by being in contact with the insulating film.

[0282] The oxide semiconductor film and the light-transmitting conductive film are formed of an amorphous oxide semiconductor, a single-crystal oxide semiconductor, or a In addition, the oxide semiconductor film and the light-transmitting The conductive film may be made of an oxide semiconductor having a crystalline portion (CAAC-OS). stomach.

[0283] The CAAC-OS film is one of the oxide semiconductor films that has multiple crystal parts. The crystal part is small enough to fit inside a cube with one side less than 100 nm. The crystal parts contained in the OS film are cubes with one side less than 10 nm, 5 nm, or 3 nm. The CAAC-OS film has a smaller size than the microcrystalline oxide semiconductor film. The defect density is low. The CAAC-OS film is described in detail below. cormorant.

[0284] The CAAC-OS film was observed under a transmission electron microscope (TEM). When observed using a quartz crystal microscope, clear boundaries between the crystals were observed. It is not possible to confirm the grain boundary. It can be said that the AAC-OS film is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0285] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation). When the metal atoms are observed, it can be confirmed that they are arranged in layers in the crystal part. Each layer of the CAAC-OS film is formed on a surface on which the film is to be formed (also called a surface on which the film is to be formed) or on a concave surface on the upper surface. The shape reflects a convexity, and is aligned parallel to the surface on which the CAAC-OS film is formed or the upper surface.

[0286] On the other hand, the CAAC-OS film was observed by TEM from a direction roughly perpendicular to the sample surface (plane T EM observation reveals that metal atoms are arranged in triangular or hexagonal shapes in the crystals. However, no regularity was observed in the arrangement of metal atoms between different crystal regions. do not have.

[0287] Cross-sectional and planar TEM observations revealed that the crystals in the CAAC-OS film had an orientation. It can be seen that...

[0288] X-ray diffraction (XRD) of CAAC-OS film When the structure was analyzed using the device, for example, CAAC-OS with InGaZnO4 crystals was In the out-of-plane analysis of the film, the diffraction angle (2θ) peaked at around 31°. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the crystals of the CAAC-OS film have a c-axis orientation, and the c-axis faces the surface on which the film is formed or the upper surface. It can be seen that it is oriented in a roughly vertical direction.

[0289] On the other hand, in-p X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis. In the lane method, a peak may appear at 2θ around 56°. is attributed to the (110) plane of the InGaZnO4 crystal. In the case of a nitride semiconductor film, 2θ is fixed at around 56°, and the normal vector of the sample surface is the axis (φ axis). When the sample is rotated and analyzed (φ scan), a crystal plane equivalent to the (110) plane is detected. In contrast, in the case of the CAAC-OS film, six peaks are observed, which are assigned to Even when φ is fixed at around 56° and scanned, no clear peak appears.

[0290] From the above, it is considered that the orientation of the a-axis and b-axis is uniform between different crystal regions in the CAAC-OS film. Although it is irregular, it has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface on which it is formed or the upper surface. Therefore, the layered structure confirmed by the cross-sectional TEM observation mentioned above is consistent with the Each layer of arranged metal atoms is in a plane parallel to the ab plane of the crystal.

[0291] The crystalline part is formed when the CAAC-OS film is formed or after a crystallization process such as a heat treatment. As described above, the c-axis of the crystal is aligned to the surface on which the CAAC-OS film is to be formed. For example, in the CAAC-OS film, When the shape is changed by etching, the c-axis of the crystal is aligned with the CAAC-OS film. It may not be parallel to the face or top surface normal vector.

[0292] In addition, the crystallinity in the CAAC-OS film does not have to be uniform. When the crystalline part of the film is formed by crystal growth from the vicinity of the top surface of the CAAC-OS film, The area near the surface may have a higher crystallinity than the area near the surface on which it is formed. When impurities are added to the AC-OS film, the crystallinity of the region to which the impurities are added changes, resulting in a partial In some cases, regions of differing crystallinity may be formed.

[0293] In addition, the out-of-plane crystal structure of the CAAC-OS film with InGaZnO4 crystals In the analysis by the method, in addition to the peak at 2θ near 31°, a peak also appeared at 2θ near 36°. The peak at 2θ of around 36° may be due to the c-axis orientation in some parts of the CAAC-OS film. The CAAC-OS film contains crystals that do not have the 2θ value of about 31°. It is preferable that the spectrum shows a peak at 2θ of about 36° and does not show a peak at 2θ of about 36°.

[0294] In this specification, when the term "perpendicular" is used, it also includes the range of 85° to 95°. In addition, when simply describing it as parallel, the range of -5° to 5° is also included. It has been decided that.

[0295] In the CAAC-OS, the distribution of the crystal parts may not be uniform. In the process of forming C-OS, when crystal growth is performed from the surface side of the oxide semiconductor, The proportion of crystalline parts may be higher near the surface than near the bottom. By adding impurities to the -OS, the crystal part may be amorphized in the impurity-added region. Therefore, in CAAC-OS, by setting the concentration of impurities, typically silicon, carbon, etc., to 2.5×10 or less, highly crystalline CAA 21 atoms / cm 3 C-OS can be formed.

[0296] <Localized levels of the CAAC-OS film> Here, the localized levels of the CAAC-OS film as an oxide semiconductor film will be described. Here is an explanation of the results of evaluating the CAAC-OS film by CPM (Constant photocurrent met hod) measurement.

[0297] First, the structure of the sample measured by CPM will be described.

[0298] The measurement sample has a CAAC-OS film provided on a glass substrate, a pair of electrodes in contact with the CAAC-OS film, and an insulating film covering the CAAC-OS film and the pair of electrodes.

[0299] Next, the method for forming the CAAC-OS film included in the measurement sample will be described.

[0300] A metal oxide target that is In-Ga-Zn oxide (In:Ga:Zn = 1:1:1 [atomic ratio]) was used, and argon gas was used as the film-forming gas at 30 sccm and oxygen gas at 15 s ccm. The pressure was set to 0.4 Pa, the substrate temperature was set to 400 °C, and a DC power of 0.5 kW was applied. The CAAC-OS film was formed by sputtering under these conditions. Next, after heating in a nitrogen atmosphere at 45 0 °C for 1 hour, it was heated in an oxygen atmosphere at 450 °C for 1 hour to remove hydrogen contained in the CAA C-OS film and supply oxygen to the CAAC-OS film. ​ was performed.

[0301] Next, CPM measurement was performed on the measurement sample having the CAAC-OS film. Specifically, while applying a voltage between the first electrode and the second electrode provided in contact with the CAAC-OS film, the amount of light irradiated onto the measurement sample surface between the terminals was adjusted so that the photocurrent value became constant, and the absorption coefficient was derived from the irradiated light amount within a desired wavelength range.

[0302] The absorption coefficient excluding the absorption coefficient due to the band tail was removed from the absorption coefficient obtained by CPM measurement of each measurement sample, that is, the absorption coefficient due to defects is shown in Fig. 31. In Fig. 31, the horizontal axis represents the absorption coefficient, and the vertical axis represents the light energy. Note that on the vertical axis of Fig. 31, the lower end of the conduction band of the CAAC-OS film is set to 0 eV, and the upper end of the valence band is set to 3.15 eV. Also, in Fig. 31, each curve is a curve showing the relationship between the absorption coefficient and the light energy, corresponding to the defect level .

[0303] In the curve shown in Fig. 31, the absorption coefficient due to the defect level was 5.86×10 -4 cm -1 . That is, the CAAC-OS film has an absorption coefficient due to the defect level of less than 1×10 -3 / cm, preferably less than 1×10 / cm, and is a film with a low defect level density. -4 / cm, and is a film with a low defect level density.

[0304] In addition, for the CAAC-OS film, measurement of the film density was performed using the X-ray reflectivity method (XRR). The film density of the CAAC-OS film was 6.3 g / cm 3 . That is, the CAAC-OS film is a film with a high film density.

[0305] <Observation results of the electron diffraction pattern of the CAAC-OS film> Next, the results of observing the electron diffraction pattern of the CAAC-OS film will be described.

[0306] The CAAC-OS film used in this embodiment is an In-Ga-Zn oxide (In:Ga:Z A metal oxide target having an atomic ratio of n=1:1:1 and a deposition gas containing oxygen. The In-Ga-Zn oxide film was formed by sputtering using a SiO2 solution.

[0307] Figure 38 shows a cross-sectional TEM (Transmission Electron Microscopy) image of the CAAC-OS film. The microscopy (transmission electron microscope) image of the point in FIG. 38 is shown in FIG. 39. The electron diffraction patterns measured at points 1 to 4 are shown. .

[0308] The cross-sectional TEM image shown in Fig. 38 was taken using a transmission electron microscope (Hitachi High-Technologies Corporation, H- The image was taken using a 3000NAR 1000-2000 Hz microscope at an accelerating voltage of 300 kV and a magnification of 2 million times. The electron beam diffraction pattern shown in Figure 39 was obtained using a transmission electron microscope (Hitachi High-Technologies Corporation). The accelerating voltage was 200 kV and the beam diameter was about 1 nmφ. The electron diffraction pattern is for a beam diameter of about 50 nm. The electron diffraction method is sometimes called ultrafine electron diffraction. In this case, the measurement range by electron beam diffraction is 5 nmφ or more and 10 nmφ or less.

[0309] Point 1 (film surface side), point 2 (film center), and point 3 (film base side) shown in Figure 38 ) correspond to Figure 39(A), (B), and (C), respectively. The electron beam diameter is about 1 nmφ. The electron diffraction pattern for the sample 4 (whole film) is shown in FIG. 39(D). The electron beam diameter is approximately This is an electron beam diffraction pattern with a diameter of 50 nm.

[0310] The electron diffraction patterns of point 1 (film surface side) and point 2 (film center) are The formation of a pattern by bright spots can be seen, but at point 3 (on the film substrate side), The turn is broken. This is because the crystal state is different in the thickness direction of the CAAC-OS film. In addition, at point 4 (whole film), the spot (bright point) Since the formation of a pattern can be confirmed, the film as a whole is a CAAC-OS film, or , it can be said that the film includes a CAAC-OS film.

[0311] Figure 40 is an enlarged photograph of the vicinity of point 1 (film surface side) in Figure 38. Interlayer insulation A clear lattice image showing the orientation of the CAAO-OS film was confirmed up to the interface with the SiON film. It is possible.

[0312] 41(A) and (B) show the CAAC-OS film, which is different from the CAAC-OS film used in the cross-sectional TEM observation in FIG. The cross-sectional TEM photograph and X-ray diffraction spectrum of the CAAC-OS film are shown in Fig. 1. There are various forms, and a peak indicating a crystalline component is observed around 2θ=31° as shown in Figure 41(B). A appears. Note that this peak may not appear clearly.

[0313] In the region shown by the concentric circles in FIG. 41(A) on the CAAC-OS film, the electron beam diameter is set to 1 The results of electron beam diffraction were obtained for the following diameters: nmφ, 20 nmφ, 50 nmφ, and 70 nmφ. (A), (B), (C), and (D). When the electron beam diameter is 1 nmφ, Confirm the formation of a pattern with clear spots (bright points) as in 9(A) and (B). If the electron beam diameter is increased, the spot (bright point) becomes slightly unclear. From the diffraction pattern, it can be confirmed that the film as a whole is a CAAC-OS film, or It can be said that the film includes a CAAC-OS film.

[0314] 43(A) and (B) show the CAAC-OS film used in the cross-sectional TEM observation of FIG. 41(A). These are cross-sectional TEM photographs and X-ray diffraction spectra after annealing at 450°C.

[0315] In the region shown by the concentric circles in FIG. 43(A) on the CAAC-OS film, the electron beam diameter is set to 1 The results of electron beam diffraction for the following diameters are shown in Fig. 44: (A), (B), (C), and (D). As in the results shown in Fig. 42, the electron beam At a diameter of 1 nm, the formation of a pattern consisting of clear spots (bright points) is confirmed. Also, when the electron beam diameter is increased, the spot (bright point) becomes slightly unclear. However, the diffraction pattern can be confirmed, and the film as a whole is a CAAC-OS film. Or, it can be said that the film includes a CAAC-OS film.

[0316] 45(A) and (B) show the CAAC-OS film used in the cross-sectional TEM photograph of FIG. The CAAC-OS film used in the cross-sectional TEM observation in FIG. The cross-sectional TEM photograph and X-ray diffraction spectrum are shown. CAAC-OS films have various morphologies. As shown in Fig. 45(B), peak A, which indicates a crystalline component, appears near 2θ = 31°. Peak B, which is derived from the spinel crystal structure, may also appear.

[0317] In the region indicated by concentric circles in the CAAC-OS film of FIG. 45(A), the beam diameter of the electron beam was set to 1 nmφ, 20nmφ, 50nmφ, 90nmφ, and electron beam diffraction was performed. The results are shown in FIGS. 46 (A), (B), (C), and (D). When the beam diameter of the electron beam is 1nmφ, a pattern formed by distinct spots (bright spots) can be confirmed. Also, as the beam diameter of the electron beam is increased, the spots (bright spots) become slightly less distinct, but the diffraction pattern can still be confirmed. Moreover, at a beam diameter of 90nmφ, clearer spots (bright spots) can be confirmed. Therefore, it can be said that the entire film is a CAAC-OS film or a film containing a CAAC -OS film.

[0318] <Fabrication method of CAAC-OS> The c-axis of the crystal part included in CAAC-OS aligns in a direction parallel to the normal vector of the formation surface of CAAC-OS or the normal vector of the surface. Therefore, depending on the shape of CAAC-OS (the cross-sectional shape of the formation surface or the cross-sectional shape of the surface), they may face different directions. The crystal part is formed by film formation or by performing a crystallization treatment such as heat treatment after film formation.

[0319] Three methods can be cited as the formation method of CAAC-OS.

[0320] The first method is to form an oxide semiconductor film with a film formation temperature of 100°C or higher and 450°C or lower, so that the c-axis of the crystal part included in the oxide semiconductor film forms crystal parts aligned in a direction parallel to the normal vector of the formation surface or the normal vector of the surface.

[0321] The second method is to form an oxide semiconductor film with a thin thickness and then heat it at 200°C or higher and 700°C or lower​​​​ By performing heat treatment, the c-axis of a crystal part included in the oxide semiconductor film is aligned along the normal vector of the formation surface. This is a method for forming crystals that are aligned in a direction parallel to the normal vector of the crystal or surface.

[0322] The third method is to form a thin oxide semiconductor film as a first layer, and then heat the film at 200° C. or higher for 700 Heat treatment at 0.4 °C or less is performed, and then a second oxide semiconductor film is formed. The c-axis of the crystal part contained in the conductive film is aligned with the normal vector of the surface on which it is formed or the normal vector of the surface. This is a method for forming crystal parts that are aligned in parallel directions.

[0323] Note that the structure described in this embodiment mode may be appropriately combined with structures described in other embodiments. It can be used.

[0324] (Embodiment 7) In this embodiment, an oxide semiconductor included in the semiconductor device described in the above embodiment The light-transmitting conductive film will be described. 3, a light-transmitting conductive film 308c is formed simultaneously with an oxide semiconductor film and a nitride semiconductor film. The electrical conductivity of the film is increased by being in contact with the insulating film.

[0325] The oxide semiconductor film and the light-transmitting conductive film are formed of an oxide semiconductor film having a microcrystalline structure. Here, an oxide semiconductor film having a microcrystalline structure is referred to as a microcrystalline oxide semiconductor film.

[0326] In the TEM image of the microcrystalline oxide semiconductor film, crystal parts can be clearly seen. The crystal parts contained in the microcrystalline oxide semiconductor film may have a size of 1 nm or more and 100 nm or more. In particular, the size of the particles is between 1 nm and 10 nm. Nanocrystals (nc) are microcrystals with a diameter of 1 to 3 nm or less. The oxide semiconductor film having nc-OS (nanocrystalline O The nc-OS film is called a T In EM images, grain boundaries may not be clearly visible.

[0327] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or less). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts, and therefore no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analysis method. For example, XRD, which uses X-rays with a diameter larger than that of the crystal part, is used for nc-OS films. When structural analysis is performed using the out-of-plane method, the crystal planes are In addition, the peaks shown in the figure are not detected in the nc-OS film because the probe diameter is larger than that in the crystalline region. Electron beam diffraction (also called selected area electron beam diffraction) using an electron beam of 50 nm or more (for example) When the diffraction pattern is changed to nc-OS film, a halo-like diffraction pattern is observed. Nano-beam electrons are used to measure the size of the crystals using an electron beam with a probe diameter close to or smaller than the size of the crystals. When sagittal beam diffraction was performed, spots were observed. When diffraction occurs, circular (ring-shaped) areas of high brightness may be observed. In addition, nanobeam electron diffraction of the nc-OS film revealed multiple spots in the ring-shaped region. Pots may be observed.

[0328] The nc-OS film is an oxide semiconductor film that has higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, the crystal orientation is not regular between different crystal parts. The OS film has a higher density of defect states than the CAAC-OS film.

[0329] <Localized states in microcrystalline oxide semiconductor films> Here, the localized states of a microcrystalline oxide semiconductor film will be described. The results of evaluating the semiconductor film by CPM measurement will be explained.

[0330] First, the structure of the measurement sample will be described.

[0331] The measurement sample was a microcrystalline oxide semiconductor film provided on a glass substrate and a a pair of electrodes in contact with the semiconductor film; and an insulating film covering the microcrystalline oxide semiconductor film and the pair of electrodes. do.

[0332] Next, a method for forming a microcrystalline oxide semiconductor film included in a measurement sample will be described.

[0333] Metal oxide, In-Ga-Zn oxide (In:Ga:Zn=1:1:1 [atomic ratio]) The deposition gas was argon gas at 30 sccm and oxygen gas at 15 s. ccm, the pressure was 0.4 Pa, the substrate temperature was room temperature, and a DC power of 0.5 kW was applied. A first microcrystalline oxide semiconductor film was formed by a sputtering method under the following conditions.

[0334] The first microcrystalline oxide semiconductor film was heated in a nitrogen atmosphere at 450° C. for 1 hour. The water contained in the first microcrystalline oxide semiconductor film was removed by heating the first microcrystalline oxide semiconductor film in an oxygen atmosphere at 50° C. for 1 hour. A process for removing hydrogen and a process for supplying oxygen to the first microcrystalline oxide semiconductor film are performed. A microcrystalline oxide semiconductor film was formed.

[0335] Next, a measurement sample having a first microcrystalline oxide semiconductor film and a measurement sample having a second microcrystalline oxide semiconductor film were The CPM measurement was performed on a measurement sample having a microcrystalline oxide semiconductor film. When a voltage is applied between a pair of electrodes in contact with each other, the photocurrent between the terminals is kept constant. The amount of light irradiated onto the measurement sample surface is adjusted, and the absorption coefficient is calculated from the amount of irradiated light in the desired wavelength range. Derived.

[0336] The absorption coefficients of each sample were measured using CPM, and the absorption coefficients due to the band tail were subtracted from the absorption coefficients. The absorption coefficients due to defects are shown in FIG. 32. In FIG. 32, the horizontal axis is the absorption The vertical axis represents the coefficient, and the vertical axis represents the light energy. The lower end of the conduction band of the conductor film is set to 0 eV, and the upper end of the valence band is set to 3.15 eV. In 2, each curve shows the relationship between the absorption coefficient and the light energy, and corresponds to a defect level. do.

[0337] FIG. 32A shows a measurement result of the measurement sample having the first microcrystalline oxide semiconductor film. The absorption coefficient due to the recession level is 5.28×10 -1 cm -1 FIG. 32(B) shows the second The absorption coefficient due to defect states is , 1.75×10 -2 cm -1 It was.

[0338] Therefore, defects in the microcrystalline oxide semiconductor film can be reduced by the heat treatment. do.

[0339] Regarding the first microcrystalline oxide semiconductor film and the second microcrystalline oxide semiconductor film, The film density was measured using XRR (X-ray Reflectometry). The film density of the first microcrystalline oxide semiconductor film was 5.9 g / cm 3 and the second microcrystal The film density of the oxide semiconductor film is 6.1 g / cm 3 It was.

[0340] Therefore, the film density of the microcrystalline oxide semiconductor film can be increased by the heat treatment.

[0341] That is, in a microcrystalline oxide semiconductor film, the higher the film density, the fewer defects are contained in the film. It can be seen that.

[0342] Here, the electron diffraction patterns of the microcrystalline oxide semiconductor film are shown in FIGS. The following provides an explanation of this.

[0343] The microcrystalline oxide semiconductor film was analyzed by electron diffraction (ultrafine electron diffraction) with a beam diameter of 10 nmφ or less. In the electron beam diffraction pattern using the diffractometer, a halo pattern indicating an amorphous state was observed, which was also Unlike the regular spots that indicate a crystalline state oriented on the same plane, the spots have no directionality. 1 is an oxide semiconductor film in which pots are observed.

[0344] FIG. 47A shows a cross-sectional TEM (Transmission El) image of a microcrystalline oxide semiconductor film. The transmission electron microscopy images are shown in FIG. B) shows the electron diffraction pattern measured by using a microelectron diffraction microscope at point 1 in Figure 47(A). The turn is shown in FIG. 47(C) by measuring the turn at point 2 in FIG. 47(A) using ultramicroelectron diffraction. The electron diffraction pattern measured at point 3 in Figure 47(A) is shown in Figure 47(D). Electron beam diffraction patterns measured using sagittal beam diffraction are shown.

[0345] In FIG. 47, an In-Ga-Zn oxide film is formed on a quartz glass substrate as an example of a microcrystalline oxide semiconductor film. The sample used was a microcrystalline oxide semiconductor film formed to a thickness of 50 nm on a glass substrate. The deposition conditions are as follows: Metal oxide target with In:Ga:Zn=1:1:1 (atomic ratio) Using this, under an oxygen atmosphere (flow rate 45sccm), pressure 0.4Pa, direct current (DC) power supply 0. The power supply was set to 5 kW and the substrate temperature was set to room temperature. The specimen is then sliced ​​into thin sections with a width of 40 nm ± 10 nm and subjected to cross-sectional TEM imaging and ultrafine electron diffraction. The electron diffraction pattern was obtained.

[0346] Figure 47(A) shows the results of a transmission electron microscope (Hitachi High-Technologies Corporation's H-9000NAR A microcrystalline oxide semiconductor photographed using a 300kV accelerating voltage and 2 million times magnification. 47(B) to 47(D) are cross-sectional TEM images of the film. Hitachi High-Technologies Corporation "HF-2000" was used, and the accelerating voltage was set to 200 kV and the beam The electron diffraction pattern was obtained by ultrafine electron diffraction with a diameter of about 1 nmφ. The measurement range of the ultrafine electron beam diffraction with a beam diameter of about 1 nmφ is 5 nmφ or more, 10 nmφ or less.

[0347] As shown in FIG. 47B, the microcrystalline oxide semiconductor film was In the diffraction pattern, multiple spots (bright spots) arranged in a circular pattern are observed. As a result, a number of spots distributed in a circumferential (concentric) shape were observed in the microcrystalline oxide semiconductor film. Alternatively, multiple spots distributed circumferentially form multiple concentric circles. It can also be said that.

[0348] In addition, in FIG. 47(D) which is in the vicinity of the interface with the quartz glass substrate, and in FIG. In the center of the film thickness direction in FIG. 47(C), multiple circumferentially distributed In Figure 47(C), the main spot is expanded to a circular spot. The distance at the surface was 3.88 / nm to 4.93 / nm. 0.03nm to 0.257nm.

[0349] The ultrafine electron diffraction pattern in FIG. 47 shows that the crystal plane orientation of the microcrystalline oxide semiconductor film is irregular. It can be seen that the film contains a mixture of crystal parts of different sizes.

[0350] Next, FIG. 48(A) shows a planar TEM image of the microcrystalline oxide semiconductor film. B) shows the electron diffraction pattern of the circled area in FIG. 48(A) measured by selected area electron diffraction. The sagittal diffraction pattern is shown.

[0351] In FIG. 48, an In-Ga-Zn oxide film is formed on a quartz glass substrate as an example of a microcrystalline oxide semiconductor film. A sample was used in which a microcrystalline oxide semiconductor film was formed on a glass substrate with a thickness of 30 nm. The deposition conditions are as follows: Metal oxide target with In:Ga:Zn=1:1:1 (atomic ratio) Using this, under an oxygen atmosphere (flow rate 45sccm), pressure 0.4Pa, direct current (DC) power supply 0. The power was set to 5 kW and the substrate temperature was set to room temperature. TEM images and electron diffraction patterns were obtained.

[0352] Figure 48(A) shows a transmission electron microscope (Hitachi High-Technologies Corporation's "H-9000NAR A microcrystalline oxide semiconductor film photographed using a 300 kV accelerating voltage and 500,000 times magnification. FIG. 48(B) shows a planar TEM image of the electron beam with a selected field of view of 300 nmφ. The electron diffraction pattern was obtained by electron beam diffraction. The fixed range is 300 nmφ or more.

[0353] As shown in FIG. 48B, in the microcrystalline oxide semiconductor film, the measurement range is larger than that of the ultrafine electron beam diffraction. In the electron diffraction pattern using the selected area electron diffraction with a wide range, The observed multiple spots are absent and a halo pattern is observed.

[0354] Next, FIG. 49 shows an outline of the distribution of diffraction intensity in the electron beam diffraction patterns of FIG. 47 and FIG. FIG. 49(A) shows the ultrafine electron beam diffraction patterns shown in FIG. 47(B) to FIG. 47(D). FIG. 49(B) is a conceptual diagram of the distribution of diffraction intensity in the beam. FIG. 49( C) is the concept of the distribution of diffraction intensities in the electron diffraction pattern of a single crystal or polycrystalline structure. FIG.

[0355] In FIG. 49, the vertical axis represents the electron beam diffraction intensity (arbitrary unit) that shows the distribution of each spot, and the horizontal axis represents the The axis indicates the distance from the main spot.

[0356] In the single crystal structure or polycrystalline structure shown in FIG. 49(C), the plane in which the crystal part is oriented The spots are found at a specific distance from the main spot depending on the spacing (d value).

[0357] On the other hand, as shown in FIG. 47, the electron diffraction pattern of the microcrystalline oxide semiconductor film The circumferential area formed by the multiple spots has a relatively large width. 49(A) shows a discrete distribution. Also, in the electron microbeam diffraction pattern, It can be seen that there are areas of high brightness between the circular areas, although they are not clearly visible spots. .

[0358] In addition, as shown in FIG. 49(B), a selected area electron diffraction pattern of the microcrystalline oxide semiconductor film was The electron beam diffraction intensity distribution in the figure shows a continuous intensity distribution. The electron beam diffraction intensity distribution shown in A) can be approximated by the results of observing the intensity over a wide area. It can be considered that the pots overlap and connect to each other, resulting in a continuous intensity distribution.

[0359] As shown in FIGS. 49A to 49C, the microcrystalline oxide semiconductor film has an irregular crystal plane orientation. The film has a plurality of crystal parts of different sizes, and the crystal parts are controlled by the The particles are so fine that no spots are observed in the limited-field electron diffraction pattern. is suggested.

[0360] In FIG. 47 where a plurality of spots are observed, the microcrystalline oxide semiconductor film is 50 nm or less. The electron beam diameter is focused to 1 nmφ, so the measurement range is The range is from 5 nm to 10 nm. , 50 nm or less, for example, 10 nm or less, or 5 nm or less. do.

[0361] Here, FIG. 50 shows the electron microbeam diffraction pattern on the quartz glass substrate. Measurement conditions The electron beam diffraction patterns were the same as those shown in Figures 47(B) to 47(D).

[0362] As shown in FIG. 50, the quartz glass substrate having an amorphous structure has a main A halo pattern with a continuously changing brightness is observed from the spot. In the case of a film having such a structure, even if electron beam diffraction is performed on a very small area, it is possible to identify a microcrystalline oxide. A plurality of circularly distributed spots, as observed in the case of a semiconductor film, are not observed. The multiple spots distributed circumferentially as seen in Figures 47(B) to 47(D) are microcrystals. It is confirmed that this is unique to the oxide semiconductor film.

[0363] FIG. 51 shows the electric field generated by converging the beam diameter to about 1 nmφ at point 2 shown in FIG. 47(A). The electron diffraction pattern was measured after irradiation with a sagittal beam for 1 minute.

[0364] The electron diffraction pattern shown in FIG. 51 is similar to the electron diffraction pattern shown in FIG. Multiple spots distributed in a circular pattern were observed, and no significant differences were found between the two measurement results. This is because the crystalline portion confirmed in the electron diffraction pattern in FIG. 47(C) is a microcrystalline portion. This means that the oxide semiconductor film is present from the time of film formation, and it is not irradiated with a focused electron beam. This means that no crystal parts are formed.

[0365] Next, FIG. 52 shows a partially enlarged view of the cross-sectional TEM image shown in FIG. 47(A). 47A (the surface of the microcrystalline oxide semiconductor film) at a magnification of 8,000,000 times. The cross-sectional TEM image was also observed. Figure 52(B) shows the vicinity of point 2 in Figure 47(A) ( A cross-sectional TEM image of the center of the microcrystalline oxide semiconductor film in the thickness direction at 8 million times magnification. be.

[0366] The cross-sectional TEM image shown in FIG. 52 does not clearly show the crystal structure of the microcrystalline oxide semiconductor film. Cannot be confirmed.

[0367] In addition, the microcrystalline acid of the present embodiment was formed on the quartz glass substrate used for the observation of FIGS. The sample on which the semiconductor film was formed was analyzed by X-ray diffraction (XRD). n) was used for the analysis. Figure 53 shows the XRD spectrum using the out-of-plane method. The measurement results are shown below.

[0368] In FIG. 53, the vertical axis represents the X-ray diffraction intensity (arbitrary unit), and the horizontal axis represents the diffraction angle 2θ (deg The XRD spectrum was measured using a Bruker AXS X-ray diffractometer. D-8 ADVANCE was used.

[0369] As shown in FIG. 53, a peak due to quartz is observed in the vicinity of 2θ=20 to 23°. However, no peak due to a crystal part contained in the microcrystalline oxide semiconductor film can be confirmed.

[0370] As can be seen from the results of FIGS. 52 and 53, the crystal parts included in the microcrystalline oxide semiconductor film are extremely fine. This suggests that it is a crystalline part.

[0371] As described above, in the microcrystalline oxide semiconductor film of this embodiment, X-ray diffraction with a wide measurement range is Analysis by XRD (X-ray diffraction) showed peaks indicating orientation. Electron diffraction patterns obtained by selected area electron diffraction with a wide measurement range A halo pattern is observed in the microcrystalline oxide semiconductor film of this embodiment. Macroscopically, it can be said that the structure of the atoms is disordered. The beam diameter is small enough (for example, 10 nm or less) to allow for the electron diffraction By measuring the crystalline oxide semiconductor film, the obtained electron microbeam diffraction pattern shows a spot ( Therefore, the microcrystalline oxide semiconductor film of this embodiment has a planar structure. Irregular extremely fine crystal parts (for example, grain size is 10 nm or less, or 5 nm or less, or 3 It can be assumed that the film is formed by the aggregation of extremely fine crystals (nanometer-sized crystals or less). The microcrystalline region is included in the entire region of the microcrystalline oxide semiconductor film in the thickness direction.

[0372] Here, oxide semiconductors (referred to as OS) and silicon semiconductors (Si The comparison of the two is shown in Table 1.

[0373] [Table 1]

[0374] The crystalline state of the oxide semiconductor can be, for example, an amorphous oxide semiconductor (a- OS, a-OS:H), microcrystalline oxide semiconductors (nc-OS, μc-OS), polycrystalline oxide Semiconductor (polycrystalline OS), Continuous-Atom Crystal Oxide Semiconductor (CAAC-OS), Single-Crystal Oxide Semiconductor (single crystal OS) and others. The crystal state of silicon can be classified into the following types, as shown in Table 1. , amorphous silicon (a-Si and a-Si:H), microcrystalline silicon (nc-Si, μc-S i), polycrystalline silicon (polycrystalline Si), continuous crystal silicon (CG (Continuous Examples include single grain silicon, and single crystal silicon (single crystal Si).

[0375] For oxide semiconductors in each crystal state, the electron beam diameter was focused to 10 nmφ or less. When electron beam diffraction (ultrafine electron beam diffraction) is performed using a ray, the following electron beam diffraction pattern ( In amorphous oxide semiconductors, a halo pattern ( This phenomenon is also called rolling or halo.) is observed. In the case of polycrystalline oxide semiconductor, spots and / or ring patterns are observed. In the case of a continuous crystal oxide semiconductor, spots are observed. In the case of a single crystal oxide semiconductor, spots are observed.

[0376] In addition, the ultrafine electron diffraction pattern shows that the crystal part of the microcrystalline oxide semiconductor is nanometer ( The diameter of the polycrystalline oxide semiconductor is in the range of nm to micrometers (μm). It can be seen that there are grain boundaries between the crystal parts, and the crystal parts are discontinuous. It can be seen that in the solid semiconductor, no grain boundaries are observed between the crystalline portions, and the crystalline portions are continuously connected.

[0377] The density of an oxide semiconductor in each crystalline state will be described. The density of the microcrystalline oxide semiconductor is low. The density of the continuous crystalline oxide semiconductor is medium. That is, the density of the continuous crystal oxide semiconductor is higher than that of the microcrystalline oxide semiconductor. The density of the amorphous semiconductor is higher than that of the amorphous oxide semiconductor.

[0378] The characteristics of DOS present in oxide semiconductors in each crystalline state are explained below. Conductors have a high DOS. Microcrystalline oxide semiconductors have a slightly lower DOS. Continuous crystalline oxide semiconductors The DOS is low. Single-crystal oxide semiconductors have an extremely low DOS. The DOS is lower than that of continuous crystal oxide semiconductors, and the DOS of continuous crystal oxide semiconductors is lower than that of microcrystalline oxide semiconductors. The DOS of a microcrystalline oxide semiconductor is lower than that of an amorphous oxide semiconductor.

[0379] (Embodiment 8) In this embodiment, the metal film, the oxide semiconductor film, and the inorganic insulating film disclosed in the above embodiment are An example of a method for forming the above will be described.

[0380] Various films such as metal films, oxide semiconductor films, and inorganic insulating films disclosed in the above embodiments can be used. It can be formed by sputtering or plasma CVD, but other methods, such as thermal CV It may be formed by a Chemical Vapor Deposition (D) method. As an example of thermal CVD, MOCVD (Metal Organic Chemical Vapor Deposition) is apor deposition method and ALD (Atomic Layer Deposition) method ition) method may also be used.

[0381] Thermal CVD is a film formation method that does not use plasma, so defects can occur due to plasma damage. This has the advantage that no additional steps are required.

[0382] In the thermal CVD method, the pressure in the chamber is set to atmospheric pressure or reduced pressure, and the source gas and the oxidizing agent are simultaneously The reaction is carried out in the chamber near or on the substrate, where it is deposited on the substrate to form a film. You may go.

[0383] In addition, in the ALD method, the pressure inside the chamber is set at atmospheric pressure or reduced pressure, and the source gas for the reaction is The gases may be introduced into the chamber in sequence, and the film may be formed by repeating the gas introduction sequence. For example, by switching each switching valve (also called high-speed valve), two or more types of The above source gases are supplied to the chamber in order, and the first source gas is supplied to the chamber in order to prevent the mixture of the source gases. An inert gas (such as argon or nitrogen) is introduced simultaneously with or after the raw material gas. The second source gas is introduced. When an inert gas is introduced at the same time, the inert gas is It acts as a carrier gas, and even if an inert gas is introduced at the same time as the second source gas is introduced, In addition, the first source gas is discharged by evacuation instead of introducing an inert gas. After that, a second source gas may be introduced. The first source gas is adsorbed on the surface of the substrate to form a first unit. The atomic layer is deposited, and reacts with the second source gas introduced later, and the second monoatomic layer is formed on the first The order of gas introduction is controlled to obtain a thin film of the desired thickness. By repeating the process several times until the desired thickness is reached, a thin film with excellent step coverage can be formed. The thickness of the film can be adjusted by changing the number of times the gas introduction sequence is repeated, so a precise film thickness can be achieved. This allows for adjustment and is suitable for fabricating miniaturized FETs.

[0384] Thermal CVD methods such as MOCVD and ALD have been disclosed in the embodiments described above. It is possible to form various films such as metal films, oxide semiconductor films, and inorganic insulating films. nGaZnO X When forming a (X>0) film, trimethylindium, trimethylgas The chemical formula for trimethylindium is In(C The chemical formula for trimethylgallium is Ga(CH3)3. The chemical formula for dimethylzinc is Zn(CH3)2. Instead of trimethylgallium, triethylgallium (chemical formula Ga(C2H5)3) was used. Alternatively, diethylzinc (chemical formula Zn(C2H5)2) can be used instead of dimethylzinc. can also be used.

[0385] For example, when forming a hafnium oxide film using a film forming apparatus that uses ALD, the solvent and a liquid containing a hafnium precursor compound (hafnium alkoxide solution, typically tetra The raw material gas is vaporized with tetramethyl tert-butyl amide hafnium (TDMAH) as an oxidizing agent. Two types of gases are used: tetrakisdimethylamidohafnium (TDA) and ozone (O3). The chemical formula is Hf[N(CH3)2]4. Other material liquids include tetrakis(ethoxycarbonyl) (ethylmethylamido) hafnium.

[0386] For example, when forming an aluminum oxide film using an ALD deposition system, A liquid containing a catalyst and an aluminum precursor compound (e.g., trimethylaluminum (TMA)) is added. Two types of gases are used: vaporized source gas and H2O as an oxidizing agent. The chemical formula for aluminum is Al(CH3)3. Other liquid materials include Tris( Dimethylamido)aluminum, triisobutylaluminum, aluminum tris(2 ,2,6,6-tetramethyl-3,5-heptanedionate).

[0387] For example, when forming a silicon oxide film using a deposition system that uses ALD, Chlorodisilane is adsorbed onto the surface to be coated, the chlorine contained in the adsorbed matter is removed, and the oxidizing gas (O 2. Nitrous oxide (NO) radicals are supplied to react with the adsorbed material.

[0388] For example, when forming a tungsten film using an ALD deposition system, WF6 The initial tungsten film was formed by repeatedly introducing B2H6 gas and WF 6 gas and H2 gas are introduced simultaneously to form a tungsten film. Alternatively, SiH4 gas may be used.

[0389] For example, an oxide semiconductor film, such as In-Ga-Zn- O X When forming a (X>0) film, In(CH3)3 gas and O3 gas are sequentially repeated. Then, Ga(CH3)3 gas and O3 gas are introduced simultaneously to form an InO2 layer. Then, Zn(CH3)2 gas and O3 gas were introduced simultaneously to form a GaO layer. The order of these layers is not limited to this example. In-Ga-O2 layers, In-Zn-O2 layers, Ga-In-O layers, Zn-In-O layers, A mixed compound layer such as Ga-Zn-O layer may be formed. Although H2O gas obtained by bubbling with an inert gas may be used, O3 It is preferable to use In(C2H5)3 gas instead of In(CH3)3 gas. Gas may be used. Also, Ga(C2H5)3 gas may be used instead of Ga(CH3)3 gas. Alternatively, In(C2H5)3 gas may be used instead of In(CH3)3 gas. Alternatively, Zn(CH3)2 gas may be used.

[0390] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do.

[0391] (Embodiment 9) In this embodiment, an example of an apparatus capable of forming and heating an oxide semiconductor will be described. This will be described with reference to FIGS. 22 to 24.

[0392] FIG. 22 is a block diagram illustrating the configuration of a film forming apparatus 2000 according to the present embodiment. do.

[0393] The film forming apparatus 2000 includes a load chamber 2101, a first film forming chamber 2111, a second film forming chamber 2112, and a 2, the first heating chamber 2121, the third film forming chamber 2113, the second heating chamber 2122, the fourth film forming The chamber 2114, the third heating chamber 2123, and the unloading chamber 2102 are connected in this order. Regarding each deposition chamber except for the load chamber 2101 and the unload chamber 2102 and each heating chamber, When there is no need to distinguish between them, they may be collectively referred to as a film formation chamber.

[0394] The substrate carried into the load chamber 2101 is transferred by a transfer means to the first film-forming chamber 2111, the second film-forming chamber 2112, the third film-forming chamber 2113, and the fourth film-forming chamber 2114. The second film forming chamber 2112, the first heating chamber 2121, the third film forming chamber 2113, the second heating chamber 21 22, the fourth film-forming chamber 2114, and the third heating chamber 2123, and then the unloading chamber The wafers are transported to the deposition chamber 2102. In each deposition chamber, it is not necessary to carry out any processing, and it is desirable to omit a process. In some cases, the substrate can be transported to the next film formation chamber without being processed.

[0395] The load chamber 2101 has a function of carrying a substrate into the film forming apparatus 2000 from outside the apparatus. The substrate is carried into the load chamber 2101 in a horizontal state, and then is aligned with respect to the horizontal surface in the load chamber 2101. The mechanism for vertically positioning the substrate is also provided. If the load chamber 2101 has a mechanism for vertically holding the substrate, the load chamber 2101 may be configured to vertically hold the substrate. In this embodiment, the horizontal state means that This also includes a range of -10° or more and 10° or less, preferably -5° or more and 5° or less. The vertical state is defined as an angle in the range of 80° to 100°, preferably 85° to 95°. The enclosure is also included.

[0396] The unload chamber 2102 has a mechanism for changing the substrate from a vertical position to a horizontal position. After the above, the substrate is transferred to the unload chamber 2102 by the transfer means. At 2, the substrate is changed from a vertical state to a horizontal state, and then the substrate is carried out of the equipment.

[0397] In addition, the inside of each of the load chamber 2101 and the unload chamber 2102 is evacuated. The device has an exhaust means and a gas introduction means for changing the pressure from a vacuum state to atmospheric pressure. The gas introduced from the gas supply source is air or an inert gas such as nitrogen or a rare gas. Good.

[0398] The load chamber 2101 may also have a heating means for preheating the substrate. By preheating the substrate in parallel with the evacuation operation, impurities such as gases adsorbed on the substrate are eliminated. This is preferable because it can eliminate the harmful substances (including water, hydroxyl groups, etc.). For example, adsorption type pumps such as cryopumps, ion pumps, and titanium sublimation pumps It is advisable to use an air pump or a turbo molecular pump with a cold trap added.

[0399] The load chamber 2101, the unload chamber 2102, and each of the deposition chambers are connected by gate valves. Therefore, when the substrate is transferred to the next deposition chamber after processing, the gate The valve is opened and the substrate is carried in. This gate valve is necessary between the deposition chambers. In addition, each deposition chamber is provided with an exhaust means, a pressure adjusting means, a gas It has a gas introduction means, etc., and can always be kept under reduced pressure even when not being treated. Each deposition chamber is isolated by a gate valve to prevent contamination from other deposition chambers. It can be controlled.

[0400] The load chamber 2101, the unload chamber 2102, and the respective film forming chambers are It is not necessary to arrange them in a straight line. For example, a transfer chamber can be provided between adjacent deposition chambers. The transfer chamber 1 has a turntable and the like, and the substrates carried into the transfer chamber are The orientation of the circuit board can be rotated, allowing the circuit board path to be folded back.

[0401] Next, the first film formation chamber 2111, the second film formation chamber 2112, the third film formation chamber 2113, and the fourth film formation chamber The common configuration of the film formation chamber 2114 will be described below.

[0402] The first deposition chamber is provided with a sputtering device or a CVD device. The first film formation chamber, the third film formation chamber, and the fourth film formation chamber each include a sputtering device disposed therein.

[0403] The sputtering equipment used in the film formation chamber includes, for example, a microwave sputtering method, F plasma sputtering, AC sputtering, or DC sputtering Any sputtering device can be used.

[0404] Here, an example of a film formation chamber using a DC sputtering method will be described with reference to FIG. FIG. 23(A) is a schematic cross-sectional view of the film-forming chamber taken along a direction perpendicular to the direction of movement of the substrate. 23(B) is a schematic cross-sectional view of the film formation chamber in a horizontal direction relative to the substrate traveling direction, show.

[0405] The substrate 2100 has an angle between the film formation surface and the vertical direction of at least 1° to 30°, preferably. The substrate is fixed by the substrate support portion 2141 so that the angle is within 5° to 15°. The substrate support 2141 is fixed to a moving means 2143. The moving means 2143 moves the processing In order to prevent the substrate from moving during the process, the substrate support 2141 is fixed in place, and the substrate 2100 is also supported by the substrate support 2141. The load chamber 2101, the unload chamber 2102, and each deposition chamber can be moved. It also has a function of loading and unloading the substrate 2100.

[0406] In the film forming chamber 2150, a target 2151 and an adhesion prevention plate 2153 are arranged parallel to the substrate 2100. By arranging the target 2151 and the substrate 2100 in parallel, This allows the thickness of the sputtered film and the steps of the sputtered film to be controlled by the difference in the distance from the target. It is possible to eliminate variations in coverage for differences, etc.

[0407] The film forming chamber 2150 is provided with a substrate heating means 2 so as to be located behind the substrate support portion 2141. The substrate may be heated by the substrate heating means 2155 while the film is being formed. The substrate heating means 2155 may be, for example, a resistance heater or a lamp heater. In addition, the substrate heating means 2155 may be omitted if not necessary. This is also fine.

[0408] The film forming chamber 2150 has a pressure adjusting means 2157, and reduces the pressure in the film forming chamber 2150 to a desired level. The pressure adjusting means 2157 can be used as an exhaust device, for example, a cryostat. Adsorption type vacuum pumps such as pumps, ion pumps, and titanium sublimation pumps, or It is advisable to use a turbo molecular pump with a cold trap added.

[0409] Also, it has a gas introduction means 2159 for introducing a film forming gas etc. A gas containing oxygen added to the gas containing the fluorine component is introduced to form a film by reactive sputtering. In this way, an oxide film can be formed. The gas used is high-purity gas with reduced impurities such as hydrogen, water, and hydroxides. For example, oxygen, nitrogen, rare gas (typically argon), or a mixture of these gases can be used. It is possible to introduce the

[0410] In the deposition chamber 2150 having the pressure adjusting means 2157 and the gas introducing means 2159 as described above, Hydrogen molecules and compounds containing hydrogen such as water (H2O) are more preferable. Since the impurities contained in the film formed in the film forming chamber 2150 are removed together with the compounds containing the impurities, The concentration can be reduced.

[0411] The boundary between the film formation chamber 2150 and the adjacent room is partitioned by a gate valve 2161 . By isolating the room with the gate valve 2161, it becomes easier to exhaust impurities from the room. The membrane atmosphere can be kept clean. Furthermore, after the room is cleaned, the gate valve By opening 2161 and removing the substrate, contamination of the adjacent deposition chamber can be prevented. If not necessary, the gate valve 2161 may not be provided.

[0412] Next, the first heating chamber 2121, the second heating chamber 2122, and the third heating chamber 2123 Finally, the characteristics of each deposition chamber will be explained. We will explain about:

[0413] The first heating chamber 2121, the second heating chamber 2122, and the third heating chamber 2123 are Heat treatment can be performed on the substrate 100. The heating device may be a resistance heater, a lamp, Alternatively, it is advisable to provide a device that uses heated gas.

[0414] Figure 24 (A) and (B) show an example of a heating chamber using a heating device that uses a rod-shaped heater. Figure 24(A) shows a schematic cross-sectional view of the heating chamber in a direction perpendicular to the substrate travel direction. FIG. 24(B) shows a schematic cross-sectional view of the heating chamber in a horizontal direction relative to the traveling direction of the substrate. vinegar.

[0415] In the heating chamber 2170, similarly to the film forming chamber 2150, the substrate support 21 is moved by the moving means 2143. The substrate 2100 supported by 41 can be carried in and out.

[0416] A rod-shaped heater 2171 is disposed in the heating chamber 2170 so as to be parallel to the substrate 2100. FIG. 24(A) shows a schematic cross-sectional view of the heater. A resistance heater or a lamp heater can be used for 171. The lamp heater also includes those that use induction heating. The lamp preferably has a central wavelength in the infrared region. By arranging them in parallel, the distance between them can be made constant, allowing for uniform heating. In addition, it is preferable that the temperature of each of the rod-shaped heaters 2171 can be controlled individually. By setting the lower heater at a higher temperature than the upper heater, the substrate can be heated at a uniform temperature. Can be heated.

[0417] The configuration of the heating mechanism provided in the heating chamber 2170 is not limited to the above-mentioned mechanism, and may be, for example, A heating mechanism that uses a resistance heating element or the like to heat the device, or a medium such as a heated gas Heating mechanism that heats by thermal conduction or thermal radiation, such as GRTA (Gas Rapid Transformer). d Thermal Anneal), LRTA(Lamp Rapid Therma) Using RTA (Rapid Thermal Anneal) The LRTA can be used with halogen lamps, metal halide lamps, and xenon arc lamps. lamps, carbon arc lamps, high pressure sodium lamps, high pressure mercury lamps, etc. The material to be treated is heated by the radiation of light (electromagnetic waves) emitted from the The heat treatment is performed using an inert gas. This allows the processing time to be shortened, which is preferable for mass production.

[0418] In addition, the heating chamber 2170 has a protection plate 2173 between the heater 2171 and the substrate 2100. The protection plate 2173 is provided to protect the heater 2171 and the substrate 2100. The protective plate 2173 is not necessary, and can be made of, for example, quartz. If necessary, the configuration may be such that the above-mentioned is not provided.

[0419] The heating chamber 2170 is provided with a pressure adjusting means 2157 and a gas introduction means similar to those of the film forming chamber 2150. Therefore, the heating means 2159 is provided during and without the heating process. In addition, the hydrogen molecules and water (H2O ), etc. (more preferably together with compounds containing carbon atoms) are removed. Therefore, impurities contained in or adsorbed on the film, film interface, or film surface treated in the heating chamber are The concentration can be reduced.

[0420] In addition, the pressure adjusting means 2157 and the gas introducing means 2159 are used to adjust the pressure of the inert gas atmosphere, Heat treatment can be performed in an atmosphere containing oxygen. The inert gas atmosphere can be nitrogen, Or an atmosphere mainly composed of rare gas (helium, neon, argon, etc.), water, water It is preferable to use an atmosphere that does not contain any oxygen. For example, The purity of rare gases such as nitrogen, helium, neon, and argon is 6N (99.9999%) or more. Preferably, 7N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less) , preferably 0.1 ppm or less).

[0421] Next, an example of the configuration of each film formation chamber will be described.

[0422] In the first deposition chamber 2111, an oxide insulating film is deposited on a substrate. The apparatus is not particularly limited as long as it is either a PE-CVD apparatus or a PE-CVD apparatus. The films that can be deposited in the film chamber 2111 include a base layer for a transistor or a gate insulating layer. Any functional film may be used, for example, silicon oxide, silicon oxynitride, nitride, etc. Silicon oxide, aluminum oxide, gallium oxide, aluminum oxide nitride, aluminum oxide nitride Examples of the thin film include a single film of aluminum oxide, hafnium oxide, etc., and a mixed film of these.

[0423] For example, in the case of a sputtering device, the optimum target can be selected depending on the type of film to be used. In the case of a PE-CVD apparatus, the deposition gas is appropriately selected.

[0424] In the second film formation chamber 2112, an oxide film can be formed by sputtering. The oxide film formed here may be, for example, an oxide of zinc and gallium. Methods include microwave plasma sputtering, RF plasma sputtering, Either AC sputtering or DC sputtering can be used.

[0425] In the second film formation chamber 2112, the substrate is heated to 600° C. or less by the substrate heating means 2155. The film is formed while heating at a temperature of preferably 450° C. or less, more preferably 300° C. or less. is possible.

[0426] The first heating chamber 2121 can heat the substrate at a temperature of 200° C. or more and 700° C. or less. Furthermore, the pressure adjusting means 2157 and the gas introducing means 2159 adjust the atmosphere during the heat treatment. The atmosphere is set to, for example, 10 Pa to 1 atm, and the gas is heated in an oxygen atmosphere, a nitrogen atmosphere, or a mixture of oxygen and nitrogen. Heat treatment can be carried out in an atmosphere.

[0427] In the third deposition chamber 2113, an oxide semiconductor is deposited on the substrate 2100. The conductor is an oxide semiconductor that contains at least Zn, and the In-Ga-Zn oxide semiconductor Any of the oxide semiconductors described in the above embodiments can be formed on the insulating film or the like.

[0428] In addition, the temperature during film formation is increased to 200° C. or more and 600° C. or less by the substrate heating means 2155. Film formation can be performed while heating.

[0429] In the second heating chamber 2122, the substrate 2100 is heated to a temperature of 200° C. or more and 700° C. or less. Furthermore, the pressure adjusting means 2157 and the gas introducing means 2159 allow oxygen to be introduced. The atmosphere contains nitrogen and has extremely low levels of impurities such as hydrogen, water, and hydroxyl groups. The heat treatment can be performed at a pressure of 1 Pa or more and 1 atmosphere or less.

[0430] In the fourth film formation chamber 2114, similarly to the third film formation chamber 2113, an oxide semiconductor is formed on the substrate 2100. For example, an In-Ga-Zn oxide semiconductor target is used to form an In-Ga In addition, the substrate temperature can be set to 200°C or higher and 60°C or lower. Film formation can be performed while heating at temperatures below 0°C.

[0431] In the third heating chamber, the substrate 2100 is subjected to a heat treatment at a temperature of 200° C. or more and 700° C. or less. It is possible to do the following.

[0432] Furthermore, the heat treatment is carried out by the pressure adjusting means 2157 and the gas introducing means 2159. The reaction can be carried out in a nitrogen atmosphere, an oxygen atmosphere, or a mixed atmosphere of nitrogen and oxygen.

[0433] Heating is performed in the first heating chamber 2121, the second heating chamber 2122, and the third heating chamber 2123. The heating temperature is preferably set to a value that is suitable for mass production from the viewpoint of preventing distortion of the substrate or energy efficiency. The temperature is preferably 450° C. or lower, and more preferably 350° C. or lower.

[0434] The device configuration shown in this embodiment is consistent from the load chamber to each deposition chamber and unload chamber. This structure keeps the substrates from coming into contact with the atmosphere, and allows the substrates to be transported in a constantly reduced pressure environment. Therefore, it is possible to suppress the incorporation of impurities into the interface of the film formed using this device configuration. This makes it possible to form a film with an extremely good interface condition.

[0435] In this embodiment, the load chamber, the film-forming chamber, the heating chamber, and the unload chamber are all integrated. However, the present invention is not limited to this configuration. For example, a load chamber, a deposition chamber, an unload chamber, Equipment consisting of a deposition chamber (so-called deposition equipment), or equipment consisting of a load chamber, heating chamber, and unload chamber The above-mentioned devices (so-called heating devices) may be provided independently.

[0436] Note that this embodiment mode may be implemented in appropriate combination with other embodiment modes shown in this specification. This can be done.

[0437] (Embodiment 10) In this embodiment, a human body to which the semiconductor device of one embodiment of the present invention can be applied is The interface will be explained. In particular, the sensor that can detect the proximity or contact of the object to be detected will be described. A configuration example of a touch sensor will be described below.

[0438] Touch sensors include capacitive, resistive, surface elastic, infrared, and optical. Various methods can be used, such as the method.

[0439] Representative examples of capacitive touch sensors include surface capacitive touch sensors and projected capacitive touch sensors. In addition, the projected capacitive type has a self-driving function, which is mainly due to the difference in the driving method. There are capacitance type, mutual capacitance type, etc. Here, when using the mutual capacitance type, multiple points can be detected simultaneously. This is preferable because it enables multiple points to be detected (also called multi-touch).

[0440] Here, we will explain the touch sensor in detail, but in addition to this, cameras (infrared cameras The system detects the movement (gesture) of the object to be detected (e.g., finger or hand) and the user's gaze. Sensors that can detect point movements are used as a human interface. It is also possible.

[0441] <Example of sensor detection method> 25(A) and (B) are schematic diagrams showing the configuration of a mutual capacitance type touch sensor and input / output A touch sensor includes a pair of electrodes, and a capacitance is formed between the electrodes. An input voltage is input to one of the pair of electrodes. It is equipped with a detection circuit that detects the current (or the potential of the other electrode).

[0442] For example, as shown in FIG. 25(A), when a square wave is used as the input voltage waveform, the output voltage A waveform having a sharp peak is detected as a flow waveform.

[0443] As shown in FIG. 25(B), when a conductive object to be detected approaches or comes into contact with the capacitance, In this case, the capacitance between the electrodes decreases, and the output current value decreases accordingly.

[0444] In this way, the change in capacitance can be calculated using the change in output current (or potential) relative to the input voltage. By detecting the object, the proximity or contact of the object to be detected can be detected.

[0445] <Touch sensor configuration example> FIG. 25C shows a configuration example of a touch sensor having a plurality of capacitors arranged in a matrix. Shows.

[0446] The touch sensor is made up of a number of wirings extending in the X direction (horizontal direction of the paper) and The wiring has a plurality of wirings that intersect and extend in the Y direction (the vertical direction of the paper). A capacitance is formed in the

[0447] In addition, the wiring extending in the X direction is used to carry the input voltage or common potential (including the ground potential and reference potential). In addition, a detection circuit (for example , source meter, sense amplifier, etc.) are electrically connected, and the current (or is the electric potential).

[0448] The touch sensor is designed so that the input voltage is input in sequence to multiple wirings extending in the X direction. By scanning in the Y direction and detecting changes in the current (or potential) flowing through the wiring extending in the Y direction, This enables two-dimensional sensing of the object to be detected.

[0449] <Touch panel configuration example> Below, a configuration example of a touch panel including a display unit having a plurality of pixels and a touch sensor will be described. An example in which the touch panel is incorporated into an electronic device will be described.

[0450] FIG. 26(A) is a schematic cross-sectional view of an electronic device equipped with a touch panel.

[0451] The electronic device 3530 includes a housing 3531 and at least a touch panel 3532 disposed in the housing 3531. 532, a battery 3533, and a control unit 3534. The touch panel 3532 is also The control unit 3534 is electrically connected to the display unit via wiring 3535. The display of the image and the sensing operation of the touch sensor are controlled. Electrically connected to the control unit 3534 via wiring 3536 to supply power to the control unit 3534 It is possible.

[0452] The touch panel 3532 is provided so that its display surface side is exposed to the outside of the housing 3531. An image is displayed on the exposed surface of the touch panel 3532, and the touch panel 3532 detects the object that is touched or in close proximity to the object. The detector can detect a detection object.

[0453] 26B to 26E show configuration examples of a touch panel.

[0454] The touch panel 3532 shown in FIG. 26B includes a first substrate 3541 and a second substrate 354 A display panel 3540 having a display unit 3542 and a touch sensor 3544 are provided between the display panel 3540 and the touch sensor 3544. It includes a third substrate 3545 and a protection substrate 3546 .

[0455] The display panel 3540 may be a liquid crystal element, an organic EL (Electro Luminescence) It can be used in a variety of display devices, such as display devices using a Cence element and electronic paper. The touch panel 3532 may be configured with a backlight or polarizer depending on the configuration of the display panel 3540. A light plate or the like may be provided separately.

[0456] Since the object to be detected comes into contact with or is close to one surface of the protective substrate 3546, at least that surface It is preferable that the mechanical strength of the surface is increased. For example, the surface is strengthened by ion exchange or air cooling. The glass is physically or chemically treated to apply compressive stress to its surface. It can be used for a protective substrate 3546. Or, it can be used for a plastic substrate with a coated surface. A flexible substrate such as a plastic film may be used. A film may also be provided.

[0457] The touch sensor 3544 is provided on at least one surface of the third substrate 3545. Alternatively, a pair of electrodes constituting the touch sensor 3544 is formed on both sides of the third substrate 3545. In order to make the touch panel thinner, a flexible film may be used as the third substrate 3545. The touch sensor 3544 may be formed on a pair of substrates (including a film). A clamped configuration may also be used.

[0458] In FIG. 26B, a protection substrate 3546 and a third substrate having a touch sensor 3544 are Although the configuration shown is bonded with adhesive layer 3547, these are not necessarily bonded. In addition, the third substrate 3545 and the display panel 3540 may be bonded together by an adhesive layer. This may also be configured.

[0459] The touch panel 3532 shown in FIG. 26B is a display panel and a substrate having a touch sensor. The touch panel having such a configuration is called an external touch panel. This type of configuration allows the display panel and touch sensor to be By stacking these, the touch sensor function is realized on the display panel. This allows touch panels to be easily manufactured without any special manufacturing process. It can be manufactured.

[0460] The touch panel 3532 shown in FIG. 26C has a touch sensor 3544 on the second substrate 35. The touch panel having such a configuration is provided on the surface of the protection substrate 3546 of the touch panel 43. This can also be called an on-cell type touch panel. Since the number of sheets can be reduced, the touch panel can be made thinner and lighter.

[0461] In the touch panel 3532 shown in FIG. 26(D), a touch sensor 3544 is disposed on a protection substrate 354. With this configuration, the display panel and the touch panel are Since the sensors can be made separately, touch panels can be easily made. Furthermore, the number of substrates required can be reduced, making the touch panel thinner and lighter. This can be achieved.

[0462] The touch panel 3532 shown in FIG. 26(E) includes a touch sensor 3544. The touch panel having such a configuration is provided on the inner side of the pair of substrates of 40. This can also be called a cell-type touch panel. With this type of configuration, the number of substrates required is reduced. Since the number of touch panels can be reduced, the touch panel can be made thinner and lighter. The panel is a first substrate, for example, formed by transistors, wiring, electrodes, etc., provided in the display unit 3542. A circuit that functions as a touch sensor is fabricated on the plate 3541 or the second substrate 3543. In addition, when an optical touch sensor is used, a photoelectric conversion element is It may be configured to include the above.

[0463] <Example of in-cell touch panel configuration> The following describes the configuration of a touch panel in which a touch sensor is incorporated in a display unit having multiple pixels. Here, a liquid crystal element is used as a display element provided in a pixel. Here is an example.

[0464] FIG. 27A shows one of the pixel circuits provided in the display unit of the touch panel exemplified in this configuration example. FIG. 1 is an equivalent circuit diagram of a portion

[0465] One pixel has at least a transistor 3503 and a liquid crystal element 3504. A wiring 3501 is connected to the gate of the transistor 3503, and a wiring 3502 is connected to either the source or drain. 02 are electrically connected to each other.

[0466] The pixel circuit includes a plurality of wirings extending in the X direction (for example, wiring 3510_1, wiring 3510_2, _2) and a plurality of wirings (for example, wiring 3511) extending in the Y direction, which are mutually The electrodes are disposed so as to intersect with each other, and a capacitance is formed therebetween.

[0467] In addition, among the pixels provided in the pixel circuit, some adjacent pixels are The electrodes of the liquid crystal elements are electrically connected to each other to form one block. The lock is divided into island blocks (e.g., block 3515_1, block 3515_2) and , a linear block extending in the Y direction (e.g., block 3516) In addition, although FIG. 27 shows only a part of the pixel circuit, these two types of The blocks are arranged repeatedly in the X and Y directions.

[0468] The wiring 3510_1 (or 3510_2) extending in the X direction is arranged in an island-shaped block 351 5_1 (or block 3515_2). The wiring 3510_1 extending in the X direction is discontinuous along the X direction via a line-shaped block. The island-shaped blocks 3515_1 arranged in the Y direction are electrically connected to each other. The existing wiring 3511 is electrically connected to the line-shaped block 3516 .

[0469] FIG. 27B shows a plurality of wirings 3510 extending in the X direction and a plurality of wirings 3510 extending in the Y direction. FIG. 3 is an equivalent circuit diagram showing a connection configuration of the wiring 3511. An input voltage or a common potential can be input to the wiring 3 extending in the Y direction. A ground potential is input to each of the wirings 3511, or the wiring 3511 is electrically connected to the detection circuit. It is possible.

[0470] <Touch panel operation example> Hereinafter, the operation of the above-mentioned touch panel will be described with reference to FIG.

[0471] As shown in FIG. 28(A), one frame period is divided into a writing period and a detection period. The write period is a period during which image data is written to the pixels, and the wiring 3510 (gate line On the other hand, during the detection period, sensing is performed by the touch sensor. During this period, the wirings 3510 extending in the X direction are selected in sequence and an input voltage is input.

[0472] FIG. 28B is an equivalent circuit diagram during the writing period. A common potential is input to both the wiring 3510 extending in the Y direction and the wiring 3511 extending in the Y direction. can be.

[0473] FIG. 28(C) is an equivalent circuit diagram at a certain point in the detection period. Each of the wirings 3511 extending in the X direction is electrically connected to a detection circuit. Of the wiring 3510, the input voltage is input to the selected one, and the other A common potential is input.

[0474] In this way, the image writing period and the period for sensing by the touch sensor are separated. This prevents touch noise caused by pixel writing noise. The decrease in sensitivity of the sensor can be suppressed.

[0475] (Embodiment 11) The display device which is one embodiment of the present invention can be applied to various electronic devices. The equipment includes television equipment (also called television or television receiver), Computer monitors, digital cameras, digital video cameras, digital photo cameras, etc. Reme, mobile phone, portable game machine, portable information terminal, audio playback device, gaming machine (pachinko Examples of these electronic devices include game cabinets (game machines, slot machines, etc.). show.

[0476] FIG. 29A shows a mobile phone 9000. The mobile phone 9000 has a housing 90 The display device has two housings: a display panel 9032 and a housing 9031. The housing 9031 includes a display panel 9032, Speaker 9033, microphone 9034, pointing device 9036, camera The housing 9030 is provided with a lens 9037 for a camera, an external connection terminal 9038, and the like. , a solar cell 9040 for charging the portable information terminal, an external memory slot 9041, etc. The antenna is built into the housing 9031. By applying the display device shown in FIG. 9 to the display panel 9032, the display quality of the mobile phone can be improved. It is possible to do so.

[0477] The display panel 9032 is equipped with a touch panel. The multiple operation keys 9035 are indicated by dotted lines. It also includes a boost circuit to boost the input voltage to the voltage required by each circuit.

[0478] The display direction of the display panel 9032 changes appropriately depending on the usage mode. The camera lens 9037 is located on the same surface as the lens 9032, so video calls are possible. The speaker 9033 and the microphone 9034 are not limited to voice calls, but are also used for video calls. Furthermore, the housing 9030 and the housing 9031 can be slid to each other. As shown in Figure 29(A), the device can be folded from the unfolded state to the overlapped state, making it easy to carry. Suitable miniaturization is possible.

[0479] The external connection terminal 9038 can be connected to various cables such as AC adapters and USB cables. It is possible to charge the battery and to communicate data with a personal computer, etc. By inserting a recording medium into the external memory slot 9041, it is possible to store and transfer a larger amount of data. Cut.

[0480] FIG. 29(B) shows a television device 9100. A display unit 9103 is incorporated in a housing 9101, and an image is displayed on the display unit 9103. In this example, the housing 9101 is supported by a stand 9105. The configuration shown is as follows.

[0481] The television device 9100 can be operated using an operation switch provided on the housing 9101 or a separate remote control. This can be done by using a remote control operation device 9110. The channel and volume can be controlled by the 9109, and the display 9103 shows The remote control device 9110 can control the video. A display unit 9107 for displaying information output from the device 9110 may be provided.

[0482] A television device 9100 shown in FIG. 29(B) includes a receiver, a modem, and the like. The television device 9100 can receive general television broadcasts using a receiver. Furthermore, by connecting to a wired or wireless communication network via a modem, Either directional (from sender to receiver) or bidirectional (between sender and receiver, or between receivers, etc.) ) information communication is also possible.

[0483] The display device described in the above embodiment mode can be used for the display portions 9103 and 9107. This makes it possible to improve the display quality of the television device.

[0484] FIG. 29C shows a computer 9200. The computer 9200 includes a main body 9201, housing 9202, display unit 9203, keyboard 9204, external connection port 920 5, including pointing device 9206, etc.

[0485] The display device described in the above embodiment can be used for the display portion 9203. This can improve the display quality of the computer.

[0486] The display unit 9203 has a touch input function. 03 Touch the display buttons with your finger to operate the screen or input information. It can also communicate with other home appliances or control them, making the screen The control device may be a control device for controlling other home appliances by the operation. For example, By using the touch panel described in the embodiment, the display portion 9203 can have a touch input function. This can be done.

[0487] FIG. 30 shows a foldable tablet terminal 9600. FIG. 30 shows the tablet terminal in an open state. The tablet terminal 9600 includes a housing 9630, a display unit 9631a, a display unit 9631b, and a display unit 9631c. , display mode changeover switch 9634, power switch 9635, power saving mode changeover It has a switch 9636 and a fastener 9633 .

[0488] The display device described in the above embodiment can be used for the display portion 9631a and the display portion 9631b. Therefore, the display quality of the tablet terminal 9600 can be improved. do.

[0489] A part of the display unit 9631a can be used as a touch panel area 9632a. Data can be input by touching the operation key panel 9638. In the section 9631a, for example, half of the area has a display function only, and the other half The display area has a touch panel function, but is not limited to this. The entire area of ​​the touch panel 9631a may have a touch panel function. The entire surface of the display unit 9631a is used as a touch panel by displaying keyboard buttons. b can be used as a display screen.

[0490] In addition, in the display unit 9631b, as in the display unit 9631a, The part of the touch panel can be the area 9632b of the touch panel. Touch the area where the mode display switch button 9639 is displayed with your finger or a stylus. A keyboard button can be displayed on the display portion 9631b.

[0491] In addition, the touch panel area 9632a and the touch panel area 9632b are simultaneously You can also use touch input.

[0492] A display mode changeover switch 9634 is used to change the display orientation, such as portrait or landscape. You can switch between black and white and color display. The switch 9636 is a switch that is used when a light sensor built into the tablet terminal 9600 detects the light. The brightness of the display can be optimized according to the amount of external light when the tablet is in use. The 9600 is equipped with not only an optical sensor, but also sensors that detect tilt, such as a gyro and an acceleration sensor. Any other detection device may be incorporated.

[0493] FIG. 30 shows an example in which the display area of ​​the display portion 9631b is the same as that of the display portion 9631a. However, there is no particular limitation, and one size may be different from the other size. The quality may also be different. For example, one may be a display panel capable of displaying a higher resolution image than the other. This is also fine.

[0494] This embodiment mode may be implemented in appropriate combination with the configurations described in other embodiment modes and examples. It is possible to implement this. EXAMPLES

[0495] In this example, the resistance of the oxide semiconductor film and the multilayer film is measured using FIGS. He explains.

[0496] First, the structure of the sample will be described with reference to FIG.

[0497] FIG. 33A is a top view of Samples 1 to 4, and is a cross-sectional view taken along dashed line A1-A2. The top views of samples 1 to 4 are the same, and the cross-sectional views are the same. The cross-sectional views are different because the laminated structures of the two surfaces are different. A cross-sectional view of sample 1 is shown in FIG. 33(C), and a cross-sectional view of sample 3 and sample 4 is shown in FIG. 33(D). .

[0498] In the sample 1, an insulating film 1903 is formed on a glass substrate 1901, and an insulating film 1903 is formed on the insulating film 1903. An insulating film 1904 is formed, and an oxide semiconductor film 1905 is formed over the insulating film 1904. In addition, both ends of the oxide semiconductor film 1905 are covered with conductive films 1907 and 1909 which function as electrodes. The oxide semiconductor film 1905 and the conductive films 1907 and 1909 are covered with insulating films 1910 and 1911. The insulating films 1910 and 1911 are provided with openings 1913 and 1915. In the openings, conductive films 1907 and 1909 are exposed.

[0499] In the sample 2, an insulating film 1903 is formed on a glass substrate 1901, and an insulating film is formed on the insulating film 1903. An insulating film 1904 is formed, and an oxide semiconductor film 1905 is formed over the insulating film 1904. In addition, both ends of the oxide semiconductor film 1905 are covered with conductive films 1907 and 1909 which function as electrodes. The oxide semiconductor film 1905 and the conductive films 1907 and 1909 are covered with an insulating film 1911. The insulating film 1911 has openings 1917 and 1919. At the opening, the conductive films 1907 and 1909 are exposed.

[0500] In the samples 3 and 4, an insulating film 1903 is formed on a glass substrate 1901, and an insulating film 19 An insulating film 1904 is formed on the insulating film 1903, and a multilayer film 1906 is formed on the insulating film 1904. In addition, both ends of the multilayer film 1906 are covered with conductive films 1907 and 1909 that function as electrodes. The insulating film 1911 covers the conductive film 1906 and the conductive films 1907 and 1909. 11 has openings 1917 and 1919, The conductive films 1907 and 1909 are exposed.

[0501] In this manner, Samples 1 to 4 are each formed on the oxide semiconductor film 1905 or the multilayer film 1906. The structure of the insulating film in contact with the oxide semiconductor film 1905 is different from that of the insulating film in contact with the oxide semiconductor film 1905. In Sample 2, the oxide semiconductor film 1905 and the insulating film 1911 are in contact with each other. In Sample 3, In sample 4, the multilayer film 1906 and the insulating film 1911 are in contact with each other.

[0502] Next, the method for preparing each sample will be described.

[0503] First, a method for preparing Sample 1 will be described.

[0504] On a glass substrate 1901, an insulating film 1903 is formed by a plasma CVD method. A silicon nitride film with a thickness of nm was formed.

[0505] Next, on the insulating film 1903, an insulating film 1904 is formed by a plasma CVD method. A silicon oxynitride film having a thickness of nm was formed.

[0506] Next, a metal oxide target ( In:Ga:Zn=1:1:1) was used, and a 35 nm thick In- A Ga-Zn oxide film (hereinafter also referred to as an IGZO film) was formed. An etching process is performed using a mask formed by a roughening process, and the oxide semiconductor film 190 5 was formed.

[0507] Next, a thick insulating film 1904 and an oxide semiconductor film 1905 are formed by a sputtering method. A 50 nm thick tungsten film, a 400 nm thick aluminum film, and a 100 nm thick tungsten film were After laminating the titanium films in order, they are etched using a mask formed by a photolithography process. A conductive film 1907 and a conductive film 1909 were formed by performing a plating treatment.

[0508] Next, the insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 190 On the substrate 9, a silicon oxynitride film having a thickness of 450 nm is formed as an insulating film 1910 by a plasma CVD method. After the film was formed, it was heat-treated for 1 hour in a mixed atmosphere of nitrogen and oxygen at 350°C. .

[0509] Next, on the insulating film 1910, an insulating film 1911 is formed by a plasma CVD method. A silicon nitride film with a thickness of nm was formed.

[0510] Next, after providing a mask on the insulating film 1911 by a photolithography process, Then, an etching process is performed to form openings 1913 and 1914 in the insulating film 1910 and the insulating film 1911. 15 was formed.

[0511] Sample 1 was prepared by the above steps.

[0512] Next, a method for preparing Sample 2 will be described.

[0513] The insulating film 1903, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 19 On the insulating film 1910, a 450 nm thick oxide nitride silicon film is formed by plasma CVD. After the silicon film was formed, it was heat-treated for 1 hour in a mixed atmosphere of nitrogen and oxygen at 350°C. After that, the insulating film 1910 was removed.

[0514] Next, the insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 190 On the substrate 9, a silicon nitride film having a thickness of 50 nm is formed as an insulating film 1911 by a plasma CVD method. A film was formed.

[0515] Next, after providing a mask on the insulating film 1911 by a photolithography process, Then, an etching process was performed to form openings 1917 and 1919 in the insulating film 1911 .

[0516] Sample 2 was prepared by the above steps.

[0517] Next, a method for preparing Sample 3 will be described.

[0518] In Sample 3, a multilayer film 1906 was used instead of the oxide semiconductor film 1905 in Sample 2. The layer film 1906 is formed by depositing a metal oxide target (In:Ga:Zn = 1:3:2), a 10 nm thick IGZO film was formed by sputtering, followed by A metal oxide target (In:Ga:Zn=1:1:1) was used for the sputtering method. A 10 nm thick IGZO film was then deposited by a metal oxide target (In:Ga: Zn=1:3:2) and a 10 nm thick IGZO film was formed by sputtering. After that, an etching process was performed using a mask formed by a photolithography process. Thus, a multilayer film 1906 was formed.

[0519] Sample 3 was prepared by the above steps.

[0520] Next, a method for preparing Sample 4 will be described.

[0521] In Sample 4, a multilayer film 1906 was used instead of the oxide semiconductor film 1905 in Sample 2. The layer film 1906 is formed by depositing a metal oxide target (In:Ga:Zn = 1:3:2), a 20 nm thick IGZO film was formed by sputtering, followed by A metal oxide target (In:Ga:Zn=1:1:1) was used for the sputtering method. A 15 nm thick IGZO film was then deposited by a metal oxide target (In:Ga: Zn=1:3:2) and a 10 nm thick IGZO film was formed by sputtering. After that, an etching process was performed using a mask formed by a photolithography process. Thus, a separated multilayer film 1906 was formed.

[0522] Sample 4 was prepared by the above steps.

[0523] Next, the oxide semiconductor film 1905 and the multilayer film 1906 provided in Samples 1 to 4 were The sheet resistance was measured. In sample 1, the openings 1913 and 1915 were filled with a probe. The sheet resistance of the oxide semiconductor film 1905 was measured by contacting the oxide semiconductor film 1905 with a sintered body. In FIG. 4, a probe is brought into contact with the openings 1917 and 1919, and an oxide semiconductor The sheet resistance of the film 1905 and the multilayer film 1906 was measured. In the compound semiconductor film 1905 and the multilayer film 1906, the conductive film 1907 and the conductive film 190 The width of the opposing electrodes 9 was 1 mm, and the distance was 10 μm. The conductive film 1907 was at ground potential, and 1 V was applied to the conductive film 1909 .

[0524] The sheet resistances of Samples 1 to 4 are shown in FIG.

[0525] The sheet resistance of sample 1 is about 1×10 11 The sheet resistance of sample 2 was The sheet resistance of sample 3 was 4410 Ω / sq. The sheet resistance of Sample 4 was 2930 Ω / sq.

[0526] In this way, the difference in the insulating film in contact with the oxide semiconductor film 1905 and the multilayer film 1906 Therefore, the oxide semiconductor film 1905 and the multilayer film 1906 have different sheet resistances.

[0527] When the sheet resistances of the above-mentioned Samples 1 to 4 are converted into resistivities, Sample 1 has a resistivity of 3 .9×10 5 Ωcm, sample 2 is 9.3×10 -3 Ωcm, sample 3 is 1.3×10 -2 Ωcm, sample 4 is 1.3×10 -2 It was Ωcm.

[0528] Sample 1 is a silicon oxynitride film that is in contact with an oxide semiconductor film 1905 and is used as an insulating film 1910. The oxide semiconductor film 1905 is a silicon film formed on the nitride semiconductor film 1904. On the other hand, Samples 2 to 4 are not in contact with the oxide semiconductor film 1905 and A silicon nitride film used as an insulating film 1911 is formed on and in contact with the multilayer film 1906. In this manner, the oxide semiconductor film 1905 and the multilayer film 1906 are used as the insulating film 1911. When the oxide semiconductor film 1905 and the multilayer film 190 are provided in contact with the silicon nitride film used as the insulating film, 6, defects, typically oxygen vacancies, are formed, and hydrogen contained in the silicon nitride film is 1905 and the multilayer film 1906. The electrical conductivity of the multilayer film 905 and the multilayer film 1906 is improved.

[0529] For example, in the case where an oxide semiconductor film is used for a channel formation region of a transistor, It is preferable that a silicon oxynitride film is provided in contact with the oxide semiconductor film so as to form a As a light-transmitting conductive film used for an electrode of a quantum well element, an oxide film as shown in Samples 2 to 4 is used. It is preferable to provide a silicon nitride film in contact with the nitride semiconductor film or multilayer film. By using this structure, an oxide semiconductor film used for a channel formation region of a transistor can be formed. The oxide semiconductor film or multilayer film used for the electrode of the capacitor element is formed in the same process. The resistivity of the oxide semiconductor film and the multilayer film can be changed even when the oxide semiconductor film and the multilayer film are formed.

[0530] The configuration shown in this embodiment may be appropriately combined with the configurations shown in other embodiments or embodiments. It can be used. EXAMPLES

[0531] In this example, impurity analysis of an oxide semiconductor film and an insulating film formed over the oxide semiconductor film was performed. This will be explained with reference to FIG.

[0532] In this embodiment, two types of samples (hereinafter referred to as samples) were used for impurity analysis. 5, and sample 6) were prepared.

[0533] First, a method for preparing Sample 5 will be described below.

[0534] Sample 5 was made by forming an IGZO film on a glass substrate and then forming a silicon nitride film on it. After that, heat treatment was performed at 450°C for 1 hour in a nitrogen atmosphere, and then in a nitrogen and oxygen mixed gas atmosphere. Heat treatment was carried out at 450°C for 1 hour in an atmosphere (nitrogen = 80%, oxygen = 20%).

[0535] The conditions for forming the IGZO film were as follows: sputtering with a metal oxide target (In:Ga:Zn=1:1:1) was used, and Ar / O2=100 / 100sccm (O2 = 50%), pressure = 0.6 Pa, deposition power = 5000 W, substrate temperature = 170 °C. A 100 nm thick IGZO film was deposited.

[0536] The silicon nitride film was formed under the following conditions: SiH4 / N2 / N H3=50 / 5000 / 100sccm, pressure=100Pa, deposition power=1000W, A silicon nitride film was formed to a thickness of 100 nm under the condition of a plate temperature of 220°C.

[0537] Next, a method for preparing Sample 6 will be described below.

[0538] An IGZO film is formed on a glass substrate, and then a silicon oxynitride film and a silicon nitride film are formed. After that, a heat treatment was performed at 450°C for 1 hour in a nitrogen atmosphere, and then a nitrogen Heat treatment at 450℃ for 1 hour in a nitrogen and oxygen mixed gas atmosphere (nitrogen = 80%, oxygen = 20%) The theory was carried out.

[0539] The deposition conditions for the IGZO film and the silicon nitride film were the same as those for sample 5. The conditions for forming the silicon oxynitride film were as follows: SiH4 / N2O=30 / 4000sccm, pressure=40Pa, deposition power=150W, A silicon oxynitride film with a thickness of 50 nm was formed under the condition of a plate temperature of 220°C, and then PE -CVD method, SiH4 / N2O=160 / 4000sccm, pressure=200Pa, synthesis A silicon oxynitride film with a thickness of 400 nm was deposited under the conditions of a film power of 1500 W and a substrate temperature of 220°C. A film was formed.

[0540] The impurity analysis results of Samples 5 and 6 are shown in FIG.

[0541] The impurity analysis was carried out using secondary ion mass spectrometry (SIMS). Using Ion Mass Spectrometry, the particles were separated in the direction of the arrow shown in Figure 35. That is, the measurements were performed from the glass substrate side.

[0542] FIG. 35(A) shows the hydrogen (H) concentration profile obtained by measuring sample 5. FIG. 35(B) shows the hydrogen (H) concentration profile obtained by measuring sample 6. do.

[0543] From Figure 35(A), the hydrogen (H) concentration in the IGZO film is 1.0×10 20 atoms / c m 3 It can be seen that the hydrogen (H) concentration in the silicon nitride film is 1.0×10 2 3 atoms / cm 3 In addition, from Figure 35(B), the hydrogen in the IGZO film (H) Concentration is 5.0×10 19 atoms / cm 3 It can be seen that nitric oxide The hydrogen (H) concentration in the silicon oxide film is 3.0×10 21 atoms / cm 3 To be I understand.

[0544] Due to its measurement principle, SIMS analysis cannot measure the area near the sample surface or the layered boundary between films of different materials. It is known that it is difficult to obtain accurate data near the surface. When analyzing the distribution of hydrogen (H) in the thickness direction by SIMS, the area in which the target film exists is In the range, there is no extreme fluctuation, and the average value in the region where almost constant intensity is obtained is adopted. do.

[0545] In this way, by changing the composition of the insulating film in contact with the IGZO film, the water in the IGZO film Differences were confirmed in the concentration of iodine (H).

[0546] For example, when the above-mentioned IGZO film is used in the channel formation region of a transistor, Sample 6 As shown in FIG. 1, a silicon oxynitride film is preferably provided in contact with the IGZO film. As the transparent conductive film used for the electrodes of the quantum well, an IGZO film was used as shown in sample 5. It is preferable to provide a silicon nitride film in contact with the silicon nitride film. The IGZO film used for the channel formation region of the transistor and the IGZO film used for the electrodes of the capacitor element The hydrogen concentration in the IGZO film can be changed even when the O film is fabricated in the same process. EXAMPLES

[0547] In this example, the amount of defects in the oxide semiconductor film and the multilayer film was measured using FIGS. He explains.

[0548] First, the structure of the sample will be described.

[0549] Sample 7 is a 35 nm-thick oxide semiconductor film formed on a quartz substrate and an oxide semiconductor film and a 100 nm thick nitride insulating film formed thereon.

[0550] Samples 8 and 9 are a 30 nm thick multilayer film formed on a quartz substrate and a 30 nm thick multilayer film formed on the multilayer film. The multilayer film of Sample 8 has a thickness of 100 nm. A first oxide film having a thickness of 10 nm, an oxide semiconductor film having a thickness of 10 nm, and a second oxide film having a thickness of 10 nm. The sample 9 has a first oxide film with a thickness of 20 nm, a second oxide film with a thickness of 15 nm, and a third oxide film with a thickness of 20 nm. A first oxide semiconductor film having a thickness of 10 nm and a second oxide film having a thickness of 10 nm are stacked in this order. Sample 9 is different from Sample 7 in that a multilayer film is included instead of an oxide semiconductor film. .

[0551] Sample 10 is a 100 nm thick oxide semiconductor film formed on a quartz substrate and an oxide semiconductor A 250 nm thick oxide insulating film was formed on the solid film, and a 10 nm thick oxide insulating film was formed on the solid film. The sample 10 has a nitride insulating film with a thickness of 100 nm. The difference is that the film is not in contact with a nitride insulating film, but is in contact with an oxide insulating film.

[0552] Next, the method for preparing each sample will be described.

[0553] First, a method for preparing sample 7 will be described.

[0554] A 35 nm thick IGZO film was formed on a quartz substrate as an oxide semiconductor film. The film was formed by sputtering using a metal oxide target (In:Ga:Z n=1:1:1, Ar / O2=100sccm / 100sccm (O2=50%) ), pressure = 0.6 Pa, film formation power = 5000 W, and substrate temperature = 170°C.

[0555] Next, as the first heat treatment, a heat treatment was performed in a nitrogen atmosphere at 450° C. for 1 hour, and then Heating for 1 hour in a nitrogen and oxygen mixed gas atmosphere (nitrogen = 80%, oxygen = 20%) at 450℃ Processing was carried out.

[0556] Next, a silicon nitride film having a thickness of 100 nm is formed as a nitride insulating film on the oxide semiconductor film. The conditions for forming the silicon nitride film were SiH4 / N2 / NH 3=50 / 5000 / 100sccm, pressure=100Pa, deposition power=1000W, substrate The following conditions were used: temperature = 350°C.

[0557] Next, as a second heat treatment, heat treatment was performed at 250° C. in a nitrogen atmosphere for 1 hour.

[0558] Sample 7 was prepared by the above steps.

[0559] Next, a method for preparing Sample 8 will be described.

[0560] In Sample 8, a multilayer film was formed instead of the oxide semiconductor film of Sample 7. A metal oxide target (In:Ga:Zn=1: 3:2), Ar / O2=180 / 20sccm (O2=10%), pressure=0.6P a) A first oxide film having a thickness of 10 nm was formed under the conditions of a deposition power of 5000 W and a substrate temperature of 25°C. Next, a metal oxide target (In:Ga:Zn=1 :1:1), Ar / O2=100 / 100sccm (O2=50%), pressure=0. A 10 nm thick oxide semiconductor was deposited under the conditions of 6 Pa, deposition power = 5000 W, and substrate temperature = 170°C. Next, a metal oxide target (In:Ga:Z n=1:3:2), Ar / O2=180 / 20sccm (O2=10%), pressure= The second oxide film was deposited to a thickness of 10 nm under the conditions of 0.6 Pa, deposition power = 5000 W, and substrate temperature = 25°C. A nitride film was formed.

[0561] The other steps were the same as those of Sample 7. Sample 8 was formed by the above steps.

[0562] Next, a method for preparing Sample 9 will be described.

[0563] In Sample 9, a multilayer film was formed instead of the oxide semiconductor film of Sample 7. A first oxide film having a thickness of 20 nm was formed on a quartz substrate under the same conditions as those for the first oxide film shown in Sample 8. Next, an oxide film was formed by a sputtering method in the same manner as the oxide semiconductor film shown in Sample 8. A 15-nm-thick oxide semiconductor film was formed under the conditions described above. A second oxide film was deposited to a thickness of 10 nm using the same conditions as for the oxide film.

[0564] The other steps were the same as those of Sample 7. Sample 9 was formed by the above steps.

[0565] Next, a method for preparing the sample 10 will be described.

[0566] Sample 10 is a 100-nm-thick oxide semiconductor film formed on a quartz substrate under the same conditions as Sample 7. was formed.

[0567] Next, a first heat treatment was carried out under the same conditions as those for Sample 7.

[0568] Next, a first silicon oxynitride film having a thickness of 50 nm was formed as an oxide insulating film over the oxide semiconductor film. A silicon oxynitride film and a second silicon oxynitride film having a thickness of 200 nm were formed. D method, SiH4 / N2O=30 / 4000sccm, pressure=40Pa, deposition power=1 A first silicon oxynitride film was formed to a thickness of 50 nm under the conditions of 50 W and substrate temperature = 220 °C. Then, using the PE-CVD method, SiH4 / N2O=160 / 4000sccm, pressure = 200 Pa, deposition power = 1500 W, substrate temperature = 220 °C. A second silicon oxynitride film was formed. Note that the second silicon oxynitride film was formed in a stoichiometric manner. The film contains more oxygen than fills the composition.

[0569] Next, using the same conditions as for Sample 7, a silicon nitride film with a thickness of 100 nm was formed on the oxide insulating film. Formed.

[0570] Next, a second heat treatment was carried out using the same conditions as for Sample 7.

[0571] Through the above steps, sample 10 was formed.

[0572] Next, ESR measurements were performed on Samples 7 to 10. The ESR measurements were performed at a given temperature. From the magnetic field value (H0) at which microwave absorption occurs, the g value is calculated using the formula g=hv / βH0. The parameters obtained are as follows. Note that v is the microwave frequency. h is the Planck constant. and β is the Bohr magneton, both of which are constants.

[0573] Here, the ESR measurements were performed under the following conditions: The measurement temperature was room temperature (25°C), and the The 2GHz radio frequency power (microwave power) was set to 20mW, and the magnetic field direction was set to the same as that of the sample. The film surface was parallel to the

[0574] The primary spectra obtained by ESR measurement of the oxide semiconductor films and multilayer films included in Samples 7 to 9 The differential curves are shown in Figure 36. Figure 36(A) shows the measurement results for sample 7, and Figure 36(B) shows the FIG. 36(C) shows the measurement results for sample 9.

[0575] The first differential curve obtained by ESR measurement of the oxide semiconductor film included in sample 10 is shown in Figure 37. show.

[0576] In FIG. 36(A) to FIG. 36(C), sample 7 has a g value of 1.93, and the oxide A signal with symmetry due to defects in the semiconductor film was detected. Samples 8 and 9 At a g value of 1.95, a signal with symmetry due to defects in the oxide film was detected. The spin density at g-value 1.93 in sample 7 is 2.5×10 19 spins / cm 3 The sum of the spin densities for the g values ​​of 1.93 and 1.95 in sample 8 is 1. 6×10 19 spins / cm 3 The g values ​​for sample 9 were 1.93 and 1.95. The sum of the spin densities is 2.3×10 19 spins / cm 3 That is, oxide semiconductor It can be seen that the oxide semiconductor film and the multilayer film contain defects. An example of a defect is an oxygen vacancy.

[0577] 37, Sample 10 has a larger thickness of the oxide semiconductor film than Samples 7 to 9. Despite the thickness, no symmetrical signal due to defects was detected, i.e., below the detection limit. (Here, the detection limit is set to 3.7 × 10 16 spins / cm 3 (Let's assume that.) This shows that the amount of defects contained in the oxide semiconductor film cannot be detected.

[0578] The oxide semiconductor film or multilayer film is covered with a nitride insulating film, here a nitride insulating film formed by PE-CVD. When the silicon film comes into contact with the oxide semiconductor film or multilayer film, defects, typically oxygen vacancies, are formed. On the other hand, when an oxide insulating film, a silicon oxynitride film, is used for an oxide semiconductor film, When the silicon oxynitride film is provided with the oxygen content, the excess oxygen contained in the silicon oxynitride film, i.e., the oxygen content that satisfies the stoichiometric composition, Therefore, more oxygen diffuses into the oxide semiconductor film than in the case where the oxide semiconductor film is heated. Therefore, defects in the oxide semiconductor film are not increased.

[0579] For the above reasons, as shown in Samples 7 to 9, the oxide semiconductor film in contact with the nitride insulating film Alternatively, the multilayer film has many defects, typically oxygen vacancies, and is highly conductive, so the electrodes of the capacitance element On the other hand, as shown in Sample 10, the oxide semiconductor in contact with the oxide insulating film Conductive films or multilayer films have a small amount of oxygen vacancies and are less conductive, so they are ideal for transistor channels. It can be used as a hole formation region.

Claims

[Claim 1] A gate insulating film; an oxide semiconductor film on the gate insulating film; a gate electrode that partially overlaps with the oxide semiconductor film via the gate insulating film; a transistor including a pair of electrodes in contact with the oxide semiconductor film; a first light-transmitting conductive film on the gate insulating film; a dielectric film on the first light-transmitting conductive film; a capacitor element including a second light-transmitting conductive film on the dielectric film; an oxide insulating film on a pair of electrodes of the transistor; a nitride insulating film on the oxide insulating film, the dielectric film included in the capacitance element is the nitride insulating film, the oxide insulating film has a first opening over one of the pair of electrodes and over the first light-transmitting conductive film, the nitride insulating film has a second opening on one of the pair of electrodes, The second opening is provided inside the first opening, the second light-transmitting conductive film included in the capacitor is connected to one of a pair of electrodes included in the transistor in a second opening portion over the pair of electrodes.

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