Semiconductor device

Abstract

To reduce oxygen vacancies existing in an oxide semiconductor film and in the vicinity of the oxide semiconductor film and to improve electric characteristics of a transistor using the oxide semiconductor film.SOLUTION: A semiconductor device uses a gate electrode whose Gibbs free energy for oxidation reaction is higher than that of a gate insulating film. In a region where the gate electrode is in contact with the gate insulating film, oxygen moves from the gate electrode to the gate insulating film because the gate electrode has higher Gibbs free energy for oxidation reaction than that of the gate insulating film. The oxygen passes through the gate insulating film and is supplied to the oxide semiconductor film disposed in contact with the gate insulating film, thereby realizing reduction of oxygen vacancies in the oxide semiconductor film and in the vicinity of the oxide semiconductor film.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device and a manufacturing method thereof.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally speaking, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. [Background technology]

[0003] A technology for constructing transistors using a semiconductor film formed on a substrate with an insulating surface is The transistor is being used in devices such as integrated circuits (ICs) and image display devices (display devices). Silicon is widely used in semiconductor devices. Although oxide-based semiconductor films have been known, oxide-based semiconductor films have been attracting attention in recent years.

[0004] For example, if the electron carrier concentration is 10 18 / cm 3 Indium, gallium and zinc A transistor using an amorphous oxide film containing lead has been disclosed (see Patent Document 1).

[0005] A transistor using an oxide semiconductor film has a higher efficiency than a transistor using an amorphous silicon film. Since the electron mobility in the oxide semiconductor film is high, the operating speed can be significantly improved. In addition, by improving some of the production equipment for transistors using amorphous silicon films, This also has the advantage of reducing capital investment. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2006-165528 A Summary of the Invention [Problem to be solved by the invention]

[0007] Some of the oxygen vacancies in and near the oxide semiconductor film become donors. Therefore, the threshold of a transistor using an oxide semiconductor film having oxygen vacancies is The low voltage may fluctuate in the negative direction. The vicinity of the film refers to the interface between the oxide semiconductor film and a film in contact with the oxide semiconductor film.

[0008] In view of this, one embodiment of the present invention is to reduce oxygen vacancies present in and near an oxide semiconductor film. The objective of the present invention is to reduce the loss in a semiconductor device and improve the electrical characteristics of a transistor using an oxide semiconductor film. It shall be one.

[0009] Another embodiment of the present invention is a highly reliable semiconductor device including a transistor including an oxide semiconductor film. An object of the present invention is to provide a semiconductor device. [Means for solving the problem]

[0010] One embodiment of the present invention is a semiconductor device including an oxide semiconductor film, a gate electrode overlapping with the oxide semiconductor film, and an oxide a gate insulating film provided between the semiconductor film and the gate electrode, The oxygen concentration near the interface with the insulating film is semi-lower than the oxygen concentration in the center of the gate electrode. It is a semiconductor device.

[0011] For example, in the case of a gate electrode having a thickness of 30 nm or more, the interface between the gate electrode and the gate insulating film The oxygen concentration at a vertical distance of 2 nm, 3 nm, or 5 nm from the gate insulating layer of the gate electrode than the oxygen concentration at vertical distances of 10 nm, 15 nm, or 30 nm from the interface with the lamella. low.

[0012] The gate electrode is made of a material with a higher Gibbs free energy of oxidation than the gate insulating film. That is, the gate electrode has a property of being more easily reduced than the gate insulating film. In this case, the gate electrode is less susceptible to oxidation than the gate insulating film. In the case of a stacked structure, the Gibbs free energy of the oxidation reaction of the gate electrode is higher than that of any of the layers. is expensive.

[0013] Specifically, the gate electrode is made of a material selected from the group consisting of silver, copper, ruthenium, iridium, platinum and gold. It contains one or more elements.

[0014] In one embodiment of the present invention, at least a first insulating film overlapping with the oxide semiconductor film is a gate electrode including the first layer and the second layer, and a gate electrode provided between the oxide semiconductor film and the gate electrode; a gate insulating film formed on the first layer of the gate electrode, the first layer being provided in contact with the gate insulating film; In addition, the semiconductor device has an oxygen concentration lower than that of the second layer of the gate electrode.

[0015] The first layer of the gate electrode has a Gibbs free energy of oxidation reaction lower than that of the gate insulating film. In other words, the first layer of the gate electrode is more easily reduced than the gate insulating film. In other words, the first layer of the gate electrode is less susceptible to oxidation than the gate insulating film. When the gate insulating film has a laminated structure, the gate electrode is formed on the insulating film. The Gibbs free energy of the oxidation reaction of the first layer of is high.

[0016] In this specification, the term "film having oxygen permeability" refers to a film having oxygen permeability. The film is permeable to oxygen molecules, or has a sufficiently high diffusion coefficient for oxygen atoms, and is suitable for the heat treatment during the manufacturing process. This refers to a membrane that allows oxygen atoms to pass through due to some theory or other reasons.

[0017] Also, an insulating film having low oxygen permeability is provided in contact with at least the side surface of the first layer of the gate electrode. In this specification, a membrane with low oxygen permeability is a membrane that does not allow oxygen molecules to pass through. The diffusion coefficient of oxygen atoms is sufficiently low, and oxygen atoms are easily absorbed by the heat treatment during the manufacturing process. By providing an insulating film with low oxygen permeability, the first layer of the gate electrode Therefore, outward diffusion of oxygen released from the oxide semiconductor film can be reduced, and oxygen can be efficiently supplied to the oxide semiconductor film.

[0018] Specifically, the first and second layers of the gate electrode are made of silver, copper, ruthenium, iridium, The oxide containing one or more elements selected from the group consisting of platinum, gold, and platinum. The substance has a high Gibbs free energy of oxidation, so it is easy to reduce itself and the film it comes into contact with is easily oxidized.

[0019] Alternatively, the first layer of the gate electrode may be made of silver, copper, ruthenium, iridium, platinum and gold. The second layer of the gate electrode is made of a metal containing one or more selected elements, and is made of silver, copper, ruthenium, etc. The oxide comprises one or more elements selected from the group consisting of tungsten, iridium, platinum and gold.

[0020] In one embodiment of the present invention, a gate electrode including at least an oxide is formed, and a gate insulating film is formed to cover the gate electrode. A gate insulating film is formed, and an oxide semiconductor film is formed so as to overlap the gate electrode via the gate insulating film. Then, heat treatment is performed to form a gate electrode and an oxide semiconductor film through the gate insulating film. The present invention relates to a method for manufacturing a semiconductor device that supplies oxygen.

[0021] Alternatively, in one embodiment of the present invention, an oxide semiconductor film is formed, and a gate insulating film is formed over the oxide semiconductor film. A gate insulating film including at least an oxide is formed to overlap with the oxide semiconductor film with the gate insulating film interposed therebetween. After the gate electrode is formed, a heat treatment is performed to separate the oxide from the gate electrode through the gate insulating film. The present invention relates to a method for manufacturing a semiconductor device that supplies oxygen to a nitride semiconductor film.

[0022] Alternatively, in one embodiment of the present invention, an oxide semiconductor film is formed, and a gate insulating film is formed over the oxide semiconductor film. A conductive film containing at least an oxide is formed on the gate insulating film, and then a heat treatment is performed. By this, oxygen is supplied from the conductive film to the oxide semiconductor film through the gate insulating film, and the oxygen is oxidized. A method for manufacturing a semiconductor device in which a conductive film is applied to a semiconductor film and processed to form a gate electrode. be.

[0023] By applying one embodiment of the present invention, oxygen moves from the gate electrode to the gate insulating film, The oxygen is supplied to the oxide semiconductor film provided in contact with the gate insulating film through the gate insulating film. Therefore, oxygen vacancies in and near the oxide semiconductor film can be reduced. This is because the gate electrode is in contact with the gate insulating film. This is because the Gibbs free energy of the oxidation reaction is higher than that of the gate insulating film. Fluctuations in electrical characteristics of a transistor using a semiconductor film can be suppressed.

[0024] In addition, due to the operation of the transistor, In particular, oxygen vacancies may occur at the interface between the oxide semiconductor film and the gate insulating film. When a defect occurs, it has a large effect on the electrical characteristics of the transistor. By providing the base electrode with a sufficient amount of oxygen, the oxygen vacancies that occur can be reduced. Therefore, in the transistor according to one embodiment of the present invention, the fluctuation in electrical characteristics caused by oxygen vacancies occurs. That is, a semiconductor device including the transistor has high reliability. Effect of the Invention

[0025] The present invention provides an oxide semiconductor film that reduces oxygen vacancies in and near the oxide semiconductor film, and The electrical characteristics of a transistor using the film can be improved.

[0026] In addition, the reliability of a semiconductor device including a transistor using an oxide semiconductor film can be improved. can. [Brief description of the drawings]

[0027] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating an example of a transistor according to one embodiment of the present invention. [Diagram 2] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a transistor according to one embodiment of the present invention. [Diagram 3] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a transistor according to one embodiment of the present invention. [Figure 4] 1A and 1B are a top view and a cross-sectional view illustrating an example of a transistor according to one embodiment of the present invention. [Diagram 5] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a transistor according to one embodiment of the present invention. [Figure 6] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a transistor according to one embodiment of the present invention. [Figure 7] 1A and 1B are a top view and a cross-sectional view illustrating an example of a transistor according to one embodiment of the present invention. [Figure 8] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a transistor according to one embodiment of the present invention. [Figure 9] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a transistor according to one embodiment of the present invention. [Figure 10]1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a transistor according to one embodiment of the present invention. [Figure 11] 1A to 1C are cross-sectional views illustrating an example of a method for manufacturing a transistor according to one embodiment of the present invention. [Figure 12] 1A and 1B are a top view and a cross-sectional view illustrating an example of a transistor according to one embodiment of the present invention. [Figure 13] FIG. 1 is a circuit diagram illustrating an example of a liquid crystal display device according to one embodiment of the present invention. [Figure 14] 1A and 1B are a circuit diagram and a graph showing electrical characteristics of an example of a semiconductor memory device according to one embodiment of the present invention. [Figure 15] 1A and 1B are a circuit diagram and a graph showing electrical characteristics of an example of a semiconductor memory device according to one embodiment of the present invention. [Figure 16] 1A and 1B are a block diagram and a circuit diagram of a portion of a CPU according to an embodiment of the present invention; [Figure 17] 1A and 1B are perspective views illustrating examples of electronic devices including a semiconductor device according to one embodiment of the present invention. [Figure 18] 1A to 1C are diagrams illustrating diffusion of oxygen in a silicon oxide film. [Figure 19] FIG. 13 is a diagram illustrating oxygen permeability of an aluminum oxide film. [Figure 20] FIG. 2 is a diagram illustrating the oxygen permeability of a YSZ film. [Figure 21] Diagram showing the Gibbs free energy of an oxidation reaction. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] The present invention will be described in detail with reference to the drawings. The present invention is not limited to the above, and various modifications in form and detail can be easily made by those skilled in the art. It is understood that the present invention should not be construed as being limited to the description of the following embodiments. In explaining the configuration of the invention using the drawings, the same reference numerals are used in different The hatch pattern is used in common among drawings. In some cases, no particular symbol is attached.

[0029] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of steps or stacking. In addition, the present specification does not refer to a specific name as a matter for identifying the invention. This does not indicate a title.

[0030] (Embodiment 1) In this embodiment, a transistor according to one embodiment of the present invention will be described with reference to FIGS. Reveal.

[0031] FIG 1A is a top view of a transistor according to one embodiment of the present invention. A cross-sectional view corresponding to the dashed line AB is shown in FIG. 1(B). For simplicity, in FIG. In the figure, the protective insulating film 118, the gate insulating film 112, etc. are omitted.

[0032] The transistor shown in FIG. 1B includes a base insulating film 102 provided over a substrate 100 and a base A first layer 104a, a second layer 104b and a third layer 104 are provided on the insulating film 102. a gate electrode 104 having a gate electrode c and a gate an insulating film 112, which is provided so as to overlap with the gate electrode 104 via the gate insulating film 112; An oxide semiconductor film 106 and a pair of electrodes 116 provided over the oxide semiconductor film 106. The first layer 104a of the gate electrode 104 is provided in contact with the gate insulating film 112. The third layer 104c of the gate electrode 104 is provided in contact with the base insulating film 102. The second layer 104b of the electrode 104 is disposed between the first layer 104a and the third layer 104c. Note that the transistor illustrated in FIG. 1B includes at least an oxide semiconductor film 106 and It is preferable that the protective insulating film 118 is provided so as to cover the pair of electrodes 116. A back gate electrode may be provided on the oxide semiconductor film 106 with a protective insulating film 118 interposed therebetween. .

[0033] In this specification, "B provided to cover A" refers to at least the upper surface and This is not limited to the case where B is installed adjacent to the side, but also includes cases where something else is installed between A and B. However, B may have an opening and expose a part of A for connecting wiring, etc. That's fine.

[0034] Here, the first layer 104a of the gate electrode 104 is a second layer 104b of the gate electrode 104. The third layer 104c of the gate electrode 104 has a lower oxygen concentration than the gate This layer has a higher electrical conductivity than the first layer 104 a and the second layer 104 b of the electrode 104 .

[0035] The first layer 104a and the second layer 104b of the gate electrode 104 are formed on the gate insulating film 1. The gate electrode 10 is made of a material having a higher Gibbs free energy of oxidation than the gate electrode 12. The first layer 104a and the second layer 104b of No. 4 are more easily reduced than the gate insulating film 112. In other words, the first layer 104a and the second layer 10 The gate insulating film 4b is less susceptible to oxidation than the gate insulating film 112.

[0036] For reference, Figure 21 shows the Gibbs free energy of the oxidation reaction of each element. The horizontal axis of Figure 21 is The vertical axis is the temperature [℃], and the vertical axis is the Gibbs free energy (ΔG [kJ / mol]). The Gibbs free energy of the oxidation reaction shown in 1 was calculated as follows. First, the standard enthalpy of formation ΔH and standard entropy S for each substance shown in Table 1 By substituting the above formula into the formula for each oxidation reaction shown in Table 2, the standard energy produced in each oxidation reaction is calculated. The enthalpy ΔH and standard entropy of formation ΔS are calculated. Table 2 shows the calculated entropy of each acid. The values ​​of the standard enthalpy of formation ΔH and standard entropy of formation ΔS in the catalysis reaction are shown. The standard enthalpy of formation ΔH and standard entropy S for each substance shown in Table 1 are The values ​​are mainly taken from "Chemical Handbook Basics II Revised 4th Edition" edited by the Chemical Society of Japan, Maruzen Co., Ltd. It is something.

[0037] [Table 1]

[0038] [Table 2]

[0039] Next, the values ​​of the standard enthalpy of formation ΔH and the standard entropy of formation ΔS shown in Table 2 are calculated as follows: Substituting this into equation (1), we obtain the Gibbs equations for each oxidation reaction in the temperature range of 0°C to 900°C. The free energy of the reaction was calculated. Note that T in formula (1) is temperature [K].

[0040]

number

[0041] From FIG. 21, for example, the first layer 104a and the second layer 104b of the gate electrode 104 are An oxide containing one or more elements selected from silver, copper, ruthenium, iridium, platinum and gold. The oxide containing the element has a Gibbs free energy of oxidation of Since it has a high conductivity, it is easy to reduce itself and oxidize the film it comes into contact with. Therefore, it is preferable to use an oxide containing ruthenium or iridium. An example of an oxide containing iridium is RuO X (X is 0.5 to 3), IrO X (X is 0.5 to 3), SrRuO X (X is 1 or greater and 5 or less).

[0042] Alternatively, the first layer 104a of the gate electrode 104 may be made of silver, copper, ruthenium, iridium, white, or the like. The gate electrode 104 is a layer made of gold or a metal containing one or more elements selected from the group consisting of gold and silver. The second layer 104b is made of one selected from the group consisting of silver, copper, ruthenium, iridium, platinum and gold. The layer is made of an oxide containing the above elements.

[0043] The first layer 104a of the gate electrode 104 is made of iridium, platinum, ruthenium oxide, or the like. When a material having a work function of 5 eV or more, preferably 5.2 eV or more, such as gold, is used, the specification can be improved. Compared with materials with a charge function of 4.7 eV or less, the threshold voltage of the transistor is This is preferable because it allows the shift in the direction of the beam.

[0044] The third layer 104c of the gate electrode 104 is made of silver, copper, ruthenium, iridium, platinum, or the like. The gate electrode 1 is a layer made of a metal containing one or more elements selected from the group consisting of ZnO, ZnS, and gold. The third layer 104c of the gate electrode 104 is more sensitive to oxidation than the second layer 104b of the gate electrode 104. If a material having a high or similar BSS free energy is used, the second layer 10 of the gate electrode 104 This is preferable since it is less likely to take oxygen from 4b.

[0045] The gate insulating film 112 is made of aluminum oxide, magnesium oxide, silicon oxide, silicon oxynitride, or the like. silicon oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, A single layer of insulators selected from the group consisting of neodymium oxide, hafnium oxide, and tantalum oxide. Alternatively, they may be used in a laminated state.

[0046] Note that the gate insulating film 112 has oxygen permeability. or a membrane that is sufficiently permeable to oxygen, and that is easily oxidized by heat treatment during the manufacturing process. For example, a membrane that is permeable to oxygen molecules is one that is permeable to oxygen molecules. Specifically, the film density is 3.2 g / cm 3 Less than In addition, the film through which oxygen atoms pass is oxidized at a temperature of 150° C. or higher, although this depends on the thickness of the gate insulating film 112. The diffusion coefficient of oxygen atoms at temperatures below 450°C is 3×10 -16 cm 2 / sec or more, preferably 1×10 -15 cm 2 / sec or more, preferably 8 x 10 -15 cm 2 / sec or more That's good.

[0047] By using the gate electrode 104 and the gate insulating film 112 as described above, Oxygen is supplied from the electrode 104 to the oxide semiconductor film 106 via the gate insulating film 112. As a result, oxygen vacancies in the oxide semiconductor film 106 and in the vicinity of the oxide semiconductor film 106 can be reduced. Therefore, the amount of oxygen in the oxide semiconductor film 106 and in the vicinity of the oxide semiconductor film 106 is reduced. Fluctuations in the electrical characteristics of a transistor due to element deficiencies can be suppressed.

[0048] As the oxide semiconductor film 106, for example, an In-M-Zn oxide film may be used. The metal element M is an element having a higher bond energy with oxygen than In and Zn. In-M-Zn is an element that has the function of suppressing the desorption of oxygen from the In-M-Zn oxide film. The metal element M acts to suppress the generation of oxygen vacancies in the oxide semiconductor film. Fluctuations in the electrical characteristics of a transistor due to oxygen vacancies can be reduced.

[0049] The metal element M is specifically Al, Sc, Ti, V, Cr, Mn, Fe, Co, Ni, Ga , Y, Zr, Nb, Mo, Sn, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, D y, Ho, Er, Tm, Yb, Lu, Hf, Ta or W, preferably Al , Ti, Ga, Y, Zr, Ce or Hf. The metal element M is one or more of the above elements. Alternatively, Si or Ge may be used in place of the metal element M. I don't.

[0050] The oxide semiconductor film 106 may be single-crystalline, polycrystalline (also referred to as polycrystalline), or amorphous. Which state to take?

[0051] The oxide semiconductor film 106 is preferably a C Axis Aligned Optical Coaxial (CAAC-OS) film. The film is a Crystalline Oxide Semiconductor.

[0052] The CAAC-OS film is neither completely single crystalline nor completely amorphous. is an oxide semiconductor film with a crystalline-amorphous mixed phase structure having crystalline and amorphous parts in the amorphous phase. The crystal part must be small enough to fit within a cube with one side less than 100 nm. In addition, transmission electron microscopes (TEM) In the observation image by a microscope, the amorphous part and the The boundary between the crystal and the crystalline part is not clear. Therefore, the CAAC-OS film does not have any in-boundary defects. The decrease in carrier mobility caused by this is suppressed.

[0053] The crystal parts in the CAAC-OS film have c-axes that are normal vectors to the surface on which the CAAC-OS film is formed. The triangle is aligned parallel to the normal vector of the ab plane and perpendicular to the ab plane. The metal atoms are arranged in a layered or hexagonal shape when viewed perpendicular to the c-axis. Metal atoms and oxygen atoms are arranged in layers. The orientation of the a and b axes may be different. In this specification, when it is simply described as vertical, it means that The range of 5° to 95° is also included. This also includes the range from 1° to 5°.

[0054] In the CAAC-OS film, the distribution of the crystal parts may not be uniform. In the process of forming the C-OS film, when crystal growth is performed from the surface side of the oxide semiconductor film 106, The proportion of crystalline portions may be higher near the surface than near the surface on which the film is formed. By adding impurities to the CAAC-OS film, a crystalline part is formed in the region where the impurities are added. may become amorphous.

[0055] The c-axis of the crystal part in the CAAC-OS film is the normal vector of the surface on which the CAAC-OS film is formed. The CAAC-OS film shape (the shape of the film on which the film is formed) is Depending on the cross-sectional shape of the surface or the cross-sectional shape of the surface, the directions may differ from each other. The direction of the c-axis of the crystal is the normal vector of the surface on which the CAAC-OS film is formed. The direction of the crystal is parallel to the normal vector of the film or surface. is formed by carrying out a crystallization treatment such as a heat treatment after the film formation.

[0056] The oxide semiconductor film has a band gap of about 2.8 eV to 3.2 eV, and the minority carrier 10 -9 pieces / cm 3 The majority carriers come from the source of the transistor. Therefore, a transistor including an oxide semiconductor film has an avalanche breakdown voltage. There is no down.

[0057] In addition, in a transistor using an oxide semiconductor film, the electric field of a gate electrode In order to completely deplete the channel region, for example, when the channel length is 3 μm and the channel width is 1 μm, The off-state current is 10 -23 A or less, and at room temperature The off-current is even lower (specifically 10 -25 A or below).

[0058] In addition, a transistor using an oxide semiconductor film has electrical characteristics that change when irradiated with visible light or ultraviolet light. The variation is small, and therefore the transistor is highly reliable.

[0059] There is no particular limitation on the substrate 100, but it should have at least heat resistance sufficient to withstand subsequent heat treatments. For example, glass substrates, ceramic substrates, quartz substrates, and sapphire substrates. Alternatively, a single crystal semiconductor such as silicon or silicon carbide may be used as the substrate 100. Conductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SOI ( It is also possible to apply a silicon on insulator substrate. Any of these substrates on which semiconductor elements are provided may be used as the substrate 100 .

[0060] In addition, the substrate 100 may be a fifth generation (1000 mm x 1200 mm or 1300 mm x 1500mm), 6th generation (1500mm x 1800mm), 7th generation (1870mm x 2200mm), 8th generation (2200mm x 2500mm), 9th generation (2400mm x Using large glass substrates such as 10th generation (2800mm) and 10th generation (2880mm x 3130mm) In this case, the substrate 100 may shrink due to heat treatment or the like in the manufacturing process of the semiconductor device. Therefore, in some cases, it may be difficult to perform fine processing using large glass substrates as described above. When used as the substrate 100, it is preferable to use one that shrinks little. 0, and heat at 400°C, preferably 450°C, and more preferably 500°C for 1 hour. The shrinkage amount after heat treatment is 10 ppm or less, preferably 5 ppm or less, and more preferably A large glass substrate with a resistivity of 3 ppm or less may be used.

[0061] A flexible substrate may be used as the substrate 100. The method of providing the transistor is to fabricate the transistor on a non-flexible substrate and then Alternatively, the resistor may be peeled off and transferred to the flexible substrate 100. A release layer may be provided between the non-flexible substrate and the transistor.

[0062] The base insulating film 102 is formed so that impurities originating from the substrate 100 do not affect the oxide semiconductor film 106. However, if the substrate 100 does not contain impurities, the insulating film It is not necessary to provide 102.

[0063] The base insulating film 102 may be made of aluminum oxide, aluminum nitride, magnesium oxide, Silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, germanium oxide , yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide and tantalum oxide-containing insulators, and may be used in a single layer or laminated form. stomach.

[0064] Silicon oxynitride is a material whose composition contains more oxygen than nitrogen. For example, oxygen is 50 atomic % or more and 70 atomic % or less, and nitrogen is 0.5 atomic % or more and 15 atomic % or less. Silicon is between 25 atomic % and 35 atomic % and hydrogen is between 0 atomic % and 10 atomic %. Silicon nitride oxide refers to a material that contains more nitrogen than oxygen in its composition. For example, oxygen is 5 atomic % or more and 30 atomic % or less, and nitrogen is 20 % to 55%, silicon is 25% to 35%, hydrogen is 10 % or more and 25 atomic % or less. However, the above range is based on the Rutherford Rutherford Backscattering Spec (RBS) trometry and Hydrogen Forward Scattering (HFS) This is measured using scattering spectrometry. In addition, the total composition of the constituent elements does not exceed 100 atomic percent.

[0065] The pair of electrodes 116 is made of Al, Ti, Cr, Co, Ni, Cu, Y, Zr, Mo, Ag, T Uses a single layer or laminate of a simple substance, nitride, oxide, or alloy containing one or more of a and W. In this embodiment, the pair of electrodes 116 is provided on the top surface of the oxide semiconductor film 106. However, the present invention is not limited to this structure. For example, A structure in which the pair of electrodes 116 are in contact with the lower surface of the oxide semiconductor film 106 may also be used. In addition, in the oxide semiconductor film 106, in the vicinity of the portion in contact with the pair of electrodes 116, The electrical conductivity of the material may be higher than that of other parts of the material.

[0066] The protective insulating film 118 is made of aluminum oxide, aluminum nitride, magnesium oxide, silicon oxide, etc. silicon oxide nitride, silicon nitride oxide, silicon nitride, germanium oxide, oxide Yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide and One or more insulators containing tantalum oxide may be selected and used in a single layer or a laminated layer.

[0067] It is preferable that the protective insulating film 118 has a low relative dielectric constant and a sufficient thickness. For example, a silicon oxide film with a relative dielectric constant of about 3.8 is used, and the thickness is 200 nm to 1000 nm. The surface of the protective insulating film 118 is slightly fixed due to the influence of atmospheric components, etc. The charge can cause the threshold voltage of the transistor to fluctuate. Therefore, the protective insulating film 118 is formed in a ratio range in which the effect of the electric charge generated on the surface is sufficiently small. For the same reason, it is preferable to form a resin film on the protective insulating film 118. By forming the insulating layer, the effect of charges generated on the surface may be reduced.

[0068] Note that the transistor shown in FIG. 1C has a gate electrode different from that shown in FIG. Specifically, the gate electrode of the transistor shown in FIG. 105 has a first layer 105a and a second layer 105b, each of which corresponds to a gate electrode 104. That is, the gate electrode 105 is a layer similar to the first layer 104a and the second layer 104b of the gate electrode 105. The gate electrode 104 has a structure in which the third layer 104c is omitted. Although the third layer 104c has a higher resistance than the gate electrode 104, the third layer 104c is easy to form. It becomes.

[0069] A method for manufacturing the transistor shown in FIG. 1B will be described below with reference to FIGS. .

[0070] First, a substrate 100 is prepared, and a base insulating film 102 is formed on the substrate 100. 02 is the sputtering method, chemical vapor deposition (CVD: Chemical Vapor Deposition) deposition method, molecular beam epitaxy (MBE) Epitaxy method, atomic layer deposition (ALD) method tion method or Pulsed Laser Deposition (PLD) method The film can be formed by using the ion method.

[0071] Next, the conductive film 114b and the conductive film 114a are formed in this order (see FIG. 2A). Note that the conductive film 114a is a metal oxide film. The conductive film 114b and the conductive film 114a are formed by sputtering. The film may be formed by a deposition method, a CVD method, an MBE method, an ALD method or a PLD method.

[0072] Next, the conductive film 114b and the conductive film 114a are processed to form a conductive film 1 having a shape of a gate electrode. 24b and a conductive film 124a are formed (see FIG. 2B).

[0073] In this specification, when the term "processing" is used, it means, for example, photolithography. The film is formed into a desired shape using a resist mask formed by a deposition process.

[0074] Note that when halogen and hydrogen are present in the oxide semiconductor film, carriers may be generated. When ruthenium or ruthenium oxide is used for the conductive film 114a, halogen and A process that uses neither nitrogen nor hydrogen, but oxygen, rare gas (preferably argon), etc. Therefore, the conductive film 114a can be etched by the plasma alone. By etching 4a without using halogen or hydrogen, the halogen in the oxide semiconductor film is The inclusion of fluorine and hydrogen is unlikely to occur, and the fluctuation of the threshold voltage of the transistor is suppressed. This can be done.

[0075] Next, the gate insulating film 112 is formed. The gate insulating film 112 is formed by a sputtering method, a CV method, etc. The film may be formed by the D method, the MBE method, the ALD method or the PLD method.

[0076] The gate insulating film 112 is preferably formed by sputtering. Gas (oxygen, ozone or nitrous oxide) is 5% or more, preferably 10% or more, more preferably Preferably, the deposition gas contains 20% or more of the hydrogen peroxide, and more preferably 50% or more of the hydrogen peroxide. Gases with low impurity concentration such as hydrogen are used. The substrate temperature during film formation is kept at room temperature or higher by 20°C. 0°C or lower, preferably from room temperature to 150°C or lower, and more preferably from room temperature to 120°C or lower. By using the above method, the concentration of impurities such as hydrogen is low and there is no excess oxygen. Therefore, it is possible to form the gate insulating film 112 that releases oxygen by heat treatment. can.

[0077] The gate insulating film 112 is heated at a temperature of 150° C. to 650° C. or 200° C. to 450° C. An insulating film that releases oxygen when subjected to heat treatment at the following temperatures is used.

[0078] In a transistor using an oxide semiconductor film, oxygen vacancies in the oxide semiconductor film act as donors. This causes the threshold voltage of the transistor to shift in the negative direction. The oxygen vacancies at the interface between the gate insulating film and the oxide semiconductor film deteriorate the electrical characteristics of the transistor. Therefore, in the oxide semiconductor film and between the oxide semiconductor film and the gate Reducing oxygen vacancies at the interface with the gate insulating film is a This leads to stabilizing the electrical characteristics of the transistor and improving its reliability. When oxygen is released from the insulating film, it enters the oxide semiconductor film and the oxide semiconductor film and the gate insulating film. This is preferable because it can reduce oxygen vacancies at the interface with the film.

[0079] "Oxygen is released by heat treatment" means that the amount of oxygen released is converted to oxygen atoms by TDS analysis. The emission amount is 1.0×10 19 atoms / cm 3 That's it, 3.0 x 10 19 atoms / cm 3 That's it, 1.0 x 10 20 atoms / cm 3 or more than 3.0×10 20 atoms / cm 3 This means that the above is the case.

[0080] Here, the method for measuring the amount of released oxygen converted into oxygen atoms in TDS analysis is as follows: will be explained.

[0081] The total amount of gas released when the measurement sample was subjected to TDS analysis was calculated based on the integral value of the ion intensity of the released gas. By comparing with the standard value of the standard sample, the total amount of gas released can be calculated. do.

[0082] For example, the results of a TDS analysis of a silicon wafer containing a standard sample of hydrogen with a given density, From the results of the TDS analysis of the measured sample, the amount of oxygen molecules released from the measured sample (N O2 ) is the formula (2 Here, the mass-to-charge ratio (M / z) obtained by TDS analysis is 32. Assume that all of the detected gas is from oxygen molecules. Other gases with M / z 32 are CH 3 Although there is OH, it is unlikely to exist and is not considered here. Oxygen compounds containing oxygen atoms with mass numbers 17 and 18, which are isotopes of the atom Offspring are also not taken into consideration as their presence in the natural world is extremely small.

[0083]

number

[0084] N H2 is the density of hydrogen molecules desorbed from the standard sample. H2 is a standard test The integral value of the ion intensity when the sample is subjected to TDS analysis. Here, the reference value of the standard sample is N H2 / S H2 Let us assume that S O2is the integral value of the ion intensity when the measurement sample is subjected to TDS analysis. α is a coefficient that affects the ion intensity in TDS analysis. For more information, see Japanese Patent Application Laid-Open No. 6-275697 and U.S. Patent No. 5,528,032. The amount of released oxygen was measured using a thermal desorption analyzer EMD-WA1 manufactured by Electron Science Corporation. 000S / W was used, and 1×10 16 atoms / cm 2 Contains hydrogen atoms of The measurement was performed using a silicon wafer.

[0085] In addition, some of the oxygen is detected as oxygen atoms in the TDS analysis. The ratio of the oxygen molecules can be calculated from the ionization rate of the oxygen molecules. Since the ionization rate of oxygen molecules is included in the calculation, the amount of oxygen atoms released can be calculated by evaluating the amount of oxygen molecules released. It is possible to estimate even if

[0086] In addition, N O2 is the amount of oxygen molecules released. The amount of oxygen released in terms of oxygen atoms is This is twice the amount released.

[0087] Next, the oxide semiconductor film 136 is formed over the gate insulating film 112 (see FIG. 2C). The oxide semiconductor film 136 is formed by a sputtering method, a CVD method, an MBE method, an ALD method, or a PL method. The film can be formed using Method D.

[0088] The oxide semiconductor film 136 is preferably formed by a sputtering method. The reactive gas is 5% or more, preferably 10% or more, more preferably 20% or more, and even more preferably The deposition gas used should contain at least 50% of hydrogen or other impurities. Gas is used.

[0089] Next, a heat treatment is performed. The heat treatment is performed in an inert gas (nitrogen, or helium, neon, or arsenic). atmosphere, oxidizing gas of 10 ppm or more, or an atmosphere containing 1% or more, more preferably 10% or more, or in a reduced pressure state (10 Pa or less) Preferably, the pressure is 1 Pa or less, and more preferably, the pressure is 0.1 Pa or less. The treatment is carried out at a temperature of 650°C or less, preferably 200°C to 450°C.

[0090] The heat treatment reduces a part of the conductive film 124a, and oxygen generated by the reduction is transferred to the gate insulating film 124b. The insulating film 112 penetrates into the oxide semiconductor film 136 and reaches the vicinity of the oxide semiconductor film 136. By this, oxygen vacancies in the oxide semiconductor film 136 and in the vicinity of the oxide semiconductor film 136 can be reduced. It is possible.

[0091] In this way, a part of the conductive film 124a is reduced, and thus oxygen is absorbed more than the conductive film 124a. The first layer 104a has an oxygen concentration similar to that of the conductive film 124a. The second layer 104b is formed. The conductive film 124b is not particularly changed and is formed into the third layer. As a result, the first layer 104a, the second layer 104b, and the third layer 104c are Then, a gate electrode 104 having the above structure is formed (see FIG. 3(A)).

[0092] Here, the substrate temperature during the formation of the oxide semiconductor film 136 is preferably 150° C. or higher and 450° C. or lower. By setting the temperature to 200° C. or higher and 400° C. or lower, this can be substituted for the heat treatment described above.

[0093] Note that in the case where an insulating film that releases oxygen by heat treatment is provided as the gate insulating film 112, Oxygen is supplied from the gate insulating film 112 to the oxide semiconductor film 106 by heat treatment. However, the quality of the gate insulating film 112 may be deteriorated due to the release of oxygen. In this case, oxygen is supplied from the conductive film 124a to the gate insulating film 112. Therefore, it is possible to suppress the deterioration of the film quality of the gate insulating film 112 caused by the emission of the hydrogen.

[0094] Next, the oxide semiconductor film 136 is processed to form an island-shaped oxide semiconductor film 106 (FIG. 3( See B). ).

[0095] Next, a conductive film that will become the pair of electrodes 116 is formed. The film may be formed by sputtering, CVD, MBE, ALD or PLD. Next, the conductive film that becomes the pair of electrodes 116 is processed to form the pair of electrodes 116.

[0096] Next, a protective insulating film 118 is formed (see FIG. 3(C)). The deposition method, CVD method, MBE method, ALD method, or PLD method may be used. In addition, a back gate electrode may be formed over the oxide semiconductor film 106 with the protective insulating film 118 interposed therebetween. For the back gate electrode, see the description of the gate electrode 104.

[0097] In the above manner, the transistor illustrated in FIG.

[0098] The transistor illustrated in FIG. 1B has a structure in which the oxide semiconductor film 106 and the oxide semiconductor film 106 There is little oxygen vacancy in the vicinity, and it has excellent electrical properties. Since the accompanying fluctuation in electrical characteristics is also suppressed, a semiconductor device using the transistor can be Reliability can be improved.

[0099] According to this embodiment mode, a transistor with excellent electrical characteristics can be provided. A highly reliable semiconductor device using the transistor can be provided.

[0100] This embodiment mode can be used in combination with other embodiment modes as appropriate.

[0101] (Embodiment 2) In this embodiment mode, a transistor having a structure different from that in Embodiment 1 will be described with reference to FIGS. I will use this to explain.

[0102] 4A is a top view of a transistor according to one embodiment of the present invention. A cross-sectional view corresponding to the dashed line AB is shown in FIG. 4(B). For simplicity, in FIG. 2, the gate insulating film 212, the base insulating film 102, etc. are omitted.

[0103] The transistor shown in FIG. 4B includes a base insulating film 102 provided over a substrate 100 and a base An oxide semiconductor film 206 provided over the insulating film 102 and a A pair of electrodes 216 is formed on the oxide semiconductor film 206 , and a layer is provided to cover the oxide semiconductor film 206 and the pair of electrodes 216 . The gate insulating film 212 overlaps with the oxide semiconductor film 206 with the gate insulating film 212 interposed therebetween. The gate has a first layer 204a, a second layer 204b and a third layer 204c. The first layer 204a of the gate electrode 204 is a gate insulating film. 212, and the second layer 204b of the gate electrode 204 is disposed on the first layer 204a. The third layer 204c of the gate electrode 204 is provided on the second layer 204b. In addition, a back gate electrode may be provided under the oxide semiconductor film 206 via the base insulating film 102. I don't.

[0104] Here, the first layer 204a of the gate electrode 204 is a second layer 204b of the gate electrode 204. The third layer 204c of the gate electrode 204 has a lower oxygen concentration than the gate This layer has a higher electrical conductivity than the first layer 204 a and the second layer 204 b of the electrode 204 .

[0105] The first layer 204a of the gate electrode 204 is more prone to oxidation than the gate insulating film 212. The first layer 204a of the gate electrode 204 is made of a material having a high BSS free energy. The gate electrode 204 is more easily reduced than the gate insulating film 212. The first layer 204 a is less susceptible to oxidation than the gate insulating film 212 .

[0106] For the gate electrode 204, refer to the description of the gate electrode 104.

[0107] The gate insulating film 212 has oxygen permeability. Specifically, the film density is 3.2 g / cm 3 less than Alternatively, the film through which oxygen atoms can pass may be determined depending on the thickness of the gate insulating film 212. However, the diffusion coefficient of oxygen atoms at temperatures between 150 and 450°C is 3×10 -16 cm 2 / sec or more, preferably 1×10 -15 cm 2 / sec or more, preferably 8 x 10 -15 c m 2 / sec or more insulating film.

[0108] For the gate insulating film 212, refer to the description of the gate insulating film 112.

[0109] Note that the substrate 100 and the base insulating film 102 are described in the first embodiment.

[0110] For the oxide semiconductor film 206, refer to the description of the oxide semiconductor film 106.

[0111] For the pair of electrodes 216, refer to the description of the pair of electrodes 116. Although the pair of electrodes 216 are in contact with the top surface of the oxide semiconductor film 206, However, the present invention is not limited to this structure. For example, the pair of electrodes 216 may be formed on the oxide semiconductor film 206. It is also possible to use a structure in which the lower surface of the insulating film is in contact with the lower surface of the insulating film.

[0112] Note that the transistor shown in FIG. 4C has a gate electrode different from that shown in FIG. Specifically, the gate electrode of the transistor shown in FIG. 205 has a first layer 205a and a second layer 205b, each of which corresponds to a gate electrode 204. That is, the gate electrode 205 is a layer similar to the first layer 204a and the second layer 204b of the gate electrode 205. The gate electrode 204 has a structure in which the third layer 204c is omitted. 05 has a higher resistance than the gate electrode 204 by the amount of the third layer 204c, but is easy to form. It becomes.

[0113] A method for manufacturing the transistor illustrated in FIG. 4B will be described below with reference to FIGS.

[0114] The manufacturing method up to the step of providing the base insulating film 102 on the substrate 100 will be described in detail below. Please refer to the explanation given in form 1.

[0115] Note that the base insulating film 102 preferably has sufficient flatness. It is preferable to perform a planarization process on the substrate 102. The planarization process may be performed by chemical mechanical polishing (CMP). P: Chemical Mechanical Polishing, or Dryer Specifically, the average surface roughness (Ra) is 1 nm or less, preferably The base insulating film 102 is provided so as to have a thickness of 0.3 nm or less, and more preferably 0.1 nm or less. When Ra is set to the above value or less, a crystalline region is easily formed in the oxide semiconductor film. In addition, the unevenness of the interface between the base insulating film 102 and the oxide semiconductor film is reduced, so that the interface The effect of scattering can be reduced. Note that Ra is the value specified in JIS B 0601:2001 (ISO 4287:1997) is applied to curved surfaces. It is an extension of the original and is expressed as "the average of the absolute values ​​of the deviation from the reference surface to the specified surface." and is defined by equation (3).

[0116]

number

[0117] Here, the specified surface is the surface to be measured for roughness, and has coordinates ((x 1 ,y 1 ,f(x 1 , y 1 ))(x 1 ,y 2 ,f(x 1 ,y 2 ))(x 2 ,y 1 ,f(x 2 ,y 1 ))(x 2 , y 2 ,f(x 2 ,y 2 )) is a rectangular area represented by the four points, and the specified surface is projected onto the xy plane. The area of ​​the rectangle is S 0 , the height of the reference surface (the average height of the specified surface) is Z 0 Let Ra be the original Can be evaluated using an atomic force microscope (AFM) It is Noh.

[0118] Next, an oxide semiconductor film 236 is formed (see FIG. 5A). , the oxide semiconductor film 136 may be formed by sputtering, CVD, MBE, or AL. The film may be formed by the PLD method or the PLD method.

[0119] The oxide semiconductor film 236 is preferably formed by a sputtering method. The reactive gas is 5% or more, preferably 10% or more, more preferably 20% or more, and even more preferably The deposition gas used should contain at least 50% of hydrogen or other impurities. Gas is used.

[0120] After the oxide semiconductor film 236 is formed, first heat treatment may be performed. The heating temperature may be 250° C. or higher and 650° C. or lower, and preferably 300° C. or higher and 500° C. or lower. The atmosphere for the heat treatment in step 1 is an inert gas atmosphere, with an oxidizing gas of 10 ppm or more, preferably The process is carried out in an atmosphere containing 1% or more, more preferably 10% or more, or under reduced pressure. The heat treatment in step 1 is performed in an inert gas atmosphere, followed by oxidation to replenish the oxygen that has been removed. An atmosphere containing 10 ppm or more of reactive gas, preferably 1% or more, and more preferably 10% or more. By the first heat treatment, hydrogen or Impurities such as water can be removed.

[0121] Next, the oxide semiconductor film 236 is processed to form an island-shaped oxide semiconductor film 206 (FIG. 5( See B). ).

[0122] Next, a conductive film that will become the pair of electrodes 216 is formed. With reference to the description of the conductive film that becomes the counter electrode 116, the sputtering method, the CVD method, the MBE method, The film may be formed by ALD or PLD. The resulting film is processed to form a pair of electrodes 216 (see FIG. 5(C)).

[0123] Next, a gate insulating film 212 is formed. The gate insulating film 212 has the same structure as the gate insulating film 112. The method is described in the literature, and the sputtering method, CVD method, MBE method, ALD method, or PLD method is used. A film may be formed.

[0124] Next, a conductive film 214a and a conductive film 214b are formed in this order (see FIG. 6(A)). The conductive film 214a and the conductive film 214b are the same as those described for the conductive film 114a and the conductive film 114b. The method is formed by sputtering, CVD, MBE, ALD or PLD. Note that the conductive film 214a is a metal oxide film.

[0125] Next, a second heat treatment is performed. The second heat treatment is performed in the same manner as the heat treatment described in Embodiment 1. This can be done by referring to the following.

[0126] The conductive film 214a is reduced by the second heat treatment, and oxygen generated by the reduction is transferred to the gate insulating film 214b. The insulating film 212 penetrates into the oxide semiconductor film 206 and reaches the vicinity of the oxide semiconductor film 206. By this, oxygen vacancies in the oxide semiconductor film 206 and in the vicinity of the oxide semiconductor film 206 are reduced. It is possible.

[0127] In this way, the conductive film 214a is reduced, and the oxygen concentration is lower than that of the conductive film 214a. The conductive film 224a has an oxygen concentration similar to that of the conductive film 214a. The conductive film 214b is not particularly changed and becomes the conductive film 224c. (See FIG. 6(B)).

[0128] The conductive film 224a, the conductive film 224b, and the conductive film 224c are processed to form the first layer 20 4a, the second layer 204b and the third layer 204c to form the gate electrode 204. (See Figure 6(C)).

[0129] Note that when halogen and hydrogen are present in the oxide semiconductor film, carriers may be generated. When ruthenium or ruthenium oxide is used as the conductive film 214a, halogen and Therefore, the conductive film 214 can be etched without using either oxygen or hydrogen. By etching a without using halogen or hydrogen, the threshold voltage of the transistor Fluctuations in the temperature can be suppressed.

[0130] In the above manner, the transistor illustrated in FIG. 4B can be manufactured.

[0131] The transistor illustrated in FIG. 4B has a structure in which the oxide semiconductor film 206 and the oxide semiconductor film 206 There is little oxygen vacancy in the vicinity, and it has excellent electrical properties. Since the accompanying fluctuation in electrical characteristics is also suppressed, a semiconductor device using the transistor can be Reliability can be improved.

[0132] According to this embodiment mode, a transistor with excellent electrical characteristics can be provided. A highly reliable semiconductor device using the transistor can be provided.

[0133] Note that this embodiment mode can be used in combination with other embodiment modes as appropriate.

[0134] (Embodiment 3) In this embodiment, a transistor having a structure different from that of the first and second embodiments is described. This will be described with reference to FIG. 7 to FIG.

[0135] 7A is a top view of a transistor according to one embodiment of the present invention. A cross-sectional view corresponding to the dashed line AB is shown in FIG. 7(B). For simplicity, in FIG. In the figure, the protective insulating film 318, the base insulating film 102, and the like are omitted.

[0136] The transistor shown in FIG. 7B includes a base insulating film 102 provided over a substrate 100 and a base An oxide film having a first region 306a and a second region 306b provided on an insulating film 102. A gate insulating film 312 is provided on the oxide semiconductor film 306. a first layer 304a overlapping with the oxide semiconductor film 306 with the insulating film 312 interposed therebetween; A gate electrode 304 having a second layer 304b and a third layer 304c, and a gate insulating film 3 12 and a sidewall insulating film 310 provided in contact with the side surface of the gate electrode 304, and a sidewall insulating film 310, an oxide semiconductor film provided to cover the gate electrode 304 and the oxide semiconductor film 306; A protective insulating film 318 having an opening exposing a part of the body film 306, and the opening of the protective insulating film 318 A pair of electrodes provided in contact with the second region 306b of the oxide semiconductor film 306 through the opening. The first layer 304a of the gate electrode 304 is a gate insulating film 312. The second layer 304b of the gate electrode 304 is disposed on the first layer 304a. The third layer 304c of the gate electrode 304 is disposed on the second layer 304b and is made of an oxide semiconductor. The first region 306a of the insulating film 306 overlaps the gate electrode 304 and the sidewall insulating film 310. In addition, a backgate is provided under the oxide semiconductor film 306 with the base insulating film 102 interposed therebetween. A port electrode may be provided.

[0137] Here, the first layer 304a of the gate electrode 304 is connected to the second layer 304b of the gate electrode 304. The third layer 304c of the gate electrode 304 has a lower oxygen concentration than the gate This layer has a higher electrical conductivity than the first layer 304 a and the second layer 304 b of the electrode 304 .

[0138] The first layer 304a of the gate electrode 304 is more prone to oxidation than the gate insulating film 312. The first layer 304a of the gate electrode 304 is made of a material having a high BSS free energy. The gate electrode 304 is more easily reduced than the gate insulating film 312. The first layer 304 a is less susceptible to oxidation than the gate insulating film 312 .

[0139] For the gate electrode 304, refer to the description of the gate electrode 104.

[0140] The gate insulating film 312 has oxygen permeability. Specifically, the film density is 3.2 g / cm 3 less than Alternatively, the film through which oxygen atoms can pass may vary depending on the thickness of the gate insulating film 312. However, the diffusion coefficient of oxygen atoms at temperatures between 150 and 450°C is 3×10 -16 cm 2 / sec or more, preferably 1×10 -15 cm 2 / sec or more, preferably 8 x 10 -15 c m 2 / sec or more insulating film.

[0141] For the gate insulating film 312, refer to the description of the gate insulating film 112.

[0142] In FIG. 7B, the gate insulating film 312 has a top surface shape similar to that of the gate electrode 304. For example, the gate insulating film 312 may be formed on the gate electrode 304 and the side The upper surface shape may be the same as that of the wall insulating film 310 .

[0143] By using the gate electrode 304 and the gate insulating film 312 as described above, Oxygen is supplied from the electrode 304 to the oxide semiconductor film 306 through the gate insulating film 312. As a result, oxygen vacancies in the oxide semiconductor film 306 and in the vicinity of the oxide semiconductor film 306 can be reduced. Therefore, the amount of oxygen in the oxide semiconductor film 306 and in the vicinity of the oxide semiconductor film 306 is reduced. Fluctuations in the electrical characteristics of a transistor due to element deficiencies can be suppressed.

[0144] The sidewall insulating film 310 is an insulating film having low oxygen permeability. The insulating film must be impermeable to atomic molecules, and the diffusion coefficient of oxygen atoms must be sufficiently low to prevent heat treatment during the manufacturing process. For example, a membrane that does not allow oxygen molecules to pass through is called a membrane that does not allow oxygen atoms to pass through. The density must be high enough that elementary molecules cannot pass through. Specifically, the membrane density is 3.2 g / cm 3 The thickness of the sidewall insulating film 310 also determines whether the film is impermeable to oxygen atoms. However, the diffusion coefficient of oxygen atoms at temperatures between 150 and 450°C is 3×10 -16 cm 2 / sec Less than 1 x 10 -16 cm 2 / sec, preferably less than 5 x 10 -17 cm 2 Anything less than / sec is fine.

[0145] The sidewall insulating film 310 with low oxygen permeability prevents oxygen released from the gate electrode 304 from flowing outward. The diffusion of oxygen is reduced, and oxygen is efficiently introduced into and around the oxide semiconductor film 306. It can be supplied quickly.

[0146] In this embodiment, the structure in which the sidewall insulating film 310 is provided is described. For example, the sidewall insulating film 310 may not be provided.

[0147] For the substrate 100 and the base insulating film 102, refer to the description of the first embodiment.

[0148] Note that the first region 306a of the oxide semiconductor film 306 serves as a channel region of a transistor. The second region 306b of the oxide semiconductor film 306 functions as a source region of the transistor. They function as source and drain regions.

[0149] For the oxide semiconductor film 306, refer to the description of the oxide semiconductor film 106.

[0150] For the protective insulating film 318, refer to the description of the protective insulating film 118.

[0151] For the pair of electrodes 316, refer to the description of the pair of electrodes 116.

[0152] A method for manufacturing the transistor illustrated in FIG. 7B will be described below with reference to FIGS.

[0153] As shown in FIG. 8A, a base insulating film 102 is provided on a substrate 100. A manufacturing method from formation of the oxide semiconductor film 236 over the semiconductor substrate 2 to first heat treatment For details, please refer to the explanations given in the first and second embodiments.

[0154] Next, a gate insulating film 313 is formed. The film is formed by sputtering, CVD, MBE, ALD or PLD. That's good.

[0155] Next, a conductive film 314a and a conductive film 314b are formed in this order (see FIG. 8(A)). The conductive film 314a and the conductive film 314b are similar to the conductive film 114a and the conductive film 114b. Then, the film is formed by sputtering, CVD, MBE, ALD or PLD. That's good.

[0156] Next, a second heat treatment is performed. The second heat treatment is performed in the same manner as the heat treatment described in the first embodiment. This can be done by referring to the above.

[0157] The conductive film 314a is reduced by the second heat treatment, and oxygen generated by the reduction is converted into a gate insulating film. The insulating film 313 is formed on the oxide semiconductor film 306. By this, oxygen vacancies in the oxide semiconductor film 306 and in the vicinity of the oxide semiconductor film 306 are reduced. It is possible.

[0158] In this way, the conductive film 314a is reduced, and the oxygen concentration is lower than that of the conductive film 314a. The conductive film 324a has an oxygen concentration similar to that of the conductive film 314a. The conductive film 314b is not particularly changed and becomes a conductive film 324c. (See FIG. 8(B)).

[0159] Next, the conductive film 324a, the conductive film 324b, and the conductive film 324c are processed to form a first The gate electrode 304 is formed by forming the first layer 304a, the second layer 304b, and the third layer 304c. Form.

[0160] Note that when halogen and hydrogen are present in the oxide semiconductor film, carriers may be generated. When ruthenium or ruthenium oxide is used as the conductive film 324a, halogen and Therefore, the conductive film 324 can be etched without using either oxygen or hydrogen. By etching a without using halogen or hydrogen, the threshold voltage of the transistor Fluctuations in the temperature can be suppressed.

[0161] Next, the gate insulating film 313 is processed to have a top surface shape similar to that of the gate electrode 304. A gate insulating film 312 is formed (see FIG. 8(C)). The resist mask used for forming the gate electrode 304 may be used for processing. After removing the mask, the gate electrode 304 may be used as a mask for processing. Thus, part of the surface of the oxide semiconductor film 236 is exposed.

[0162] Here, the gate insulating film 313 is not processed, and the following steps for fabricating a transistor are carried out. It's okay to proceed.

[0163] Next, an insulating film that will become the sidewall insulating film 310 is formed. The film may be formed by sputtering, CVD, MBE, ALD or PLD. Next, the insulating film that will become the sidewall insulating film 310 is subjected to highly anisotropic etching. As a result, a gate insulating film 312 and a sidewall insulating film 310 in contact with the side surfaces of the gate electrode 304 are formed. It is possible to form a transistor without processing the gate insulating film 313 (see FIG. 9(A)). When the transistor manufacturing process is advanced, the gate insulating film 312 is formed at the same time as the sidewall insulating film 310 is formed. Therefore, a gate electrode 304 and a sidewall insulating film 310 are formed. The gate insulating film is then formed. The sidewall insulating film 310 is in contact with the side surface of the gate electrode 304. The shape becomes.

[0164] Next, the oxide semiconductor film 236 is processed to form an island-shaped oxide semiconductor film. Impurities are added to the island-shaped oxide semiconductor film by using the insulating film 310 and the gate electrode 304 as a mask. The impurities are those that reduce the resistance of the oxide semiconductor film. Boron, nitrogen, fluorine, neon, aluminum, phosphorus, argon, arsenic, krypton, iridium One or more elements selected from the group consisting of indium, tin, antimony and xenon may be added. The method for this can be ion implantation or ion doping. Plasma treatment or heat treatment can be performed in an atmosphere containing impurities that reduce the resistance of the film. Preferably, an ion implantation method is used. Note that the resistance of the oxide semiconductor film is reduced by the ion implantation method. After the impurity is added, a third heat treatment may be performed. After the wall insulating film 310 is formed, impurities are added to the island-shaped oxide semiconductor film. Impurities may be added to the island-shaped oxide semiconductor film before the formation of the gate electrode 310. Impurities may be added to the island-shaped oxide semiconductor film through the gate insulating film 313, or The film 313 is processed to form a gate insulating film 312 having the same top surface shape as the gate electrode 304. Then, impurities may be added to the island-shaped oxide semiconductor film. By adding impurities to the island-shaped oxide semiconductor film in this manner, a sidewall insulating film An island-shaped region of the oxide semiconductor film overlapping with the film 310 also becomes a low-resistance region.

[0165] The region to which the impurity is added has a low resistance and becomes the second region 306b. The area that is not changed remains unchanged and becomes the first area 306a. An oxide semiconductor film 306 having a region 306a and a second region 306b is formed (FIG. 9 See (B). ).

[0166] Next, a protective insulating film is formed on the sidewall insulating film 310, the oxide semiconductor film 306, and the gate electrode 304. The protective insulating film 318 is formed by a sputtering method, referring to the protective insulating film 118. The film may be formed by using a CVD method, an MBE method, an ALD method or a PLD method.

[0167] Next, the protective insulating film 318 is processed to expose the second region 306b of the oxide semiconductor film 306. The openings are formed so that the oxide semiconductor film 306 is as close to the edge as possible. The conditions are not limited to those described above. At that time, part of the surface of the second region 306b of the oxide semiconductor film 306 is etched. Alternatively, the second region 306b may be penetrated and the base insulating film 102 may be exposed. It's okay.

[0168] Next, a pair of electrodes 31 are formed on the protective insulating film 318 and the exposed oxide semiconductor film 306. The conductive film that will become 6 is formed by sputtering, CVD, MBE, or AL. The film may be formed by the PLD method or the PLD method.

[0169] Next, the conductive film that will become the pair of electrodes 316 is processed to form the pair of electrodes 316 (FIG. 9(C) )reference.).

[0170] In the above manner, the transistor illustrated in FIG.

[0171] In addition, a method for manufacturing the transistor shown in FIG. 7B, which is different from that shown in FIG. 10 and 11.

[0172] FIG. 10(A) shows a cross-sectional view similar to FIG. 8(A). Therefore, FIG. For the explanation of FIG.

[0173] Next, the conductive film 314a and the conductive film 314b are processed to have a top surface shape similar to that of the gate electrode. A conductive film 334a and a conductive film 334b ​​are formed.

[0174] Note that when halogen and hydrogen are present in the oxide semiconductor film, carriers may be generated. When ruthenium or ruthenium oxide is used as the conductive film 334a, halogen and Therefore, the conductive film 334 can be etched without using either oxygen or hydrogen. By etching a without using halogen or hydrogen, the threshold voltage of the transistor Fluctuations in the temperature can be suppressed.

[0175] Next, the gate insulating film 313 is processed to form a gate electrode having a top surface shape similar to that of the gate electrode. An insulating film 312 is formed (see FIG. 10B). Note that the gate insulating film 313 is a conductive film. The resist mask used for processing the conductive film 314a and the conductive film 314b may be used. After removing the resist mask, the conductive film 334a and the conductive film 334b ​​are used as a mask. In this manner, part of the surface of the oxide semiconductor film 236 is exposed.

[0176] Here, the gate insulating film 313 is not processed, and the following steps for fabricating a transistor are carried out. It's okay to proceed.

[0177] Next, an insulating film that will become the sidewall insulating film 310 is formed. The film may be formed by sputtering, CVD, MBE, ALD or PLD. Next, the insulating film that will become the sidewall insulating film 310 is subjected to highly anisotropic etching. As a result, the sidewall insulating film in contact with the side surfaces of the gate insulating film 312, the conductive film 334a, and the conductive film 334b ​​is An insulating film 310 can be formed (see FIG. 10(C)).

[0178] Next, the oxide semiconductor film 236 is processed to form an island-shaped oxide semiconductor film. The insulating film 310, the gate insulating film 312, the conductive film 334a, and the conductive film 334b ​​are used as a mask. Impurities are added to the island-shaped oxide semiconductor film. The impurities are added to the island-shaped oxide semiconductor film as shown in FIG. For details, please refer to the description of impurities explained in .

[0179] The region to which the impurity is added has a low resistance and becomes the second region 306b. The area that is not changed remains unchanged and becomes the first area 306a. An oxide semiconductor film 306 having a region 306a and a second region 306b is formed (FIG. 1 See 1(A). ).

[0180] Next, a second heat treatment is performed.

[0181] The conductive film 334a is reduced by the second heat treatment, and oxygen generated by the reduction is transferred to the gate insulating film 334b. The insulating film 312 penetrates into the oxide semiconductor film 306 and reaches the vicinity of the oxide semiconductor film 306. By this, oxygen vacancies in the oxide semiconductor film 306 and in the vicinity of the oxide semiconductor film 306 are reduced. It is possible.

[0182] In this way, the conductive film 334a is reduced, and the oxygen concentration is lower than that of the conductive film 334a. The first layer 304a and the second layer 304b have the same oxygen concentration as the conductive film 334a. The conductive film 334b ​​is left unchanged as the third layer 304 In this manner, the first layer 304a, the second layer 304b and the third layer 304c are formed. A gate electrode 304 having 4c is formed (see FIG. 11(B)).

[0183] Next, a protective insulating film is formed on the sidewall insulating film 310, the oxide semiconductor film 306, and the gate electrode 304. A film of 318 is formed.

[0184] Next, the protective insulating film 318 is processed to expose the second region 306b of the oxide semiconductor film 306. The openings are formed so that the oxide semiconductor film 306 is as close to the edge as possible. The conditions are not limited to those described above. At that time, part of the surface of the second region 306b of the oxide semiconductor film 306 is etched. Alternatively, the second region 306b may be penetrated and the base insulating film 102 may be exposed. It's okay.

[0185] Next, a pair of electrodes 31 are formed on the protective insulating film 318 and the exposed oxide semiconductor film 306. Next, the conductive film that will become the pair of electrodes 316 is processed to form a pair of electrodes 316. 316 is formed (see FIG. 11(C)).

[0186] In the above manner, the transistor illustrated in FIG.

[0187] The transistor illustrated in FIG. 7B has a structure in which the oxide semiconductor film 306 and the oxide semiconductor film 306 There is little oxygen vacancy in the vicinity, and it has excellent electrical properties. Since the accompanying fluctuation in electrical characteristics is also suppressed, a semiconductor device using the transistor can be Reliability can be improved.

[0188] According to this embodiment mode, a transistor with excellent electrical characteristics can be provided. A highly reliable semiconductor device using the transistor can be provided.

[0189] Note that this embodiment mode can be used in combination with other embodiment modes as appropriate.

[0190] (Embodiment 4) In this embodiment mode, a transistor having a structure different from the transistors described in Embodiments 1 to 3 is described. The data will be described with reference to FIG.

[0191] FIG. 12A is a top view of a transistor according to one embodiment of the present invention. A cross-sectional view corresponding to the dashed line AB is shown in FIG. 12(B). For simplicity, FIG. ), the protective insulating film 418, the base insulating film 102, and the like are omitted.

[0192] The transistor shown in FIG. 12B includes a base insulating film 102 provided over a substrate 100 and a An oxide film having a first region 406a and a second region 406b provided on a base insulating film 102. a gate insulating film 412 provided on the oxide semiconductor film 406; The first layer 404a overlaps with the oxide semiconductor film 406 with the gate insulating film 412 interposed therebetween. , a gate electrode 404 having a second layer 404b and a third layer 404c; The insulating film 420 provided on the third layer 404c of the gate insulating film 412 and the gate electrode 414 are A sidewall insulating film 410 is provided in contact with the side surfaces of the electrode 404 and the insulating film 420, and an oxide semiconductor A pair of electrodes provided in contact with the second region 406b of the body film 406 and the sidewall insulating film 410. 416, a pair of electrodes 416, an insulating film 420, a sidewall insulating film 410, a gate electrode 404, and and an opening provided to cover the oxide semiconductor film 406 and to expose parts of the pair of electrodes 416. A protective insulating film 418 having an opening and a pair of electrodes 416 are formed therebetween through the opening of the protective insulating film 418. A pair of wirings 466 are provided in contact with the gate electrode 404. The first layer 404a is provided in contact with the gate insulating film 412, and the second layer 4 The third layer 404b of the gate electrode 404 is disposed on the first layer 404a, and the third layer 404c of the gate electrode 404 is disposed on the second The first region 406a of the oxide semiconductor film 406 is provided over the layer 404b. 4 and the sidewall insulating film 410. A backgate electrode may be provided under the oxide semiconductor film 406 .

[0193] Here, the first layer 404a of the gate electrode 404 is connected to the second layer 404b of the gate electrode 404. The third layer 404c of the gate electrode 404 has a lower oxygen concentration than the gate This layer has a higher electrical conductivity than the first layer 404 a and the second layer 404 b of the electrode 404 .

[0194] The first layer 404a of the gate electrode 404 is more prone to oxidation than the gate insulating film 412. The first layer 404a of the gate electrode 404 is made of a material having a high BSS free energy. The gate electrode 404 is more easily reduced than the gate insulating film 412. The first layer 404 a is less susceptible to oxidation than the gate insulating film 412 .

[0195] For the gate electrode 404, refer to the description of the gate electrode 104.

[0196] The gate insulating film 412 has oxygen permeability. Specifically, the film density is 3.2 g / cm 3 less than Alternatively, the film through which oxygen atoms can pass may vary depending on the thickness of the gate insulating film 412. However, the diffusion coefficient of oxygen atoms at temperatures between 150 and 450°C is 3×10 -16 cm 2 / sec or more, preferably 1×10 -15 cm 2 / sec or more, preferably 8 x 10 -15 c m 2 / sec or more insulating film.

[0197] For the gate insulating film 412, refer to the description of the gate insulating film 112.

[0198] In FIG. 12B, the gate insulating film 412 is formed by the gate electrode 404 and the sidewall insulating film 41 The top surface shape is the same as that of the gate electrode 100, but is not limited to this. For example, The insulating film 412 may have a top surface shape similar to that of the gate electrode 404 .

[0199] By using the gate electrode 404 and the gate insulating film 412 as described above, Oxygen is supplied from the electrode 404 to the oxide semiconductor film 406 through the gate insulating film 412. Therefore, oxygen vacancies in the oxide semiconductor film 406 and in the vicinity of the oxide semiconductor film 406 can be reduced. As a result, the amount of oxygen in the oxide semiconductor film 406 and in the vicinity of the oxide semiconductor film 406 is reduced. Fluctuations in the electrical characteristics of a transistor due to element deficiencies can be suppressed.

[0200] The sidewall insulating film 410 is an insulating film having low oxygen permeability. The insulating film must be impermeable to atomic molecules, and the diffusion coefficient of oxygen atoms must be sufficiently low to prevent heat treatment during the manufacturing process. For example, a membrane that does not allow oxygen molecules to pass through is called a membrane that does not allow oxygen atoms to pass through. The density must be high enough that elementary molecules cannot pass through. Specifically, the membrane density is 3.2 g / cm 3 The thickness of the sidewall insulating film 410 also determines whether the film is impermeable to oxygen atoms. However, the diffusion coefficient of oxygen atoms at temperatures between 150 and 450°C is 3×10 -16 cm 2 / sec Less than 1 x 10 -16 cm 2 / sec, preferably less than 5 x 10 -17 cm 2 Anything less than / sec is fine.

[0201] The sidewall insulating film 410 with low oxygen permeability prevents oxygen released from the gate electrode 404 from flowing outward. The diffusion of oxygen is reduced, and oxygen is efficiently introduced into and around the oxide semiconductor film 406. It can be supplied quickly.

[0202] The insulating film 420 is formed to prevent the pair of electrodes 416 and the gate electrode 404 from contacting each other. For the insulating film 420, refer to the description of the base insulating film 102.

[0203] For the substrate 100 and the base insulating film 102, refer to the description of the first embodiment.

[0204] Note that the first region 406a of the oxide semiconductor film 406 serves as a channel region of a transistor. The second region 406b of the oxide semiconductor film 406 functions as a source region of the transistor. They function as source and drain regions.

[0205] For the oxide semiconductor film 406, refer to the description of the oxide semiconductor film 106.

[0206] For the protective insulating film 418, refer to the description of the protective insulating film 118.

[0207] For the pair of electrodes 416 and the pair of wirings 466, refer to the description of the pair of electrodes 116.

[0208] In the transistor illustrated in FIG. 12B, a pair of electrodes 416 is formed of a low-resistance oxide semiconductor film 406. Since it is possible to make the resistance lower than that of the etched region, excellent on-state characteristics can be obtained.

[0209] In the transistor illustrated in FIG. 12B, the oxide semiconductor film 406 and the oxide semiconductor film 40 There are few oxygen vacancies near 6, and the electrical properties are excellent. A semiconductor device using the transistor can be manufactured by suppressing a change in electrical characteristics caused by the above-mentioned. The reliability of the system can be improved.

[0210] According to this embodiment mode, a transistor with excellent electrical characteristics can be provided. A highly reliable semiconductor device using the transistor can be provided.

[0211] Note that this embodiment mode can be used in combination with other embodiment modes as appropriate.

[0212] (Embodiment 5) In this embodiment, the transistor described in any of Embodiments 1 to 4 is used. The liquid crystal display device thus manufactured will be described. An example of application of the above embodiment will be described, but the present invention is not limited to this. This invention is applied to EL (Electro Luminescence) display devices, which are a type of optical device. It would be easily conceivable for a person skilled in the art to apply the disclosed embodiment.

[0213] FIG. 13 shows a circuit diagram of a liquid crystal display device that uses an active matrix driving method. , source lines SL_1 to SL_a, gate lines GL_1 to GL_b, and The pixel 2200 includes a transistor 2230 and a capacitor 2240. 2220 and a liquid crystal element 2210. A plurality of such pixels 2200 are assembled to form a liquid crystal display. When simply referring to a source line or gate line, the term "source line" is used. They may also be referred to as lines SL or gate lines GL.

[0214] The transistor 2230 is the transistor described in any of Embodiments 1 to 4. The transistors described in Embodiments 1 to 4 are made of an oxide semiconductor having good electrical characteristics. Since the transistors are made of semiconductors, a display device with high display quality can be obtained.

[0215] The gate line GL is connected to the gate of the transistor 2230, and the source line SL is connected to the gate of the transistor 2230. The drain of the transistor 2230 is connected to the source of the capacitor 2220. The capacitor 2220 is connected to one of the capacitance electrodes and one of the pixel electrodes of the liquid crystal element 2210. The other capacitance electrode and the other pixel electrode of the liquid crystal element 2210 are connected to a common electrode. The common electrode may be provided in the same layer as the gate line GL.

[0216] The gate lines GL are connected to a gate drive circuit. The transistor described in any of Embodiments 1 to 4 may be included.

[0217] The source line SL is connected to a source driver circuit. The transistor described in any of Embodiments 1 to 4 may be included.

[0218] Either or both of the gate driver circuit and the source driver circuit are provided by a separately prepared substrate. Formed on a board and then processed by COG (Chip On Glass), wire bonding, or T Use a method such as AB (Tape Automated Bonding) to connect each wiring. This may continue.

[0219] In addition, since transistors are easily damaged by static electricity, it is preferable to provide a protection circuit. The protection circuit is preferably configured using a non-linear element.

[0220] When a voltage is applied to the gate line GL so that the voltage is equal to or higher than the threshold voltage of the transistor 2230, The charge supplied from the source line SL becomes the drain current of the transistor 2230. After one row is charged, the transistor 2230 in that row is turned off. This causes the source line SL to no longer apply voltage, but the voltage stored in the capacitor 2220 The charge on the capacitor 222 in the next row can then maintain the required voltage. In this way, rows 1 to b are charged. The drain current is This is the current that flows from the drain through the channel to the source in a transistor. The on-state current flows when the gate voltage is greater than the threshold voltage.

[0221] Note that the off-state current of the transistor 2230 is small. ) enables a reduction in the display rewriting frequency, further reducing power consumption. In addition, since the capacitance of the capacitor 2220 can be further reduced, the charging time is reduced. The power consumption can be reduced.

[0222] In addition, the transistor 2230 has small fluctuations in electrical characteristics due to the operation of the transistor. Therefore, a highly reliable liquid crystal display device can be obtained.

[0223] As described above, according to one embodiment of the present invention, a display device with high display quality, low power consumption, and high reliability can be obtained. Thus, a high quality liquid crystal display device can be provided.

[0224] This embodiment mode can be used in appropriate combination with other embodiment modes.

[0225] (Embodiment 6) In this embodiment, the transistor described in any of Embodiments 1 to 4 is used. An example of manufacturing a semiconductor memory device will now be described.

[0226] A typical example of a volatile semiconductor memory device is a transistor that constitutes a memory element. By storing electric charge in a capacitor, information is stored in the DRAM (Dynamic Random Access Memory). random access memory, which uses circuits such as flip-flops to store data SRAM (Static Random Access Memory) holds the data. be.

[0227] A typical example of a non-volatile semiconductor memory device is a transistor having a gate and a channel region. There is a flash memory that has a node at a node and stores information by holding an electric charge at the node. .

[0228] Some of the transistors included in the above-mentioned semiconductor memory device are A transistor shown in any one of the above can be used.

[0229] First, a semiconductor device to which the transistor described in any of Embodiments 1 to 4 is applied The memory cell of the memory device will be described with reference to FIG.

[0230] The memory cell has a transistor Tr and a capacitor C. The MOS transistor Tr is electrically connected to the word line WL, and the MOS transistor Tr is connected to either the source or the drain of the transistor Tr. is electrically connected to the bit line BL, and the other of the source or drain of the transistor Tr is One end of the capacitor C is electrically connected to the ground, and the other end of the capacitor C is grounded. is electrically connected to the sense amplifier SAmp (see FIG. 14(A)).

[0231] The change in the voltage held in the capacitor C over time is caused by the off-current of the transistor Tr, as shown in Figure 1. As shown in Fig. 4(B), the voltage gradually decreases. Over time, the applied voltage decreases to VA, which is the limit for reading data1. This period is called the retention period T_1. In other words, in the case of a binary memory cell, during the retention period T_1 You need to refresh it.

[0232] Here, the transistor Tr is a transistor shown in any one of the first to fourth embodiments. When the capacitor is applied, the off-current is small, so that the retention period T_1 can be extended. This makes it possible to reduce the frequency of refresh, thereby reducing power consumption. For example, the off-state current is 1×10 -21 A or less, preferably 1×10 -24 A or below When a memory cell is configured using a transistor including an oxide semiconductor film, It is possible to retain data for periods ranging from a few days to several decades.

[0233] In addition, the transistor Tr may be a transistor shown in any one of the first to fourth embodiments. When the above is applied, the transistor has a small change in electrical characteristics due to the operation of the transistor. Therefore, a highly reliable semiconductor memory device can be obtained.

[0234] As described above, according to one embodiment of the present invention, a highly reliable memory cell with low power consumption can be obtained. It is possible to obtain a semiconductor memory device having the above structure.

[0235] Next, as an example different from FIG. 14, the transistor shown in any one of the first to fourth embodiments A memory cell of a semiconductor memory device to which a transistor is applied will be described with reference to FIG.

[0236] FIG. 15(A) is a circuit diagram of a memory cell and its surroundings. The transistor Tr_1, the transistor Tr_2, and the capacitor C. The gate of the transistor Tr_1 is electrically connected to the word line WL_1. One of the gate and drain of the transistor Tr_2 is electrically connected to the source line SL_1. The gate of the transistor Tr_1 is connected to the other of the source or drain of the capacitor C. The node N is electrically connected to one end of the transistor Tr_2. One of the drains is electrically connected to the drain line DL_2, and the source of the transistor Tr_2 is The other of the source and drain is electrically connected to the source line SL_2, and the other end of the capacitor C is electrically connected to the capacitance line CL.

[0237] In the nonvolatile memory shown in this embodiment, the transistor T This utilizes the fact that the apparent threshold voltage of r_2 varies. For example, in Figure 15 (B) is the voltage V of the capacitance line CL CL and the drain current I flowing through transistor Tr_2 d _ FIG. 1 is a diagram for explaining the relationship with 2.

[0238] Here, the potential of the node N can be adjusted via the transistor Tr_1. For example, the potential of the source line SL_1 is set to VDD. At this time, the potential of the word line WL_1 is set to Tr. By setting the threshold voltage Vth of the transistor Tr_1 to a potential equal to or higher than VDD, the node The potential of the word line WL_1 can be set to HIGH. By lowering the threshold voltage Vth of Tr_1 or lower, the potential of node N can be set to LOW. can.

[0239] Therefore, V shown with N=LOW CL -I d _2 curve and V shown at N=HIGH CL -I d _2 curves can be obtained. That is, at N=LOW, V CL =0V At I d Since _2 is small, the data is 0. Also, when N=HIGH, V CL =0V I d Since _2 is larger, the data becomes 1. In this way, the data can be stored. Cut.

[0240] Here, the transistor Tr_1 is a transistor shown in any one of the first to fourth embodiments. By using a transistor, the off-state current of the transistor can be made extremely small. The charge stored at node N is unintentionally transferred between the source and drain of transistor Tr_1. This prevents data from leaking to the cloud. This allows data to be stored for a long period of time. Moreover, a memory cell included in a semiconductor memory device according to one aspect of the present invention includes a transistor The threshold voltage of Tr_1 is adjusted, so the voltage required for writing is small, and the flash It is possible to reduce power consumption compared to memory, etc.

[0241] In addition, the transistor Tr_1 may be a transistor shown in any one of the first to fourth embodiments. When a transistor is applied, the change in electrical characteristics caused by the operation of the transistor is small. Therefore, a highly reliable semiconductor memory device can be obtained.

[0242] The transistor Tr_2 may be a transistor shown in any one of the first to fourth embodiments. It is okay to apply a resistor.

[0243] As described above, according to one embodiment of the present invention, a semiconductor memory device with high reliability and low power consumption can be provided. You can get a position.

[0244] This embodiment mode can be used in appropriate combination with other embodiment modes.

[0245] (Embodiment 7) The transistor described in any of Embodiments 1 to 4 or the transistor described in Embodiment 6 A CPU (Central Processing Unit) is implemented by at least partially using the semiconductor memory device. ng Unit) can be configured.

[0246] FIG. 16A is a block diagram showing a specific configuration of a CPU. The PU is provided on a board 1190 with an arithmetic logic unit (ALU). unit) 1191, ALU controller 1192, instruction decoder 11 93, interrupt controller 1194, timing controller 1195, register 1196, register controller 1197, bus interface (Bus I / F) 1 198, rewritable ROM 1199, and ROM interface (ROM I / The substrate 1190 may be a semiconductor substrate, an SOI substrate, a glass substrate, or the like. The ROM 1199 and the ROM interface 1189 are provided on a separate chip. Of course, the CPU shown in FIG. 16(A) is merely an example showing a simplified configuration. In fact, actual CPUs have a wide variety of configurations depending on their applications.

[0247] The instructions input to the CPU via the bus interface 1198 are After being input to the decoder 1193 and decoded, the ALU controller 1192 Rupture Controller 1194, Register Controller 1197, Timing Controller Entered into 1195.

[0248] ALU controller 1192, interrupt controller 1194, register controller The controller 1197 and the timing controller 1195 control various Specifically, the ALU controller 1192 controls the operation of the ALU 1191. The interrupt controller 1194 also generates a signal for the CPU program. During execution, interrupt requests from external I / O devices and peripheral circuits are handled according to their priority and mask status. The register controller 1197 determines the address of the register 1196 and processes it. It generates a process and reads and writes to register 1196 according to the CPU state.

[0249] The timing controller 1195 also includes the ALU 1191 and the ALU controller 119 2, an instruction decoder 1193, an interrupt controller 1194, and It generates a signal to control the operation timing of the register controller 1197. The timing controller 1195 generates an internal clock signal CLK1 based on the reference clock signal CLK1. The internal clock generator CLK2 is provided to generate the clock signal CLK2. Supply to the circuit.

[0250] In the CPU shown in FIG. 16A, a register 1196 is provided with a memory element. The memory element of the star 1196 can be the semiconductor memory device shown in the sixth embodiment. .

[0251] In the CPU shown in FIG. 16A, the register controller 1197 controls the ALU 1191. In accordance with the instruction from the register 1196, the register 1196 performs a hold operation. In the memory element, data is held by a flip-flop or a capacitor. If the data is held by a flip-flop, the register The power supply voltage is supplied to the memory element in the register 1196. If the data is held, the data is rewritten to the capacitor and register 1196 is The supply of power supply voltage to the memory elements in the semiconductor memory device can be stopped.

[0252] Regarding the power supply cutoff, as shown in FIG. 16(B) or FIG. 16(C), A switching element is installed between the nodes to which the power supply potential VDD or VSS is applied. The circuit of FIG. 16(B) and FIG. 16(C) are explained below. Do the following.

[0253] In FIG. 16B and FIG. 16C, a switch for controlling the supply of a power supply potential to a memory element In one embodiment, the transistor described in any one of Embodiments 1 to 4 is used as a switching element. Here is an example.

[0254] The memory device shown in FIG. 16B includes a switching element 1141 and a memory element 1142. Specifically, each of the memory elements 1142 has The semiconductor memory device described in Embodiment 6 can be used. Each of the memory elements 1142 is connected to a high level through a switching element 1141. A power supply potential VDD is supplied to the memory element group 1143. The element 1142 is supplied with the potential of the signal IN and the potential of the low-level power supply potential VSS. There are.

[0255] In FIG. 16B, the switching element 1141 is the same as that in the first to fourth embodiments. A transistor shown in any one of the above is used, and a signal S Switching is controlled by igA.

[0256] In FIG. 16B, the switching element 1141 has only one transistor. However, the present invention is not limited to this configuration, and a plurality of transistors may be included. In the case where the switching element 1141 has a plurality of transistors functioning as switching elements, In this case, the plurality of transistors may be connected in parallel or in series. Alternatively, a combination of series and parallel connections may be used.

[0257] In addition, in FIG. 16C, each memory element 1142 included in the memory element group 1143 is A low-level power supply potential VSS is supplied via a switching element 1141. 1 shows an example of a memory device. The switching element 1141 controls the The supply of the low-level power supply potential VSS to each of the memory elements 1142 can be controlled. Cut.

[0258] A switch is provided between the memory element group and a node to which the power supply potential VDD or VSS is applied. When a switching element is provided to temporarily stop the CPU operation and the supply of power voltage is stopped, It is possible to retain data even in a low power consumption state, and power consumption can be reduced. For example, a user of a personal computer may input information into an input device such as a keyboard. Even during a pause, the CPU can be stopped, thereby reducing power consumption. It is possible.

[0259] Here, we have taken the CPU as an example, but the same can also be said for DSP (Digital Signal Processor). processor), custom LSI, FPGA (Field Programmable Gauge It can also be applied to LSIs such as MOSFET's (MOSFET gate arrays).

[0260] This embodiment mode can be implemented in appropriate combination with any of the above embodiment modes.

[0261] (Embodiment 8) In this embodiment, an electronic device to which at least one of the first to seventh embodiments is applied An example of the device will now be described.

[0262] FIG. 17A shows a portable information terminal. The portable information terminal shown in FIG. 17A has a housing 93. 00, a button 9301, a microphone 9302, a display unit 9303, and a speaker 9 The present invention is provided with a mobile phone having a function as a mobile phone. One embodiment can be applied to the display unit 9303 and the camera 9305. However, one embodiment of the present invention is applied to a computing device, a wireless circuit, or a memory circuit inside the main body. It is also possible.

[0263] FIG. 17B shows a display. The display shown in FIG. 17B is a display device. 0 and a display portion 9311. One embodiment of the present invention is applied to the display portion 9311. By applying one embodiment of the present invention, it is possible to achieve high display quality, low power consumption, and high reliability. This makes it possible to provide a highly reliable display.

[0264] FIG. 17C shows a digital still camera. The device includes a housing 9320, a button 9321, a microphone 9322, and a display unit 9323. One embodiment of the present invention can be applied to the display portion 9323. Although not shown, one embodiment of the present invention can also be applied to a memory circuit or an image sensor.

[0265] FIG. 17(D) shows a portable information terminal that can be folded in two. The portable information terminal includes a housing 9630, a display unit 9631a, a display unit 9631b, and a fastener 9633. , and an operation switch 9638. In addition, although not shown, the arithmetic unit inside the main body, wireless One embodiment of the present invention can also be applied to a line circuit or a memory circuit.

[0266] The display unit 9631a and / or the display unit 9631b may be partially or entirely touch screen. The display can be used as a touch panel, and data can be entered by touching the displayed operation keys. can.

[0267] By using a semiconductor device according to one embodiment of the present invention, the performance and reliability of an electronic device can be improved. It can be improved.

[0268] This embodiment mode can be used in appropriate combination with other embodiment modes. EXAMPLES

[0269] In this embodiment, secondary ion mass spectrometry (SIMS) Using NMR Spectrometry, the behavior of oxygen in silicon oxide films due to heat treatment was investigated. explain.

[0270] SIMS was performed using a quadrupole secondary ion mass spectrometer PHI A manufactured by ULVAC-PHI Inc. DEPT1010 was used.

[0271] The method for preparing the sample is as follows.

[0272] First, a quartz substrate is prepared, and then a quartz substrate is 18 O 2A silicon oxide film was formed using the above method. The silicon oxide film was formed by sputtering. A 25 sccm argon and oxygen ( 18 O 2 ) at 25sccm The pressure was controlled to 0.4 Pa in the atmosphere, the substrate heating temperature during film formation was 100°C, and The power was set to 1.5 kW (13.56 MHz) and a film was formed to a thickness of 300 nm.

[0273] Where: 18 O 2 is an isotope of the oxygen atom with an atomic weight of 18 ( 18 O It refers to a child.

[0274] next, 18 O 2 A silicon oxide film was formed on the silicon oxide film using the above method. The silicon film was formed by sputtering. The pressure was set to 25 sccm in an atmosphere containing argon and oxygen at 25 sccm. The pressure was controlled at 0.4 Pa, the substrate heating temperature during film formation was 100°C, and the film formation power was 1.5 kW (13. The silicon oxide film was formed at a thickness of 100 nm using a frequency of 56 MHz. 18 Does not contain O.

[0275] The samples prepared as described above were heated in a nitrogen atmosphere at 150°C, 250°C, and 35°C. Heat treatment was performed for 1 hour at temperatures of 0°C and 550°C. We also prepared samples without the deposition (called as-depo).

[0276] Figure 18 shows the results of SIMS. 18 The results of the depth profile analysis of O are shown in FIG. The indications of epo, 150℃, 250℃, 350℃ and 550℃ indicate the heat treatment conditions. In addition, the area to the right of the dashed line in FIG. 18 O 2 Oxide film formed using Silicon film (silicon oxide ( 18 O 2 ) is used to indicate

[0277] As shown in Figure 18, by performing heat treatment, 18 O 2 The silicon oxide film was then oxidized. To silicon membrane 18 It was found that O diffuses. In addition, the higher the heat treatment temperature, 18 O 2 From silicon oxide film formed using 18 The amount of O diffusing It was found that there are many

[0278] From the above, even in the heat treatment at about 150° C., the oxygen in the silicon oxide film is about 40 nm. was found to spread.

[0279] From this example, it is understood that oxygen is diffused in the silicon oxide film by the heat treatment. EXAMPLES

[0280] In this example, the oxygen permeability of an aluminum oxide film is described using TDS analysis.

[0281] The gas emission was evaluated using a thermal desorption analyzer EMD-WA1000S / W manufactured by Electronic Science Corporation. was used.

[0282] The method for preparing the sample is as follows.

[0283] First, a silicon wafer was prepared, and a thermal oxide film was formed on the silicon wafer. The deposition was performed in an oxygen atmosphere containing 3% HCl at a temperature of 950° C., and the thickness was 100 nm.

[0284] Next, a silicon oxide film was formed on the thermal oxide film.

[0285] The silicon oxide film was formed by sputtering. The pressure was controlled to 0.4 Pa in an atmosphere containing 50 sccm of oxygen. The substrate heating temperature was 100°C, the deposition power was 2kW (13.56MHz), and the deposition rate was 300nm. The film was formed to a thickness of 100 nm. The sample thus far is designated as sample A.

[0286] Next, an aluminum oxide film was formed on the silicon oxide film.

[0287] The aluminum oxide film was formed by sputtering. The target was used in an atmosphere containing 25 sccm of argon and 25 sccm of oxygen. The pressure was controlled at 0.4 Pa, the substrate heating temperature during film formation was set at 250°C, and the film formation power was set at 2.5 The film was deposited to a thickness of 10 nm at a frequency of 13.56 kW (13.56 MHz). do.

[0288] In this manner, samples A and B were prepared. Next, gas desorption from each sample was evaluated. It was worth it.

[0289] The ion intensity of the gas with M / z of 32 as determined by TDS analysis is shown in FIG. ) is based on the TDS analysis of sample A, which does not have an aluminum oxide film on the silicon oxide film. The ion intensity of the gas with M / z of 32. Also, FIG. 19(B) shows the ion intensity of the gas with M / z of 32 on the silicon oxide film. The ion intensity of the gas with M / z of 32 in the TDS analysis of sample B with an aluminum chloride film was be.

[0290] According to the TDS analysis of sample A shown in FIG. 19(A), the substrate temperature was 200° C. or more and 400° C. or less. The release of gas with M / z 32 was confirmed. The amount of released oxygen was converted to 5.0 ×10 20 atoms / cm 3 It was.

[0291] On the other hand, the TDS analysis of sample B shown in FIG. 19(B) shows that the substrate temperature is 200° C. or higher and 400° C. or lower. Below 10°C, almost no desorption of the gas with M / z 32 was observed.

[0292] Comparing sample A and sample B, it is found that the oxide film on the silicon oxide film releases oxygen by heat treatment. By providing a 10 nm aluminum film, the outward diffusion of oxygen released from the silicon oxide film It was found that this could be prevented.

[0293] This example shows that the aluminum oxide film has low oxygen permeability. EXAMPLES

[0294] In this embodiment, TDS was used to prepare yttria-stabilized zirconia (YSZ). This paper explains the oxygen permeability of a membrane made of yttrium oxide and yttrium oxide.

[0295] The gas emission was evaluated using a thermal desorption analyzer EMD-WA1000S / W manufactured by Electronic Science Corporation. was used.

[0296] The method for preparing the sample is as follows.

[0297] First, a silicon wafer was prepared, and a silicon oxide film was formed on the silicon wafer.

[0298] The silicon oxide film was formed by sputtering. The test was performed in an atmosphere containing 25 sccm of argon and 25 sccm of oxygen at a pressure of 1000 MPa. The pressure was controlled to 0.4 Pa, the substrate heating temperature during film formation was 100°C, and the film formation power was 1.5 kW (1 The film was deposited to a thickness of 300 nm at a frequency of 3.56 MHz.

[0299] Next, a YSZ film was formed on the silicon oxide film.

[0300] The YSZ film was formed by sputtering. The mixture was cooled to room temperature and cooled to 200°C. The ratio of yttrium oxide to ruthenium oxide was 92:8 (molar ratio). The pressure was controlled to 0.4 Pa in an atmosphere containing 20 sccm of nitrogen and 20 sccm of oxygen. The substrate heating temperature was room temperature, the deposition power was 250 W (13.56 MHz), and the thickness was 10 nm. The film was formed.

[0301] The samples were prepared as described above. Next, gas desorption from the samples was evaluated.

[0302] FIG. 20 shows the ion intensity of the gas with M / z of 32 as determined by TDS analysis.

[0303] The TDS analysis of the sample shown in Figure 20 showed that the M / z However, almost no gas desorption was observed.

[0304] Therefore, by providing a 10 nm YSZ film on the silicon oxide film, the emission from the silicon oxide film It was found that the outward diffusion of oxygen can be prevented.

[0305] This example shows that the YSZ film has low oxygen permeability. [Explanation of symbols]

[0306] 100 Substrates 102 Undercoat insulating film 104 Gate electrode 104a First Layer 104b Second layer 104c Third Layer 105 Gate electrode 105a First Layer 105b Second Layer 106 Oxide semiconductor film 112 Gate insulating film 114a Conductive film 114b Conductive film 116 Pair of Electrodes 118 Protective insulating film 124a Conductive film 124b Conductive film 136 Oxide Semiconductor Film 204 Gate electrode 204a First Layer 204b Second Layer 204c Third Layer 205 Gate electrode 205a First Layer 205b Second Layer 206 Oxide Semiconductor Film 212 Gate insulating film 214a Conductive film 214b Conductive film 216 Pair of Electrodes 224a Conductive film 224b Conductive film 224c conductive film 236 Oxide Semiconductor Film 304 Gate electrode 304a First Layer 304b Second Layer 304c Third Layer 306 Oxide Semiconductor Film 306a First Area 306b Second Area 310 Sidewall insulating film 312 Gate insulating film 313 Gate insulating film 314a Conductive film 314b Conductive film 316 Pair of Electrodes 318 Protective insulating film 324a Conductive film 324b Conductive film 324c conductive film 334a Conductive film 334b Conductive film 404 Gate electrode 404a First Layer 404b Second Layer 404c Third Tier 406 Oxide Semiconductor Film 406a First Area 406b Second Area 410 Sidewall insulating film 412 Gate insulating film 416 Pair of Electrodes 418 Protective insulating film 420 Insulating film 466 Pair of Wires 1141 Switching element 1142 Memory element 1143 Memory Element Group 1189 ROM Interface 1190 Board 1191 ALU 1192 ALU Controller 1193 Instruction Decoder 1194 Interrupt Controller 1195 Timing Controller 1196 Registers 1197 Register Controller 1198 Bus Interface 1199 ROM 2200 pixels 2210 Liquid crystal element 2220 Capacitor 2230 Transistor 9300 Chassis 9301 Button 9302 Microphone 9303 Display section 9304 Speaker 9305 Camera 9310 Chassis 9311 Display section 9320 Chassis 9321 Button 9322 Microphone 9323 Display section 9630 Case 9631a Display section 9631b Display section 9633 Fasteners 9638 Operation Switch

Claims

1. an oxide semiconductor film; a gate insulating film on the oxide semiconductor film; a gate electrode on the gate insulating film, the oxide semiconductor film contains oxygen supplied from a conductive film which is to become the gate electrode through a first insulating film which is to become the gate insulating film.

2. an oxide semiconductor film; a gate insulating film on the oxide semiconductor film; a gate electrode on the gate insulating film; a second insulating film provided so as to cover a side surface of the gate electrode and a side surface of the gate insulating film; the oxide semiconductor film contains oxygen supplied from a conductive film which is to be the gate electrode through a first insulating film which is to be the gate insulating film, The second insulating film is less permeable to oxygen than the first insulating film.

3. In claim 1 or 2, The second insulating film has an oxygen permeability lower than that of the first insulating film.

4. In any one of claims 1 to 3, A semiconductor device, wherein the second insulating film has a lower oxygen diffusion coefficient than the first insulating film.

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