Crystal, laminate structure, semiconductor device, electronic apparatus, and system

Abstract

To provide a crystal having excellent electric characteristics useful in a semiconductor device or the like, and a laminate structure.SOLUTION: A crystal includes oxide semiconductor having a rutile structure as a main component. The oxide semiconductor contains germanium, and is a p-type semiconductor. The crystal having the area of 100 μm2 or more, being membranous, having the film thickness or 1 μm or more, and having the surface roughness of 10 nm or less, is used, for example, for an application of a semiconductor device.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a crystal and a layered structure useful for a semiconductor device. [Background technology]

[0002] Ga2O3 has been attracting attention as a promising ultra-wide bandgap (UWBG) semiconductor for future power electronics devices.

[0003] However, Ga2O3 has the problem that it is difficult to fabricate a p-type semiconductor, and it is not easy to make it inexpensive, so there are still many challenges to overcome before it can be widely used. In recent years, rutile germanium dioxide (r-GeO2) has been studied as a new UWBG semiconductor (band gap 4.44-4.68 eV). Rutile germanium dioxide can be made into n-type and p-type semiconductors and can be produced inexpensively, so it is expected to be a UWBG semiconductor to replace Ga2O3. For example, a laminated structure in which an r-GeO2 crystal film is laminated on an r-TiO2 (001) substrate is being studied (Non-Patent Document 1, Patent Document 1). However, Non-Patent Document 2 was submitted as an Erratum after the peer review of Non-Patent Document 1 (Non-Patent Document 2), and it was found that the crystal grains (abnormal grains) described in Non-Patent Document 1 and Patent Document 1 were rutile germanium dioxide crystals, and the other parts were amorphous phases. That is, the amorphous phase was formed in most parts, and even if a crystal phase was formed, the crystal grains were only formed in a part. Therefore, a method for producing a crystal film with excellent electrical control has been eagerly awaited. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] Takane, K. Kaneko, “Establishment of a growth route of crystallized rutile GeO2 thin film (≧ 1 mm / h) and its structural properties” Applied Physics Letters Vol.119, pp.062104(1-6) (2021). [Non-Patent Document 2] Takane, K. Kaneko, Erratum: “Establishment of a growth route of crystallized rutile GeO2 thin film (≧1 μm / h) and its structural properties” Applied Physics Letters Vol.120, 099903(1-3) (2022). [Patent documents]

[0005] [Patent Document 1] International Publication No. 2023 / 008454 Summary of the Invention [Problem to be solved by the invention]

[0006] An object of the present invention is to provide a crystal and a layered structure having excellent electrical properties useful for semiconductor devices and the like. [Means for solving the problem]

[0007] As a result of intensive research to achieve the above-mentioned object, the inventors newly developed a mist CVD apparatus using a guide partition, and by using the mist CVD apparatus using the guide partition, they succeeded in creating a crystal whose main component is an oxide semiconductor having a rutile structure, where the oxide semiconductor contains germanium and is a p-type semiconductor. They found that the obtained crystal has excellent crystallinity and is useful for semiconductor devices and the like, and discovered that such a crystal can solve the above-mentioned conventional problems in one fell swoop. After obtaining the above findings, the present inventors conducted further studies and completed the present invention.

[0008] That is, the present invention relates to the following inventions. [1] A crystal mainly composed of an oxide semiconductor having a rutile structure, the oxide semiconductor containing germanium and being a p-type semiconductor. [2] 100μm 2 The crystal according to [1] above, having an area of ​​at least 100 nm. [3] The crystal according to [1] above, which is in the form of a membrane. [4] The crystal according to [3] above, having a film thickness of 1 μm or more. [5] The crystal according to [1] above, having a surface roughness of 10 nm or less. [6] The crystal according to [1] above, which is a single crystal. [7] The crystal according to [1] above, having an electrical resistivity of 10 Ωcm or less. [8] The crystal film according to [1] above, which forms an ohmic contact with a metal layer. [9] A laminated structure in which a crystal is laminated on a crystal substrate directly or via another layer, the crystal being the crystal described in [1] above.

[10] A laminated structure in which an ohmic contact is formed between a metal layer and a crystal, the crystal being the crystal described in [1] above.

[11] The laminate structure according to

[10] above, wherein the metal layer contains one or more metal elements selected from the d block metal elements and / or p block metal elements of the periodic table.

[12] The laminate structure according to

[10] , wherein the metal layer contains indium.

[13] A semiconductor device including a crystal or a laminated structure, characterized in that the crystal is the crystal film described in claim 1, and the laminated structure is the laminated structure described in

[10] or

[11] .

[14] The semiconductor device according to

[13] above, which is a power device.

[15] The semiconductor device according to

[13] , which is a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT) or a light emitting diode (LED).

[16] An electronic device including a semiconductor device, characterized in that the semiconductor device is the semiconductor device described in

[13] above.

[17] A system including an electronic device, characterized in that the electronic device is the electronic device described in

[16] . Effect of the Invention

[0009] The crystal and layered structure of the present invention are useful for semiconductor devices and the like, and exhibit excellent electrical characteristics. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a schematic diagram of a film forming apparatus (mist CVD) preferably used in the present invention. [Diagram 2] FIG. 1 is a schematic diagram showing an atomization device preferably used in the present invention. [Diagram 3] FIG. 2 is a diagram showing the results of XRD diffraction in Example 1. [Figure 4] FIG. 2 is a diagram showing an SEM image in Example 1. [Diagram 5] FIG. 2 is a diagram showing an EDS image in Example 1. [Figure 6] FIG. 2 is a diagram showing an AFM image in Example 1. [Figure 7] FIG. 2 is a diagram showing a sample in which an ohmic electrode is formed on a crystal film in Example 1. [Figure 8] FIG. 8 is a diagram showing the results of ohmic measurements using the sample of FIG. 7. [Figure 9] FIG. 1 is a diagram illustrating a preferred example of a Schottky barrier diode (SBD) according to the present invention. [Figure 10] 1 is a diagram illustrating a preferred example of a high electron mobility transistor (HEMT) of the present invention. [Figure 11] FIG. 1 is a diagram showing a schematic diagram of a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) of the present invention. [Figure 12] FIG. 1 is a diagram illustrating a preferred example of a junction field effect transistor (JFET) of the present invention. [Figure 13] 1 is a diagram illustrating a preferred example of an insulated gate bipolar transistor (IGBT) according to the present invention; [Figure 14] FIG. 1 is a diagram showing a schematic diagram of a preferred example of a light-emitting element (LED) of the present invention. [Figure 15] FIG. 1 is a diagram illustrating a preferred example of a junction barrier Schottky diode (JBS) of the present invention. [Figure 16] FIG. 2 is a schematic cross-sectional side view of a spray device preferably used in the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] The crystal of the present invention is a crystal mainly composed of an oxide semiconductor having a rutile structure, the oxide semiconductor containing germanium, and being a p-type semiconductor. 2 It is preferable that the crystal has an area of ​​1 μm or more, and is preferably a single crystal film. According to such a preferred range, the semiconductor characteristics can be improved. It is also preferable that the crystal is in the form of a film, and the film thickness is preferably 1 μm or more. According to such a preferred range, the withstand voltage can be improved. In the present invention, it is also preferable that the surface roughness is 10 nm or less. According to such a preferred range, the semiconductor device can be manufactured with more industrial advantages. In the present invention, the electrical resistivity of the crystal is preferably 10 Ωcm or less. In the present invention, the electrical resistivity is measured using a four-probe measuring device in accordance with the four-probe method (JIS H 0602: Resistivity measurement method for silicon single crystals and silicon wafers by the four-probe method). Within such a preferred range, the electrical characteristics can be made better.

[0012] The laminated structure of the present invention is characterized in that the crystal film is laminated on a crystal substrate directly or via another layer. In this specification, "film" can be read as "layer". The "laminated structure" is a structure including one or more crystal layers, and may include a layer other than a crystal layer (e.g., an amorphous layer). The crystal layer is preferably a single crystal layer, but may be a polycrystalline layer. The laminated structure of the present invention is characterized in that an ohmic contact is formed between a metal layer and a crystal, and the crystal is the crystal. The metal layer preferably includes one or more metal elements selected from d-block metal elements and / or p-block metal elements of the periodic table. Examples of the d-block metal elements include Sc, Y, Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, Mn, Tc, Re, Fe, Ru, Os, Co, Rh, Ir, Pt, Au, Hg, Zn, Cd, and Pd. Examples of the p-block metal element include Al, Ga, In, Sn, Pb, Tl, Bi, and Po. In the present invention, it is more preferable that the metal layer contains indium. According to such a preferable range, the ohmic characteristics can be improved.

[0013] The crystals are, for example, GeO2 crystal films and mixed crystal films thereof, formed by using the film forming apparatus shown in FIG. By forming a film, it can be obtained more easily. Also, it is possible to appropriately perform doping using the film forming apparatus. The doped crystal can be suitably used as a semiconductor film or semiconductor layer, and an n-type dopant or a p-type dopant can be applied to conventional doping means in oxide semiconductors. Examples of the n-type dopant include antimony (Sb), arsenic (As), bismuth (Bi), fluorine (F), niobium (Nb), vanadium (V), tantalum (Ta), or tungsten (W). Examples of the P-type dopant include aluminum (Al), gallium (Ga), or indium (In). In the present invention, the laminated structure obtained in this manner is also included in the present invention.

[0014] The crystal substrate is not particularly limited as long as it does not impede the object of the present invention, and may be a known substrate, an insulating substrate, a conductive substrate, or a semiconductor substrate. It may be a single crystal substrate or a polycrystalline substrate. The crystal substrate may be a substrate having a metal film on its surface. In addition, when the crystal substrate is a conductive substrate, a vertical device can be fabricated without removing the substrate. The crystal structure of the crystal substrate is also not particularly limited as long as it does not impede the object of the present invention, and may be a known crystal substrate. Examples of the crystal structure of the crystal substrate include a hexagonal crystal structure, a cubic crystal structure, and a tetragonal crystal structure. Examples of the crystal substrate having a hexagonal crystal structure include a GaN substrate, a SiC substrate, or a sapphire substrate (a-plane sapphire, m-plane sapphire, c-plane sapphire substrate, and r-plane sapphire substrate). Examples of the crystal substrate having a tetragonal crystal structure include a GeO2 substrate, a SrTiO3 substrate, a TiO2 substrate, or a MgF2 substrate. Examples of the crystal substrate having a cubic crystal structure include a Si substrate or a SiC substrate. The crystal substrate may have an off-angle, specifically, for example, from 0.1° to 10°.

[0015] The crystal or the laminated structure is used as it is or after a known processing means such as peeling off of the substrate is applied, for example, by using a known means for a semiconductor device. Examples of the semiconductor device include a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT), or a light emitting diode (LED). The semiconductor device may be a module equipped with the semiconductor device, or an electronic device equipped with the semiconductor device and its parts, and is useful for various applications, and is preferably applied to a power device in particular. The semiconductor device can be classified into a horizontal element (horizontal device) in which an electrode is formed on one side of the semiconductor layer, and a vertical element (vertical device) in which an electrode is formed on both the front and back sides of the semiconductor layer, and in the present invention, the semiconductor device can be suitably used for both a horizontal device and a vertical device.

[0016] Examples of semiconductor devices preferably used in the present invention will be described in more detail below with reference to the drawings, but the present invention is not limited to these examples. Note that the following is a preferred example in which the oxide semiconductor in the crystal or stacked structure contains germanium and a crystal layer that is a p-type semiconductor is used as a semiconductor layer.

[0017] 9 shows a preferred example of a Schottky barrier diode (SBD) including an n-type semiconductor layer 101a, an n+ type semiconductor layer 101b, a p-type semiconductor layer 102, a metal layer 103, an insulator layer 104, a Schottky electrode 105a, and an ohmic electrode 105b. The metal layer 103 is made of a metal such as Al, and covers the Schottky electrode 105a.

[0018] FIG. 10 shows a preferred example of a high electron mobility transistor (HEMT) including an n-type semiconductor layer 121a having a wide bandgap, an n-type semiconductor layer 121b having a narrow bandgap, an n+-type semiconductor layer 121c, a p-type semiconductor layer 123, a gate electrode 125a, a source electrode 125b, a drain electrode 125c, and a substrate 129.

[0019] 11 shows a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) including an n-type semiconductor layer 131a, a first n+ type semiconductor layer 131b, a second n+ type semiconductor layer 131c, a p-type semiconductor layer 132, a p+ type semiconductor layer 132a, a gate insulating film 134, a gate electrode 135a, a source electrode 135b, and a drain electrode 135c. The p+ type semiconductor layer 132a may be a p-type semiconductor layer or may be the same as the p-type semiconductor layer 132.

[0020] FIG. 12 shows a preferred example of a junction field effect transistor (JFET) including an n-type semiconductor layer 141a, a first n+ type semiconductor layer 141b, a second n+ type semiconductor layer 141c, a p-type semiconductor layer 142, a gate electrode 145a, a source electrode 145b and a drain electrode 145c.

[0021] FIG. 13 shows a preferred example of an insulated gate bipolar transistor (IGBT) including an n-type semiconductor layer 151, an n-type semiconductor layer 151a, an n+ type semiconductor layer 151b, a p-type semiconductor layer 152, a gate insulating film 154, a gate electrode 155a, an emitter electrode 155b, and a collector electrode 155c.

[0022] (LED) An example of the semiconductor device of the present invention being a light emitting diode (LED) is shown in Fig. 14. The semiconductor light emitting device in Fig. 14 includes an n-type semiconductor layer 161 on a second electrode 165b, and a light emitting layer 163 is laminated on the n-type semiconductor layer 161. A p-type semiconductor layer 162 is laminated on the light emitting layer 163. A light-transmitting electrode 167 that transmits light generated by the light emitting layer 163 is provided on the p-type semiconductor layer 162, and a first electrode 165a is laminated on the light-transmitting electrode 167. The semiconductor light emitting device in Fig. 114 may be covered with a protective layer except for the electrode portion.

[0023] Examples of materials for the translucent electrode include conductive oxide materials containing indium (In) or titanium (Ti). More specifically, examples include In2O3, ZnO, SnO2, Ga2O3, TiO2, CeO2, or mixed crystals of two or more of these, or doped materials thereof. The translucent electrode can be formed by providing these materials by a known means such as sputtering. After the translucent electrode is formed, thermal annealing may be performed to make the translucent electrode transparent.

[0024] In the semiconductor light-emitting element of FIG. 14, the first electrode 165a is a positive electrode and the second electrode 165b is a negative electrode, and by passing a current through both of them to the p-type semiconductor layer 162, the light-emitting layer 163, and the n-type semiconductor layer 161, the light-emitting layer 163 emits light.

[0025] Examples of materials for the first electrode 165a and the second electrode 165b include metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, Ag, or the like, or alloys thereof, metal oxide conductive films such as tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), indium zinc oxide (IZO), or the like, organic conductive compounds such as polyaniline, polythiophene, or polypyrrole, or mixtures thereof, etc. The method for forming the electrode film is not particularly limited, and the electrode can be formed on the substrate according to a method appropriately selected from wet methods such as printing, spraying, and coating, physical methods such as vacuum deposition, sputtering, and ion plating, and chemical methods such as CVD and plasma CVD, etc., taking into consideration the suitability of the material.

[0026] FIG. 15 shows a main part of a junction barrier Schottky diode (JBS) which is one of the preferred embodiments of the present invention. The JBS in FIG. 13 includes an ohmic electrode 1020, an n-type semiconductor layer 1010a, an n+ type semiconductor layer 1010b, a Schottky electrode 1030, and an electric field relaxation region 1060. The Schottky electrode 1030 includes a metal layer 1030a, a metal layer 1030b, and a metal layer 1030c. In the semiconductor device in FIG. 15, the outer end of the metal layer 1030a and / or the metal layer 1030b as the second electrode layer is located outside the outer end of the metal layer 1030c as the first electrode layer. In the semiconductor device in FIG. 15, the region of the electric field relaxation region 1060 includes at least two electric field relaxation regions 1060 in a plane including at least a part of the portion of the second electrode layer located outside the outer end of the first electrode layer, and the outer end of the second electrode. In the semiconductor device of FIG. 15, the electric field relaxation region 1060 is made of a p-type semiconductor, and forms a PN junction with the n-type semiconductor layer 1010a.

[0027] The means for forming each layer in Fig. 15 is not particularly limited as long as it does not impede the object of the present invention, and may be any known means. For example, a means for forming a film by a vacuum deposition method, a CVD method, a sputtering method, or various coating techniques, followed by patterning by a photolithography method, or a means for directly patterning by a printing technique, etc., may be mentioned. EXAMPLES

[0028] Example 1 Fig. 1 is a diagram showing an example of a preferred embodiment of a film-forming apparatus when the atomizing device of the present invention is used as a film-forming atomizing stage. The film-forming apparatus 19 is composed of a film-forming sample 20, a sample stage 21, a carrier gas source 22a, a carrier gas source 22b, a flow rate control valve 23a, a flow rate control valve 23b, a film-forming chamber 27, a heater 28, and an atomizing device 30. The atomizing device 30 is composed of a raw material partition 24, a raw material liquid for atomization 24a, an ultrasonic transmission base material 24b, a stage 24c, an ultrasonic vibrator 26, a guide partition 31, an ultrasonic transmission liquid tank 35, and an ultrasonic transmission liquid 36. Fig. 2 is a diagram showing an example of another preferred embodiment of a film-forming apparatus when the atomizing device of the present invention is used as a film-forming atomizing stage. The atomizing device 30 is composed of a raw material partition wall 24, a raw material liquid for atomization 24a, an ultrasonic transmission substrate 24b, a stand 24c, an ultrasonic vibrator 26, a guide partition wall 31, an ultrasonic transmission liquid tank 35, and an ultrasonic transmission liquid 36. The sample stage 21 is made of quartz, and the surface on which the film-forming sample 20 is placed is inclined from the horizontal plane. By making both the film-forming chamber 27 and the sample stage 21 from quartz, it is possible to prevent impurities from the device from being mixed into the crystal film formed on the film-forming sample 20. The raw material solution 24a is contained in the mist generating source 24. The guide partition wall 31 is in contact with the ultrasonic transmission substrate 38. Figure 14 is a schematic diagram showing a cross-sectional view of the atomizing device used in the present invention as seen from the side. The atomizing device 30 in Figure 14 is composed of a raw material partition wall 24, an ultrasonic transmission substrate 24b, a stand 24c, an ultrasonic vibrator 26, a guide partition wall 31, and an ultrasonic transmission liquid tank 35. The guide partition 31 is in contact with the ultrasonic wave transmission liquid tank 35. By using the guide partition 31, the ultrasonic waves generated by the ultrasonic transducer 26 are transmitted to the raw material partition 24 more efficiently.

[0029] Next, a TiO2 (001) substrate with a square shape of 10 mm on a side and an average thickness of 500 μm was placed on the sample stage 21 as the film-forming sample 20, and the heater 28 was operated to raise the temperature in the film-forming chamber 27 to 900 °C. Next, the flow rate control valve 23 was opened to supply carrier gas from the carrier gas source 22 into the film-forming chamber 27, and after the atmosphere in the film-forming chamber 27 was sufficiently replaced with the carrier gas, the flow rate of the carrier gas was adjusted to 3 L / min. Oxygen gas was used as the carrier gas.

[0030] Next, the ultrasonic vibrator 26 was vibrated at 3.0 MHz, and the vibration was propagated to the raw material solution 24a through the ultrasonic transmitter 25a, thereby atomizing the raw material solution 24a to generate raw material fine particles. The raw material fine particles were introduced into the film formation chamber 27 by the carrier gas, reacted in the film formation chamber 27, and formed a crystalline film of GeTiO2 having a tetragonal rutile structure on the film formation sample 20 by a CVD reaction on the film formation surface of the film formation sample 20. The film thickness was 1.3 μm.

[0031] The obtained crystalline film was measured using an X-ray diffraction apparatus. Figure 2 shows the results of the XRD analysis. As is clear from Figure 2, the obtained crystalline film was an r-GeTiO2 crystalline film with a tetragonal rutile structure. In addition, a GeTiO2 single crystal film with good crystallinity was formed on the substrate.

[0032] The surface of the obtained crystal film was observed using SEM. Figure 3 shows an SEM image. As is clear from Figure 3, GeTiO2 crystals with excellent surface smoothness and good crystallinity were formed. When the surface of the obtained crystal film was observed using EDS, as is clear from Figure 4, a crystal film was formed over the entire surface to a thickness of 100 μm. 2 It was found that the above-mentioned formation area was formed.

[0033] In addition, when the surface of the obtained crystal film was observed using an atomic force microscope (AFM), it was found that the surface roughness (RMS) based on JIS B0601 was 0.07 nm, as shown in Figure 5, indicating excellent surface smoothness.

[0034] An ohmic electrode was formed on the obtained crystal film using indium as shown in Figure 7, and ohmic measurements were performed. The results are shown in Figure 8. As is clear from Figure 8, it was found to have excellent ohmic characteristics. Furthermore, Hall effect measurements showed that the carrier type was "p" and the electrical resistivity was 0.093 Ωcm. [Industrial Applicability]

[0035] The crystal and layered structure of the present invention are suitable for use in, for example, semiconductor devices. [Explanation of symbols]

[0036] 19 Film forming equipment 20 Film sample 21 Sample stage 22a Carrier gas source 22b Dilution gas source 23a Flow control valve 23b Flow control valve 24 Raw material bulkhead 24a Raw material liquid for atomization 24b Ultrasonic transparent base material 24c units 26 Ultrasonic transducer 27 Film forming room 28 Heater 30 Atomization device 31 Guide bulkhead 33 Dilution gas supply pipe 34 Carrier gas supply pipe 35 Ultrasonic transmission fluid tank 36 Ultrasonic transmission fluid 37 Film forming room 101a n-type semiconductor layer 101b n+ type semiconductor layer 102 p-type semiconductor layer 103 Metal layer 104 Insulator Layer 105a Schottky electrode 105b Ohmic electrode 111a n-type semiconductor layer 111b n+ type semiconductor layer 114 Semi-insulating layer 115a Gate electrode 115b Source electrode 115c Drain electrode 118 Buffer layer 121a Wide band gap n-type semiconductor layer 121b Narrow band gap n-type semiconductor layer 121c n+ type semiconductor layer 123 p-type semiconductor layer 124 Semi-insulating layer 125a Gate electrode 125b Source electrode 125c Drain electrode 128 Buffer layer 129 Board 131a n-type semiconductor layer 131b First n+ type semiconductor layer 131c second n+ type semiconductor layer 132 p-type semiconductor layer 134 Gate insulating film 135a Gate electrode 135b Source electrode 135c Drain electrode 138 Buffer layer 139 Semi-insulating layer 141a n-type semiconductor layer 141b First n+ type semiconductor layer 141c second n+ type semiconductor layer 142 p-type semiconductor layer 145a Gate electrode 145b Source electrode 145c Drain electrode 151 n-type semiconductor layer 151a n-type semiconductor layer 151b n+ type semiconductor layer 152 p-type semiconductor layer 154 Gate insulating film 155a Gate electrode 155b Emitter electrode 155c Collector electrode 161 n-type semiconductor layer 162 p-type semiconductor layer 163 Light-emitting layer 165a First electrode 165b Second electrode 167 Translucent electrode 169 Board 1010a n-type semiconductor 1010b n+ type semiconductor 1020 Ohmic electrode 1030 Schottky electrode 1030a metal layer 1030b metal layer 1030c metal layer 1060 Electrolytic relaxation region

Claims

1. A crystal mainly composed of an oxide semiconductor having a rutile structure, the oxide semiconductor containing germanium and being a p-type semiconductor.

2. 100 μm ２ The crystal according to claim 1, having an area of ​​at least 100 nm.

3. The crystal according to claim 1, which is in the form of a membrane.

4. The crystal according to claim 3, having a film thickness of 1 μm or more.

5. The crystal according to claim 1, having a surface roughness of 10 nm or less.

6. The crystal according to claim 1, which is a single crystal.

7. The crystal according to claim 1, which has an electrical resistivity of 10 Ωcm or less.

8. 2. The crystal film according to claim 1, which forms an ohmic contact with a metal layer.

9. A laminated structure in which a crystal is laminated directly or via another layer on a crystal substrate, the crystal being the crystal according to claim 1.

10. 10. A laminated structure in which an ohmic contact is formed between a metal layer and a crystal, the crystal being the crystal according to claim 1.

11. 11. The laminate structure according to claim 10, wherein the metal layer contains one or more metal elements selected from d-block metal elements and / or p-block metal elements of the periodic table.

12. The laminate structure of claim 10 , wherein the metal layer comprises indium.

13. 12. A semiconductor device including a crystal or a laminated structure, wherein the crystal is the crystal film according to claim 1, and the laminated structure is the laminated structure according to claim 10 or 11.

14. 14. The semiconductor device according to claim 13, which is a power device.

15. 14. The semiconductor device according to claim 13, which is a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT), or a light emitting diode (LED).

16. 14. An electronic device including a semiconductor device, the semiconductor device being the semiconductor device according to claim 13.

17. A system including an electronic device, the electronic device being the electronic device according to claim 16.

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