Semiconductor device

Abstract

To provide a semiconductor device capable of reducing on-resistance.SOLUTION: According to an embodiment, a semiconductor device includes first to third conductive portions, a first insulating portion, and a semiconductor portion. The second conductive portion is away from the first conductive portion in a first direction. The third conductive portion is aligned with a part of the second conductive portion in a second direction that intersects the first direction. The first insulating portion includes a first insulating region disposed between the part of the second conductive portion and the third conductive portion. The semiconductor portion includes first and second semiconductor regions and has a first conductivity type. The first semiconductor region is disposed between the first conductive portion and the second conductive portion. The second semiconductor region is disposed between the part of the second conductive portion and the first insulating region and is in Schottky junction with the second conductive portion. First impurities are segregated at the interface between the second conductive portion and the second semiconductor region. When the first conductivity type is an n type, the first impurities contain at least one selected from the group consisting of arsenic, phosphorus, antimony and magnesium.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] FIELD An embodiment of the present invention relates to a semiconductor device. [Background technology]

[0002] In semiconductor devices such as transistors, it is desirable to reduce the on-resistance. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 6400545 Summary of the Invention [Problem to be solved by the invention]

[0004] An embodiment of the present invention provides a semiconductor device capable of reducing the on-resistance. [Means for solving the problem]

[0005] According to an embodiment of the present invention, a semiconductor device includes a first conductive portion, a second conductive portion, a third conductive portion, a first insulating portion, and a semiconductor portion. The second conductive portion is separated from the first conductive portion in a first direction. The third conductive portion is aligned with a part of the second conductive portion in a second direction intersecting the first direction. The first insulating portion includes a first insulating region provided between the part of the second conductive portion and the third conductive portion. The semiconductor portion includes a first semiconductor region and a second semiconductor region, and is of a first conductivity type. The first semiconductor region is provided between the first conductive portion and the second conductive portion. The second semiconductor region is provided between the part of the second conductive portion and the first insulating region, and forms a Schottky junction with the second conductive portion. A first impurity is segregated at an interface between the second conductive portion and the second semiconductor region. The first conductivity type is n-type, and the first impurity includes at least one selected from the group consisting of arsenic, phosphorus, antimony, and magnesium. Alternatively, the first conductivity type is p-type, and the first impurity includes at least one selected from the group consisting of boron, indium, aluminum, and beryllium. [Brief description of the drawings]

[0006] [Figure 1] FIG. 1 is a schematic cross-sectional view illustrating a semiconductor device according to an embodiment. [Diagram 2] FIG. 2 is a schematic cross-sectional view illustrating another semiconductor device according to the embodiment. [Diagram 3] FIG. 3 is a schematic cross-sectional view illustrating another semiconductor device according to the embodiment. [Figure 4] FIG. 4 is a schematic cross-sectional view illustrating another semiconductor device according to the embodiment. [Diagram 5] 5(a) to 5(f) are schematic cross-sectional views illustrating the method for manufacturing the semiconductor device according to the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios of each part may be different depending on the drawing. In this specification and each drawing, elements similar to those described above with reference to the previous drawings are given the same reference numerals and detailed descriptions thereof will be omitted as appropriate.

[0008] FIG. 1 is a schematic cross-sectional view illustrating a semiconductor device according to an embodiment. 1, the semiconductor device 100 according to the embodiment includes a first conductive portion 11, a second conductive portion 12, a third conductive portion 13, an insulating portion 20, and a semiconductor portion 30. The semiconductor device 100 may further include a fourth conductive portion 14 and a fifth conductive portion 15.

[0009] The second conductive portion 12 is separated from the first conductive portion 11 in a first direction. The first direction is the Z direction. One direction perpendicular to the Z direction is the X direction. A direction perpendicular to the Z direction and the X direction is the Y direction. In the first direction, the positional and directional relationship of the second conductive portion to the first conductive portion 11 is referred to as above and upward. Below and below refer to the opposite of above and upward.

[0010] The second conductive portion 12 includes a first conductive region 12a, a second conductive region 12b, a third conductive region 12c, and a fourth conductive region 12d. The position of the third conductive region 12c in the Z direction is between the position of the fourth conductive region 12d in the Z direction and the position of the first conductive portion 11 in the Z direction. The first conductive region 12a and the second conductive region 12b extend in the Z direction and connect the end of the fourth conductive region 12d in the X direction and the end of the third conductive region 12c in the X direction. The position of the second conductive region 12b in the Z direction is between the position of the first conductive region 12a in the Z direction and the position of the third conductive region 12c in the Z direction.

[0011] The third conductive portion 13 is separated from a part of the second conductive portion 12 (the first conductive region 12a and the second conductive region 12b) in a second direction (e.g., the X direction) intersecting the Z direction. The third conductive portion 13 is aligned with another part of the second conductive portion 12 (the fourth conductive region 12d) in the Z direction. The third conductive portion 13 is between the fourth conductive region 12d and the first conductive portion 11. Two configurations aligned in a certain direction means that one configuration is located in a certain direction relative to the other configuration. When two configurations are aligned in a certain direction, the direction from one configuration to the other configuration is along the certain direction.

[0012] The fourth conductive portion 14 is provided above the second conductive portion 12 and the third conductive portion 13. In other words, the second conductive portion 12 and the third conductive portion 13 are located between the fourth conductive portion 14 and the first conductive portion 11. The fourth conductive portion 14 is in contact with the second conductive portion 12. The fourth conductive portion 14 is electrically connected to the second conductive portion 12.

[0013] The fifth conductive portion 15 is located between the first conductive portion 11 and the third conductive portion 13. The fifth conductive portion 15 is aligned with the third conductive portion 13 in the Z direction.

[0014] The semiconductor portion 30 is provided between the first conductive portion 11 and the second conductive portion 12. The semiconductor portion 30 is in contact with the first conductive portion 11 and is electrically connected to the first conductive portion 11. The semiconductor portion 30 includes a first semiconductor region 30a, a second semiconductor region 30b, a third semiconductor region 30c, and a fourth semiconductor region 30d. The semiconductor portion 30 is of a first conductivity type (e.g., n-type). Note that in this example, the first conductivity type is n-type and the second conductivity type is p-type, but in an embodiment, the first conductivity type may be p-type and the second conductivity type may be n-type.

[0015] The first semiconductor region 30a is provided between the first conductive portion 11 and the second conductive portion 12. The first semiconductor region 30a is aligned with the third conductive region 12c of the second conductive portion 12 in the Z direction. The first semiconductor region 30a is in contact with the third conductive region 12c. For example, the third conductive region 12c faces the first semiconductor region 30a in the Z direction and forms a Schottky junction with the first semiconductor region 30a.

[0016] The first semiconductor region 30a includes an opposing surface F1 that faces the second conductive portion 12 (the third conductive region 12c). The direction from the third conductive portion 13 to the opposing surface F1 is along the second direction (for example, the X direction).

[0017] The second semiconductor region 30b is aligned in the X direction with a part of the second conductive unit 12 (the first conductive region 12a and the second conductive region 12b). The second semiconductor region 30b contacts a part of the second conductive unit 12 (the first conductive region 12a and the second conductive region 12b). For example, the second semiconductor region 30b faces a part of the second conductive unit 12 (the first conductive region 12a and the second conductive region 12b) in the X direction and forms a Schottky junction with the part of the second conductive unit 12 (the first conductive region 12a and the second conductive region 12b).

[0018] The second semiconductor region 30b may include a first region r1 and a second region r2. The second region r2 is provided between the first region r1 and the first conductive section 11. The concentration (atoms / cm 3 ) is higher than the concentration of the impurities of the first conductivity type in the second region r2.

[0019] The first region r1 is aligned with the first conductive region 12a in the X direction. The first region r1 forms a Schottky junction with the first conductive region 12a. The second region r2 is aligned with the second conductive region 12b in the X direction. The second region r2 forms a Schottky junction with the second conductive region 12b.

[0020] The lower end of the first region r1 (the end on the first conductive portion 11 side in the Z direction) and the lower end of the first conductive region 12a overlap with the third conductive portion 13 in the X direction. The upper end of the first region r1 (the end opposite the lower end in the Z direction) and the upper end of the first conductive region 12a do not overlap with the third conductive portion 13 in the X direction, but overlap with the second insulating region 20b in the X direction. The lower end of the first region r1 and the upper end of the second region r2 overlap with the third conductive portion 13 in the X direction. The entire second region r2 and the entire second conductive region overlap with the third conductive portion 13 in the X direction.

[0021] For example, a trench T1 is provided in the surface 30s of the semiconductor section 30. The trench T1 extends, for example, in a third direction (for example, the Y direction) intersecting the first direction and the second direction. A plurality of trenches T1 may be provided at intervals in the X direction. The first conductive region 12a, the second conductive region 12b, and the third conductive region 12c of the second conductive section 12 are provided in the trench T1. The second conductive section 12 is, for example, a trench contact electrically connected to the semiconductor section 30. For example, the first semiconductor region 30a constitutes the bottom surface of the trench T1. The third conductive region 12c is in Schottky contact with the bottom surface of the trench T1. For example, the second semiconductor region 30b constitutes the side surface of the trench T1. A part of the second conductive section 12 (the first conductive region 12a and the second conductive region 12b) is in Schottky contact with the side surface of the trench T1.

[0022] The third semiconductor region 30c is provided between the first conductive unit 11 and the first semiconductor region 30a. The third semiconductor region 30c is aligned with the fifth conductive unit 15 in the X direction.

[0023] The fourth semiconductor region 30d is provided between the first conductive portion 11 and the third conductive portion 13 (the fifth conductive portion 15). The fourth semiconductor region 30d is provided between the third semiconductor region 30c and the first conductive portion 11.

[0024] The insulating section 20 is in contact with the third conductive section 13, the fifth conductive section 15, and the semiconductor section 30. The insulating section 20 electrically insulates the third conductive section 13 from the semiconductor section 30. The insulating section 20 electrically insulates the fifth conductive section 15 from the semiconductor section 30. The insulating section 20 electrically insulates the third conductive section 13 from the fifth conductive section 15.

[0025] More specifically, the insulating section 20 includes a first insulating region 20a, a second insulating region 20b, and a third insulating region 20c. The first insulating region 20a is provided between a part of the second conductive section 12 (the first conductive region 12a and the second conductive region 12b) and the third conductive section 13. The second semiconductor region 30b is provided between a part of the second conductive section 12 (the first conductive region 12a and the second conductive region 12b) and the first insulating region 20a.

[0026] The second insulating region 20b is provided between the fourth conductive region 12d of the second conductive unit 12 and the third conductive unit 13. In this example, the fourth conductive region 12d contacts the second insulating region 20b. The third insulating region 20c is provided between the third semiconductor region 30c and the fifth conductive unit 15. Furthermore, the insulating unit 20 includes, for example, a portion provided between the fourth semiconductor region 30d and the fifth conductive unit 15 and a portion provided between the fifth conductive unit 15 and the third conductive unit 13.

[0027] For example, a trench T2 is provided in a surface 30s of the semiconductor portion 30. The trench T2 extends, for example, in the Y direction. A plurality of trenches T2 may be provided at intervals in the X direction. An insulating portion 20 is provided in the trench T2. The third conductive portion 13 and the fifth conductive portion 15 are surrounded by the insulating portion 20 in the trench T2.

[0028] The semiconductor device 100 is, for example, a MOSFET (Metal Oxide Silicon Field Effect Transistor). By controlling the potential of the third conductive portion 13, it is possible to control the current flowing between the first conductive portion 11 and the second conductive portion 12 (and the fourth conductive portion 14). The first conductive portion 11 functions, for example, as a drain electrode. The second conductive portion 12 (and the fourth conductive portion 14) functions, for example, as a source electrode. The first region r1 functions, for example, as a source region. The second region r2 functions, for example, as a channel region. The third conductive portion 13 functions, for example, as a gate electrode. The first insulating region 20a functions, for example, as a gate insulating film.

[0029] For example, a Schottky barrier is formed at the interface between the second conductive section 12 (the first conductive region 12a and the second conductive region 12b) and the second semiconductor region 30b, and a depletion layer is formed in the second semiconductor region 30b (the second region r2). The thickness (distance in the X direction) of the Schottky barrier is controlled by the potential of the third conductive section 13, and the carrier concentration in the second semiconductor region 30b (the second region r2) is controlled. For example, when the voltage of the third conductive section 13 is equal to or lower than the threshold and the carrier concentration in the second semiconductor region 30b is low, substantially no current flows between the second conductive section 12 (and the fourth conductive section 14) and the first conductive section 11 through the second semiconductor region 30b. That is, an off state is obtained. By controlling the potential of the third conductive portion 13, when the voltage of the third conductive portion 13 exceeds a threshold value and the carrier concentration in the second semiconductor region 30b increases, a current flows between the second conductive portion 12 (and the fourth conductive portion 14) and the first conductive portion 11 via the second semiconductor region 30b. In other words, an on state is obtained.

[0030] Also, for example, a Schottky barrier is formed at the interface between the third conductive region 12c and the first semiconductor region 30a. The thickness (distance in the Z direction) of the Schottky barrier can be controlled by the potential of the third conductive portion 13. When the Schottky barrier is thick, current does not easily flow. For example, an off state is obtained. By controlling the potential of the third conductive portion 13, the Schottky barrier becomes thinner, making it easier for a tunnel current to flow. For example, an on state is obtained.

[0031] For example, there is a reference transistor having an npn structure. In this case, the gate length increases according to the width of the pn junction. In contrast, in the embodiment, the semiconductor portion 30 is of the first conductivity type and does not need to include a region of the second conductivity type. In other words, a pn junction is not formed. This makes it easier to shorten the gate length, for example. Therefore, it is easier to reduce the gate capacitance. In addition, for example, it is easier to reduce the on-resistance. It is possible to achieve high-speed switching, suppression of turn-on loss, and suppression of turn-off loss. According to the embodiment, it is possible to provide a semiconductor device that can improve characteristics.

[0032] In the transistor of the reference example, a body diode is formed by a pn junction. Therefore, recovery may take a long time. In contrast, in the embodiment, a Schottky barrier is formed at the interface between the second conductive portion 12 (third conductive region 12c) and the first semiconductor region 30a. This forms a body diode. Since the body diode is a Schottky barrier diode in this way, it is possible to improve the recovery characteristics. It is possible to speed up recovery.

[0033] In the embodiment, a second impurity (hereinafter referred to as "impurity IB") may be segregated at the interface between the second conductive portion 12 and the second semiconductor region 30b. In this example (i.e., when the first conductivity type is n-type), the impurity IB includes at least one selected from the group consisting of, for example, B (boron), In (indium), Al (aluminum), and Be (beryllium). When the first conductivity type is p-type, the impurity IB includes at least one selected from the group consisting of, for example, As (arsenic), P (phosphorus), Sb (antimony), and Mg (magnesium). Segregation of such impurities can increase the threshold voltage of the semiconductor device 100.

[0034] For example, the impurity IB segregated at the interface between the second conductive portion 12 and the second semiconductor region 30b forms a dipole, and the effective Schottky barrier height at the interface between the second conductive portion 12 and the second semiconductor region 30b is modulated. The Schottky barrier height becomes higher, and the threshold voltage becomes higher.

[0035] For example, a first segregation portion 51 in which an impurity in the second conductive portion 12 segregates is formed between (at the interface between) the second conductive portion 12 and the second semiconductor region 30b. When the second conductive portion 12 contains an impurity IB, the impurity IB in the second conductive portion 12 segregates at the interface between the second conductive portion 12 and the second semiconductor region 30b. That is, in this case, the impurity IB segregates in the first segregation portion 51. For example, the concentration (atoms / cm) of the impurity IB in the boundary region (or the first segregation portion 51) in contact with the second semiconductor region 30b of the second conductive portion 12 is 3) is higher than the concentration of the impurity IB in the internal region (inside the boundary region) of the second conductive section 12. When the first conductivity type is n-type, the impurity IB may be a dopant (element) that becomes an acceptor when doped into the semiconductor section 30. When the first conductivity type is p-type, the impurity IB may be a dopant (element) that becomes a donor when doped into the semiconductor section 30.

[0036] In the embodiment, a first impurity (hereinafter referred to as "impurity IA") may be segregated at the interface between the second conductive portion 12 and the second semiconductor region 30b. In this example (i.e., when the first conductivity type is n-type), the impurity IA includes at least one selected from the group consisting of As (arsenic), P (phosphorus), Sb (antimony), and Mg (magnesium). When the first conductivity type is p-type, the impurity IA includes at least one selected from the group consisting of B (boron), In (indium), Al (aluminum), and Be (beryllium). Segregation of such impurities can reduce the on-resistance of the semiconductor device 100.

[0037] For example, the impurity IA segregated at the interface between the second conductive portion 12 and the second semiconductor region 30b forms a dipole, and the effective Schottky barrier height at the interface between the second conductive portion 12 and the second semiconductor region 30b is modulated. The Schottky barrier height is lowered, and the contact resistance is lowered. The on-resistance is reduced.

[0038] When the second conductive section 12 contains the impurity IA, the impurity IA in the second conductive section 12 segregates at the interface between the second conductive section 12 and the second semiconductor region 30b. That is, in this case, the impurity IA segregates in the first segregation section 51. For example, the concentration (atoms / cm) of the impurity IA in the boundary region (or the first segregation section 51) where the second conductive section 12 contacts the second semiconductor region 30b is 3) is higher than the concentration of the impurity IA in the internal region (inside the boundary region) of the second conductive section 12. When the first conductivity type is n-type, the impurity IA may be a dopant (element) that becomes a donor when doped into the semiconductor section 30. When the first conductivity type is p-type, the impurity IA may be a dopant (element) that becomes an acceptor when doped into the semiconductor section 30.

[0039] The first segregation portion 51 may include a first segregation region 51a and a second segregation region 51b. The first segregation region 51a is located (at the interface) between the first conductive region 12a and the first region r1. The second segregation region 51b is located (at the interface) between the second conductive region 12b and the second region r2.

[0040] In the example of FIG. 1, a first conductive region 12aa containing an impurity IA is provided as the first conductive region 12a, and a second conductive region 12ba containing an impurity IB is provided as the second conductive region 12b.

[0041] The impurity IA segregates at the interface between the first conductive region 12aa and the first region r1. That is, the impurity IA segregates, for example, in the first segregation region 51a. For example, the segregated impurities form a dipole, and the effective Schottky barrier height at the interface between the first conductive region 12aa and the first region r1 is modulated. The Schottky barrier between the first conductive region 12aa and the first region r1 is lowered. The contact resistance between the first conductive region 12aa and the first region r1 can be reduced. For example, the concentration of the impurity IA in the boundary region (or the first segregation region 51a) of the first conductive region 12aa that contacts the first region r1 is higher than the concentration of the impurity IA in the internal region (inside the boundary region) of the first conductive region 12aa, and the concentration (atoms / cm) of the first conductive type impurity in the semiconductor portion 30 (for example, the first region r1) is lower than the concentration of the impurity IA in the boundary region (or the first segregation region 51a) of the first conductive region 12aa that contacts the first region r1. 3 The concentration of the impurity IA in the boundary region (or the first segregation region 51a) in contact with the first region r1 of the first conductive region 12aa is higher than the concentration of the impurity IA in the boundary region (or the second segregation region 51b) in contact with the second region r2 of the second conductive region 12ba.

[0042] The impurity IB segregates at the interface between the second conductive region 12ba and the second region r2. That is, for example, the impurity IB segregates in the second segregation region 51b. For example, a dipole is formed at the interface between the second conductive region 12ba and the second region r2. The dipole modulates the effective work function, thereby increasing the Schottky barrier between the second conductive region 12ba and the second region r2. The threshold voltage of the semiconductor device 100 can be increased. For example, the concentration of the impurity IB in the boundary region (or the second segregation region 51b) of the second conductive region 12ba that contacts the second region r2 is higher than the concentration of the impurity IB in the internal region (inside the boundary region) of the second conductive region 12ba, and the concentration (atoms / cm) of the second conductive type impurity in the semiconductor portion 30 (for example, the second region r2) is higher than the concentration of the impurity IB in the second conductive region 12ba. 3 ) is higher. The second region r2 does not need to contain the impurity IB. The concentration of the impurity IB in the boundary region (or the second segregation region 51b) of the second conductive region 12ba in contact with the second region r2 is higher than the concentration of the impurity IB in the boundary region (or the first segregation region 51a) of the first conductive region 12aa in contact with the first region r1.

[0043] The first conductive region 12aa may contain an impurity IB, and the impurity IB may be segregated at the interface between the first conductive region 12aa and the first region r1. That is, the concentration of the impurity IB in the boundary region (or the first segregation region 51a) of the first conductive region 12aa in contact with the first region r1 may be higher than the concentration of the impurity IB in the internal region (inside the boundary region) of the first conductive region 12aa. However, in this case, the concentration of the impurity IA is higher than the concentration of the impurity IB in the first conductive region 12aa (internal region). In this case, the concentration of the impurity IA is higher than the concentration of the impurity IB in the boundary region (or the first segregation region 51a) of the first conductive region 12aa. The first conductive region 12aa does not necessarily have to contain the impurity IB. The impurity IB does not necessarily have to be segregated (present) at the interface (first segregation region 51a) between the first conductive region 12aa and the first region r1.

[0044] The second conductive region 12ba may contain the impurity IA, and the impurity IA may be segregated at the interface between the second conductive region 12ba and the second region r2. That is, the concentration of the impurity IA in the boundary region (or the second segregation region 51b) of the second conductive region 12ba in contact with the second region r2 may be higher than the concentration of the impurity IA in the internal region (inside the boundary region) of the second conductive region 12ba. However, in this case, the concentration of the impurity IB is higher than the concentration of the impurity IA in the second conductive region 12ba (internal region). In this case, the concentration of the impurity IB is higher than the concentration of the impurity IA in the boundary region (or the second segregation region 51b) of the second conductive region 12ba. The second conductive region 12ba does not necessarily have to contain the impurity IA. The impurity IA does not necessarily have to be segregated (present) at the interface (second segregation region 51b) between the second conductive region 12ba and the second region r2.

[0045] Also, for example, the impurity IA may be segregated at the interface between the third conductive region 12c and the first semiconductor region 30a. In this case, the forward voltage of the body diode formed by the third conductive region 12c and the first semiconductor region 30a can be reduced.

[0046] For example, the impurity IA segregated at the interface between the third conductive region 12c and the first semiconductor region 30a forms a dipole, and the effective Schottky barrier height at the interface between the third conductive region 12c and the first semiconductor region 30a is modulated. The Schottky barrier height is lowered, and the forward voltage of the body diode is reduced.

[0047] For example, a second segregation portion 52 in which impurities in the third conductive region 12c are segregated is formed between the third conductive region 12c and the first semiconductor region 30a (at the interface).

[0048] In the example of FIG. 1, the third conductive region 12c is provided as a third conductive region 12ca containing an impurity IA. When the third conductive region 12c contains the impurity IA, the impurity IA in the third conductive region 12c segregates at the interface between the third conductive region 12c and the first semiconductor region 30a. That is, in this case, the impurity IA segregates in the second segregation portion 52. For example, the concentration of the impurity IA in the boundary region (or the second segregation portion 52) in contact with the first semiconductor region 30a of the third conductive region 12c is higher than the concentration of the impurity IA in the internal region (inside the boundary region) of the third conductive region 12c, and is higher than the concentration of the first conductive type impurity in the semiconductor portion 30 (for example, the first semiconductor region 30a).

[0049] The third conductive region 12ca may contain an impurity IB, and the impurity IB may be segregated at the interface between the third conductive region 12ca and the first semiconductor region 30a. That is, the concentration of the impurity IB in the boundary region (or the second segregation portion 52) of the third conductive region 12ca in contact with the first semiconductor region 30a may be higher than the concentration of the impurity IB in the internal region (inside the boundary region) of the third conductive region 12ca. However, in this case, the concentration of the impurity IA is higher than the concentration of the impurity IB in the third conductive region 12ca (internal region). In this case, the concentration of the impurity IA is higher than the concentration of the impurity IB in the boundary region (or the second segregation portion 52) of the third conductive region 12ca. The third conductive region 12ca does not necessarily have to contain the impurity IB. The impurity IB does not necessarily have to be segregated at the interface between the third conductive region 12ca and the first semiconductor region 30a.

[0050] The fourth conductive region 12d may contain at least one of an impurity IA and an impurity IB, or may not contain the impurity IA or the impurity IB. In the example of FIG. 1, a fourth conductive region 12da containing an impurity IA is provided as the fourth conductive region 12d. The fourth conductive region 12da may contain an impurity IB. For example, in the fourth conductive region 12da, the concentration of the impurity IA is higher than the concentration of the impurity IB.

[0051] The second conductive section 12 includes, for example, a first metal element. The first metal element includes at least one selected from the group consisting of Ti, W, Mo, Ta, Zr, Al, Sn, V, Re, Os, Ir, Pt, Pd, Rh, Ru, Nb, Sr, and Hf. The second conductive section 12 includes, for example, a first metal formed by the first metal element. The second conductive section 12 includes, for example, at least one metal selected from Ti, W, Mo, Ta, Zr, Al, Sn, V, Re, Os, Ir, Pt, Pd, Rh, Ru, Nb, Sr, and Hf. The second conductive section 12 may be a metal doped with at least one of an impurity IA and an impurity IB. The metal in the second conductive section 12 is used for a Schottky junction with the semiconductor section 30.

[0052] The fourth conductive section 14 includes, for example, a second metal element. The second metal element includes at least one selected from the group consisting of Al, Cu, Mo, W, Ta, Co, Ru, Ti, and Pt. The fourth conductive section 14 includes, for example, a second metal formed by the second metal element. The fourth conductive section 14 includes, for example, at least one metal selected from the group consisting of Al, Cu, Mo, W, Ta, Co, Ru, Ti, and Pt. The fourth conductive section 14 may have, for example, a laminated structure of multiple metal layers (for example, a metal layer containing Al, a metal layer containing Ti).

[0053] The work function of the second conductive section 12 (e.g., the work function of the first metal) may be higher than the work function of the fourth conductive section 14 (e.g., the work function of the second metal). For example, the second conductive section 12 contains Pt (platinum) as a metal used for a Schottky junction. Since the work function of the second conductive section 12 is relatively high, the Schottky barrier between the second conductive region 12b and the second region r2 becomes high. The threshold voltage of the semiconductor device 100 can be increased.

[0054] On the other hand, when the work function of the second conductive portion 12 is relatively high, the Schottky barrier between the first conductive region 12a and the first region r1 becomes high, and the contact resistance between the first conductive region 12a and the first region r1 becomes high. In contrast, in this example, the impurity IA segregates at the interface between the first conductive region 12a and the first region r1. The contact resistance can be reduced.

[0055] Furthermore, when the work function of the second conductive portion 12 is relatively high, the Schottky barrier between the third conductive region 12c and the first semiconductor region 30a becomes high, and the forward voltage of the body diode becomes high. In contrast, in this example, the impurity IA segregates at the interface between the third conductive region 12c and the first semiconductor region 30a. The forward voltage of the body diode can be reduced.

[0056] For example, it is possible to reduce the on-resistance and the forward voltage of the body diode while increasing the threshold voltage of the semiconductor device 100.

[0057] The third conductive portion 13 and the fifth conductive portion 15 may include, for example, at least one of polysilicon and a metal. The first conductive portion 11 includes, for example, at least one selected from the group consisting of Al, Cu, Mo, W, Ta, Co, Ru, Ti, and Pt. The insulating portion 20 includes, for example, an insulating material including at least one of silicon oxide and silicon nitride.

[0058] The semiconductor portion 30 includes, for example, Si (silicon). The semiconductor portion 30 includes, as an n-type impurity, at least one selected from the group consisting of As, P (phosphorus), and Sb (antimony). The semiconductor portion 30 may include a compound semiconductor such as a nitride semiconductor (for example, GaN), silicon carbide (SiC), or an oxide semiconductor (for example, GaO).

[0059] As shown in FIG. 1, the fourth conductive portion 14 includes a conductive upper portion 14a and a conductive lower portion 14b. A part of the conductive upper portion 14a is aligned with the third conductive portion 13 in the Z direction. The third conductive portion 13 is between the conductive upper portion 14a and the first conductive portion 11. The conductive upper portion 14a is located on the fourth conductive region 12d and contacts the fourth conductive region 12d. That is, the fourth conductive region 12d is between the conductive upper portion 14a and the second insulating region 20b. The conductive lower portion 14b is between the conductive upper portion 14a and the first semiconductor region 30a. The conductive lower portion 14b is aligned with the third conductive portion 13 in the X direction. The conductive lower portion 14b contacts the first conductive region 12a, the second conductive region 12b, and the third conductive region 12c.

[0060] The fifth conductive portion 15 may be electrically connected to the second conductive portion 12 and the fourth conductive portion 14 by a conductive portion (wiring or the like) not shown. Alternatively, the fifth conductive portion 15 may be capable of being electrically connected to the second conductive portion 12 and the fourth conductive portion 14. The fifth conductive portion 15 functions as, for example, a field plate. For example, local concentration of an electric field is suppressed. More stable operation is obtained.

[0061] FIG. 2 is a schematic cross-sectional view illustrating another semiconductor device according to the embodiment. 2 differs from the semiconductor device 100 in that the second conductive portion 12 does not contain the impurity IA. Other than this, the structure of the semiconductor device 101 may be similar to that of the semiconductor device 100.

[0062] The first conductive region 12a is provided as a first conductive region 12ab containing an impurity IB. The second conductive region 12b is provided as a second conductive region 12bb containing an impurity IB. The third conductive region 12c is provided as a third conductive region 12cb containing an impurity IB. The fourth conductive region 12d is provided as a fourth conductive region 12db containing an impurity IB.

[0063] The impurity IB segregates at the interface (first segregation region 51a) between the first conductive region 12ab and the first region r1. The impurity IB segregates at the interface (second segregation region 51b) between the second conductive region 12bb and the second region r2. The impurity IB segregates at the interface (second segregation portion 52) between the third conductive region 12cb and the first semiconductor region 30a. The impurity IA does not need to be segregated at the interface between the second conductive portion 12 and the semiconductor portion 30.

[0064] In the semiconductor device 101, the impurity IB segregates at the interface between the second conductive portion 12 and the second semiconductor region 30b. This makes it possible to increase the threshold voltage, similarly to the semiconductor device 100.

[0065] FIG. 3 is a schematic cross-sectional view illustrating another semiconductor device according to the embodiment. 3 differs from the semiconductor device 100 in that the second conductive portion 12 does not contain the impurity IB. Other than this, the structure of the semiconductor device 102 may be similar to that of the semiconductor device 100.

[0066] The first conductive region 12a is provided with a first conductive region 12ac containing an impurity IA. The second conductive region 12b is provided with a second conductive region 12bc. The second conductive region 12bc may or may not contain an impurity IA. The third conductive region 12c is provided with a third conductive region 12cc containing an impurity IA. The fourth conductive region 12d is provided with a fourth conductive region 12dc. The fourth conductive region 12dc may or may not contain an impurity IA. The impurity IB does not need to be segregated at the interface between the second conductive section 12 and the semiconductor section 30.

[0067] The impurity IA segregates at the interface (first segregation region 51a) between the first conductive region 12ac and the first region r1. The impurity IA segregates at the interface (second segregation portion 52) between the third conductive region 12cc and the first semiconductor region 30a. The impurity IA may or may not segregate at the interface between the second conductive region 12bc and the second region r2.

[0068] In the semiconductor device 102, the impurity IA is segregated at the interface between the second conductive portion 12 and the second semiconductor region 30b. This makes it possible to reduce the contact resistance and the on-resistance, similarly to the semiconductor device 100. In addition, the forward voltage of the body diode can be reduced.

[0069] FIG. 4 is a schematic cross-sectional view illustrating another semiconductor device according to the embodiment. 4 differs from the semiconductor device 100 in that it includes a conductive film 60. Other than this, the structure of the semiconductor device 103 may be similar to that of the semiconductor device 100.

[0070] At least a portion of the conductive film 60 is located between the fourth conductive region 12d and the third conductive portion 13. The conductive film 60 contacts the fourth conductive region 12d. The second insulating region 20b is located between the conductive film 60 and the third conductive portion 13. The second insulating region 20b contacts the conductive film 60.

[0071] The conductive film 60 includes, for example, a third metal element. When the first conductivity type is n-type, the third metal element includes, for example, at least one selected from the group consisting of Ti (titanium), Al, Ta (tantalum), W (tungsten), Hf (hafnium), and V (vanadium). When the first conductivity type is p-type, the third metal element includes, for example, at least one selected from the group consisting of Co (cobalt), Ni (nickel), Pd (palladium), Rh (rhodium), and Ir (iridium). The conductive film 60 includes, for example, a third metal formed by the third metal element. When the first conductivity type is n-type, the conductive film 60 includes, for example, at least one metal selected from the group consisting of Ti, Al, Ta, W, Hf, and V. When the first conductivity type is p-type, the conductive film 60 includes, for example, at least one metal selected from the group consisting of Co, Ni, Pd, Rh, and Ir. Alternatively, the conductive film 60 may include polysilicon. The polysilicon is doped with impurities of the first conductivity type and is of the first conductivity type.

[0072] The work function of the second conductive portion 12 is higher than the work function (for example, the work function of the third metal or polysilicon) of the conductive film 60. As already described, the high work function of the second conductive portion 12 allows the threshold voltage to be increased.

[0073] For example, when a metal having a high work function such as Pt is used for the second conductive portion 12, the second conductive portion 12 may easily peel off from the second insulating region 20b in the manufacturing process of the semiconductor device. In contrast, by providing the conductive film 60, it is possible to suppress the fourth conductive region 12d from peeling off from the second insulating region 20b. For example, the adhesiveness of the conductive film 60 to the second insulating region 20b is higher than that of the fourth conductive region 12d to the second insulating region 20b. The conductive film 60 is less likely to peel off from the second insulating region 20b than the fourth conductive region 12d. For example, the adhesiveness of the fourth conductive region 12d to the conductive film 60 is higher than that of the fourth conductive region 12d to the second insulating region 20b. The fourth conductive region 12d is less likely to peel off from the conductive film 60 than from the second insulating region 20b.

[0074] An end 60e of the conductive film 60 contacts an upper end r1e of the first region r1. The conductive film 60 may form a Schottky junction with the first region r1. When the conductive film 60 contacts the first region r1, for example, the contact resistance can be reduced.

[0075] The first region r1 has an upper end r1e and a lower end r1f. The upper end r1e and the lower end r1f are one end and the other end of the first region r1 in the Z direction. The lower end r1f contacts the second region r2 and is located between the upper end r1e and the first conductive part 11.

[0076] 5(a) to 5(f) are schematic cross-sectional views illustrating the method for manufacturing the semiconductor device according to the embodiment. 5(a) to 5(f) illustrate some of the manufacturing steps of the semiconductor device 103 described with reference to FIG.

[0077] 5(a), a trench T1 and a trench T2 are provided in a surface 30s of a semiconductor portion 30. In the trench T2, an insulating portion 20 and a third conductive portion 13 are formed.

[0078] 5(b), a conductive film 60 is formed on the second insulating region 20b of the insulating section 20. For example, off-axis sputtering can be used to form the conductive film 60. In off-axis sputtering, the material of the conductive film 60 advances in a direction intersecting the Z direction and reaches the second insulating region 20b. The conductive film 60 does not need to be formed in the trench T1.

[0079] 5(c), a metal film (e.g., a Pt film) to become the second conductive portion 12 is formed on the conductive film 60 and on the inner wall of the trench T1 (on the first semiconductor region 30a and the second semiconductor region 30b) by, for example, sputtering. Furthermore, an impurity IB is introduced by ion implantation into at least the second conductive region 12b of the second conductive portion 12, for example. Alternatively, the second conductive portion 12 may be formed by sputtering using a target doped with the impurity IB. As a result, the impurity IB is introduced into the second conductive portion 12.

[0080] 5(d), an impurity IA is introduced by ion implantation into the first conductive region 12a of the second conductive section 12. Further, thereafter, an impurity IA is introduced by ion implantation into the third conductive region 12c of the second conductive section 12, as shown in FIG.

[0081] 5(f), the fourth conductive section 14 is formed on the second conductive section 12 by, for example, sputtering. In addition, annealing is performed at, for example, about 550° C. As a result, the impurities IA and IB are segregated at the interface between the second conductive section 12 and the semiconductor section 30.

[0082] The embodiment may include the following configurations (e.g., technical solutions). (Configuration 1) A first conductive portion; a second conductive portion spaced apart from the first conductive portion in a first direction; a third conductive portion aligned with a portion of the second conductive portion in a second direction intersecting the first direction; a first insulating portion including a first insulating region provided between the part of the second conductive portion and the third conductive portion; a semiconductor section of a first conductivity type including a first semiconductor region provided between the first conductive section and the second conductive section, and a second semiconductor region provided between the part of the second conductive section and the first insulating region and forming a Schottky junction with the second conductive section; Equipped with a first impurity is segregated at an interface between the second conductive portion and the second semiconductor region; The first conductivity type is n-type, and the first impurity includes at least one selected from the group consisting of arsenic, phosphorus, antimony, and magnesium, or 1. A semiconductor device, wherein the first conductivity type is p-type, and the first impurity includes at least one selected from the group consisting of boron, indium, aluminum, and beryllium. (Configuration 2) 2. The semiconductor device according to configuration 1, wherein the second conductive portion contains the first impurity. (Configuration 3) the second semiconductor region includes a first region and a second region provided between the first region and the first conductive portion, a concentration of impurities of the first conductivity type in the first region is higher than a concentration of impurities of the first conductivity type in the second region; the second conductive portion includes a first conductive region aligned with the first region in the second direction and forming a Schottky junction with the first region, and a second conductive region aligned with the second region in the second direction and forming a Schottky junction with the second region, 3. The semiconductor device according to structure 1 or 2, wherein the first impurity is segregated at an interface between the first conductive region and the first region. (Configuration 4) a second impurity is segregated at an interface between the second conductive region and the second region; The first conductivity type is n-type, and the second impurity includes at least one selected from the group consisting of boron, indium, aluminum, and beryllium, or 4. The semiconductor device according to configuration 3, wherein the first conductivity type is p-type, and the second impurity includes at least one selected from the group consisting of arsenic, phosphorus, antimony, and magnesium. (Configuration 5) 5. The semiconductor device according to configuration 4, wherein the first impurity does not segregate at an interface between the second conductive region and the second region. (Configuration 6) the first conductive region includes the first impurity, 6. The semiconductor device according to claim 4, wherein the second conductive region includes the second impurity. (Configuration 7) the second conductive portion further includes a third conductive region aligned with the first semiconductor region in the first direction and forming a Schottky junction with the first semiconductor region, 7. The semiconductor device according to any one of configurations 1 to 6, wherein the first impurity segregates at an interface between the third conductive region and the first semiconductor region. (Configuration 8) 8. The semiconductor device of claim 7, wherein the third conductive region contains the first impurity. (Configuration 9) 7. The semiconductor device according to any one of configurations 4 to 6, wherein the first conductive region contains the second impurity. (Configuration 10) 10. The semiconductor device according to any one of configurations 1 to 9, wherein the second conductive portion contains platinum. (Configuration 11) Further comprising a fourth conductive portion in contact with the second conductive portion, the second conductive portion is located between the semiconductor portion and the fourth conductive portion, 11. The semiconductor device according to any one of configurations 1 to 10, wherein a work function of the second conductive portion is higher than a work function of the fourth conductive portion. (Configuration 12) the fourth conductive portion includes an upper conductive portion and a lower conductive portion, the third conductive portion is located between the conductive upper portion and the first conductive portion, 12. The semiconductor device of claim 11, wherein the conductive lower portion is located between the conductive upper portion and the semiconductor portion and is aligned with the third conductive portion in the second direction. (Configuration 13) Further comprising a conductive film; the second conductive portion includes a fourth conductive region, the third conductive portion is between the first conductive portion and the fourth conductive region, the conductive film is between the fourth conductive region and the third conductive portion and in contact with the fourth conductive region; the first insulating portion includes a second insulating region that is between the conductive film and the third conductive portion and is in contact with the conductive film; The first conductivity type is an n-type, and the conductive film includes at least one selected from the group consisting of titanium, aluminum, tantalum, tungsten, hafnium, vanadium, and polysilicon, or 13. The semiconductor device according to any one of structures 1 to 12, wherein the first conductivity type is p-type, and the conductive film contains at least one selected from the group consisting of cobalt, nickel, palladium, rhodium, iridium, and polysilicon. (Configuration 14) 14. The semiconductor device according to configuration 13, wherein a work function of the second conductive portion is higher than a work function of the conductive film. (Configuration 15) the second semiconductor region includes a first region and a second region provided between the first region and the first conductive portion, a concentration of impurities of the first conductivity type in the first region is higher than a concentration of impurities of the first conductivity type in the second region; 15. The semiconductor device according to configuration 13 or 14, wherein the conductive film is in contact with the first region. (Configuration 16) 16. The semiconductor device according to any one of configurations 1 to 15, wherein the first semiconductor region includes an opposing surface that faces the second conductive portion and is aligned with the third conductive portion in the second direction. (Configuration 17) Further comprising a fifth conductive portion, the semiconductor portion further includes a third semiconductor region provided between the first conductive portion and the first semiconductor region and aligned with the fifth conductive portion in the second direction, 17. The semiconductor device according to any one of configurations 1 to 16, wherein the first insulating section includes a third insulating region provided between the third semiconductor region and the fifth conductive section. (Configuration 18) The fifth conductive portion is electrically connected to the second conductive portion, or 18. The semiconductor device of configuration 17, wherein the fifth conductive portion is capable of being electrically connected to the second conductive portion.

[0083] According to the embodiment, a semiconductor device capable of reducing the on-resistance can be provided.

[0084] In this specification, "electrically connected" includes connection through direct contact as well as connection via other conductive members. In this specification, the term "vertical" does not only mean strictly vertical, but also includes, for example, variations in the manufacturing process, and may mean substantially vertical.

[0085] The above describes the embodiments of the present invention with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific configuration of each element included in the semiconductor device is included in the scope of the present invention as long as a person skilled in the art can implement the present invention in a similar manner and obtain similar effects by appropriately selecting from the known range of the specific configuration of each element included in the semiconductor device.

[0086] Any combination of two or more elements of each embodiment, within the scope of technical feasibility, is also included within the scope of the present invention as long as it includes the gist of the present invention.

[0087] In addition, all semiconductor devices that can be implemented by those skilled in the art by appropriately modifying the design based on the semiconductor device described above as an embodiment of the present invention also belong to the scope of the present invention as long as they include the gist of the present invention.

[0088] In addition, within the scope of the concept of the present invention, a person skilled in the art may think of various modifications and alterations, and it will be understood that these modifications and alterations also fall within the scope of the present invention.

[0089] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims. [Explanation of symbols]

[0090] 11: First conductive part 12: Second conductive part 12a, 12aa, 12ab, 12ac: first conductive area 12b, 12ba, 12bb, 12bc: second conductive region 12c, 12ca, 12cb, 12cc: 3rd conductive region 12d, 12da, 12db, 12dc: 4th conductive region 13: Third conductive part 14: Fourth conductive part 14a: Conductive upper part 14b: Conductive lower part 15: Fifth conductive part 20: Insulation section 20a: First insulating region 20b: second insulating region 20c: Third insulating region 30: Semiconductor Division 30a: first semiconductor region 30b: second semiconductor region 30c: Third semiconductor region 30d: fourth semiconductor region 30s: surface 51: First segregation area 51a: 1st segregation region 51b:Second segregation region 52: Second segregation area 60: Conductive film 60e: End 100 to 103: Semiconductor device IA: Impurities IB: Impurities F1: Opposite surface T1, T2: Trench r1: 1st area r1e: Upper end r1f: Bottom end r2: 2nd area

Claims

1. A first conductive portion; a second conductive portion spaced apart from the first conductive portion in a first direction; a third conductive portion aligned with a portion of the second conductive portion in a second direction intersecting the first direction; a first insulating portion including a first insulating region provided between the part of the second conductive portion and the third conductive portion; a semiconductor portion of a first conductivity type including a first semiconductor region provided between the first conductive portion and the second conductive portion, and a second semiconductor region provided between the part of the second conductive portion and the first insulating region and forming a Schottky junction with the second conductive portion; Equipped with a first impurity is segregated at an interface between the second conductive portion and the second semiconductor region; The first conductivity type is n-type, and the first impurity includes at least one selected from the group consisting of arsenic, phosphorus, antimony, and magnesium, or 1. A semiconductor device, wherein the first conductivity type is p-type, and the first impurity includes at least one selected from the group consisting of boron, indium, aluminum, and beryllium.

2. The semiconductor device according to claim 1 , wherein said second conductive portion contains said first impurity.

3. the second semiconductor region includes a first region and a second region provided between the first region and the first conductive portion, a concentration of impurities of the first conductivity type in the first region is higher than a concentration of impurities of the first conductivity type in the second region; the second conductive portion includes a first conductive region aligned with the first region in the second direction and forming a Schottky junction with the first region, and a second conductive region aligned with the second region in the second direction and forming a Schottky junction with the second region, 3. The semiconductor device according to claim 1, wherein said first impurity is segregated at an interface between said first conductive region and said first region.

4. a second impurity is segregated at an interface between the second conductive region and the second region; The first conductivity type is n-type, and the second impurity includes at least one selected from the group consisting of boron, indium, aluminum, and beryllium, or 4. The semiconductor device according to claim 3, wherein said first conductivity type is p-type, and said second impurity includes at least one selected from the group consisting of arsenic, phosphorus, antimony, and magnesium.

5. 5. The semiconductor device according to claim 4, wherein said first impurity does not segregate at an interface between said second conductive region and said second region.

6. the first conductive region includes the first impurity, The semiconductor device according to claim 4 , wherein said second conductive region contains said second impurity.

7. the second conductive portion further includes a third conductive region aligned with the first semiconductor region in the first direction and forming a Schottky junction with the first semiconductor region, 3. The semiconductor device according to claim 1, wherein the first impurity is segregated at an interface between the third conductive region and the first semiconductor region.

8. The semiconductor device according to claim 7 , wherein said third conductive region contains said first impurity.

9. The semiconductor device according to claim 4 , wherein said first conductive region contains said second impurity.

10. The semiconductor device according to claim 1 , wherein the second conductive portion contains platinum.

11. Further comprising a fourth conductive portion in contact with the second conductive portion, the second conductive portion is located between the semiconductor portion and the fourth conductive portion, The semiconductor device according to claim 1 , wherein a work function of said second conductive portion is higher than a work function of said fourth conductive portion.

12. the fourth conductive portion includes an upper conductive portion and a lower conductive portion, the third conductive portion is located between the conductive upper portion and the first conductive portion, The semiconductor device according to claim 11 , wherein the conductive lower portion is located between the conductive upper portion and the semiconductor portion, and is aligned with the third conductive portion in the second direction.

13. Further comprising a conductive film; the second conductive portion includes a fourth conductive region, the third conductive portion is between the first conductive portion and the fourth conductive region, the conductive film is between the fourth conductive region and the third conductive portion and in contact with the fourth conductive region; the first insulating portion includes a second insulating region that is between the conductive film and the third conductive portion and is in contact with the conductive film; The first conductivity type is n-type, and the conductive film includes at least one selected from the group consisting of titanium, aluminum, tantalum, tungsten, hafnium, vanadium, and polysilicon, or 3. The semiconductor device according to claim 1, wherein said first conductivity type is p-type, and said conductive film contains at least one selected from the group consisting of cobalt, nickel, palladium, rhodium, iridium, and polysilicon.

14. The semiconductor device according to claim 13 , wherein a work function of the second conductive portion is higher than a work function of the conductive film.

15. the second semiconductor region includes a first region and a second region provided between the first region and the first conductive portion, a concentration of impurities of the first conductivity type in the first region is higher than a concentration of impurities of the first conductivity type in the second region; The semiconductor device according to claim 13 , wherein the conductive film is in contact with the first region.

16. The semiconductor device according to claim 1 , wherein the first semiconductor region includes an opposing surface that faces the second conductive portion and is aligned with the third conductive portion in the second direction.

17. Further comprising a fifth conductive portion; the semiconductor portion further includes a third semiconductor region provided between the first conductive portion and the first semiconductor region and aligned with the fifth conductive portion in the second direction, 3 . The semiconductor device according to claim 1 , wherein the first insulating portion includes a third insulating region provided between the third semiconductor region and the fifth conductive portion.

18. The fifth conductive portion is electrically connected to the second conductive portion, or The semiconductor device according to claim 17 , wherein the fifth conductive portion is capable of being electrically connected to the second conductive portion.

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