Optical semiconductor device

Abstract

To provide an optical semiconductor device in which, in a structure where two electrodes are placed on the same surface, the two electrodes have excellent connectivity and a device size is prevented from increasing.SOLUTION: There is provided an optical semiconductor device that includes: a semiconductor layer of a first conductivity type; a semiconductor layer of a second conductivity type; an optical function layer; a first electrode; and a second electrode. The optical semiconductor device further includes first to third bank portions, first and third groove portions, and an optical function portion. In a first direction that is, in plan view, perpendicular to a direction along which the optical function portion stretches, the first bank portion, the first groove portion, the third bank portion, the third groove portion, the optical function portion, and the second bank portion are placed in this order. A distance between an upper end and a lower end of a first bank portion-side side surface in the first direction is longer than a distance between an upper end and a lower end of a third bank portion-side side surface in the first direction. The first electrode is in contact with the semiconductor layer of the first conductivity type in a bottom portion of the first groove portion, and stretches along the first bank portion-side side surface to a top surface of the first bank portion.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a semiconductor optical device. [Background technology]

[0002] A semiconductor optical device has a semiconductor multilayer structure in which a semiconductor layer of a first conductivity type (e.g., n-type), a conductive or non-conductive optical functional layer, and a semiconductor layer of a second conductivity type (e.g., p-type) are layered by crystal growth on a conductive or insulating semiconductor substrate. A first conductive side electrode is electrically connected to the first conductive type semiconductor layer, and a second conductive side electrode is electrically connected to the second conductive type semiconductor layer. By applying a voltage between the two electrodes, the optical functional layer performs operations such as light emission, light absorption, and light amplification. The two electrodes are generally metal films. Semiconductor optical devices in which the first conductive side electrode and the second conductive side electrode are arranged on the same plane are known (Patent Documents 1, 2, and 3). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2001-102673 [Patent Document 2] Patent 6809655 [Patent Document 3] JP 7-135369 Summary of the Invention [Problem to be solved by the invention]

[0004] As shown in Patent Documents 1, 2, and 3, in order to connect a first conductive side electrode to a first conductive type semiconductor layer, it is necessary to form a groove in the semiconductor multilayer and draw the first conductive side electrode from the bottom of the groove (the surface of the first conductive type semiconductor layer) to approximately the same height as the surface on which the second conductive side electrode is disposed. At this time, the first conductive side electrode is drawn to a high position along the side wall of the groove. If the side wall of the groove is vertical, there is a problem that the connectivity of the electrodes is reduced, resulting in problems such as poor connection due to disconnection of the electrodes and high resistance. Patent Documents 1, 2, and 3 solve this problem by making the side wall of the groove tapered.

[0005] When the sidewall of the groove is tapered, the following problems arise. One is an increase in cost due to the increase in size of the semiconductor optical element. For example, as shown in Patent Documents 1 and 2, when the sidewall of the groove is tapered, the electrode on the first conductive side is arranged extending in a direction away from the optical function layer side. Compared to a vertical sidewall, the extension distance is longer due to the tapered portion, leading to an increase in the size of the element. The other is that the distance from the connection surface between the semiconductor layer of the first conductive type and the electrode on the first conductive side to the connection point between the semiconductor layer of the first conductive type and the optical function layer is longer. In particular, in the structures of Patent Documents 2 and 3, both sidewalls of the groove have a tapered shape, and as a result, the distance between the optical function layer and the electrode on the first conductive side is wide. This leads to an increase in electrical resistance, which is disadvantageous in terms of power consumption. Furthermore, the formation of tapered sidewalls is a concern in terms of process stability.

[0006] The present invention provides a semiconductor optical device that solves the above problems. Specifically, the present invention provides a semiconductor optical device that has a structure in which two electrodes are arranged on the same surface, has excellent electrode connectivity, and prevents an increase in device size. [Means for solving the problem]

[0007] (1) A semiconductor optical device according to one aspect of the present disclosure, A semiconductor layer of a first conductivity type; an optical function layer disposed on the upper side of the first conductive type semiconductor layer; A second conductive type semiconductor layer disposed on the upper side of the optical function layer; a first electrode electrically connected to the first conductivity type semiconductor layer; a second electrode electrically connected to the second conductive type semiconductor layer; A semiconductor optical device comprising: a first bank portion in which a portion of the first electrode is disposed; a first groove portion adjacent to the first bank; a second bank portion in which a portion of the second electrode is disposed; The third bank portion, a third groove portion adjacent to the third bank; an optical function section including the optical function layer; Including, the first bank portion, the first groove portion, the third bank portion, the third groove portion, the optical function portion, and the second bank portion are arranged in this order in a second direction perpendicular to a first direction in which the optical function portion extends in a plan view; the second electrode is in contact with the second conductive type semiconductor layer in the optical function section; a first bank portion-side side surface of the first groove portion that is a side surface of the first bank portion-side has a stepped shape including a terrace portion, a distance in the second direction between an upper end and a lower end of a side surface of the first bank portion that is a side surface of the first groove portion on the third bank portion side, the upper end and the lower end of the side surface of the third bank portion that is a side surface of the first groove portion on the third bank portion side, The first electrode is in contact with the semiconductor layer of the first conductivity type at the bottom of the first groove, and extends over a side surface of the first bank to an upper surface of the first bank.

[0008] (2) A semiconductor optical device according to another aspect of the present disclosure includes: The third bank portion side surface is characterized in that it has a substantially vertical surface or a stepped shape including a terrace portion. (3) A semiconductor optical device according to another aspect of the present disclosure, The liquid crystal display device is characterized in that it has a second groove portion between the second bank portion and the optical function portion.

[0009] (4) A semiconductor optical device according to another aspect of the present disclosure, The height from the bottom surface of the first groove to the top surface of the terrace is equal to or less than half the height from the bottom surface of the first groove to the top surface of the first bank.

[0010] (5) A semiconductor optical device according to another aspect of the present disclosure, The height from the bottom surface of the first groove to the top surface of the terrace is 20% or more and 40% or less of the height from the bottom surface of the first groove to the top surface of the first bank.

[0011] (6) A semiconductor optical device according to another aspect of the present disclosure, The width in the second direction of the terrace portion on the side surface of the first bank portion is between half and twice the height from the bottom surface of the first groove portion to the top surface of the terrace portion.

[0012] (7) A semiconductor optical device according to another aspect of the present disclosure, The distance in the second direction between the intersection of the side surface of the third bank portion with the top surface of the third bank portion and the intersection of the side surface of the third bank portion with the bottom surface of the first groove portion is 1 / 10 or less of the width of the terrace portion of the side surface of the first bank portion.

[0013] (8) A semiconductor optical device according to another aspect of the present disclosure, The height from the terrace portion on the side surface of the first bank to the top surface of the first bank is the same as the height from the bottom surface of the second groove portion to the top surface of the second bank.

[0014] (9) A semiconductor optical device according to another aspect of the present disclosure includes: The second electrode extends from an upper portion of the optical function section, through the inside of the second groove section, and to an upper surface of the second bank section.

[0015] (10) A semiconductor optical device according to another aspect of the present disclosure, a contact layer of a first conductivity type is further provided between the semiconductor layer of the first conductivity type and the optical function layer; The terrace portion on the side surface of the first bank portion is provided on the first conductivity type contact layer.

[0016] (11) A semiconductor optical device according to another aspect of the present disclosure, The semiconductor layer of the first conductivity type is a semiconductor substrate of the first conductivity type.

[0017] (12) A semiconductor optical device according to another aspect of the present disclosure, A substrate of a first conductivity type; an etch stop layer of a first conductivity type disposed over the substrate; a contact layer of a first conductivity type disposed on the etch stop layer and made of a material different from that of the etch stop layer; The semiconductor layer of the first conductivity type is a substrate of the first conductivity type.

[0018] (13) A semiconductor optical device according to another aspect of the present disclosure, A substrate of a first conductivity type; an etch stop layer of a first conductivity type disposed over the substrate; a contact layer of a first conductivity type disposed on the etch stop layer and made of a material different from that of the etch stop layer; The first conductive type semiconductor layer is the etch stop layer.

[0019] (14) A semiconductor optical device according to another aspect of the present disclosure, A substrate; a high concentration contact layer of a first conductivity type disposed on the substrate; an etch stop layer of a first conductivity type disposed on the high concentration contact layer; a contact layer of a first conductivity type disposed on the etch stop layer and having an impurity concentration lower than that of the high concentration contact layer; The first conductive type semiconductor layer is the high concentration contact layer.

[0020] (15) A semiconductor optical device according to another aspect of the present disclosure, The terrace portion on the side surface of the first bank portion includes a first terrace portion and a second terrace portion having a different height from the first terrace portion.

[0021] (16) A semiconductor optical device according to another aspect of the present disclosure, the first electrode includes a first contact electrode and a first extraction electrode in contact with the first contact electrode; the first contact electrode is in contact with the first conductive type semiconductor layer at a bottom of the first groove; The first extraction electrode extends from the upper side of the first contact electrode, through the terrace portion on the side surface of the first bank portion, to the upper surface of the first bank portion.

[0022] (17) A semiconductor optical device according to another aspect of the present disclosure, the second electrode includes a second contact electrode and a second extraction electrode in contact with the second contact electrode; the second contact electrode is in contact with the second conductive type semiconductor layer on an upper portion of the optical function unit; The second extraction electrode extends from an upper side of the second contact electrode, through the inside of the second groove, to an upper surface of the second bank.

[0023] (18) A semiconductor optical device according to another aspect of the present disclosure, The optical function layer included in the optical function unit is sandwiched between semiconductor block layers, The second conductive type semiconductor layer is disposed on the optical function layer and the blocking layer.

[0024] (19) A semiconductor optical device according to another aspect of the present disclosure, The optical function layer is characterized in that it is arranged in the optical function section, the first bank section, the second bank section, and the third bank section.

[0025] (20) A semiconductor optical device according to another aspect of the present disclosure, The terrace portion on the side surface of the first bank portion is wider in the second direction than the terrace portion on the side surface of the third bank portion. [Brief description of the drawings]

[0026] [Figure 1] 1 is a bird's-eye view of a semiconductor optical device according to a first embodiment. [Diagram 2] 2 is a schematic cross-sectional view taken along line II-II of the semiconductor optical device shown in FIG. [Figure 3A] 1A to 1C are diagrams for explaining a manufacturing method of a semiconductor optical element. [Figure 3B] 1A to 1C are diagrams for explaining a manufacturing method of a semiconductor optical element. [Figure 3C] 1A to 1C are diagrams for explaining a manufacturing method of a semiconductor optical element. [Figure 3D] 1A to 1C are diagrams for explaining a manufacturing method of a semiconductor optical element. [Figure 3E] 1A to 1C are diagrams for explaining a manufacturing method of a semiconductor optical element. [Figure 3F] 1A to 1C are diagrams for explaining a manufacturing method of a semiconductor optical element. [Figure 4] 2 is a schematic cross-sectional view taken along line II-II of a semiconductor optical device according to a first modified example of the first embodiment. FIG. [Diagram 5] 2 is a schematic cross-sectional view taken along line II-II of a semiconductor optical device according to a first modified example of the first embodiment. FIG. [Figure 6] 2 is a schematic cross-sectional view taken along line II-II of a semiconductor optical device according to a second modification of the first embodiment. FIG. [Figure 7] 2 is a schematic cross-sectional view taken along line II-II of a semiconductor optical device according to a third modified example of the first embodiment. FIG. [Figure 8] 4 is a schematic cross-sectional view of a semiconductor optical device according to a second embodiment, corresponding to FIG. 2. [Figure 9] FIG. 11 is a bird's-eye view of a semiconductor optical device according to a third embodiment. [Figure 10] 10 is a schematic cross-sectional view taken along line XX of the semiconductor optical device shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. In all the drawings for explaining the embodiment, the same reference numerals are used for components having the same functions, and the repeated explanations are omitted. Note that the drawings shown below are merely for explaining the embodiment, and the size of the drawings does not necessarily correspond to the scale described in the embodiment.

[0028] [First embodiment] Fig. 1 is a bird's-eye view of a semiconductor optical device according to a first embodiment. Fig. 2 is a schematic cross-sectional view taken along line II-II in Fig. 1. In the following embodiments, a case will be described in which the semiconductor optical device is an optical amplifier, but the present invention is not limited to this and may be any of a semiconductor laser, an optical modulator, and a photodiode.

[0029] [substrate] The semiconductor optical device has a substrate 11. The substrate 11 is a single crystal substrate, and may be a conductive or semi-insulating semiconductor substrate or another crystal substrate. Here, the substrate 11 is a semiconductor substrate of a first conductivity type, for example an n-type InP substrate. A semiconductor multilayer, which will be described later, is disposed on the substrate 11.

[0030] [Uneven structure] As shown in FIG. 2, the semiconductor multilayer has a concave-convex structure. Here, the direction in which the optical function layer 14 described later extends is defined as a first direction D1, and the direction perpendicular to the first direction D1 in a plan view is defined as a second direction D2. The semiconductor optical element includes a first conductive type semiconductor layer, an optical function layer 14 arranged on the upper side of the first conductive type semiconductor layer, a second conductive type semiconductor layer arranged on the upper side of the optical function layer 14, a first electrode electrically connected to the first conductive type semiconductor layer, and a second electrode electrically connected to the second conductive type semiconductor layer. The semiconductor optical element also includes a first bank portion 41 in which a part of the first electrode is arranged, a first groove portion 31 adjacent to the first bank, a second bank portion 42 in which a part of the second electrode is arranged, a third bank portion 43, a third groove portion 33 adjacent to the third bank, and an optical function portion 20 including the optical function layer 14. The semiconductor optical element may include the second groove portion 32, but may be omitted. Specifically, the semiconductor optical element includes an optical function section 20 including an optical function layer 14. The semiconductor optical element includes a second groove section 32 and a third groove section 33 on both sides of the optical function section 20. The semiconductor optical element includes a second bank section 42 adjacent to the second groove section 32. The semiconductor optical element includes a third bank section 43 adjacent to the third groove section 33. The semiconductor optical element includes a first groove section 31 adjacent to the third bank section 43. The semiconductor optical element includes a first bank section 41 adjacent to the first groove section 31. That is, in a second direction perpendicular to the first direction in which the optical function section 20 extends in a plan view, the first bank section 41, the first groove section 31, the third bank section 43, the third groove section 33, the optical function section 20, the second groove section 32, and the second bank section 42 are arranged in this order. Details of each structure will be described later.

[0031] [Semiconductor multilayer] An etch stop layer 12 of a first conductivity type is formed on the substrate 11. The etch stop layer 12 is a material different from the first contact layer 13 described later, and is InGaAs of the first conductivity type here. The etch stop layer 12 is not limited to this, and may be another material. For example, the etch stop layer 12 may be InGaAsP. A first contact layer 13 of a first conductivity type is formed on the etch stop layer 12. The first contact layer 13 is, for example, n-type InP. An optical function layer 14 is formed on a part of the first contact layer 13. The optical function layer 14 is a place where current (carriers) and light interact with each other. For example, the optical function layer 14 is a semiconductor multiple quantum well layer or bulk layer. Here, the optical function layer 14 includes a multiple quantum well layer of InGaAsP. The optical function section 20 may include other layers above and / or below the optical function layer 14. For example, the optical function section 20 may include an optical confinement layer. A second contact layer 15 of a second conductivity type is formed on the optical function layer 14. The second contact layer 15 is, for example, p-type InP. Block layers 16 are formed on both sides of the optical function layer 14. The block layer 16 is also formed in a part between the first contact layer 13 and the second contact layer 15. The block layer 16 is arranged to concentrate the voltage applied to the second contact layer 15 (the injected current) on the optical function layer 14. The block layer 16 is composed of a stack of semiconductor layers of a first conductivity type and a second conductivity type, a stack of semi-insulating semiconductors, or a combination of these. The semiconductor multilayer refers to a semiconductor layer included between the etch stop layer 12 and the second contact layer 15 (including the etch stop layer 12 and the second contact layer 15). Note that another semiconductor layer may be arranged on the second contact layer 15 to reduce the contact resistance with the second contact electrode 52 described later. In that case, the other semiconductor layer for reducing the contact resistance is also included in the semiconductor multilayer. Here, the first conductivity type is n-type and the second conductivity type is p-type, but the opposite is also possible.

[0032] The optical function section 20 includes a first contact layer 13, an optical function layer 14, a second contact layer 15, and a block layer 16. A substrate 11 (a semiconductor layer of a first conductivity type) is present on the bottom surface of the first groove section 31, and details will be described later. A first contact layer 13 is present below the second groove section 32 and the third groove section 33. The first bank section 41, the second bank section 42, and the third bank section 43 each include the first contact layer 13, the block layer 16, and the second contact layer 15.

[0033] [Insulating film] The semiconductor optical device includes an insulating film 17. The insulating film 17 is disposed on the semiconductor multilayer except for a part of the top of the optical function section 20 and a part of the bottom of the first groove section 31. The insulating film 17 is, for example, silicon oxide.

[0034] [1st extraction electrode] The semiconductor optical element has a first contact electrode 51 and a first extraction electrode 61. The first contact electrode 51 is electrically and physically connected to the semiconductor layer of the first conductivity type. The first extraction electrode 61 contacts the first contact electrode 51 at the bottom of the first groove 31, and extends to the top surface of the first bank 41 via the side surface of the first groove 31 on the first bank 41 side. Hereinafter, the side surface of the first groove 31 on the first bank 41 side will be referred to as the first bank side side. Also, the side surface of the first groove 31 on the third bank 43 side will be referred to as the third bank side side. Specifically, the first contact electrode 51 is disposed at the bottom of the first groove 31. The first contact electrode 51 is connected to the first extraction electrode 61. The first extraction electrode 61 extends to the top surface of the first bank 41 via the side surface of the first bank side. In FIG. 2, a part of the insulating film 17 is disposed between a part of the first contact electrode 51 and the substrate 11, but the part of the insulating film 17 may not be disposed. Here, the first conductive type semiconductor layer is the substrate 11. The first contact electrode 51 and the first extraction electrode 61 are, for example, metal layers and may have a multi-layer structure including Ti, Pt, Au, etc. The first contact electrode 51 and the first extraction electrode 61 may have the same or different layer structures. Here, the first contact electrode 51 and the first extraction electrode 61 constitute a first electrode. Note that the first contact electrode 51 may not be required. In this case, the first extraction electrode 61 is directly connected to the substrate 11.

[0035] [Second extraction electrode] The semiconductor optical element has a second contact electrode 52 and a second extraction electrode 62. The second contact electrode 52 is electrically and physically connected to a semiconductor layer of a second conductivity type in the optical function section 20. Here, the semiconductor layer of the second conductivity type is the second contact layer 15. An insulating film 17 is disposed between a part of the second contact electrode 52 and the second contact layer 15. The second contact electrode 52 is connected to a second extraction electrode 62. The second extraction electrode 62 extends through the inside of the second groove section 32 to the upper surface of the second bank section 42. The second contact electrode 52 and the second extraction electrode 62 are, for example, metal layers, and may have a multilayer structure including Ti, Pt, Au, or the like. The second contact electrode 52 and the second extraction electrode 62 may have the same or different layer structures. Here, the second contact electrode 52 and the second extraction electrode 62 constitute a second electrode. The second contact electrode 52 may not be present. In this case, the second extraction electrode 62 is directly connected to the second contact layer 15 .

[0036] The semiconductor optical element is electrically connected to the outside at the first extraction electrode 61 of the first bank portion 41 and the second extraction electrode 62 of the second bank portion 42. The electrical connection to the outside may be via a wire or an electrical connection material such as solder.

[0037] [Terrace section] The main feature of the present invention is the shape of the first groove 31. As shown in FIG. 2, the side of the first groove 31 on the third bank 43 side (third bank side side) has a smooth shape that does not include any step, and the side of the first bank 41 side (first bank side side) has a two-step staircase shape. In other words, the third bank side side has a smooth shape that does not include any step at an angle of 90±10 degrees with respect to the substrate 11, and a terrace 70 is formed on the first bank side side. The first extraction electrode 61 extends from the bottom of the first groove 31 to the upper surface of the first bank 41 along the shape of this terrace 70. The side from the substrate 11 to the terrace 70 and the side from the terrace 70 to the upper surface of the first bank 41 do not include any terrace and are gently sloping rising surfaces. The angle between the rising surface and the substrate 11 is 90±10 degrees. Although the connection portion between the terrace portion 70 and the other rising surface is a right angle in FIG. 2, in reality, the connection is made with a rounded corner. The present disclosure is characterized in that the side surface of the first groove portion 31 on the third bank portion side has no terrace portion, whereas the side surface on the first bank portion 41 side includes at least one terrace portion 70. Here, the height from the bottom surface of the first groove portion 31 to the upper surface of the terrace portion 70 is lower than the height from the upper surface of the terrace portion 70 to the upper surface of the first bank portion 41. When viewed in the stacking direction of the semiconductor multilayer, the upper surface of the terrace portion 70 is preferably located below the center between the bottom surface of the first groove portion 31 and the upper surface of the first bank portion 41. It is preferable that the terrace portion 70 is located at a position of 40% or less. Hereinafter, the position of X% refers to the position where the upper surface of the terrace portion 70 exists when the position of the upper surface of the substrate 11 is 0% and the position of the upper surface of the first bank portion 41 is 100%. For example, the 40% position indicates that the height from the substrate 11 to the top surface of the terrace portion 70 is 40%, and the height from the top surface of the terrace portion 70 to the top surface of the first bank portion 41 is 60%. Moreover, the terrace portion 70 is preferably disposed at a position of 20% or more. If the terrace portion 70 is too close to the bottom surface of the first groove portion 31, the effect of improving the connectivity of the electrodes, which will be described later, is weakened.

[0038] The third bank side surface may not be a substantially vertical surface (smooth surface) completely free of the terrace portion 70 as shown in FIG. 2, but may include a very small step formed during groove formation. For example, when etching a semiconductor multilayer made of a plurality of materials, the third bank side surface may have a slightly wavy shape due to differences in etching rates depending on the materials. However, the size of the wavy shape in the second direction D2 is 1 / 10 or less compared to the width of the terrace portion 70 on the first bank side surface, and the third bank side surface can be said to be a surface that does not substantially include the terrace portion 70. In the present invention, the third bank side surface being a substantially vertical surface means that the distance in the second direction between the intersection of the third bank side surface with the top surface of the third bank 43 and the intersection of the third bank side surface with the bottom surface of the first groove 31 is 1 / 10 or less of the width of the terrace portion 70 on the first bank side surface.

[0039] [effect] In order to conduct the first extraction electrode 61 arranged on the upper surface of the first bank 41 to the substrate 11, the first extraction electrode 61 needs to be connected from the bottom of the first groove 31 to the upper surface of the first bank 41. If the side surface of the first bank is a substantially vertical surface that does not include the terrace 70, the first extraction electrode 61 may become thin on that side surface. In this case, the resistance between the bottom of the first groove 31 of the first extraction electrode 61 and the upper surface of the first bank 41 increases. In the worst case, the first extraction electrode 61 may break between the bottom of the first groove 31 and the upper surface of the first bank 41. However, since the terrace 70 is arranged in this embodiment, the step per electrode included in the side surface of the first bank is low, and the possibility of the above problem occurring can be reduced. Furthermore, the distance in the second direction D2 between the bottom of the first groove 31 and the top surface of the first bank 41 can be made smaller than when the side of the groove is tapered as in Patent Documents 1, 2, and 3. As a result, it is possible to achieve two effects: a decrease in the connectivity of the first extraction electrode 61 can be prevented, and an increase in the element size can be suppressed. Furthermore, by arranging the terrace 70 below the 50% position, it is possible to ensure the connectivity of the first extraction electrode 61 more stably. When forming the first extraction electrode 61, the closer the first extraction electrode 61 is to the bottom of the first groove 31, the less likely it is to be deposited on the side of the first groove 31. However, this can be prevented by arranging the terrace 70 at a position closer to the bottom of the first groove 31 than the top surface of the first bank 41. It is also important that the side of the third bank has a substantially vertical surface shape that does not include a step shape. For example, when both side surfaces of the groove are tapered as in Patent Documents 2 and 3, the effect of the increase in element size becomes large. However, in this embodiment, the terrace portion 70 is not disposed on the side surface of the third bank portion, thereby preventing the element size from increasing. The width of the terrace portion 70 in the second direction D2 is preferably half or more and twice or less the distance (height) from the substrate 11 to the terrace portion 70. If the width of the terrace portion 70 in the second direction D2 is too narrow, the result will be substantially the same as when the side surface of the first bank portion is a substantially vertical surface, so it is not preferable for the width of the terrace portion 70 in the second direction D2 to be too narrow.Moreover, if the width of the terrace portion 70 in the second direction D2 is too wide, the effect of suppressing the increase in the element size is weakened.

[0040] By providing the third groove 33 and the third bank 43, it is possible to prevent the first contact electrode 51 or the first extraction electrode 61 from being connected to the second extraction electrode 62. For example, the second extraction electrode 62 is disposed on the upper part of the optical function unit 20, but due to manufacturing variations or other factors, it may reach the side or bottom of the third groove 33 on the optical function unit 20 side. For example, in the case of a structure without the third bank 43 as in Patent Document 1, there is a risk that the first contact electrode 51 or the first extraction electrode 61 will be connected to the second extraction electrode 62 extending from the optical function unit 20, resulting in a short circuit. However, by providing the third groove 33 and the third bank 43 as in this embodiment, it is possible to prevent the second extraction electrode 62 from reaching the first groove 31. In particular, when the semiconductor optical element is mounted junction-down, the third groove 33 and the third bank 43 have the effect of preventing the first extraction electrode 61 and the second extraction electrode 62 from being electrically connected to each other. Junction-down mounting refers to mounting the semiconductor optical element so that the upper surface of the semiconductor optical element (the surface on which the first extraction electrode 61 and the second extraction electrode 62 are provided) faces the mounting substrate. The two electrodes provided on the mounting substrate are connected to the first extraction electrode 61 and the second extraction electrode 62 by solder. Solder melted on a metal surface has wettability that spreads along the metal surface. For example, if the solder in contact with the second extraction electrode 62 spreads to the first extraction electrode 61 side (the first groove 31 side), the first extraction electrode 61 and the second extraction electrode 62 may be short-circuited. However, due to the presence of the third groove 33, the solder spreading from the second extraction electrode 62 remains in the third groove 33, and furthermore, the third bank portion 43 prevents the solder from overflowing into the first groove 31 side.

[0041] In this embodiment, the height from the upper surface of the terrace portion 70 to the upper surface of the first bank portion 41 is approximately the same as the depth of the second groove portion 32 (the height from the bottom surface of the second groove portion 32 to the upper surface of the second bank portion 42). Here, approximately the same indicates that it is the same in the range formed by the same manufacturing process. The second extraction electrode 62 extends from the upper part of the optical function portion 20 through the side and bottom surfaces of the second groove portion 32 to the upper surface of the second bank portion 42. A configuration in which the second groove portion 32 is too deep is not desirable because the connectivity of the second extraction electrode 62 decreases. Therefore, the depth of the second groove portion 32 is a depth at which the second extraction electrode 62 is reliably connected. By positioning the upper surface of the terrace portion 70 at the same position as the bottom surface of the second groove portion 32, the first extraction electrode 61 can be reliably connected between the terrace portion 70 and the upper surface of the first bank portion 41. Furthermore, the height from the bottom surface of the first groove 31 to the upper surface of the terrace portion 70 is lower than the height from the upper surface of the terrace portion 70 to the upper surface of the first bank portion 41. Therefore, the first extraction electrode 61 has good connectivity even in the region from the bottom of the first groove 31 to the terrace portion 70. Note that the depth of the third groove 33 is arbitrary, but since it is desirable to form the third groove 33 in the same process as the second groove 32, it is desirable for the third groove 33 to have the same depth as the second groove 32.

[0042] [Manufacturing method] There is no limitation on the manufacturing method of the first groove portion 31, the second groove portion 32, and the third groove portion 33. For example, FIG. 3A to FIG. 3F are diagrams for explaining a manufacturing method for forming a semiconductor optical element. First, a semiconductor multilayer is crystal-grown on a substrate 11 (FIG. 3A). After the semiconductor multilayer is crystal-grown, a groove forming mask 80 for forming grooves is placed in the regions that will become the optical function portion 20, the first bank portion 41, the second bank portion 42, and the third bank portion 43 (FIG. 3B). By performing etching after placing the groove forming mask 80, a part of the first groove portion 31, the second groove portion 32, and the third groove portion 33 are formed (FIG. 3C). The etching is performed until the second groove portion 32 is formed. At this point, the second groove portion 32 and the third groove portion 33 are formed. Also, at this point, the bottom surface of the first groove portion 31 is at the same position as the upper surface of the completed terrace portion 70. Next, a terrace forming mask 81 for forming the terrace portion 70 is placed (FIG. 3D). The terrace forming mask 81 covers the area other than the area where the bottom surface of the first groove portion 31 will be finally formed. Then, etching is performed until the etch stop layer 12 is exposed. In this etching, the first contact layer 13 is etched. At this time, since the first contact layer 13 and the etch stop layer 12 are made of different materials, selective etching can be performed. As a result, the smooth upper surface of the etch stop layer 12 is exposed at the bottom of the first groove portion 31. Furthermore, the etch stop layer 12 is etched using a chemical solution different from that used in the above etching. Since the etch stop layer 12 and the substrate 11 are made of different materials, the substrate 11 functions as an etch stop layer for the etch stop layer 12, and the smooth surface of the substrate 11 is exposed (FIG. 3E). Then, all the masks are removed. As a result, the first groove portion 31 is formed (FIG. 3F). After that, the insulating film 17 is formed. The desired area of ​​the insulating film 17 is removed to form a through hole. Next, the first contact electrode 51 is formed at the bottom of the first groove portion 31. At this time, since the bottom surface of the first groove portion 31 is smooth, the connectivity between the first contact electrode 51 and the substrate 11 is good. The second contact electrode 52 may be formed in the same process as the first contact electrode 51, or in a different process. Finally, the first extraction electrode 61 and the second extraction electrode 62 are formed to complete the semiconductor optical device.The manufacturing process for the first extracted electrode 61 and the second extracted electrode 62 may be the same process or different processes.

[0043] [Variation 1] 4 and 5 are schematic cross-sectional views along line II-II according to the first modification of the semiconductor optical device of the first embodiment. The difference from the first embodiment is that the side surface of the first groove 31 on the third bank side has a stepped shape including the terrace portion 70L. According to the above manufacturing method, in the step of arranging the terrace forming mask 81 in FIG. 3D, it is necessary to arrange the terrace forming mask 81 in accordance with the position of a part of the already formed first groove 31. However, there are cases where the terrace forming mask 81 is arranged shifted in the second direction D2. For example, when the terrace forming mask 81 is shifted to the right in FIG. 3D, the terrace portion 70L is formed on the side surface on the third bank side as shown in FIG. 4. Also, the width of the terrace portion 70R on the side surface on the first bank side of the first groove 31 in the second direction D2 is smaller than that of the first embodiment by the distance by which the terrace forming mask 81 is shifted. As shown in FIG. 4, when the terrace forming mask 81 is shifted to the right side of FIG. 3D, the terrace portion 70R on the first bank side and the terrace portion 70L on the third bank side are at the same height as seen from the substrate 11. When the terrace forming mask 81 is shifted to the left side of FIG. 3D, the terrace portion 70L is formed on the third bank side as shown in FIG. 5. The width of the terrace portion 70R on the first bank side in the second direction D2 is larger than that of the first embodiment by the distance by which the terrace forming mask 81 is shifted. As shown in FIG. 5, when the terrace forming mask 81 is shifted to the left side of FIG. 3D, the terrace portion 70L on the third bank side is formed at a higher position as seen from the substrate 11 than the terrace portion 70R on the first bank side. As in the first modification, even when the position at which the terrace forming mask 81 is disposed is shifted, it is possible to achieve two effects at the same time, that is, the connectivity of the first extraction electrode 61 can be prevented from decreasing and the element size can be prevented from increasing. The terrace portion 70R on the side surface facing the first bank is wider in the second direction D2 than the terrace portion 70L on the side surface facing the third bank.

[0044] [Variation 2] FIG. 6 is a schematic cross-sectional view along line II-II of the semiconductor optical device of the first embodiment. The difference from the first embodiment is that two terraces 70 are included on the side surface of the first groove 31 on the side of the first bank. In this second modification, the side surface of the first groove 31 on the side of the first bank includes a second terrace 72 in addition to the terrace 70. In the first embodiment, the height from the terrace 70 to the upper surface of the first bank 41 is higher than the height from the bottom surface of the first groove 31 to the upper surface of the terrace 70. Therefore, there is a risk that the connectivity of the first extraction electrode 61 will be reduced. This can be prevented by arranging the second terrace 72 between the terrace 70 and the upper surface of the first bank 41. By increasing the number of terraces as described above, the connection of the first extraction electrode 61 can be stabilized. On the other hand, an increase in the number of terraces leads to an increase in the size of the device. Therefore, the number of terraces provided on the side surface on the side of the first bank is preferably one or two.

[0045] [Variation 3] FIG. 7 is a schematic cross-sectional view along the line II-II according to the third modification of the semiconductor optical device of the first embodiment. The difference from the first embodiment is that the bottom surface of the first groove 31 is the top surface of the etch stop layer 12. Here, the semiconductor layer of the first conductivity type is the etch stop layer 12. As described in the first embodiment, even if the formation process of the first groove 31 (the etching step of FIG. 3F) is completed in a state in which the bottom surface of the first groove 31 is the top surface of the etch stop layer 12, the bottom surface of the first groove 31 (the top surface of the etch stop layer 12) is a smooth surface. Therefore, there is no problem in the connectivity between the first contact electrode 51 and the etch stop layer 12, which is the semiconductor layer of the first conductivity type. According to this embodiment, the depth of the first groove 31 can be made slightly shallower than in the first embodiment, and the stability of the connection of the first extraction electrode 61 can be improved.

[0046] [Second embodiment] Fig. 8 is a schematic cross-sectional view of a semiconductor optical device according to the second embodiment. Fig. 8 corresponds to a schematic cross-sectional view taken along line II-II of the first embodiment. The semiconductor optical device of this embodiment has an insulating substrate 211. A semiconductor multilayer is formed on the upper surface of the insulating substrate 211, and a concave-convex structure similar to that of the first embodiment is arranged thereon.

[0047] A high-concentration contact layer 218 of a first conductivity type is formed on the substrate 211. Here, the semiconductor layer of the first conductivity type is the high-concentration contact layer 218. An etch stop layer 12 of the first conductivity type is formed on the high-concentration contact layer 218. A first contact layer 213 of the first conductivity type is formed on the etch stop layer 12. The semiconductor layer above the first contact layer 213 is the same as in the first embodiment. In this embodiment, the high-concentration contact layer 218 to the second contact layer 15 are semiconductor multilayers.

[0048] The high-concentration contact layer 218 and the first contact layer 213 have the same conductivity type and are made of the same material. Here, the high-concentration contact layer 218 and the first contact layer 213 are n-type InP. However, the impurity concentration of the high-concentration contact layer 218 is higher than the impurity concentration of the first contact layer 213. The etch stop layer 12 is made of a different material from the high-concentration contact layer 218 and the first contact layer 213. The etch stop layer 12 is of the first conductivity type. The bottom surface of the first groove portion 31 is the upper surface of the high-concentration contact layer 218.

[0049] The higher the impurity concentration of the semiconductor layer, the lower the resistance, while the higher the amount of light absorption. The light propagating through the semiconductor optical element spreads vertically and horizontally around the optical function layer 14. Here, if the impurity concentration of the first contact layer 213 close to the optical function layer 14 is high, the amount of light absorption increases, and there is a possibility that the optical characteristics of the semiconductor optical element cannot be sufficiently obtained. If the impurity concentration of the first contact layer 213 is reduced in order to reduce the amount of light absorption, the resistance of the first contact layer 213 increases. For example, in the first embodiment, if the first contact electrode 51 is directly connected to the low-concentration first contact layer 13, a semiconductor layer with high resistance is sandwiched between the first contact electrode 51 and the optical function layer 14, which leads to deterioration of the characteristics of the semiconductor optical element. The length in the second direction D2 from the first contact electrode 51 to the lower part of the optical function layer 14 is, for example, several tens of μm. On the other hand, in the second embodiment, the first contact electrode 51 is connected to the high-concentration contact layer 218 with low resistance. The first contact layer 213 close to the optical function layer 14 has a low impurity concentration and absorbs less light. At this time, the first contact electrode 51 is electrically connected to the lower part of the optical function layer 14 by the low-resistance high-concentration contact layer 218. The etch stop layer 12 and the first contact layer 213 are sandwiched between the lower part of the optical function layer 14 and the high-concentration contact layer 218. However, the thickness of the etch stop layer 12 and the first contact layer 213 is on the order of several μm, which is sufficiently small compared with the distance (several tens of μm) between the optical function layer 14 and the first contact electrode 51 in the second direction D2. Therefore, the high resistance of the first contact layer 213 is not a problem. According to the second embodiment, the amount of light absorption can be reduced while suppressing an increase in the resistance of the semiconductor layer. In the first embodiment, the structure that does not include a tapered shape on the side surface on the third bank portion side is also superior in terms of this resistance. When the side surface on the optical function layer side is tapered as in Patent Documents 2 and 3, the optical function layer and the bottom surface of the first groove portion are further apart. Therefore, the resistance becomes larger. However, in the first embodiment, since the side surface on the third bank portion side does not include a tapered shape, the distance in the second direction D2 between the optical function layer 14 and the first contact electrode 51 can be made smaller than when the side surface on the third bank portion side includes a tapered shape.Therefore, the effect of an increase in the resistance of the first contact layer 213 can be suppressed.

[0050] The second embodiment also provides the same effects as the first embodiment. Moreover, the first to third modified examples of the first embodiment may also be applied to the second embodiment.

[0051] [Third embodiment] Fig. 9 is a bird's-eye view of a semiconductor optical device according to a third embodiment. Fig. 10 is a schematic cross-sectional view taken along line XX in Fig. 9. The semiconductor optical device shown in Fig. 9 and Fig. 10 is a ridge-type semiconductor optical device, which is a directly modulated semiconductor laser in this example. However, the semiconductor optical device is not limited to this, and may be any of an optical amplifier, an optical modulator, and a photodiode.

[0052] [substrate] The semiconductor optical device has a substrate 311. The substrate 311 is a single crystal substrate, and may be a conductive or semi-insulating semiconductor substrate, or may be another crystal substrate. Here, the substrate 311 is a semiconductor substrate of a first conductivity type, for example, an n-type InP substrate. A semiconductor multilayer, which will be described later, is disposed on the substrate 311.

[0053] [Uneven structure] As shown in Fig. 10, the semiconductor multilayer has a concave-convex structure. The semiconductor optical element includes an optical function section 320 having a mesa structure in a region where a second extraction electrode 362 described later and the semiconductor multilayer are in contact with each other. A second groove 332 and a third groove 333 are provided on both sides of the optical function section 320. The semiconductor optical element includes a second bank section 342 adjacent to the second groove 332. The semiconductor optical element includes a third bank section 343 adjacent to the third groove 333. The semiconductor optical element includes a first groove 331 adjacent to the third bank section 343. The semiconductor optical element includes a first bank section 341 adjacent to the first groove 331. Details of each structure will be described later.

[0054] [Semiconductor multilayer] A first cladding layer 313 of a first conductivity type is formed on the substrate 311. Here, the first cladding layer 313 is n-type InP. An optical function layer 314 is formed on the first cladding 313. The optical function layer 314 is a place where current (carriers) and light interact with each other. For example, the optical function layer 314 is a semiconductor multiple quantum well layer or bulk layer. Here, the optical function layer 314 includes an InGaAsP multiple quantum well layer. Note that the optical function section 320 may include other layers above and / or below the optical function layer 314. For example, the optical function section 320 may include an optical confinement layer or a diffraction grating layer. A second cladding layer 315 of a second conductivity type is formed on the optical function layer 314. The second cladding layer 315 is, for example, p-type InP. A contact layer 319 of a second conductivity type is formed on the second cladding layer 315. The contact layer 319 is, for example, p-type InGaAs. The semiconductor multilayer refers to the semiconductor layers included between the first cladding layer 313 and the contact layer 319 (including the first cladding layer 313 and the contact layer 319).

[0055] The optical function section 320, the first bank section 341, the second bank section 342, and the third bank section 343 include the same semiconductor multilayer. The bottom surface of the first groove section 331 is located in the first cladding layer 313, but may be located in the substrate 311 if the substrate 311 is of a conductive type. The bottom surfaces of the second groove section 332 and the third groove section 333 are the upper surface of the optical function layer 314. Here, the upper surface of the optical function layer 314 does not necessarily refer to the upper surface of the multiple quantum well layer, but means the upper surface of the optical confinement layer if, for example, an optical confinement layer is disposed on the multiple quantum well layer.

[0056] [Insulating film] The semiconductor optical device includes an insulating film 317. The insulating film 317 is disposed on the upper surface of the semiconductor multilayer except for the upper surface of the optical function section 320 and a part of the bottom surface of the first groove section 331. The insulating film 317 is, for example, silicon oxide.

[0057] [1st extraction electrode] The semiconductor optical element has a first extraction electrode 361 electrically and physically connected to a semiconductor layer of the first conductivity type. Here, the semiconductor layer of the first conductivity type is the first cladding layer 313. In FIG. 10, a part of the insulating film 317 is disposed between a part of the first extraction electrode 361 and the first cladding layer 313, but the part of the insulating film 317 may not be disposed. The first extraction electrode 361 extends to the top surface of the first bank 341 via the side surface of the first bank portion. The first extraction electrode 361 is composed of three regions: a region (pad region 361a) disposed on the top surface of the first bank 341, a region (connection region 361b) disposed on the side surface of the first groove 331 on the first bank 341 side, and a region (contact region 361c) disposed on the first cladding layer 313 (the bottom of the first groove 331). The length in the first direction D1 is the longest in the contact region 361c and the shortest in the connection region 361b. In order to reduce the connection resistance between the semiconductor layer (first cladding layer 313) and the first extraction electrode 361, the contact region 361c is arranged widely in the first direction D1. On the other hand, in order to accommodate high-speed driving, it is preferable that the parasitic capacitance of the pad region 361a and the connection region 361b is small. In order to reduce the parasitic capacitance, it is preferable that the length in the first direction D1 direction of the pad region 361a and the connection region 361b is short. The pad region 361a needs to have a certain size for connection with the outside. However, the connection region 361b is preferably small within a range in which the resistance of the electrode does not increase, and is the smallest of the three regions. The first extraction electrode 361 is, for example, a metal layer, and may be a multilayer structure including Ti, Pt, Au, etc. In addition, the pad region 361a, the connection region 361b, and the contact region 361c are integrally configured. Here, the first extracted electrode 361 is the first electrode.

[0058] [Second extraction electrode] The semiconductor optical element has a second extraction electrode 362 electrically and physically connected to the semiconductor layer of the second conductivity type in the optical function section 320. Here, the semiconductor layer of the second conductivity type is the contact layer 319. The second extraction electrode 362 extends through the inside of the second groove section 332 to the upper surface of the second bank section 342. The second extraction electrode 362 is composed of three regions: a region (pad region 362a) arranged on the upper surface of the second bank section 342, a region (connection region 362b) arranged inside the second groove section 332, and a region (contact region 362c) arranged on the upper part of the optical function section 320. The contact region 362c includes not only the upper surface of the mesa structure but also the side surface and a part of the side. As with the first extraction electrode 361, the length in the first direction D1 is the shortest (narrowest) in the connection region 362b. The second extraction electrode 362 is, for example, a metal layer, and may be a multilayer structure including Ti, Pt, Au, etc. The pad region 362a, the connection region 362b, and the contact region 362c are integrally configured. Here, the second extraction electrode 362 is the second electrode.

[0059] The semiconductor optical element is electrically connected to the outside at pad region 361a on first bank portion 341 and pad region 362a on second bank portion 342. The electrical connection to the outside may be via a wire or an electrical connection material such as solder.

[0060] [Terrace section] The side surface of the first groove 331 facing the first bank 341 has a terrace 370. On the other hand, the side surface facing the third bank 343 is a substantially vertical surface. The upper surface of the terrace 370 is the upper surface of the optical function layer 314. In other words, the height from the upper surface of the first bank 341 to the upper surface of the terrace 370 is the same as the depth of the second groove 332. Other features are the same as those of the first embodiment.

[0061] In this embodiment, the same effects as in the first embodiment can be obtained. Also in the third embodiment, the first to third modified examples in the first embodiment may be applied.

[0062] The present invention is not limited to the above-described embodiment, and various modifications are possible. For example, the configurations described in the embodiments can be replaced with substantially the same configurations, configurations that provide the same effects, or configurations that can achieve the same purpose.

[0063] The present invention achieves both improved electrode connectivity and prevention of device size expansion in a semiconductor optical device in which a first electrode and a second electrode for applying a voltage to an optical function section are arranged on the same surface. In an embodiment of the present invention, this is achieved by arranging a terrace portion on one side surface of a first groove portion for connecting a first electrode to a semiconductor layer of a first conductivity type below an optical function layer. The side surface on the opposite side of the first groove portion (side surface on the optical function section side) includes a substantially vertical surface or a terrace portion. The terrace portion is arranged at a position below half the height of the first groove portion, preferably at a position between 20% and 40%. The width of the terrace portion may be between half and twice the height from the bottom surface of the first groove portion to the terrace portion. The side surface on the optical function section side of the first groove portion may be a substantially vertical surface. The substantially vertical surface may include small steps and undulations, but the lateral width from the upper end to the lower end of the side surface is 1 / 10 or less of the width of the terrace portion. When a terrace portion is also included on the optical function section side of the first groove portion, the width is narrower than the width of the terrace portion on the opposite side. The first electrode contacts the semiconductor layer of the first conductivity type at the bottom surface of the first groove. The semiconductor layer of the first conductivity type may be any of a substrate, a contact layer of the first conductivity type, an etch stop layer made of a different material from the contact layer of the first conductivity type, and a high-concentration contact layer containing a higher concentration of impurities than the contact layer of the first conductivity type. The present invention may have second and third grooves on both sides of the optical function section. The depth of the second groove may be the same as the depth to the terrace portion of the first groove. The second electrode may extend from the top surface of the optical function section through the inside of the second groove. [Explanation of symbols]

[0064] 11 Substrate 12 Etch stop layer 13 First contact layer 14 Optical functional layer 15 Second contact layer 16 Block Layer 17 Insulating film 20 Optical function section 31 First Groove 32 Second groove 33 Third Groove 41 First Bank 42 Second Bank 43 3rd Bank Section 51 First contact electrode 52 Second contact electrode 61 1st extraction electrode 62 2nd extraction electrode 70 Terrace 70R Terrace section 70L terrace section 72 Second Terrace Section 80 Groove Formation Mask 81 Terrace formation mask 211 Substrate 213 First contact layer 218 High-concentration contact layer 311 Substrate 313 First cladding layer 314 Optical Functional Layer 315 2nd cladding layer 317 Insulating Film 319 Contact Layer 320 Optical Function Unit 331 First Groove 332 Second Groove 333 Third Groove 341 First Bank 342 Second Bank 343 3rd Bank Section 361 1st extraction electrode 361a Pad Area 361b Connection area 361c Contact Area 362 2nd extraction electrode 362a Pad Area 362b Connection area 362c Contact Area 370 Terrace

Claims

1. A semiconductor layer of a first conductivity type; an optical function layer disposed on an upper side of the first conductive type semiconductor layer; A second conductive type semiconductor layer disposed on the upper side of the optical function layer; a first electrode electrically connected to the first conductivity type semiconductor layer; a second electrode electrically connected to the second conductivity type semiconductor layer; A semiconductor optical device comprising: a first bank portion in which a part of the first electrode is disposed; a first groove portion adjacent to the first bank; a second bank portion in which a portion of the second electrode is disposed; A third bank portion; a third groove portion adjacent to the third bank; an optical function section including the optical function layer; Including, the first bank portion, the first groove portion, the third bank portion, the third groove portion, the optical function portion, and the second bank portion are arranged in this order in a second direction perpendicular to a first direction in which the optical function portion extends in a plan view; the second electrode is in contact with the second conductive type semiconductor layer in the optical function section; a first bank portion-side side surface of the first groove portion that is a side surface of the first bank portion-side has a stepped shape including a terrace portion, a distance in the second direction between an upper end and a lower end of a side surface of the first bank portion that is a side surface of the first groove portion on the third bank portion side, the upper end and the lower end of the side surface of the third bank portion that is a side surface of the first groove portion on the third bank portion side, the first electrode contacts the semiconductor layer of the first conductivity type at a bottom of the first groove, and extends over a side surface of the first bank to an upper surface of the first bank.

2. 2. The semiconductor optical device according to claim 1, A semiconductor optical element, wherein the side surface of the third bank portion is a substantially vertical surface or a stepped shape including a terrace portion.

3. 2. The semiconductor optical device according to claim 1, a second groove portion between the second bank portion and the optical function portion;

4. 2. The semiconductor optical device according to claim 1, a height from a bottom surface of the first groove to an upper surface of the terrace is equal to or less than half a height from the bottom surface of the first groove to an upper surface of the first bank.

5. 2. The semiconductor optical device according to claim 1, a height from a bottom surface of the first groove to an upper surface of the terrace is 20% or more and 40% or less of a height from the bottom surface of the first groove to an upper surface of the first bank.

6. 2. The semiconductor optical device according to claim 1, a width in the second direction of the terrace portion on the side surface of the first bank portion is more than half and less than twice the height from a bottom surface of the first groove portion to an upper surface of the terrace portion.

7. 2. The semiconductor optical device according to claim 1, a distance in the second direction between an intersection of the side surface of the third bank portion with the top surface of the third bank portion and an intersection of the side surface of the third bank portion with a bottom surface of the first groove portion is 1 / 10 or less of a width of the terrace portion of the side surface of the first bank portion.

8. 4. The semiconductor optical device according to claim 3, a height from the terrace portion on the side surface of the first bank to an upper surface of the first bank is the same as a height from a bottom surface of the second groove portion to an upper surface of the second bank.

9. 4. The semiconductor optical device according to claim 3, the second electrode extends from an upper portion of the optical function portion, through the inside of the second groove portion, and to an upper surface of the second bank portion.

10. 2. The semiconductor optical device according to claim 1, a contact layer of a first conductivity type is further provided between the semiconductor layer of the first conductivity type and the optical function layer; The terrace portion on the side surface of the first bank portion is provided on the contact layer of the first conductivity type.

11. 2. The semiconductor optical device according to claim 1, The semiconductor layer of the first conductivity type is a semiconductor substrate of the first conductivity type.

12. 2. The semiconductor optical device according to claim 1, a substrate of a first conductivity type; an etch stop layer of a first conductivity type disposed over the substrate; a contact layer of a first conductivity type disposed on the etch stop layer and made of a different material than the etch stop layer; The semiconductor layer of the first conductivity type is a substrate of the first conductivity type.

13. 2. The semiconductor optical device according to claim 1, a substrate of a first conductivity type; an etch stop layer of a first conductivity type disposed over the substrate; a contact layer of a first conductivity type disposed on the etch stop layer and made of a different material than the etch stop layer; The semiconductor optical device, wherein the first conductive type semiconductor layer is the etch stop layer.

14. 2. The semiconductor optical device according to claim 1, A substrate; a high concentration contact layer of a first conductivity type disposed on the substrate; an etch stop layer of a first conductivity type disposed on the high concentration contact layer; a contact layer of a first conductivity type disposed on the etch stop layer and having an impurity concentration lower than that of the high concentration contact layer; The semiconductor layer of the first conductivity type is the high-concentration contact layer.

15. 2. The semiconductor optical device according to claim 1, a first terrace portion and a second terrace portion having a different height from the first terrace portion, the second terrace portion being disposed on the first bank side surface;

16. 2. The semiconductor optical device according to claim 1, the first electrode includes a first contact electrode and a first extraction electrode in contact with the first contact electrode; the first contact electrode is in contact with the first conductive type semiconductor layer at a bottom of the first groove; the first extraction electrode extends from an upper side of the first contact electrode, through the terrace portion on the side surface of the first bank portion, to an upper surface of the first bank portion.

17. 4. The semiconductor optical device according to claim 3, the second electrode includes a second contact electrode and a second extraction electrode in contact with the second contact electrode; the second contact electrode is in contact with the second conductive type semiconductor layer on an upper portion of the optical function unit; the second extraction electrode extends from an upper side of the second contact electrode, through the inside of the second groove, to an upper surface of the second bank portion.

18. 2. The semiconductor optical device according to claim 1, The optical function layer included in the optical function unit is sandwiched between semiconductor block layers, The semiconductor optical element, wherein the second conductivity type semiconductor layer is disposed on the optical function layer and the blocking layer.

19. 2. The semiconductor optical device according to claim 1, The optical function layer is disposed in the optical function section, the first bank section, the second bank section, and the third bank section.

20. 3. The semiconductor optical device according to claim 2, a terrace portion on a side surface of the first bank portion that is wider in the second direction than a terrace portion on a side surface of the third bank portion that is wider in the second direction.

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