Plasma processing apparatus

Abstract

To provide a technique capable of reducing a damage of a wafer, that may occur in the case of suppressing an impact on the wafer due to a positive ion.SOLUTION: A shower head is electrically connected to a first high-frequency power supply, is configured so that a voltage is applied from the first high-frequency power supply, and has a function of an upper electrode. A shaping circuit is configured so as to supply the shower head with the high-frequency voltage supplied from the first high-frequency power supply after a shaping of a positive voltage component of the high-frequency voltage being cut. A mounting stage is provided below the shower head, is configured so that a wafer is mounted thereon, and has a function of a lower electrode. A plane electrode is a conductor which is provided in a processing space between the shower head and the mounting stage and extends along a front surface of the mounting stage, and of which a plurality of conductive wires is combined in a planar-surface shape. A first potential setting circuit is configured so as to set a potential of the plane electrode. A second potential setting circuit is configured so as to set the potential of the mounting stage.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] An exemplary embodiment of the present disclosure relates to a plasma processing apparatus. [Background technology]

[0002] In the manufacture of electronic devices such as semiconductor devices, for example, plasma processing apparatuses are used. In the plasma processing apparatus, wafers are processed by irradiating the wafers with ions in plasma. Patent Document 1 discloses a technique for suppressing ion bombardment of the wafer. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2022-018062 Summary of the Invention [Problem to be solved by the invention]

[0004] The present disclosure provides a technique for reducing damage to a wafer that may occur when bombardment of the wafer by positive ions is suppressed. [Means for solving the problem]

[0005] In one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes a processing vessel, a first high frequency power supply, a showerhead, a shaping circuit, a mounting table, a planar electrode, a first potential setting circuit, and a second potential setting circuit. The showerhead is electrically connected to the first high frequency power supply, configured to receive a voltage from the first high frequency power supply, and functions as an upper electrode. The shaping circuit is configured to supply the high frequency voltage supplied from the first high frequency power supply to the showerhead after shaping the high frequency voltage to cut a positive voltage component of the high frequency voltage. The mounting table is provided below the showerhead, configured to mount a wafer thereon, and functions as a lower electrode. The planar electrode is provided in a processing space between the showerhead and the mounting table, extends along the surface of the mounting table, and is configured by combining a plurality of conductors in a planar shape. The first potential setting circuit is configured to set the potential of the planar electrode. The second potential setting circuit is configured to set the potential of the mounting table. Effect of the Invention

[0006] According to one exemplary embodiment, damage to the wafer that may occur when bombardment of the wafer by positive ions is suppressed may be reduced. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 illustrates a plasma processing apparatus according to an exemplary embodiment. [Diagram 2] 2 is a diagram showing a configuration of a potential setting circuit according to an example for setting a potential of the mounting table shown in FIG. 1. [Diagram 3] 1. FIG. 4 is a diagram showing a configuration of a potential setting circuit according to another example of the potential setting circuit for setting the potential of the mounting table shown in FIG. [Figure 4] 1. FIG. 4 is a diagram showing a configuration of a potential setting circuit according to another example of the potential setting circuit for setting the potential of the mounting table shown in FIG. [Diagram 5] 2 is a diagram showing a configuration of a potential setting circuit according to an example for setting a potential of the planar electrode shown in FIG. 1; FIG. [Figure 6]1. FIG. 4 is a diagram showing the configuration of a potential setting circuit according to another example for setting the potential of the planar electrode shown in FIG. [Figure 7] 1. FIG. 4 is a diagram showing the configuration of a potential setting circuit according to another example for setting the potential of the planar electrode shown in FIG. [Figure 8] 2 is an enlarged view illustrating a portion of the planar electrode configuration shown in FIG. 1. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] Various exemplary embodiments are described below.

[0009] In order to suppress the impact of positive ions on the wafer in plasma processing, it is possible to cut the positive voltage component of the high frequency voltage used for plasma generation. In this case, a current may flow in the plasma in the form of a DC pulse from the conductive mounting table on which the wafer is placed to the upper electrode. However, when a wafer on which an insulating film is formed is placed on the mounting table, the wafer does not pass DC current, so the current flows along the radial direction of the wafer from the outer periphery to the center of the wafer to avoid the wafer, and then flows through the plasma toward the upper electrode. Therefore, a potential difference occurs in the plasma in the radial direction of the wafer, and this potential difference is transferred to the surface of the wafer, and a potential difference also occurs on the surface of the wafer in the radial direction of the wafer. Such a potential difference that may occur in the radial direction may cause damage (charge-up damage) on the surface of the wafer. A plasma processing apparatus according to an exemplary embodiment provides a technology that can reduce damage to the wafer that may occur when suppressing the impact of positive ions on the wafer.

[0010] That is, in one exemplary embodiment, a plasma processing apparatus is provided. The plasma processing apparatus includes a processing vessel, a first high frequency power supply, a shower head, a shaping circuit, a mounting table, a planar electrode, a first potential setting circuit, and a second potential setting circuit. The shower head is electrically connected to the first high frequency power supply, configured to receive a voltage from the first high frequency power supply, and functions as an upper electrode. The shaping circuit is configured to supply the high frequency voltage supplied from the first high frequency power supply to the shower head after shaping the high frequency voltage to cut the positive voltage component of the high frequency voltage. The mounting table is provided below the shower head, configured to mount a wafer thereon, and functions as a lower electrode. The planar electrode is provided in a processing space between the shower head and the mounting table, extends along the surface of the mounting table, and is configured by combining a plurality of conductors in a planar shape. The first potential setting circuit is configured to set the potential of the planar electrode. The second potential setting circuit is configured to set the potential of the mounting table.

[0011] The shaping circuit of the above-mentioned plasma processing apparatus applies a high frequency voltage with the positive voltage component cut to the shower head, which is the upper electrode, so that the impact of positive ions on the wafer can be suppressed. In this plasma processing apparatus, a planar electrode to which a potential is applied is provided in the processing space between the shower head and the mounting table, and the planar electrode is a conductor formed by combining a plurality of conductors in a planar shape, and has a plurality of openings communicating the upper and lower sides. Therefore, even if an insulating film is formed on the wafer, the current does not flow along the radial direction of the wafer, but can flow from the planar electrode arranged on the wafer to the shower head arranged on the wafer. Therefore, no radial potential difference is generated on the surface of the wafer, so that damage to the wafer that may occur when the impact of positive ions on the wafer is suppressed can be reduced.

[0012] Various exemplary embodiments will now be described in detail with reference to the drawings, in which the same or corresponding parts are designated by the same reference numerals.

[0013] Fig. 1 is a diagram illustrating a schematic configuration of a plasma processing apparatus according to an exemplary embodiment. The plasma processing apparatus 100 illustrated in Fig. 1 performs plasma processing on a wafer W. The wafer W has an insulating layer formed on its surface or the like.

[0014] The plasma processing apparatus 100 includes a processing vessel 1, a mounting table 2, an insulating member 9, a shower head 10, a main body 11, a shower plate 12, gas outlet holes 13, gas introduction holes 14, a gas supply unit 20, an exhaust port 41, an exhaust pipe 42, and an exhaust unit 43. The plasma processing apparatus 100 further includes a high-frequency power supply 30, a matching box 32, a power supply line 33, a shaping circuit 34, a control unit 50, and potential setting circuits 61 and 63.

[0015] The plasma processing apparatus 100 has a substantially cylindrical metal processing vessel 1. The processing vessel 1 is electrically grounded. A mounting table 2 is provided inside the processing vessel 1 below a shower head 10 and configured to horizontally mount a wafer W thereon. The mounting table 2 functions as a lower electrode and is electrically connected to a potential setting circuit 61. The potential of the mounting table 2 (hereinafter simply referred to as the mounting table 2), which is the lower electrode, can be set by the potential setting circuit 61. The configuration of the potential setting circuit 61 is shown in each of FIGS. 2 to 4.

[0016] The planar electrode ME is a conductor formed by combining a plurality of conducting wires in a planar shape. The planar electrode ME may be, for example, a conductor formed by arranging a plurality of conducting wires along a common surface without intersecting each other (approximately parallel), or the like. The planar electrode ME is provided in the processing space 15 between the shower head 10 and the mounting table 2, and extends along the surface 2a of the mounting table 2. The potential of the planar electrode ME may be set by a potential setting circuit 63. The configuration of the potential setting circuit 63 is shown in each of FIGS. 5 to 7. An example of the configuration of the planar electrode ME in which a plurality of conducting wires are arranged in a mesh shape is shown in FIG. 8.

[0017] The mounting table 2 may have a heating mechanism or a cooling mechanism (both not shown) depending on the plasma processing. A plurality of lift pins (not shown) may be inserted into the mounting table 2 so as to be capable of protruding and retracting from the upper surface of the mounting table 2. The wafer W is transferred to and from the mounting table 2 by the lifting mechanism (not shown) lifting and lowering the plurality of lift pins.

[0018] An opening is provided in the upper part of the processing vessel 1, and a shower head 10 is fitted into the opening via an insulating member 9 so as to face the mounting table 2. The shower head 10 is a conductor, and is electrically connected to a high-frequency power supply 30 so that a voltage is applied thereto from the high-frequency power supply 30, and functions as an upper electrode.

[0019] A high frequency power supply 30 is electrically connected to the shower head 10 via a matching box 32, a power supply line 33, and a shaping circuit 34. The power supply line 33 electrically connects the high frequency power supply 30 and the shower head 10. A high frequency voltage output from the high frequency power supply 30 via the matching box 32 is applied to the shower head 10 via the power supply line 33, with the positive voltage component being cut by the shaping circuit 34.

[0020] The matching box 32 is provided on the power supply line 33 and is electrically connected between the high frequency power supply 30 and the shaping circuit 34. The matching box 32 is configured to match the load impedance to the internal impedance (or output impedance) of the high frequency power supply 30.

[0021] The shaping circuit 34 is provided on the power supply line 33 and is electrically connected between the matching box 32 and the showerhead 10 . The shaping circuit 34 is configured to supply the high frequency voltage supplied from the high frequency power supply 30 to the showerhead 10 after shaping the high frequency voltage to cut off the positive voltage component of the high frequency voltage.

[0022] The shaping circuit 34 includes a capacitor 34a and a diode 34b. The capacitor 34a is provided between the matching box 32 and the shower head 10, and the power supply line 33 between the capacitor 34a and the shower head 10 is grounded via the diode 34b. That is, one end of the capacitor 34a is electrically connected to the high frequency power supply 30 via the matching box 32, and the other end of the capacitor 34a is electrically connected to the shower head 10. The anode of the diode 34b is electrically connected to the capacitor 34a and the shower head 10 via the power supply line 33. The cathode of the diode 34b is grounded.

[0023] The overall shape of the showerhead 10 (hereinafter simply referred to as the showerhead 10), which is the upper electrode, may be cylindrical. The showerhead 10 has a main body 11 having an opening at the bottom, and a shower plate 12 provided to cover the opening of the main body 11. The internal space between the main body 11 and the shower plate 12 provides a gas diffusion space. The shower plate 12 has a plurality of gas ejection holes 13.

[0024] The shower head 10 is provided with a gas inlet 14, and a processing gas for plasma processing supplied from a gas supply unit 20 is introduced into the shower head 10 through the gas inlet 14.

[0025] The gas supply unit 20 is configured to supply a processing gas into the showerhead 10. The processing gas introduced into the showerhead 10 can be supplied to the processing space 15 through the gas ejection holes 13.

[0026] The gas supply unit 20 can supply multiple gases such as a processing gas, a plasma generating gas, and a purge gas required for the plasma processing. An appropriate processing gas is selected depending on the plasma processing to be performed. For example, the processing gas can include a gas used in forming a film and providing a raw material of the film to the wafer W. The gas supply unit 20 has multiple gas supply sources and gas supply pipes (both not shown), and the gas supply pipes are provided with valves and flow rate controllers such as mass flow controllers (both not shown).

[0027] An exhaust port 41 is provided on the bottom wall of the processing vessel 1, and an exhaust device 43 is connected to the exhaust port 41 via an exhaust pipe 42. The exhaust device 43 has an automatic pressure control valve and a vacuum pump (both not shown). The exhaust device 43 evacuates the processing vessel 1 and can maintain the inside of the processing vessel 1 at a preset vacuum level.

[0028] A loading / unloading port (not shown) is provided on a sidewall of the processing vessel 1 for loading / unloading the wafer W into / from the processing vessel 1. The loading / unloading port is configured to be opened and closed by a gate valve (not shown).

[0029] The valves and flow rate controllers of the gas supply unit 20, as well as the high-frequency power supply, are controlled by a control unit 50. The control unit 50 controls various processes performed by the plasma processing apparatus 100.

[0030] The configuration of the potential setting circuit 61 and the configuration of the potential setting circuit 63 will be specifically described with reference to Fig. 2 to Fig. 7. Fig. 2 to Fig. 4 are diagrams showing the configuration of the potential setting circuit 61 that sets the potential of the mounting table 2, and Fig. 5 to Fig. 7 are diagrams showing the configuration of the potential setting circuit 63 that sets the potential of the planar electrode ME.

[0031] Example 1 The plasma processing apparatus 100 according to the first embodiment includes a potential setting circuit 61 having a configuration shown in FIG. 2 and a potential setting circuit 63 having a configuration shown in FIG. 5. The potential setting circuit 61 shown in FIG. 2 is configured to ground the mounting table 2. The potential setting circuit 63 shown in FIG. 5 is configured to ground the planar electrode ME. The planar electrode ME is a mesh-like conductor provided in the processing space 15 and extends along the surface 2a of the mounting table 2. The potential setting circuit 63 is configured to set the potential of the planar electrode ME to a ground potential. For this reason, in the processing space 15, a current path is not formed along the radial direction of the wafer W, but is formed along the direction PS from the planar electrode ME at the ground potential toward the shower head 10. Therefore, a radial potential difference is not formed on the surface 2a of the wafer W, and thus damage to the wafer W that may be caused by this potential difference can be reduced.

[0032] Example 2 The plasma processing apparatus 100 according to the second embodiment includes a potential setting circuit 61 having a configuration shown in FIG. 3 and a potential setting circuit 63 having a configuration shown in FIG. 5. The potential setting circuit 61 shown in FIG. 3 includes a capacitor 61c, a DC power supply 61e, and a pulse generator 61f. One end of the pulse generator 61f is electrically connected to the mounting table 2 via the capacitor 61c. The other end of the pulse generator 61f is electrically connected to the negative electrode of a variable DC power supply 61e capable of adjusting a DC voltage output. The positive electrode of the DC power supply 61e is grounded. The planar electrode ME is a mesh-like conductor provided in the processing space 15 and extends along the surface 2a of the mounting table 2. The potential setting circuit 63 is configured to set the potential of the planar electrode ME to a ground potential. Therefore, in the processing space 15, a current path is formed along a direction PS from the planar electrode ME at the ground potential toward the shower head 10, without being formed along a radial direction of the wafer W. Therefore, no radial potential difference is formed on the surface 2a of the wafer W, and damage to the wafer W that may be caused by this potential difference can be reduced. Furthermore, the potential setting circuit 61 that sets the potential of the mounting table 2 is configured to apply a DC voltage supplied from a DC power supply 61e to the mounting table 2 after shaping the DC voltage into a pulse wave by a pulse generator 61f. This makes it possible for the potential setting circuit 61 to adjust the energy of ions moving toward the mounting table 2 in the plasma excited by the high frequency power supply 30. Thus, in the second embodiment, the potential setting circuit 61 can be regarded as a bias voltage application circuit.

[0033] Example 3 The plasma processing apparatus 100 according to the third embodiment includes a potential setting circuit 61 having a configuration shown in FIG. 4 and a potential setting circuit 63 having a configuration shown in FIG. 6. The potential setting circuit 61 shown in FIG. 4 includes a high-frequency power supply 61a and a matching unit 61b. The high-frequency power supply 61a is electrically connected to the mounting table 2 via the matching unit 61b. The potential setting circuit 63 having a configuration shown in FIG. 6 includes a filter circuit 63a. The filter circuit 63a has one end electrically connected to the planar electrode ME and is configured not to conduct a voltage of the frequency of the high-frequency voltage supplied from the high-frequency power supply 61a to the ground. The other end of the filter circuit 63a is grounded. The filter circuit 63a may be, for example, an LC circuit. The planar electrode ME is a mesh-like conductor, is provided in the processing space 15, and extends along the surface 2a of the mounting table 2. As a result, a current path due to the high-frequency power applied from the high-frequency power supply 30 to the shower head 10 is formed along a direction PS from the planar electrode ME toward the shower head 10. Therefore, no radial potential difference is formed on the surface 2a of the wafer W, and damage to the wafer W that may be caused by this potential difference can be reduced. The potential of the planar electrode ME follows the voltage change of the high frequency voltage supplied from the high frequency power supply 61a due to the action of the filter circuit 63a. Therefore, the high frequency power supply 61a forms a current path between the shower head 10 and the planar electrode ME without passing through the planar electrode ME. This makes it possible to adjust the energy of ions moving toward the mounting table 2 in the plasma excited by the high frequency power supply 30 by the high frequency power supply 61a. Thus, in the third embodiment, the potential setting circuit can be regarded as a bias voltage application circuit.

[0034] Example 4 The plasma processing apparatus 100 according to the fourth embodiment includes a potential setting circuit 61 having a configuration shown in FIG. 4 and a potential setting circuit 63 having a configuration shown in FIG. 7. The potential setting circuit 63 shown in FIG. 7 includes a diode 63b. The cathode of the diode 63b is electrically connected to the planar electrode ME. The anode of the diode 63b is grounded. The planar electrode ME is a mesh-like conductor provided in the processing space 15 and extends along the surface 2a of the mounting table 2. The potential of the planar electrode ME follows the voltage change of the high-frequency voltage supplied from the high-frequency power supply 61a. Therefore, in the processing space 15, a current path is not formed along the radial direction of the wafer W, but is formed along the direction PS from the planar electrode ME, whose potential follows the voltage change of the high-frequency voltage supplied from the high-frequency power supply 61a, toward the shower head 10. Therefore, a radial potential difference is not formed on the surface 2a of the wafer W, and therefore damage to the wafer W that may be caused by this potential difference can be reduced.

[0035] An example of the configuration of the planar electrode ME used in the above-mentioned Examples 1 to 4 is shown in Fig. 8. Fig. 8 is an enlarged view illustrating a part of the configuration of the planar electrode ME in which a plurality of conductors are arranged in a mesh shape.

[0036] The wire diameter LW of the conductor ME1 of the planar electrode ME may need to be thick enough to pass a current. Furthermore, it is preferable that the wire diameter LW is sufficiently smaller than the distance between the planar electrode ME and the wafer W placed on the mounting table 2. In such a case, the wire diameter LW of the conductor ME1 of the planar electrode ME may be, for example, in the range of 0.3 mm to 10 mm.

[0037] The distance between the planar electrode ME and the wafer W placed on the mounting table 2 is preferably sufficiently larger than the wire diameter LW. In this case, the planar electrode ME may be disposed, for example, within a range of 1 mm to 200 mm from the wafer W placed on the mounting table 2.

[0038] The aperture D of the opening ME2 of the planar electrode ME is preferably sufficiently wider than the thickness of the sheath region formed between the wafer W and the plasma bulk to allow positive ions to pass. Furthermore, the aperture D of the opening ME2 is preferably sufficiently narrower than the diameter of the wafer W so as not to form a potential distribution on the wafer W. In such a case, the aperture D of the opening ME2 may be, for example, in the range of 1 mm to 60 mm.

[0039] In the case of a planar electrode ME in which a plurality of conductors are arranged along a common surface without crossing each other (approximately parallel), the diameter of the conductors may be, for example, in the range of 0.1 mm to 10 mm, and the distance between adjacent conductors may be, for example, in the range of 1 mm to 60 mm. In this case, the wafer W may be arranged within a range of, for example, 1 mm to 200 mm from the wafer W placed on the placement table 2.

[0040] Although various exemplary embodiments have been described above, the present invention is not limited to the above-described exemplary embodiments, and various additions, omissions, substitutions, and modifications may be made. In addition, elements in different embodiments can be combined to form other embodiments.

[0041] Various exemplary embodiments included in the present disclosure are now described in [E1] to [E13] below.

[0042] [E1] A processing vessel; A first high frequency power source; a shower head that is electrically connected to the first high frequency power supply and configured to receive a voltage from the first high frequency power supply and has a function as an upper electrode; a shaping circuit configured to shape the high frequency voltage supplied from the first high frequency power supply to cut a positive voltage component of the high frequency voltage and then supply the high frequency voltage to the shower head; a mounting table provided below the shower head, configured to mount a wafer thereon, and having a function of a lower electrode; a planar electrode provided in a space between the shower head and the stage, extending along a surface of the stage and configured by combining a plurality of conductors in a planar shape; a first potential setting circuit configured to set a potential of the planar electrode; a second potential setting circuit configured to set a potential of the mounting table; Equipped with Plasma processing equipment.

[0043] [E2] the shaping circuit includes a first capacitor and a first diode; one end of the first capacitor is electrically connected to the high frequency power supply; the other end of the first capacitor is electrically connected to the showerhead; an anode of the first diode electrically connected to the first capacitor and the showerhead; The cathode of the first diode is grounded. The plasma processing apparatus according to the above [E1].

[0044] [E3] The first potential setting circuit is configured to ground the planar electrode. The plasma processing apparatus according to the above [E1] or [E2].

[0045] [E4] the second potential setting circuit is configured to ground the mounting table; The plasma processing apparatus according to the above [E3].

[0046] [E5] the second potential setting circuit includes a DC power supply, a pulse generator, and a capacitor, and applies a DC voltage supplied from the DC power supply to the mounting table after shaping the DC voltage into a pulse wave by the pulse generator; one end of the pulse generator is electrically connected to the mounting table via the capacitor; The other end of the pulse generator is electrically connected to the negative electrode of the DC power supply, The positive electrode of the DC power supply is grounded. The plasma processing apparatus according to the above [E3].

[0047] [E6] the second potential setting circuit includes a third high frequency power source; the third high frequency power source is electrically connected to the mounting table; the first potential setting circuit includes a filter circuit having one end electrically connected to the planar electrode and configured to not conduct a voltage having a frequency of the high frequency voltage supplied from the third high frequency power source, The other end of the filter circuit is grounded. The plasma processing apparatus according to the above [E1] or [E2].

[0048] [E7] the second potential setting circuit includes a third high frequency power source; the third high frequency power source is electrically connected to the mounting table; the first potential setting circuit includes a second diode; the cathode of the second diode is electrically connected to the planar electrode; The anode of the second diode is grounded. The plasma processing apparatus according to the above [E1] or [E2].

[0049] [E8] the planar electrode is disposed within a range of 1 mm to 200 mm from the wafer placed on the stage; The plasma processing apparatus according to any one of the above items [E1] to [E7].

[0050] [E9] The planar electrode is configured such that a plurality of conductive wires are arranged in a mesh shape, or a plurality of conductive wires are arranged along a common plane without intersecting each other. The plasma processing apparatus according to any one of the above items [E1] to [E8].

[0051] [E10] The wire diameter of the conductor of the planar electrode in which a plurality of conductors are arranged in a mesh shape is within a range of 0.3 mm to 10 mm. The plasma processing apparatus according to [E9] or [E10] above.

[0052] [E11] The mesh size of the planar electrode, in which a plurality of conductive wires are arranged in a mesh pattern, is within a range of 1 mm to 60 mm. The plasma processing apparatus according to the above [E9]. [E12] The diameter of the conductor wires of the planar electrode, in which a plurality of conductor wires are arranged along a common surface without crossing each other, is within the range of 0.1 mm to 10 mm. The plasma processing apparatus according to the above [E9].

[0053] [E13] The spacing between adjacent conductors of the planar electrode, in which a plurality of conductors are arranged along a common surface without crossing each other, is within the range of 1 mm to 60 mm. The plasma processing apparatus according to [E9] or [E12] above.

[0054] From the foregoing, it will be understood that various embodiments of the present disclosure have been described herein for purposes of illustration, and that various modifications may be made without departing from the scope and spirit of the present disclosure. Accordingly, the various embodiments disclosed herein are not intended to be limiting, with the true scope and spirit being indicated by the appended claims. [Explanation of symbols]

[0055] 1...processing vessel, 10...shower head, 100...plasma processing apparatus, 11...main body, 12...shower plate, 13...gas outlet, 14...gas inlet, 15...processing space, 2...mounting table, 20...gas supply section, 2a...surface, 30...high frequency power supply, 32...matching box, 33...power supply line, 34...shaping circuit, 34a...capacitor, 34b...diode, 41...exhaust port, 42...exhaust pipe, 43...exhaust device, 50...control section, 61...potential setting circuit, 61a...high frequency power supply, 61b...matching box, 61c...capacitor, 61e...DC power supply, 61f...pulse generator, 63...potential setting circuit, 63a...filter circuit, 63b...diode, 9...insulating member, ME...flat electrode, ME1...conductor, ME2...opening, PS...direction, W...wafer.

Claims

1. A processing vessel; A first high frequency power source; a shower head that is electrically connected to the first high frequency power supply and configured to receive a voltage from the first high frequency power supply and has a function of an upper electrode; a shaping circuit configured to shape the high frequency voltage supplied from the first high frequency power supply to cut a positive voltage component of the high frequency voltage and then supply the high frequency voltage to the shower head; a mounting table provided below the shower head, configured to mount a wafer thereon, and having a function of a lower electrode; a planar electrode provided in a space between the shower head and the stage, extending along a surface of the stage and configured by combining a plurality of conductors in a planar shape; a first potential setting circuit configured to set a potential of the planar electrode; a second potential setting circuit configured to set a potential of the mounting table; Equipped with Plasma processing equipment.

2. the shaping circuit includes a first capacitor and a first diode; one end of the first capacitor is electrically connected to the high frequency power supply; the other end of the first capacitor is electrically connected to the showerhead; an anode of the first diode electrically connected to the first capacitor and the showerhead; The cathode of the first diode is grounded. The plasma processing apparatus according to claim 1 .

3. The first potential setting circuit is configured to ground the planar electrode. The plasma processing apparatus according to claim 1 .

4. the second potential setting circuit is configured to ground the mounting table; The plasma processing apparatus according to claim 3 .

5. the second potential setting circuit includes a DC power supply, a pulse generator, and a capacitor, and applies a DC voltage supplied from the DC power supply to the mounting table after shaping the DC voltage into a pulse wave by the pulse generator; one end of the pulse generator is electrically connected to the mounting table via the capacitor; The other end of the pulse generator is electrically connected to the negative electrode of the DC power supply, The positive electrode of the DC power supply is grounded. The plasma processing apparatus according to claim 3 .

6. the second potential setting circuit includes a third high frequency power source, the third high frequency power source is electrically connected to the mounting table, the first potential setting circuit includes a filter circuit having one end electrically connected to the planar electrode and configured to not conduct a voltage having a frequency of the high frequency voltage supplied from the third high frequency power source, The other end of the filter circuit is grounded. The plasma processing apparatus according to claim 1 .

7. the second potential setting circuit includes a third high frequency power source, the third high frequency power source is electrically connected to the mounting table, the first potential setting circuit includes a second diode; the cathode of the second diode is electrically connected to the planar electrode; The anode of the second diode is grounded. The plasma processing apparatus according to claim 1 .

8. the planar electrode is disposed within a range of 1 mm to 200 mm from the wafer placed on the stage; The plasma processing apparatus according to claim 1 .

9. The planar electrode is configured such that a plurality of conductive wires are arranged in a mesh shape, or a plurality of conductive wires are arranged along a common plane without intersecting with each other. The plasma processing apparatus according to any one of claims 1 to 7.

10. The wire diameter of the conductor of the planar electrode in which a plurality of conductors are formed in a mesh shape is within a range of 0.3 mm to 10 mm. The plasma processing apparatus according to claim 9 .

11. The mesh size of the planar electrode having a plurality of conductive wires arranged in a mesh pattern is within a range of 1 mm to 60 mm. The plasma processing apparatus according to claim 9 .

12. The diameter of the conductor wires of the planar electrode, in which a plurality of conductor wires are arranged along a common surface without crossing each other, is within a range of 0.1 mm to 10 mm. The plasma processing apparatus according to claim 9 .

13. The spacing between adjacent conductors of the planar electrode, in which a plurality of conductors are arranged along a common surface without crossing each other, is within a range of 1 mm to 60 mm. The plasma processing apparatus according to claim 9 .

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