Communication device, communication system, and communication method

Abstract

To provide a communication device, a communication system, and a communication method that can accommodate baud rate fluctuations with a relatively simple configuration.SOLUTION: A communication device includes a measurement unit that measures the duration of a known signal level using communication data transmitted from an opposing device, in which one or more predetermined bits are set to a known signal level, and an adjustment unit that adjusts the time per bit in asynchronous serial communication with the opposing device on the basis of the duration and the number of the one or more bits.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The disclosed technology relates to a communication device, a communication system, and a communication method. [Background technology]

[0002] Patent Document 1 describes "a data receiving circuit of an asynchronous serial data transfer device that receives a series of serial data consisting of a plurality of characters each consisting of at least a start bit, data bits, and a stop bit, comprising: transfer rate recognition means for automatically recognizing the data transfer rate of the series of serial data by measuring only the bit width of the start bit of a specific character located at the beginning of the series of serial data using a receive clock; frequency division means for dividing the receive clock by a frequency division value corresponding to the data transfer rate recognized by the transfer rate recognition means and outputting a divided pulse of the receive clock as a baud rate clock; and sample clock generation means for generating a sample clock for every p baud rate clocks (p is a positive integer), wherein the data receiving circuit of the asynchronous serial data transfer device is configured to sample the series of serial data using the sample clock."

[0003] Patent Document 2 describes an image forming apparatus having "a first control means and a second control means which communicates with the first control means, the first control means comprising a communication speed variation means which varies a transmission baud rate at the time of transmitting data transmitted from the first control means to the second control means, and a transmission means which transmits data to the second control means based on the transmission baud rate varied by the communication speed variation means, the second control means comprising a receiving means which receives the data transmitted from the first control means, a pulse width measuring means which measures a pulse width of a pulse included in the data received by the receiving means, and an adjustment means which adjusts the receiving baud rate of the receiving means based on the measured value of the pulse width."

[0004] Patent Document 3 states that "In a start-stop synchronous data transmission method, the master station is provided with a high-precision oscillator circuit that corresponds to a baud rate that matches the transmission line characteristics, and one or more slave stations are provided with a low-precision oscillator circuit that corresponds to a baud rate that matches the transmission line characteristics. The document describes an asynchronous data transmission method comprising: an oscillator circuit; a master station transmits a predetermined dummy message at a fixed cycle; each slave counts the time interval of a specific edge of the first bit frame of this dummy message using the output clock from the low-precision oscillator circuit; and generates a baud rate clock calculated from this count using a specific algorithm to perform asynchronous communication.

[0005] Patent Document 4 describes a serial communications system comprising: a transmitting node, at least one receiving node, and a transmission path connecting the transmitting node and the at least one receiving node, wherein one frame has a start field, a synchronization field, and multiple data fields, the start field and the synchronization field are transmitted from the transmitting node, and the multiple data fields and the end field are transmitted from the transmitting node or the at least one receiving node, and the at least one receiving node sets a baud rate in response to a signal of the synchronization field, transmits or receives the multiple data fields at the set baud rate, detects the time length of the data fields, and updates the baud rate. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2001-168853 A [Patent Document 2] JP 2017-11455 A [Patent Document 3] JP 2000-196700 A [Patent Document 4] JP 2014-187633 A Summary of the Invention [Problem to be solved by the invention]

[0007] Asynchronous serial communication (also called start-stop synchronous) is known, which communicates with a counterpart device without using a clock signal. In such asynchronous serial communication, if the baud rate fluctuates, an abnormality may occur in communication with the counterpart device. Here, Patent Documents 1 to 4 describe a technique for adjusting the frequency of an internal clock by changing a frequency division ratio in order to deal with fluctuations in the baud rate. However, the techniques described in Patent Documents 1 to 4 have a problem in that the device configuration becomes complicated, for example, by using a programmable frequency divider to change the frequency division ratio.

[0008] Therefore, an object of the present disclosure is to provide a communication device, a communication system, and a communication method that can accommodate baud rate fluctuations with a relatively simple configuration. [Means for solving the problem]

[0009] The communication device of the present disclosure includes a measurement unit that measures the duration of a known signal level using communication data transmitted from an opposing device and in which one or more predetermined bits are set to a known signal level, and an adjustment unit that adjusts the time per bit in asynchronous serial communication with the opposing device based on the duration and the number of the one or more bits.

[0010] The communication system of the present disclosure includes a communication device and an opposing device, the communication device including: a measurement unit that measures the duration of a known signal level using communication data transmitted from an opposing device and in which one or more predetermined bits are set to a known signal level; and an adjustment unit that adjusts the time per bit in asynchronous serial communication with the opposing device based on the duration and the number of the one or more bits.

[0011] The communication method disclosed herein comprises a computer measuring the duration of a known signal level using communication data received from an opposing device in which one or more predetermined bits are set to a known signal level, and adjusting a time per bit in asynchronous serial communication with the opposing device based on the duration and the number of the one or more bits. Effect of the Invention

[0012] The present disclosure has an advantage in that it is possible to provide a communication device, a communication system, and a communication method that can accommodate baud rate fluctuations with a relatively simple configuration. [Brief description of the drawings]

[0013] [Figure 1] 1 is a diagram illustrating an example of a schematic configuration of a communication system 10 according to an embodiment of the present invention. [Diagram 2] 1 is a diagram showing an example of a hardware configuration of a communications device 100 according to a comparative example, together with a counterpart device 200. FIG. [Diagram 3] 1 is a diagram showing a schematic diagram of a baud rate fluctuation accompanying a fluctuation of a clock CLK. FIG. [Figure 4] 2 is a diagram illustrating an example of a functional configuration of a communication device 100 according to the present embodiment. [Diagram 5] 1 is a diagram showing an example of a hardware configuration of a communications device 100 according to the present embodiment, together with a counterpart device 200. FIG. [Figure 6] FIG. 10 is a diagram illustrating an example of a relationship between communication data and a counter. [Figure 7] FIG. 10 is a diagram illustrating another example of the relationship between communication data and a counter. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] Hereinafter, an example of an embodiment of the technology of the present disclosure will be described with reference to the drawings. In each drawing, the same or equivalent components and parts are given the same reference numerals. In addition, the dimensional ratios of the drawings may be exaggerated for the convenience of explanation and may differ from the actual ratios.

[0015] 1 is a diagram showing an example of a schematic configuration of a communication system 10 according to the present embodiment. The communication system 10 includes a communication device 100 and a counterpart device 200.

[0016] The communication device 100 is a device that communicates with the other device 200. The communication device 100 may be, for example, a microcomputer. However, the communication device 100 is not limited to this. The communication device 100 may be any computer that can communicate with the other device 200.

[0017] The counterpart device 200 is a device that communicates with the communication device 100. The counterpart device 200 may be, for example, a microcomputer different from the communication device 100. However, the counterpart device 200 is not limited to this. The counterpart device 200 may be any peripheral device that may exist outside the communication device 100, such as an external sensor or an external memory.

[0018] In the communication system 10, the communication device 100 and the counterpart device 200 communicate with each other by asynchronous serial communication. In the following, a case where the asynchronous serial communication is UART (Universal Asynchronous Receiver Transmitter) will be described as an example. UART is preferable because it is one of the most convenient and easy-to-use communication methods. However, the present invention is not limited to this. The communication device 100 and the counterpart device 200 may communicate with each other by any asynchronous serial communication method, such as RS-232C.

[0019] In asynchronous serial communication, a port that transmits data is called Tx, and a port that receives data is called Rx. Data is transmitted and received from the Tx of the transmitter to the Rx of the receiver. In this diagram, the UART on the communication device 100 side is UART_A, and the UART on the opposite device 200 side is UART_B, and communication data A is transmitted from the Tx of UART_A to the Rx of UART_B, and communication data B is transmitted from the Tx of UART_B to the Rx of UART_A.

[0020] In order for a transmitter and a receiver to communicate, the timing of data transmission and reception must be synchronized. In a synchronous system, data is transmitted and received in synchronization with a clock signal, but in an asynchronous system, a clock signal is not used, and the transmitter and receiver each generate a clock internally, and data is transmitted and received in synchronization with the internal clocks generated by each.

[0021] Therefore, it is necessary to match the baud rate between the transmitter and the receiver. However, the internal clock used to set the baud rate is asynchronous between the transmitter and the receiver. Therefore, if the frequency of the internal clock fluctuates, the baud rate will fluctuate, and as a result, the baud rates of the transmitter and the receiver will not match, which may cause an abnormality in communication. The technology disclosed herein is capable of dealing with such baud rate fluctuations with a relatively simple configuration.

[0022] 2 is a diagram showing an example of a hardware configuration of the communications device 100 according to the comparative example, together with the counterpart device 200. The communications device 100 according to the comparative example includes a clock generator 110, a register 120, and a first counter .

[0023] The clock generator 110 is a circuit that generates a clock CLK. The register 120 is a baud rate setting value register that registers a value for setting a baud rate. The first counter 130 is a baud rate generation counter that counts a value for generating a baud rate.

[0024] Here, the register 120 may register the number of cycles of the clock CLK per bit. More specifically, the register 120 may register a value indicating how many cycles of the clock CLK generated by the clock generator 110 are set to one bit. The first counter 130 may read the value of the register 120 and count the number of cycles of the clock CLK generated by the clock generator 110. Then, when the count value of the first counter 130 matches the register value of the register 120, the first counter 130 may overflow. In this way, the time from when the first counter 130 starts counting operation to when it overflows is the time per bit (also called "one bit time"). The baud rate can be expressed, for example, as the reciprocal of one bit time.

[0025] 3 is a diagram showing a schematic diagram of how the baud rate varies with fluctuations in the clock CLK. From the top, the diagram shows (X) a case where the frequency of the clock CLK is normal, (Y) a case where the frequency of the clock CLK is high, and (Z) a case where the frequency of the clock CLK is low. Note that in all of the cases (X), (Y), and (Z), the register value of the register 120 is constant (here, "3").

[0026] In this diagram, comparing (X) and (Y), it can be seen that in the case of (Y), where the frequency of the clock CLK is high, the 1 bit time is shorter than in the case of (X). Therefore, it can be said that the baud rate is higher in the case of (Y) than in the case of (X). Also, comparing (X) and (Z), it can be seen that in the case of (Z), where the frequency of the clock CLK is low, the 1 bit time is longer than in the case of (X). Therefore, it can be said that the baud rate is lower in the case of (Z) than in the case of (X).

[0027] If the baud rate is set to synchronize with the case (X) where the frequency of the clock CLK in the opposite device 200 is normal, then when the frequency of the clock CLK in the communication device 100 fluctuates as in the cases (Y) and (Z), a mismatch in the baud rate occurs between the communication device 100 and the opposite device 200. As a result, an abnormality may occur in communication between the communication device 100 and the opposite device 200.

[0028] In the above description, it has been explained that a baud rate mismatch occurs when the frequency of the clock CLK is normal in the opposed device 200 and the frequency of the clock CLK fluctuates in the communication device 100. However, a baud rate mismatch also occurs when the frequency of the clock CLK is normal in the communication device 100 and the frequency of the clock CLK fluctuates in the opposed device 200, or when the frequency of the clock CLK fluctuates in both the communication device 100 and the opposed device 200. The communication device 100 according to this embodiment is capable of dealing with such baud rate fluctuations with a relatively simple configuration.

[0029] FIG. 4 is a diagram showing an example of a functional configuration of a communication device 100 according to the present embodiment. In this diagram, only the configuration necessary for the description is focused on. Therefore, the communication device 100 may further include other configurations not shown in this diagram. Also, the blocks in this diagram are functionally separated functional blocks and may differ from the actual apparatus configuration or device configuration. That is, even if one block is shown in this diagram, the block does not necessarily have to be composed of a single apparatus or device. Similarly, even if multiple blocks are shown in this diagram, the multiple blocks do not necessarily have to be composed of separate apparatuses or devices.

[0030] The communication device 100 according to this embodiment includes a measurement unit 101, a calculation unit 102, and an adjustment unit 103. These functional configurations may be realized by dedicated hardware. Alternatively, these functional configurations may be realized by a processor in a computer reading out a communication program from a ROM or storage and executing the program using a RAM as a working area.

[0031] The measurement unit 101 measures the duration of a known signal level by using communication data B that is transmitted from the opposite device 200 and in which one or more predetermined bits are set to a known signal level.

[0032] The calculation section 102 calculates a value for setting the time per bit based on the duration measured by the measurement section 101 and the number of one or more bits.

[0033] The adjustment unit 103 adjusts the time per bit based on the result calculated by the calculation unit 102. In this way, for example, the adjustment unit 103 adjusts the time per bit in the asynchronous serial communication with the opposite device 200 based on the duration and the number of one or more bits.

[0034] 5 is a diagram showing an example of a hardware configuration of the communication device 100 according to this embodiment, together with the counterpart device 200. The same components as those in FIG. 2 are denoted by the same reference numerals, and description thereof will be omitted. The communication device 100 according to this embodiment further includes a second counter 140 and a division circuit 150.

[0035] The second counter 140 is a counter having an enable terminal. Communication data B transmitted from Tx of the opposite device 200 to Rx of the communication device 100 is branched and input to the enable terminal. The second counter 140 executes counting at a first signal level and stops counting at a second signal level. When realized by dedicated hardware, the measurement unit 101 may be, for example, such a second counter 140 that executes counting at a first signal level and stops counting at a second signal level.

[0036] The division circuit 150 reads the count value of the second counter 140 and divides it by a predetermined number of one or more bits. Such a number of one or more bits may be a number previously determined between the communication device 100 and the opposite device 200. When realized by dedicated hardware, the calculation unit 102 may be, for example, such a division circuit 150 that divides the duration by the number of one or more bits.

[0037] Then, the register 120 changes the value to be registered based on the quotient obtained by the division circuit 150. This changes the number of clock cycles per bit, and the baud rate is adjusted. When realized by dedicated hardware, the adjustment unit 103 may be, for example, the register 120 that registers the number of clock cycles per bit. Such baud rate adjustment will be described in detail using waveforms.

[0038] FIG. 6 is a diagram showing an example of the relationship between communication data and a counter. When adjusting the baud rate, the opposite device 200 may transmit communication data B as shown in this figure to the communication device 100. At this time, the opposite device 200 may transmit such communication data B to the communication device 100 when a predetermined condition is satisfied. As an example, the opposite device 200 may transmit such communication data B in response to various conditions, such as when a predetermined time has elapsed, when a predetermined event has occurred, or when a user input has been received. In particular, the opposite device 200 may transmit such communication data B in response to an abnormality occurring in the asynchronous serial communication with the communication device 100.

[0039] The data format of UART includes a start bit, a data bit, a parity bit, and a stop bit. The start bit is a bit that signals the start of data, and the number of bits is 1. The data bit is a bit that indicates data, and the number of bits can be set to any of 5 to 8. In this figure, the number of data bits is 8 bits, that is, the data bits include data bit 1 to data bit 8, as an example. The parity bit is a bit for detecting errors in the data, and the number of bits is 1 bit. By adding the parity bit, if any bit in the data changes during transfer, a discrepancy occurs between the number of "1" bits in the data and the value of the parity bit, so the receiving side can notice the data error. The stop bit is a bit that signals the end of data, and the number of bits is 1 bit or 2 bits. In this figure, the number of stop bits is 1 bit as an example.

[0040] When adjusting the baud rate between the communication device 100 and the opposite device 200, it may be prearranged that data in which the start bit, data bit, and parity bit are set to a first signal level and the stop bit is set to a second signal level is transmitted and received. In this figure, a case in which the first signal level is a low level and the second signal level is a high level is shown as an example.

[0041] For example, when a parity check of communication data A received from the communication device 100 results in a predetermined number of consecutive errors, the opposite device 200 may determine that an abnormality has occurred in the asynchronous serial communication with the communication device 100. In response to this, the opposite device 200 may transmit to the communication device 100 communication data B in which 10 bits, namely a start bit, data bits, and parity bit, are set to low level and one stop bit is set to high level, as shown in the figure.

[0042] When the communication device 100 receives such communication data B, the communication data B is branched and input to the second counter 140. Here, the second counter 140 executes counting at a low level, which is a first signal level, and stops counting at a high level, which is a second signal level. This allows the second counter 140 to measure the duration from the beginning of the start bit to the end of the parity bit as the duration of the low level. That is, the communication device 100 can measure the time per 10 bits on the opposite device 200 side.

[0043] Then, the division circuit 150 reads the count value of the second counter 140 and divides it by a predetermined number of bits, in this case, 10 bits including the start bit, data bits, and parity bit, because they are set to the low level. Here, the quotient obtained by dividing the value counted by the second counter 140 by the number of bits corresponds to one bit time on the opposed device 200 side. Therefore, the communication device 100 can recognize the baud rate on the opposed device 200 side.

[0044] Then, the register 120 changes the value to be registered based on the quotient obtained by the division by the division circuit 150. At this time, the register 120 may change the value to be registered based on the period of the clock CLK and the quotient. For example, the register 120 may register the value of n, where n is an integer, which is the period of the clock CLK multiplied by n and is closest to the quotient, preferably when the value matches. This allows the number of clock cycles per bit to be changed on the communication device 100 side in accordance with the baud rate on the opposite device 200 side. Therefore, the baud rate on the communication device 100 side can be made to correspond to, preferably match, the baud rate on the opposite device 200 side. This allows the communication device 100 to eliminate communication abnormalities caused by a mismatch in baud rate between the communication device 100 and the opposite device 200.

[0045] In the above explanation, an example is given in which the first signal level is a low level and the second signal level is a high level, but the device can operate in a similar device configuration even if the first signal level is a high level and the second signal level is a low level.

[0046] 7 is a diagram showing another example of the relationship between communication data and a counter. When adjusting the baud rate, the other device 200 may transmit, to the communication device 100, communication data B in which the start bit, data bit, and parity bit (10 bits) are set to a high level and the stop bit is set to a low level, as shown in this diagram.

[0047] When the communication device 100 receives such communication data B, the communication data B is branched and input to the second counter 140. Here, the second counter 140 may execute counting at a high level, which is a first signal level, and stop counting at a low level, which is a second signal level. This allows the second counter 140 to measure the duration from the beginning of the start bit to the end of the parity bit as the duration of the high level. That is, the communication device 100 can measure the time per 10 bits on the opposite device 200 side.

[0048] Then, the division circuit 150 reads the count value of the second counter 140 and divides it by a predetermined number of bits, in this case, 10 bits including the start bit, data bits, and parity bit, which are set to high. This allows the communications device 100 to recognize the baud rate on the opposite device 200 side.

[0049] Then, the register 120 changes the register value based on the quotient obtained by the division by the division circuit 150. For example, in this manner, the baud rate on the communication device 100 side can be changed to correspond to the baud rate on the opposite device 200 side. In this manner, the first signal level may be a low level and the second signal level may be a high level, or the first signal level may be a high level and the second signal level may be a low level.

[0050] Although the representative embodiment that can be implemented has been shown as an example, the above embodiment can be modified in various ways or applied to various uses. For example, in the above description, a case where 10 bits from the start bit to the parity bit are set to the first signal level in the communication data B for adjusting the baud rate is shown as an example, but the number of bits set to the first signal level may be less than this. For example, 9 bits from the start bit to data bit 8 may be set to the first signal level, or 8 bits from the start bit to data bit 7 may be set to the first signal level. Furthermore, only one bit of the start bit may be set to the first signal level.

[0051] Conventionally, to accommodate fluctuations in the baud rate, the frequency of the internal clock itself has been adjusted by changing the division ratio, but the conventional technology has a problem in that the device configuration becomes complicated, for example by using a programmable divider to change the division ratio.

[0052] In contrast, the communication device 100 according to the present embodiment measures the duration of the known signal level using communication data transmitted from the opposite device 200 and in which one or more predetermined bits are set to a known signal level, and adjusts the time per bit based on the duration and the number of one or more bits. As a result, the communication device 100 according to the present embodiment does not need to use a programmable frequency divider, and can handle fluctuations in the baud rate with a simpler configuration than when the frequency division ratio is changed to adjust the frequency of the clock CLK itself.

[0053] In this case, the communication device 100 according to the present embodiment may adjust the time per bit by the register 120 that registers the number of cycles of the clock CLK per bit. As a result, the communication device 100 according to the present embodiment can respond to fluctuations in the baud rate simply by changing the value registered in the register 120.

[0054] Furthermore, the communication device 100 according to the present embodiment may measure the duration of a known signal level by the second counter 140, which executes counting at a first signal level and stops counting at a second signal level. As a result, the communication device 100 according to the present embodiment can measure the duration of a known signal level simply by inputting the communication data B for baud rate adjustment to the enable terminal of the second counter 140.

[0055] In this case, when UART is used for asynchronous serial communication, the communication device 100 of this embodiment can pre-determine communication data B for baud rate adjustment between the communication device 100 and the opposing device 200 simply by defining the signal level of each bit in the existing data format of UART.

[0056] Furthermore, the communication device 100 according to the present embodiment may calculate one bit time on the side of the opposed device 200 by a division circuit 150 that divides the duration by one or more bits. As a result, the communication device 100 according to the present embodiment can recognize the baud rate on the side of the opposed device 200 by simply executing a simple division operation.

[0057] This disclosure also includes the following:

[0058] (Appendix 1) A measurement unit that measures a duration of a known signal level by using communication data in which one or more predetermined bits are set to a known signal level, the communication data being transmitted from an opposite device; an adjustment unit that adjusts a time per bit in asynchronous serial communication with the opposing device based on the duration and the number of the one or more bits; A communication device comprising: (Appendix 2) The adjustment unit is a register that registers the number of clock cycles per bit. 2. A communications device as defined in claim 1. (Appendix 3) The measurement unit is a counter that performs counting at a first signal level and stops counting at a second signal level. 3. A communication device according to claim 1 or 2. (Appendix 4) The asynchronous serial communication is UART, the communication data is data in which a start bit, a data bit, and a parity bit in the UART are set to the first signal level, and a stop bit is set to the second signal level; 4. A communications device as described in claim 3. (Appendix 5) the first signal level is a low level and the second signal level is a high level, or the first signal level is a high level and the second signal level is a low level; 5. A communications device as described in claim 4. (Appendix 6) a calculation unit that calculates a value for setting the time per bit based on the duration and the number of the one or more bits, The adjustment unit adjusts the time per bit based on the calculated result. 6. A communications device according to any one of claims 1 to 5. (Appendix 7) the calculation unit is a division circuit that divides the duration by the number of the one or more bits; 7. A communications device as described in claim 6. (Appendix 8) A communication device according to any one of claims 1 to 7; The opposing device; A communication system comprising: (Appendix 9) the opposing device transmits the communication data in response to an occurrence of an abnormality in the asynchronous serial communication. 9. The communication system of claim 8. (Appendix 10) The computer measuring a duration of the known signal level using communication data received from the opposite device in which one or more predetermined bits are set to a known signal level; adjusting a time per bit in asynchronous serial communication with the counterpart device based on the duration and the number of the one or more bits; A communication method comprising: [Explanation of symbols]

[0059] 10. Communication Systems 100 Communication Devices 101 Measurement section 102 Arithmetic section 103 Adjustment section 110 Clock Generator 120 Registers 130 First Counter 140 Second Counter 150 Division circuit 200 Opposite device

Claims

1. a measurement unit that measures a duration of a known signal level by using communication data in which one or more predetermined bits are set to a known signal level, the communication data being transmitted from an opposite device; an adjustment unit that adjusts a time per bit in asynchronous serial communication with the opposing device based on the duration and the number of the one or more bits; A communication device comprising:

2. the adjustment unit is a register that registers the number of clock cycles per bit. The communication device of claim 1 .

3. the measurement unit is a counter that performs counting at a first signal level and stops counting at a second signal level; The communication device of claim 1 .

4. The asynchronous serial communication is UART, the communication data is data in which a start bit, a data bit, and a parity bit in the UART are set to the first signal level, and a stop bit is set to the second signal level; The communication device of claim 3.

5. the first signal level is a low level and the second signal level is a high level, or the first signal level is a high level and the second signal level is a low level; 5. A communication device according to claim 4.

6. a calculation unit that calculates a value for setting the time per bit based on the duration and the number of the one or more bits, The adjustment unit adjusts the time per bit based on the calculated result. The communication device of claim 1 .

7. the calculation unit is a division circuit that divides the duration by the number of the one or more bits; 7. A communication device according to claim 6.

8. A communication device according to any one of claims 1 to 7; The opposing device; A communication system comprising:

9. the opposing device transmits the communication data in response to an occurrence of an abnormality in the asynchronous serial communication.

9. The communication system according to claim 8.

10. The computer Measure a duration of the known signal level by using communication data received from the opposite device in which one or more predetermined bits are set to a known signal level; adjusting a time per bit in asynchronous serial communication with the counterpart device based on the duration and the number of the one or more bits; A communication method comprising:

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