Multi-die module, power supply device and method for making semiconductor device

Abstract

To provide a multi-die module that is loaded with multiple regulators.SOLUTION: A multi-die module 11 includes: a first semiconductor die 13 that includes a first control circuit 21 configured to control at least a DC-DC converter and has an internal line 13c, an external electrode 13d, and an internal electrode 13b; a second semiconductor die 15 that includes a second control circuit 23 configured to control at least a linear regulator and has multiple internal electrodes 15b; and a package 17 that supports the first semiconductor die 13 and the second semiconductor die 15 such that the first semiconductor die 13 and the second semiconductor die 15 form the multi-die module. The internal electrode 13b of the first semiconductor die 13 is connected to the internal electrode 15b of the second semiconductor die 15, and the internal line 13c connects one of the internal electrodes of the first semiconductor die 13 to the external electrode 13d.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a multi-die module, a power supply device, and a method for fabricating a semiconductor device. [Background technology]

[0002] Patent Document 1 discloses that a DC-DC converter is operated as a switching regulator or a linear regulator. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2007-82273 A Summary of the Invention [Problem to be solved by the invention]

[0004] There is an MCU (Micro Controller Unit) that has multiple regulators mounted on one chip (die). One of the regulators includes a DC-DC converter circuit, and the other includes a linear regulator circuit. While an MCU equipped with multiple regulators can meet user requirements, mounting multiple regulator circuits increases the chip area and increases test costs. A large chip area is an obstacle to improving yields in the wafer process (front-end process). In addition, when inspecting multiple regulators mounted on a single die, if the die is found to be defective as a result of the inspection, it is an obstacle to reducing test costs.

[0005] The present invention aims to provide a multi-die module incorporating a plurality of regulators, and a power supply device including the multi-die module. [Means for solving the problem]

[0006] A multi-die module according to a first aspect of the present invention comprises a first semiconductor die including a first control circuit configured to control at least a DC-DC converter, the first semiconductor die having an internal line, an external electrode, and a plurality of internal electrodes; a second semiconductor die including a second control circuit configured to control at least a linear regulator, the second semiconductor die having a plurality of internal electrodes; and a package supporting the first semiconductor die and the second semiconductor die such that at least the first semiconductor die and the second semiconductor die constitute a multi-die module, the first control circuit having a reference input and one or more outputs, the second control circuit including a voltage comparison circuit having a feedback input, a reference input, and a comparison output, the internal electrodes of the first semiconductor die including a first internal electrode and the internal electrodes of the second semiconductor die including a first internal electrode, the feedback input of the voltage comparison circuit being connected to the first internal electrode of the second semiconductor die, the first internal electrode of the first semiconductor die being connected to the first internal electrode of the second semiconductor die, and the internal lines connecting the first internal electrode of the first semiconductor die to the external electrode.

[0007] A power supply device according to a second aspect of the present invention comprises the multi-die module described in the first aspect, an inductor having one end connected to the external electrode of the multi-die module, and a capacitor having one end connected to the external electrode of the multi-die module.

[0008] A power supply device according to a third aspect of the present invention comprises the multi-die module according to the first aspect, and a capacitor having one end connected to the external electrode of the multi-die module.

[0009] A power supply device according to a fourth aspect of the present invention comprises the multi-die module described in the first aspect, a first external transistor having a gate connected to the first control circuit, one of a source and a drain connected to the external electrode, and the other of a source and a drain connected to a first power line, and a capacitor having one end connected to the external electrode of the multi-die module. Effect of the Invention

[0010] According to the above aspect, it is possible to provide a multi-die module having a plurality of regulators mounted thereon, and a power supply device including this multi-die module. [Brief description of the drawings]

[0011] [Figure 1] FIG. 1 is a diagram illustrating a schematic diagram of a multi-die module according to an embodiment of the present invention. [Diagram 2] FIG. 2 is a diagram showing exemplary waveforms of a first driving signal and a second driving signal. [Diagram 3] FIG. 3 is a schematic diagram of a power supply device including an exemplary multi-die module according to an embodiment of the present invention. [Figure 4] FIG. 4 is a schematic diagram of a power supply device including an exemplary multi-die module according to an embodiment of the present invention. [Diagram 5] FIG. 5 is a schematic diagram of a power supply device including an exemplary multi-die module according to an embodiment of the present invention. [Figure 6] FIG. 6 is a schematic diagram of a power supply device including an exemplary multi-die module according to an embodiment of the present invention. [Figure 7] FIG. 7 is a schematic diagram of a power supply device including an exemplary multi-die module according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the following description, the same parts are designated by the same reference numerals and duplicated description will be omitted.

[0013] 1 is a schematic diagram of a multi-die module according to an embodiment of the present invention. The multi-die module 11 includes a first semiconductor die 13, a second semiconductor die 15, and a package 17.

[0014] The first semiconductor die 13 includes a first control circuit 21 configured to control at least a DC-DC converter, and has a number of internal electrodes 13b, internal lines 13c, and a number of external electrodes, such as external electrodes 13d, configured to allow electrical connection between the multi-die module 11 and an external circuit, and may include, for example, pad electrodes.

[0015] The second semiconductor die 15 includes a second control circuit 23 configured to control at least the linear regulator and has a plurality of internal electrodes 15b. The package 17 supports the first semiconductor die 13 and the second semiconductor die 15 such that the first semiconductor die 13 and the second semiconductor die 15 form a multi-die module 11.

[0016] The multi-die module 11 may include at least the following external electrodes as the multiple external electrodes, specifically, a first power electrode 12b and a second power electrode 12c. The first power electrode 12b and the second power electrode 12c are configured to supply power to the multi-die module 11. An external power source 20 may be connected to the first power electrode 12b and the second power electrode 12c. In the multi-die module 11, the multiple external electrodes may include a mode selection electrode 12d. The mode selection electrode 12d is configured to receive a selection signal that specifies whether the multi-die module 11 controls the DC-DC converter or the linear regulator, as will be shown in the following description. However, this selection signal may be provided from a certain circuit in the multi-die module 11. In the exemplary multi-die module 11, the above-mentioned external electrodes may be provided on either the first semiconductor die 13 or the second semiconductor die 15. The external electrodes may be provided on the first semiconductor die 13, not on the second semiconductor die 15. Alternatively, the external electrodes may be provided on the first semiconductor die 13 and the second semiconductor die 15 .

[0017] In the multi-die module 11, the internal electrode 13b of the first semiconductor die 13 can be connected to the internal electrode 15b of the second semiconductor die 15. The exemplary second semiconductor die 15 does not include an external electrode such as external electrode 13d. Having an external electrode on one of the first semiconductor die 13 and the second semiconductor die 15 allows for the fabrication of the interconnect between the first semiconductor die 13 and the second semiconductor die 15 to be separated from the fabrication of the interconnect between the first semiconductor die 13 and the package 17 during assembly. However, the second semiconductor die 15 may include an external electrode.

[0018] The first control circuit 21 has one or more outputs, specifically a first output 21b and a second output 21c, and a reference input 21h. At least a portion of the outputs of the first control circuit 21 can be connected to an external driving circuit and / or an external electrode built into the first semiconductor die 13.

[0019] The second control circuit 23 may have a reference input 23b, a feedback input 23c, and a comparison output 23d. The second control circuit 23 compares a reference voltage received at the reference input 23b with a feedback signal received at the feedback input 23c, and generates a difference signal therebetween at the comparison output 23d. The exemplary second control circuit 23 may include one or more voltage comparison circuits 25. The voltage comparison circuit 25 has a reference input 25b, a feedback input 25c, and a comparison output 25d, and may include, for example, a differential amplifier circuit.

[0020] The internal electrodes 13b of the first semiconductor die 13 include a first internal electrode 14b, and the internal electrodes 15b of the second semiconductor die 15 include a first internal electrode 16b. The first internal electrode 16b of the second semiconductor die 15 is connected to the first internal electrode 14b of the first semiconductor die 13 such that the first semiconductor die 13 and the second semiconductor die 15 constitute a multi-die module 11. In the exemplary first semiconductor die 13, the first internal electrode 14b is connected to an external electrode 13d via an internal line 13c.

[0021] The exemplary first semiconductor die 13 includes an external electrode 13d, and the exemplary second semiconductor die 15 does not include an external electrode. The circuitry within the second semiconductor die 15 is connected to the circuitry within the first semiconductor die 13 and / or any external electrodes, including the external electrode 13d, via the internal electrode 15b of the second semiconductor die 15 and the internal electrode 13b of the first semiconductor die 13.

[0022] The feedback input 25c of the voltage comparator circuit 25 can be connected to the first internal electrode 16b of the second semiconductor die 15. In the exemplary second control circuit 23, the voltage comparator circuit 25 can include a circuit (mainly an analog circuit) configured to operate as an error amplifier circuit of the regulator circuit. The voltage comparator circuit 25 can be connected to the external electrode 13d and can receive a feedback signal SFB for controlling the regulator circuit at the feedback input 25c via the external electrode 13d. Meanwhile, the exemplary first control circuit 21 can include, for example, a circuit (digital circuit) required for controlling the DC-DC converter circuit, and may also include a circuit (analog circuit) required for controlling the DC-DC converter circuit.

[0023] In the exemplary second control circuit 23, the voltage comparison circuit 25 may include, for example, a circuit (mainly an analog circuit) configured to operate as an error amplifier circuit for a linear regulator circuit and a DC-DC converter circuit. In the second control circuit 23, the operation of the linear regulator circuit and the DC-DC converter circuit is switched in response to a switching signal. The exemplary voltage comparison circuit 25 is connected to the external electrode 13d at the feedback input 25c, and may receive a feedback signal SFB for control of the linear regulator circuit or the DC-DC converter circuit at the feedback input 25c via the external electrode 13d. On the other hand, the exemplary first control circuit 21 may include, for example, a circuit (mainly a digital circuit) required for control of the DC-DC converter circuit.

[0024] In this manner, the multi-die module 11 includes multiple regulators or partial circuits of multiple regulators. One of the regulators includes a DC-DC converter circuit, and the other includes a linear regulator circuit. The multi-die module 11 equipped with multiple regulators can meet user requirements. In addition, the control circuits of the multiple regulators, specifically, the control circuit of the DC-DC converter and the control circuit of the linear regulator, are mounted on the first semiconductor die 13 and the second semiconductor die 15.

[0025] The multi-die module 11 is configured to form part of a DC-DC converter and part of a linear regulator, and is configured to control the DC-DC converter and the linear regulator. Specifically, the linear regulator and the DC-DC converter respond differently to the voltage appearing at the external electrode 13d. In the linear regulator operation, the voltage comparator circuit 25 operates to respond to voltage changes due to current consumption of the load. In the DC-DC converter operation, the voltage comparator circuit 25 operates to respond to voltage changes due to the induction of an inductor connected to the external electrode 13d and current consumption of the load.

[0026] In controlling the linear regulator, the voltage comparator circuit 25 is configured to compare the feedback signal SFB from the external electrode 13d with the reference voltage VREF from the reference voltage generating circuit 33, and generate a feedback control signal SFDB indicating the difference between these voltages. The voltage comparator circuit 25 controls the output transistor of the linear regulator by this feedback control signal SFDB.

[0027] In controlling the DC-DC converter, the voltage comparator circuit 25 is configured to compare the feedback signal SFB from the external electrode 13d with a reference voltage VREF (which can be set to be different from the reference voltage for controlling the linear regulator) of the reference voltage generating circuit 33, and generate a feedback control signal SFDB indicating the difference between these voltages. The voltage comparator circuit 25 controls the first control circuit 21.

[0028] Specifically, in the voltage comparison circuit 25 configured to control each of the DC-DC converter and the linear regulator, a feedback control signal SFDB that controls the DC-DC converter is provided to the first control circuit 21. Also, a feedback control signal SFDB that controls the linear regulator is provided to an external drive circuit and / or an external electrode built into the first semiconductor die 13 via the first control circuit 21.

[0029] The first control circuit 21 and the second control circuit 23 are connected to each other so as to enable the propagation of, for example, the feedback control signal SFDB and / or the feedback signal SFB between the first control circuit 21 and the second control circuit 23.

[0030] In the exemplary multi-die module 11, the first control circuit 21 is provided for controlling the DC-DC converter circuit and may include primarily digital circuitry for controlling the DC-DC converter. The voltage comparator circuit 25 of the second control circuit 23 is provided for feedback control in the regulator circuit. The voltage comparator circuit 25 may include primarily analog circuitry configured to control the linear regulator circuit and may include primarily analog circuitry configured to control the DC-DC converter circuit.

[0031] Each of the first semiconductor die 13 and the second semiconductor die 15 has a small area compared to a single-die semiconductor integrated circuit that includes both the first control circuit 21 and the second control circuit 23 .

[0032] The characteristic test of the first semiconductor die 13 includes testing the characteristics and operation of the first control circuit 21, but does not include testing the characteristics and operation of the second control circuit 23, and the test time for the first control circuit 21 is shorter than the test time for a semiconductor integrated circuit having a single die configuration.

[0033] The characteristic test of the second semiconductor die 15 includes testing the characteristics and operation of the second control circuit 23, but does not include testing the characteristics and operation of the first control circuit 21, and the test time for the second control circuit 23 is shorter than the test time for a semiconductor integrated circuit having a single die configuration.

[0034] The characteristic test of the multi-die module 11 may include a test of the interconnection between the first semiconductor die 13 and the second semiconductor die 15, and an operation test of the DC-DC converter circuit and the linear regulator circuit. The operation test of the DC-DC converter circuit and / or the linear regulator circuit may also serve as a test of the interconnection between the first semiconductor die 13 and the second semiconductor die 15, except from the viewpoint of classification of failure modes.

[0035] Operational testing of first control circuit 21 and second control circuit 23 has already been completed prior to fabricating multi-die module 11. In addition, first semiconductor die 13 and second semiconductor die 15 that do not satisfy individual characteristics have already been removed from the parts used to fabricate multi-die module 11 prior to fabricating multi-die module 11.

[0036] In the exemplary multi-die module 11, the internal electrode 15b of the second semiconductor die 15 may include a second internal electrode 16c that is connected to a comparison output 25d of the voltage comparison circuit 25. The internal electrode 13b of the first semiconductor die 13 may include a second internal electrode 14c that is connected to the second internal electrode 16c of the second semiconductor die 15. The second internal electrode 14c is provided to an external electrode via one or more circuits, such as the first control circuit 21, and / or directly.

[0037] Next, the multi-die module 11 will be described.

[0038] The exemplary multi-die module 11 may further include a reference voltage generating circuit 33 disposed on either the first semiconductor die 13 or the second semiconductor die 15. An output 33b (VREF) of the reference voltage generating circuit 33 may provide a reference voltage to a reference input 21h of the first control circuit 21 and a reference input 25b (23b) of the voltage comparator circuit 25, respectively.

[0039] The internal electrode 13b of the first semiconductor die 13 may include a third internal electrode 14d, and the internal electrode 15b of the second semiconductor die 15 may include a third internal electrode 16d. The third internal electrode 14d of the first semiconductor die 13 is connected to the third internal electrode 16d of the second semiconductor die 15.

[0040] The third internal electrode 14d of the first semiconductor die 13 and the third internal electrode 16d of the second semiconductor die 15 can be connected to the output 33b (VREF) of the reference voltage generating circuit 33. The third internal electrode 14d can be connected to the reference input 21h of the first control circuit 21 or the output 33b (VREF) of the reference voltage generating circuit 33. The third internal electrode 16d can be connected to the reference input 23b (reference input 25b of the voltage comparator circuit 25) of the second control circuit 23 or the output 33b (VREF) of the reference voltage generating circuit 33.

[0041] The reference voltage generating circuit 33 may be provided in the first semiconductor die 13 as shown in Figure 1. Alternatively, the reference voltage generating circuit 33 may be provided in the second semiconductor die 15.

[0042] The exemplary multi-die module 11 further includes a selection signal generating circuit 35 provided on either the first semiconductor die 13 or the second semiconductor die 15. The selection signal generating circuit 35 generates a selection signal SLCT for exclusively operating the DC-DC converter and the linear regulator in response to an input signal SIN received at an input 35b. The selection signal SLCT has a first value and a second value indicating that the DC-DC converter and the linear regulator are to be operated, respectively. The selection signal SLCT can be provided to the first control circuit 21 and the second control circuit 23 from an output 35c of the selection signal generating circuit 35. The first control circuit 21 receives the selection signal SLCT at a switching input 21g. The selection signal SLCT is received at a switching input 23f (25f) of the second control circuit 23 (voltage comparison circuit 25).

[0043] The internal electrode 13b of the first semiconductor die 13 may include a fourth internal electrode 14f, and the internal electrode 15b of the second semiconductor die 15 may include a fourth internal electrode 16f. The fourth internal electrode 14f of the first semiconductor die 13 is connected to the fourth internal electrode 16f of the second semiconductor die 15.

[0044] At least one of the fourth internal electrode 14f of the first semiconductor die 13 and the fourth internal electrode 16f of the second semiconductor die 15 is connected to the selection signal generating circuit 35. The first control circuit 21 is connected to the fourth internal electrode 14f or the selection signal generating circuit 35. The second control circuit 23 is connected to the fourth internal electrode 16f or the selection signal generating circuit 35.

[0045] In the exemplary multi-die module 11, the select signal generation circuitry 35 is provided on the first semiconductor die 13, as shown in Figure 1. Alternatively, the select signal generation circuitry 35 may be provided on the second semiconductor die 15.

[0046] The first control circuit 21 is connected to the selection signal generation circuit 35, and switches the operations for the DC-DC converter and the linear regulator in response to a selection signal SLCT from the selection signal generation circuit 35. The second control circuit 23 is connected to the selection signal generation circuit 35, and switches the operations for the DC-DC converter and the linear regulator in response to the selection signal SLCT from the selection signal generation circuit 35.

[0047] In the exemplary multi-die module 11, the second semiconductor die 15 can be powered from the first semiconductor die 13. For this power supply, further internal electrodes are provided on the first semiconductor die 13 and the second semiconductor die 15.

[0048] Specifically, the internal electrode 13b of the first semiconductor die 13 may include a fifth internal electrode 14g, and the internal electrode 15b of the second semiconductor die 15 may include a fifth internal electrode 16g. The fifth internal electrode 14g of the first semiconductor die 13 is connected to the fifth internal electrode 16g of the second semiconductor die 15. This allows the power lines of the first semiconductor die 13 and the second semiconductor die 15 to be connected to each other. In addition, the internal electrode 13b of the first semiconductor die 13 may include a sixth internal electrode 14h, and the internal electrode 15b of the second semiconductor die 15 may include a sixth internal electrode 16h. The sixth internal electrode 14h of the first semiconductor die 13 is connected to the sixth internal electrode 16h of the second semiconductor die 15. This allows the power lines of the first semiconductor die 13 and the second semiconductor die 15 to be connected to each other.

[0049] In the exemplary multi-die module 11, the first control circuit 21 generates a first drive signal SDRV1 for controlling the drive of the DC-DC converter and the linear regulator, and a second drive signal SDRV2 for controlling the drive of the DC-DC converter. In controlling the DC-DC converter, the first control circuit 21 receives a feedback control signal SFDB at the feedback input 21d and a clock signal CLK at the clock input 21f. In the first control circuit 21, the first drive signal SDRV1 and the second drive signal SDRV2 are generated based on the feedback control signal SFDB and the clock signal CLK to control the drive of the DC-DC converter. The first control circuit 21 provides the first drive signal SDRV1 to the first output 21b. Also, the first control circuit 21 provides the second drive signal SDRV2 to the second output 21c. The operations of the first control circuit 21 and the second control circuit 23 are specified by a selection signal SLCT received at the switching input 21g.

[0050] The exemplary first control circuit 21 may include a generating circuit 41, which generates a basic drive signal SBDR for operating the DC-DC converter in response to a feedback control signal SFDB. The exemplary generating circuit 41 has a clock input 41b, an output 41c, a switching input 41d, an error input 41f, and a reference input 41g. In the generating circuit 41, the clock input 41b receives a clock signal CLK. The output 41c provides the basic drive signal SBDR generated from the clock signal CLK.

[0051] Specifically, the generating circuit 41 can adjust the duty of the basic drive signal SBDR based on the clock signal CLK in response to the feedback control signal SFDB received at the error input 41f. The switching input 41d receives a selection signal SLCT. The operation enable of the generating circuit 41 is specified by the selection signal SLCT received at the switching input 41d (21g). Specifically, the generating circuit 41 can be stopped during linear regulator operation in response to the selection signal SLCT that selects the linear regulator.

[0052] The voltage comparison circuit 25 and the generation circuit 41 can be configured to provide various control modes for controlling the DC-DC converter, such as a voltage control mode, a current control mode, and a ripple control mode.

[0053] The first control circuit 21 may include an adjustment circuit 43, which has an input 43d for receiving the basic drive signal SBDR. The adjustment circuit 43 generates a first control signal SCNT1 and a second control signal SCNT2 for controlling the drive of the DC-DC converter based on the basic drive signal SBDR received at the input 43d. The adjustment circuit 43 provides the first control signal SCNT1 and the second control signal SCNT2 to a first output 43b and a second output 43c, respectively. The exemplary adjustment circuit 43 adjusts the waveforms of the first control signal SCNT1 and the second control signal SCNT2 so that no shoot-through current flows through the drive transistor of the DC-DC converter.

[0054] The first control circuit 21 may include a first drive circuit 29 and a second drive circuit 31. Each of the first drive circuit 29 and the second drive circuit 31 operates in response to a selection signal SLCT.

[0055] The exemplary first drive circuit 29 has a first input 29b, a second input 29c, an output 29d, and a switching input 29f. The first input 29b is connected to a first output 43b of the adjustment circuit 43. The second input 29c is connected to a second internal electrode 16c of the first semiconductor die 13 and receives a feedback control signal SFDB from the voltage comparison circuit 25. The output 29d provides a first drive signal SDRV1. Additionally, the second drive circuit 31 has an input 31b connected to an output 41c of the generation circuit 41, an output 31c providing a second drive signal SDRV2, and a switching input 31f.

[0056] When the selection signal SLCT indicates the operation of the DC-DC converter, the first drive circuit 29 and the second drive circuit 31 generate the first drive signal SDRV1 and the second drive signal SDRV2 from the first control signal SCNT1 and the second control signal SCNT2, respectively. The first drive signal SDRV1 and the second drive signal SDRV2 are configured to control the drive of the DC-DC converter.

[0057] In the operation of the DC-DC converter, the first activation period TACTV1 of the drive of the first drive signal SDRV1 does not overlap with the second activation period TACTV2 of the drive of the second drive signal SDRV1 as shown in Fig. 2. The adjustment circuit 43 controls the first control signal SCNT1 for the first drive circuit 29 and the second control signal SCNT2 for the second drive circuit 31 so as to avoid this overlap.

[0058] 1 again, the first drive circuit 29 switches between a signal that controls the DC-DC converter and a signal that controls the linear regulator in response to the selection signal SLCT received at the switching input 29f, and provides the switched signal as the first drive signal SDRV1. Specifically, when the selection signal SLCT indicates that the linear regulator is to be selected, the first drive circuit 29 provides the feedback control signal SFDB from the comparison output 25d of the voltage comparator circuit 25 as the first drive signal SDRV1. As already described, when the selection signal SLCT indicates that the DC-DC converter circuit is to be selected, the first drive circuit 29 provides the first drive signal SDRV1 generated from the first control signal SCNT1 as a signal that controls the DC-DC converter.

[0059] The second drive circuit 31 is not used when the selection signal SLCT indicates to select the linear regulator, and accordingly, the second drive circuit 31 can be configured to stop its operation in response to the selection signal SLCT.

[0060] The first semiconductor die 13 may further include a voltage divider circuit 50 and a switch circuit 52. The voltage divider circuit 50 may be connected between the external electrode 13d and any of the power supply lines. A voltage division node NDV of the exemplary voltage divider circuit 50 may be provided to the first control circuit 21 and / or the internal line 13c via the switch circuit 52. Also, the voltage division node NDV of the voltage divider circuit 50 may be provided to the second control circuit 23 via the internal electrodes (13b, 15b). The voltage comparator circuit 25 operates on the power supply voltage of the external power supply 20, while the regulator voltage provided by the multi-die module according to the present embodiment is lower than the power supply voltage of the external power supply 20. Therefore, the voltage divider circuit 50 is used when required. Specifically, the voltage divider circuit 50 is configured to generate a feedback signal SFB in the first semiconductor die 13 in response to the regulator output voltage.

[0061] An exemplary configuration of a multi-die module according to this embodiment will be described with reference to FIGS. 3, 4, 5, 6 and 7. FIG.

[0062] FIG. 3 is a schematic diagram of a power supply device including an exemplary multi-die module according to the present embodiment. The power supply device 10a and the multi-die module 11a (11) of FIG. 3 are configured to form a step-down DC-DC converter. FIG. 4 is a schematic diagram of a power supply device including an exemplary multi-die module according to the present embodiment. The power supply device 10b and the multi-die module 11b (11) of FIG. 4 are configured to form a step-down DC-DC converter. FIG. 5 is a schematic diagram of a power supply device including an exemplary multi-die module according to the present embodiment. The power supply device 10c and the multi-die module 11c (11) of FIG. 5 are configured to form a linear regulator. In the following description, where possible, the reference symbols used in FIG. 1 are used to omit redundant description.

[0063] Referring to FIG. 3, a power supply device 10a is shown. The power supply device 10a uses a multi-die module 11a. The multi-die module 11a can include a fifth external electrode 12f and a sixth external electrode 12g. An output 29d of a first drive circuit 29 is connected to the fifth external electrode 12f, and an output 31d of a second drive circuit 31 is connected to the sixth external electrode 12g. A mode selection electrode 12d receives a selection signal SLCT that controls the multi-die module 11a (11) as a DC-DC converter.

[0064] In addition to the multi-die module 11a, the power supply device 10a includes a number of external active elements, such as a capacitor 51, a first external transistor 53, and a second external transistor 55, and an inductor 57. In Figure 3, each of the first external transistor 53 and the second external transistor 55 is depicted by a circuit symbol for a field effect transistor.

[0065] One of the external elements may include, for example, a p-type transistor MP0 as the first external transistor 53, but is not limited to this conductivity type. The source (S) and back gate (B) of the p-type transistor MP0 may be connected to the external power supply 20 via a high-potential side power supply line.

[0066] Another one of the external elements may include, but is not limited to, a second external transistor 55. The second external transistor 55 may include, for example, an n-type transistor MN0, and the source (S) and back gate (B) of the n-type transistor MN0 may be connected to the external power supply 20 via a low-potential side power supply line.

[0067] One end of the inductor 57 is connected to the drain (D) of the first external transistor 53 and the drain (D) of the second external transistor 55. The other end of the inductor 57 is connected to one end of the capacitor 51 and the external electrode 13d, and the other end of the capacitor 51 is connected to a low potential side power supply line (for example, a ground line). A shared node NCM1 of the inductor 57 and the capacitor 51 is connected to the load 30. In addition, the shared node NCM1 is connected to the external electrode 13d. The external electrode 13d receives a feedback signal SFB from the shared node NCM1.

[0068] The first drive circuit 29 receives the basic drive signal SBDR from the generation circuit 41 and generates a first drive signal SDRV1 configured to control the DC-DC converter. The first external transistor 53 receives the first drive signal SDRV1 from the first drive circuit 29 at its gate (G) via the external electrode 12f and is controlled by the first drive circuit 29.

[0069] The second drive circuit 31 receives the basic drive signal SBDR from the generation circuit 41 and generates a second drive signal SDRV2 configured to control the DC-DC converter. The second external transistor 55 receives the second drive signal SDRV2 from the second drive circuit 31 at its gate (G) via the external electrode 12g, and is controlled by the second drive circuit 31.

[0070] Referring to Fig. 4, a power supply device 10b is shown. In a step-down DC-DC converter, the power supply device 10b may include a diode 54 instead of the second external transistor 55 in Fig. 3, as shown in Fig. 4. The cathode (C) of the diode 54 is connected to the drain (D) of the first external transistor 53, and the anode (A) of the diode 54 is connected to the power supply line. In the power supply device 10b, the second drive circuit 31 is not used.

[0071] Referring to FIG. 5, a power supply device 10c is shown. The power supply device 10c uses a multi-die module 11c. The multi-die module 11c can include a fifth external electrode 12f. An output 29d of the first drive circuit 29 is connected to the fifth external electrode 12f. A mode selection electrode 12d receives a selection signal SLCT that controls the multi-die module 11b (11) as a linear regulator.

[0072] While the first control circuit 21, the adjustment circuit 43, the sixth external electrode 12g and the second drive circuit 31 are depicted in FIG. 5, these are not used to control the linear regulator.

[0073] Specifically, the power supply device 10c includes, in addition to the multi-die module 11c, a capacitor 51 and an external active element, for example, a third external transistor 59. One end of the capacitor 51 is connected to the drain (D) of the third external transistor 59, and the other end of the capacitor 51 is connected to a low-potential side power supply line (for example, a ground line). A shared node NCM2 of the third external transistor 59 and the capacitor 51 is connected to the load 30.

[0074] The third external transistor 59 may include, for example, a p-type transistor MP0, and the source (S) and back gate (B) of the p-type transistor MP0 may be connected to the external power supply 20 via a power supply line. The third external transistor 59 receives a feedback control signal SFDB from the comparison output 25d of the voltage comparison circuit 25 at its gate (G) via the external electrode 12f, and is controlled via the first drive circuit 29.

[0075] 5, the third external transistor 59 is depicted by the circuit symbol of a field effect transistor. However, the third external transistor 59 may include a bipolar transistor instead of a field effect transistor.

[0076] FIG. 6 is a schematic diagram of a power supply device including an exemplary multi-die module according to the present embodiment. The multi-die module 11d (11) of FIG. 6 is configured to form a step-down DC-DC converter. FIG. 7 is a schematic diagram of a power supply device including an exemplary multi-die module according to the present embodiment. The multi-die module 11e (11) of FIG. 7 is configured to form a linear regulator. In the following description, where possible, the reference symbols used in FIG. 1, FIG. 3, FIG. 4, and FIG. 5 are used to omit redundant description.

[0077] Referring to FIG. 6, a power supply 10d is shown. The power supply 10d uses a multi-die module 11d. The multi-die module 11d may further include a first output transistor 47 and a second output transistor 49. Each of the first output transistor 47 and the second output transistor 49 is depicted by a circuit symbol of a field effect transistor. The mode selection electrode 12d receives a selection signal SLCT that controls the multi-die module 11d (11) as a DC-DC converter.

[0078] The first output transistor 47 may include, for example, a p-type transistor MP1, and the source (S) and back gate (B) of the p-type transistor MP1 may be connected to the external power supply 20 via a high-potential side power supply line.

[0079] The second output transistor 49 can include, for example, an n-type transistor MN1, and the source (S) and back gate (B) of the n-type transistor MN1 can be connected to the external power supply 20 via the low potential side power supply line.

[0080] One end of the inductor 57 is connected to the drain (D) of the first output transistor 47 and the drain (D) of the second output transistor 49 via the external electrode 13d. The other end of the inductor 57 is connected to the internal line 13c via the external electrode 12e and is connected to one end of the capacitor 51. The other end of the capacitor 51 is connected to a low-potential power supply line (for example, a ground line). A shared node NCM1 of the inductor 57 and the capacitor 51 is connected to the load 30. In addition, the shared node NCM1 is connected to the external electrode 12e, and the external electrode 12e receives a feedback signal SFB from the shared node NCM1. The external electrode 13d provides the inductor 57 with drive signals from the first output transistor 47 and the second output transistor 49.

[0081] The first drive circuit 29 receives the basic drive signal SBDR from the generation circuit 41 and generates a first drive signal SDRV1 configured to control the DC-DC converter. The first output transistor 47 receives the first drive signal SDRV1 from the first drive circuit 29 at its gate (G) and is controlled by the first drive signal SDRV1.

[0082] The second drive circuit 31 receives the basic drive signal SBDR from the generation circuit 41 and generates a second drive signal SDRV2 configured to control the DC-DC converter. The second output transistor 49 receives the second drive signal SDRV2 from the second drive circuit 31 at its gate (G) and is controlled by the second drive signal SDRV2.

[0083] Referring to FIG. 7, a power supply 10e is shown. The power supply 10e uses a multi-die module 11e. The multi-die module 11e may further include a first output transistor 47. The first output transistor 47 is depicted by a circuit symbol for a field effect transistor. A mode selection electrode 12d receives a selection signal SLCT that controls the multi-die module 11e (11) as a linear regulator.

[0084] The output 29 d of the first drive circuit 29 is connected to the gate (G) of the first output transistor 47 .

[0085] 7, the second drive circuit 31, the generation circuit 41, the adjustment circuit 43, and the second output transistor 49 are illustrated, but are not used to control the linear regulator. The second drive circuit 31 operates to make the second output transistor 49 non-conductive. To indicate this, "OFF" is written near the second output transistor 49.

[0086] Specifically, the power supply device 10e includes, in addition to the multi-die module 11e, a capacitor 51. One end of the capacitor 51 is connected to the load 30 and the external electrodes 13d and 12e, and the other end of the capacitor 51 is connected to a low-potential power line (e.g., a ground line). The external electrode 12e is configured to receive a feedback signal SFB, while the external electrode 13d can be connected to the first output transistor 47.

[0087] The multi-die module 11e of Figure 7 is configured to use the same external electrode arrangement as the multi-die module 11d of Figure 6. However, the multi-die module 11e may be provided with either external electrodes 13d, 12e, and the drain (D) of the first output transistor 47, the external electrode 13d, and the internal line 13 may be connected together within the multi-die module 11e.

[0088] The first output transistor 47 may include, for example, a p-type transistor MP0, and the source (S) and back gate (B) of the p-type transistor MP0 may be connected to the external power supply 20 via a power supply line. The first output transistor 47 receives a feedback control signal SFDB from the comparison output 25d of the voltage comparison circuit 25 at its gate (G) via the first drive circuit 29, and is controlled by a first drive signal SDRV1.

[0089] As described above, the multi-die modules 11 (11a, 11b, 11c, 11d, 11e) and power supplies 10 (10a, 10b, 10c, 10d, 10e) of Figures 1, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 101,

[0090] While the multi-die modules 11 (11a and 11b (and 11c)) have the same or similar hardware configuration, they are configured to control the multi-die modules 11 (11a and 11b (and 11c)) as DC-DC converters or linear regulators in response to a selection signal SLCT from the selection signal generating circuit 35.

[0091] In addition, while the multi-die modules 11 (11d and 11e) have the same or similar hardware configuration, they are configured to control the multi-die modules 11 (11d and 11e) as DC-DC converters or linear regulators in response to a selection signal SLCT from a selection signal generating circuit 35.

[0092] The multi-die module 11 (11d and 11e) shown in Figures 6 and 7 is provided with a plurality of transistors connected to the external electrode 13d. Specifically, when the selection signal SLCT has a first value (a value indicating that the DC-DC converter is to be controlled), the first drive circuit 29 operates the first output transistor 47 as an output transistor of the DC-DC converter based on a first control signal SCNT1. When the selection signal SLCT has a second value (a value indicating that the linear regulator is to be controlled), the first drive circuit 29 operates the first output transistor 47 as an output transistor of the linear regulator based on a feedback control signal SFDB from the comparison output 25d.

[0093] The multi-die module 11 (11a, 11b, 11c) shown in Figures 3, 4 and 5 is configured to connect the output 29d of the first drive circuit 29 to the fifth external electrode 12f and the output 31d of the second drive circuit 31 to the sixth external electrode 12g.

[0094] When the selection signal SLCT has a first value (a value indicating control of the DC-DC converter), the first drive circuit 29 provides a first drive signal SDRV1 to the fifth external electrode 12f to drive the first external transistor 53 of the DC-DC converter. Also, when the selection signal SLCT has a second value (a value indicating control of the linear regulator), the first drive circuit 29 provides a feedback control signal SFDB from the comparison output 25d to the fifth external electrode 12f to drive the output transistor of the linear regulator.

[0095] When the selection signal SLCT has a first value (a value indicating that the DC-DC converter is to be controlled), the second drive circuit 31 provides the second drive signal SDRV2 to the sixth external electrode 12g to drive the output transistor of the DC-DC converter. When the selection signal SLCT has a second value (a value indicating that the linear regulator is to be controlled), the second drive circuit 31 does not provide the second drive signal SDRV2 to the sixth external electrode 12g.

[0096] Accordingly, when the selection signal SLCT has a first value (a value indicating control of the DC-DC converter), the second drive circuit 31 operates the second external transistor 55 as an output transistor of the DC-DC converter based on the second control signal SCNT2.

[0097] The multi-die module 11 (11a, 11b, 11c, 11d, 11e) shown in FIGS. 3, 4, 5, 6 and 7 provides a voltage comparison circuit 25 on the second semiconductor die 15.

[0098] The voltage comparison circuit 25 can be configured to generate a feedback control signal SFDB (comparison signal) for controlling the DC-DC converter based on the respective signals from the feedback input 25c and the reference input 25b when the selection signal SLCT has a first value (a value indicating that the DC-DC converter is controlled). The feedback control signal SFDB is provided to the first control circuit 21, and the generation circuit 41 generates the basic drive signal SBDR based on the feedback control signal SFDB. The basic drive signal SBDR is provided to the adjustment circuit 43, and the first drive circuit 29 and the second drive circuit 31 generate the first drive signal SDRV1 and the second drive signal SDRV2, respectively, based on the first control signal SCNT1 and the second control signal SCNT2 from the adjustment circuit 43.

[0099] The voltage comparator circuit 25 is configured to generate a feedback control signal SFDB for controlling the linear regulator based on the signals from the feedback input 25c and the reference input 25b when the selection signal SLCT has a second value (a value indicating that the linear regulator is to be controlled). The feedback control signal SFDB is output via the first drive circuit 29.

[0100] 3 to 5 is configured to connect an output 29d of a first drive circuit 29 to a fifth external electrode 12f and an output 31d of a second drive circuit 31 to a sixth external electrode 12g. The first drive circuit 29 and the second drive circuit 31 are connected to a selection signal generation circuit 35.

[0101] When the selection signal SLCT has a first value (a value indicating control of the DC-DC converter), the first drive circuit 29 provides a first drive signal SDRV1 to the fifth external electrode 12f to operate the DC-DC converter. When the selection signal SLCT has a second value (a value indicating control of the linear regulator), the first drive circuit 29 provides a feedback control signal SFDB from the comparison output 25d to the fifth external electrode 12f to operate the linear regulator.

[0102] When the selection signal SLCT has a first value (a value indicating control of the DC-DC converter), the second drive circuit 31 provides a second drive signal SDRV2 to the sixth external electrode 12g to operate the DC-DC converter. When the selection signal SLCT has a second value (a value indicating control of the linear regulator), the second drive circuit 31 fixes the output 31d of the second drive circuit 31 to any one of logical values ​​[H] or [L], or high impedance.

[0103] Multi-die module 11 may include a first semiconductor die 13 and a second semiconductor die 15, and may further include one or more additional semiconductor die.

[0104] The exemplary selection signal generating circuit 35 is configured to switch between the operation of the DC-DC converter and the operation of the linear regulator. However, the selection signal generating circuit 35 may provide additional operation modes to the multi-die module 11. The exemplary multi-die module 11 may provide an additional external electrode on the first semiconductor die 13, for example in the configurations shown in FIG. 6 and FIG. 7. The additional external electrode may have a first configuration and / or a second configuration. In the first configuration, the additional external electrode may be connected to the first output 21b of the first control circuit 21 (the output 29d of the first drive circuit 29) via a switch or without a switch. In the second configuration, the additional external electrode may be connected to the second output 21c of the first control circuit 21 (the output 31c of the second drive circuit 31) via a switch or without a switch.

[0105] A method for fabricating a semiconductor device according to the present invention will now be described, in which one or more of the steps described below can be performed in any order. In the following description, where possible, reference numerals already used will be used for ease of understanding.

[0106] In the first step, a first semiconductor die 13 that has not yet undergone a characteristic test is prepared as a candidate for the first semiconductor die 13. The first semiconductor die 13 that has not yet undergone a characteristic test includes a first control circuit 21 configured to be capable of controlling at least a DC-DC converter among a DC-DC converter and a linear regulator. The first semiconductor die 13 may further have an internal line 13c, an external electrode 13d, and a plurality of internal electrodes 13b. Here, the preparation includes obtaining the first semiconductor die 13 and fabricating the first semiconductor die 13.

[0107] In a second step, a characteristic test (e.g., an operational test of an analog circuit and / or a functional test of a digital circuit) is performed on the prepared first semiconductor die 13, and a first semiconductor die 13 that passes the characteristic test (hereinafter simply referred to as the "first semiconductor die 13") is obtained.

[0108] In a third step, a second semiconductor die 15 that has not yet undergone a characteristic test is prepared as a candidate for the second semiconductor die 15. The second semiconductor die 15 that has not yet undergone a characteristic test includes a second control circuit 23 configured to be capable of controlling at least a linear regulator among a DC-DC converter and a linear regulator, and may further have a plurality of internal electrodes 15b. Here, the preparation includes obtaining the second semiconductor die 15 and fabricating the second semiconductor die 15.

[0109] In a fourth step, characteristic tests (e.g., an operational test of the analog circuit and a functional test of the digital circuit) are performed on the prepared second semiconductor die 15, and a second semiconductor die 15 that passes the characteristic test (hereinafter simply referred to as the "second semiconductor die 15") is obtained.

[0110] In a fifth step, a third semiconductor die that has not yet undergone a characteristic test is prepared as a candidate for a third semiconductor die different from the first semiconductor die 13 and the second semiconductor die 15. The third semiconductor die that has not yet undergone a characteristic test includes a semiconductor integrated circuit that does not include the second control circuit 23, and has a plurality of internal electrodes. Here, the preparation includes obtaining the third semiconductor die and fabricating the third semiconductor die.

[0111] The first semiconductor die 13, the second semiconductor die 15, and the third semiconductor die can be fabricated by a front-end process for fabricating a CMOS semiconductor, for example. The wafer product produced by the front-end wafer process is separated into individual semiconductor dies.

[0112] In a sixth step, the first semiconductor die 13 and the second semiconductor die 15 are assembled to create a first assembly including at least the first semiconductor die 13 and the second semiconductor die 15. The first assembly may constitute a multi-die module.

[0113] In the seventh step, the first assembly is tested.

[0114] In an eighth step, the first semiconductor die 13 and the third semiconductor die are assembled to create a second assembly including at least the first semiconductor die 13 and the third semiconductor die. The second assembly may constitute a multi-die module.

[0115] The ninth step is to test the second assembly.

[0116] When possible, the method may include an additional step of assembling the first semiconductor die 13 to create a third assembly that includes the first semiconductor die 13 and does not include the second semiconductor die 15 and the third semiconductor die. The third assembly may comprise a single die module. Testing of the third assembly may also be performed.

[0117] As described above, according to the present embodiment, a multi-die module 11 having a plurality of regulators mounted thereon, and a power supply device 10 including the multi-die module 11 can be provided.

[0118] As can be understood from the above description, the present embodiment can have various aspects as follows.

[0119] A multi-die module according to a first aspect of this embodiment includes a first semiconductor die including a first control circuit configured to control at least a DC-DC converter, the first semiconductor die having an internal line, an external electrode, and a plurality of internal electrodes; a second semiconductor die including a second control circuit configured to control at least a linear regulator, the second semiconductor die having a plurality of internal electrodes; and a package supporting the first semiconductor die and the second semiconductor die such that at least the first semiconductor die and the second semiconductor die constitute a multi-die module, the first control circuit having a reference input and one or more outputs, the second control circuit including a voltage comparison circuit having a feedback input, a reference input, and a comparison output, the internal electrode of the first semiconductor die including a first internal electrode, the internal electrode of the second semiconductor die including a first internal electrode, the feedback input of the voltage comparison circuit being connected to the first internal electrode of the second semiconductor die, the first internal electrode of the first semiconductor die being connected to the first internal electrode of the second semiconductor die, and the internal line connecting the first internal electrode of the first semiconductor die to the external electrode.

[0120] In a multi-die module of a second aspect according to the first aspect of this embodiment, the internal electrode of the second semiconductor die includes a second internal electrode connected to the comparison output of the voltage comparison circuit, the internal electrode of the first semiconductor die includes a second internal electrode connected to the second internal electrode of the second semiconductor die, and the first control circuit includes a generation circuit having an output for providing a first control signal for controlling the driving of the DC-DC converter, and a first drive circuit having an output for providing a first drive signal, and the first drive circuit may be connected to the output of the generation circuit and the second internal electrode of the first semiconductor die.

[0121] In a multi-die module of a third aspect according to the second aspect of this embodiment, the first semiconductor die includes a first output transistor having a gate connected to the first drive circuit, and one of a drain and a source of the first output transistor can be connected to the external electrode.

[0122] In a multi-die module of a fourth aspect according to the second or third aspect of this embodiment, the first semiconductor die may further include a first external electrode different from the external electrode, and the first drive circuit may have an output connected to the first external electrode.

[0123] In a multi-die module of a fifth aspect according to the second, third or fourth aspect of this embodiment, the first control circuit may include a second drive circuit connected to the output of the generation circuit and having an output for providing a second drive signal, and a first activation period of driving the first drive signal may not overlap with a second activation period of driving the second drive signal.

[0124] In a multi-die module of a sixth aspect according to the fifth aspect of this embodiment, the first semiconductor die includes a first output transistor having a gate connected to the first drive circuit, one of a drain and a source of the first output transistor being connected to the external electrode, and the first semiconductor die includes a second output transistor having a gate connected to the output of the second drive circuit, the drain of the second output transistor being connected to the external electrode.

[0125] In a multi-die module of a seventh aspect according to the fifth or sixth aspect of this embodiment, the first semiconductor die may further include a second external electrode different from the external electrode, and the second drive circuit may have an output connected to the second external electrode.

[0126] A multi-die module of an eighth aspect according to any one of the first to seventh aspects of the present embodiment further includes a reference voltage generation circuit provided in either the first semiconductor die or the second semiconductor die, the reference voltage generation circuit being configured to provide respective reference voltages to the reference input of the first control circuit and the reference input of the voltage comparison circuit, the internal electrode of the first semiconductor die including a third internal electrode, the internal electrode of the second semiconductor die including a third internal electrode, the third internal electrode of the first semiconductor die being connected to the third internal electrode of the second semiconductor die, the third internal electrode of the first semiconductor die being connected to at least one of the reference input of the first control circuit and the reference voltage generation circuit, and the third internal electrode of the second semiconductor die being connected to at least one of the reference input of the voltage comparison circuit and the reference voltage generation circuit.

[0127] In a multi-die module of a ninth aspect according to an eighth aspect of the present embodiment, the reference voltage generating circuit may be provided in the first semiconductor die.

[0128] A multi-die module of a tenth aspect according to any one of the first to ninth aspects of this embodiment further includes a selection signal generation circuit provided on either the first semiconductor die or the second semiconductor die, the selection signal generation circuit generates a selection signal, the selection signal having a first value and a second value indicating to operate the DC-DC converter and the linear regulator exclusively, respectively, and the selection signal can be provided to the first control circuit and the second control circuit.

[0129] In a multi-die module of an eleventh aspect according to a tenth aspect of this embodiment, the selection signal generation circuit is provided in the first semiconductor die, the internal electrode of the first semiconductor die includes a fourth internal electrode connected to at least one of the selection signal generation circuit and the first control circuit, the internal electrode of the second semiconductor die includes a fourth internal electrode connected to the fourth internal electrode of the first semiconductor die, and the second control circuit can be connected to the fourth internal electrode of the second semiconductor die.

[0130] The power supply device of the twelfth aspect of this embodiment comprises a multi-die module as described in any one of the first to eleventh aspects, an inductor having one end connected to the external electrode of the multi-die module, and a capacitor having one end connected to the external electrode of the multi-die module.

[0131] The power supply device of a thirteenth aspect of this embodiment comprises a multi-die module described in any one of the first to eleventh aspects, and a capacitor having one end connected to the external electrode of the multi-die module.

[0132] The power supply device of a fourteenth aspect of this embodiment includes a multi-die module described in any one of the first to eleventh aspects, a first external transistor having a gate connected to the multi-die module, one of a source and a drain connected to the external electrode, and the other of the source and drain connected to a first power supply line, the first external transistor being controlled by the first control circuit, and a capacitor having one end connected to the external electrode of the multi-die module.

[0133] The power supply device of the fifteenth aspect according to the fourteenth aspect of this embodiment may further include an inductor having one end connected to the external electrode of the multi-die module.

[0134] The power supply device of aspect 16 in accordance with aspect 14 of this embodiment further includes a second external transistor, the second external transistor having a gate connected to the multi-die module, one of a source and a drain connected to the external electrode, and the other of a source and a drain connected to a second power supply line different from the first power supply line, and can be controlled by the first control circuit.

[0135] The power supply device of the seventeenth aspect in accordance with the fifteenth aspect of this embodiment may further include a diode having one end connected to the external electrode and the other end connected to a second power supply line different from the first power supply line.

[0136] The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit and scope of the present invention, all of which are included in the technical concept of the present invention. [Explanation of symbols]

[0137] 10, 10a~10e...Power supply. 11, 11a to 11e: Multi-die module, 12b...1st power supply electrode, 12c...Second power supply electrode, 12d Mode selection electrode, 12e, 12f, 12g, 13d...external electrode 13. First semiconductor die 13b, 14b~14d, 14f~14h, 15b, 16b~16d, 16f~16h...Internal electrode 13c... Internal line, 15... second semiconductor die; 17...Package, 20...external power supply, 21... First control circuit, 23... second control circuit, 25... Voltage comparator circuit, 25b Reference input, 25c Feedback input, 25d Comparison output, 29... First drive circuit, 30...load, 31... Second drive circuit, 33 Reference voltage generation circuit; 35... Selection signal generating circuit, 41...Generation circuit, 43...adjustment circuit, 47 first output transistor, 49... second output transistor, 51 Capacitor, 53 - first external transistor; 54...Diode 55 Second external transistor 57...Inductor 59... third external transistor; CLK: Clock signal, MN0, MN1, MP0, MP1... transistors, SBDR: Basic drive signal, SCNT1: First control signal, SCNT2: Second control signal, SDRV1: First drive signal, SDRV2: Second drive signal, SFB: Feedback signal, SFDB···feedback control signal, SIN: Input signal, SLCT: selection signal, TACTV1...first activation period, TACTV2...Second activation period.

Claims

1. a first semiconductor die including a first control circuit configured to control at least a DC-DC converter, the first semiconductor die having an internal line, an external electrode, and a plurality of internal electrodes; a second semiconductor die including a second control circuit configured to control at least the linear regulator and having a plurality of internal electrodes; a package supporting at least the first semiconductor die and the second semiconductor die such that the first semiconductor die and the second semiconductor die form a multi-die module; Equipped with the first control circuit having a reference input and one or more outputs; the second control circuit includes a voltage comparison circuit having a feedback input, a reference input, and a comparison output; the internal electrodes of the first semiconductor die include a first internal electrode; the internal electrodes of the second semiconductor die include a first internal electrode; the feedback input of the voltage comparator circuit is connected to the first internal electrode of the second semiconductor die; the first internal electrode of the first semiconductor die is connected to the first internal electrode of the second semiconductor die; the internal line connects the first internal electrode of the first semiconductor die to the external electrode. Multi-die module.

2. the internal electrodes of the second semiconductor die include a second internal electrode connected to the comparison output of the voltage comparison circuit; the internal electrode of the first semiconductor die includes a second internal electrode connected to the second internal electrode of the second semiconductor die; the first control circuit includes a generating circuit having an output for providing a first control signal for controlling the driving of the DC-DC converter, and a first driving circuit having an output for providing a first driving signal; the first drive circuit is connected to the output of the generation circuit and to the second internal electrode of the first semiconductor die.

2. The multi-die module of claim 1.

3. the first semiconductor die includes a first output transistor having a gate coupled to the first drive circuit; one of the drain and the source of the first output transistor is connected to the external electrode; 3. The multi-die module of claim 2.

4. the first semiconductor die further includes a first external electrode different from the external electrode; the first drive circuit has an output connected to the first external electrode; 3. The multi-die module of claim 2.

5. the first control circuit includes a second drive circuit connected to the output of the generating circuit and having an output for providing a second drive signal; a first activation period of the first drive signal does not overlap with a second activation period of the second drive signal; 3. The multi-die module of claim 2.

6. the first semiconductor die includes a first output transistor having a gate coupled to the first drive circuit; one of the drain and the source of the first output transistor is connected to the external electrode; the first semiconductor die includes a second output transistor having a gate coupled to the output of the second drive circuit; The drain of the second output transistor is connected to the external electrode.

6. The multi-die module of claim 5.

7. the first semiconductor die further includes a second external electrode different from the external electrode; the second drive circuit has an output connected to the second external electrode; 6. The multi-die module of claim 5.

8. The semiconductor device further includes a reference voltage generating circuit provided on either the first semiconductor die or the second semiconductor die, the reference voltage generation circuit is configured to provide respective reference voltages to the reference input of the first control circuit and to the reference input of the voltage comparison circuit; the internal electrodes of the first semiconductor die include a third internal electrode; the internal electrodes of the second semiconductor die include a third internal electrode; the third internal electrode of the first semiconductor die is connected to the third internal electrode of the second semiconductor die; the third internal electrode of the first semiconductor die is connected to at least one of the reference input of the first control circuit and the reference voltage generating circuit; the third internal electrode of the second semiconductor die is connected to at least one of the reference input of the voltage comparator circuit and the reference voltage generating circuit; 2. The multi-die module of claim 1.

9. The reference voltage generating circuit is provided on the first semiconductor die.

9. The multi-die module of claim 8.

10. A selection signal generation circuit is provided on either the first semiconductor die or the second semiconductor die, the selection signal generating circuit generates a selection signal, the selection signal having a first value and a second value indicating that the DC-DC converter and the linear regulator are to be operated exclusively, respectively; the selection signal is provided to the first control circuit and the second control circuit; 2. The multi-die module of claim 1.

11. the selection signal generation circuit is provided on the first semiconductor die; the internal electrodes of the first semiconductor die include a fourth internal electrode connected to at least one of the selection signal generating circuit and the first control circuit; the internal electrodes of the second semiconductor die include a fourth internal electrode connected to the fourth internal electrode of the first semiconductor die; the second control circuit is connected to the fourth internal electrode of the second semiconductor die; 11. The multi-die module of claim 10.

12. A multi-die module according to any one of claims 1 to 11; a capacitor having one end connected to the external electrode of the multi-die module; A power supply device comprising:

13. A multi-die module according to any one of claims 1 to 11; an inductor having one end connected to the external electrode of the multi-die module; a capacitor having one end connected to the external electrode of the multi-die module; A power supply device comprising:

14. A multi-die module according to any one of claims 1 to 11; a first external transistor having a gate connected to the multi-die module, one of a source and a drain connected to the external electrode, and the other of a source and a drain connected to a first power supply line, the first external transistor being controlled by the first control circuit; a capacitor having one end connected to the external electrode of the multi-die module; A power supply device comprising:

15. an inductor having one end connected to the external electrode of the multi-die module; 15. The power supply device of claim 14.

16. Further comprising a second external transistor; the second external transistor has a gate connected to the multi-die module, one of a source and a drain connected to the external electrode, and the other of a source and a drain connected to a second power supply line different from the first power supply line, and is controlled by the first control circuit; 15. The power supply device of claim 14.

17. a diode having one end connected to the external electrode and the other end connected to a second power supply line different from the first power supply line, 16. The power supply device of claim 15.

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