Image sensor, mobile information terminal, and monitoring system

Abstract

To provide an imaging device that can detect a difference and consumes less power.SOLUTION: An imaging device includes a pixel including a photoelectric conversion element and a transistor, an analog processing circuit, and a digital processing circuit. The imaging device operates in a first mode and a second mode. In the first mode, the analog processing circuit detects a difference between first imaging data imaged by the pixel and second imaging data imaged by the pixel and generates a trigger signal on the basis of the value of the difference. In the second mode, the digital processing circuit converts third imaging data imaged by the pixel into digital data. The transition from the first mode to the second mode is performed based on the trigger signal.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to an imaging device, a monitoring device, and an electronic device having an imaging function.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one aspect relates to an article, a method, or a manufacturing method. One aspect of the present invention is a process, machine, manufacture, or composition. Therefore, the present invention more specifically disclosed herein The technical field of one embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, The driving method thereof or the manufacturing method thereof can be given as an example. [Background technology]

[0003] Imaging devices are now standardly built into mobile phones and are becoming increasingly popular (see, for example, patent literature 2). (See Reference 1.) In particular, CMOS image sensors are cheaper than CCD image sensors. CMOS image sensors have features such as small size, high resolution, and low power consumption. It is composed of sa. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] U.S. Patent No. 7,046,282 Summary of the Invention [Problem to be solved by the invention]

[0005] When using a CMOS image sensor in a security camera, an alarm will sound when an intruder is detected. Specifically, the system will use a CMOS image sensor to capture images of the surrounding area. Image data of an image captured when there is no intruder in the viewing area and an image of the image captured at the current time The image processing is performed to compare the data and generate a trigger signal if there is a difference. The following configuration is possible.

[0006] When carrying out the above image processing, first, the data of each pixel of the CMOS image sensor is read out. The signal is converted into digital data by A / D conversion. The digital data is then input to a computer. The procedure is to import the image into a computer and run image processing software on the computer. Therefore, the A / D conversion of the data read from the CMOS image sensor and the large amount of data Data transfer to import digital data into a computer, The process involves storing and reading data from the computer's memory device, running image processing software, and performing other operations that require huge amounts of data. The trigger signal is generated while consuming power.

[0007] In view of this, an object of one embodiment of the present invention is to provide a novel imaging device or the like.

[0008] Another embodiment of the present invention is an imaging device or the like having a novel structure that is capable of detecting a difference with low power consumption. One of our goals is to provide

[0009] Note that the problems of one embodiment of the present invention are not limited to the problems listed above. This does not preclude the existence of other issues. Other issues may be discussed in the following sections. Problems not mentioned in this section are problems that a person skilled in the art would understand in the specification or This can be derived from the descriptions in the drawings, etc., and can be extracted appropriately from these descriptions. One aspect of the present invention is to achieve at least one of the above-listed objects and / or other objects. This is intended to solve three problems. [Means for solving the problem]

[0010] One aspect of the present invention has been made in consideration of the above-mentioned problems, and provides a pixel array including a plurality of pixels and an analog processing circuit. In the imaging device having the digital processing circuit, the pixel is The difference data between the first imaging data in the first state and the second imaging data in the second state is stored. In the second mode, the difference data can be read out. The imaging data can be stored and the third data can be read out, and the analog processing circuit can In the first mode, the difference absolute value sum is calculated for the difference data read from each pixel. If the result of the calculation is greater than a specified value, a trigger signal is generated, and the digital processing circuit In the second mode, the third imaging data read from each pixel is digitized by A / D conversion. When a trigger signal is generated, the imaging device converts the image data into the first mode. The mode transitions from the first to the second mode. Also, if a certain period of time has elapsed in the second mode, or If a signal to return to the first mode is provided, the second mode is transitioned to the first mode. do.

[0011] Another embodiment of the present invention has been made in view of the above-described problems, and provides a method for manufacturing a pixel having a plurality of pixels and an analog In an imaging device having a processing circuit and a digital processing circuit, a pixel is is differential data between the first imaging data in the first state and the second imaging data in the second state. In the second mode, the difference data can be read out. The third imaging data is stored, and the third imaging data can be read out and processed in an analog manner. In the first mode, the circuit outputs a current value corresponding to a difference between the first image data and the second image data. The current value is compared with the reference current value, and if a difference is detected, a trigger signal is generated and digitally processed. In the second mode, the processing circuit converts the third imaging data read from each pixel into a digital signal by A / D conversion. When a trigger signal is generated, the image pickup device converts the first The mode will transition to the second mode. Also, if a certain period of time has elapsed in the second mode, Or, if a signal to return to the first mode is provided, the second mode is switched back to the first mode. Transition to.

[0012] In the above configuration, in the first mode, digital processing that consumes a huge amount of power is not performed, and In addition, only the minimum analog processing required to generate a trigger signal is required, so power consumption is low. In the second mode, the trigger signal is digitally processed. It is possible to confirm in detail the cause of the generation, i.e., the difference from the imaging data in the first mode. can.

[0013] The imaging device of one embodiment of the present invention includes a pixel including a photoelectric conversion element and a transistor, and an analog processing The imaging device has a first mode and a second mode. In the first mode, the analog processing circuit converts the first image data captured by the pixel into and a difference between the second image data captured by the pixel is detected, and a trigger signal is generated based on the difference value. In the second mode, the digital processing circuit generates third image data captured by the pixel. The transition from the first mode to the second mode is triggered by a trigger signal. This will be based on:

[0014] The imaging device according to one aspect of the present invention includes an analog processing circuit for processing the first imaging data and the second imaging data. The difference absolute value sum of the image data is calculated, and if the result of the calculation is not the same as the specified value, the previous The analog processing circuit is a circuit that generates the trigger signal. and a summing circuit.

[0015] The digital processing circuit included in the imaging device of one embodiment of the present invention has an A / D conversion circuit.

[0016] The imaging device according to one aspect of the present invention is configured to switch from the second mode to the first mode when a certain period of time has elapsed. Transition to mode 1. Effect of the Invention

[0017] One embodiment of the present invention can provide a semiconductor device or the like with a novel structure.

[0018] According to one embodiment of the present invention, it is possible to provide an imaging device capable of detecting a difference with low power consumption. can.

[0019] Note that the effects of one embodiment of the present invention are not limited to the effects listed above. This does not preclude the existence of other effects. Other effects are described below. The effects not mentioned in this section are obvious to those skilled in the art in the specification or the like. This can be derived from the descriptions in the drawings, etc., and can be extracted appropriately from these descriptions. In addition, one aspect of the present invention has at least one of the effects listed above and / or other effects. Therefore, one aspect of the present invention may have the above-listed effects. In some cases, it may have no effect. [Brief description of the drawings]

[0020] [Figure 1] FIG. 1 is a diagram illustrating a configuration of an imaging apparatus. [Diagram 2] 3A to 3C are diagrams illustrating the operation of the imaging apparatus. [Diagram 3] 3A to 3C are diagrams illustrating the operation of the imaging apparatus. [Figure 4] 1A and 1B are diagrams illustrating a configuration and an operation of an imaging apparatus. [Diagram 5] 3A to 3C are diagrams illustrating the operation of the imaging apparatus. [Figure 6] FIG. 1 is a diagram illustrating a configuration of an imaging apparatus. [Figure 7] FIG. 1 is a diagram illustrating a configuration of an imaging apparatus. [Figure 8] 3A to 3C are diagrams illustrating the operation of the imaging apparatus. [Figure 9] FIG. 1 is a circuit diagram illustrating an imaging device. [Figure 10] FIG. 1 is a circuit diagram illustrating an imaging device. [Figure 11] FIG. 1 is a cross-sectional view illustrating an imaging apparatus. [Figure 12] FIG. 1 is a cross-sectional view illustrating an imaging apparatus. [Figure 13] FIG. 1 is a block diagram showing an example of a configuration of a monitoring system. [Figure 14] 1A and 1B are diagrams illustrating electronic devices using an imaging device. [Figure 15] 1A and 1B are a circuit diagram and a cross-sectional view illustrating an imaging device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0021] Hereinafter, the embodiments will be described with reference to the drawings. It is possible to carry out the present invention in various forms without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications may be made to the details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0022] A transistor is a type of semiconductor device that amplifies current and voltage and controls conduction or non-conduction. In this specification, the transistor can realize a switching operation such as IGFET(Insulated Gate Field Effect Transi) stor) and thin film transistor (TFT) Includes.

[0023] In addition, the position, size, range, etc. of each component shown in the drawings are not necessarily the same as in the actual embodiment, for ease of understanding. Therefore, the disclosed invention may not necessarily represent the actual position, size, range, etc. The present invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings.

[0024] In this specification, ordinal numbers such as "first," "second," and "third" are used to avoid confusion of components. It should be noted that the numbers are added to avoid confusion and are not intended to be limiting.

[0025] In this specification, when it is explicitly stated that X and Y are connected, When X and Y are electrically connected, when X and Y are functionally connected, and when X and Y are This includes cases where Y is directly connected to Y. For example, the present invention is not limited to the connection relationships shown in the drawings or text, but includes the connection relationships shown in the drawings or text. This also includes other things.

[0026] Here, X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.). , etc.).

[0027] An example of the case where X and Y are electrically connected is The elements that function as One or more diodes, display elements, light-emitting elements, loads, etc.) are connected between X and Y. The switch has a function of being controlled to be on and off. A switch can be in a conductive state (on) or a non-conductive state (off) to allow current to flow. The switch has the function of controlling whether or not current flows. It has the function of switching between these modes.

[0028] An example of a case where X and Y are functionally connected is a case where a functional connection between X and Y is possible. Circuits that perform the above functions (for example, logic circuits (inverters, NAND circuits, NOR circuits, etc.), signal conversion conversion circuits (DA conversion circuits, AD conversion circuits, gamma correction circuits, etc.), potential level conversion circuits ( power supply circuits (voltage boost circuits, voltage drop circuits, etc.), level shifter circuits that change the potential level of signals, etc.) , voltage sources, current sources, switching circuits, amplifier circuits (which can increase the signal amplitude or current amount, etc.) circuits, operational amplifiers, differential amplifier circuits, source follower circuits, buffer circuits, etc.), signal generation One or more devices (such as a memory circuit, a control circuit, etc.) can be connected between X and Y. For example, even if another circuit is inserted between X and Y, the signal output from X X and Y are said to be functionally connected if

[0029] In addition, when it is explicitly stated that X and Y are electrically connected, it means that X and Y are electrically connected. When X and Y are electrically connected (i.e., when another element or circuit is placed between X and Y) X and Y are functionally connected (i.e., there is no connection between X and Y) When X and Y are connected directly, the two are functionally connected via another circuit. (That is, when X and Y are connected without any other element or circuit between them) In other words, when it is explicitly stated that something is electrically connected, it should simply be "connected" to the "other" section.

[0030] For example, the source (or the first terminal, etc.) of the transistor is connected via Z1 (or The drain (or second terminal, etc.) of the transistor is electrically connected to Z 2 (or not), it may be electrically connected to Y, or the source of the transistor (or the first terminal, etc.) is directly connected to a part of Z1, and another part of Z1 is directly connected to X. The drain (or second terminal, etc.) of the transistor is directly connected to a part of Z2. and another part of Z2 is directly connected to Y, It is possible to do so.

[0031] For example, "X and Y and the source (or first terminal, etc.) and drain (or second terminal, etc.) of a transistor The terminals of the transistor (or the first terminal, etc.) are electrically connected to each other, and X, the source of the transistor (or the first terminal, etc.) 1 terminal, etc.), the drain (or second terminal, etc.) of the transistor, and Y. "The source (or the third) of the transistor is connected to the The drain (or second terminal, etc.) of the transistor is electrically connected to X. The transistor source (or first terminal, etc.) is electrically connected to Y, and the transistor source (or first terminal, etc.) is electrically connected to X. The drain (or second terminal, etc.) of the transistor, Y, is electrically connected in this order. " Alternatively, "X is the source (or first terminal, etc.) of a transistor. The transistor is electrically connected to Y via a drain (or a second terminal, etc.) and a transistor is electrically connected to X via a drain (or a second terminal, etc.). The source (or first terminal, etc.) of a resistor, the drain (or second terminal, etc.) of a transistor ), Y is provided in this connection order. By using a simple expression method and specifying the order of connections in the circuit configuration, Distinguish between the source (or first terminal, etc.) and the drain (or second terminal, etc.) of a transistor. The technical scope can be determined by the above expressions. Here, X, Y, Z1, and Z2 are the object (e.g., the device , elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.).

[0032] In addition, the circuit diagram shows independent components as if they are electrically connected to each other. Even if the components are the same, one component may have the functions of multiple components. For example, when a part of the wiring also functions as an electrode, one conductive film has the function of the wiring and The electrode functions as both components. The term "electrochemically connected" refers to a case where one conductive film has the functions of multiple components. This also falls within the scope of the above.

[0033] The arrangement of each circuit block in the block diagram in the drawings is not specified for the purpose of explanation. Although different circuit blocks are shown to realize different functions, The blocks are provided so that different functions can be realized within the same circuit block. In addition, the function of each circuit block in the drawings is not specified for the purpose of explanation. Although it is shown as one circuit block, the actual circuit block is one In some cases, the processing performed by a circuit block is provided to be performed by multiple circuit blocks.

[0034] In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. refers to the state in which two straight lines are arranged at an angle between 80° and 100°. This includes cases where the angle is between 85° and 95°.

[0035] In addition, in this specification, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. .

[0036] (Embodiment 1) The configuration of an imaging device according to one embodiment of the present invention will be described with reference to FIG. The imaging device includes a pixel section 1 including a plurality of pixels 100 (PIX100) arranged in a matrix. 05, Analog processing circuit 101 (Analog101), digital processing circuit A / D A conversion circuit 102 (ADC102), a column driver 103 (CDRV103) and a row driver 104 (RDRV104).

[0037] The pixel 100 includes a photodiode having a function as a photoelectric conversion element and at least one The analog processing circuit 101 outputs the signal from each pixel 100. Analog data processing is performed on the captured analog data. The pixel 100 outputs the image data, and the pixel 100 outputs the image data. If the calculation result differs from the specified value, a trigger signal (denoted as TRIG) is generated. The conversion circuit 102 converts the image data output from each pixel 100 into a digital signal by A / D conversion. The A / D converted digital data is sequentially converted into digital data by the column driver 103. The column driver 103 and row driver 104 are Various circuits, such as decoders and shift registers, are used.

[0038] Next, the operation of the imaging device of one embodiment of the present invention will be described with reference to FIGS.

[0039] First, the operation of the first mode will be described (see FIG. 2). In the first mode, the analog The processing circuit 101 performs an analog processing, that is, a sum of absolute difference calculation, and the pixel 100 captures an image. The difference between the first image data and the second image data is detected by the analog processing. If there is no difference between the first and second image data, that is, a trigger signal is generated. If no error occurs, analog processing continues. If there is a difference between the first image data and the second image data, that is, if a trigger signal is generated, the second image data is The mode will change to

[0040] As another operation, in the first mode, the analog processing circuit 101 performs the differential processing of the image pickup data. The current value according to the amount of light captured by the pixel 100 is compared with the reference current value. The difference between the first image data and the second image data is detected by the analog processing. If the difference between the first image data and the second image data is too small to be detected, i.e., the trigger signal is If no signal occurs, analog processing continues. If there is a difference between the first imaging data and the second imaging data, that is, if a trigger signal is generated, , transition to the second mode.

[0041] For example, the first image data is data of an image of a grove (see FIG. 3(A1)), and the second image data is If the image data is also data of an image of a grove (see FIG. 3(A2)), the difference is zero. Therefore, no trigger signal is generated. On the other hand, the first image data is the image data of the grove (Fig. 3(B1)) and the second imaging data is data of an image of a grove and a person (see FIG. 3(B2) ), the difference is not zero, so a trigger signal is generated. In response to the occurrence of the signal, the mode of the imaging device transitions from the first mode to the second mode. In the illustrated example, the first and second image data are images of the same scene. Therefore, the first imaging data is imaging data in a first state. The first imaging data may be referred to as imaging data in a second state, and the second imaging data may be referred to as imaging data in a second state.

[0042] Next, the operation of the second mode will be described (see FIG. 2). In the second mode, pixel 1 The third imaging data captured by the camera 00 is converted into digital data by A / D conversion. For example, When the third captured image data is an image of a grove and a person (see FIG. 3(C)), By converting image data into digital data and performing detailed analysis on this data, It is possible to obtain detailed information about people in the data. This can be achieved by digitally processing the image using image processing software on a computer.

[0043] Next, the operation when transitioning from the second mode to the first mode will be described (see FIG. 2). (See step 110.) This is done by setting the conditions in advance. For example, When a certain period of time has elapsed, or when a control signal is input to end digital processing, If this condition is met, a transition occurs from the second mode to the first mode.

[0044] In the imaging device according to one embodiment of the present invention having the above configuration, a huge amount of power is consumed in the first mode. No consuming digital processing and minimal analog processing to generate the trigger signal. In the second mode, the power consumption can be reduced because only the following processing needs to be performed: The cause of the generation of the trigger signal, i.e., the first imaging data and the second imaging data, is determined by digital processing. The differences from the imaging data can be confirmed in detail. (Embodiment 2)

[0045] The structure of a pixel 100 included in an imaging device of one embodiment of the present invention will be described with reference to FIG. The pixel 100 includes a transistor 111, a transistor 112, a transistor 113, a transistor A transistor 114, a transistor 115, a capacitor 121, a capacitor 122, and a photodiode 1 23. The pixel 100 also has a power supply line VPD, a power supply line VPR, a power supply line VC, A potential is supplied from VFR and the power supply line VO, and the signal lines TX, PR, FR and A control signal is supplied from the signal line SEL, and imaging data of the pixel 100 is output to the signal line OUT. In addition, a charge corresponding to the image data is stored in the charge storage node FD1. The capacitance value of 121 is the sum of the capacitance value of the capacitor 122 and the capacitance value of the gate capacitance of the transistor 114. A configuration greater than the sum is preferred.

[0046] The transistor 111 has a gate connected to a signal line TX and a source or drain connected to a photodiode. The other of the source or drain is connected to one terminal of the transistor 123. The transistor 112 has a gate electrically connected to one of the signal line The other of the source and drain is electrically connected to the power supply line VPR. The gate of the transistor 113 is connected to the signal line FR, and one of the source and drain is connected to one of the capacitors 122. The other of the source and drain is electrically connected to the power supply line VFR. The gate of the transistor 114 is connected to one electrode of the capacitor 122, and either the source or the drain is connected to the power supply line. VO, the other of the source or drain is connected to one of the source or drain of the transistor 115. The transistor 115 has a gate connected to a signal line SEL and a source or The other of the drains is electrically connected to the signal line OUT. The other of the source or drain of the transistor 111 and the source or drain of the transistor 112 The other electrode is electrically connected to one electrode of the capacitor 122 and the transistor 1 The other electrode of the capacitor 122 is electrically connected to either the source or drain of the capacitor 13. The other terminal of the photodiode 123 is electrically connected to the power supply line V It is electrically connected to the PD.

[0047] The operation of the pixel 100 will be described with reference to FIG. 4B and FIG. 5. Line VPD is at low potential, power line VPR is at high potential, power line VC is at low potential, and power line VFR is at high potential First, the operation in the second mode is shown in FIG. I will use this to explain.

[0048] Between time T1 and time T2, the signal line PR is set to "H", the signal line FR is set to "H", and the signal line TX At this time, the potential of the charge storage node FD1 is the same as the potential of the power supply line VFR (V1). The potential of the node FD2 is set to the potential of the power supply line VPR (V2). Between time T2 and time T3, the signal line PR is set to "L", the signal line FR is set to "L", and the signal line T X is set to “H.” At this time, the node FD The potential at node FD2 drops. If the voltage drop at node FD2 is ΔV2, then The potential of the capacitor 2 is V2-ΔV2. and the combined capacitance of the gate capacitance (capacitance value Cg) of the transistor 114. The potential of the charge storage node FD1 also drops. If the drop is ΔV1, then ΔV1=ΔV2·C1 / (C1+C2+Cg)=ΔV2·α. The potential of the charge storage node FD1 is V1-ΔV1. The stronger the light irradiating the charge storage node FD1, the lower the potential of the node FD2. The potential of the signal line SEL also drops. Between time T4 and time T5, the signal line SEL is set to "H". At this time, a signal corresponding to the image data is output to the signal line OUT according to the potential of the charge storage node FD1. The lower the potential of the charge storage node FD1, the lower the potential of the signal line OUT. That is, the stronger the light irradiated to the photodiode 123, the higher the potential of the signal line OUT. The same explanation as for times T1 to T5 can be applied to times T6 to T10. Cut.

[0049] Next, the operation in the first mode will be described with reference to FIG.

[0050] The period from time T01 to time T06 corresponds to a period during which the first imaging data is acquired in the first state. Between time T01 and time T02, the signal line PR is set to "H", the signal line FR is set to "H", The signal line TX is set to "H". At this time, the potential of the charge storage node FD1 is the same as the potential of the power supply line VFR ( The potential of the node FD2 is set to the potential of the power supply line VPR (V2). Between time T02 and time T03, the signal line PR is set to "L", the signal line FR is set to "H", and the signal line T X is set to “H.” At this time, the node FD The potential at node FD2 drops. If the voltage drop at node FD2 is ΔV2, then The electric potential of 2 is V2-ΔV2. Note that the stronger the light irradiated to the photodiode 123, The potential of the node FD2 drops. The potential of the charge storage node FD1 does not change. Between time T03 and time T04, the signal line PR is set to "L", the signal line FR is set to "L", and the signal line TX The interval between time T02 and time T03 and the interval between time T03 and time T04 are set to "H". The intervals are equal to T. At this time, the noise is changed according to the light irradiated to the photodiode 123. The potential of the node FD2 drops to V2-2·ΔV2. The potential of the charge storage node FD1 is Here, if the voltage drop of the charge storage node FD1 is ΔV1, then ΔV1=Δ V2·α, and the potential of the charge storage node FD1 is V1-ΔV1. The stronger the light irradiating the electrode 123, the lower the potential of the node FD2. The potential of the node FD1 also drops. The interval between time T03 and time T04 is equal to T, but the interval between time T02 and time T03 and time The voltage drops at the node FD2 from time T03 to time T04 are set to be equal. This is the essence of one aspect of the present invention. Therefore, in order to satisfy the above condition, It is preferable to appropriately adjust the interval between the arrival time T03 and the time T03 to time T04. At times T05 to T06, the signal line SEL is set to “H”. At this time, the charge storage node F A signal corresponding to the image data is output to the signal line OUT in accordance with the potential of D1. The lower the potential of the load holding node FD1, the lower the potential of the signal line OUT. The stronger the light irradiated to the photodiode 123, the lower the potential of the signal line OUT.

[0051] The period from time T11 to time T15 corresponds to a period during which second imaging data is acquired in the second state. In particular, this corresponds to a case where the difference between the first image data and the second image data is zero. Between time T11 and time T12, the signal line PR is set to “H”, the signal line FR is set to “L”, and the signal line TX At this time, the potential of the node FD2 is set to the potential (V2) of the power supply line VPR. That is, the potential rises by the voltage drop (2·ΔV2) from time T02 to time T04. On the other hand, the capacitance of the capacitance 121, the capacitance 122, and the gate capacitance of the transistor 114 The potential of the charge storage node FD1 also rises due to the coupling, but the increase (2 ΔV1) is This corresponds to twice the voltage drop from time T03 to time T04. A potential obtained by adding the voltage drop (ΔV1) from time T03 to time T04 to the potential (V1) Between time T12 and time T13, the signal line PR is set to "L" and the signal The signal line FR is set to "L" and the signal line TX is set to "H." At this time, the photodiode 123 is irradiated with In response to the incoming light, the potential of the node FD2 drops, and a transistor is formed between the capacitance 121 and the capacitance 122. The potential of the charge storage node FD1 also drops due to capacitive coupling with the gate capacitance of the transistor 114. The stronger the light irradiated to the photodiode 123, the lower the potential of the node FD2. The potential of the charge storage node FD1 also drops.

[0052] Here, the interval between time T12 and time T13 is T, and the intensity is the same as that between time T02 and time T04. Assuming that the photodiode 123 is irradiated with light of is equal to the drop ΔV2 from time T03 to time T04. The voltage drop is also equal to the voltage drop ΔV1 from time T03 to time T04. The potential of the node FD1 becomes V1. The difference between these corresponds to zero.

[0053] Between time T14 and time T15, the signal line SEL is set to "H". A signal corresponding to the image data is output to the signal line OUT according to the potential of the node FD1. The potential of the signal is the potential when the difference between the first image data and the second image data is zero. It will be ranked th.

[0054] The period from time T21 to time T25 corresponds to a period during which the second imaging data is acquired in the second state. In particular, the first imaging data and the second imaging data are This corresponds to the case where the difference is zero.

[0055] The period from time T31 to time T35 corresponds to a period during which second imaging data is acquired in the second state. In particular, in the case where the difference between the first image data and the second image data is finite (negative), Between time T31 and time T32, the signal line PR is set to "H", the signal line FR is set to "L", and the signal The line TX is set to "H". At this time, the potential of the node FD2 is set to the potential (V2) of the power supply line VPR. That is, the voltage drop (ΔV2) from time T12 to time T13 is set as On the other hand, the capacitance of the capacitance 121, the capacitance 122, and the gate capacitance of the transistor 114 increases. The potential of the charge storage node FD1 also rises due to charge coupling, but the increase (ΔV1) is This corresponds to the voltage drop from time T12 to time T13. 1) plus the voltage drop (ΔV1) from time T03 to time T04 (V1+ Between time T32 and time T33, the signal line PR is set to "L" and the signal line FR At this time, the light irradiating the photodiode 123 is In response, the potential of the node FD2 drops, and the capacitance 121, the capacitance 122, and the transistor The potential of the charge storage node FD1 also drops due to capacitive coupling with the gate capacitance of 114. The light irradiated to the photodiode 123 is different from the light irradiated from time T12 to time T13. Here, if the interval between time T32 and time T33 is T, the power of node FD2 is The pressure drop (ΔV2′) is greater than the pressure drop (ΔV2) from time T12 to time T13 (Δ V2'>ΔV2. Also, the voltage drop of the charge storage node FD1 (ΔV1'=ΔV2'·α ) is also larger than the drop (ΔV1) from time T12 to time T13 (ΔV1'>ΔV1). Therefore, the potential of the charge storage node FD1 (V1+ΔV1-ΔV1') is This is because the potential of the first image data is lower than the potential of the second image data (V1). The difference corresponds to a finite (negative) value.

[0056] Between time T34 and time T35, the signal line SEL is set to "H". A signal corresponding to the image data is output to the signal line OUT according to the potential of the node FD1. The potential of the signal is lower than the potential of the signal from time T24 to time T25. This is the potential when the difference between the first imaging data and the second imaging data is finite (negative).

[0057] The period from time T41 to time T45 corresponds to a period during which second imaging data is acquired in the second state. In particular, this corresponds to the case where the difference between the first imaging data and the second imaging data is zero again. Between time T41 and time T42, the signal line PR is set to "H", the signal line FR is set to "L", TX is set to "H". At this time, the potential of node FD2 is set to the potential (V2) of the power supply line VPR. That is, the voltage drop (ΔV2′) from time T32 to time T33 is On the other hand, the capacitance of the capacitance 121, the capacitance 122, and the gate capacitance of the transistor 114 increases. The potential of the charge storage node FD1 also rises due to charge coupling, but the increase (ΔV1') is This corresponds to the voltage drop from time T32 to time T33. In other words, the potential of the power supply line VFR ( The potential (V1 V1) is calculated by adding the voltage drop (ΔV1) from time T03 to time T04. Between time T42 and time T43, the signal line PR is set to "L" and the signal line F R is set to “L” and the signal line TX is set to “H.” At this time, the light irradiated to the photodiode 123 In response to this, the potential of the node FD2 drops, and the capacitance 121, the capacitance 122, and the transistor The potential of the charge retention node FD1 also drops due to capacitive coupling with the gate capacitance of the transistor 114. Note that the stronger the light incident on the photodiode 123, the lower the potential of the node FD2. In addition, the potential of the charge storage node FD1 also drops. The interval is T, and light having the same intensity from time T02 to time T04 is irradiated onto the photodiode 123. Assuming that the voltage drop at node FD2 is the voltage drop from time T03 to time T04, The voltage drop of the charge storage node FD1 is also equal to ΔV2 from time T03 to time T04. Therefore, the potential of the charge storage node FD1 becomes V1. This corresponds to the difference between the first imaging data and the second imaging data being zero. At time T45, the signal line SEL is set to “H”. At this time, the charge storage node FD1 In response to the potential, a signal corresponding to the image data is output to the signal line OUT. This potential is the potential when the difference between the first imaging data and the second imaging data is zero.

[0058] The period from time T51 to time T55 corresponds to a period during which second imaging data is acquired in the second state. In particular, the difference between the first image data and the second image data corresponds to a finite (positive) difference. Between time T51 and time T52, the signal line PR is set to "H", the signal line FR is set to "L", and the signal The line TX is set to "H". At this time, the potential of the node FD2 is set to the potential (V2) of the power supply line VPR. That is, the voltage drop (ΔV2) from time T42 to time T43 is set as On the other hand, the capacitance of the capacitance 121, the capacitance 122, and the gate capacitance of the transistor 114 increases. The potential of the charge storage node FD1 also rises due to charge coupling, but the increase (ΔV1) is This corresponds to the voltage drop from time T42 to time T43. 1) plus the voltage drop (ΔV1) from time T03 to time T04 (V1+ ΔV1).

[0059] Between time T52 and time T53, the signal line PR is set to "L", the signal line FR is set to "L", and the signal line TX is set to “H”. At this time, the node F The potential of D2 drops, and the capacitance 121, the capacitance 122, and the gate capacitance of the transistor 114 The potential of the charge storage node FD1 also drops due to the capacitance coupling of the photodiode. The light irradiated to node 123 is assumed to be weaker than the light irradiated from time T12 to time T13.

[0060] Here, if the interval between time T52 and time T53 is T, the voltage drop of the node FD2 (Δ V2'') is smaller than the drop (ΔV2) from time T12 to time T13 (ΔV2''< ΔV2). The voltage drop of the charge storage node FD1 (ΔV1'' = ΔV2'' α) is also It is smaller than the drop (ΔV1) from time T12 to time T13 (ΔV1″<ΔV1). Therefore, the potential of the charge storage node FD1 (V1+ΔV1-ΔV1'') is This is because the potential difference between the first and second image data is higher than the potential (V1). The difference corresponds to a finite (positive) value.

[0061] During the period from time T54 to time T55, the signal line SEL is set to "H". A signal corresponding to the image data is output to the signal line OUT according to the potential of the node FD1. The potential of the signal is higher than the potential of the signal from time T24 to time T25. This is the potential when the difference between the first imaging data and the second imaging data is finite (positive).

[0062] In this embodiment, the first imaging data is output from time T05 to time T06. However, the case where the difference data between the first image data and the second image data is obtained has been described. If it is sufficient to obtain the first image data, that is, if there is no need to output the first image data, It is possible to omit the operations from time T03 to time T06. In the case where the operation is omitted, the operation is as follows. That is, from time T11 to time T12 When the signal line PR is set to "H", the signal line FR is set to "L", and the signal line TX is set to "H", The potential of FD2 is set from the potential V2-ΔV2 at time T03 to the potential V2. The potential of the charge storage node FD1 rises from potential V1 at time T03 to potential V1+ΔV1. The operation after time T12 can be explained in the same manner as above.

[0063] Note that this embodiment mode can be implemented in appropriate combination with other embodiment modes. (Embodiment 3)

[0064] An example of the configuration of an analog processing circuit included in an imaging device according to one embodiment of the present invention will be described with reference to FIG. The analog processing circuit includes subtraction circuits SUB[1] to SUB[n], an absolute value circuit AB S[1] to ABS[n] and an adder circuit SUM.

[0065] The subtraction circuits SUB[1] to SUB[n] are connected to the signal lines OUT[1] to OUT[n] of the pixels, respectively. The potential of the signal line OUT[n] is subtracted from the reference potential VREF. A dummy circuit equivalent to element 100 is prepared, and the potential of the charge storage node FD1 is set to VFR. The subtraction circuits SUB[1] to SUB[3] are connected to the signal line OUT. Each of the arithmetic circuits SUB[n] includes an OP amplifier OP0 and resistors R01 to R04. For the subtraction circuit SUB[1], the potential of the signal line OUT[1] is V10, VREF The potential is V20. The resistance values ​​of resistors R01 to R04 are calculated based on the following equations (1) and (2 ) is set to satisfy

[0066] R01=R04 (1)

[0067] R04 / R01=R03 / R02 (2)

[0068] Then, the output of the subtraction circuit SUB[1] satisfies the following equation (3).

[0069] V0=V20-V10 (3)

[0070] The outputs of the subtraction circuits SUB[2] to SUB[n] can be explained in a similar manner. do.

[0071] The absolute value circuits ABS[1] to ABS[n] are the subtraction circuits SUB[1] to The absolute value of the output of the circuit SUB[n] is output. The path ABS[n] includes an OP amplifier OP11, an OP amplifier OP12, resistors R11 to R12, R15, diode D11, and diode D12. Here, the absolute value circuit ABS[1 ], the input signal is set to potential V10', R11 = R12, R13 × 2 = R14 = R1 If you set the resistor value to 5, the output of the absolute value circuit ABS[1] will be |V10'| do.

[0072] The outputs of the absolute value circuits ABS[2] to ABS[n] will be explained in a similar manner. can.

[0073] The adder circuit SUM outputs the sum of the outputs of the absolute value circuits ABS[1] to ABS[n]. The summing circuit SUM includes an operational amplifier OP21, an operational amplifier OP22, resistors R21 to R23, and a resistor R41. The absolute value circuits ABS[1] to ABS[2] include resistors R2n, R31 to R33. The potentials of the outputs of the absolute value circuits ABS[n] are V10'' to Vn0'', and R21 = (Omitted) If you set the resistance values ​​so that R2n = R31 and R32 = R33, the summing circuit The output of SUM is V10''+(omitted)+Vn0''. This is the trigger signal TR If IG, then TRIG=0 if the first and second imaging data are the same. On the other hand, if the first imaging data and the second imaging data are different, TRIG=1.

[0074] By adopting the above-mentioned configuration, it is possible to provide an imaging device capable of detecting a difference with low power consumption. can be done.

[0075] Note that this embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0076] (Embodiment 4) An example of the configuration of an analog processing circuit included in an imaging device according to one embodiment of the present invention will be described with reference to FIG. The analog processing circuit includes a transistor 136, a transistor 137, a transistor 138, transistor 139, transistor 140, transistor 141, transistor 142, transistor 143, transistor 144, transistor 145, transistor 146, transistor 147, transistor 148, capacitance 149, comparator CMP+ , comparator CMP-. Reference potential line Vref+, reference potential line Vref The negative potential is set appropriately.

[0077] FIG. 8 is a timing chart showing the operation of the analog processing circuit.

[0078] Between time T61 and time T62, the signal line ABU is set to "H", the signal line AOP is set to "L", Signal line ATC is set to "H". Signal line FR is set to "H" and signal line SEL[x] is set to "H". Note that the signal line SEL[x] is the signal line S in an arbitrary row (xth row; x is a natural number less than or equal to m). At this time, the signal line OUT[y] (y is a natural number equal to or smaller than n) of the yth column is supplied with The current is determined by setting the gate potential of the transistor 114 of each pixel PIX in the xth row to VFR. The current amount at the time, that is, the difference between the image data of the initial frame and the image data of the current frame, is The current amount at zero is I0[y]. This current amount I0[y] is the reference current amount (for the yth column). In addition, the current amounts I0[1] to I0[ n] is not always the same, but as will become clear in the following discussion, the current amount I0[1] to the current amount The individual values ​​of I0[n] do not directly affect the operation of the circuit. Therefore, from now on, the current amount I0 [1] to current amount I0[n] are all expressed as current amount I0.

[0079] The current Ip[1] through the current Ip[n] flowing through the transistor 136 is equal to the current amount I0. The currents Ic[1] to Ic[n] are also equal to the current I0. The current flowing through the transistor 137, whose drain and gate are connected, is also The amount of current I0 is equal to the potential at which the capacitance 149 is charged. The potential is set to a potential equivalent to the gate voltage.

[0080] Between time T63 and time T64, the signal line ABU is set to "H", the signal line AOP is set to "H", The signal line ATC is set to "L" and the signal line SEL[1] is set to "H". A current corresponding to the difference data of each pixel is supplied to the signal lines OUT[1] to OUT[n Here, if the difference data of each pixel in the first row is zero, The current supplied to the signal lines OUT[1] to OUT[n] is I0, and the transistor 13 The current Ip[1] to Ip[n] flowing through 6 is equal to I0, and the current Ic[ 1] to current Ic[n] are also equal to the current amount I0.

[0081] Between time T64 and time T65, the signal line ABU is set to "H", the signal line AOP is set to "H", The signal line ATC is set to "L" and the signal line SEL[2] is set to "H". A current corresponding to the difference data of each pixel is supplied to the signal lines OUT[1] to OUT[n ]. Here, the difference data of each pixel in the second row is finite (negative), and the y If the current supplied to the signal line OUT[y] of the yth column is (I0-ΔIy), The current Ip[y] flowing through the resistor 136 is equal to (I0-ΔIy), and the current I Since c[y] is equal to the current I0, the transistors 139 and 140 in the yth column A current ΔIy flows through

[0082] Here, in order to pass the currents ΔI1 to ΔIn through the transistors 140 in each column, Current I corresponding to the sum of - Here, the comparator CMP- and the transistor The current I - That is, the transistors in each column The sum of the currents flowing through the resistors 140 is I - If it is less (more), the comparator CMP- The potential of the + terminal falls (rises), and the output of the comparator CMP- falls (rises ) the gate voltage of transistor 142 decreases (increases) and b) Current I - It will be possible to supply

[0083] Furthermore, since the same potential as that of the gate of the transistor 142 is applied to the transistor 143, Current n1·I multiplied by W / L ratio (n1) of transistor 143 to transistor 142 - flows through the transistor 143. Also, the transistors 148 and 143 The signal TRIG becomes "H" by the buffer. A bias voltage, bias, is applied to the gate.

[0084] Between time T66 and time T67, the signal line ABU is set to "H", the signal line AOP is set to "H", Signal line ATC is set to "L" and signal line SEL[m] is set to "H". At this time, A current corresponding to the difference data of each pixel is supplied to the signal lines OUT[1] to OUT[n ]. Here, the difference data for each pixel in the mth row is , the second column is finite (positive), the nth column is finite (negative), and the other columns are zero. The signal line OU of each column The current supplied to T[1], signal line OUT[2], and signal line OUT[n] is (I0+ΔI1 ), (I0+ΔI2), and (I0-ΔIn), the current that flows through the transistor 136 is Current Ip[1], current Ip[2], and current Ip[n] are (I0+ΔI1), (I0+ΔI2 ), (I0-ΔIn), and the currents Ic[1] to Ic[n] are equal to the current amount I0 Therefore, a current flows through the transistors 139 and 140 in the first and second columns. Currents ΔI1 and ΔI2 flow through the n-th row transistors 139 and 141. A current ΔIn flows.

[0085] Here, in order to pass currents ΔI1 and ΔI2 through the transistors 140 in the first and second rows, The current I corresponding to the sum of these - = ΔI1 + ΔI2. The current I - is supplied. That is, when the current flowing through the transistor 140 of each column is less (more) than ΔI, The potential of the + terminal of the comparator CMP- decreases (increases), The output decreases (increases). That is, the gate voltage of the transistor 142 decreases (increases). , greater (less) current I - It will be possible to supply

[0086] In order to pass a current ΔIn through the n-th row transistor 141, a current I + = ΔIn Here, the comparator CMP+ and the transistor 144 act to The current I + That is, the current flowing through the transistor 141 in the n-th column is smaller than ΔIn. If the voltage is low (high), the potential of the + terminal of the comparator CMP+ will rise (fall). As a result, the output of the comparator CMP+ rises (falls). The gate voltage of increases (decreases) and a larger (smaller) current I + So that you can become.

[0087] In addition, the same potential as that of the gate of the transistor 142 is applied to the transistor 143. Current n1·I multiplied by W / L ratio (n1) of transistor 143 to transistor 142 - flows through transistor 143.

[0088] Furthermore, since the same potential as that of the gate of the transistor 144 is applied to the transistor 145, Current n2·I multiplied by W / L ratio (n2) of transistor 145 to transistor 144 + The current flowing through the transistor 145 is 6, and furthermore, the W / L ratio of transistor 147 to transistor 146 (n3 ) multiplied by n3 n2 I + The transistor 148 and the transistor 149 are connected to each other. A buffer formed by transistor 143 and transistor 147 causes the signal TRIG to It becomes “H”.

[0089] By adopting the above-mentioned configuration, it is possible to provide an imaging device capable of detecting a difference with low power consumption. can be done.

[0090] Note that this embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0091] (Embodiment 5) In this embodiment mode, a modification of the pixel described in the above embodiment mode will be described.

[0092] FIG. 9A shows a circuit diagram in which a semiconductor layer of a transistor in the circuit diagram in FIG. 4A is formed using an oxide semiconductor. In the pixel 100A shown in FIG. The semiconductor layers in the semiconductor devices 111 to 115 each include an oxide semiconductor.

[0093] In the circuit diagram, a transistor having an oxide semiconductor in a semiconductor layer (OS transistor In order to clearly show that the transistor is a The word "OS" is added.

[0094] The OS transistor has a characteristic of having an extremely low off-state current. In the circuit diagram shown in FIG. 9(A), When the intensity of light incident on the photodiode 123 is high, the potential of the charge storage node FD1 Since the OS transistor has an extremely low off-state current, Even if the gate potential is extremely small, a current corresponding to the gate potential can be accurately output. Therefore, the range of detectable illuminance, i.e. the dynamic range, can be expanded. It is possible.

[0095] In addition, since the OS transistor has an extremely low off-state current, the charge storage node FD1 Since the period during which the charge can be held is extremely long, The global shutter method can be applied without making the image complicated. For the same reason, it is possible to easily obtain an image with little distortion even if the exposure time is Since the period during which the charge is accumulated can be extended, it is possible to improve the image quality in low-light environments. Also suitable for statues.

[0096] In addition, OS transistors have smaller temperature dependence of electrical characteristic fluctuations than Si transistors. Therefore, it can be used in a very wide temperature range. The imaging device and semiconductor device having the same are suitable for mounting on automobiles, aircraft, spacecraft, etc. is.

[0097] FIG. 9B shows a modified circuit diagram of a pixel 100B which is a further modification of FIG. 9A. In the pixel 100B shown in FIG. 9B, the transistors 114 and 115 are made of silicon semiconductor. The structure is such that the body layer has

[0098] In the circuit diagram, transistors that have silicon in the semiconductor layer (also called Si transistors) In order to clearly indicate that the transistor is made of silicon, the circuit symbol for the transistor is marked with "Si " is attached.

[0099] Si transistors have superior field-effect mobility compared to OS transistors. Therefore, the amount of current flowing through the transistor that functions as an amplifying transistor For example, in FIG. 9B, the charge stored in the charge storage node FD1 can be increased. Depending on the charge, the amount of current flowing through transistors 114 and 115 can be increased.

[0100] FIG. 10 shows a circuit diagram of the photodiode 123 in the sensor 123 in FIG. 1 shows a circuit diagram of a pixel 100C designated as A.

[0101] The sensor 123A is an element that can convert a given physical quantity into the amount of current flowing through the element. Alternatively, the given physical quantity is converted to another physical quantity and then the element It is preferable that the element be capable of converting the amount of current flowing through the capacitor.

[0102] Various sensors can be used for the sensor 123A. For example, the sensor 123A and temperature sensor, light sensor, gas sensor, flame sensor, smoke sensor, humidity sensor, pressure sensor flow rate sensor, vibration sensor, sound sensor, magnetic sensor, radiation sensor, odor sensor, flower Powder sensors, acceleration sensors, tilt angle sensors, gyro sensors, direction sensors, power sensors, etc. can be used.

[0103] For example, when an optical sensor is used as the sensor 123A, the above-mentioned photodiode or , a phototransistor can be used.

[0104] In addition, when a gas sensor is used as the sensor 123A, a metal oxide semiconductor such as tin oxide is used. A semiconductor gas sensor that detects changes in resistance caused by gas adsorption onto a conductor, a catalytic combustion type A gas sensor, a solid electrolyte gas sensor, or the like can be used.

[0105] FIG. 15A shows the photodiode 123 in the circuit diagram of FIG. The sensor 123A in the circuit diagram of FIG. 10 is a selenium-based semiconductor element S S e 1 shows a circuit diagram of a pixel PIX_SE.

[0106] Selenium-based semiconductor element S Se In terms of photons, applying a voltage produces multiple electrons from a single incident photon. A photoelectric conversion element that utilizes the phenomenon of avalanche multiplication to extract electrons. Therefore, the selenium-based semiconductor element S Se In the pixel PIX_SE having This increases the amplification rate of electrons relative to the amount of light received, resulting in a highly sensitive sensor.

[0107] Selenium-based semiconductor element S Se As the semiconductor, amorphous selenium-based semiconductors or crystalline The selenium-based semiconductor having the crystallinity can be, for example, The amorphous selenium-based semiconductor may be formed and then heat-treated. By making the grain size of the crystalline selenium-based semiconductor smaller than the pixel pitch, This is preferable because it reduces the variation in characteristics and results in uniform image quality.

[0108] Among selenium-based semiconductors, crystalline selenium-based semiconductors have a light absorption coefficient that is broadened over a wide wavelength range. Therefore, in addition to visible light and ultraviolet light, it can also detect X-rays and It can be used as an imaging element for a wide range of wavelengths, including X-rays and gamma rays. It is used as a so-called direct conversion element that can directly convert light of a short wavelength band such as a line into an electric charge. It is possible.

[0109] FIG. 15B is a schematic diagram of a cross-sectional structure corresponding to a part of the circuit configuration shown in FIG. In FIG. 15B, a transistor 111 and an electrode E Pix , Selenium-based semiconductor element S Se , electrode E VPD , and the substrate Sub.

[0110] Electrode E VPD , and from the side where the substrate Sub is provided, the selenium-based semiconductor S Se Shining a light on Therefore, the electrode E VPD It is preferable that the substrate Sub is transparent. Extreme E VPD As an example, indium tin oxide (ITO) ) is used, and a glass substrate can be used as the substrate Sub.

[0111] Selenium-based semiconductor element S Se , and selenium-based semiconductor element S Se Electrode E is laminated on VP D The shape can be used without processing the shape for each pixel. This reduces the manufacturing cost and improves the manufacturing yield. can be done.

[0112] An example of the selenium-based semiconductor is a chalcopyrite-based semiconductor. A specific example is CuIn 1-x Ga x Se 2 (0≦x≦1) (abbreviated as CIGS) CIGS can be formed by using deposition method, sputtering method, etc. Cut.

[0113] Selenium-based semiconductors, which are chalcopyrite-based semiconductors, can generate a voltage of several volts (5 to 20 V). By applying a voltage to a selenium-based semiconductor, avalanche multiplication can be achieved. This can improve the linearity of the movement of signal charges caused by irradiation. By making the semiconductor film thin, at 1 μm or less, the applied voltage can be reduced.

[0114] When the thickness of the selenium-based semiconductor is small, a dark current flows when a voltage is applied. A layer (hole injection barrier) to prevent dark current from flowing in CIGS, a copyrite semiconductor. By providing a hole injection barrier layer, the flow of dark current can be suppressed. A gallium oxide semiconductor can be used as an example. The thickness of the barrier layer is preferably smaller than the thickness of the selenium-based semiconductor.

[0115] FIG. 15(C) is a schematic diagram of a cross-sectional structure different from that of FIG. 15(B). , a transistor 111, an electrode E connected to the transistor 111 Pix , selenium-based semiconductors Body S Se , electrode E VPD, and the substrate Sub, a hole injection barrier layer E OS The figure shows .

[0116] As described above, the selenium-based semiconductor S Se By using This reduces the manufacturing yield, improves the manufacturing yield, and reduces the characteristic variation for each pixel, resulting in a high-sensitivity sensor. This can be used as a censorship.

[0117] Note that this embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0118] (Embodiment 6) In this embodiment, the cross-sectional structure of an element constituting an imaging device will be described with reference to the drawings. In this embodiment, as an example, the S The cross-sectional structure of a pixel formed using an i-transistor and an OS transistor will be described. .

[0119] FIG. 11 is a cross-sectional view of an element constituting an imaging device. The imaging device shown in FIG. A Si transistor 51 is provided on the substrate 40, and a semiconductor device is provided on the Si transistor 51. The OS transistor 52 and the OS transistor 53 are provided on the silicon substrate 40. Each of the transistors and the photodiode 60 includes a It has electrical connections with various contact plugs 70 and wiring layers 71. The anode 61 of the diode 60 is electrically connected to the contact plug 70 via the low resistance region 63. have a good connection.

[0120] The imaging device further includes a Si transistor 51 and a photodiode 52 provided on a silicon substrate 40. A layer 1100 having an electrode 60, and a layer 71 having a wiring layer provided in contact with the layer 1100. 1200, and OS transistor 52 and OS transistor A layer 1300 having a contact 53, a wiring layer 72 and a wiring layer 7 14. The device further includes a layer 1400 having a thickness of 3.

[0121] In the example of the cross-sectional view of FIG. 11, a Si transistor 51 is formed on a silicon substrate 40. The light receiving surface of the photodiode 60 is disposed on the opposite side of the surface on which the light receiving surface is formed. This makes it possible to ensure an optical path without being affected by various transistors and wiring. Therefore, a pixel with a high aperture ratio can be formed. The light surface may be the same as the surface on which the Si transistor 51 is formed.

[0122] Note that the pixel is formed using an OS transistor as described with reference to FIG. In this case, the layer 1100 may be a layer including an OS transistor. The pixel may be formed only with an OS transistor by omitting the transistor 1100.

[0123] The silicon substrate 40 is not limited to a bulk silicon substrate, but may be an SOI substrate. In addition, instead of the silicon substrate 40, germanium, silicon germanium, silicon carbide, etc. , gallium arsenide, aluminum gallium arsenide, indium phosphide, gallium nitride, organic semiconductors Body-based substrates may also be used.

[0124] Here, although the positions are not limited, a Si transistor 51 and a photodiode 60 are included. and layer 130 having OS transistor 52 and OS transistor 53. An insulating layer 80 is provided between the first and second electrodes.

[0125] The hydrogen in the insulating layer provided near the active region of the Si transistor 51 becomes a dangling of silicon. This has the effect of terminating the ring bonds and improving the reliability of the Si transistor 51. The oxide layer is an active layer of the OS transistor 52 and the OS transistor 53. Hydrogen in the insulating layer provided near the oxide semiconductor layer generates carriers in the oxide semiconductor. This is one of the factors that affect the reliability of OS transistor 52 and OS transistor 53. Therefore, transistors using silicon-based semiconductor materials When a transistor using an oxide semiconductor is stacked over a transistor, It is preferable to provide an insulating layer 80 having a function of preventing diffusion of elements. In addition to improving the reliability of the Si transistor 51 by confining hydrogen in the lower layer, Hydrogen diffusion from the lower layer to the upper layer is suppressed, so that the OS transistor 52 and the OS At the same time, the reliability of the transistor 53 and the like can be improved.

[0126] The insulating layer 80 may be, for example, aluminum oxide, aluminum oxynitride, gallium oxide, Gallium oxide nitride, yttrium oxide, yttrium oxide nitride, hafnium oxide, oxynitride Hafnium oxide, yttria stabilized zirconia (YSZ), etc. can be used.

[0127] In the cross-sectional view of FIG. 11, the photodiode 60 provided in the layer 1100 and the layer 130 The transistors in the first and second regions can be formed so as to overlap with each other. In other words, the resolution of the imaging device can be increased.

[0128] Note that this embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0129] (Embodiment 7) In this embodiment, a cross-sectional structure of an example of an imaging device with a color filter or the like added thereto will be described. The following description will be given with reference to the drawings.

[0130] FIG. 12A is a cross-sectional view of an example of an embodiment in which a color filter or the like is added to the imaging device shown in FIG. 1 shows an area occupied by circuits for three pixels (circuit 91a, circuit 91b, and circuit 91c). An insulating layer 1500 is formed on the photodiode 60 formed on the layer 1100. The insulating layer 1500 can be made of a silicon oxide film or the like that has a high translucency to visible light. Also, a silicon nitride film may be laminated as a passivation film. In addition, the anti-reflection film may be a laminate of a dielectric film such as hafnium oxide.

[0131] A light-shielding layer 1510 is formed on the insulating layer 1500. The light-shielding layer 1510 is formed by The light blocking layer 1510 has a function of preventing the mixing of colors of the light passing through the filter. A metal layer such as tungsten or a dielectric film that functions as an anti-reflective film is laminated on the metal layer. The structure may be layered.

[0132] An organic resin layer 1520 is formed as a planarizing film on the insulating layer 1500 and the light-shielding layer 1510. The color filters 153 are disposed on the circuits 91a, 91b, and 91c. 0a, color filter 1530b and color filter 1530c are formed in pairs. The color filter 1530a, the color filter 1530b, and the color filter 1530c are The 530c can be assigned colors such as R (red), G (green), and B (blue) , a color image can be obtained.

[0133] Color filter 1530a, color filter 1530b, and color filter 1530c A microlens array 1540 is installed on top, and the light passing through one lens is reflected directly below The light passes through the filter and is then incident on the photodiode.

[0134] A support substrate 1600 is provided in contact with the layer 1400. The support substrate 1600 may be made of: Semiconductor substrates such as silicon substrates, glass substrates, metal substrates, ceramic substrates and other hard substrates In addition, an inorganic material serving as an adhesive layer may be provided between the layer 1400 and the support substrate 1600. An organic insulating layer or an organic resin layer may be formed.

[0135] In the configuration of the imaging device, the color filters 1530a, 1530b, and An optical conversion layer 1550 may be used instead of the color filter 1530c (see FIG. 12( By using the optical conversion layer 1550, images in various wavelength regions can be obtained. It is possible to provide an imaging device that can

[0136] For example, if a filter that blocks light with wavelengths shorter than visible light is used for the optical conversion layer 1550, infrared In addition, the optical conversion layer 1550 can be provided with light having a wavelength equal to or shorter than the near infrared ray. If a filter that blocks infrared rays is used, a far-infrared imaging device can be obtained. If a filter that blocks light with wavelengths longer than visible light is used, it can be used as an ultraviolet imaging device. Cut.

[0137] In addition, if a scintillator is used for the optical conversion layer 1550, radiation such as medical X-ray imaging devices can be used. It is possible to make an imaging device that can obtain an image that visualizes the strength of lines. When radiation strikes a scintillator, it emits a large amount of light due to a phenomenon called photoluminescence. The light is converted into visible light, ultraviolet light, or other light (fluorescence). The light is then input to a photodiode 6. Image data is acquired by detecting 0.

[0138] When exposed to radiation such as X-rays or gamma rays, the scintillator absorbs the energy and The material is made of a substance that emits visible or ultraviolet light or a material that contains such a substance. For example, Gd 2 O 2 S: Tb, Gd 2 O 2 S: Pr, Gd 2 O 2 S:Eu, BaFCl:Eu, NaI, C sI, CaF 2 , BaF 2 , CeF 3 , LiF, LiI, ZnO, and other materials. It is known to be dispersed in resins or ceramics.

[0139] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0140] (Embodiment 8) In this embodiment, the OS transistor described in the above embodiment will be described.

[0141] The OS transistor reduces the impurity concentration in an oxide semiconductor and converts the oxide semiconductor into an intrinsic or By making the transistor substantially intrinsic, the off-state current can be reduced. , the carrier density in the oxide semiconductor is 1×10 17 / cm3 preferably less than 1×10 15 / cm 3 More preferably, it is less than 1×10 13 / cm 3 Less than In oxide semiconductors, hydrogen, nitrogen, carbon, silicon, and other components other than the main components For example, hydrogen and nitrogen contribute to the formation of donor levels and This increases rear density.

[0142] A transistor using an intrinsic or substantially intrinsic oxide semiconductor has a low carrier density. Therefore, the threshold voltage rarely becomes negative. The transistor using this oxide semiconductor has good electrical characteristics because there are few carrier traps in the oxide semiconductor. In addition, a transistor using the oxide semiconductor can be obtained that has small fluctuations and is highly reliable. The transistor can have a very low off-state current.

[0143] In addition, an OS transistor with a low off-state current has a channel width of 1 μ Normalized off-state current per m is 1×10 -18 A or less, preferably 1×10 -21 A More preferably, 1×10 -24 A or less, or 1 x 10 at 85°C -15 A or below, good Preferably 1×10 -18 A or less, more preferably 1×10 -21 A can be less than or equal to do.

[0144] In the case of an n-channel transistor, the off-state current is the current that flows when the transistor is in a non-conducting state. The current that flows between the source and drain of an n-channel transistor is For example, if the voltage applied between the gate and the source is about 0V to 2V, the voltage is negative. In this case, the current flowing between the source and drain can be called the off-current.

[0145] The oxide semiconductor used for the semiconductor layer of the OS transistor is at least indium It is preferable that the compound contains In (In) or zinc (Zn). It is particularly preferable that the compound contains In and Zn. In addition, it is preferable to have a stabilizer that strongly binds oxygen. The stabilizers are gallium (Ga), tin (Sn), and zirconium (Zr). , hafnium (Hf), or aluminum (Al).

[0146] Other stabilizers include the lanthanides lanthanum (La) and cerium ( Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), hol Ho, Erbium, Thulium, Ytterbium, Ru The element may contain one or more of tetraethynyl ions (Te).

[0147] Examples of oxide semiconductors used for the semiconductor layer of a transistor include indium oxide and Tin, zinc oxide, In-Zn oxide, Sn-Zn oxide, Al-Zn oxide, Zn -Mg oxide, Sn-Mg oxide, In-Mg oxide, In-Ga oxide, In -Ga-Zn oxide (also written as IGZO), In-Al-Zn oxide, In-S n-Zn oxide, Sn-Ga-Zn oxide, Al-Ga-Zn oxide, Sn-Al -Zn oxide, In-Hf-Zn oxide, In-Zr-Zn oxide, In-Ti- Zn-based oxide, In-Sc-Zn-based oxide, In-Y-Zn-based oxide, In-La-Zn In-Ce-Zn oxide, In-Pr-Zn oxide, In-Nd-Zn oxide Oxide, In-Sm-Zn oxide, In-Eu-Zn oxide, In-Gd-Zn oxide oxides, In-Tb-Zn oxides, In-Dy-Zn oxides, In-Ho-Zn oxides In-Er-Zn oxides, In-Tm-Zn oxides, In-Yb-Zn oxides , In-Lu-Zn ​​oxide, In-Sn-Ga-Zn oxide, In-Hf-Ga-Z n-based oxides, In-Al-Ga-Zn-based oxides, In-Sn-Al-Zn-based oxides, In -Sn-Hf-Zn oxide, In-Hf-Al-Zn oxide, etc.

[0148] For example, In:Ga:Zn=1:1:1, In:Ga:Zn=3:1:2, or In In-Ga-Zn oxides with an atomic ratio of Ga:Zn=2:1:3 and oxides with similar compositions It is a good idea to use compounds.

[0149] When a large amount of hydrogen is contained in the oxide semiconductor film constituting the semiconductor layer, hydrogen is bonded to the oxide semiconductor. By this, some of the hydrogen atoms become donors, generating electrons that act as carriers. As a result, the threshold voltage of the transistor is shifted in the negative direction. After the conductive film is formed, a dehydration treatment (dehydrogenation treatment) is performed to remove hydrogen from the oxide semiconductor film. Alternatively, it is preferable to highly purify the mixture by removing moisture so that impurities are contained as little as possible.

[0150] Note that the oxide semiconductor film is dehydrated (dehydrogenated) to Therefore, the oxide semiconductor film is preferably subjected to a dehydration treatment (dehydrogenation treatment). The oxygen that has been reduced by the oxidation process is added to the oxide semiconductor, or oxygen is supplied to the oxide semiconductor. It is preferable to compensate for oxygen deficiencies in the conductor film.

[0151] In this manner, hydrogen or moisture is removed from the oxide semiconductor film by the dehydration treatment (dehydrogenation treatment). By adding oxygen to the material, the oxygen deficiency is compensated for, resulting in an i-type (intrinsic) or i-type In this case, the oxide semiconductor film can be an oxide semiconductor film that is substantially i-type (intrinsic). The term "substantially intrinsic" means that the oxide semiconductor film contains very few carriers derived from donors (zero (close to B), and the carrier density is 1×10 17 / cm 3 Below, 1×10 16 / cm 3 Below, 1 ×10 15 / cm 3 Below, 1×10 14 / cm 3 Below, 1×10 13 / cm 3 Is less than or equal to This means.

[0152] As described above, a transistor including an i-type or substantially i-type oxide semiconductor film is extremely This allows for excellent off-state current characteristics.

[0153] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0154] (Embodiment 9) In this embodiment, the imaging device described in the above embodiment is used as a monitoring device (also called a monitoring system). This section explains how to use it for the following purposes.

[0155] FIG. 13 is a block diagram showing a configuration example of a monitoring device according to the present embodiment. The camera 200 includes a memory device 211, a display device 212, and an alarm device 213. The camera 200 includes an image capture device 220. Images captured by the camera 200 are stored in a storage device 211. The recorded image is displayed on the display device 212. The alarm device 213 also detects whether the camera 200 is moving. If a problem is detected, an alert will be issued to the administrator.

[0156] The imaging device 220 generates a trigger signal when the camera 200 detects the difference data. If no trigger signal occurs, analog processing continues, otherwise digital processing continues. This eliminates the need for continuous digital processing, which consumes huge amounts of power. Therefore, power consumption can be reduced.

[0157] For example, the first state is a state where there is definitely no intruder in the monitored area, and the second state is the current state. Here, when the imaging device 220 operates in the first mode and there is no intruder, Since the first imaging data and the second imaging data are identical, the difference data is zero. Therefore, the differential absolute value sum operation is performed on the differential data read from each pixel by the analog processing circuit. The result of the calculation is zero, and no trigger signal is generated. On the other hand, if an intruder is present, the first Since the imaging data and the second imaging data are different, the difference data is finite. The analog processing circuit performs a sum of absolute difference calculation on the difference data read from each pixel. The result is finite, and a trigger signal is generated. When the trigger signal is generated, the image capturing device 220 performs the first The second mode is switched to, and the third imaging data is converted into digital data by a digital processing circuit. Detailed analysis of the captured images is carried out using digital processing on a PC or other device. It is possible to obtain detailed information about the intruder.

[0158] Therefore, during periods when no motion is detected in the image, the image capture device 220 does not perform digital processing. As a result, it is possible to reduce power consumption in the camera 200. The storage capacity of the storage device 211 can be saved for image data during periods when no movement is detected. This allows for longer recording times.

[0159] The alarm device 213 may issue an alarm to those in the vicinity when a trigger signal is generated. Alternatively, a determination may be made based on a comparison in an authentication system to determine whether or not to issue an alarm. .

[0160] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0161] (Embodiment 10) In this embodiment, an example of an electronic device using an imaging device according to one embodiment of the present invention will be described. do.

[0162] Examples of electronic devices using an imaging device according to one embodiment of the present invention include display devices such as televisions and monitors, Lighting equipment, desktop or notebook personal computers, word processors The digital content is stored on a recording medium such as a DVD (Digital Versatile Disc). Image reproducing devices that reproduce still or moving images, portable CD players, radios, tape recorders, etc. Coders, headphone stereos, stereos, navigation systems, table clocks, wall-mounted clocks meters, cordless telephone handsets, transceivers, mobile phones, car phones, portable game consoles, tabs Laptop terminals, large game machines such as pachinko machines, calculators, personal digital assistants, electronic organizers, electronic books Registration terminals, electronic translators, voice input devices, video cameras, digital still cameras, electric shakers microwave ovens and other high-frequency heating devices, electric rice cookers, electric washing machines, vacuum cleaners, water heaters, fans Fans, hair dryers, air conditioners, humidifiers, dehumidifiers and other air conditioning equipment, dishwashers , dish dryers, clothes dryers, futon dryers, electric refrigerators, electric freezers, electric refrigerator-freezers, D Freezers for storing NA, flashlights, tools such as chainsaws, smoke detectors, medical equipment such as dialysis machines , fax machines, printers, printer-combined machines, automated teller machines (ATMs), In addition, emergency lights, traffic lights, conveyor belts, elevators, escalators, etc. For calators, industrial robots, power storage systems, power leveling and smart grids In addition, fuel-powered engines and non-aqueous secondary batteries are also examples of Mobile devices propelled by electric motors using power from the Internet are also included in the category of electronic devices. The above-mentioned moving body may be, for example, an electric vehicle (EV), which has both an internal combustion engine and an electric motor. Hybrid electric vehicles (HEV), plug-in hybrid electric vehicles (PHEV), and their tires Tracked vehicles with wheels replaced with tracks, motorized bicycles including electrically assisted bicycles, and motorcycles Cars, electric wheelchairs, golf carts, small or large boats, submarines, helicopters, aircraft, Examples include rockets, artificial satellites, space probes, planetary rovers, and spaceships.

[0163] FIG. 14A shows a video camera, which includes a housing 941, a housing 942, a display unit 943, and operation keys. The operation keys 944 and the lens 945 include a connector 946. The display unit 943 is provided in a housing 942. The body 941 and the housing 942 are connected by a connection portion 946. The angle between the two can be changed by the connector 946. The switching is performed according to the angle between the housing 941 and the housing 942 at the connection portion 946. The imaging device according to one embodiment of the present invention may be provided at the focal position of the lens 945. can.

[0164] FIG. 14B shows a mobile phone. A housing 951 includes a display unit 952, a microphone 957, and a speaker. The device includes a display 954, a camera 959, an input / output terminal 956, and an operation button 955. The imaging device of one embodiment of the present invention can be used for 959.

[0165] FIG. 14C shows a digital camera, which includes a housing 921, a shutter button 922, and a microphone 9 23, a light emitting unit 927, a lens 925, etc. The imaging device according to the present invention may include an imaging device according to the present invention.

[0166] FIG. 14D shows a portable game machine, which includes a housing 901, a housing 902, a display unit 903, and a display unit 904. 904, microphone 905, speaker 906, operation keys 907, stylus 908, camera 909, etc. The portable game machine shown in FIG. 14A has two display units 903, and a display unit 904, the number of display units that the portable game machine has is not limited to this. The imaging device of one embodiment of the present invention can be used as the camera 909.

[0167] FIG. 14E shows a wristwatch-type information terminal, which includes a housing 931, a display unit 932, and a wristband 9 The display unit 932 may be a touch panel. The imaging device according to one embodiment of the present invention can be used for the laser 939.

[0168] FIG. 14F shows a portable data terminal, which includes a housing 911, a display unit 912, a camera 919, etc. The display portion 912 has a touch panel function through which data can be input and output. The imaging device of one embodiment of the present invention can be used as the camera 919 .

[0169] Note that the electronic device is not limited to the above-described electronic devices as long as it includes the imaging device according to one embodiment of the present invention. Needless to say, this is not possible.

[0170] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is. [Explanation of symbols]

[0171] 40 Silicon Substrate 51 Silicon transistor 52 OS transistor 53 OS Transistor 60 Photodiode 61 Anode 63 Low resistance region 70 Contact plug 71 Wiring layer 72 wiring layer 73 Wiring layer 80 Insulating layer 91a Circuit 91b circuit 91c Circuit 100 pixels 100A pixels 100B pixels 100C pixels 101 Analog Processing Circuit 102 A / D conversion circuit 103 Column Driver 104 Line Driver 105 Pixel section 111 Transistor 112 Transistor 113 Transistor 114 Transistor 115 Transistor 121 capacity 122 capacity 123 Photodiode 123A Sensor 136 Transistor 137 Transistor 138 Transistor 139 Transistor 140 Transistor 141 Transistor 142 Transistor 143 Transistor 144 Transistor 145 Transistor 146 Transistor 147 Transistor 148 Transistors 149 capacity FD1 Charge storage node FD2 Node SUB Subtraction circuit ABS Absolute value circuit SUM Addition circuit 200 Cameras 211 Storage device 212 Display device 213 Alarm device 220 Imaging device 901 Case 902 Case 903 Display section 904 Display section 905 Mike 906 Speaker 907 Operation Key 908 Stylus 909 Camera 911 Case 912 Display section 919 Camera 921 Case 922 Shutter button 923 Mike 925 Lens 927 Light emitting part 931 Case 932 Display section 933 Wristband 939 Camera 941 Case 942 Case 943 Display section 944 Operation Key 945 Lens 946 Connection 951 Case 952 Display section 954 Speaker 955 Button 956 Input / output terminal 957 Mike 959 Camera 1100 layers 1200 layers 1300 layers 1400 layers 1500 Insulation layer 1510 Light blocking layer 1520 Organic resin layer 1530a Color Filter 1530b Color Filter 1530c Color Filter 1540 Microlens Array 1550 Optical conversion layer 1600 Support Board

Claims

1. a pixel that acquires first image data, which is analog data, acquires second image data, which is analog data, after acquiring the first image data, and performs a calculation using the first image data and the second image data; a first circuit for generating a trigger signal in response to a result of the calculation; a second circuit for converting third image data, which is analog data acquired at the pixel, into digital data after the trigger signal is generated; The third image data is not converted into digital data before the generation of the trigger signal, The pixel includes a transistor. The image sensor includes a transistor having an oxide semiconductor in a channel formation region.

2. a pixel that acquires first image data, which is analog data, acquires second image data, which is analog data, after acquiring the first image data, and performs a calculation using the first image data and the second image data; a first circuit for generating a trigger signal in response to a result of the calculation; a second circuit for converting third image data, which is analog data acquired at the pixel, into digital data after the trigger signal is generated; The third image data is not converted into digital data before the generation of the trigger signal, The pixel includes a transistor. the transistor has an oxide semiconductor in a channel formation region, The image sensor, wherein the oxide semiconductor is indium oxide.

3. In claim 1 or 2, The result of the calculation is a difference value between the first image data and the second image data.

4. A portable information terminal comprising the image sensor according to any one of claims 1 to 3.

5. 4. A surveillance system comprising the image sensor according to claim 1, wherein a verification is performed in an authentication system when the trigger signal is generated.

Images