Film formation method and semiconductor manufacturing apparatus

Abstract

To suppress an increase in the wiring resistance of a wiring material embedded inside a pattern.SOLUTION: When metal wiring is formed on a silicon-based wafer W, a Zr film 27 is formed inside a pattern 26 opened in an insulating film 25 of the wafer W, the formed Zr film 27 is etched to adjust the thickness of the Zr film 27, and a Ti film 28 is formed on the Zr film 27 using TiCl4 gas, and the same TiCl4 gas is used in etching the Zr film 27.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present disclosure relates to a film forming method and a semiconductor manufacturing apparatus. [Background technology]

[0002] For example, in logic ICs as semiconductor devices, titanium (Ti) is used as a contact material for the source and drain. Titanium is deposited on the inner walls and bottom surfaces of trenches and contact holes, which are patterns formed in an insulating film (see, for example, Patent Document 1). After that, a low-resistance metal, such as ruthenium (Ru), is embedded in the pattern as a wiring material. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2012-204522 A Summary of the Invention [Problem to be solved by the invention]

[0004] The technique according to the present disclosure suppresses an increase in wiring resistance of a wiring material embedded inside a pattern. [Means for solving the problem]

[0005] One aspect of the technology disclosed herein is a film formation method for forming a metal film inside a pattern opened in an insulating film of a silicon-based substrate to be processed when forming metal wiring on the substrate, while forming a contact portion made of metal silicide at a bottom of the pattern, the method comprising: a first film formation step for forming a first metal film inside the pattern; a film thickness adjustment step for adjusting a film thickness of the first metal film formed; and a second film formation step for forming a second metal film on the first metal film using a source gas, and in the film thickness adjustment step, the first metal film formed is etched using the source gas. Effect of the Invention

[0006] According to the technique of the present disclosure, it is possible to suppress an increase in the wiring resistance of the wiring material embedded inside the pattern. [Brief description of the drawings]

[0007] [Figure 1] 1 is a plan view for explaining a configuration of a semiconductor manufacturing apparatus according to an embodiment of the technology disclosed herein; [Diagram 2] 2 is an enlarged partial cross-sectional view of the vicinity of a pattern on a wafer in which wiring material is embedded after various processes are performed in the semiconductor manufacturing apparatus of FIG. 1. [Diagram 3] 2 is a flowchart for explaining a film forming method according to the present embodiment. [Figure 4] 1A to 1C are process diagrams illustrating a film forming method according to an embodiment of the present invention. [Diagram 5] 10 is a flowchart for explaining a modified example of the film forming method according to the present embodiment. [Figure 6] 10A to 10C are process diagrams illustrating a modified example of the film forming method according to the present embodiment. [Figure 7] FIG. 13 is a plan view for explaining a configuration of a modified example of the semiconductor manufacturing apparatus according to the present embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] In recent years, zirconium (Zr) has been considered a promising contact material, and when Zr is used, it is laminated with Ti on the inner walls and bottom surface of the pattern. However, if the Zr film becomes thick inside the pattern, the volume of the wiring material inside the pattern will decrease, which may lead to an increase in wiring resistance.

[0009] In contrast, in the technique according to the present disclosure, after the Zr film is formed inside the pattern, the Zr film is etched to adjust the thickness of the Zr film.

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the technology according to the present disclosure will now be described with reference to the accompanying drawings, in which: Fig. 1 is a plan view illustrating the configuration of a semiconductor manufacturing apparatus according to the present embodiment.

[0011] 1, a semiconductor manufacturing apparatus 10 has a COR chamber 11 for performing a COR (Chemical Oxide Removal) process and a PHT chamber 12 for performing a PHT (Post Heat Treatment) process. The semiconductor manufacturing apparatus 10 also has a Zr film formation chamber 13 (first film formation unit) for performing a zirconium (Zr) film formation process and a Ti film formation chamber 14 (second film formation unit) for performing a titanium (Ti) film formation process.

[0012] The COR chamber 11 and the PHT chamber 12 are connected to a first transfer module 16, and the Zr deposition chamber 13 and the Ti deposition chamber 14 are connected to a second transfer module 17. The first transfer module 16 is connected to a loader module 19 via a load lock module 18. The arrangement of each module is not limited to this, and the COR chamber 11 and the PHT chamber 12 may be connected to the second transfer module 17, or the Zr deposition chamber 13 and the Ti deposition chamber 14 may be connected to the first transfer module 16.

[0013] The loader module 19 is provided with a plurality of load ports 20, and a container for accommodating a plurality of wafers, such as a FOUP (not shown), is attached to each load port 20. In addition, the first transfer module 16 and the second transfer module 17 are connected via a wafer transfer unit 21.

[0014] In the semiconductor manufacturing equipment 10, the loader module 19, the first transfer module 16, and the second transfer module 17 each have a built-in transfer robot (not shown). Each transfer robot transfers wafers between the COR chamber 11, the PHT chamber 12, the Zr film formation chamber 13, the Ti film formation chamber 14, and each load port 20.

[0015] The loader module 19 is an atmospheric transfer system or a nitrogen transfer system, and its interior is maintained at atmospheric pressure. The first transfer module 16 and the second transfer module 17 are vacuum transfer systems, and their interiors are depressurized to an almost vacuum. The load lock module 18 is configured so that its interior can be switched between atmospheric pressure and an almost vacuum. When a wafer is transferred between the first transfer module 16 and the loader module 19, the load lock module 18 switches its internal pressure, thereby realizing the transfer of the wafer without changing the internal pressure of the first transfer module 16 or the loader module 19.

[0016] The COR chamber 11, the PHT chamber 12, and the wafer transfer unit 21 are connected to a first transfer module 16 via a gate valve 22. The Zr deposition chamber 13, the Ti deposition chamber 14, and the wafer transfer unit 21 are connected to a second transfer module 17 via a gate valve 23.

[0017] In the semiconductor manufacturing equipment 10, a silicon-based wafer transferred from a load port 20 is first transferred to a COR chamber 11 and a PHT chamber 12 in order, where a natural oxide film formed on the surface of silicon (Si) or silicon germanium (SiGe), which is a constituent material of the wafer, is removed by the COR process and the PHT process. Next, the wafer is transferred to a Zr film forming chamber 13, where a Zr film is formed inside a pattern opened in an insulating film, such as a trench or a contact hole (including a via hole), by a Zr film forming process. After that, the wafer is transferred to a Ti film forming chamber 14, where a Ti film is formed on the Zr film inside the pattern by a Ti film forming process. Then, after the surface of the Ti film is nitrided by a nitriding process, the wafer is accommodated in a FOUP of each load port 20 via a second transfer module 17, a first transfer module 16, and a loader module 19. Thereafter, the wafer is subjected to a metal film forming process in another film forming apparatus, and a wiring metal, for example, ruthenium (Ru), molybdenum (Mo) or tungsten (W) is embedded inside the pattern. The metal film forming process may be performed without nitriding the surface of the Ti film, or a chamber for performing the nitriding process may be prepared separately and the nitriding process may be accelerated in the chamber. Also, a chamber for performing the metal film forming process may be installed in the semiconductor manufacturing apparatus 10.

[0018] Fig. 2 is an enlarged partial cross-sectional view of the vicinity of a pattern in a wafer in which wiring material is embedded after various processes are performed in the semiconductor manufacturing apparatus 10 of Fig. 1. In Fig. 2, the wafer W (substrate to be processed) has a base 24 made of Si or SiGe, and an insulating film 25 made of, for example, silicon nitride (SiN) is formed on the base 24. A contact hole or trench is opened as a pattern 26 in the insulating film 25, and the base 24 is exposed at the bottom of the pattern 26.

[0019] The bottom and sidewalls of the pattern 26 and the upper surface of the insulating film 25 are covered with a Zr film 27 (first metal film), and the surface of the Zr film 27 is covered with a Ti film 28 (second metal film). The inside of the pattern 26 is filled with the wiring metal 30. At this time, the surface of the Ti film 28 may be transformed into titanium nitride (TiN) by nitriding to form a barrier layer. The barrier layer suppresses the penetration and diffusion of metal molecules of the wiring metal 30 into the insulating film 25. A part of the Zr film 27 may also be transformed into zirconium nitride (ZrN) to form a thin barrier layer (not shown), and this barrier layer also suppresses the penetration and diffusion of metal molecules into the insulating film 25.

[0020] Furthermore, the Zr film 27 and the Ti film 28 are in contact with the base 24 at the bottom of the pattern 26 and are silicided to become zirconium silicide (ZrSi) 27a and titanium silicide (TiSi) 28a, which are metal silicides. The ZrSi 27a and the TiSi 28a function as contact portions between the base 24 and the wiring metal 30.

[0021] FIG. 3 is a flow chart for explaining the film forming method according to the present embodiment, and FIG. 4 is a process chart for explaining the film forming method according to the present embodiment.

[0022] In a metal wiring formation process as a film formation method according to the present embodiment, in semiconductor manufacturing equipment 10, first, wafer W is transferred from a FOUP attached to load port 20 to COR chamber 11. At this time, an insulating film 25 is formed on a base 24 of wafer W, and a pattern 26 is opened in insulating film 25 (FIG. 4(A)).

[0023] In the COR chamber 11, the wafer W is subjected to COR processing, and the native oxide film formed on the surface of the base 24 made of Si or SiGe is transformed into ammonium silicofluoride (NH4)2SiF6. The wafer W is then transferred to the PHT chamber 12, where the wafer W is subjected to PHT processing, and the ammonium silicofluoride is sublimated. This removes the native oxide film (step S31) (oxide film removal process).

[0024] Next, the wafer W is transferred to the Zr film formation chamber 13. The Zr film formation chamber 13 is, for example, a PECVD (Plasma Enhanced Chemical Vapor Deposition) device, and includes a high-frequency power supply 31 and a film formation gas source 32. In the Zr film formation chamber 13, a high-frequency voltage applied from the high-frequency power supply 31 forms an electric field inside the Zr film formation chamber 13, and the film formation gas source 32 supplies a film formation gas containing Zr to the inside of the Zr film formation chamber 13. At this time, Zr plasma is generated from the film formation gas, and ions and radicals of the Zr plasma adhere to the surface of the wafer W, forming a Zr film 27 inside the pattern 26 (FIG. 4(B)) (step S32) (first film formation process).

[0025] Next, the wafer W is transferred to the Ti film formation chamber 14. The Ti film formation chamber 14 is also, for example, a PECVD apparatus, and includes a high frequency power supply 33 and a source gas source 34 (a source gas inlet). Here, the source gas source 34 supplies titanium tetrachloride (TiCl4) gas as a source gas into the Ti film formation chamber 14. The TiCl4 gas reacts with the Zr film 27 to generate zirconium chloride. Specifically, according to the reaction formula shown in the following formula (1), the TiCl4 gas reacts with Zr to generate zirconium chloride (ZrCl x ) and titanium chloride (TiCl y In the following formula (1), x is 3 or 4, and y is any one of 2 to 4.

[0026] Zr + TiCl4 → ZrCl x ↑ + TiCl y ↑ … (1)

[0027] In the Ti film deposition chamber 14, the wafer W is heated by a heater or the like of a mounting table (not shown). x and TiCl yis sublimated and scattered. As a result, the Zr film 27 is etched and the thickness of the Zr film 27 is adjusted (FIG. 4(C)) (step S33) (thickness adjusting step). When the Zr film 27 is etched, the high frequency power supply 33 does not apply a high frequency voltage to the inside of the Ti film forming chamber 14, so that the Zr film 27 is exposed to TiCl4 gas that is not plasmatized. Note that the etching of the Zr film 27 may be performed by turning the TiCl4 gas into plasma to generate TiCl4 plasma and promoting the reaction of the above formula (1).

[0028] The time for etching the Zr film 27 is set according to the thickness (amount) of the Zr film 27 to be left inside the pattern 26. For example, the time required for the Zr film 27 to be etched by TiCl4 gas to a desired remaining thickness is measured in advance, and the time for etching the Zr film 27 is set based on this time.

[0029] In step S33, the Zr film 27 on the bottom of the pattern 26 is changed into ZrSi 27a and is therefore difficult to etch with the TiCl4 gas. Therefore, in step S33, the Zr film 27 formed on the sidewall of the pattern 26 is mainly etched.

[0030] The source gas used for etching the Zr film 27 is not limited to TiCl4 gas. For example, at least one of tungsten pentachloride (WCl5) gas, tungsten hexachloride (WCl6) gas, molybdenum pentachloride (MoCl5) gas, molybdenum hexachloride (MoCl6) gas, hafnium tetrachloride (HfCl4) gas, and zirconium tetrachloride (ZrCl4) gas may be used as the source gas. Also, a mixed gas of at least one of these gases and TiCl4 gas may be used as the source gas. These metal chloride gases also react with the Zr film 27 to generate zirconium chloride.

[0031] After etching the Zr film 27, in the Ti film formation chamber 14, a high-frequency voltage applied from a high-frequency power supply 33 forms an electric field inside the Ti film formation chamber 14, and the raw material gas source 34 supplies TiCl4 gas into the Ti film formation chamber 14. At this time, the TiCl4 gas is turned into plasma to generate Ti plasma, and ions and radicals of the Ti plasma adhere to the remaining surface of the Zr film 27 to form a Ti film 28 inside the pattern 26 (FIG. 4(D)) (step S34) (second film formation process). At this time, hydrogen (H2) gas is introduced into the Ti film formation chamber 14 as a reducing gas. The hydrogen gas removes Cl atoms from the TiCl-based precursor generated by turning the TiCl4 gas into plasma by reduction, thereby leaving Ti atoms on the surface of the Zr film 27 and promoting the formation of the Ti film 28.

[0032] At this time, the TiCl4 gas etches a part of the Ti film 28 that is generated, thereby making it possible to prevent the thickness of the Ti film 28 from becoming unnecessarily thick. The etching of the Ti film 28 is performed by the TiCl4 gas reacting with the Ti film 28 to generate new titanium chlorides, and the new titanium chlorides being sublimated.

[0033] The total thickness of the Zr film 27 and the Ti film 28 on the sidewall of the pattern 26 after step S34 is performed is smaller than the thickness of the Zr film 27 after step S32 is performed. In addition, the source gas used to form the Ti film 28 is not limited to TiCl4 gas, and may be, for example, a chloride gas containing Ti other than TiCl4 or a halide gas containing Ti.

[0034] After the Ti film 28 is formed, the wafer W is subjected to a cleaning process (step S35) (cleaning process) in the Ti film formation chamber 14. In the cleaning process, Zr etching residue is removed from the surface of the wafer W by sputtering using plasma generated from argon gas or hydrogen gas, and the etching residue is exhausted to the outside of the Ti film formation chamber 14 by an exhaust device (not shown).

[0035] Thereafter, a metal film forming process is performed on the wafer W, and wiring metal 30 is embedded inside the pattern 26 (FIG. 4(E)) (step S36) (wiring process).

[0036] FIG. 5 is a flow chart for explaining a modified example of the film forming method according to the present embodiment, and FIG. 6 is a process chart for explaining the modified example of the film forming method according to the present embodiment.

[0037] 5 and 6 differs from the metal wiring formation process shown in Figures 3 and 4 in that etching of the Zr film 27 and formation of the Ti film 28 are repeated, but the other steps are the same as the steps of the metal wiring formation process shown in Figures 3 and 4. Therefore, detailed explanations of the steps that are the same as the steps of the metal wiring formation process shown in Figures 3 and 4 will be omitted below.

[0038] In the metal wiring forming process as a modification of the film forming method according to the present embodiment, first, a native oxide film is removed from the wafer W (FIG. 6(A)) (step S31). Next, a Zr film forming process is performed on the wafer W to form a Zr film 27 inside the pattern 26 (FIG. 6(B)) (step S52).

[0039] Next, the wafer W is transferred to the Ti film formation chamber 14. In the Ti film formation chamber 14, the Zr film 27 is first exposed to TiCl4 gas to etch the Zr film 27 (step S51). Since the execution time of step S51 is set to be shorter than the execution time of step S33, the remaining amount of the Zr film 27 after the first execution of step S51 is greater than the remaining amount of the Zr film 27 after the execution of step S33 (FIG. 6(C)).

[0040] After etching the Zr film 27, Ti plasma is generated from TiCl4 gas in the Ti film formation chamber 14, and a Ti film 28 is formed on the surface of the Zr film 27 inside the pattern 26 (step S52). Since the execution time of step S52 is also set shorter than the execution time of step S34, the thickness of the Ti film 28 after the first execution of step S52 is smaller than the thickness of the Ti film 28 after the execution of step S34 (FIG. 6(D)).

[0041] Thereafter, it is determined whether the Zr film 27 has reached a specified remaining film thickness (whether the film thickness has been thinned to the remaining film thickness) (step S53). For example, the remaining film thickness of the Zr film 27 may be estimated or observed by a remaining film thickness estimation means or observation means of the Zr film 27 provided in the Ti film formation chamber 14. In this case, the determination in step S53 is performed based on the estimated or observed remaining film thickness of the Zr film 27.

[0042] If the Zr film 27 has not reached the specified remaining thickness (NO in step S53), the process returns to step S51, and the etching of the Zr film 27 and the formation of the Ti film 28 are repeated. As a result, when the Ti film 28 is laminated on the Zr film 27, the thickness of the Zr film 27 decreases, and the thickness of the Ti film 28 increases. The etching of the Zr film 27 and the formation of the Ti film 28 are repeated by applying a high-frequency voltage in a pulsed manner from the high-frequency power supply 33 to the inside of the Ti film formation chamber 14. That is, when the high-frequency voltage is not applied, the Zr film 27 is etched, and when the high-frequency voltage is applied, Ti plasma is generated from the TiCl4 gas to form the Ti film 28. The etching amount of the Zr film 27 when step S51 is performed once and the formation amount of the Ti film 28 when step S52 is performed once are controlled by adjusting the duty ratio of the pulsed application of the high-frequency voltage.

[0043] On the other hand, if the Zr film 27 has reached the specified remaining thickness (YES in step S53), the etching of the Zr film 27 and the formation of the Ti film 28 are stopped, and the process proceeds to step S35. After the Zr film 27 has reached the specified remaining thickness, step S52 may be further executed to further increase the thickness of the Ti film 28.

[0044] In step S53, it may be determined whether the number of repetitions of steps S51 and S52 has reached a specified number. In this case, the number of repetitions of steps S51 and S52 required for the Zr film 27 to be etched by TiCl4 gas to a desired remaining film thickness is measured in advance, and the number of repetitions is set as the specified number. Note that the total film thickness of the Zr film 27 and the Ti film 28 after step S53 is performed is smaller than the film thickness of the Zr film 27 after step S32 is performed (FIG. 6(E)).

[0045] Thereafter, the wafer W is subjected to a cleaning process (step S35), and further subjected to a metal film forming process to embed wiring metal 30 inside the pattern 26 (FIG. 6(F)) (step S36).

[0046] According to the present embodiment, the Zr film 27 formed inside the pattern 26 of the wafer W is etched, so that it is possible to prevent a reduction in the volume of the wiring metal 30 embedded inside the pattern 26. This makes it possible to suppress an increase in the wiring resistance of the wiring metal 30.

[0047] In this embodiment, the etching of the Zr film 27 and the formation of the Ti film 28 are performed using the same TiCl4 gas. This allows the number of gases in the semiconductor manufacturing equipment 10 to be reduced. Furthermore, by using the same TiCl4 gas, the etching of the Zr film 27 and the formation of the Ti film 28 can be performed in the same Ti film formation chamber 14, so that the number of chambers can be reduced and the footprint of the semiconductor manufacturing equipment 10 can be prevented from increasing. In addition, it is not necessary to transport the wafer W to another chamber between the etching of the Zr film 27 and the formation of the Ti film 28, so that the throughput can be improved.

[0048] Furthermore, in this embodiment, the Zr film formation chamber 13, the Ti film formation chamber 14, and the nitridation chamber 15 are connected to the same second transfer module 17. Therefore, the formation of the Zr film 27, the etching of the Zr film 27, the formation of the Ti film 28, and the formation of the barrier layer 29 can be performed in-situ in the same vacuum system. This also improves the throughput. In addition, since the cleaning process is performed on the wafer W in the Ti film formation chamber 14, it is possible to prevent Zr etching residue from being brought into the nitridation chamber 15 connected to the same vacuum transfer system.

[0049] In addition, in this embodiment, a Ti film 28 is formed on the Zr film 27. Since stacking Ti on Zr reduces the electrical resistance, it is possible to reduce the resistance of the ohmic contact, particularly in the contact portion where TiSi28a is stacked on ZrSi27a.

[0050] Although the preferred embodiments of the present disclosure have been described above, the present disclosure is not limited to the above-described embodiments, and various modifications and changes are possible within the scope of the gist of the present disclosure.

[0051] For example, in the semiconductor manufacturing apparatus 10, the Zr film 27 is formed in the Zr film formation chamber 13, and the etching of the Zr film 27 and the formation of the Ti film 28 are performed in the Ti film formation chamber 14. However, as shown in Fig. 7, by providing a raw material gas source 34 in the Zr film formation chamber 13, the etching of the Zr film 27 and the formation of the Ti film 28 may also be performed in the Zr film formation chamber 13. That is, the Zr film formation chamber 13 may also serve as the Ti film formation chamber 14. In this case, the film formation gas source 32 supplies a film formation gas into the Zr film formation chamber 13 during the formation of the Zr film 27, and the raw material gas source 34 supplies TiCl4 gas into the Zr film formation chamber 13 during the etching of the Zr film 27 and the formation of the Ti film 28.

[0052] This eliminates the need to provide a Ti film formation chamber 14, and the footprint of the semiconductor manufacturing apparatus 10 can be further reduced. Also, this eliminates the need to transport the wafer W to another chamber between the formation of the Zr film 27 and the etching of the Zr film 27, and therefore the throughput can be further improved. Furthermore, since TiCl4 gas is supplied to the inside of the Zr film formation chamber 13 after the formation of the Zr film 27, Zr adhering to the inner wall of the Zr film formation chamber 13 during the formation of the Zr film 27 can be removed by the TiCl4 gas (see formula (1) above). This makes it possible to suppress metal contamination inside the Zr film formation chamber 13.

[0053] In addition, in the wafer W, the Zr film 27 is formed inside the pattern 26, and the Ti film 28 is formed thereon, but instead of the Zr film 27, a molybdenum (Mo) film or a hafnium (Hf) film may be formed, and the Ti film 28 may be formed thereon. In this case as well, the Mo film or Hf film is etched by TiCl4 gas in the Ti film formation chamber 14. [Explanation of symbols]

[0054] W wafer 10. Semiconductor manufacturing equipment 13 Zr deposition chamber 14 Ti deposition chamber 25 Insulating film 26 Patterns 27 Zr film 28 Ti film 30 Wiring metal

Claims

1. 1. A method for forming a metal wiring on a silicon-based substrate, the method comprising the steps of: forming a metal film inside a pattern formed in an insulating film of the substrate; and forming a contact portion made of metal silicide at a bottom of the pattern, the method comprising the steps of: a first film formation step of forming a first metal film inside the pattern; a film thickness adjusting step of adjusting a film thickness of the first metal film formed; a second film-forming step of forming a second metal film on the first metal film by using a source gas; the film thickness adjusting step includes etching the first metal film using the source gas.

2. The film forming method according to claim 1 , wherein the film thickness adjusting step and the second film forming step are repeated to laminate the second metal film on the first metal film.

3. 3. The film forming method according to claim 2, wherein the film thickness adjusting step and the second film forming step are repeated by applying a high frequency voltage pulse.

4. 2. The film forming method according to claim 1, wherein the second metal film is laminated on the first metal film without repeating the film thickness adjusting step and the second film forming step.

5. 2. The film forming method according to claim 1, wherein the source gas is not turned into plasma in the film thickness adjusting step, and the source gas is turned into plasma in the second film forming step.

6. The film forming method according to claim 1 , wherein the source gas is converted into plasma in both the film thickness adjusting step and the second film forming step.

7. an oxide film removing step of removing an oxide film formed on the surface of the substrate; 2. The film forming method according to claim 1, further comprising a wiring step of burying a metal, which is a wiring material, on the second metal film inside the pattern.

8. 8. The film forming method according to claim 7, further comprising a cleaning step of removing etching residue of the first metal film between the second film forming step and the wiring step.

9. The film forming method according to claim 1 , wherein the first metal film contains one of zirconium, molybdenum, and hafnium.

10. The method of claim 1 , wherein the second metal film comprises titanium.

11. 2. The film forming method according to claim 1, wherein the source gas is a titanium chloride gas or a titanium halide gas.

12. 12. The film forming method according to claim 11, wherein the source gas further contains at least one of tungsten pentachloride, tungsten hexachloride, molybdenum pentachloride, molybdenum hexachloride, hafnium tetrachloride, and zirconium tetrachloride.

13. The method of claim 1 , wherein the pattern is a contact hole or a trench.

14. 1. A semiconductor manufacturing apparatus for forming a metal wiring on a silicon-based substrate to be processed, the apparatus forming a metal film inside a pattern formed in an insulating film of the substrate to be processed and forming a contact part made of metal silicide at a bottom of the pattern, the apparatus comprising: a first film forming unit that forms a first metal film inside the pattern; a second film forming unit that forms a second metal film on the formed first metal film by using a source gas; The second film forming unit adjusts a film thickness of the first metal film formed using the source gas.

15. 15. The semiconductor manufacturing apparatus according to claim 14, wherein the second film forming section has a high frequency power source for generating plasma from the source gas.

16. 15. The semiconductor manufacturing apparatus according to claim 14, wherein the first film deposition section and the second film deposition section are connected to a same vacuum transfer system.

17. 15. The semiconductor manufacturing apparatus according to claim 14, wherein the first film forming section has an inlet for the source gas, and thereby serves as the second film forming section.

18. The semiconductor manufacturing apparatus according to claim 14 , wherein the second film forming section performs a cleaning process on the substrate to be processed, which removes etching residue of the first metal film.

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