Reception apparatus, transmission system, and program

Abstract

To achieve redundancy by synchronizing signals transmitted through a plurality of lines having different transmission delay times.SOLUTION: A reception apparatus 1 comprises: a digital demodulation part 31 that receives an OFDM signal having coded data modulated by OFDM from a first transmission apparatus 10, and performs an OFDM demodulation process on the OFDM signal to generate first coded data; a coded data extraction part 32 that receives a packet of coded data from a second transmission apparatus 20 and extracts second coded data from the packet; and a synchronization part 34 that synchronizes the coded data. Block numbers are set on respective blocks of the coded data. A range of numbers of OFDM frames and of block numbers of the coded data included in the OFDM frames is set on a signal for controlling transmission of the OFDM signal. The numbers of OFDM frames and the block numbers of the coded data are set on a header of the packet. The synchronization part 34 determines a synchronization position using the numbers of the OFDM frames and the block numbers.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a receiving device, a transmission system, and a program. [Background technology]

[0002] The STL (Studio to Transmitter Link) / TTL (Transmitter to Transmitter Link) (broadcast program) transmission method compatible with the advanced terrestrial television broadcasting system is expected to use multi-level quadrature amplitude modulation (QAM: Quadrature Amplitude Modulation: up to 4096QAM) OFDM and LDPC (Low Density Parity Check) code as the error correction code.

[0003] As a method for improving the stability and reliability of STL / TTL, it is assumed that wireless lines and wired lines (IP line networks) are used in a redundant manner. Redundancy methods include a method of complementing a line where a part of the transmission signal has been lost for some reason with a line where the signal is normally transmitted, a method of switching between multiple lines, and a method of synthesizing and using signals transmitted over multiple lines (for example, see Patent Document 1). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Patent Publication No. 2021-192502 Summary of the Invention [Problem to be solved by the invention]

[0005] However, when LLR synthesis technology is applied to STL / TTL that has been made redundant using wireless and wired lines, the transmission paths for the wireless and wired lines are different, so the time at which the transmitted signal arrives at the receiving device will differ. Therefore, unless the signals transmitted over the wireless and wired lines are synchronized, the redundancy will not work well.

[0006] In view of the above circumstances, an object of the present invention is to provide a receiving device, a transmission system, and a program that are capable of synchronizing and making redundant signals transmitted over multiple lines with different transmission delay times. [Means for solving the problem]

[0007] The gist of the present invention for solving the above problems is as follows.

[0008] (1) A receiving device comprising: a digital demodulation unit that receives an OFDM signal obtained by OFDM-modulating encoded data from a first transmitting device, and performs OFDM demodulation processing on the OFDM signal to estimate first encoded data; an encoded data extraction unit that receives a packet of the encoded data from a second transmitting device, and extracts second encoded data from the packet; and a synchronization unit that synchronizes the first encoded data with the second encoded data, wherein a block number that identifies a block is set for each block in the encoded data, an OFDM frame number that identifies an OFDM frame and a range of block numbers of the encoded data included in the OFDM frame are set for each OFDM frame in a transmission control signal of the OFDM signal, an OFDM frame number corresponding to the packet and a block number of the encoded data stored in the packet are set in the header of the packet, and the synchronization unit determines a synchronization position using the OFDM frame number and the block number.

[0009] (2) A receiving device comprising: a digital demodulation unit that receives an OFDM signal obtained by OFDM-modulating coded data with a preamble from a first transmitting device, and performs OFDM demodulation processing on the OFDM signal to estimate coded data with a first preamble; a coded data extraction unit that receives a packet of coded data with the preamble from a second transmitting device, and extracts coded data with a second preamble from the packet; and a synchronization unit that synchronizes the coded data with the first preamble and the coded data with the second preamble, wherein the synchronization unit determines a synchronization position based on cross-correlation between the preamble of the coded data with the first preamble and the preamble of the coded data with the second preamble.

[0010] (3) A receiving device comprising: a digital demodulation unit that receives an OFDM signal obtained by OFDM-modulating encoded data from a first transmitting device, and performs OFDM demodulation processing on the OFDM signal to estimate first encoded data; an LLR calculation unit that calculates an LLR of the first encoded data; a 0 / 1 conversion unit that performs hard decision on the LLR and converts it to 0 or 1; an encoded data extraction unit that receives a packet of the encoded data from a second transmitting device, and extracts second encoded data from the packet; and a synchronization unit that synchronizes between the first encoded data and the second encoded data, wherein the synchronization unit determines a synchronization position based on the cross-correlation between the LLR converted by the 0 / 1 conversion unit and the second encoded data.

[0011] (4) A receiving device described in any of (1) to (3), further comprising a line status monitoring unit that generates line information regarding packet loss of the packet received from the second transmitting device and feeds back the line information to the second transmitting device.

[0012] (5) The receiving device according to (4), wherein the encoded data extraction unit receives packets of different lengths from the second transmitting device depending on the line information.

[0013] (6) A transmission system comprising: a receiving device according to any one of (1) to (5); a first transmitting device that transmits the OFDM signal; and a second transmitting device that transmits the packet.

[0014] (7) A program for causing a computer to function as a receiving device according to any one of (1) to (5). Effect of the Invention

[0015] According to the present invention, it is possible to synchronize signals transmitted over a plurality of lines having different transmission delay times and make them redundant. [Brief description of the drawings]

[0016] [Figure 1] 1 is a block diagram showing an example of the configuration of a transmission system according to a first embodiment. [Diagram 2] FIG. 2 is a diagram illustrating an example of an FEC (Forward Error Correction) block. [Figure 3A] FIG. 1 is a diagram illustrating an example of an OFDM (Orthogonal Frequency Division Multiplexing) frame. [Figure 3B] FIG. 2 is a diagram illustrating an example of an OFDM frame. [Figure 4] FIG. 1 is a diagram illustrating an example of an IP packet. [Diagram 5] 2 is a diagram for explaining the process of an IP packetization unit shown in FIG. 1; [Figure 6] FIG. 11 is a block diagram showing an example of the configuration of a transmission system according to a second embodiment. [Figure 7] 7 is a diagram for explaining the process of the preamble adding unit shown in FIG. 6. [Figure 8] 7 is a diagram for explaining the processing of a digital modulation unit shown in FIG. 6. [Figure 9] 7 is a diagram for explaining the process of an IP packetization unit shown in FIG. 6; [Figure 10] FIG. 11 is a block diagram showing an example of the configuration of a transmission system according to a third embodiment. [Figure 11] 11 is a diagram for explaining the process of a synchronization unit shown in FIG. 10. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

[0018] <First embodiment> Fig. 1 shows only the main components of a transmission system according to a first embodiment of the present invention. The transmission system 1 shown in Fig. 1 includes a first transmitting device 10, a second transmitting device 20, and a receiving device 30. The transmission system 1 transmits signals that have been subjected to error correction coding such as LDPC code via a wireless / wired line, and the receiving side combines the transmitted signals at the LLR (Log-Likelihood Ratio) stage and performs error correction decoding. By transmitting signals via multiple lines for redundancy, the stability and reliability of the lines are improved.

[0019] The first transmission device 10 includes an error correction coding unit 11 and a digital modulation unit 12 .

[0020] The error correction coding unit 11 performs BCH coding and error correction coding (LDPC coding in this embodiment) on the transmission data related to the digital broadcasting, and generates coded data consisting of a plurality of FEC blocks. The transmission data is, for example, a TLV (Type Length Value) packet.

[0021] FIG. 2 shows an example of an FEC block. The FEC block shown in FIG. 2 is composed of a block header, a main signal, stuff bits, parity bits of the BCH code, and parity bits of the LDPC code. The block header, main signal, and stuff bits, which are information bits, are subjected to energy diffusion processing. The error correction encoder 11 sets an FEC block number in the block header of the FEC block. The FEC block number is a number (serial number) assigned to each FEC block in order to identify the FEC block. The error correction encoder 11 adds the parity bits of the BCH code, which is the outer code, and the parity bits of the LDPC code, which is the inner code, to the main signal after energy diffusion to form an FEC block. Error correction code length (FEC block code length) n ldpc is, for example, 17280 bits.

[0022] The digital modulation unit 12 performs interleaving processing and the like on the coded data generated by the error correction coding unit 11, and then adds a TMCC (Transmission and Multiplexing Configuration Control), a pilot, and an additional information transmission signal (AC: Auxiliary Channel) to form an OFDM frame.

[0023] An example of an OFDM frame is shown in Figure 3. Here, the OFDM frame configuration of the mode standardized in ARIB STD-B71 "Portable microwave band OFDM digital wireless transmission system for ultra-high definition television broadcast program material transmission" is shown, with carrier numbers assigned horizontally (frequency direction) and symbol numbers assigned vertically (time direction) of the OFDM frame. Figure 3A shows OFDM frames with carrier numbers 0 to 37, and Figure 3B shows OFDM frames with subsequent carrier numbers. Carrier symbols shown in black are pilots, carrier symbols shown with circles are TMCC, carrier symbols shown with crossed diagonal lines are AC, carrier symbols shown with crosses are null, and the rest are data.

[0024] The digital modulation unit 12 sets, in the TMCC, the OFDM frame number and the range of FEC block numbers of the encoded data included in the OFDM frame. The OFDM frame number is a number (serial number) assigned to each OFDM frame to identify the OFDM frame. For the TMCC, DBPSK modulation or the like may be used, which simplifies the demodulation process in the receiving device 30.

[0025] Furthermore, the digital modulation unit 12 performs OFDM modulation processing on the OFDM frame to generate a modulated wave signal (OFDM signal). In the OFDM modulation processing, an IFFT (Inverse Fast Fourier Transform) process is performed to generate a time domain effective symbol signal, a guard interval is inserted at the beginning of the effective symbol signal, and then an orthogonal modulation process and a D / A conversion process are performed. The digital modulation unit 12 radiates the OFDM signal via a terrestrial broadcast transmission path (wireless network) through a transmitting antenna. In this embodiment, the number of bits per OFDM frame is equal to the error correction code length n ldpc x modulation multi-value number.

[0026] The second transmitting device 20 sequentially inputs the encoded data generated by the error correction encoding unit 11 of the first transmitting device 10 via a LAN (Local Area Network). The second transmitting device 20 includes an IP packetizing unit .

[0027] The IP packetizer 21 generates an IP packet by adding a header to the encoded data received from the first transmitting device 10. The IP packetizer 21 stores an integer multiple or an integer multiple of the FEC block in the data portion (payload) of the IP packet. The IP packetizer 21 also sets, in the header of the IP packet, the OFDM frame number corresponding to the IP packet and the FEC block number of the encoded data stored in the IP packet. The IP packetizer 21 then transmits the generated IP packet to the receiving device 30 via the IP network.

[0028] An example of an IP packet is shown in Figure 4. Here, the number of bits transmitted in one OFDM frame is defined as the FEC block code length n ldpc Let the number of FEC blocks be x20. Figure 4(a) shows an example where one entire FEC block is stored in the data portion of one IP packet. Figure 4(b) shows an example where one FEC block is divided into two and each is stored in the data portion of one IP packet. When an FEC block is divided into n, the same FEC block number will be set in the headers of n IP packets.

[0029] When transmitting encoded data over a wired line, burst errors may occur. Therefore, in order to deal with burst errors, the IP packetizer 21 may set the write direction and read direction of the encoded data and perform IP packetization.

[0030] 5 shows an example of processing performed by the IP packetizer 21. In this example, the number of data carriers in the OFDM frame is 1600, the number of symbols is 216, the number of modulation levels in the OFDM modulation is N, and the FEC block code length is n ldpc is set to 17280 bits. In this case, the number of transmission bits per one OFDM frame is 1600×216×N=17280×20×N. The IP packetizer 21 writes the LDPC code horizontally into memory in units of OFDM, at 17280 / n [bits] each. That is, the FEC block is divided into n and folded back. Next, the IP packetizer 21 reads data vertically from the memory, and stores one read column as data for one packet. Therefore, the data length of the IP packet is 8×20×N [bits]=20N [bytes].

[0031] When OFDM modulation is performed with 256QAM, the modulation multi-level number N = 8. In this case, the number of IP packets and the data length of the IP packets change as shown in Table 1 according to the division number n of the FEC block. [Table 1]

[0032] By lengthening the data length of the IP packet and reducing the header portion, the transmission efficiency of the IP packet is improved. However, when the IP packet length is long (the number of foldbacks within one FEC increases), the characteristics tend to deteriorate when the LLR synthesis unit 37 performs LLR synthesis. Also, when a burst error occurs, the characteristics tend to deteriorate if the packet length is long. Therefore, the IP packetization unit 21 may obtain line information related to packet loss from the receiving device 30 and change and optimize the data length of the IP packet according to the line information. For example, as shown in Table 2, the IP packetization unit 21 shortens the data length of the IP packet as the packet loss rate increases. Also, as shown in Table 3, the IP packetization unit 21 shortens the data length of the IP packet as the packet loss occurrence tendency (random or burst) becomes more bursty. [Table 2] [Table 3]

[0033] 1 again, the receiving device 30 includes a digital demodulation unit 31, an encoded data extraction unit 32, a line status monitoring unit 33, a synchronization unit 34, an LLR calculation unit 35, an LLR conversion unit 36, an LLR synthesis unit 37, and an error correction decoding unit 38.

[0034] The digital demodulation unit 31 receives an OFDM signal obtained by OFDM-modulating encoded data from the first transmission device 10 via the receiving antenna, and performs OFDM demodulation processing on the OFDM signal. In the OFDM demodulation processing, A / D conversion processing, orthogonal modulation processing, guard interval removal processing, and FFT (Fast Fourier Transform) processing are performed to generate a frequency domain symbol signal. Furthermore, the digital demodulation unit 31 performs equalization processing and deinterleaving processing to estimate encoded data. Then, the digital demodulation unit 31 outputs the encoded data to the synchronization unit 34.

[0035] The encoded data extraction unit 32 receives an IP packet of encoded data from the second transmitting device 20, and extracts the encoded data from the IP packet. Then, the encoded data extraction unit 32 outputs the encoded data to the line status monitoring unit 33 and the synchronization unit .

[0036] The line status monitoring unit 33 generates information indicating the above-mentioned line status (packet loss rate and tendency of occurrence of packet loss) based on the coded data extracted by the coded data extraction unit 32. Then, the line status monitoring unit 33 transmits the line information to the second transmission device 20. By the line status monitoring unit 33 feeding back the line information to the IP packetization unit 21, it is possible to set the data length of the IP packet according to the line status, and it is possible to enhance the improvement effect by the likelihood combining of the entire system.

[0037] The synchronization unit 34 synchronizes the coded data (first coded data) estimated by the digital demodulation unit 31 with the coded data (second coded data) extracted by the IP packetization unit 21. Then, the synchronization unit 34 outputs the first coded data to the LLR calculation unit, and outputs the second coded data to the LLR conversion unit 36. The synchronization unit 34 also instructs the LLR synthesis unit 37 of the synchronization position (synchronization timing).

[0038] In the first embodiment, consecutive OFDM frame numbers and FEC block numbers are set at regular intervals in the transmission signals of the wireless line and the wired line, and the synchronization position is determined by these numbers to achieve synchronization. As described above, the first transmission device 10 assumes that the number of bits of an integer multiple of the error correction code length x the modulation multi-level number is sent per OFDM frame, and sets consecutive FEC block numbers in the block header included in the FEC block of the error correction code, and sets the range of OFDM frame numbers and FEC block numbers in the TMCC of the OFDM subcarrier. In addition, the second transmission device 20 assumes that an integer multiple or an integer multiple of the error correction code length is stored in the data portion of one packet, and sets the OFDM frame number and the FEC block number in the header of each packet.

[0039] The synchronization unit 34 extracts the OFDM frame number and the FEC block number from the signal transmitted via the wireless / wired line, and determines the synchronization position of the signal using the OFDM frame number and the block number.

[0040] The LLR calculation unit 35 compares the signal point coordinates of the first coded data input from the synchronization unit 34 with predetermined signal point coordinates, and calculates an LLR for each bit of the coded data based on the Euclidean distance between both coordinates. That is, the log-likelihood ratio of the n-th bit is expressed as the logarithm of the ratio between the likelihood function where the value bn of the n-th bit is 0 and the likelihood function where the value bn of the n-th bit is 1. Then, the LLR calculation unit 35 outputs the calculated LLR to the LLR combination unit 37.

[0041] The LLR conversion unit 36 ​​converts the second encoded data input from the synchronization unit 34 into an LLR. For example, it converts 0 and 1 of the second encoded data into predetermined values ​​(for example, 15 and −15). The LLR conversion unit 36 ​​outputs the converted LLR to the LLR synthesis unit 37.

[0042] The LLR combining unit 37 synchronizes the LLR (first LLR) input from the LLR calculating unit 35 and the LLR (second LLR) input from the LLR converting unit 36 ​​based on the synchronization position determined by the synchronizing unit 34, combines them bit by bit, and obtains an LLR combined value. There is no limitation on the LLR combining method, and for example, the LLR combining unit 37 may use the larger of the first LLR and the second LLR as the LLR combined value, or may use the sum or average value of the first LLR and the second LLR as the LLR combined value.

[0043] The error correction decoding unit 38 performs error correction decoding (LDPC decoding in this embodiment) using the LLR input from the LLR synthesis unit 37, and then performs BCH decoding. In LDPC decoding, transmitted bits are decoded by repeated calculations using the LLR according to a known decoding algorithm such as sum-product decoding.

[0044] <Second embodiment> FIG. 6 shows only the main components of a transmission system according to the second embodiment of the present invention. The transmission system 2 shown in FIG. 6 includes a first transmission device 10a, a second transmission device 20a, and a reception device 30a. The first transmission device 10a includes an error correction coding unit 11, a preamble adding unit 13, and a digital modulation unit 12a. The second transmission device 20a includes an IP packetization unit 21a. The reception device 30a includes a digital demodulation unit 31a, an encoded data extraction unit 32a, a line status monitoring unit 33, a synchronization unit 34a, an LLR calculation unit 35, an LLR conversion unit 36, an LLR synthesis unit 37, and an error correction decoding unit 38. The same components as those in the first embodiment are given the same reference numbers and will not be described as appropriate.

[0045] The transmission system 2 sets a specific preamble in the transmission signal, and determines the synchronization position and achieves synchronization by cross-correlation of the preamble portion of the received signal.

[0046] As shown in Fig. 7, the preamble adding unit 13 adds a predetermined preamble to the beginning of each piece of coded data to be transmitted in one OFDM frame. The length of the preamble is, for example, 256 bits, but is not limited to this length. The bit value of the preamble is arbitrary, and may be all 0 or all 1, or a known sequence such as the Zadoff-Chu sequence may be applied. The preamble adding unit 13 then outputs the coded data with the preamble to the digital modulation unit 12a and the second transmission device 20a.

[0047] As shown in FIG. 8, the digital modulation unit 12a modulates the preamble of the preamble-attached encoded data using DBPSK or the like, and modulates the encoded data with the preamble using multi-level modulation using 64 / 256 / 1024QAM or the like, and stores the modulated data in an OFDM frame.

[0048] The IP packetizer 21a divides the preamble-attached coded data transmitted in one OFDM frame into several packets and packetizes them, as shown in Fig. 9. An IP header is added to each packet.

[0049] The digital demodulation unit 31a receives an OFDM signal obtained by OFDM-modulating the preamble-attached coded data from the first transmission device 10 via the receiving antenna, and performs OFDM demodulation processing on the OFDM signal to estimate the coded data. The digital demodulation unit 31a then outputs the coded data to the synchronization unit 34a.

[0050] The coded data extracting unit 32a receives an IP packet of coded data with a preamble from the second transmitting device 20a, extracts the coded data from the IP packet, and outputs the coded data to the line status monitoring unit 33 and the synchronizing unit 34a.

[0051] The synchronization unit 34a synchronizes the preamble-attached coded data (first preamble-attached coded data) estimated by the digital demodulation unit 31a with the preamble-attached coded data (second preamble-attached coded data) extracted by the IP packetization unit 21a. The synchronization unit 34a determines a synchronization position of the signal by cross-correlation of the preambles. Then, the synchronization unit 34a deletes the preamble, outputs the first coded data to the LLR calculation unit 35, and outputs the second coded data to the LLR conversion unit 36. The synchronization unit 34a also indicates the synchronization position to the LLR synthesis unit 37.

[0052] <Third embodiment> FIG. 10 shows only the main components of a transmission system according to the third embodiment of the present invention. The transmission system 3 shown in FIG. 10 includes a first transmission device 10, a second transmission device 20, and a reception device 30b. The first transmission device 10 includes an error correction coding unit 11 and a digital modulation unit 12. The second transmission device 20 includes an IP packetization unit 21. The reception device 30b includes a digital demodulation unit 31, an encoded data extraction unit 32, a line status monitoring unit 33, an LLR calculation unit 35b, a 0 / 1 conversion unit 39, a synchronization unit 34b, an LLR conversion unit 36, an LLR synthesis unit 37b, and an error correction decoding unit 38. The same components as those in the first embodiment are given the same reference numbers and will not be described as appropriate.

[0053] In the transmission system 3, the transmitting side does not set an OFDM frame number and an FEC block number as in the transmission system 1, nor does it add a preamble as in the transmission system 2, but the receiving side performs demodulation processing for each OFDM frame transmitted over a wireless line, derives an LLR, and obtains coded data by making a hard decision on the derived LLR. Then, the synchronization position is determined and synchronization is achieved based on the cross-correlation between this coded data and the coded data transmitted over a wired line.

[0054] The digital demodulation unit 31 receives an OFDM signal obtained by OFDM-modulating encoded data from the first transmission device 10 via the receiving antenna, and performs OFDM demodulation processing on the OFDM signal to generate encoded data. Then, the digital demodulation unit 31 outputs the encoded data to the LLR calculation unit 35b.

[0055] The LLR calculation unit 35b compares the signal point coordinates of the coded data input from the digital demodulation unit 31 with predetermined signal point coordinates, and calculates the LLR for each bit of the coded data based on the Euclidean distance between the two coordinates. Then, the LLR calculation unit 35b outputs the calculated LLR to the 0 / 1 conversion unit 39 and the LLR synthesis unit 37b.

[0056] The 0 / 1 converter 39 performs hard decision on the LLR calculated by the LLR calculator 35b and converts it to 0 or 1. For example, the 0 / 1 converter 39 converts the LLR to 0 if the LLR is positive and converts the LLR to 1 if the LLR is negative. Then, the 0 / 1 converter 39 outputs the converted LLR to the synchronization unit 34b.

[0057] The encoded data extractor 32 receives an IP packet of encoded data from the second transmitting device 20, and extracts the encoded data from the IP packet. Then, the encoded data extractor 32 outputs the encoded data to the line status monitor 33 and the synchronizer 34b.

[0058] The synchronization unit 34b synchronizes the coded data (first coded data) estimated by the digital demodulation unit 31 with the coded data (second coded data) extracted by the IP packetization unit 21. Unlike the first embodiment, the synchronization unit 34b determines a synchronization position based on a cross-correlation between the LLR converted by the 0 / 1 conversion unit 39 and the second coded data extracted by the IP packetization unit 21. Then, the synchronization unit 34b outputs the second coded data to the LLR conversion unit 36. The synchronization unit 34b also instructs the synchronization position (synchronization timing) to the LLR synthesis unit 37b.

[0059] Fig. 11 shows an example of processing by the synchronization unit 34b. The first row shows the LLR calculated by the LLR calculation unit 35b, the second row shows the LLR converted by the 0 / 1 conversion unit 39, and the third row shows the second encoded data extracted by the IP packetization unit 21. The synchronization unit 34b calculates the cross-correlation between the data in the second row and the data in the third row. As shown in Fig. 11, the position where the correlation coefficient peaks is the synchronization position.

[0060] The LLR synthesis unit 37b synchronizes the LLR input from the LLR calculation unit 35b and the LLR input from the LLR conversion unit 36 ​​based on the synchronization position determined by the synchronization unit 34b, synthesizes them bit by bit, and obtains an LLR synthesis value.

[0061] It is expected that the accuracy of synchronization can be improved by using multiple synchronization methods in combination among the three synchronization methods described in the first, second, and third embodiments. Therefore, multiple synchronization methods may be used in combination depending on the circuit scale to be implemented.

[0062] In the above embodiment, the synchronization units 34, 34a, and 34b may change the search range and search frequency of the synchronization position depending on the state of the wireless line / wired line. For example, the synchronization units 34, 34a, and 34b may acquire line information from the line status monitoring unit 33, and may widen the search range if the delay time of the wired line fluctuates (such as a best-effort line) and the amount of fluctuation exceeds a threshold. Also, if the packet loss rate of the wired line exceeds a threshold or fading or the like occurs in the wireless line and stable reception is no longer possible (if fading is detected), the search frequency may be increased.

[0063] According to the present invention, in a system in which signals transmitted through wired and wireless circuits are synthesized at the LLR stage, the wired circuit can be used more efficiently, the stability and reliability of STL / TTL can be improved, and the line operating rate can be improved. In addition, it becomes possible to appropriately synchronize the wired circuit and the wireless circuit, which leads to an improvement in the stability of the entire system.

[0064] In addition, when error correction coded data is packetized into IP packets, the data length of the IP packets transmitted over the wired line can be adjusted according to the occurrence of packet loss on the wired line, thereby obtaining the effect of likelihood combining even when burst errors occur, and improving the CNR vs. BER characteristics. In particular, by making the lost values ​​as short as possible when returning to the original data sequence, it becomes easier to obtain an improvement in the CNR vs. BER characteristics.

[0065] <Program> A computer capable of executing program instructions may be used to function as the first transmitting device 10, 10a, the second transmitting device 20, 20a, and the receiving device 30, 30a, 30b described above. Here, the computer may be a general-purpose computer, a special-purpose computer, a workstation, a PC (Personal Computer), an electronic notepad, etc. The program instructions may be program code, code segments, etc. for performing the necessary tasks.

[0066] The computer includes a processor, a storage unit, an input unit, an output unit, and a communication interface. The processor may be a central processing unit (CPU), a micro processing unit (MPU), a graphics processing unit (GPU), a digital signal processor (DSP), a system on a chip (SoC), or the like, and may be composed of multiple processors of the same type or different types. The processor reads out a program from the storage unit and executes it to control each of the above components and perform various arithmetic processing. At least a part of the processing contents may be realized by hardware. The input unit is an input interface that receives a user's input operation and acquires information based on the user's operation, and is a pointing device, a keyboard, a microphone, or the like. The output unit is an output interface that outputs information, and is a display, a speaker, or the like. The communication interface is an interface for communicating with an external device.

[0067] The program may be recorded on a computer-readable recording medium. By using such a recording medium, the program can be installed on the computer. Here, the recording medium on which the program is recorded may be a non-transitory recording medium. The non-transitory recording medium is not particularly limited, and may be, for example, a CD-ROM, a DVD-ROM, or a USB (Universal Serial Bus) memory. In addition, the program may be in a form that is downloaded from an external device via a network.

[0068] The above-mentioned receiving device 30 may be configured with one or more semiconductor chips. The semiconductor chip may be equipped with a CPU that executes a program that describes the processing contents that realize each function of the receiving device 30. The same applies to the first transmitting devices 10, 10a, the second transmitting devices 20, 20a, and the receiving devices 30a, 30b.

[0069] Although the above-mentioned embodiment has been described as a representative example, it is obvious to those skilled in the art that many modifications and substitutions can be made within the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited by the above-mentioned embodiment, and various modifications or changes can be made without departing from the scope of the claims. For example, it is possible to integrate multiple building blocks shown in the configuration diagram of the embodiment, or to divide one building block. [Explanation of symbols]

[0070] 1,2,3 Transmission System 10, 10a First transmitter 11 Error correction coding section 12, 12a Digital modulation section 13 Preamble Addition Part 20, 20a Second transmitter 21, 21a IP packetization section 30, 30a, 30b Receiving device 31, 31a Digital demodulation section 32, 32a Encoded data extraction unit 33 Line Status Monitoring Unit 34,34a,34b Synchronization part 35,35b LLR calculation section 36 LLR conversion section 37,37b LLR synthesis section 38 Error correction decoding section 39 0 / 1 conversion unit

Claims

1. a digital demodulation unit that receives an OFDM signal obtained by OFDM-modulating encoded data from a first transmitting device, and performs OFDM demodulation processing on the OFDM signal to estimate the first encoded data; an encoded data extraction unit that receives a packet of the encoded data from the second transmitting device and extracts the second encoded data from the packet; a synchronization unit that synchronizes the first encoded data with the second encoded data, A block number for identifying each block is set in the encoded data, an OFDM frame number for identifying an OFDM frame and a range of block numbers of the encoded data included in the OFDM frame are set in the transmission control signal for the OFDM signal, an OFDM frame number corresponding to the packet and a block number of the encoded data stored in the packet are set in the header of the packet; A receiving device, wherein the synchronization unit determines a synchronization position using the OFDM frame number and the block number.

2. a digital demodulation unit that receives an OFDM signal obtained by OFDM-modulating coded data with a preamble from a first transmitting device, and performs OFDM demodulation processing on the OFDM signal to estimate coded data with a first preamble; an encoded data extraction unit that receives a packet of the encoded data with the preamble from a second transmitting device and extracts the encoded data with the second preamble from the packet; a synchronization unit that synchronizes the encoded data with the first preamble and the encoded data with the second preamble, A receiving device, wherein the synchronization unit determines a synchronization position based on a cross-correlation between a preamble of the encoded data with the first preamble and a preamble of the encoded data with the second preamble.

3. a digital demodulation unit that receives an OFDM signal obtained by OFDM-modulating encoded data from a first transmitting device, and performs OFDM demodulation processing on the OFDM signal to estimate the first encoded data; an LLR calculation unit that calculates an LLR of the first encoded data; a 0 / 1 converter that performs hard decision on the LLR and converts it into 0 or 1; an encoded data extraction unit that receives a packet of the encoded data from the second transmitting device and extracts the second encoded data from the packet; a synchronization unit that synchronizes the first encoded data with the second encoded data, A receiving device, wherein the synchronization unit determines a synchronization position based on a cross-correlation between the LLR converted by the 0 / 1 conversion unit and the second encoded data.

4. The receiving device according to claim 1 , further comprising a line status monitoring unit that generates line information regarding packet loss of the packet received from a second transmitting device and feeds back the line information to the second transmitting device.

5. The receiving device according to claim 4 , wherein the encoded data extracting unit receives packets of different lengths from the second transmitting device according to the line information.

6. A receiving device according to any one of claims 1 to 3, the first transmitting device for transmitting the OFDM signal; the second transmitting device for transmitting the packet; A transmission system comprising:

7. A program for causing a computer to function as the receiving device according to any one of claims 1 to 3.

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