Semiconductor device

Abstract

To solve the problem that realizing multiple functions takes many components and much time and effort, resulting in the increase in manufacturing cost and the decrease in yield.SOLUTION: A matrix type display unit, and a matrix type light sensor unit are manufactured on the same substrate. In addition, driving circuits for the display unit and the light sensor unit manufactured on the same substrate are integrated into one chip, so that the number of components is reduced. By integrating the light sensor in a display panel, the display panel can have a barcode reading function and a scanning function. In addition, the display panel can also have an authentication function for fingerprint or the like and an input-output function as a touch sensor.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] 1. Field of the Invention One embodiment of the present invention relates to a display device with a touch sensor, a display device, a touch sensor, or a semiconductor device.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. One embodiment of the present invention disclosed in this specification relates to an object, a method, or a manufacturing method. One embodiment of the present invention relates to a process, a machine, a manufacture, or a composition of matter. Therefore, examples of the technical field of one embodiment of the present invention disclosed in this specification include a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, an electronic device, a lighting device, an input device, an input / output device, a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics. Semiconductor elements such as transistors, semiconductor circuits, arithmetic devices, and memory devices are all embodiments of semiconductor devices. Imaging devices, display devices, liquid crystal display devices, light-emitting devices, input devices, input / output devices, electro-optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, and the like), and electronic devices may include semiconductor devices. [Background technology]

[0004] 2. Description of the Related Art In recent years, mobile information terminals such as smartphones and tablet terminals have become widespread. Such mobile information terminals often use display devices including an active matrix display unit or a touch sensor.

[0005] Also disclosed in Patent Document 1 is a technology in which a single IC functions as both a drive circuit for a display unit and a drive circuit for a touch sensor. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2017-16098 A Summary of the Invention [Problem to be solved by the invention]

[0007] In some cases, the image displayed on a display panel may be difficult to see, either indoors or outdoors, depending on the brightness around the display panel. In order to detect the brightness around the display panel and provide optimal display, a light receiving element such as a photodiode is provided separately from the display panel, and the display on the display panel is automatically adjusted according to the detected amount of light. In this case, if the light receiving element is provided separately from the display panel, a space for mounting the light receiving element in the device and a chip having a semiconductor integrated circuit for detection will also be provided separately. In addition, if the light receiving element is provided separately, a very small light receiving element is used, making it difficult to accurately detect the amount of external light depending on its arrangement.

[0008] Furthermore, in addition to the above-mentioned light receiving elements, devices such as portable information terminals will be required to have even more functions in the future.

[0009] To realize multiple functions, it takes time to connect various accessory devices and install application software for operating the accessory devices. For example, barcode reader and scanner functions can be realized using accessory devices, but there are restrictions on the presence or absence of connection cords and applicable models, making them less versatile.

[0010] Furthermore, devices in which each type of semiconductor integrated circuit is individually mounted on a single chip have a large number of components, and the effort required to mount each component increases manufacturing costs and reduces yields. [Means for solving the problem]

[0011] To solve the above problems, a matrix-type display unit and a matrix-type photosensor unit are fabricated on the same substrate. Furthermore, the driver circuits for the display unit and the photosensor unit fabricated on the same substrate are integrated into a single chip, thereby reducing the number of components.

[0012] The configuration of the invention disclosed in this specification is a semiconductor device in which a chip having at least one semiconductor integrated circuit is mounted on one surface of a first substrate having a display portion and a light sensor portion, a second substrate overlapping the display portion, one surface of the first substrate and one surface of the second substrate are fixed opposite each other, and the chip having the semiconductor integrated circuit is a semiconductor device having a driver circuit for the light sensor portion and a driver circuit for the display portion.

[0013] By incorporating an optical sensor into the display panel, it is possible to add a barcode reader or scanner function to the display panel. It is also possible to add a fingerprint authentication function, a vein or other biometric information acquisition function, or an input function as a touch sensor to the display panel.

[0014] In addition, when light-emitting elements using a layer containing an organic compound are used for displaying on the display panel, the light-emitting elements can be made to emit light, and the reflected light can be used to capture an image. Therefore, QR codes (registered trademark) and the like can be read even in dark places outdoors at night. This configuration is useful because it is difficult to read QR codes (registered trademark) and the like with a camera in dark places.

[0015] Furthermore, since a plurality of light sensors are disposed in substantially the same area as the display panel, the amount of external light can be detected accurately using a wide area.

[0016] The optical sensor unit is provided in substantially the same area as the display panel, and can function as a touch panel by detecting the shadow of a person's finger or the like that touches the display panel.

[0017] In addition, when used outdoors during the day, sunlight is received by the light sensor, making it difficult to make the display panel function as a touch panel. Therefore, a capacitive touch panel may be provided on the display panel, and when used outdoors during the day, the panel is configured to switch to the capacitive touch panel according to the amount of external light.

[0018] Also, a configuration having a touch panel unit is one aspect of the present invention, and the configuration includes a chip having at least one semiconductor integrated circuit mounted on one surface of a first substrate having a display unit and a light sensor unit, a touch panel unit is provided on one surface of a second substrate overlapping the display unit, and one surface of the first substrate and one surface of the second substrate are fixed opposite each other, and the chip having the semiconductor integrated circuit is a semiconductor device having a driver circuit for the display unit, a driver circuit for the light sensor unit, and a driver circuit for the touch panel unit.

[0019] In addition, in the above configuration, a single chip has three types of driver circuits, but this is not particularly limited, and a single chip may have two types of driver circuits.

[0020] The present invention also provides a configuration in which the two types of driver circuits are a driver circuit for a display section and a driver circuit for a touch panel section. In this configuration, a chip having at least one semiconductor integrated circuit is mounted on one surface of a first substrate having a display section and a photosensor section, a touch panel section is provided on one surface of a second substrate overlapping the display section, and one surface of the first substrate and one surface of the second substrate are fixed opposite each other, and the chip having the semiconductor integrated circuit is a semiconductor device having a driver circuit for a display section and a driver circuit for a touch panel section.

[0021] Another aspect of the present invention is a configuration in which the two types of driver circuits are a driver circuit for the optical sensor portion and a driver circuit for the touch panel portion. In this configuration, a chip having at least one semiconductor integrated circuit is mounted on one surface of a first substrate having a display portion and an optical sensor portion, a touch panel portion is provided on one surface of a second substrate overlapping the display portion, and one surface of the first substrate and one surface of the second substrate are fixed opposite each other, and the chip having the semiconductor integrated circuit is a semiconductor device having a driver circuit for the optical sensor portion and a driver circuit for the touch panel portion.

[0022] When the first substrate of the display panel is a glass substrate, an IC (semiconductor integrated circuit) mounted by a COG (Chip On Glass) method is used as a drive circuit for the display unit.

[0023] Furthermore, when a film, for example a plastic film, is used for the first substrate, an IC can be mounted by a mounting method such as the COF (Chip On Film) method or TCP (Tape Carrier Package) method.

[0024] It is also possible to place the IC on an FPC (Flexible Printed Circuits).

[0025] Also, a configuration in which an IC is placed on an FPC is one aspect of the present invention, and the configuration includes a first substrate having a display portion, a light sensor portion, and a terminal portion, a film having wiring electrically connected to the terminal portion, and a chip having at least one semiconductor integrated circuit mounted on the film, and a second substrate overlapping the display portion, one surface of the first substrate and one surface of the second substrate are fixed opposite each other, and the chip having the semiconductor integrated circuit is a semiconductor device having a driving circuit for the light sensor portion and a driving circuit for the display portion.

[0026] The present invention also provides a configuration in which an IC is disposed on an FPC and which has a touch panel section, and the configuration includes a first substrate having a display section, a light sensor section, and a terminal section, a film having wiring electrically connected to the terminal section, and a chip having at least one semiconductor integrated circuit mounted on the film, the touch panel section is provided on one surface of a second substrate overlapping the display section, the one surface of the first substrate and the one surface of the second substrate are fixed opposite each other, and the chip having the semiconductor integrated circuit is a semiconductor device having a drive circuit for the display section, a drive circuit for the light sensor section, and a drive circuit for the touch panel section.

[0027] In addition, in the above configuration, a single chip on the FPC has three types of drive circuits, but this is not particularly limited, and a single chip on the FPC may have two types of drive circuits.

[0028] The present invention also provides a configuration in which the two types of driver circuits are a driver circuit for a display section and a driver circuit for a touch panel section. The configuration includes a first substrate having a display section, a light sensor section, and a terminal section, a film having wiring electrically connected to the terminal section, and a chip having at least one semiconductor integrated circuit mounted on the film. The touch panel section is provided on one surface of a second substrate overlapping the display section, and one surface of the first substrate and one surface of the second substrate are fixed opposite each other, and the chip having the semiconductor integrated circuit is a semiconductor device having a driver circuit for the display section and a driver circuit for the touch panel section.

[0029] Another aspect of the present invention is a configuration in which the two types of driver circuits are a driver circuit for the optical sensor portion and a driver circuit for the touch panel portion, and the semiconductor device includes a first substrate having a display portion, an optical sensor portion, and a terminal portion, a film having wiring electrically connected to the terminal portion, and a chip having at least one semiconductor integrated circuit mounted on the film, the touch panel portion is provided on one surface of a second substrate overlapping the display portion, the one surface of the first substrate and the one surface of the second substrate are fixed opposite each other, and the chip having the semiconductor integrated circuit is provided with a driver circuit for the optical sensor portion and a driver circuit for the touch panel portion.

[0030] In each of the above configurations, the display unit emits light to the outside, and the light sensor unit receives the reflected light of the light. In each of the above configurations, the display unit has a pixel electrode and a plurality of transistors electrically connected to the pixel electrode. Also, in each of the above configurations, the display unit has an organic compound layer functioning as a light-emitting layer on the pixel electrode of the display unit. Also, in each of the above configurations, the light sensor unit has a light receiving unit. Also, in each of the above configurations, the organic compound layer provided on the pixel electrode of the display unit contains the same material as the organic compound layer of the light sensor unit. It is preferable that the light receiving unit of the light sensor unit includes an organic compound layer and has at least one layer in common with the light-emitting element including the organic compound layer of the display unit, since this simplifies the process.

[0031] In each of the above structures, the display unit includes a plurality of transistors using an oxide semiconductor (also referred to as OS transistors). Specifically, a metal oxide that functions as an oxide semiconductor including a channel formation region is used. For example, a metal oxide such as In-M-Zn oxide (wherein the element M is one or more elements selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, tin, magnesium, or the like) may be used as the oxide semiconductor.

[0032] Moreover, instead of a transistor using an oxide semiconductor, an LTPS (Low Temperature Polysilicon) transistor may be used. A transistor using an oxide semiconductor or an LTPS transistor can be manufactured on the same substrate as a pixel transistor and a driver circuit transistor in the same process. Examples of driver circuits manufactured in the same process include a demultiplexer and a scanning line driver circuit. Moreover, a so-called LTPO structure may be used in which an LTPS transistor is formed and then a transistor using an oxide semiconductor is manufactured.

[0033] Furthermore, one chip having a plurality of types of driver circuits may have a structure including a stack of transistors provided on a single crystal silicon substrate and transistors having an oxide semiconductor. For example, a circuit that operates at high speed may be formed using transistors provided on a single crystal silicon substrate, and a circuit that functions as a memory may be formed using transistors having an oxide semiconductor, thereby increasing the degree of integration. Furthermore, a transistor having an oxide semiconductor can be further stacked on the transistor having an oxide semiconductor.

[0034] Furthermore, one chip may have not only a plurality of types of driving circuits, but also other circuits, such as a receiving circuit, a charging circuit, and a CPU circuit. Effect of the Invention

[0035] According to one embodiment of the present invention, a plurality of different types of driver circuits are integrated into a single chip, thereby reducing the number of components and improving packaging efficiency.

[0036] According to one embodiment of the present invention, it is possible to provide a multifunctional display device with a touch sensor in which a driver circuit for a display portion, a driver circuit for a light sensor, and a driver circuit for a touch sensor are formed in one IC.

[0037] According to one embodiment of the present invention, a novel semiconductor device can be provided.

[0038] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not need to have all of these effects. Note that effects other than these will become apparent from the description in the specification, drawings, claims, etc., and it is possible to extract effects other than these from the description in the specification, drawings, claims, etc. [Brief description of the drawings]

[0039] [Figure 1] 1A and 1B are schematic diagrams showing configuration examples of a display device. [Diagram 2] FIG. 2 is a circuit block diagram showing an example of the configuration of the display device. [Diagram 3] 3A, 3B, 3C, and 3D are schematic cross-sectional views showing sensing methods of a display device. [Figure 4] FIG. 4 is a cross-sectional view showing a sensing method of the display device. [Diagram 5] 5A, 5B, 5C, and 5D are cross-sectional views showing an example of a display device, and FIGS. 5E, 5F, 5G, and 5H are top views showing an example of a pixel. [Figure 6] 6A, 6B, and 6C are cross-sectional views showing an example of a display device. [Figure 7] 7A, 7B, and 7C are cross-sectional views showing an example of a display device. [Figure 8] 8A, 8B, and 8C are cross-sectional views showing an example of a display device. [Figure 9] FIG. 9 is a cross-sectional view showing an example of a display device. [Figure 10] 10A and 10B are cross-sectional views showing an example of a display device. [Figure 11] 11A and 11B are cross-sectional views showing an example of a display device. [Figure 12] FIG. 12 is a cross-sectional view showing an example of a display device. [Figure 13] 13A and 13B are circuit diagrams showing an example of a pixel circuit. [Figure 14] FIG. 14 is a diagram illustrating a configuration example of a semiconductor device. [Figure 15] FIG. 15 is a diagram illustrating a configuration example of a semiconductor device. [Figure 16] 16A to 16C are diagrams showing configuration examples of transistors. [Figure 17] 17A to 17C are diagrams showing configuration examples of transistors. [Figure 18] 18A to 18C are diagrams showing configuration examples of transistors. [Figure 19]Fig. 19A is a diagram for explaining the classification of IGZO crystal structures, Fig. 19B is a diagram for explaining the XRD spectrum of a CAAC-IGZO film, and Fig. 19C is a diagram for explaining the ultrafine electron beam diffraction pattern of a CAAC-IGZO film. [Figure 20] FIG. 20A is a perspective view showing an example of an electronic device, and FIG. 20B is a cross-sectional view. [Figure 21] 21A, 21B, 21C, and 21D are diagrams showing examples of electronic devices. [Figure 22] 22A, 22B, 22C, 22D, 22E, and 22F are diagrams showing examples of electronic devices. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0040] Hereinafter, the embodiments will be described with reference to the drawings. However, it will be easily understood by those skilled in the art that the embodiments can be implemented in many different ways, and that the modes and details can be changed in various ways without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the following embodiments.

[0041] In addition, in this specification, the following embodiments can be appropriately combined. In addition, when a plurality of configuration examples are shown in one embodiment, the configuration examples can be appropriately combined.

[0042] In addition, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. Note that the drawings are schematic illustrations of ideal examples, and are not limited to the shapes or values ​​shown in the drawings.

[0043] In addition, the terms "electrode" and "wiring" used in this specification and the like do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring", and vice versa. Furthermore, the terms "electrode" and "wiring" include cases where multiple "electrodes" or "wirings" are formed integrally.

[0044] (Embodiment 1) In this embodiment, a structural example of a display device according to one embodiment of the present invention will be described with reference to FIGS.

[0045] FIG. 1A is a schematic diagram of a display device 10. FIG. 1A shows the positional relationship between a display unit 11, an optical sensor unit 14, and their peripheral circuits. The schematic diagram shown in FIG. 1 has a display unit 11, an optical sensor unit 14, an IC row 13L of a scanning line driving circuit, an IC row 13R of a scanning line driving circuit, a demultiplexer 15, an FPC (Flexible printed circuits) 19, ICs 20_1, 20_2, and 20_3 on a substrate 18. Of the three ICs arranged, IC 20_1 is arranged in the center, and ICs 20_2 and 20_3 are arranged on both sides of it. ICs 20_1 to 20_3 are connected to a host 16 shown in FIG. 2 via the FPC 19. The host 16 has a CPU and a timing controller. The optical sensor unit 14 is formed on the same substrate 18 at the same position as the display unit 11, as shown in FIG. 1A. However, the same position here does not mean an overlapping position, but each minute display region (light emitting region) and each minute optical sensor region (light receiving region) are arranged so as not to overlap.

[0046] In each of the ICs in the IC row 13L of the scanning line driving circuit and the IC row 13R of the scanning line driving circuit, a part of the driving circuit for the display section 11 and a part of the driving circuit for the photosensor section 14 are integrated into one IC.

[0047] 1A shows an example in which a total of eight ICs are arranged, including the IC row 13L of the scanning line driving circuit and the IC row 13R of the scanning line driving circuit, but this is not particularly limited, and eight ICs may be arranged on one side, or may be arranged around IC20_1, IC20_2, and IC20_3. Note that this is not limited to the example in which eight ICs are arranged, and one IC may be used to reduce the number of parts. In addition, when a display unit with a pixel count of 8K is used, eight or more ICs may be used.

[0048] The ICs 20_1 to 20_3 may be mounted by a mounting method such as a COF (Chip On Film) method or a TCP (Tape Carrier Package) method. Fig. 1B shows an example in which the ICs 20_1 to 20_3 are arranged on an FPC 19. By arranging the ICs 20_1 to 20_3 on the FPC 19, the area of ​​the substrate 18 can be reduced, and the display device 10 can be made smaller.

[0049] Moreover, the IC row 13L of the scanning line driving circuit and the IC row 13R of the scanning line driving circuit may also be provided on the FPC by a mounting method such as the COF method or TCP.

[0050] Note that, as an example, Figures 1A and 1B show an example having a total of 11 ICs, including three ICs, IC20_1, IC20_2, and IC20_3, four ICs in IC column 13L of the scanning line driving circuit, and four ICs in IC column 13R of the scanning line driving circuit, but this is not limited to this.

[0051] The display device 10 can have 11 or more ICs. Although Fig. 1B shows an example in which ICs 20_1 to 20_3 are connected to one FPC, this is not limiting. A different FPC may be provided for each IC.

[0052] In addition, when reducing the number of parts, the three ICs IC20_1, IC20_2, and IC20_3 can be integrated into one IC, the four ICs in IC column 13L of the scanning line driving circuit can be integrated into one IC, and the four ICs in IC column 13R of the scanning line driving circuit can be integrated into one IC, making a total of three ICs. If the area of ​​the display section is small, all can be integrated into one IC.

[0053] 2 is a circuit block diagram illustrating a configuration example of a display device 10 according to one embodiment of the present invention. The display device 10 includes a display unit 11, a photosensor unit 14, a scanning line driver circuit 13, ICs 20_1 to 20_m (m is an integer of 2 or more), and a host 16.

[0054] The display section 11 has a plurality of pixels 12 arranged in a matrix, a plurality of scanning lines GL, and a plurality of signal lines SL, and has a function of displaying an image.

[0055] The display unit 11 can display an image by controlling the light emission / non-light emission of the pixels 12. For example, a liquid crystal element or an EL (electroluminescence) element (wherein the EL element includes one or both of an organic compound and an inorganic compound) can be used for the pixels 12. For example, the pixels 12 can use at least one of an LED chip (a white LED chip, a red LED chip, a green LED chip, a blue LED chip, etc.), a transistor (a transistor that emits light according to a current), an electron emission element, a display element using a carbon nanotube, an electronic ink, an electrowetting element, an electrophoretic element, a display element using a MEMS (microelectromechanical system) (for example, a GLV (grating light valve), a DMD (digital micromirror device), a DMS (digital microshutter), MIRASOL (registered trademark), an IMOD (interferometric modulation) element, a shutter type MEMS display element, an optical interference type MEMS display element, a piezoelectric ceramic display unit, etc.), or a quantum dot.

[0056] In this embodiment, an EL element having an organic compound layer is used for the pixel 12.

[0057] The display unit 11 preferably has a high number of pixels such as HD (1280×720 pixels), FHD (1920×1080 pixels), WQHD (2560×1440 pixels), WQXGA (2560×1600 pixels), 4K, or 8K. In particular, it is preferable to have 4K, 8K, or more pixels. In addition, the pixel density (resolution) of the pixels provided in the display unit 11 is 300 ppi or more, preferably 500 ppi or more, more preferably 800 ppi or more, more preferably 1000 ppi or more, and more preferably 1200 ppi or more. The display unit 11 having such a high number of pixels and high resolution can enhance the sense of realism and depth in personal use such as portable and home use.

[0058] The scanning line driving circuit 13 is electrically connected to the pixels 12 via the scanning lines GL. The scanning line driving circuit 13 has a function of outputting a scanning signal to the scanning lines GL. The scanning line driving circuit 13 may also be called a gate driver.

[0059] IC20_1 has a circuit 21_1, a signal line driver circuit 22_1, a driver circuit 23 for the optical sensor portion, and a detection circuit 24 for the optical sensor portion. IC20_2 has a circuit 21_2 and a signal line driver circuit 22_2. Similarly, IC20_m has a circuit 21_m and a signal line driver circuit 22_m. Note that hereinafter, ICs 20_1 to 20_m may be collectively referred to as ICs 20_1 to 20_3, and signal line driver circuits 22_1 to 22_m may be collectively referred to as the signal line driver circuit 22.

[0060] IC20_1 is electrically connected to the signal line SL via a terminal St1, electrically connected to the host 16 via a terminal Ht1, electrically connected to the wiring CLx via a terminal Tt1, and electrically connected to the wiring CLy via a terminal Rt1. IC20_2 is electrically connected to the signal line SL via a terminal St2, and electrically connected to the host 16 via a terminal Ht2. Similarly, IC20_m is electrically connected to the signal line SL via a terminal Stm, and electrically connected to the host 16 via a terminal Htm.

[0061] It is preferable that the ICs 20_1 to 20_m are composed of a plurality of IC chips (hereinafter, referred to as ICs). For example, consider a case where the IC 20 is composed of one IC. As the resolution of the display unit 11 increases, such as 4K or 8K, the number of signal lines SL increases. As a result, the area occupied by the IC increases. An IC with a large area is difficult to manufacture and expensive. In addition, when the IC is pressed onto a substrate (or a film, etc.), there is an optimal pressure per terminal of the IC. When the display unit 11 has a high number of pixels, such as 4K or 8K, the number of terminals of the IC also becomes very large, and the load applied to the entire IC during pressing also becomes large. As a result, cracks or the like occur in the IC, making it difficult to mount the IC. By configuring the ICs 20_1 to 20_3 with a plurality of ICs, the load applied to one IC becomes small, making it easier to mount the IC.

[0062] The signal line driver circuit 22 has a function of outputting a video signal (also called a video signal) to the display unit 11. The signal line driver circuit 22 has a function of supplying a video signal, which is an analog signal, to the pixels 12 of the display unit 11 via the signal lines SL. For example, the signal line driver circuit 22 may have a configuration in which a shift register circuit and a buffer circuit are combined. The display device 10 may also have a demultiplexer circuit connected to the signal lines SL. The signal line driver circuit 22 may also be called a source driver.

[0063] The optical sensor unit drive circuit 23 is electrically connected to the optical sensor unit 14 via wiring CLx. The optical sensor unit drive circuit 23 has a function of outputting a signal for driving a sensor element of the optical sensor unit 14. The optical sensor unit drive circuit 23 may be, for example, a combination of a shift register circuit and a buffer circuit.

[0064] The detection circuit 24 of the optical sensor unit is electrically connected to the optical sensor unit 14 via the wiring CLy. The detection circuit 24 of the optical sensor unit has a function of outputting an output signal from a sensor element of the optical sensor unit 14 to the circuit 21_1. For example, the detection circuit 24 of the optical sensor unit may have a configuration including an amplifier circuit and an analog-digital conversion circuit (ADC: Analog-Digital Converter). The detection circuit 24 of the optical sensor unit converts an analog signal output from the optical sensor unit 14 into a digital signal and outputs the digital signal to the circuit 21_1.

[0065] In FIG. 2, IC20_1 is connected to a pixel 12 located at the edge of the display unit 11, but this is not limited to this, and IC20_1 may be connected to a pixel 12 located in the center of the display unit 11 or elsewhere.

[0066] The circuit 21_1 includes an image processing circuit 25_1 and a RAM 26_1. Similarly, the circuit 21_m includes an image processing circuit 25_m and a RAM 26_m. Note that, hereinafter, the image processing circuits 25_1 to 25_m may be collectively referred to as the image processing circuit 25, and the RAMs 26_1 to 26_m may be collectively referred to as the RAM 26.

[0067] The image processing circuit 25 has a function of generating a video signal in accordance with an instruction from the host 16. The image processing circuit 25 also has a function of performing signal processing on the video signal in accordance with the specifications of the display unit 11, converting it into an analog video signal, and supplying it to the signal line driving circuit 22. The image processing circuit 25_1 also has a function of generating a drive signal to be output to the drive circuit 23 of the optical sensor unit in accordance with an instruction from the host 16. The image processing circuit 25_1 also has a function of analyzing a signal input from the detection circuit 24 of the optical sensor unit, and outputting it to the host 16 as position information. The image processing circuit 25_1 also has a function of analyzing a signal input from the detection circuit 24 of the optical sensor unit, and outputting it to the host 16 as image data.

[0068] The RAM 26 has a function of holding data necessary for processing by the image processing circuit 25. The RAM 26 may also have a function of temporarily holding data (such as position information) processed by the image processing circuit.

[0069] The image processing circuit 25 may have a processor, for example. For example, a microprocessor such as a DSP (Digital Signal Processor) or a GPU (Graphics Processing Unit) may be used. These microprocessors may also be realized by PLDs (Programmable Logic Devices) such as FPGAs (Field Programmable Gate Arrays) or FPAAs (Field Programmable Analog Arrays). The processor interprets and executes commands from various programs to perform various data processing and program control.

[0070] The host 16 includes a CPU 27 and a timing controller .

[0071] The timing controller 28 receives various synchronous signals that determine the timing of rewriting the display unit 11. Examples of synchronous signals include a horizontal synchronous signal, a vertical synchronous signal, and a reference clock signal. The timing controller 28 generates control signals for the scanning line driving circuit 13, the signal line driving circuit 22, and the driving circuit 23 of the optical sensor unit from these signals. The timing controller 28 may also have a function of generating a signal that specifies the timing at which the detection circuit 24 of the optical sensor unit outputs a signal. Here, it is preferable that the timing controller 28 outputs a signal that is synchronized with the signal output to the scanning line driving circuit 13 and the signal output to the driving circuit 23 of the optical sensor unit. In particular, it is preferable to separate the period in which the data of the display unit 11 is rewritten and the period in which sensing is performed by the optical sensor unit 14. For example, the display device 10 can be driven by dividing one frame period into a period in which the data of the display unit 11 is rewritten and a period in which sensing is performed. In addition, for example, by providing two or more sensing periods in one frame period, it is possible to improve detection sensitivity and detection accuracy.

[0072] The CPU 27 has a function for executing instructions and for comprehensively controlling the display device 10. The instructions executed by the CPU 27 are instructions input from the outside and instructions stored in the internal memory. The CPU 27 generates signals for controlling the timing controller 28 and the image processing circuit 25.

[0073] By including the timing controller 28 in the host 16, it is not necessary to include a timing controller in the IC 20. This makes it possible to reduce the area occupied by the IC. It also makes it possible to keep the price of the IC low. It also makes it possible to control the timing of multiple ICs with one timing controller.

[0074] The optical sensor unit 14 has a plurality of optical sensor elements that detect contact or proximity of a detection target object to the display device 10. In this embodiment, the optical sensor unit 14 uses an optical system. A detailed description of the optical sensor unit 14 will be given in the second embodiment described later.

[0075] The display device 10 may be configured to have a capacitive touch sensor unit instead of the optical type in the optical sensor unit 14. By mounting different sensor types on the display device 10, the sensor used as the touch panel can be switched between the capacitive type and the optical type as appropriate. For example, when it is raining while going out at night and there are water droplets on the screen, the capacitive type may malfunction, so the touch panel can be an optical type. In addition, the touch sensor unit is not limited to the capacitive type, and various other types such as a resistive film type, a surface acoustic wave type, and an infrared type can be used instead of the capacitive type. In the case of the infrared type, it is possible to obtain biological information such as veins.

[0076] 3A, 3B, 3C, and 3D are schematic cross-sectional views in which a capacitive touch sensor is further provided.

[0077] The display device shown in Fig. 3A has a substrate 18, a substrate 70, an FPC 19, an IC 20, an EL element 73, a light receiving element 110, an insulating film 78, an insulating film 87, a conductive film 72, a conductive film 79, a conductive film 80, a conductive film 81, a colored film 71, a light shielding film 77, and the like. Although not shown, it is preferable to have a transistor or the like between the substrate 18 and the EL element 73. In addition, it is preferable that the conductive film 79 functions as a gate electrode, a source electrode, or a drain electrode of the transistor. The light receiving element 110 is an optical sensor, and can be called one element constituting the optical sensor unit 14.

[0078] 3A, 3B, 3C, and 3D, the IC 20 includes at least a part of a drive circuit for a capacitive touch panel.

[0079] The EL element 73 has a conductive film 74, an EL layer 75, and a conductive film 76. The conductive film 74 functions as one of the anode and cathode of the EL element 73, and the conductive film 76 functions as the other of the anode and cathode of the EL element 73. The conductive film 76 functions as a reflective film, and the conductive film 74 functions to transmit visible light. The EL layer 75 has a light-emitting layer, and when a voltage is applied between the conductive film 74 and the conductive film 76, a current flows in the EL layer 75, and the light-emitting layer included in the EL layer 75 emits light. The light emitted by the EL layer 75 is taken out to the outside of the display device through the colored film 71 and the substrate 70. The display device shown in FIG. 3A has a so-called top-emission type display device. Note that the EL layer 75 formed on the insulating film 78 does not emit light because no current flows therethrough. In addition, a light-shielding film 77 may be provided between the insulating film 78 and the substrate 70. By providing the light-shielding film 77, it is possible to improve the visibility of the display device.

[0080] The touch sensor unit can detect a touch by utilizing a capacitance formed between a conductive film 72 provided on the substrate 70 side and a conductive film 79. That is, the conductive film 72 functions as one of the wirings CLx and CLy, and the conductive film 79 functions as the other of the wirings CLx and CLy. In this way, the conductive film that functions as an electrode of a transistor also serves as an electrode of a touch sensor, which can simplify the process and reduce manufacturing costs.

[0081] 3A, it is preferable to remove the conductive film 74 on the insulating film 78. This is because, if the conductive film 74 exists on the insulating film 78, the conductive film 74 blocks the electric field lines formed between the conductive films 72 and 79, and the function of the touch sensor is impaired.

[0082] The conductive film 79 is electrically connected to the IC 20 via the conductive film 80. The conductive film 72 is electrically connected to the IC 20 via the FPC 19. The IC 20 is electrically connected to the host 16 via the conductive film 81 and the FPC 19. Note that the conductive film 80 and the conductive film 81 may be formed in the same process as the conductive film 79.

[0083] In the display device shown in FIG. 3A, a touch sensor may be configured with a capacitance formed between the conductive film 72 and the conductive film 74. An example of this case is shown in FIG. 3B. In FIG. 3B, the conductive film 72 functions as one of the wiring CLx and the wiring CLy, and the conductive film 74 functions as the other of the wiring CLx and the wiring CLy. The conductive film 72 is electrically connected to the IC 20 via the FPC 19. The conductive film 74 is electrically connected to the IC 20 via a conductive film (not shown) formed on the substrate 18.

[0084] The display device shown in FIG. 3C is an example in which the conductive film 72 is removed from the configuration of FIG. 3A, and a touch sensor is configured with a capacitance formed between a pair of wirings (conductive film 79a, conductive film 79b) configured with a conductive film 79. That is, the conductive film 79a functions as one of the wirings CLx and CLy, and the conductive film 79b functions as the other of the wirings CLx and CLy. The conductive film 79a is electrically connected to the IC 20 via the conductive film 80. Moreover, the conductive film 79b is electrically connected to the IC 20 via a conductive film (not shown) formed on the substrate 18. With such a configuration, the process can be further simplified compared to the configuration shown in FIG. 3A.

[0085] The display device shown in FIG. 3D is an example in which the conductive film 72 is removed from the configuration of FIG. 3A, and a touch sensor is configured with a capacitance formed between the conductive film 74 and the conductive film 79. That is, the conductive film 74 functions as one of the wiring CLx and the wiring CLy, and the conductive film 79 functions as the other of the wiring CLx and the wiring CLy. The conductive film 79 is electrically connected to the IC 20 via the conductive film 80. In addition, the conductive film 74 is electrically connected to the IC 20 via a conductive film (not shown) formed on the substrate 18. With such a configuration, the process can be further simplified compared to the configuration shown in FIG. 3A.

[0086] 4 is a configuration example of a COF. In FIG. 4, it is a cross-sectional schematic diagram in which a capacitive touch sensor is provided on the substrate 70 side. The touch sensor is configured by a capacitance formed between the conductive film 84 and the conductive film 85. That is, the conductive film 84 functions as one of the wiring CLx and the wiring CLy, and the conductive film 85 functions as the other of the wiring CLx and the wiring CLy. The conductive film 85 and the conductive film 84 are electrically connected to the IC 20 via the FPC 19.

[0087] Also, IC20 is configured using transistors provided on a single crystal silicon substrate. Also, in Fig. 4, IC20 is configured as a stack of signal line driving circuit 22_m and optical sensor section driving circuit 23. For example, signal line driving circuit 22_m can be configured using transistors provided on a single crystal silicon substrate, and optical sensor section driving circuit 23 can be configured using OS transistors. Also, if these driving circuits have a common circuit, the circuit scale can be further reduced.

[0088] Alternatively, the IC 20 may be an IC chip in which a transistor having an oxide semiconductor in a channel region is formed on a single crystal silicon substrate.

[0089] Furthermore, by stacking transistors each having an oxide semiconductor in a channel region, a plurality of types of circuits can be stacked.

[0090] Note that a detailed description of an IC chip in which a transistor having an oxide semiconductor in a channel region is formed over a transistor provided on a single crystal silicon substrate is given in Embodiment 3 to be described later.

[0091] In the configuration of FIG. 3 or FIG. 4, the pixel signal line drive circuit, the capacitive touch sensor drive circuit, and the light sensor signal line drive circuit may be integrated into a single chip. Each drive circuit may be integrated into a single chip in various combination patterns. At least two of the pixel signal line drive circuit, the capacitive touch sensor drive circuit, and the light sensor signal line drive circuit may be integrated into a single chip. At least one of the pixel signal line drive circuit, the capacitive touch sensor drive circuit, and the light sensor signal line drive circuit does not have to be integrated into a single chip with the other drive circuits.

[0092] For example, a plurality of IC chips may be mounted on one display device 10. In this case, the drive circuits for each IC chip may be integrated into one chip in various combination patterns.

[0093] For example, the pixel signal line drive circuit and the capacitive touch sensor drive circuit may be integrated into one chip, IC chip A, the pixel signal line drive circuit and the optical sensor signal line drive circuit may be integrated into one chip, and IC chip C may be integrated with only the pixel signal line drive circuit. One display device 10 may be equipped with IC chip A, IC chip B, and IC chip C.

[0094] Alternatively, for example, the display pixel signal line drive circuit, the capacitive touch sensor drive circuit, and the photosensor signal line drive circuit may be integrated into a single chip, IC chip D, and the display pixel signal line drive circuit and the photosensor signal line drive circuit may be integrated into a single chip, IC chip B. Then, one display device 10 may be equipped with both IC chip D and IC chip B.

[0095] Alternatively, for example, only the display pixel signal line drive circuit may be integrated into a single IC chip C, and the capacitive touch sensor drive circuit and the optical sensor signal line drive circuit may be integrated into a single IC chip E. Then, one display device 10 may be equipped with both the IC chip C and the IC chip E.

[0096] Alternatively, for example, the display pixel signal line drive circuit, the capacitive touch sensor drive circuit, and the photosensor signal line drive circuit may be integrated into a single chip, IC chip D, and the display pixel signal line drive circuit and the photosensor signal line drive circuit may be integrated into a single chip, IC chip B. Then, one display device 10 may be equipped with both IC chip D and IC chip B.

[0097] The circuit that supplies signals to the scan line driver circuit may also be integrated into a single chip. For example, a circuit that supplies a start pulse signal and a clock signal to the scan line driver circuit for the OS transistors (or LTPS transistors) for display pixels and a circuit that supplies a start pulse signal and a clock signal to the scan line driver circuit for the OS transistors (or LTPS transistors) for photosensors may be integrated into a single chip. These circuits may also be integrated into at least one of the IC chips A, B, C, and D.

[0098] It should be noted that an LTPS (Low Temperature Polysilicon) transistor refers to a transistor in which a polysilicon film formed by a low-temperature process on a glass substrate or a plastic film serves as a channel formation region.

[0099] As shown in this embodiment, by integrating a plurality of different types of driving circuits onto a single chip, the number of components can be reduced and the packaging efficiency can be improved.

[0100] Furthermore, the display device 10 shown in this embodiment has multiple functions, and a display device with a touch sensor can be provided in which a drive circuit for the display unit, a drive circuit for the optical sensor, and a drive circuit for the touch sensor are formed in a single IC.

[0101] (Embodiment 2) In this embodiment mode, the top surface and cross-sectional structures of the optical sensor portion 14 shown in Embodiment 1 and a display device including the optical sensor portion 14 will be described below.

[0102] The display device exemplified below is a device having a function of displaying an image and a function of capturing an image of a subject overlapping the screen.

[0103] The display device of this embodiment has a light receiving element and a light emitting element in a display portion. Specifically, the light emitting elements are arranged in a matrix in the display portion, and an image can be displayed on the display portion. The light receiving elements are arranged in a matrix in the display portion, and the display portion also functions as a light receiving portion. The light receiving portion can be used as an image sensor or a touch sensor. That is, by detecting light with the light receiving portion, image data can be obtained, that is, imaging can be performed, and the proximity or contact of an object (such as a finger or a pen) can be detected.

[0104] In the display device of this embodiment, when an object reflects the light emitted by a light-emitting element in the display unit, the light-receiving element can detect the reflected light, making it possible to capture images and detect touches (including near-touches) even in dark places.

[0105] The display device of this embodiment has a function of displaying an image using a light-emitting element, that is, the light-emitting element functions as a display element.

[0106] As the light-emitting element, it is preferable to use an EL element such as an OLED (Organic Light Emitting Diode) or a QLED (Quantum-dot Light Emitting Diode). Examples of the light-emitting substance that the EL element has include a substance that emits fluorescence (fluorescent material), a substance that emits phosphorescence (phosphorescent material), an inorganic compound (such as a quantum dot material), and a substance that exhibits thermally activated delayed fluorescence (thermally activated delayed fluorescence: TADF material). Also, an LED such as a micro LED (Light Emitting Diode) can be used as the light-emitting element.

[0107] The display device of this embodiment mode has a function of detecting light using a light receiving element.

[0108] In the case where the light receiving element is used as an image sensor, the display device of this embodiment mode can capture an image by using the light receiving element.

[0109] For example, data such as fingerprints, palm prints, or irises can be acquired using an image sensor. That is, a biometric authentication sensor can be built into the display device of the present embodiment. By building a biometric authentication sensor into the display device, the number of components in the electronic device can be reduced, and the electronic device can be made smaller and lighter, compared to a case where a biometric authentication sensor is provided separately from the display device.

[0110] In addition, data such as the user's facial expression, eye movement, or change in pupil diameter can be obtained using an image sensor. By analyzing the data, the user's mental and physical information can be obtained. By changing the display and / or audio output content based on the information, it is possible to ensure that the user can use the device safely, for example, in a VR (Virtual Reality) device, an AR (Augmented Reality) device, or an MR (Mixed Reality) device.

[0111] When the light-receiving element is used as a touch sensor, the display device of this embodiment can detect the proximity or contact of an object by using the light-receiving element.

[0112] The light receiving element can be, for example, a pn-type or pin-type photodiode. The light receiving element functions as a photoelectric conversion element that detects light incident on the light receiving element and generates electric charge. The amount of electric charge generated is determined based on the amount of incident light.

[0113] In particular, it is preferable to use an organic photodiode having a layer containing an organic compound as the light receiving element. Organic photodiodes can be easily made thin, lightweight, and large in area, and have a high degree of freedom in shape and design, and therefore can be applied to various display devices.

[0114] In one embodiment of the present invention, an organic EL element is used as a light-emitting element, and an organic photodiode is used as a light-receiving element. Many layers of an organic photodiode can be configured in common with an organic EL element. Therefore, a light-receiving element can be built into a display device without significantly increasing the number of manufacturing steps. For example, an active layer of the light-receiving element and a light-emitting layer of the light-emitting element can be separately manufactured, and the other layers can be configured in the same manner for the light-emitting element and the light-receiving element.

[0115] 5A, 5B, 5C, and 5D are schematic cross-sectional views of a part of a display device according to one embodiment of the present invention.

[0116] A display device 50A shown in FIG. 5A has, between a substrate 51 and a substrate 59, a layer 53 having light receiving elements and a layer 57 having light emitting elements.

[0117] A display device 50B shown in FIG. 5B includes, between a substrate 51 and a substrate 59, a layer 53 having light receiving elements, a layer 55 having transistors, and a layer 57 having light emitting elements.

[0118] The display device 50A and the display device 50B are configured such that red (R), green (G), and blue (B) light are emitted from a layer 57 having light emitting elements.

[0119] A display device according to an embodiment of the present invention has a plurality of pixels arranged in a matrix. Each pixel has one or more sub-pixels. Each sub-pixel has one light-emitting element. For example, the pixel may have three sub-pixels (three colors: R, G, and B, or three colors: yellow (Y), cyan (C), and magenta (M)) or four sub-pixels (four colors: R, G, B, and white (W), or four colors: R, G, B, and Y). The pixel further has a light-receiving element. The light-receiving element may be provided in all pixels or in some pixels. Also, one pixel may have a plurality of light-receiving elements.

[0120] The layer 55 having transistors preferably has a first transistor and a second transistor. The first transistor is electrically connected to the light receiving element. The second transistor is electrically connected to the light emitting element.

[0121] The display device according to one embodiment of the present invention may have a function of detecting an object such as a finger touching the display device. For example, as shown in Fig. 5C, light emitted by a light-emitting element in a layer 57 having a light-emitting element is reflected by a finger 52 touching the display device 50B, and the light-receiving element in a layer 53 having a light-receiving element detects the reflected light. This makes it possible to detect that the finger 52 has touched the display device 50B.

[0122] The display device according to one embodiment of the present invention may have a function of detecting or capturing an image of an object that is close to (not in contact with) display device 50B, as shown in FIG. 5D.

[0123] 5E, 5F, 5G and 5H show examples of pixels.

[0124] The pixel shown in Fig. 5E and Fig. 5F has three sub-pixels (three light-emitting elements) of R, G, and B, and a light-receiving element PD. Fig. 5E is an example in which the three sub-pixels and the light-receiving element PD are arranged in a 2 × 2 matrix, and Fig. 5F is an example in which the three sub-pixels and the light-receiving element PD are arranged in a single horizontal row.

[0125] The pixel shown in FIG. 5G has four sub-pixels (four light-emitting elements) of R, G, B, and W, and a light-receiving element PD.

[0126] The pixel shown in FIG. 5H has three sub-pixels, R, G, and B, a light-emitting element IR that emits infrared light, and a light-receiving element PD. In this case, it is preferable that the light-receiving element PD has a function of detecting infrared light. The light-receiving element PD may have a function of detecting both visible light and infrared light. The wavelength of light detected by the light-receiving element PD can be determined according to the application of the sensor.

[0127] A detailed configuration of a display device according to one embodiment of the present invention will be described below with reference to FIGS.

[0128] FIG. 6A shows a cross-sectional view of the display device 10A.

[0129] The display device 10A includes a light receiving element 110 and a light emitting element 190.

[0130] The light receiving element 110 includes a pixel electrode 111 , a common layer 112 , an active layer 113 , a common layer 114 , and a common electrode 115 .

[0131] The light emitting element 190 includes a pixel electrode 191 , a common layer 112 , a light emitting layer 193 , a common layer 114 , and a common electrode 115 .

[0132] The pixel electrode 111, the pixel electrode 191, the common layer 112, the active layer 113, the light-emitting layer 193, the common layer 114, and the common electrode 115 may each have a single-layer structure or a multilayer structure.

[0133] The pixel electrode 111 and the pixel electrode 191 are located on an insulating layer 214. The pixel electrode 111 and the pixel electrode 191 can be formed of the same material and in the same process.

[0134] The common layer 112 is located on the pixel electrodes 111 and 191. The common layer 112 is a layer shared by the light receiving element 110 and the light emitting element 190.

[0135] The active layer 113 overlaps with the pixel electrode 111 through the common layer 112. The light-emitting layer 193 overlaps with the pixel electrode 191 through the common layer 112. The active layer 113 has a first organic compound, and the light-emitting layer 193 has a second organic compound different from the first organic compound.

[0136] The common layer 114 is located on the common layer 112, on the active layer 113, and on the light-emitting layer 193. The common layer 114 is a layer that is used in common by the light-receiving element 110 and the light-emitting element 190.

[0137] The common electrode 115 has a portion overlapping with the pixel electrode 111 via the common layer 112, the active layer 113, and the common layer 114. The common electrode 115 also has a portion overlapping with the pixel electrode 191 via the common layer 112, the light-emitting layer 193, and the common layer 114. The common electrode 115 is a layer shared by the light-receiving element 110 and the light-emitting element 190.

[0138] In the display device of the present embodiment, an organic compound is used for the active layer 113 of the light receiving element 110. The layers of the light receiving element 110 other than the active layer 113 can be configured in common with the light emitting element 190 (EL element). Therefore, the light receiving element 110 can be formed in parallel with the formation of the light emitting element 190 by simply adding a process of forming the active layer 113 to the manufacturing process of the light emitting element 190. In addition, the light emitting element 190 and the light receiving element 110 can be formed on the same substrate. Therefore, the light receiving element 110 can be built into the display device without significantly increasing the number of manufacturing processes.

[0139] In the display device 10A, the light receiving element 110 and the light emitting element 190 have a common configuration, except that the active layer 113 of the light receiving element 110 and the light emitting layer 193 of the light emitting element 190 are separately fabricated. However, the configuration of the light receiving element 110 and the light emitting element 190 is not limited to this. The light receiving element 110 and the light emitting element 190 may have layers that are separately fabricated from each other, in addition to the active layer 113 and the light emitting layer 193 (see display devices 10K, 10L, and 10M described later). It is preferable that the light receiving element 110 and the light emitting element 190 have one or more layers that are used in common (common layers). This allows the light receiving element 110 to be built into the display device without significantly increasing the number of fabrication steps.

[0140] The display device 10A has a light receiving element 110, a light emitting element 190, a transistor 41, a transistor 42, and the like between a pair of substrates (substrate 151 and substrate 152).

[0141] In the light receiving element 110, the common layer 112, the active layer 113, and the common layer 114, which are located between the pixel electrode 111 and the common electrode 115, can also be called organic layers (layers containing an organic compound). The pixel electrode 111 preferably has a function of reflecting visible light. The end of the pixel electrode 111 is covered with a partition wall 216. The common electrode 115 has a function of transmitting visible light.

[0142] The light receiving element 110 has a function of detecting light. Specifically, the light receiving element 110 is a photoelectric conversion element that receives light 29 incident from the outside of the display device 10A and converts it into an electrical signal. The light 29 can also be said to be light emitted by the light emitting element 190 and reflected by an object. The light 29 may also be incident on the light receiving element 110 via a lens, which will be described later.

[0143] A light-shielding layer BM is provided on the surface of the substrate 152 facing the substrate 151. The light-shielding layer BM has openings at positions overlapping the light receiving element 110 and the light emitting element 190. By providing the light-shielding layer BM, the range in which the light receiving element 110 detects light can be controlled.

[0144] The light-shielding layer BM may be made of a material that blocks light emitted from the light-emitting element. The light-shielding layer BM preferably absorbs visible light. For example, the light-shielding layer BM may be made of a black matrix using a metal material, or a resin material containing a pigment (such as carbon black) or a dye. The light-shielding layer BM may have a laminated structure of a red color filter, a green color filter, and a blue color filter.

[0145] Here, the light receiving element 110 detects the light emitted by the light emitting element 190 reflected by the object. However, there are cases where the light emitted by the light emitting element 190 is reflected inside the display device 10A and enters the light receiving element 110 without passing through the object. The light shielding layer BM can suppress the influence of such stray light. For example, if the light shielding layer BM is not provided, the light 23a emitted by the light emitting element 190 may be reflected by the substrate 152, and the reflected light 23b may enter the light receiving element 110. By providing the light shielding layer BM, it is possible to suppress the reflected light 23b from entering the light receiving element 110. This can reduce noise and increase the sensitivity of the sensor using the light receiving element 110.

[0146] In the light-emitting element 190, the common layer 112, the light-emitting layer 193, and the common layer 114, which are located between the pixel electrode 191 and the common electrode 115, can also be called EL layers. The pixel electrode 191 preferably has a function of reflecting visible light. An end of the pixel electrode 191 is covered with a partition wall 216. The pixel electrode 111 and the pixel electrode 191 are electrically insulated from each other by the partition wall 216. The common electrode 115 has a function of transmitting visible light.

[0147] The light emitting element 190 has a function of emitting visible light. Specifically, the light emitting element 190 is an electroluminescent element that emits light toward the substrate 152 side by applying a voltage between the pixel electrode 191 and the common electrode 115 (see emission 21).

[0148] It is preferable that the light emitting layer 193 is formed so as not to overlap with the light receiving region of the light receiving element 110. This can suppress the light emitting layer 193 from absorbing the light 29, and can increase the amount of light irradiated to the light receiving element 110.

[0149] The pixel electrode 111 is electrically connected to the source or drain of the transistor 41 through an opening provided in the insulating layer 214. An end of the pixel electrode 111 is covered with a partition wall 216.

[0150] The pixel electrode 191 is electrically connected to a source or a drain of the transistor 42 through an opening provided in the insulating layer 214. An end of the pixel electrode 191 is covered with a partition wall 216. The transistor 42 has a function of controlling driving of the light-emitting element 190.

[0151] The transistor 41 and the transistor 42 are in contact with each other on the same layer (substrate 151 in FIG. 6A).

[0152] At least a part of the circuit electrically connected to the light receiving element 110 is preferably formed of the same material and in the same process as the circuit electrically connected to the light emitting element 190. This allows the thickness of the display device to be thinner and the manufacturing process to be simplified compared to the case where the two circuits are formed separately.

[0153] The light receiving element 110 and the light emitting element 190 are preferably covered with a protective layer 195. In Fig. 6A, the protective layer 195 is provided on and in contact with the common electrode 115. By providing the protective layer 195, impurities such as water can be prevented from entering the light receiving element 110 and the light emitting element 190, and the reliability of the light receiving element 110 and the light emitting element 190 can be improved. In addition, the protective layer 195 and the substrate 152 are bonded together by the adhesive layer 142.

[0154] As shown in Fig. 7A, a protective layer does not necessarily have to be provided on the light receiving element 110 and the light emitting element 190. In Fig. 7A, the common electrode 115 and the substrate 152 are bonded together by the adhesive layer 142.

[0155] [Display device 10B] 6B shows a cross-sectional view of display device 10B. In the following description of the display device, the description of the same configuration as the display device described above may be omitted.

[0156] A display device 10B shown in FIG. 6B includes a lens 149 in addition to the components of the display device 10A.

[0157] The display device of the present embodiment may have a lens 149. The lens 149 is provided at a position overlapping with the light receiving element 110. In the display device 10B, the lens 149 is provided in contact with the substrate 152. The lens 149 of the display device 10B has a convex surface facing the substrate 151 side. Alternatively, the lens 149 may have a convex surface facing the substrate 152 side.

[0158] When both the light-shielding layer BM and the lens 149 are formed on the same surface of the substrate 152, the order of formation does not matter. Fig. 6B shows an example in which the lens 149 is formed first, but the light-shielding layer BM may be formed first. In Fig. 6B, the edge of the lens 149 is covered with the light-shielding layer BM.

[0159] The display device 10B is configured such that the light 29 is incident on the light receiving element 110 via the lens 149. When the lens 149 is included, the imaging range of the light receiving element 110 can be narrowed compared to when the lens 149 is not included, and the imaging range of the light receiving element 110 can be prevented from overlapping with that of the adjacent light receiving element 110. This allows a clear image with less blurring to be captured. In addition, when the imaging range of the light receiving element 110 is the same, when the lens 149 is included, the size of the pinhole (corresponding to the size of the opening of the BM overlapping with the light receiving element 110 in FIG. 6B) can be made larger compared to when the lens 149 is not included. Therefore, by including the lens 149, the amount of light incident on the light receiving element 110 can be increased.

[0160] The display devices shown in FIGS. 7B and 7C each have a configuration in which light 29 is incident on light receiving element 110 via lens 149, similar to display device 10B shown in FIG. 6B.

[0161] In Fig. 7B, lens 149 is provided in contact with the upper surface of protective layer 195. Lens 149 of the display device shown in Fig. 7B has a convex surface facing substrate 152 side.

[0162] 7C has a lens array 146 provided on the display surface side of a substrate 152. Lenses of the lens array 146 are provided at positions overlapping with the light receiving elements 110. A light-shielding layer BM is preferably provided on the surface of the substrate 152 facing the substrate 151.

[0163] As a method for forming lenses used in the display device of this embodiment, lenses such as microlenses may be formed directly on a substrate or a light receiving element, or a lens array such as a microlens array that is separately manufactured may be bonded to the substrate.

[0164] FIG. 6C shows a cross-sectional view of the display device 10C.

[0165] A display device 10C shown in FIG. 6C differs from the display device 10A in that it does not have the substrate 151, the substrate 152, and the partition wall 216, but has the substrate 153, the substrate 154, the adhesive layer 155, the insulating layer 212, and the partition wall 217.

[0166] The substrate 153 and the insulating layer 212 are bonded together by an adhesive layer 155. The substrate 154 and the protective layer 195 are bonded together by an adhesive layer 142.

[0167] The display device 10C is manufactured by transferring the insulating layer 212, the transistor 41, the transistor 42, the light receiving element 110, the light emitting element 190, and the like, which are formed on a manufacturing substrate, onto a substrate 153. Each of the substrates 153 and 154 is preferably flexible. This can increase the flexibility of the display device 10C. For example, each of the substrates 153 and 154 is preferably made of a resin.

[0168] The substrates 153 and 154 may each be made of polyester resin such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc. One or both of the substrates 153 and 154 may be made of glass having a thickness sufficient to provide flexibility.

[0169] A film having high optical isotropy may be used for the substrate of the display device of this embodiment. Examples of the film having high optical isotropy include a triacetyl cellulose (TAC, also called cellulose triacetate) film, a cycloolefin polymer (COP) film, a cycloolefin copolymer (COC) film, and an acrylic film.

[0170] It is preferable that the partition 217 absorbs light emitted by the light emitting element. For example, a black matrix can be formed by using a resin material containing a pigment or a dye as the partition 217. In addition, by using a brown resist material, the partition 217 can be formed of a colored insulating layer.

[0171] Light 23c emitted by the light emitting element 190 is reflected by the substrate 152 and the partition 217, and reflected light 23d may enter the light receiving element 110. Furthermore, light 23c may pass through the partition 217 and be reflected by a transistor, wiring, or the like, causing the reflected light to enter the light receiving element 110. The light 23c is absorbed by the partition 217, so that the reflected light 23d can be prevented from entering the light receiving element 110. This can reduce noise and increase the sensitivity of the sensor using the light receiving element 110.

[0172] It is preferable that the partition 217 absorbs at least the wavelength of light detected by the light receiving element 110. For example, when the light receiving element 110 detects green light emitted by the light emitting element 190, it is preferable that the partition 217 absorbs at least the green light. For example, when the partition 217 has a red color filter, it is possible to absorb the green light 23c and prevent the reflected light 23d from entering the light receiving element 110.

[0173] FIG. 8A shows a cross-sectional view of display device 10K, FIG. 8B shows a cross-sectional view of display device 10L, and FIG. 8C shows a cross-sectional view of display device 10M.

[0174] The display device 10K differs from the display device 10A in that it does not have the common layer 114, but has a buffer layer 184 and a buffer layer 194. The buffer layer 184 and the buffer layer 194 may each have a single-layer structure or a multilayer structure.

[0175] In the display device 10K, the light receiving element 110 has a pixel electrode 111, a common layer 112, an active layer 113, a buffer layer 184, and a common electrode 115. In the display device 10K, the light emitting element 190 has a pixel electrode 191, a common layer 112, a light emitting layer 193, a buffer layer 194, and a common electrode 115.

[0176] The display device 10L differs from the display device 10A in that it does not have the common layer 112, but has a buffer layer 182 and a buffer layer 192. The buffer layer 182 and the buffer layer 192 may each have a single-layer structure or a multilayer structure.

[0177] In the display device 10L, the light receiving element 110 has a pixel electrode 111, a buffer layer 182, an active layer 113, a common layer 114, and a common electrode 115. In the display device 10L, the light emitting element 190 has a pixel electrode 191, a buffer layer 192, a light emitting layer 193, the common layer 114, and the common electrode 115.

[0178] The display device 10M differs from the display device 10A in that it does not have the common layer 112 and the common layer 114, but has the buffer layer 182, the buffer layer 184, the buffer layer 192, and the buffer layer 194.

[0179] In the display device 10M, the light receiving element 110 has a pixel electrode 111, a buffer layer 182, an active layer 113, a buffer layer 184, and a common electrode 115. In the display device 10M, the light emitting element 190 has a pixel electrode 191, a buffer layer 192, a light emitting layer 193, a buffer layer 194, and the common electrode 115.

[0180] In the manufacture of the light receiving element 110 and the light emitting element 190, not only the active layer 113 and the light emitting layer 193 can be separately manufactured, but also other layers can be separately manufactured.

[0181] In the display device 10K, an example is shown in which a buffer layer 184 between the common electrode 115 and the active layer 113 and a buffer layer 194 between the common electrode 115 and the light-emitting layer 193 are separately formed. As the buffer layer 194, for example, one or both of an electron injection layer and an electron transport layer can be formed.

[0182] In the display device 10L, an example is shown in which a buffer layer 182 between the pixel electrode 111 and the active layer 113 and a buffer layer 192 between the pixel electrode 191 and the light-emitting layer 193 are separately formed. As the buffer layer 192, for example, one or both of a hole injection layer and a hole transport layer can be formed.

[0183] The display device 10M shows an example in which the light receiving element 110 and the light emitting element 190 do not have a common layer between a pair of electrodes (the pixel electrode 111 or the pixel electrode 191 and the common electrode 115). The light receiving element 110 and the light emitting element 190 of the display device 10M can be manufactured by forming the pixel electrode 111 and the pixel electrode 191 on the insulating layer 214 using the same material and in the same process, forming the buffer layer 182, the active layer 113, and the buffer layer 184 on the pixel electrode 111, forming the buffer layer 192, the light emitting layer 193, and the buffer layer 194 on the pixel electrode 191, and then forming the common electrode 115 so as to cover the pixel electrode 111, the buffer layer 182, the active layer 113, the buffer layer 184, the pixel electrode 191, the buffer layer 192, the light emitting layer 193, and the buffer layer 194. The order of forming the stacked structure of the buffer layer 182, the active layer 113, and the buffer layer 184 and the stacked structure of the buffer layer 192, the light-emitting layer 193, and the buffer layer 194 is not particularly limited. For example, the buffer layer 192, the light-emitting layer 193, and the buffer layer 194 may be formed after the buffer layer 182, the active layer 113, and the buffer layer 184 are formed. Conversely, the buffer layer 192, the light-emitting layer 193, and the buffer layer 194 may be formed before the buffer layer 182, the active layer 113, and the buffer layer 184 are formed. Also, the buffer layer 182, the buffer layer 192, the active layer 113, the light-emitting layer 193, and the like may be formed alternately in this order.

[0184] A display device 100A shown in FIG. 9 includes a transistor 201, a transistor 205, a transistor 206, a light-emitting element 190, a light-receiving element 110, and the like between a substrate 151 and a substrate 152. The display device 100A shown in FIG.

[0185] The substrate 152 and the insulating layer 214 are bonded via an adhesive layer 142. A solid sealing structure, a hollow sealing structure, or the like can be applied to seal the light emitting element 190 and the light receiving element 110. In FIG. 9, a space 143 surrounded by the substrate 152, the adhesive layer 142, and the insulating layer 214 is filled with an inert gas (nitrogen, argon, or the like), and a hollow sealing structure is applied. The adhesive layer 142 may be provided overlapping the light emitting element 190. In addition, the space 143 surrounded by the substrate 152, the adhesive layer 142, and the insulating layer 214 may be filled with a resin different from the adhesive layer 142.

[0186] The light-emitting element 190 has a layered structure in which a pixel electrode 191, a common layer 112, a light-emitting layer 193, a common layer 114, and a common electrode 115 are layered in this order from the insulating layer 214 side. The pixel electrode 191 is connected to a conductive layer 222b of the transistor 206 through an opening provided in the insulating layer 214. The transistor 206 has a function of controlling driving of the light-emitting element 190. An end of the pixel electrode 191 is covered with a partition wall 216. The pixel electrode 191 contains a material that reflects visible light, and the common electrode 115 contains a material that transmits visible light.

[0187] The light receiving element 110 has a layered structure in which a pixel electrode 111, a common layer 112, an active layer 113, a common layer 114, and a common electrode 115 are layered in this order from the insulating layer 214 side. The pixel electrode 111 is electrically connected to a conductive layer 222b of the transistor 205 through an opening provided in the insulating layer 214. An end of the pixel electrode 111 is covered with a partition wall 216. The pixel electrode 111 contains a material that reflects visible light, and the common electrode 115 contains a material that transmits visible light.

[0188] Light emitted by the light emitting element 190 is emitted towards the substrate 152. Light is incident on the light receiving element 110 via the substrate 152 and the space 143. The substrate 152 is preferably made of a material that is highly transparent to visible light.

[0189] The pixel electrodes 111 and 191 can be manufactured using the same material and in the same process. The common layer 112, the common layer 114, and the common electrode 115 are used for both the light receiving element 110 and the light emitting element 190. The light receiving element 110 and the light emitting element 190 can have the same configuration except for the configurations of the active layer 113 and the light emitting layer 193. This allows the light receiving element 110 to be built into the display device 100A without significantly increasing the number of manufacturing steps.

[0190] A light-shielding layer BM is provided on the surface of the substrate 152 facing the substrate 151. The light-shielding layer BM has openings at positions overlapping the light receiving element 110 and the light emitting element 190. By providing the light-shielding layer BM, the range in which the light receiving element 110 detects light can be controlled. Furthermore, by having the light-shielding layer BM, it is possible to prevent light from being directly incident on the light receiving element 110 from the light emitting element 190 without passing through an object. Therefore, a sensor with low noise and high sensitivity can be realized.

[0191] A transistor 201, a transistor 205, and a transistor 206 are all formed over a substrate 151. These transistors can be manufactured using the same material and through the same process.

[0192] An insulating layer 211, an insulating layer 213, an insulating layer 215, and an insulating layer 214 are provided over the substrate 151 in this order. A part of the insulating layer 211 functions as a gate insulating layer for each transistor. A part of the insulating layer 213 functions as a gate insulating layer for each transistor. The insulating layer 215 is provided to cover the transistors. The insulating layer 214 is provided to cover the transistors and functions as a planarizing layer. Note that the number of gate insulating layers and the number of insulating layers covering the transistors are not limited, and each may be a single layer or two or more layers.

[0193] It is preferable that at least one of the insulating layers covering the transistors is made of a material that is difficult for impurities such as water and hydrogen to diffuse into. This allows the insulating layer to function as a barrier layer. With this structure, it is possible to effectively prevent impurities from diffusing into the transistors from the outside, thereby improving the reliability of the display device.

[0194] It is preferable to use an inorganic insulating film for each of the insulating layers 211, 213, and 215. As the inorganic insulating film, for example, an inorganic insulating film such as a silicon nitride film, a silicon oxynitride film, a silicon oxide film, a silicon nitride oxide film, an aluminum oxide film, or an aluminum nitride film can be used. Also, a hafnium oxide film, an yttrium oxide film, a zirconium oxide film, a gallium oxide film, a tantalum oxide film, a magnesium oxide film, a lanthanum oxide film, a cerium oxide film, or a neodymium oxide film may be used. Also, two or more of the above insulating films may be stacked.

[0195] Here, the organic insulating film often has a lower barrier property than the inorganic insulating film. Therefore, it is preferable that the organic insulating film has an opening near the end of the display device 100A. This makes it possible to suppress impurities from entering through the organic insulating film from the end of the display device 100A. Alternatively, the organic insulating film may be formed so that the end of the organic insulating film is located inside the end of the display device 100A, so that the organic insulating film is not exposed at the end of the display device 100A.

[0196] An organic insulating film is suitable for the insulating layer 214 that functions as a planarizing layer. Materials that can be used for the organic insulating film include acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimideamide resin, siloxane resin, benzocyclobutene resin, phenol resin, and precursors of these resins.

[0197] 9, an opening is formed in the insulating layer 214. This makes it possible to prevent impurities from entering the display unit 162 from the outside through the insulating layer 214, even when an organic insulating film is used for the insulating layer 214. This makes it possible to improve the reliability of the display device 100A.

[0198] The transistor 201, the transistor 205, and the transistor 206 each have a conductive layer 221 functioning as a gate, an insulating layer 211 functioning as a gate insulating layer, a conductive layer 222a and a conductive layer 222b functioning as a source and a drain, a semiconductor layer 231, an insulating layer 213 functioning as a gate insulating layer, and a conductive layer 223 functioning as a gate. Here, the same hatched pattern is applied to a plurality of layers obtained by processing the same conductive film. The insulating layer 211 is located between the conductive layer 221 and the semiconductor layer 231. The insulating layer 213 is located between the conductive layer 223 and the semiconductor layer 231.

[0199] The structure of the transistor included in the display device of this embodiment is not particularly limited. For example, a planar transistor, a staggered transistor, an inverted staggered transistor, or the like can be used. In addition, either a top-gate type or a bottom-gate type transistor may be used. Alternatively, gates may be provided above and below a semiconductor layer in which a channel is formed.

[0200] The transistor 201, the transistor 205, and the transistor 206 have a structure in which a semiconductor layer in which a channel is formed is sandwiched between two gates. The two gates may be connected and the same signal may be supplied to the gates to drive the transistors. Alternatively, the threshold voltage of the transistors may be controlled by supplying a potential for controlling the threshold voltage to one of the two gates and a potential for driving to the other gate.

[0201] The crystallinity of a semiconductor material used in a transistor is not particularly limited, and any of an amorphous semiconductor, a single crystal semiconductor, and a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part) may be used. The use of a single crystal semiconductor or a semiconductor having crystallinity other than single crystal is preferable because it can suppress deterioration of transistor characteristics.

[0202] The semiconductor layer of the transistor preferably contains a metal oxide (also referred to as an oxide semiconductor). Alternatively, the semiconductor layer of the transistor may contain silicon. Examples of silicon include amorphous silicon and crystalline silicon (such as low-temperature polysilicon and single crystal silicon).

[0203] The semiconductor layer preferably contains, for example, indium, M (M is one or more selected from gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium), and zinc. In particular, M is preferably one or more selected from aluminum, gallium, yttrium, and tin.

[0204] In particular, it is preferable to use an oxide containing indium (In), gallium (Ga), and zinc (Zn) (also referred to as IGZO) as the semiconductor layer.

[0205] When the semiconductor layer is an In-M-Zn oxide, the sputtering target used to deposit the In-M-Zn oxide preferably has an atomic ratio of In equal to or greater than the atomic ratio of M. Examples of atomic ratios of metal elements in such sputtering targets include In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, In:M:Zn=6:1:6, In:M:Zn=5:2:5, and the like.

[0206] As the sputtering target, it is preferable to use a target containing a polycrystalline oxide, since it is easy to form a semiconductor layer having crystallinity. The atomic ratio of the semiconductor layer to be formed includes a variation of ±40% of the atomic ratio of the metal elements contained in the sputtering target. For example, when the composition of the sputtering target used for the semiconductor layer is In:Ga:Zn=4:2:4.1 [atomic ratio], the composition of the semiconductor layer to be formed may be close to In:Ga:Zn=4:2:3 [atomic ratio].

[0207] When the atomic ratio is described as In:Ga:Zn=4:2:3 or thereabout, this includes the case where, when the atomic ratio of In is 4, the atomic ratio of Ga is 1 or more and 3 or less, and the atomic ratio of Zn is 2 or more and 4 or less. When the atomic ratio of In is described as In:Ga:Zn=5:1:6 or thereabout, this includes the case where, when the atomic ratio of In is 5, the atomic ratio of Ga is more than 0.1 and 2 or less, and the atomic ratio of Zn is 5 or more and 7 or less. When the atomic ratio of In is described as In:Ga:Zn=1:1:1 or thereabout, this includes the case where, when the atomic ratio of In is 1, the atomic ratio of Ga is more than 0.1 and 2 or less, and the atomic ratio of Zn is more than 0.1 and 2 or less.

[0208] The transistors included in the circuit 164 and the transistors included in the display portion 162 may have the same structure or different structures. The transistors included in the circuit 164 may all have the same structure or may have two or more types. Similarly, the transistors included in the display portion 162 may all have the same structure or may have two or more types.

[0209] A connection portion 204 is provided in an area of ​​the substrate 151 where the substrate 152 does not overlap. In the connection portion 204, the wiring 165 is electrically connected to the FPC 172 via a conductive layer 166 and a connection layer 242. On the upper surface of the connection portion 204, the conductive layer 166 obtained by processing the same conductive film as the pixel electrode 191 is exposed. This allows the connection portion 204 and the FPC 172 to be electrically connected via the connection layer 242.

[0210] Various optical members can be disposed on the outside of the substrate 152. Examples of optical members include a polarizing plate, a retardation plate, a light diffusion layer (such as a diffusion film), an anti-reflection layer, and a light collecting film. In addition, an antistatic film that suppresses the adhesion of dust, a water-repellent film that makes it difficult for dirt to adhere, a hard coat film that suppresses the occurrence of scratches due to use, an impact absorbing layer, and the like may be disposed on the outside of the substrate 152.

[0211] The substrate 151 and the substrate 152 can each be made of glass, quartz, ceramic, sapphire, resin, etc. When the substrate 151 and the substrate 152 are made of a flexible material, the flexibility of the display device can be increased.

[0212] As the adhesive layer, various curing adhesives such as a photo-curing adhesive such as an ultraviolet curing adhesive, a reaction curing adhesive, a heat curing adhesive, and an anaerobic adhesive can be used. Examples of such adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. In particular, a material with low moisture permeability such as epoxy resin is preferable. A two-liquid mixed resin may also be used. An adhesive sheet or the like may also be used.

[0213] The connection layer 242 may be made of an anisotropic conductive film (ACF), an anisotropic conductive paste (ACP), or the like.

[0214] The light emitting element 190 may be of a top emission type, a bottom emission type, a dual emission type, or the like. A conductive film that transmits visible light is used for the electrode on the side from which light is extracted. In addition, it is preferable to use a conductive film that reflects visible light for the electrode on the side from which light is not extracted.

[0215] The light-emitting element 190 has at least a light-emitting layer 193. The light-emitting element 190 may further have a layer containing a substance with high hole injection properties, a substance with high hole transport properties, a hole blocking material, a substance with high electron transport properties, a substance with high electron injection properties, a bipolar substance (a substance with high electron transport properties and hole transport properties), or the like, as a layer other than the light-emitting layer 193. For example, the common layer 112 preferably has one or both of a hole injection layer and a hole transport layer. For example, the common layer 114 preferably has one or both of an electron transport layer and an electron injection layer.

[0216] Either a low molecular weight compound or a high molecular weight compound may be used for the common layer 112, the light emitting layer 193, and the common layer 114, and may contain an inorganic compound. The layers constituting the common layer 112, the light emitting layer 193, and the common layer 114 can be formed by a deposition method (including a vacuum deposition method), a transfer method, a printing method, an inkjet method, a coating method, or the like.

[0217] The light-emitting layer 193 may contain an inorganic compound such as quantum dots as a light-emitting material.

[0218] The active layer 113 of the light receiving element 110 includes a semiconductor. Examples of the semiconductor include inorganic semiconductors such as silicon, and organic semiconductors including organic compounds. In this embodiment, an example in which an organic semiconductor is used as the semiconductor of the active layer is shown. By using an organic semiconductor, the light emitting layer 193 of the light emitting element 190 and the active layer 113 of the light receiving element 110 can be formed by the same method (for example, vacuum deposition method), which is preferable because the manufacturing equipment can be shared.

[0219] The active layer 113 is made of an n-type semiconductor material such as fullerene (e.g., C 60 , C 70 Examples of the p-type semiconductor material of the active layer 113 include an electron-accepting organic semiconductor material such as copper(II) phthalocyanine (CuPc) or a derivative thereof. Examples of the p-type semiconductor material of the active layer 113 include an electron-donating organic semiconductor material such as copper(II) phthalocyanine (CuPc) or tetraphenyldibenzoperiflanthene (DBP).

[0220] For example, the active layer 113 is preferably formed by co-evaporation of an n-type semiconductor and a p-type semiconductor.

[0221] Materials that can be used for the gate, source, and drain of a transistor as well as conductive layers such as various wirings and electrodes that constitute a display device include metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, and tungsten, or alloys containing these as main components, etc. Films containing these materials can be used as a single layer or a laminated structure.

[0222] As the conductive material having light transmitting properties, conductive oxides such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, zinc oxide containing gallium, or graphene can be used. Alternatively, metal materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, or alloy materials containing the metal materials can be used. Alternatively, nitrides of the metal materials (for example, titanium nitride) or the like may be used. Note that when using metal materials or alloy materials (or their nitrides), it is preferable to make them thin enough to have light transmitting properties. Also, a stacked film of the above materials can be used as the conductive layer. For example, it is preferable to use a stacked film of an alloy of silver and magnesium and indium tin oxide, because the conductivity can be increased. These can also be used for conductive layers such as various wirings and electrodes constituting a display device, and conductive layers (conductive layers functioning as pixel electrodes or common electrodes) of display elements.

[0223] Examples of insulating materials that can be used for each insulating layer include resins such as acrylic resin and epoxy resin, and inorganic insulating materials such as silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, and aluminum oxide.

[0224] FIG. 10A shows a cross-sectional view of the display device 100B.

[0225] The display device 100B differs from the display device 100A mainly in that the display device 100B has a lens 149 and a protective layer 195.

[0226] By providing a protective layer 195 covering the light receiving element 110 and the light emitting element 190, impurities such as water can be prevented from entering the light receiving element 110 and the light emitting element 190, thereby improving the reliability of the light receiving element 110 and the light emitting element 190.

[0227] In a region 228 near the end of the display device 100B, it is preferable that the insulating layer 215 and the protective layer 195 contact each other through the opening in the insulating layer 214. In particular, it is preferable that the inorganic insulating film of the insulating layer 215 and the inorganic insulating film of the protective layer 195 contact each other. This makes it possible to suppress impurities from entering the display unit 162 from the outside through the organic insulating film. Therefore, it is possible to improve the reliability of the display device 100B.

[0228] Fig. 10B shows an example of a three-layer structure of the protective layer 195. In Fig. 10B, the protective layer 195 has an inorganic insulating layer 195a on the common electrode 115, an organic insulating layer 195b on the inorganic insulating layer 195a, and an inorganic insulating layer 195c on the organic insulating layer 195b.

[0229] The end of the inorganic insulating layer 195a and the end of the inorganic insulating layer 195c extend outward beyond the end of the organic insulating layer 195b and are in contact with each other. The inorganic insulating layer 195a is in contact with the insulating layer 215 (inorganic insulating layer) through an opening in the insulating layer 214 (organic insulating layer). This allows the insulating layer 215 and the protective layer 195 to surround the light receiving element 110 and the light emitting element 190, thereby improving the reliability of the light receiving element 110 and the light emitting element 190.

[0230] In this way, the protective layer 195 may have a laminated structure of an organic insulating film and an inorganic insulating film. In this case, it is preferable that the end of the inorganic insulating film extends further outward than the end of the organic insulating film.

[0231] A lens 149 is provided on the surface of the substrate 152 facing the substrate 151. The lens 149 has a convex surface facing the substrate 151. It is preferable that the light receiving region of the light receiving element 110 overlaps with the lens 149 and does not overlap with the light emitting layer 193. This can improve the sensitivity and accuracy of the sensor using the light receiving element 110.

[0232] The lens 149 preferably has a refractive index of 1.3 or more and 2.5 or less. The lens 149 can be formed using an inorganic material or an organic material. For example, a material containing a resin can be used for the lens 149. Also, a material containing an oxide or a sulfide can be used for the lens 149.

[0233] Specifically, a resin containing chlorine, bromine, or iodine, a resin containing a heavy metal atom, a resin containing an aromatic ring, a resin containing sulfur, or the like can be used for the lens 149. Alternatively, a material containing a resin and nanoparticles of a material having a higher refractive index than the resin can be used for the lens 149. Titanium oxide, zirconium oxide, or the like can be used for the nanoparticles.

[0234] In addition, cerium oxide, hafnium oxide, lanthanum oxide, magnesium oxide, niobium oxide, tantalum oxide, titanium oxide, yttrium oxide, zinc oxide, an oxide containing indium and tin, or an oxide containing indium, gallium, and zinc can be used for the lens 149. Alternatively, zinc sulfide or the like can be used for the lens 149.

[0235] In the display device 100B, the protective layer 195 and the substrate 152 are bonded together by an adhesive layer 142. The adhesive layer 142 is provided so as to overlap the light receiving element 110 and the light emitting element 190, respectively, and a solid sealing structure is applied to the display device 100B.

[0236] FIG. 11A shows a cross-sectional view of the display device 100C.

[0237] The display device 100C differs from the display device 100B in the structure of the transistors.

[0238] The display device 100C includes a transistor 208, a transistor 209, and a transistor 210 over a substrate 151.

[0239] The transistor 208, the transistor 209, and the transistor 210 each include a conductive layer 221 functioning as a gate, an insulating layer 211 functioning as a gate insulating layer, a semiconductor layer having a channel formation region 231i and a pair of low-resistance regions 231n, a conductive layer 222a connected to one of the pair of low-resistance regions 231n, a conductive layer 222b connected to the other of the pair of low-resistance regions 231n, an insulating layer 225 functioning as a gate insulating layer, a conductive layer 223 functioning as a gate, and an insulating layer 215 covering the conductive layer 223. The insulating layer 211 is located between the conductive layer 221 and the channel formation region 231i. The insulating layer 225 is located between the conductive layer 223 and the channel formation region 231i.

[0240] The conductive layer 222a and the conductive layer 222b are connected to the low-resistance region 231n through openings provided in the insulating layer 225 and the insulating layer 215, respectively. One of the conductive layer 222a and the conductive layer 222b functions as a source, and the other functions as a drain.

[0241] The pixel electrode 191 of the light emitting element 190 is electrically connected to one of a pair of low resistance regions 231n of the transistor 208 via the conductive layer 222b.

[0242] The pixel electrode 111 of the light receiving element 110 is electrically connected to the other of the pair of low resistance regions 231n of the transistor 209 via the conductive layer 222b.

[0243] 11A shows an example in which the insulating layer 225 covers the upper surface and side surface of the semiconductor layer. On the other hand, in FIG. 11B, the insulating layer 225 overlaps with the channel formation region 231i of the semiconductor layer 231, but does not overlap with the low resistance region 231n. For example, the structure shown in FIG. 11B can be manufactured by processing the insulating layer 225 using the conductive layer 223 as a mask. In FIG. 11B, the insulating layer 215 is provided to cover the insulating layer 225 and the conductive layer 223, and the conductive layer 222a and the conductive layer 222b are connected to the low resistance region 231n through the openings in the insulating layer 215. Furthermore, an insulating layer 218 may be provided to cover the transistor.

[0244] FIG. 12 shows a cross-sectional view of a display device 100D.

[0245] Display device 100D differs from display device 100C mainly in that display device 100D does not include substrate 151 and substrate 152, but includes substrate 153, substrate 154, adhesive layer 155, and insulating layer 212, and in that display device 100D includes lens 149.

[0246] The substrate 153 and the insulating layer 212 are bonded together by an adhesive layer 155. The substrate 154 and the protective layer 195 are bonded together by an adhesive layer 142.

[0247] The display device 100D is manufactured by transferring the insulating layer 212, the transistor 208, the transistor 209, the light receiving element 110, the light emitting element 190, and the like, which are formed on a manufacturing substrate, onto a substrate 153. Each of the substrate 153 and the substrate 154 is preferably flexible. This can increase the flexibility of the display device 100D.

[0248] The insulating layer 212 can be formed using the inorganic insulating film that can be used for the insulating layers 211, 213, and 215.

[0249] Moreover, the display device 100C shows an example in which the lens 149 is not provided, while the display device 100D shows an example in which the lens 149 is provided. The lens 149 can be provided as appropriate depending on the application of the sensor, etc.

[0250] As described above, the display device of this embodiment has a light receiving element and a light emitting element in the display portion, and the display portion has both a function of displaying an image and a function of detecting light. This allows the electronic device to be made smaller and lighter than when a sensor is provided outside the display portion or the display device. In addition, a more multifunctional electronic device can be realized by combining the display device with a sensor provided outside the display portion or the display device.

[0251] At least one layer of the light receiving element other than the active layer can be configured in common with the light emitting element (EL element). Furthermore, all layers of the light receiving element other than the active layer can be configured in common with the light emitting element (EL element). For example, the light emitting element and the light receiving element can be formed on the same substrate by simply adding a process of forming an active layer to the manufacturing process of the light emitting element. In addition, the pixel electrode and the common electrode of the light receiving element and the light emitting element can be formed from the same material and in the same process. In addition, the manufacturing process of the display device can be simplified by manufacturing the circuit electrically connected to the light receiving element and the circuit electrically connected to the light emitting element from the same material and in the same process. In this way, a display device with a high convenience can be manufactured by incorporating a light receiving element without having a complicated process.

[0252] In addition, the display device of this embodiment has a colored layer between the light receiving element and the light emitting element. The colored layer may also serve as a partition wall that electrically insulates the light receiving element and the light emitting element. The colored layer can absorb stray light in the display device, and therefore can increase the sensitivity of a sensor using the light receiving element.

[0253] FIG. 13A shows an example of a first pixel circuit having a light receiving element, and FIG. 13B shows an example of a second pixel circuit having a light emitting element.

[0254] 13A includes a light receiving element PD, a transistor M1, a transistor M2, a transistor M3, a transistor M4, and a capacitance element C1. Here, an example is shown in which a photodiode is used as the light receiving element PD.

[0255] The cathode of the light receiving element PD is electrically connected to the wiring V1, and the anode is electrically connected to one of the source and drain of the transistor M1. The gate of the transistor M1 is electrically connected to the wiring TX, and the other of the source and drain is electrically connected to one electrode of the capacitance element C1, one of the source and drain of the transistor M2, and the gate of the transistor M3. The gate of the transistor M2 is electrically connected to the wiring RES, and the other of the source and drain is electrically connected to the wiring V2. The source and drain of the transistor M3 is electrically connected to the wiring V3, and the other of the source and drain is electrically connected to one of the source and drain of the transistor M4. The gate of the transistor M4 is electrically connected to the wiring SE, and the other of the source and drain is electrically connected to the wiring OUT1.

[0256] A constant potential is supplied to the wiring V1, the wiring V2, and the wiring V3. When the light receiving element PD is driven with a reverse bias, a potential lower than the potential of the wiring V1 is supplied to the wiring V2. The transistor M2 is controlled by a signal supplied to the wiring RES, and has a function of resetting the potential of the node connected to the gate of the transistor M3 to the potential supplied to the wiring V2. The transistor M1 is controlled by a signal supplied to the wiring TX, and has a function of controlling the timing at which the potential of the node changes according to the current flowing through the light receiving element PD. The transistor M3 functions as an amplifying transistor that outputs according to the potential of the node. The transistor M4 is controlled by a signal supplied to the wiring SE, and functions as a selection transistor for reading out the output according to the potential of the node in an external circuit connected to the wiring OUT1.

[0257] 13B includes a light-emitting element EL, a transistor M5, a transistor M6, a transistor M7, and a capacitor C2. Here, an example is shown in which a light-emitting diode is used as the light-emitting element EL. In particular, it is preferable to use an organic EL element as the light-emitting element EL.

[0258] The transistor M5 has a gate electrically connected to the wiring VG, one of its source and drain electrically connected to the wiring VS, and the other of its source and drain electrically connected to one electrode of the capacitor C2 and the gate of the transistor M6. One of the source and drain of the transistor M6 is electrically connected to the wiring V4, and the other is electrically connected to the anode of the light-emitting element EL and one of the source and drain of the transistor M7. The transistor M7 has a gate electrically connected to the wiring MS, and the other of its source and drain electrically connected to the wiring OUT2. The cathode of the light-emitting element EL is electrically connected to the wiring V5.

[0259] A constant potential is supplied to the wiring V4 and the wiring V5. The anode side of the light-emitting element EL can be set to a high potential, and the cathode side can be set to a lower potential than the anode side. The transistor M5 is controlled by a signal supplied to the wiring VG, and functions as a selection transistor for controlling the selection state of the pixel circuit PIX2. The transistor M6 also functions as a drive transistor for controlling the current flowing through the light-emitting element EL according to the potential supplied to the gate. When the transistor M5 is in a conductive state, the potential supplied to the wiring VS is supplied to the gate of the transistor M6, and the light emission luminance of the light-emitting element EL can be controlled according to the potential. The transistor M7 is controlled by a signal supplied to the wiring MS, and has a function of outputting the potential between the transistor M6 and the light-emitting element EL to the outside via the wiring OUT2.

[0260] In the display device of the present embodiment, an image may be displayed by making the light-emitting element emit light in a pulsed manner. By shortening the driving time of the light-emitting element, it is possible to reduce the power consumption of the display device and suppress heat generation. In particular, organic EL elements are suitable because they have excellent frequency characteristics. The frequency can be, for example, 1 kHz or more and 100 MHz or less.

[0261] Here, it is preferable that the transistors M1, M2, M3, and M4 in the pixel circuit PIX1, and the transistors M5, M6, and M7 in the pixel circuit PIX2 are transistors that use a metal oxide (oxide semiconductor) in the semiconductor layer in which a channel is formed.

[0262] A transistor using a metal oxide, which has a wider band gap and a lower carrier density than silicon, can achieve an extremely small off-state current. Therefore, the small off-state current allows the charge stored in the capacitor connected in series to the transistor to be held for a long period of time. Therefore, it is preferable to use transistors using an oxide semiconductor for the transistor M1, the transistor M2, and the transistor M5 connected in series to the capacitor C1 or the capacitor C2 in particular. In addition, by using transistors using an oxide semiconductor for the other transistors as well, the manufacturing cost can be reduced.

[0263] Alternatively, the transistors M1 to M7 may each be a transistor in which silicon is used as a semiconductor in which a channel is formed. In particular, the use of silicon with high crystallinity, such as single crystal silicon or polycrystalline silicon, is preferable because high field-effect mobility can be achieved and faster operation can be achieved.

[0264] Alternatively, a structure in which an oxide semiconductor is used for at least one of the transistors M1 to M7 and silicon is used for the remaining transistors may be used.

[0265] Although the transistors are shown as n-channel transistors in FIGS. 13A and 13B, p-channel transistors can also be used.

[0266] The transistors of the pixel circuit PIX1 and the transistors of the pixel circuit PIX2 are preferably formed side by side on the same substrate. In particular, it is preferable that the transistors of the pixel circuit PIX1 and the transistors of the pixel circuit PIX2 are mixed and periodically arranged in one region.

[0267] In addition, it is preferable to provide one or more layers having one or both of a transistor and a capacitor at a position overlapping with the light receiving element PD or the light emitting element EL, which can reduce the effective area occupied by each pixel circuit and realize a high-definition light receiving section or display section.

[0268] At least a part of the configuration examples exemplified in this embodiment and the corresponding drawings can be implemented in appropriate combination with other configuration examples or drawings.

[0269] This embodiment mode can be implemented by appropriately combining at least a part of it with other embodiment modes described in this specification.

[0270] (Embodiment 3) In this embodiment, a structure of a transistor applicable to the IC 20 described in the above embodiment will be described. As an example, a structure in which transistors having different electrical characteristics are stacked will be described. By using this structure, the design freedom of a semiconductor device can be increased. In addition, by stacking transistors having different electrical characteristics, the integration degree of the semiconductor device can be increased.

[0271] A portion of the cross-sectional structure of the semiconductor device is shown in Fig. 14. The semiconductor device shown in Fig. 14 has a transistor 550, a transistor 500, and a capacitor 600. Fig. 16A is a cross-sectional view of the transistor 500 in the channel length direction, Fig. 16B is a cross-sectional view of the transistor 500 in the channel width direction, and Fig. 16C is a cross-sectional view of the transistor 550 in the channel width direction.

[0272] The transistor 500 is an OS transistor. The off-state current of the transistor 500 is extremely small. Therefore, a data voltage or charge written to a storage node through the transistor 500 can be held for a long period of time. That is, the frequency of a refresh operation of the storage node can be reduced or the refresh operation is not required, so that the power consumption of a semiconductor device can be reduced.

[0273] In FIG. 14, the transistor 500 is provided above the transistor 550 , and the capacitor 600 is provided above the transistor 550 and the transistor 500 .

[0274] The transistor 550 is provided over a substrate 311 and includes a conductor 316, an insulator 315, a semiconductor region 313 made of a part of the substrate 311, a low resistance region 314a functioning as a source region or drain region, and a low resistance region 314b.

[0275] 16C , in the transistor 550, the top surface and the side surface in the channel width direction of the semiconductor region 313 are covered with the conductor 316 via the insulator 315. By forming the transistor 550 as a fin type in this manner, the effective channel width is increased, thereby improving the on-characteristics of the transistor 550. In addition, the contribution of the electric field of the gate electrode can be increased, thereby improving the off-characteristics of the transistor 550.

[0276] Note that the transistor 550 may be either a p-channel transistor or an n-channel transistor.

[0277] The region where the channel of the semiconductor region 313 is formed, the region nearby, the low resistance region 314a which becomes the source region or the drain region, and the low resistance region 314b preferably contain a semiconductor such as a silicon-based semiconductor, and preferably contain single crystal silicon. Alternatively, they may be formed of a material containing Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), or the like. A configuration using silicon in which the effective mass is controlled by applying stress to the crystal lattice and changing the lattice spacing may be used. Alternatively, the transistor 550 may be a HEMT by using GaAs and GaAlAs, or the like.

[0278] Low resistance region 314a and low resistance region 314b contain, in addition to the semiconductor material applied to semiconductor region 313, an element that imparts n-type conductivity, such as arsenic or phosphorus, or an element that imparts p-type conductivity, such as boron.

[0279] The conductor 316 functioning as the gate electrode can be made of a conductive material such as a semiconductor material, such as silicon, containing an element that imparts n-type conductivity, such as arsenic or phosphorus, or an element that imparts p-type conductivity, such as boron, a metal material, an alloy material, or a metal oxide material.

[0280] Since the work function is determined by the material of the conductor, the threshold voltage of the transistor can be adjusted by selecting the material of the conductor. Specifically, it is preferable to use a material such as titanium nitride or tantalum nitride for the conductor. Furthermore, in order to achieve both electrical conductivity and embeddability, it is preferable to use a metal material such as tungsten or aluminum as the conductor in a laminated state, and in particular, it is preferable to use tungsten in terms of heat resistance.

[0281] The transistor 550 may be formed using a silicon on insulator (SOI) substrate or the like.

[0282] The SOI substrate may be a SIMOX (Separation by Implanted Oxygen) substrate formed by implanting oxygen ions into a mirror-polished wafer and then heating at high temperature to form an oxide layer at a certain depth from the surface and eliminate defects in the surface layer, or an SOI substrate formed using the Smart Cut method, which cleaves a semiconductor substrate by utilizing the growth of microvoids formed by hydrogen ion implantation through heat treatment, or the ELTRAN method (registered trademark: Epitaxial Layer Transfer). A transistor formed using a single crystal substrate has a single crystal semiconductor in the channel formation region.

[0283] 14 is just an example, and the configuration is not limited thereto, and an appropriate transistor may be used depending on the circuit configuration and driving method. For example, when the semiconductor device is a unipolar circuit including only OS transistors (meaning transistors having the same polarity, such as only n-channel transistors), the transistor 550 may have the same configuration as the transistor 500 as shown in FIG 15. Details of the transistor 500 will be described later.

[0284] An insulator 320, an insulator 322, an insulator 324, and an insulator 326 are stacked in this order over the transistor 550.

[0285] As the insulators 320, 322, 324, and 326, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, or the like can be used.

[0286] In this specification, silicon oxynitride refers to a material having a higher oxygen content than nitrogen, silicon nitride oxide refers to a material having a higher nitrogen content than oxygen, aluminum oxynitride refers to a material having a higher oxygen content than nitrogen, and aluminum nitride oxide refers to a material having a higher nitrogen content than oxygen.

[0287] The insulator 322 may function as a planarizing film that planarizes steps caused by the transistor 550 or the like provided thereunder. For example, the top surface of the insulator 322 may be planarized by planarization treatment using a chemical mechanical polishing (CMP) method or the like to improve the planarity.

[0288] The insulator 324 is preferably a film having a barrier property that prevents hydrogen or impurities from diffusing from the substrate 311, the transistor 550, or the like to a region where the transistor 500 is provided.

[0289] As an example of a film having a barrier property against hydrogen, for example, silicon nitride formed by a CVD method can be used. Here, when hydrogen diffuses into a semiconductor element having an oxide semiconductor such as the transistor 500, the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between the transistor 500 and the transistor 550. Specifically, the film that suppresses the diffusion of hydrogen is a film that releases a small amount of hydrogen.

[0290] The amount of desorption of hydrogen can be analyzed, for example, by using thermal desorption spectrometry (TDS). For example, the amount of desorption of hydrogen from the insulator 324 is calculated as 10×10 per area of ​​the insulator 324 when the surface temperature of the film is in the range of 50° C. to 500° C. in the TDS analysis. 15 atoms / cm 2 Less than or equal to 5×10 15 atoms / cm 2 The following is acceptable.

[0291] The insulator 326 preferably has a lower dielectric constant than the insulator 324. For example, the relative dielectric constant of the insulator 326 is preferably less than 4, and more preferably less than 3. For example, the relative dielectric constant of the insulator 326 is preferably 0.7 times or less, and more preferably 0.6 times or less, the relative dielectric constant of the insulator 324. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between wirings can be reduced.

[0292] Moreover, the insulator 320, the insulator 322, the insulator 324, and the insulator 326 are embedded with the capacitor 600 or the conductor 328 and the conductor 330 connected to the transistor 500. The conductor 328 and the conductor 330 function as a plug or wiring. In addition, a plurality of conductors having the function of a plug or wiring may be collectively given the same reference numeral. In addition, in this specification and the like, the wiring and the plug connected to the wiring may be integral. That is, there are cases where a part of the conductor functions as the wiring, and cases where a part of the conductor functions as the plug.

[0293] As the material for each plug and wiring (conductor 328, conductor 330, etc.), a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material can be used in a single layer or a laminated layer. It is preferable to use a high melting point material such as tungsten or molybdenum that has both heat resistance and conductivity, and tungsten is preferably used. Alternatively, it is preferable to form the plug and wiring from a low resistance conductive material such as aluminum or copper. By using a low resistance conductive material, the wiring resistance can be reduced.

[0294] A wiring layer may be provided over the insulator 326 and the conductor 330. For example, in FIG. 14, an insulator 350, an insulator 352, and an insulator 354 are stacked in this order. A conductor 356 is formed in the insulator 350, the insulator 352, and the insulator 354. The conductor 356 functions as a plug or wiring connected to the transistor 550. Note that the conductor 356 can be provided using a material similar to that of the conductor 328 and the conductor 330.

[0295] Note that, for example, the insulator 350 is preferably an insulator having a barrier property against hydrogen, similar to the insulator 324. The conductor 356 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in an opening of the insulator 350 having a barrier property against hydrogen. With this structure, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0296] Note that, for example, tantalum nitride or the like may be used as a conductor having a barrier property against hydrogen. By stacking tantalum nitride and tungsten having high conductivity, diffusion of hydrogen from the transistor 550 can be suppressed while maintaining the conductivity of the wiring. In this case, it is preferable that the tantalum nitride layer having a barrier property against hydrogen be in contact with the insulator 350 having a barrier property against hydrogen.

[0297] A wiring layer may be provided on the insulator 354 and the conductor 356. For example, in FIG. 14, an insulator 360, an insulator 362, and an insulator 364 are stacked in this order. A conductor 366 is formed in the insulator 360, the insulator 362, and the insulator 364. The conductor 366 functions as a plug or a wiring. The conductor 366 can be provided using a material similar to that of the conductor 328 and the conductor 330.

[0298] Note that, for example, the insulator 360 is preferably an insulator having a barrier property against hydrogen, similar to the insulator 324. The conductor 366 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in an opening of the insulator 360 having a barrier property against hydrogen. With this structure, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0299] A wiring layer may be provided over the insulator 364 and the conductor 366. For example, in FIG. 14, an insulator 370, an insulator 372, and an insulator 374 are stacked in this order. A conductor 376 is formed in the insulator 370, the insulator 372, and the insulator 374. The conductor 376 functions as a plug or a wiring. The conductor 376 can be provided using a material similar to that of the conductor 328 and the conductor 330.

[0300] Note that, for example, the insulator 370 is preferably an insulator having a barrier property against hydrogen, similar to the insulator 324. The conductor 376 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in an opening of the insulator 370 having a barrier property against hydrogen. With this structure, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0301] A wiring layer may be provided over the insulator 374 and the conductor 376. For example, in FIG. 14, an insulator 380, an insulator 382, ​​and an insulator 384 are stacked in this order. A conductor 386 is formed in the insulator 380, the insulator 382, ​​and the insulator 384. The conductor 386 functions as a plug or a wiring. The conductor 386 can be provided using a material similar to that of the conductor 328 and the conductor 330.

[0302] Note that, for example, the insulator 380 is preferably an insulator having a barrier property against hydrogen, similar to the insulator 324. The conductor 386 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in an opening of the insulator 380 having a barrier property against hydrogen. With this structure, the transistor 550 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0303] In the above, a wiring layer including the conductor 356, a wiring layer including the conductor 366, a wiring layer including the conductor 376, and a wiring layer including the conductor 386 have been described, but the semiconductor device of this embodiment is not limited to this. There may be three or fewer wiring layers similar to the wiring layer including the conductor 356, or there may be five or more wiring layers similar to the wiring layer including the conductor 356.

[0304] An insulator 510, an insulator 512, an insulator 514, and an insulator 516 are stacked in this order on the insulator 384. Any of the insulator 510, the insulator 512, the insulator 514, and the insulator 516 is preferably made of a substance that has a barrier property against oxygen or hydrogen.

[0305] For example, the insulator 510 and the insulator 514 are preferably formed using a film having a barrier property against hydrogen and impurities in a region where the transistor 500 is provided, such as the substrate 311 or a region where the transistor 550 is provided. Therefore, a material similar to that of the insulator 324 can be used.

[0306] As an example of a film having a barrier property against hydrogen, silicon nitride formed by a CVD method can be used. Here, when hydrogen diffuses into a semiconductor element having an oxide semiconductor such as the transistor 500, the characteristics of the semiconductor element may deteriorate. Therefore, a film that suppresses the diffusion of hydrogen is preferably used between the transistor 500 and the transistor 550.

[0307] As a film having a barrier property against hydrogen, for example, the insulator 510 and the insulator 514 are preferably made of a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide.

[0308] In particular, aluminum oxide has a high blocking effect of preventing the film from permeating both oxygen and impurities such as hydrogen and moisture, which are factors that cause fluctuations in the electrical characteristics of a transistor. Therefore, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 500 during and after the transistor manufacturing process. In addition, aluminum oxide can suppress the release of oxygen from the oxide that constitutes the transistor 500. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 500.

[0309] For example, the insulator 512 and the insulator 516 can be made of a material similar to that of the insulator 320. By using a material with a relatively low dielectric constant for these insulators, the parasitic capacitance generated between wirings can be reduced. For example, the insulator 512 and the insulator 516 can be made of a silicon oxide film, a silicon oxynitride film, or the like.

[0310] A conductor 518, a conductor constituting the transistor 500 (for example, the conductor 503), and the like are embedded in the insulator 510, the insulator 512, the insulator 514, and the insulator 516. Note that the conductor 518 functions as a plug or wiring connected to the capacitor 600 or the transistor 550. The conductor 518 can be provided using a material similar to that of the conductor 328 and the conductor 330.

[0311] In particular, the insulator 510 and the conductor 518 in the region in contact with the insulator 514 are preferably conductors having barrier properties against oxygen, hydrogen, and water. With this structure, the transistor 550 and the transistor 500 can be separated by a layer having barrier properties against oxygen, hydrogen, and water, and diffusion of hydrogen from the transistor 550 to the transistor 500 can be suppressed.

[0312] Above the insulator 516 is a transistor 500 .

[0313] As shown in Figures 16A and 16B, transistor 500 has a conductor 503 arranged so as to be embedded in insulator 514 and insulator 516, an insulator 520 arranged on insulator 516 and conductor 503, an insulator 522 arranged on insulator 520, an insulator 524 arranged on insulator 522, an oxide 530a arranged on insulator 524, an oxide 530b arranged on oxide 530a, conductors 542a and 542b arranged apart from each other on oxide 530b, an insulator 580 arranged on conductor 542a and conductor 542b and having an opening formed therebetween overlapping with conductor 542a and conductor 542b, an insulator 545 arranged on the bottom and side surfaces of the opening, and a conductor 560 arranged on the formation surface of insulator 545.

[0314] 16A and 16B, it is preferable that an insulator 544 is disposed between the oxide 530a, the oxide 530b, the conductor 542a, and the conductor 542b and the insulator 580. It is preferable that the conductor 560 has a conductor 560a provided inside the insulator 545 and a conductor 560b provided so as to be embedded inside the conductor 560a, as shown in FIG. 16A and 16B. It is preferable that an insulator 574 is disposed on the insulator 580, the conductor 560, and the insulator 545, as shown in FIG. 16A and 16B.

[0315] In this specification and other documents, oxide 530a and oxide 530b may be collectively referred to as oxide 530.

[0316] Note that, in the transistor 500, a two-layer structure of the oxide 530a and the oxide 530b is shown in the region where the channel is formed and in the vicinity thereof, but the present invention is not limited to this structure. For example, a single layer of the oxide 530b or a stacked structure of three or more layers may be used.

[0317] In addition, although the transistor 500 has a two-layer structure, the conductor 560 is not limited to this. For example, the conductor 560 may have a single-layer structure or a three- or more-layer structure. The transistor 500 shown in FIGS. 14, 15, and 16A is merely an example, and the present invention is not limited to this structure. An appropriate transistor may be used depending on the circuit configuration, driving method, and the like.

[0318] Here, the conductor 560 functions as a gate electrode of the transistor, and the conductors 542a and 542b function as a source electrode and a drain electrode, respectively. As described above, the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and in the region sandwiched between the conductors 542a and 542b. The arrangement of the conductors 560, 542a, and 542b is selected in a self-aligned manner with respect to the opening of the insulator 580. That is, in the transistor 500, the gate electrode can be arranged in a self-aligned manner between the source electrode and the drain electrode. Therefore, the conductor 560 can be formed without providing a margin for alignment, so that the area occupied by the transistor 500 can be reduced. This allows the semiconductor device to be miniaturized and highly integrated.

[0319] Furthermore, since the conductor 560 is formed in a self-aligned manner in the region between the conductor 542a and the conductor 542b, the conductor 560 does not have a region that overlaps with the conductor 542a or the conductor 542b. This makes it possible to reduce the parasitic capacitance formed between the conductor 560 and the conductor 542a and between the conductor 560 and the conductor 542b. This makes it possible to improve the switching speed of the transistor 500 and provide high frequency characteristics.

[0320] The conductor 560 may function as a first gate (also referred to as a top gate) electrode. The conductor 503 may function as a second gate (also referred to as a bottom gate) electrode. In this case, the threshold voltage of the transistor 500 can be controlled by changing the potential applied to the conductor 503 independently of the potential applied to the conductor 560. In particular, by applying a negative potential to the conductor 503, the threshold voltage of the transistor 500 can be increased and the off-current can be reduced. Therefore, the drain current when the potential applied to the conductor 560 is 0 V can be reduced by applying a negative potential to the conductor 503 compared to the case where a negative potential is not applied.

[0321] The conductor 503 is disposed so as to overlap the oxide 530 and the conductor 560. In this manner, when a potential is applied to the conductor 560 and the conductor 503, the electric field generated from the conductor 560 and the electric field generated from the conductor 503 are connected, and a channel formation region formed in the oxide 530 can be covered.

[0322] In this specification and the like, a transistor configuration in which a channel formation region is electrically surrounded by the electric field of a pair of gate electrodes (a first gate electrode and a second gate electrode) is called a surrounded channel (S-channel) configuration. The S-channel configuration disclosed in this specification and the like is different from a fin type configuration and a planar type configuration. By adopting the S-channel configuration, it is possible to obtain a transistor that is more resistant to the short channel effect, in other words, in which the short channel effect is less likely to occur.

[0323] The conductor 503 has a structure similar to that of the conductor 518, and the conductor 503a is formed in contact with the inner walls of the openings of the insulator 514 and the insulator 516, and the conductor 503b is formed further inside. Note that, although the transistor 500 shows a structure in which the conductor 503a and the conductor 503b are stacked, the present invention is not limited to this. For example, the conductor 503 may have a single layer structure or a stacked structure of three or more layers.

[0324] Here, the conductor 503a is preferably made of a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (the impurities are less likely to permeate through). Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) (the oxygen is less likely to permeate through). Note that in this specification, the function of suppressing the diffusion of impurities or oxygen refers to the function of suppressing the diffusion of any one or all of the impurities and oxygen.

[0325] For example, the conductor 503a has a function of suppressing the diffusion of oxygen, so that the conductor 503b can be prevented from being oxidized and the conductivity from decreasing.

[0326] In addition, when the conductor 503 also functions as a wiring, it is preferable that the conductor 503b is made of a highly conductive material containing tungsten, copper, or aluminum as a main component. Note that, although the conductor 503 is illustrated in this embodiment as a stack of the conductors 503a and 503b, the conductor 503 may have a single layer structure.

[0327] The insulators 520, 522, and 524 function as a second gate insulating film.

[0328] Here, it is preferable that the insulator 524 in contact with the oxide 530 is an insulator containing more oxygen than the oxygen that satisfies the stoichiometric composition. The oxygen is easily released from the film by heating. In this specification and the like, oxygen released by heating may be called "excess oxygen." In other words, it is preferable that the insulator 524 has a region containing excess oxygen (also called "excess oxygen region"). By providing such an insulator containing excess oxygen in contact with the oxide 530, oxygen vacancies (V O In addition, when hydrogen enters an oxygen vacancy in the oxide 530, the defect (hereinafter, V O H.) may function as a donor and generate electrons as carriers. Some of the hydrogen may bond with oxygen that is bonded to a metal atom to generate electrons as carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is likely to have normally-on characteristics. Furthermore, hydrogen in an oxide semiconductor is easily moved by stress such as heat or an electric field. Therefore, if an oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may be deteriorated. In one embodiment of the present invention, V in the oxide 530 O It is preferable to reduce H as much as possible and make it high-purity intrinsic or substantially high-purity intrinsic. O In order to obtain an oxide semiconductor in which H is sufficiently reduced, it is important to remove impurities such as moisture and hydrogen from the oxide semiconductor (also called "dehydration" or "dehydrogenation treatment") and to supply oxygen to the oxide semiconductor to compensate for oxygen vacancies (also called "oxygenation treatment"). O By using an oxide semiconductor in which H is sufficiently reduced for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0329] Specifically, it is preferable to use an oxide material from which some oxygen is released by heating as an insulator having an excess oxygen region. An oxide material from which oxygen is released by heating is an oxide material from which the amount of released oxygen converted into oxygen atoms is 1.0×10 18 atoms / cm 3 More than 1.0×10 19 atoms / cm 3 More preferably, 2.0×10 19 atoms / cm 3 or more than 3.0×10 20 atoms / cm 3 The oxide film is one having the above-mentioned properties. The surface temperature of the film during the TDS analysis is preferably in the range of 100° C. or more and 700° C. or less, or 100° C. or more and 400° C. or less.

[0330] In addition, the oxide 530 may be brought into contact with the insulator having the excess oxygen region and subjected to one or more of heat treatment, microwave treatment, and RF treatment. By carrying out such treatment, water or hydrogen in the oxide 530 can be removed. For example, a reaction occurs in the oxide 530 that breaks the bond of VoH, in other words, "V O The reaction "H → Vo + H" occurs, and the hydrogen can be dehydrogenated. Some of the hydrogen generated at this time may combine with oxygen to become H2O and be removed from the oxide 530 or the insulator near the oxide 530. Some of the hydrogen may also be gettered to the conductor 542.

[0331] In addition, the microwave treatment is preferably performed using, for example, a device having a power source that generates high-density plasma or a device having a power source that applies RF to the substrate side. For example, high-density oxygen radicals can be generated by using a gas containing oxygen and high-density plasma, and the oxygen radicals generated by the high-density plasma can be efficiently introduced into the oxide 530 or an insulator near the oxide 530 by applying RF to the substrate side. In addition, the pressure of the microwave treatment may be set to 133 Pa or more, preferably 200 Pa or more, and more preferably 400 Pa or more. In addition, for example, oxygen and argon are used as gases to be introduced into the microwave treatment device, and the oxygen flow rate ratio (O2 / (O2+Ar)) is 50% or less, preferably 10% or more and 30% or less.

[0332] In addition, in a manufacturing process of the transistor 500, it is preferable to perform heat treatment while the surface of the oxide 530 is exposed. The heat treatment may be performed, for example, at a temperature of 100° C. or higher and 450° C. or lower, more preferably 350° C. or higher and 400° C. or lower. Note that the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing an oxidizing gas at 10 ppm or higher, 1% or higher, or 10% or higher. For example, the heat treatment is preferably performed in an oxygen atmosphere. In this way, oxygen is supplied to the oxide 530 to reduce oxygen deficiencies (V O ) can be reduced. The heat treatment may be performed under reduced pressure. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in order to compensate for the desorbed oxygen after the heat treatment in a nitrogen gas or inert gas atmosphere. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in order to compensate for the desorbed oxygen. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in succession to a heat treatment in a nitrogen gas or inert gas atmosphere.

[0333] By carrying out the oxygen addition process on the oxide 530, the oxygen vacancies in the oxide 530 can be repaired by the supplied oxygen, in other words, the reaction of "Vo+O→null" can be promoted. Furthermore, the supplied oxygen reacts with the hydrogen remaining in the oxide 530, and the hydrogen can be removed as H2O (dehydrated). As a result, the hydrogen remaining in the oxide 530 recombines with the oxygen vacancies to form V O The formation of H can be suppressed.

[0334] When the insulator 524 has an excess oxygen region, it is preferable that the insulator 522 has a function of suppressing the diffusion of oxygen (eg, oxygen atoms, oxygen molecules, etc.) (the oxygen is less likely to permeate).

[0335] The insulator 522 preferably has a function of suppressing diffusion of oxygen and impurities, so that oxygen contained in the oxide 530 does not diffuse toward the insulator 520. Furthermore, reaction of the conductor 503 with the insulator 524 or oxygen contained in the oxide 530 can be suppressed.

[0336] The insulator 522 is preferably a single layer or a multilayer insulator containing a so-called high-k material, such as aluminum oxide, hafnium oxide, oxide containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As transistors become smaller and more highly integrated, problems such as leakage current may occur due to the thinning of the gate insulating film. By using a high-k material for the insulator that functions as the gate insulating film, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0337] In particular, it is preferable to use an insulator containing an oxide of one or both of aluminum and hafnium, which are insulating materials having a function of suppressing the diffusion of impurities and oxygen (the oxygen is unlikely to permeate through them). As an insulator containing an oxide of one or both of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like. When the insulator 522 is formed using such a material, the insulator 522 functions as a layer that suppresses the release of oxygen from the oxide 530 and the intrusion of impurities such as hydrogen into the oxide 530 from the periphery of the transistor 500.

[0338] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on the above insulators.

[0339] In addition, the insulator 520 is preferably thermally stable. For example, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In addition, by combining a high-k material insulator with silicon oxide or silicon oxynitride, it is possible to obtain the insulator 520 or the insulator 526 having a thermally stable laminated structure with a high relative dielectric constant.

[0340] 16A and 16B, the second gate insulating film has a three-layer stack structure, which includes the insulators 520, 522, and 524. However, the second gate insulating film may have a single layer, two layers, or four or more layers. In this case, the second gate insulating film is not limited to a stack structure made of the same material, and may have a stack structure made of different materials.

[0341] In the transistor 500, a metal oxide functioning as an oxide semiconductor is used for the oxide 530 including the channel formation region. For example, a metal oxide such as In-M-Zn oxide (wherein the element M is one or more elements selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, tin, magnesium, or the like) may be used for the oxide 530.

[0342] The metal oxide functioning as an oxide semiconductor may be formed by a sputtering method or an ALD (Atomic Layer Deposition) method. Note that the metal oxide functioning as an oxide semiconductor will be described in detail in another embodiment.

[0343] The metal oxide that functions as a channel formation region in the oxide 530 preferably has a band gap of 2 eV or more, preferably 2.5 eV or more. In this manner, by using a metal oxide with a wide band gap, the off-state current of the transistor can be reduced.

[0344] The oxide 530 has the oxide 530a below the oxide 530b, and thus can suppress the diffusion of impurities from components formed below the oxide 530a to the oxide 530b.

[0345] The oxide 530 preferably has a stacked structure of a plurality of oxide layers having different atomic ratios of metal atoms. Specifically, the atomic ratio of element M among the constituent elements in the metal oxide used for the oxide 530a is preferably larger than the atomic ratio of element M among the constituent elements in the metal oxide used for the oxide 530b. In addition, the atomic ratio of element M to In in the metal oxide used for the oxide 530a is preferably larger than the atomic ratio of element M to In in the metal oxide used for the oxide 530b. In addition, the atomic ratio of In to element M in the metal oxide used for the oxide 530b is preferably larger than the atomic ratio of In to element M in the metal oxide used for the oxide 530a.

[0346] In addition, it is preferable that the energy of the conduction band minimum of the oxide 530a is higher than that of the oxide 530b, or, in other words, it is preferable that the electron affinity of the oxide 530a is smaller than that of the oxide 530b.

[0347] Here, at the junction between the oxide 530a and the oxide 530b, the energy level of the conduction band minimum changes gradually. In other words, it can be said that the energy level of the conduction band minimum at the junction between the oxide 530a and the oxide 530b changes continuously or is a continuous junction. To achieve this, it is preferable to reduce the defect level density of the mixed layer formed at the interface between the oxide 530a and the oxide 530b.

[0348] Specifically, the oxide 530a and the oxide 530b have a common element other than oxygen (as a main component), so that a mixed layer with a low density of defect states can be formed. For example, when the oxide 530b is an In-Ga-Zn oxide, the oxide 530a may be an In-Ga-Zn oxide, a Ga-Zn oxide, or a gallium oxide.

[0349] At this time, the main carrier path is the oxide 530b. By configuring the oxide 530a as described above, the defect state density at the interface between the oxide 530a and the oxide 530b can be reduced. Therefore, the effect of interface scattering on carrier conduction is reduced, and the transistor 500 can obtain a high on-state current.

[0350] Conductors 542a and 542b functioning as a source electrode and a drain electrode are provided on the oxide 530b. As the conductors 542a and 542b, it is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, an alloy containing the above-mentioned metal elements as a component, or an alloy combining the above-mentioned metal elements. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, or the like. In addition, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are conductive materials that are difficult to oxidize, or materials that maintain conductivity even when oxygen is absorbed, and are therefore preferable.Furthermore, metal nitride films such as tantalum nitride are preferable because they have barrier properties against hydrogen or oxygen.

[0351] 16A, the conductor 542a and the conductor 542b are shown as a single layer, but may be a laminated structure of two or more layers. For example, a tantalum nitride film and a tungsten film may be laminated. A titanium film and an aluminum film may be laminated. A two-layer structure in which an aluminum film is laminated on a tungsten film, a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, a two-layer structure in which a copper film is laminated on a titanium film, or a two-layer structure in which a copper film is laminated on a tungsten film may be used.

[0352] In addition, there are three-layer structures in which a titanium film or titanium nitride film is laminated with an aluminum film or copper film on the titanium film or titanium nitride film, and a titanium film or titanium nitride film is further formed thereon, and a three-layer structure in which a molybdenum film or molybdenum nitride film is laminated with an aluminum film or copper film on the molybdenum film or molybdenum nitride film, and a molybdenum film or molybdenum nitride film is further formed thereon, etc. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

[0353] 16A, regions 543a and 543b may be formed as low-resistance regions at and near the interface of the oxide 530 with the conductor 542a (conductor 542b). In this case, the region 543a functions as one of the source region and the drain region, and the region 543b functions as the other of the source region and the drain region. A channel formation region is formed in a region sandwiched between the regions 543a and 543b.

[0354] By providing the conductor 542a (conductor 542b) so as to be in contact with the oxide 530, the oxygen concentration in the region 543a (region 543b) may be reduced. Also, a metal compound layer containing a metal contained in the conductor 542a (conductor 542b) and a component of the oxide 530 may be formed in the region 543a (region 543b). In such a case, the carrier density in the region 543a (region 543b) increases, and the region 543a (region 543b) becomes a low-resistance region.

[0355] The insulator 544 is provided to cover the conductor 542a and the conductor 542b and suppresses oxidation of the conductor 542a and the conductor 542b. In this case, the insulator 544 may be provided to cover the side surface of the oxide 530 and to be in contact with the insulator 524.

[0356] The insulator 544 can be a metal oxide containing one or more elements selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, neodymium, lanthanum, magnesium, etc. Alternatively, the insulator 544 can be silicon nitride oxide, silicon nitride, or the like.

[0357] In particular, it is preferable to use, as the insulator 544, an insulator containing an oxide of either or both of aluminum and hafnium, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate). In particular, hafnium aluminate has higher heat resistance than a hafnium oxide film. Therefore, it is preferable because it is less likely to crystallize in a heat treatment in a later process. Note that the insulator 544 is not an essential component when the conductors 542a and 542b are made of a material having oxidation resistance or when the conductivity does not decrease significantly even when oxygen is absorbed. It may be designed appropriately depending on the desired transistor characteristics.

[0358] The insulator 544 can prevent impurities such as water and hydrogen contained in the insulator 580 from diffusing to the oxide 530b through the insulator 545. The insulator 580 can also prevent the conductor 560 from being oxidized by excess oxygen contained in the insulator 580.

[0359] The insulator 545 functions as a first gate insulating film. Like the insulator 524 described above, the insulator 545 is preferably formed using an insulator that contains excess oxygen and releases oxygen by heating.

[0360] Specifically, silicon oxide having excess oxygen, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, and silicon oxide having vacancies can be used. In particular, silicon oxide and silicon oxynitride are preferable because they are stable against heat.

[0361] By providing an insulator containing excess oxygen as the insulator 545, oxygen can be effectively supplied from the insulator 545 to a channel formation region of the oxide 530b. Similarly to the insulator 524, the concentration of impurities such as water or hydrogen in the insulator 545 is preferably reduced. The thickness of the insulator 545 is preferably 1 nm or more and 20 nm or less.

[0362] Furthermore, in order to efficiently supply excess oxygen contained in the insulator 545 to the oxide 530, a metal oxide may be provided between the insulator 545 and the conductor 560. The metal oxide preferably suppresses oxygen diffusion from the insulator 545 to the conductor 560. By providing a metal oxide that suppresses oxygen diffusion, the diffusion of excess oxygen from the insulator 545 to the conductor 560 can be suppressed. That is, a decrease in the amount of excess oxygen supplied to the oxide 530 can be suppressed. Furthermore, oxidation of the conductor 560 due to the excess oxygen can be suppressed. As the metal oxide, a material that can be used for the insulator 544 can be used.

[0363] The insulator 545 may have a layered structure, similar to the second gate insulating film. As transistors become smaller and more highly integrated, problems such as leakage current may occur due to the thinning of the gate insulating film. Therefore, by making the insulator that functions as the gate insulating film have a layered structure of a high-k material and a thermally stable material, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness. In addition, a layered structure that is thermally stable and has a high relative dielectric constant can be obtained.

[0364] Although the conductor 560 functioning as the first gate electrode is shown as having a two-layer structure in FIGS. 16A and 16B, it may have a single-layer structure or a laminated structure of three or more layers.

[0365] The conductor 560a is preferably made of a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. Alternatively, it is preferably made of a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.). The conductor 560a has a function of suppressing the diffusion of oxygen, so that it is possible to suppress the conductor 560b from being oxidized by the oxygen contained in the insulator 545 and its conductivity from decreasing. As a conductive material having a function of suppressing the diffusion of oxygen, for example, tantalum, tantalum nitride, ruthenium, or ruthenium oxide is preferably used. In addition, an oxide semiconductor applicable to the oxide 530 can be used as the conductor 560a. In that case, the conductor 560b can be formed by a sputtering method to reduce the electrical resistance value of the conductor 560a and make it a conductor. This can be called an OC (Oxide Conductor) electrode.

[0366] The conductor 560b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductor 560b also functions as wiring, so it is preferable to use a conductor with high conductivity. For example, a conductive material containing tungsten, copper, or aluminum as a main component can be used. The conductor 560b may have a layered structure, for example, a layered structure of titanium or titanium nitride and the above conductive material.

[0367] The insulator 580 is provided on the conductor 542a and the conductor 542b via the insulator 544. The insulator 580 preferably has an excess oxygen region. For example, the insulator 580 preferably has silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, silicon oxide having voids, or a resin. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In particular, silicon oxide and silicon oxide having voids are preferable because they can easily form an excess oxygen region in a later step.

[0368] The insulator 580 preferably has an excess oxygen region. By providing the insulator 580 from which oxygen is released by heating, oxygen in the insulator 580 can be efficiently supplied to the oxide 530. Note that the concentration of impurities such as water or hydrogen in the insulator 580 is preferably reduced.

[0369] The opening of insulator 580 is formed to overlap the region between conductor 542a and conductor 542b, so that conductor 560 is formed so as to be embedded in the opening of insulator 580 and the region sandwiched between conductor 542a and conductor 542b.

[0370] In miniaturizing a semiconductor device, it is necessary to shorten the gate length, but it is also necessary to prevent the conductivity of the conductor 560 from decreasing. If the film thickness of the conductor 560 is increased for that purpose, the conductor 560 may have a shape with a high aspect ratio. In this embodiment, the conductor 560 is provided so as to be embedded in the opening of the insulator 580, so that even if the conductor 560 has a shape with a high aspect ratio, the conductor 560 can be formed without collapsing during the process.

[0371] The insulator 574 is preferably provided in contact with a top surface of the insulator 580, a top surface of the conductor 560, and a top surface of the insulator 545. By forming the insulator 574 by a sputtering method, an excess oxygen region can be provided in the insulator 545 and the insulator 580. This allows oxygen to be supplied from the excess oxygen region into the oxide 530.

[0372] For example, the insulator 574 can be a metal oxide containing one or more elements selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, and the like.

[0373] In particular, aluminum oxide has high barrier properties and can suppress the diffusion of hydrogen and nitrogen even in a thin film with a thickness of 0.5 nm to 3.0 nm. Therefore, aluminum oxide formed by sputtering can function as a barrier film against impurities such as hydrogen as well as an oxygen source.

[0374] An insulator 581 functioning as an interlayer film is preferably provided over the insulator 574. Like the insulator 524, the insulator 581 preferably has a reduced concentration of impurities such as water or hydrogen.

[0375] Conductor 540a and conductor 540b are arranged in openings formed in insulator 581, insulator 574, insulator 580, and insulator 544. Conductor 540a and conductor 540b are provided facing each other with conductor 560 interposed therebetween. Conductor 540a and conductor 540b have the same configuration as conductor 546 and conductor 548, which will be described later.

[0376] An insulator 582 is provided over the insulator 581. The insulator 582 is preferably made of a substance that has a barrier property against oxygen and hydrogen. Therefore, the insulator 582 can be made of a material similar to that of the insulator 514. For example, the insulator 582 is preferably made of a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide.

[0377] In particular, aluminum oxide has a high blocking effect of preventing the film from permeating both oxygen and impurities such as hydrogen and moisture, which are factors that cause fluctuations in the electrical characteristics of a transistor. Therefore, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 500 during and after the transistor manufacturing process. In addition, aluminum oxide can suppress the release of oxygen from the oxide that constitutes the transistor 500. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 500.

[0378] An insulator 586 is provided over the insulator 582. The insulator 586 can be formed using a material similar to that of the insulator 320. By using a material with a relatively low dielectric constant for these insulators, parasitic capacitance between wirings can be reduced. For example, a silicon oxide film, a silicon oxynitride film, or the like can be used as the insulator 586.

[0379] In addition, conductors 546, 548, etc. are embedded in insulators 520, 522, 524, 544, 580, 574, 581, 582, and 586.

[0380] The conductor 546 and the conductor 548 function as a plug or wiring that connects to the capacitor 600, the transistor 500, or the transistor 550. The conductor 546 and the conductor 548 can be formed using a material similar to that of the conductor 328 and the conductor 330.

[0381] After the transistor 500 is formed, an opening may be formed to surround the transistor 500, and an insulator having a high barrier property against hydrogen or water may be formed to cover the opening. By surrounding the transistor 500 with the insulator having a high barrier property, it is possible to prevent moisture and hydrogen from entering from the outside. Alternatively, a plurality of transistors 500 may be collectively surrounded by an insulator having a high barrier property against hydrogen or water. When an opening is formed to surround the transistor 500, for example, an opening reaching the insulator 522 or the insulator 514 is formed, and the insulator having a high barrier property is formed in contact with the insulator 522 or the insulator 514, which is preferable because it serves as part of the manufacturing process of the transistor 500. Note that the insulator having a high barrier property against hydrogen or water may be made of a material similar to that of the insulator 522 or the insulator 514, for example.

[0382] Subsequently, a capacitor 600 is provided above the transistor 500. The capacitor 600 has a conductor 610, a conductor 620, and an insulator 630.

[0383] A conductor 612 may be provided over the conductor 546 and the conductor 548. The conductor 612 functions as a plug or a wiring connected to the transistor 500. The conductor 610 functions as an electrode of the capacitor 600. Note that the conductor 612 and the conductor 610 can be formed at the same time.

[0384] A metal film containing an element selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or a metal nitride film containing the above-mentioned element (tantalum nitride film, titanium nitride film, molybdenum nitride film, tungsten nitride film), etc. can be used for the conductor 612 and the conductor 610. Alternatively, a conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide with added silicon oxide can also be used.

[0385] In this embodiment, the conductor 612 and the conductor 610 have a single-layer structure, but the present invention is not limited to this structure and may have a stacked structure of two or more layers. For example, a conductor having a barrier property and a conductor having high adhesion to the conductor having high conductivity may be formed between a conductor having a barrier property and a conductor having high conductivity.

[0386] The conductor 620 is provided so as to overlap with the conductor 610 with the insulator 630 interposed therebetween. Note that the conductor 620 can be made of a conductive material such as a metal material, an alloy material, or a metal oxide material. It is preferable to use a high melting point material such as tungsten or molybdenum that has both heat resistance and conductivity, and it is particularly preferable to use tungsten. When the conductor 620 is formed simultaneously with other components such as a conductor, a low resistance metal material such as Cu (copper) or Al (aluminum) may be used.

[0387] An insulator 640 is provided over the conductor 620 and the insulator 630. The insulator 640 can be provided using a material similar to that of the insulator 320. The insulator 640 may also function as a planarizing film that covers the uneven shape underneath.

[0388] With this structure, miniaturization or high integration can be achieved in a semiconductor device including a transistor including an oxide semiconductor.

[0389] Examples of the substrate that can be used in the semiconductor device according to one embodiment of the present invention include a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, a metal substrate (e.g., a stainless steel substrate, a substrate having stainless steel foil, a tungsten substrate, a substrate having tungsten foil, etc.), a semiconductor substrate (e.g., a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate, etc.), and an SOI (Silicon on Insulator) substrate. A plastic substrate having heat resistance that can withstand the processing temperature of this embodiment may also be used. Examples of the glass substrate include barium borosilicate glass, aluminosilicate glass, aluminoborosilicate glass, and soda-lime glass. In addition, crystallized glass and the like can be used.

[0390] Alternatively, a flexible substrate, a laminated film, a paper containing a fibrous material, or a base film can be used as the substrate. Examples of flexible substrates, laminated films, base films, etc. include the following. For example, there are plastics such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), and polytetrafluoroethylene (PTFE). Alternatively, there are synthetic resins such as acrylic. Alternatively, there are polypropylene, polyester, polyvinyl fluoride, and polyvinyl chloride. Alternatively, there are polyamide, polyimide, aramid resin, epoxy resin, inorganic deposition film, and paper. In particular, by manufacturing transistors using a semiconductor substrate, a single crystal substrate, or an SOI substrate, etc., it is possible to manufacture transistors with small variations in characteristics, size, or shape, high current capacity, and small size. When a circuit is constructed using such transistors, it is possible to reduce the power consumption of the circuit or to increase the integration of the circuit.

[0391] Alternatively, a flexible substrate may be used as the substrate, and transistors, resistors, and / or capacitors may be formed directly on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate and the transistors, resistors, and / or capacitors. The peeling layer can be used to separate a semiconductor device from the substrate after a part or whole of the semiconductor device is completed thereon, and transfer the semiconductor device to another substrate. In this case, the transistors, resistors, and / or capacitors can be transferred to a substrate having poor heat resistance or a flexible substrate. For the peeling layer, for example, a laminated structure of inorganic films of a tungsten film and a silicon oxide film, a structure in which an organic resin film such as polyimide is formed on a substrate, a silicon film containing hydrogen, or the like can be used.

[0392] That is, the semiconductor device may be formed on a certain substrate, and then the semiconductor device may be transferred to another substrate. Examples of substrates onto which the semiconductor device may be transferred include substrates on which the above-mentioned transistors can be formed, as well as paper substrates, cellophane substrates, aramid film substrates, polyimide film substrates, stone substrates, wood substrates, cloth substrates (including natural fibers (silk, cotton, hemp), synthetic fibers (nylon, polyurethane, polyester), or regenerated fibers (acetate, cupra, rayon, regenerated polyester), etc.), leather substrates, or rubber substrates. By using these substrates, it is possible to manufacture semiconductor devices that are flexible, that are not easily broken, that have heat resistance, and that are lightweight or thin.

[0393] By providing a semiconductor device over a flexible substrate, an increase in weight can be suppressed and a semiconductor device that is less likely to be damaged can be provided.

[0394] <Transistor modification 1> A transistor 500A shown in FIGS. 17A, 17B, and 17C is a modification of the transistor 500 having the structure shown in FIGS. 16A and 16B. FIG. 17A is a top view of the transistor 500A, FIG. 17B is a cross-sectional view of the transistor 500A in the channel length direction, and FIG. 17C is a cross-sectional view of the transistor 500A in the channel width direction. Note that some elements are omitted in the top view of FIG. 17A for clarity. The structures shown in FIGS. 17A, 17B, and 17C can also be applied to other transistors included in the semiconductor device of one embodiment of the present invention, such as the transistor 550.

[0395] 17A, 17B, and 17C differs from transistor 500 shown in FIGS. 16A and 16B in that transistor 500A includes insulator 552, insulator 513, and insulator 404. Transistor 500A also differs from transistor 500 shown in FIGS. 16A and 16B in that insulator 552 is provided in contact with a side surface of conductor 540a and insulator 552 is provided in contact with a side surface of conductor 540b. Transistor 500A also differs from transistor 500 shown in FIGS. 16A and 16B in that insulator 520 is not provided.

[0396] 17A, 17B, and 17C, an insulator 513 is provided over an insulator 512. Furthermore, an insulator 404 is provided over the insulator 574 and the insulator 513.

[0397] 17A, 17B, and 17C, the insulator 514, the insulator 516, the insulator 522, the insulator 524, the insulator 544, the insulator 580, and the insulator 574 are patterned, and the insulator 404 covers them. That is, the insulator 404 contacts the top surface of the insulator 574, the side surface of the insulator 574, the side surface of the insulator 580, the side surface of the insulator 544, the side surface of the insulator 524, the side surface of the insulator 522, the side surface of the insulator 516, the side surface of the insulator 514, and the top surface of the insulator 513. As a result, the oxide 530 and the like are isolated from the outside by the insulator 404 and the insulator 513.

[0398] The insulator 513 and the insulator 404 preferably have a high function of suppressing diffusion of hydrogen (for example, at least one of hydrogen atoms, hydrogen molecules, and the like) or water molecules. For example, the insulator 513 and the insulator 404 are preferably made of silicon nitride or silicon nitride oxide, which are materials with high hydrogen barrier properties. This can suppress diffusion of hydrogen and the like into the oxide 530, thereby suppressing deterioration in the characteristics of the transistor 500A. Therefore, the reliability of the semiconductor device of one embodiment of the present invention can be improved.

[0399] The insulator 552 is provided in contact with the insulator 581, the insulator 404, the insulator 574, the insulator 580, and the insulator 544. The insulator 552 preferably has a function of suppressing diffusion of hydrogen or water molecules. For example, the insulator 552 is preferably made of an insulator having a high hydrogen barrier property, such as silicon nitride, aluminum oxide, or silicon nitride oxide. In particular, silicon nitride is preferably used as the insulator 552 because it has a high hydrogen barrier property. By using a material having a high hydrogen barrier property as the insulator 552, impurities such as water or hydrogen can be suppressed from diffusing from the insulator 580 or the like to the oxide 530 through the conductor 540a and the conductor 540b. Furthermore, oxygen contained in the insulator 580 can be suppressed from being absorbed by the conductor 540a and the conductor 540b. As described above, the reliability of the semiconductor device of one embodiment of the present invention can be improved.

[0400] <Transistor modification 2> A configuration example of a transistor 500B will be described with reference to Figures 18A, 18B, and 18C. Figure 18A is a top view of the transistor 500B. Figure 18B is a cross-sectional view of the L1-L2 portion shown by the dashed line in Figure 18A. Figure 18C is a cross-sectional view of the W1-W2 portion shown by the dashed line in Figure 18A. Note that in the top view of Figure 18A, some elements are omitted for clarity.

[0401] The transistor 500B is a modified example of the transistor 500 and can be substituted for the transistor 500. Therefore, in order to avoid repetition of the description, the following description will mainly focus on the differences between the transistor 500B and the transistor 500.

[0402] The conductor 560 functioning as the first gate electrode has a conductor 560a and a conductor 560b on the conductor 560a. The conductor 560a is preferably made of a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms. Alternatively, it is preferably made of a conductive material having a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, and the like).

[0403] The conductor 560a has a function of suppressing oxygen diffusion, which improves the material selectivity of the conductor 560b. In other words, the presence of the conductor 560a suppresses oxidation of the conductor 560b, thereby preventing a decrease in electrical conductivity.

[0404] It is preferable to provide an insulator 544 so as to cover the top surface and side surfaces of the conductor 560 and the side surfaces of the insulator 545. Note that the insulator 544 may be made of an insulating material having a function of suppressing the diffusion of impurities such as water or hydrogen, and oxygen. For example, it is preferable to use aluminum oxide or hafnium oxide. In addition, for example, metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, or tantalum oxide, silicon nitride oxide, or silicon nitride may also be used.

[0405] Providing the insulator 544 can suppress oxidation of the conductor 560. Furthermore, providing the insulator 544 can suppress diffusion of impurities such as water and hydrogen contained in the insulator 580 to the transistor 500B.

[0406] In the transistor 500B, the conductor 560 overlaps with part of the conductor 542a and part of the conductor 542b, and thus the parasitic capacitance of the transistor 500B is likely to be larger than that of the transistor 500. Thus, the operating frequency of the transistor 500B tends to be lower than that of the transistor 500. However, the productivity of the transistor 500B is higher than that of the transistor 500 because a step of forming an opening in the insulator 580 or the like and filling the conductor 560 and the insulator 545 is not required.

[0407] The configurations, structures, methods, and the like described in this embodiment can be used in appropriate combination with the configurations, structures, methods, and the like described in other embodiment modes and examples.

[0408] (Embodiment 4) In this embodiment, an oxide semiconductor, which is a type of metal oxide, will be described.

[0409] The metal oxide preferably contains at least indium or zinc. In particular, it is preferable that the metal oxide contains indium and zinc. In addition to these, it is preferable that the metal oxide contains aluminum, gallium, yttrium, tin, etc. In addition, it may contain one or more elements selected from boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc.

[0410] <Classification of crystal structures> First, classification of crystal structures in oxide semiconductors will be described with reference to Fig. 19A. Fig. 19A is a diagram for explaining classification of crystal structures of oxide semiconductors, typically IGZO (metal oxide containing In, Ga, and Zn).

[0411] As shown in FIG. 19A, oxide semiconductors are broadly classified into "Amorphous", "Crystalline", and "Crystal". "Amorphous" includes completely amorphous. "Crystalline" includes c-axis-aligned crystalline (CAAC), nanocrystalline (nc), and cloud-aligned composite (CAC). "Crystalline" excludes single crystal, poly crystal, and completely amorphous. "Crystal" includes single crystal and poly crystal.

[0412] The structure in the bold frame shown in Fig. 19A is an intermediate state between "Amorphous" and "Crystal" and belongs to a new boundary region (New crystalline phase). In other words, this structure is completely different from the energetically unstable "Amorphous" and "Crystal".

[0413] The crystal structure of the film or substrate can be evaluated using an X-ray diffraction (XRD) spectrum. FIG. 19B shows an XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement of the CAAC-IGZO film classified as "Crystalline". The GIXD method is also called the thin film method or the Seemann-Bohlin method. Hereinafter, the XRD spectrum obtained by the GIXD measurement shown in FIG. 19B will be simply referred to as the XRD spectrum. The vertical axis of FIG. 19B is the intensity, and the horizontal axis is 2θ. The composition of the CAAC-IGZO film shown in FIG. 19B is in the vicinity of In:Ga:Zn=4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in FIG. 19B is 500 nm.

[0414] As shown in Figure 19B, a clear peak indicating crystallinity is detected in the XRD spectrum of the CAAC-IGZO film. Specifically, a peak indicating c-axis orientation is detected near 2θ=31° in the XRD spectrum of the CAAC-IGZO film. Note that, as shown in Figure 19B, the peak near 2θ=31° is asymmetric with respect to the angle at which the peak intensity is detected.

[0415] The crystal structure of the film or substrate can be evaluated by a diffraction pattern (also called a nanobeam electron diffraction pattern) observed by nanobeam electron diffraction (NBED). The diffraction pattern of the CAAC-IGZO film is shown in FIG. 19C. FIG. 19C is a diffraction pattern observed by NBED, which causes an electron beam to be incident parallel to the substrate. The composition of the CAAC-IGZO film shown in FIG. 19C is approximately In:Ga:Zn=4:2:3 [atomic ratio]. In the nanobeam electron diffraction method, electron diffraction is performed with a probe diameter of 1 nm.

[0416] As shown in FIG. 19C, multiple spots indicating c-axis orientation are observed in the diffraction pattern of the CAAC-IGZO film.

[0417] <<Structure of oxide semiconductor>> In addition, when focusing on the crystal structure, oxide semiconductors may be classified differently from that shown in FIG. 19A. For example, oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the above-mentioned CAAC-OS and nc-OS. In addition, non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors, amorphous-like oxide semiconductors (a-like OS), amorphous oxide semiconductors, and the like.

[0418] Here, the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described in detail.

[0419] [CAAC-OS] CAAC-OS is an oxide semiconductor having a plurality of crystalline regions, each of which has a c-axis aligned in a specific direction. The specific direction is the thickness direction of the CAAC-OS film, the normal direction of the surface on which the CAAC-OS film is formed, or the normal direction of the surface of the CAAC-OS film. The crystalline region is a region having periodic atomic arrangement. If the atomic arrangement is considered as a lattice arrangement, the crystalline region is also a region with a uniform lattice arrangement. CAAC-OS has a region in which a plurality of crystalline regions are connected in the ab-plane direction, and the region may have distortion. The distortion refers to a portion in which the direction of the lattice arrangement changes between a region with a uniform lattice arrangement and another region with a uniform lattice arrangement in the region in which the plurality of crystalline regions are connected. In other words, CAAC-OS is an oxide semiconductor having a c-axis aligned and no clear orientation in the ab-plane direction.

[0420] Each of the multiple crystalline regions is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of one minute crystal, the maximum diameter of the crystalline region is less than 10 nm. When a crystalline region is composed of many minute crystals, the size of the crystalline region may be about several tens of nm.

[0421] In addition, in an In-M-Zn oxide (wherein element M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, etc.), the CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium (In) and oxygen (hereinafter, In layer) and a layer containing element M, zinc (Zn), and oxygen (hereinafter, (M, Zn) layer) are stacked. Note that indium and element M are mutually substituted. Thus, the (M, Zn) layer may contain indium. Also, the In layer may contain element M. Note that the In layer may contain Zn. The layered structure is observed as a lattice image in a high-resolution TEM image, for example.

[0422] When the CAAC-OS film is subjected to structural analysis using, for example, an XRD device, a peak indicating c-axis orientation is detected at or near 2θ=31° in out-of-plane XRD measurement using θ / 2θ scan. Note that the position of the peak indicating c-axis orientation (2θ value) may vary depending on the type and composition of the metal elements constituting the CAAC-OS.

[0423] For example, a plurality of bright points (spots) are observed in the electron diffraction pattern of the CAAC-OS film, and the two spots are observed at positions symmetrical to each other with respect to the spot of the incident electron beam that has passed through the sample (also called the direct spot).

[0424] When the crystal region is observed from the specific direction, the lattice arrangement in the crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be a non-regular hexagon. The above distortion may have a pentagonal or heptagonal lattice arrangement. In addition, no clear grain boundary can be confirmed in the CAAC-OS even in the vicinity of the distortion. That is, it is found that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is considered to be because the CAAC-OS can tolerate distortion due to the fact that the arrangement of oxygen atoms is not dense in the ab-plane direction and the bond distance between atoms changes due to the substitution of metal atoms.

[0425] A crystal structure in which clear grain boundaries are observed is called a polycrystal. The grain boundaries are likely to become recombination centers and capture carriers, causing a decrease in the on-current of a transistor and a decrease in field effect mobility. Therefore, CAAC-OS in which clear grain boundaries are not observed is one of the crystalline oxides having a crystal structure suitable for a semiconductor layer of a transistor. In order to form a CAAC-OS, a structure containing Zn is preferable. For example, In-Zn oxide and In-Ga-Zn oxide are suitable because they can suppress the occurrence of grain boundaries more than In oxide.

[0426] The CAAC-OS is an oxide semiconductor with high crystallinity and no clear crystal grain boundaries. Therefore, it can be said that the CAAC-OS is less susceptible to a decrease in electron mobility due to crystal grain boundaries. In addition, since the crystallinity of an oxide semiconductor can be decreased by the inclusion of impurities or the generation of defects, the CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Therefore, the physical properties of an oxide semiconductor having the CAAC-OS are stable. Therefore, an oxide semiconductor having the CAAC-OS is resistant to heat and has high reliability. In addition, the CAAC-OS is stable against high temperatures (so-called thermal budget) in the manufacturing process. Therefore, the use of the CAAC-OS in an OS transistor can increase the degree of freedom in the manufacturing process.

[0427] [nc-OS] The nc-OS has periodic atomic arrangement in a minute region (for example, a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). In other words, the nc-OS has minute crystals. Note that the size of the minute crystals is, for example, 1 nm to 10 nm, particularly 1 nm to 3 nm, and therefore the minute crystals are also called nanocrystals. In addition, the nc-OS does not show regularity in the crystal orientation between different nanocrystals. Therefore, no orientation is seen in the entire film. Therefore, depending on the analysis method, the nc-OS may be indistinguishable from an a-like OS or an amorphous oxide semiconductor. For example, when a structure analysis is performed on an nc-OS film using an XRD device, no peak indicating crystallinity is detected in out-of-plane XRD measurement using θ / 2θ scan. In addition, when an nc-OS film is subjected to electron diffraction (also called selected area electron diffraction) using an electron beam with a probe diameter larger than that of nanocrystals (for example, 50 nm or more), a diffraction pattern like a halo pattern is observed. On the other hand, when electron diffraction (also called nanobeam electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter (e.g., 1 nm to 30 nm) that is close to the size of a nanocrystal or smaller than the nanocrystal, an electron diffraction pattern in which multiple spots are observed within a ring-shaped region centered on the direct spot may be obtained.

[0428] [a-like OS] The a-like OS is an oxide semiconductor having a structure between the nc-OS and an amorphous oxide semiconductor. The a-like OS has a void or low-density region. That is, the a-like OS has lower crystallinity than the nc-OS and CAAC-OS. Moreover, the a-like OS has a higher hydrogen concentration in the film than the nc-OS and CAAC-OS.

[0429] <<Oxide semiconductor structure>> Next, the above-mentioned CAC-OS will be described in detail, with reference to its material composition.

[0430] [CAC-OS] CAC-OS is, for example, a material configuration in which elements constituting a metal oxide are unevenly distributed in a size range of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or in the vicinity thereof. In the following, a state in which one or more metal elements are unevenly distributed in a metal oxide and the regions having the metal elements are mixed in a size range of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or in the vicinity thereof, is also referred to as a mosaic or patch state.

[0431] Furthermore, CAC-OS is a composite metal oxide in which the material is separated into a first region and a second region, forming a mosaic structure, and the first region is distributed throughout the film (hereinafter, also referred to as a cloud structure). In other words, CAC-OS is a composite metal oxide in which the first region and the second region are mixed together.

[0432] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in the In-Ga-Zn oxide are represented as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS in the In-Ga-Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. Also, the second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is a region where [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region. Also, the second region is a region where [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.

[0433] Specifically, the first region is a region mainly composed of indium oxide, indium zinc oxide, etc., and the second region is a region mainly composed of gallium oxide, gallium zinc oxide, etc. In other words, the first region can be rephrased as a region mainly composed of In, and the second region can be rephrased as a region mainly composed of Ga.

[0434] In addition, there are cases where a clear boundary between the first region and the second region cannot be observed.

[0435] For example, in the case of a CAC-OS of an In-Ga-Zn oxide, EDX mapping obtained using EDX (Energy Dispersive X-ray spectroscopy) has confirmed that the CAC-OS has a structure in which a region mainly composed of In (first region) and a region mainly composed of Ga (second region) are unevenly distributed and mixed.

[0436] When CAC-OS is used in a transistor, the conductivity due to the first region and the insulating property due to the second region act in a complementary manner, giving the CAC-OS a switching function (On / Off function). In other words, CAC-OS has a conductive function in part of the material and an insulating function in other parts of the material, and the material as a whole functions as a semiconductor. By separating the conductive function from the insulating function, it is possible to maximize both functions. Therefore, by using CAC-OS in a transistor, it is possible to achieve a high on-current (I on ), high field effect mobility (μ), and good switching behavior can be achieved.

[0437] Oxide semiconductors have a variety of structures and have different characteristics. The oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, a CAC-OS, an nc-OS, and a CAAC-OS.

[0438] <Transistor Having Oxide Semiconductor> Next, the case where the oxide semiconductor is used for a transistor will be described.

[0439] By using the oxide semiconductor for a transistor, a transistor with high field-effect mobility and high reliability can be realized.

[0440] For the transistor, an oxide semiconductor having a low carrier concentration is preferably used. For example, the carrier concentration of the oxide semiconductor is 1×10 17 cm -3 Less than or equal to 1×10 15 cm -3 Less than 1×10, more preferably 13 cm -3 Less than or equal to 1×10 11 cm -3 Less than 1×10, more preferably 10 cm -3 Less than 1 x 10 -9 cm-3 The above is the case. Note that in order to reduce the carrier concentration of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be reduced to reduce the density of defect states. In this specification and the like, an oxide semiconductor having a low impurity concentration and a low density of defect states is referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor. Note that an oxide semiconductor having a low carrier concentration may be referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor.

[0441] Furthermore, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states, and therefore the density of trap states might also be low.

[0442] In addition, charges trapped in the trap states of an oxide semiconductor take a long time to disappear and may behave as if they are fixed charges. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high density of trap states may have unstable electrical characteristics.

[0443] Therefore, in order to stabilize the electrical characteristics of a transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. In order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in a nearby film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

[0444] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0445] When an oxide semiconductor contains silicon or carbon, which is one of the group 14 elements, defect levels are formed in the oxide semiconductor. For this reason, the concentrations of silicon or carbon in the oxide semiconductor and those near the interface with the oxide semiconductor (concentrations obtained by secondary ion mass spectrometry (SIMS)) are calculated as 2×10 18 atoms / cm 3 Less than or equal to 2 x 10 17atoms / cm 3 The following applies.

[0446] In addition, when an oxide semiconductor contains an alkali metal or an alkaline earth metal, defect states may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal is likely to have normally-on characteristics. For this reason, when the concentration of an alkali metal or an alkaline earth metal in an oxide semiconductor obtained by SIMS is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 To the following:

[0447] Furthermore, when nitrogen is contained in an oxide semiconductor, electrons serving as carriers are generated, the carrier concentration increases, and the semiconductor is likely to become n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor is likely to have normally-on characteristics. Alternatively, when nitrogen is contained in an oxide semiconductor, trap states may be formed. As a result, the electrical characteristics of the transistor may become unstable. For this reason, the nitrogen concentration in an oxide semiconductor obtained by SIMS is set to 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than 5×10, more preferably 17 atoms / cm 3 To the following:

[0448] Furthermore, hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to form water, which may form an oxygen vacancy. When hydrogen enters the oxygen vacancy, electrons serving as carriers may be generated. In addition, some of the hydrogen may bond with oxygen bonded to a metal atom to generate electrons serving as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen is likely to have normally-on characteristics. For this reason, it is preferable to reduce hydrogen in the oxide semiconductor as much as possible. Specifically, when the hydrogen concentration in an oxide semiconductor measured by SIMS is 1×10 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3 less than 5×10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 Make it less than.

[0449] When an oxide semiconductor in which impurities are sufficiently reduced is used for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0450] The configurations, structures, methods, and the like described in this embodiment can be used in appropriate combination with the configurations, structures, methods, and the like described in other embodiment modes and examples.

[0451] (Embodiment 5) In this embodiment, electronic devices of one embodiment of the present invention will be described with reference to FIGS.

[0452] The electronic device of this embodiment includes the display device of one embodiment of the present invention. For example, the display device of one embodiment of the present invention can be applied to a display portion of an electronic device. The display device of one embodiment of the present invention has a function of detecting light, and therefore can perform biometric authentication or detect touch or near-touch in the display portion. This can improve the functionality, convenience, and the like of the electronic device.

[0453] Examples of electronic devices include electronic devices with relatively large screens, such as television sets, desktop or notebook personal computers, computer monitors, digital signage, large game machines such as pachinko machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and audio playback devices.

[0454] The electronic device of this embodiment may have a sensor (including a function to measure force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays).

[0455] The electronic device of the present embodiment can have various functions, such as a function of displaying various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function of displaying a calendar, date, time, etc., a function of executing various software (programs), a wireless communication function, a function of reading out a program or data recorded on a recording medium, etc.

[0456] Electronic device 6500 shown in FIG. 20A is a portable information terminal that can be used as a smartphone.

[0457] The electronic device 6500 includes a housing 6501, a display portion 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, and a light source 6508. The display portion 6502 has a touch panel function.

[0458] The display device of one embodiment of the present invention can be applied to the display portion 6502.

[0459] FIG. 20B is a schematic cross-sectional view including the end of the housing 6501 on the microphone 6506 side.

[0460] A light-transmitting protective member 6510 is provided on the display surface side of the housing 6501, and a display panel 6511, optical members 6512, a touch sensor panel 6513, a printed circuit board 6517, a battery 6518, etc. are arranged in the space surrounded by the housing 6501 and the protective member 6510.

[0461] A display panel 6511, an optical member 6512, and a touch sensor panel 6513 are fixed to the protective member 6510 by an adhesive layer (not shown).

[0462] In an area outside the display unit 6502, a part of the display panel 6511 is folded back, and the folded back part is connected to an FPC 6515. An IC 6516 is mounted on the FPC 6515. The FPC 6515 is connected to a terminal provided on a printed circuit board 6517.

[0463] The flexible display of one embodiment of the present invention can be applied to the display panel 6511. Therefore, an extremely lightweight electronic device can be realized. In addition, since the display panel 6511 is extremely thin, a large-capacity battery 6518 can be mounted thereon while suppressing the thickness of the electronic device. In addition, by folding back a part of the display panel 6511 and arranging a connection portion with the FPC 6515 on the back side of the pixel portion, an electronic device with a narrow frame can be realized.

[0464] 21A shows an example of a television device. In a television device 7100, a display unit 7000 is incorporated in a housing 7101. Here, the housing 7101 is supported by a stand 7103.

[0465] The display device of one embodiment of the present invention can be applied to the display portion 7000.

[0466] 21A can be operated using an operation switch provided on the housing 7101 or a separate remote control 7111. Alternatively, a touch sensor may be provided on the display unit 7000, and the television unit 7100 may be operated by touching the display unit 7000 with a finger or the like. The remote control 7111 may have a display unit that displays information output from the remote control 7111. Using operation keys or a touch panel provided on the remote control 7111, it is possible to operate the channel and volume, and to operate the video displayed on the display unit 7000.

[0467] The television device 7100 includes a receiver and a modem. The receiver can receive general television broadcasts. By connecting to a wired or wireless communication network via the modem, one-way (from sender to receiver) or two-way (between sender and receiver, or between receivers) information communication can be performed.

[0468] 21B shows an example of a laptop personal computer 7200. The laptop personal computer 7200 includes a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, and the like. A display unit 7000 is incorporated in the housing 7211.

[0469] The display device of one embodiment of the present invention can be applied to the display portion 7000.

[0470] 21C and 21D show an example of digital signage.

[0471] 21C includes a housing 7301, a display unit 7000, and a speaker 7303. The digital signage 7300 may further include an LED lamp, an operation key (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, and the like.

[0472] 21D shows a digital signage 7400 attached to a cylindrical pole 7401. The digital signage 7400 has a display unit 7000 provided along the curved surface of the pole 7401.

[0473] 21C and 21D, the display device of one embodiment of the present invention can be applied to the display portion 7000.

[0474] The larger the display unit 7000, the more information can be provided at one time. Also, the larger the display unit 7000, the more easily it catches people's attention, which can increase the advertising effect of, for example, advertisements.

[0475] Applying a touch panel to the display unit 7000 is preferable because it not only displays images or videos on the display unit 7000 but also allows the user to intuitively operate it. Furthermore, when used for providing information such as route information or traffic information, usability can be improved by intuitive operation.

[0476] 21C and 21D, it is preferable that the digital signage 7300 or the digital signage 7400 can be linked to an information terminal 7311 or an information terminal 7411 such as a smartphone carried by a user via wireless communication. For example, advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411. Furthermore, the display on the display unit 7000 can be switched by operating the information terminal 7311 or the information terminal 7411.

[0477] In addition, a game can be executed on the digital signage 7300 or the digital signage 7400 using the screen of the information terminal 7311 or the information terminal 7411 as an operation means (controller). This allows an unspecified number of users to participate in and enjoy the game at the same time.

[0478] The electronic device shown in Figures 22A to 22F has a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (including a function to measure force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor or infrared rays), a microphone 9008, etc.

[0479] The electronic device shown in Fig. 22A to Fig. 22F has various functions. For example, it can have a function of displaying various information (still images, videos, text images, etc.) on the display unit, a touch panel function, a function of displaying a calendar, date or time, a function of controlling processing by various software (programs), a wireless communication function, a function of reading and processing a program or data recorded on a recording medium, etc. The functions of the electronic device are not limited to these, and it can have various functions. The electronic device may have multiple display units. In addition, the electronic device may have a function of providing a camera or the like to capture still images and videos and store them on a recording medium (external or built-in to the camera), a function of displaying the captured images on the display unit, etc.

[0480] The electronic device shown in FIGS. 22A to 22F will be described in detail below.

[0481] FIG. 22A is a perspective view showing a mobile information terminal 9101. The mobile information terminal 9101 can be used as, for example, a smartphone. The mobile information terminal 9101 may be provided with a speaker 9003, a connection terminal 9006, a sensor 9007, and the like. The mobile information terminal 9101 can display text and image information on a plurality of surfaces. FIG. 22A shows an example in which three icons 9050 are displayed. Information 9051 shown in a dashed rectangle can also be displayed on another surface of the display unit 9001. Examples of the information 9051 include notifications of incoming e-mail, SNS, and phone calls, titles of e-mail and SNS, sender names, date and time, time, remaining battery power, and antenna reception strength. Alternatively, icons 9050 and the like may be displayed at the position where the information 9051 is displayed.

[0482] 22B is a perspective view showing a mobile information terminal 9102. The mobile information terminal 9102 has a function of displaying information on three or more sides of the display unit 9001. Here, an example is shown in which information 9052, information 9053, and information 9054 are displayed on different sides. For example, a user can check information 9053 displayed in a position that can be observed from above the mobile information terminal 9102 while the mobile information terminal 9102 is stored in a breast pocket of clothes. The user can check the display without taking the mobile information terminal 9102 out of the pocket and decide, for example, whether or not to answer a call.

[0483] FIG. 22C is a perspective view showing a wristwatch-type mobile information terminal 9200. The mobile information terminal 9200 can be used as, for example, a smart watch (registered trademark). The display surface of the display unit 9001 is curved, and display can be performed along the curved display surface. The mobile information terminal 9200 can also perform hands-free conversation by communicating with, for example, a headset capable of wireless communication. The mobile information terminal 9200 can also perform data transmission and charging with another information terminal through a connection terminal 9006. Note that charging may be performed by wireless power supply.

[0484] 22D, 22E, and 22F are perspective views showing a foldable mobile information terminal 9201. FIG. 22D is a perspective view of the mobile information terminal 9201 in an unfolded state, FIG. 22F is a perspective view of the mobile information terminal 9201 in a folded state, and FIG. 22E is a perspective view of a state in the middle of changing from one of FIG. 22D and FIG. 22F to the other. The mobile information terminal 9201 has excellent portability in a folded state, and has excellent viewability of the display due to a seamless wide display area in an unfolded state. The display unit 9001 of the mobile information terminal 9201 is supported by three housings 9000 connected by hinges 9055. For example, the display unit 9001 can be bent with a curvature radius of 0.1 mm or more and 150 mm or less.

[0485] At least a part of the configuration examples exemplified in this embodiment and the corresponding drawings can be implemented in appropriate combination with other configuration examples or drawings.

[0486] This embodiment mode can be implemented by appropriately combining at least a part of it with other embodiment modes described in this specification. [Explanation of symbols]

[0487] 10: display device, 10A: display device, 10B: display device, 10C: display device, 10K: display device, 10L: display device, 10M: display device, 11: display section, 12: pixel, 13: scanning line driving circuit, 13L: IC row, 13R: IC row, 14: optical sensor section, 15: demultiplexer, 16: host, 18: substrate, 19: FPC, 20: IC, 20_m: IC, 20_1: IC, 20_2: IC, 20_3: IC, 21: light emission, 21_m: circuit, 21_1: circuit, 21_2: circuit, 22: signal line driving circuit, 22_m: signal line driving circuit, 22_1: signal line driving circuit, 22_2: signal line driving circuit, 23: driving circuit, 23a: light, 23b: reflected light, 23c: light, 23d: reflected light, 24: detection circuit, 25: image processing circuit, 25_m: image processing circuit, 25_1: image processing circuit, 26: RAM, 26_m: RAM, 26_1: RAM, 27: CPU, 28: timing controller, 29: light, 41: transistor, 42: transistor, 50A: display device, 50B: display device, 51: substrate, 52: finger, 53: layer, 55: layer, 57: layer, 59: substrate, 70: substrate, 71: colored film, 72: conductive film, 73: EL element, 74: conductive film, 7 5: EL layer, 76: conductive film, 77: light shielding film, 78: insulating film, 79: conductive film, 79a: conductive film, 79b: conductive film, 80: conductive film, 81: conductive film, 84: conductive film, 85: conductive film, 87: insulating film, 100A: display device, 100B: display device, 100C: display device, 100D: display device, 110: light receiving element, 111: pixel electrode, 112: common layer, 113: active layer, 114: common layer, 115: common electrode, 142: adhesive layer, 143: space, 146: lens array, 149: lens, 151: substrate, 152: substrate, 153: substrate, 154: substrate, 155: adhesive layer, 16 2: display section, 164: circuit, 165: wiring, 166: conductive layer, 172: FPC, 182: buffer layer, 184: buffer layer, 190: light-emitting element, 191: pixel electrode, 192: buffer layer, 193: light-emitting layer, 194: buffer layer, 195: protective layer, 195a: inorganic insulating layer, 195b: organic insulating layer, 195c: inorganic insulating layer, 201: transistor, 204: connection section, 205: transistor, 206: transistor, 208: transistor, 209: transistor, 210: transistor, 211: insulating layer, 212: insulating layer, 213: insulating layer, 214: insulating layer,215: insulating layer, 216: partition wall, 217: partition wall, 218: insulating layer, 221: conductive layer, 222a: conductive layer, 222b: conductive layer, 223: conductive layer, 225: insulating layer, 228: region, 231: semiconductor layer, 231i: channel formation region, 231n: low resistance region, 242: connection layer, 311: substrate, 313: semiconductor region, 314a: low resistance region, 314b: low resistance region, 315: insulator, 316: conductor, 320: insulator, 322: insulator, 324: insulator, 326: insulator, 328: conductor, 330: conductor, 350: insulator, 352: insulator, 354: insulator, 356: conductor, 360: insulator, 362: insulator, 364: insulator, 366: conductor, 370: insulator, 372: insulator, 374: insulator, 376: conductor, 380: insulator, 382: insulator, 384: insulator, 386: conductor, 404: insulator, 500: transistor, 500A: transistor, 500B: transistor, 503: conductor, 503a: conductor, 503b: conductor, 510: insulator, 512: insulator, 513: insulator, 514: insulator, 516: insulator, 518: conductor, 520: insulator, 522: insulator, 524: insulator, 526: insulator, 530: oxide, 530a: oxide, 530b: oxide, 540a: conductor, 540b: conductor, 542: conductor, 542a: conductor, 542b: conductor, 543a: region, 543b: region, 544: insulator, 545: insulator, 546: conductor, 548: conductor, 550: transistor, 552: insulator, 560: conductor, 560a: conductor, 560b: conductor, 574: insulator, 580: insulator, 581: insulator, 582: insulator, 586: insulator, 600: capacitance, 610: conductor, 612: conductor, 620: conductor, 630: insulator, 64 0: insulator, 6500: electronic device, 6501: housing, 6502: display unit, 6503: power button, 6504: button, 6505: speaker, 6506: microphone, 6507: camera, 6508: light source, 6510: protective member, 6511: display panel, 6512: optical member, 6513: touch sensor panel, 6515: FPC, 6516: IC, 6517: printed circuit board, 6518: battery, 7000: display unit, 7100: television device, 7101: housing, 7103: stand, 7111: remote control device, 7200: notebook personal computer,7211: Housing, 7212: Keyboard, 7213: Pointing device, 7214: External connection port, 7300: Digital signage, 7301: Housing, 7303: Speaker, 7311: Information terminal, 7400: Digital signage, 7401: Pillar, 7411: Information terminal, 9000: Housing, 9001: Display unit, 9003: Speaker, 9005: Operation key, 9006: Connection terminal, 9007: Sensor, 9008: Microphone, 9050: Icon, 9051: Information, 9052: Information, 9053: Information, 9054: Information, 9055: Hinge, 9101: Portable information terminal, 9102: Portable information terminal, 9200: Portable information terminal, 9201: Portable information terminal,

Claims

[Claim 1] a first substrate having a display portion, a light sensor portion, and a terminal portion; a film having wiring electrically connected to the terminal portion; A chip having at least one semiconductor integrated circuit is mounted on the film; A touch panel unit is provided on one surface of a second substrate that overlaps the display unit, one surface of the first substrate and one surface of the second substrate are fixed to face each other; The chip having the semiconductor integrated circuit is a semiconductor device having a drive circuit for the optical sensor unit and a drive circuit for the touch panel unit.

Images