Power conversion device

Abstract

To provide a power conversion device that can achieve both stress relief and inductance reduction.SOLUTION: Terminals 301 to 303 have a bent portion 310 that is bent in a plane parallel to the wiring board 20, and a terminal connection portion 311 that is provided on the tip side of the bent portion 310. The wiring board 20 has first wiring portions 201 to 203 that are provided on the board surface and to which the terminals 301 to 303 are joined, and a second wiring portion that is the other of the first wiring portions. The first wiring portions 201 to 203 extend from one ends 201a, 202a, 203a that are connection regions to which the terminals 301 to 303 are connected, toward the semiconductor package 30 so as to face each other along the terminals 301 to 303, and the second wiring portions are connected to the other ends 201b, 202b, 203b that are ends on the extending side.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to a power conversion device. [Background technology]

[0002] Conventionally, in a power conversion device such as an inverter, a semiconductor package constituting an inverter circuit is mounted on a wiring board. In such a power conversion device, in order to improve reliability (e.g., cycle resistance), stress relaxation of a solder joint that joins a terminal of the semiconductor package to the wiring board is required.

[0003] For example, Patent Document 1 discloses a terminal structure in which a terminal is provided with a bent portion in order to relieve stress at a solder joint. By providing the bent portion, it is possible to relieve stress at the solder joint. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Patent No. 4476465 Summary of the Invention [Problem to be solved by the invention]

[0005] However, when the terminal is bent, the terminal becomes longer, which causes a problem of increased inductance in the terminal section. It is necessary to avoid such an increase in inductance in main terminals through which large currents flow, and it has been difficult to apply a bent structure to main terminals. [Means for solving the problem]

[0006] A power conversion device according to an embodiment of the present invention comprises a semiconductor package incorporating a semiconductor element and having a connection terminal protruding to the outside, and a wiring board on which the semiconductor package is mounted, wherein the terminal has a bent portion bent in a plane parallel to the wiring board and a terminal connection portion provided further towards the tip than the bent portion, and the wiring board has a first wiring portion provided on a surface of the board to which the terminal is joined, and another second wiring portion, wherein the first wiring portion extends in the direction of the semiconductor package so as to face along the terminal from a connection region to which the terminal is connected, and the second wiring portion is connected to the end of the extending side. Effect of the Invention

[0007] According to the present invention, it is possible to achieve both stress relaxation and inductance reduction. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram showing a schematic configuration of a power conversion device. [Diagram 2] FIG. 2 is a diagram illustrating a configuration of an inverter circuit. [Diagram 3] FIG. 3 is a diagram showing a semiconductor package mounted on a wiring board. [Figure 4] FIG. 4 is a cross-sectional view taken along line AA of FIG. [Diagram 5] FIG. 5 is a diagram showing an example of the arrangement of semiconductor packages of upper and lower arms on a wiring board. [Figure 6] FIG. 6 is a diagram showing a modification of the configuration shown in FIG. [Figure 7] FIG. 7 is a diagram showing a configuration of an inverter circuit according to the second embodiment. [Figure 8] FIG. 8 is a diagram illustrating a schematic arrangement of components of a U-phase inverter circuit on a wiring board. [Figure 9] FIG. 9 is a cross-sectional view taken along line BB of FIG. [Figure 10] FIG. 10 is a diagram showing a comparative example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, the embodiment of the present invention will be described with reference to the drawings. The following description and drawings are examples for explaining the present invention, and are omitted and simplified as appropriate for clarity of explanation. In addition, in the following description, the same or similar elements and processes are given the same reference numerals, and duplicate explanations may be omitted. Note that the contents described below are merely examples of the embodiment of the present invention, and the present invention is not limited to the following embodiment, and can be implemented in various other forms.

[0010] (First embodiment) FIG. 1 is a diagram showing a schematic configuration of a power conversion device 1. The power conversion device 1 converts DC power supplied from a DC voltage source 2 such as a battery into AC power to drive a motor 3. During braking of the motor 3, the power conversion device 1 is controlled to regenerate and convert the AC power into DC power. The power conversion device 1 includes an inverter circuit 10, a gate drive circuit 11, and a control circuit 12. The inverter circuit 10 includes a plurality of semiconductor elements that perform switching operations. The inverter circuit 10 is connected to the DC voltage source 2 by a positive wiring 103p and a negative wiring 103n. The control circuit 12 includes a microcomputer, a CPU, or the like.

[0011] 2 is a diagram showing the configuration of the inverter circuit 10. The inverter circuit 10 includes a pair of semiconductor elements 100a, 100b constituting an upper arm and a lower arm for each of the U-phase, V-phase, and W-phase. The semiconductor elements 100a, 100b include an IGBT (Insulated Gate Bipolar Transistor) and a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The semiconductor elements 100a, 100b include three terminals: a high-voltage side terminal for the main circuit (a collector terminal for an IGBT, a drain terminal for a MOSFET), a low-voltage side terminal for the main circuit (an emitter terminal for an IGBT, a source terminal for a MOSFET), and a signal terminal (such as a gate terminal).

[0012] The semiconductor elements 100a, 100b of the upper and lower arms of the U-phase, V-phase, and W-phase are connected in parallel between a positive electrode wiring 103p and a negative electrode wiring 103n that are connected to a DC voltage source 2. A capacitor 102 provided between the positive electrode wiring 103p and the negative electrode wiring 103n is a smoothing capacitor for smoothing a current generated by turning on and off the semiconductor elements 100a, 100b.

[0013] The main circuit low-voltage side terminal of the semiconductor element 100a of the upper arm of the U-phase and the main circuit high-voltage side terminal of the semiconductor element 100b of the lower arm are connected to a U-phase output wiring 104U. The main circuit low-voltage side terminal of the semiconductor element 100a of the upper arm of the V-phase and the main circuit high-voltage side terminal of the semiconductor element 100b of the lower arm are connected to a V-phase output wiring 104V. The main circuit low-voltage side terminal of the semiconductor element 100a of the upper arm of the W-phase and the main circuit high-voltage side terminal of the semiconductor element 100b of the lower arm are connected to a W-phase output wiring 104W. The output wirings 104U, 104V, 104W of each phase are connected to a motor 3. The signal terminals of the semiconductor elements 100a, 100b are connected to the gate drive circuit 11 of FIG. 1, and the semiconductor elements 100a, 100b are turned on or off based on a signal input from a control circuit 12.

[0014] Fig. 3 is a diagram showing a semiconductor package 30 mounted on a wiring board 20. Fig. 4 is a diagram showing a schematic cross section taken along line AA in Fig. 3. The semiconductor elements 100a and 100b are each built into a semiconductor package 30 made of an insulating material. The semiconductor package 30 shown in Fig. 3 has the above-mentioned semiconductor element 100a or semiconductor element 100b built into it. A plurality of terminals 301, 302, and 303 protrude from the semiconductor package 30 in parallel with the board surface of the wiring board 20.

[0015] Terminal 301 is the main circuit high voltage side terminal described above. Terminal 302 is the main circuit low voltage side terminal described above. Terminal 303 is the signal terminal described above. Each of terminals 301, 302, and 303 is formed with a bent portion 310. Also, as shown in FIG. 4, terminals 301 to 303 are provided at their tips with terminal connection portions 311. Terminal connection portions 311 are joined to wiring portions 201 to 203 of wiring board 20 with joining material 50 such as solder.

[0016] The wiring portion 201 provided on the substrate surface of the wiring substrate 20 extends along the protruding direction of the terminal 301 and is disposed so as to face the terminal 301. A terminal connection portion 311 of the terminal 301 is soldered to one end of the wiring portion 201 on the right side in the figure. The other end 201b of the wiring portion 201 is connected to another wiring portion not shown. For example, when the semiconductor element 100a shown in FIG. 2 is built in the semiconductor package 30, the wiring portion 201 is connected to the positive electrode wiring 103p. Also, when the semiconductor element 100a of the lower arm of the U-phase is built in the semiconductor package 30, the wiring portion 201 is connected to the U-phase output wiring 104U. Similarly, the wiring portions 202 and 203 extend along the protruding direction of the terminals 302 and 303, respectively, and are disposed so as to face the terminals 302 and 303. Terminal connection parts 311 of terminals 302 and 303 are soldered to one ends of the wiring parts 202 and 203.

[0017] 3 and 4, in this embodiment, bent portions 310 are provided in terminals 301 to 303. Therefore, slight deformation of bent portions 310 relieves stress applied to terminal connection portions 311, thereby enabling stress relief in solder joints.

[0018] The dashed arrow L1 shown in FIGS. 3 and 4 is a schematic representation of the flow of current flowing from the wiring portion 201 through the terminal 302 to the semiconductor package 30. Similarly, the dashed arrow L2 is a schematic representation of the flow of current flowing from the semiconductor package 30 to the wiring portion 202 through the terminal 302. As shown by the dashed arrows L1 and L2, the direction of the current flowing through the terminals 301 and 302 is opposite to the direction of the current flowing through the opposing wiring portions 201 and 202. Therefore, the magnetic fluxes generated by the currents are cancelled out by each other, thereby reducing the inductance of the terminal portion. That is, in this embodiment, it is possible to achieve both stress relaxation and inductance reduction of the terminal connection portion 311. It is preferable that the relationship between the terminal 303, which is a signal terminal, and the wiring portion 203 is configured in the same manner as in the case of the terminals 301 and 302.

[0019] FIG. 10 is a diagram showing a comparative example. In the wiring parts 221 to 223 shown in FIG. 10, the ends 201a, 202a, and 203a of the terminals 301 to 303, to which the terminal connection parts 311 are soldered, are connected to other wiring parts. Therefore, the current flowing into the semiconductor package 30 through the terminal 301 flows as shown by the dashed line L11. On the other hand, the current flowing out of the semiconductor package 30 through the terminal 302 flows as shown by the dashed line L12. Therefore, unlike the cases of FIGS. 3 and 4, the current flowing through the wiring parts 221 and 222 is not reverse to the current flowing through the terminals 301 and 302, and is not opposed to them. As a result, in the comparative example, the inductance reduction effect due to the current flowing through the wiring parts cannot be expected. Therefore, when the bent parts 310 shown in FIGS. 3 and 4 are formed on the terminals 301 to 303, the stress of the solder joints can be relaxed, but the inductance is disadvantageously increased.

[0020] Incidentally, as shown in FIG. 3, the bent portions 310 of the terminals 301 and 302 protruding from the same side surface of the semiconductor package 30 are bent in a direction approaching each other. That is, the bent portion 310 of the terminal 301 is bent toward the terminal 302 (downward in the figure), and the bent portion 310 of the terminal 302 is bent toward the terminal 301 (upward in the figure). In this way, by bending the adjacent bent portions 310 in a direction approaching each other, the inductance can be further reduced. Furthermore, by aligning the positions of the opposing bent portions 310 in the left-right direction in the figure, the inductance reduction effect can be further enhanced. Note that, as shown in FIG. 3, it is preferable that the configuration of the bent portions 310 of the pair of terminals 303 protruding to the left side of the semiconductor package 30 in the figure is configured in the same manner as that of the terminals 301 and 302.

[0021] Furthermore, when comparing the terminals 301, 303 on the upper side of the figure with the terminals 302, 303 on the lower side of the figure, the shape and arrangement of the terminals are linearly symmetrical with respect to a line L10 passing through the center from top to bottom of the semiconductor package 30. By making the shape and arrangement of the terminals linearly symmetrical in this way, it is possible to prevent the semiconductor package 30 from being displaced in the planar direction when the terminals 301 to 303 expand or contract due to a temperature change. For example, when a cooler is provided on the upper surface of the semiconductor package 30 via an insulating member, the stress applied to the insulating member is alleviated, and the reliability of cooling can be improved.

[0022] Fig. 5 is a diagram showing an example of an arrangement of upper and lower arm semiconductor packages 30a, 30b on wiring board 20. In the example shown in Fig. 5, semiconductor package 30a incorporates semiconductor element 100a of the upper arm of the U phase shown in Fig. 2, and semiconductor package 30b incorporates semiconductor element 100b of the lower arm of the U phase. Terminals 301-303 of semiconductor package 30a and wiring portions 201-203 connected to terminals 301-303 have the same configuration as those shown in Figs. 3 and 4.

[0023] In the semiconductor package 30b in which the lower arm semiconductor element 100b is built in, terminals 301 and 302 which are main circuit terminals are provided on the left side of the package in the figure, and terminal 303 which is a signal terminal is provided on the right side of the package in the figure. Furthermore, terminal 301 which is a main circuit high voltage side terminal is provided on the lower side in the figure, and terminal 302 which is a main circuit low voltage side terminal is provided on the upper side in the figure. Terminal 301 of the semiconductor package 30b is joined to wiring portion 202, and terminal 302 is joined to wiring portion 204. Wiring portion 202 is connected to U-phase output wiring 104U shown in FIG. 2. On the other hand, wiring portion 204 is connected to negative wiring 103n.

[0024] In the case shown in Fig. 5 as well, bending portions 310 are provided in terminals 301-302, thereby enabling stress relaxation in terminal connection portion 311. Moreover, since bending portions 310 of terminals adjacent to each other vertically in the figure are bent in directions approaching each other, the inductance reduction effect can be improved as in the case of Figs. 3 and 4. Note that, in the case shown in Fig. 5 as well, the shapes and arrangement of the terminals of juxtaposed semiconductor packages 30a, 30b are line-symmetrical with respect to line L10a, and therefore it is possible to suppress displacement of semiconductor packages 30a, 30b in the planar direction when the terminals expand or contract due to temperature changes.

[0025] (Modification) Fig. 6 is a diagram showing a modified example of the configuration shown in Fig. 4. In the configuration shown in Fig. 4, the semiconductor package 30 is provided on the front surface side of the wiring board 20. On the other hand, in the modified example shown in Fig. 6, a through hole 210 is formed in the wiring board 20, and the semiconductor package 30 is inserted into the through hole 210 and disposed so that its back surface protrudes toward the back surface side of the wiring board 20. Therefore, the gap dimension G between the terminals 301-303 and the wiring portions 201-203 can be made smaller than that in the structure shown in Fig. 4, and the inductance reduction effect can be further improved.

[0026] In this way, in the structure in which the semiconductor package 30 is inserted into the through hole 210, the gap dimension G can be made small regardless of the thickness of the semiconductor package 30. In addition, when the semiconductor package 30 has heat dissipation surfaces 320, 321 on both the front and back sides, the semiconductor package 30 is inserted into the through hole 210, so that the cooler 40 can be disposed on each of the heat dissipation surfaces 320, 321. That is, the semiconductor package 30 can be cooled from both the top and bottom sides, and the cooling performance can be improved. Although a heat sink having a large number of pin fins 400 is used as the cooler 40 shown in FIG. 6, a cooler using a refrigerant may also be used. An electrically insulating heat conductive member 60 is provided between the cooler 40 and the semiconductor package 30.

[0027] Second embodiment In the above-described first embodiment, the upper and lower arms of each phase are configured with a pair of semiconductor elements 100a, 100b as shown in Fig. 2. On the other hand, in the second embodiment, a case will be described in which the upper and lower arms of each phase are configured with a plurality of pairs of semiconductor elements 100a, 100b as shown in Fig. 7. Fig. 7 is a diagram showing the configuration of the inverter circuit 10 shown in Fig. 1. The inverter circuit 10 is configured with a U-phase inverter circuit 10U, a V-phase inverter circuit 10V, and a W-phase inverter circuit 10W.

[0028] Each of the U-phase inverter circuit 10U, the V-phase inverter circuit 10V, and the W-phase inverter circuit 10W is composed of a plurality of pairs of upper and lower arm semiconductor elements. In the example shown in FIG. 7, four upper and lower arm semiconductor elements 100a, 100b connected in series are connected in parallel, thereby increasing the output current of the power conversion device 1. Each of the U-phase, V-phase, and W-phase inverter circuits 10U, 10V, and 10W is composed of a pair of upper arm and lower arm semiconductor elements 100a, 100b connected in series, and a capacitor 101. The positive terminal of the capacitor 101 is connected to the high voltage side terminal for the main circuit of the upper arm semiconductor element 100a by a positive wiring 103p. The negative terminal of the capacitor 101 is connected to the low voltage side terminal for the main circuit of the lower arm semiconductor element 100b by a negative wiring 103n.

[0029] The main circuit low-voltage side terminal of the upper arm semiconductor element 100a of the U-phase inverter circuit 10U is connected to the main circuit high-voltage side terminal of the lower arm semiconductor element 100b by a U-phase output wiring 104U. The main circuit low-voltage side terminal of the upper arm semiconductor element 100a of the V-phase inverter circuit 10V is connected to the main circuit high-voltage side terminal of the lower arm semiconductor element 100b by a V-phase output wiring 104V. The main circuit low-voltage side terminal of the upper arm semiconductor element 100a of the W-phase inverter circuit 10W is connected to the main circuit high-voltage side terminal of the lower arm semiconductor element 100b by a W-phase output wiring 104W. The phase output wirings 104U, 104V, 104W are connected to the motor 3 (see FIG. 1).

[0030] The U-phase, V-phase, and W-phase inverter circuits 10U, 10V, and 10W are connected in parallel to a capacitor 102. A small ceramic capacitor is used for the capacitor 101, and a film capacitor with a large capacitance is used for the capacitor 102. By arranging the capacitors 101 and 102 in the vicinity of the semiconductor elements 100a and 100b, the wiring inductance of the positive wiring 103p and the negative wiring 103n can be reduced.

[0031] Fig. 8 is a diagram showing a part of the inverter circuit 10, and is a diagram showing a schematic arrangement of components of the U-phase inverter circuit 10U on the wiring board 20. Fig. 9 is a diagram showing a schematic BB cross section of Fig. 8. The arrangement of the semiconductor packages 30a, 30b in Fig. 8 corresponds to four sets of the pair of semiconductor packages 30a, 30b shown in Fig. 5 arranged in the vertical direction in the figure. However, while the wiring portion 202 to which the terminal 302 of the semiconductor package 30a is connected and the wiring portion 202 to which the terminal 301 of the semiconductor package 30b is connected are separated in Fig. 5, they are shared as wiring portions 202A, 202B in Fig. 8.

[0032] 8 shows only the region where the components related to the U phase are arranged, and does not show the region where the V phase components and the W phase components are arranged. The V phase components and the W phase components are arranged in a region on the right side (not shown) of wiring board 20 in FIG.

[0033] A multilayer substrate is used for the wiring substrate 20, and wiring layers (conductor layers) 20a1 to 20a4 and insulating layers 20b are alternately laminated as shown in Fig. 9. The wiring portions 200p, 200n, 201, 201A, 202A, 202B, 203A, and 204A shown in Fig. 8 are formed in the wiring layer 20a1 on the front surface side of the wiring substrate 20.

[0034] The wiring portion 200p corresponds to the positive electrode wiring 103p in FIG. 7. The wiring portion 200p and the wiring portions 201 and 201A are connected to each other via the interlayer connection portion 20c formed in the thickness direction of the substrate and at least one of the other wiring layers 20a2 to 20a4. The wiring portion 200n corresponds to the negative electrode wiring 103n in FIG. 7. The wiring portion 200n and the wiring portion 204A are connected to each other via the interlayer connection portion 20c and at least one of the other wiring layers 20a2 to 20a4.

[0035] The wiring portions 202A and 202B correspond to the wiring portion 202 in Fig. 5. The wiring portions 202A and 202B are connected to each other via the interlayer connection portion 20c and at least one of the other wiring layers 20a2 to 20a4. The wiring portion 202B is connected to a U-phase output wiring 104U (see Fig. 7), which is another wiring portion.

[0036] 6, through holes 210 are formed in the wiring board 20, and the semiconductor packages 30a, 30b are mounted on the wiring board 20 so as to be inserted into the through holes 210. As shown in FIG. 9, a heat sink having a large number of pin fins 400 is arranged as a cooler 40 on the rear surface side (lower side in the figure) of the wiring board 20. The cooler 40 is thermally connected to the semiconductor packages 30a, 30b and the rear surface of the wiring board 20 via an electrically insulating heat conductive member 60. As the cooler 40, a cooler using a refrigerant may be used instead of the above-mentioned heat sink.

[0037] When the semiconductor elements 100a, 100b in the semiconductor packages 30a, 30b are turned on and off, the temperatures of the semiconductor packages 30a, 30b and the terminals 301, 302 rise. By providing a cooler 40 as shown in Fig. 9, the heat of the semiconductor packages 30a, 30b and the terminals 301, 302 can be effectively dissipated, and the temperature rise of the semiconductor packages 30a, 30b, the terminals 301, 302, and the wiring board 20 can be reduced. This suppresses deformation of the members due to the temperature rise, and relieves stress in the solder joints.

[0038] Although not shown, the cooler 40 may be disposed on the front surface side of the semiconductor packages 30a and 30b to cool the semiconductor packages 30a and 30b from both the top and bottom. This can further improve the cooling performance.

[0039] As described above, in the second embodiment, the terminals 301 to 303 are provided with the bent portion 310, and each wiring portion arranged to face the terminals 301 to 303 extends along the terminal protruding direction. One end of each wiring portion is soldered to the terminal connection portion 311 of the terminals 301 to 303, and the other end is connected to the interlayer connection portion 20c. For example, when a current flows from the terminal 301 to the semiconductor package 30a as shown by the dashed line L3 in FIG. 9, in the wiring portion 201A, the current flows in the opposite direction to the current of the terminal 301 from the interlayer connection portion 20c provided at the other end 202b of the wiring portion 201A to the terminal connection portion 311. Therefore, similar to the first embodiment, it is possible to achieve both stress relaxation and inductance reduction of the terminal connection portion 311.

[0040] Furthermore, since the semiconductor packages 30a and 30b are mounted on the wiring board 20 so as to be inserted into the through holes 210, the gap dimensions between the opposing terminals 301 to 303 and the wiring parts can be made smaller, which can further improve the reduction in inductance.

[0041] 8, the semiconductor packages 30a and 30b are arranged so that the package positions are aligned in the arrangement direction in a direction perpendicular to the terminal protruding direction (vertical direction in the figure). Therefore, for the semiconductor packages 30a, the terminals 301 and 302 are aligned vertically in a straight line on the right side of the package, and the terminals 303 are aligned vertically in a straight line on the left side of the package. The same is true for the semiconductor packages 30b. In this way, the terminals are aligned vertically in the figure (direction perpendicular to the terminal protruding direction), which can further improve the reduction in inductance. In addition, the structure (cooling surface structure) of the cooler 40 that cools the semiconductor packages 30a and 30b and the wiring board 20 is simplified.

[0042] According to the embodiment and modified examples of the present invention described above, the following advantageous effects are achieved.

[0043] (1) As shown in Figs. 3, 4, etc., the power conversion device includes a semiconductor package 30 incorporating a semiconductor element and having connection terminals 301-303 protruding to the outside, and a wiring board 20 on which the semiconductor package 30 is mounted. The terminals 301-303 have a bent portion 310 bent in a plane parallel to the wiring board 20, and a terminal connection portion 311 provided on the tip side of the bent portion 310. The wiring board 20 has first wiring portions 201-203 provided on the board surface and to which the terminals 301-303 are joined, and other second wiring portions (positive wiring 103p, negative wiring 103n, U-phase output wiring 104U, V-phase output wiring 104V, and W-phase output wiring 104W). The first wiring portions 201-203 extend from one end 201a, 202a, 203a, which is the connection area to which the terminals 301-303 are connected, toward the semiconductor package 30 so as to face each other along the terminals 301-303, and a second wiring portion is connected to the other end 201b, 202b, 203b, which is the end of the extending side.

[0044] In other words, the first wiring parts 201-203 have one ends 201a, 202a, 203a connected to the terminal connection part 311 and the other ends 201b, 202b, 203b connected to the second wiring part, and face the terminals 301-303 so that the direction from the other ends 201b, 202b, 203b to the one ends 201a, 202a, 203a is along the terminal protruding direction. Therefore, the direction of the current in the wiring parts 201-203 and the direction of the current in the terminals 301-303 are opposite to each other, and it is possible to achieve both stress relaxation of the terminal connection part 311 and inductance reduction.

[0045] 8 and 9, the first wiring parts 201, 202A, 202B, 204A extend from the connection region connected to the terminal connection part 311 toward the semiconductor packages 30a, 30b so as to face each other along the terminals 301-303, and the interlayer connection part 20c, which is the second wiring part, is connected to the end part on the extension side (corresponding to the other end 201b, 202b, 203b in the case of FIGS. 3 and 4). In this case, too, the direction of the current in the terminals 301-303 is opposite to the direction of the current in the facing wiring part, making it possible to achieve both stress relaxation in the terminal connection part 311 and inductance reduction.

[0046] (2) In the above (1), as shown in Fig. 6 etc., wiring board 20 has through hole 210, and semiconductor package 30 is mounted on wiring board 20 so as to be inserted into through hole 210. Therefore, gap dimension G between terminals 301-303 and wiring portions 201-203 can be made smaller, and the inductance reduction effect can be further improved.

[0047] (3) Furthermore, in the case where the semiconductor package 30 has heat dissipation surfaces 320, 321 on both the front and back sides, the cooling performance of the semiconductor package 30 can be improved by providing a cooler 40 on the heat dissipation surfaces 320, 321 exposed on the front and back sides of the substrate of the through hole 210.

[0048] (4) In the above (2), as shown in Fig. 3 etc., the semiconductor package 30 has a plurality of terminals 301, 302 protruding from the same side surface, and the bent portions 310 provided on a pair of adjacent terminals 301, 302 are bent in a direction in which they approach each other. In this way, by bending the bent portions 310 in a direction in which they approach each other, the inductance can be further reduced.

[0049] (5) In the above (1), as shown in FIG. 8 and other figures, a plurality of semiconductor packages 30a, 30b are arranged on the wiring board 20 in a direction perpendicular to the protruding direction of the terminals 301 to 303, and the plurality of semiconductor packages 30a, 30b are arranged to line up in the arrangement direction. Therefore, by aligning the terminals in a direction perpendicular to the terminal protruding direction, it is possible to further reduce inductance. In addition, the cooling surface structure of the cooler 40 that cools the semiconductor packages 30a, 30b and the wiring board 20 is simplified.

[0050] (6) In the above (1), as shown in Figs. 8 and 9, the wiring board 20 is a multilayer board in which a plurality of wiring layers 20a1 to 20a4 are laminated in the substrate thickness direction with an insulating layer 20b sandwiched therebetween, and the first wiring parts 201, 201A, 202A, 202B, 203A, and 204A are formed in the wiring layer 20a1 provided on the surface side of the wiring board 20, and are connected to at least one of the other wiring layers provided in the substrate thickness direction at the end of the extension side (e.g., the other end 202b) by the interlayer connection part 20c. With this configuration, the current of the terminal and the current of the first wiring part are in the opposite directions, and it is possible to achieve both stress relaxation of the terminal connection part 311 and inductance reduction.

[0051] (7) In the above (6), as shown in Fig. 9 and other figures, wiring board 20 has wiring layer 20a4 on the back side of the board, and other wiring layers connected by interlayer connection portion 20c include wiring layer 20a4 on the back side of the board, and further includes cooler 40 for cooling wiring layer 20a4 on the back side of the board. With such a configuration, it is possible to reduce the temperature rise of wiring board 20, suppress deformation of members due to the temperature rise, and relieve stress in solder joints.

[0052] The above-described embodiments and modifications are merely examples, and the present invention is not limited to these contents as long as the characteristics of the invention are not impaired. In addition, although various embodiments and modifications have been described above, the present invention is not limited to these contents. Other aspects that are conceivable within the scope of the technical idea of ​​the present invention are also included in the scope of the present invention. [Explanation of symbols]

[0053] 1...power conversion device, 2...DC voltage source, 3...motor, 10...inverter circuit, 11...gate drive circuit, 12...control circuit, 20...wiring board, 20a1 to 20a4...conductor layer (wiring layer), 20b...insulating layer, 20c...interlayer connection portion, 30, 30a, 30b...semiconductor package, 40...cooler, 100a, 100b...semiconductor element, 101, 102...capacitor, 103p...positive wiring, 103 n...negative wiring, 104U...U-phase output wiring, 104V...V-phase output wiring, 104W...W-phase output wiring, 201 to 204, 201A to 204A, 202B, 200p, 200n...wiring portion, 201a, 202a, 203a...one end, 201b, 202b, 203b...other end, 210...through hole, 301, 302, 303...terminal, 310...bent portion, 311...terminal connection portion, 320, 321...heat dissipation surface

Claims

1. a semiconductor package having a semiconductor element built therein and a connection terminal protruding to the outside; a wiring board on which the semiconductor package is mounted, the terminal has a bent portion that is bent in a plane parallel to the wiring board, and a terminal connection portion that is provided on a tip side of the bent portion, the wiring board has a first wiring portion provided on a surface of the board to which the terminal is joined, and a second wiring portion other than the first wiring portion; The first wiring portion extends from a connection region to which the terminal is connected toward the semiconductor package so as to face the terminal along the terminal, and the second wiring portion is connected to an end of the extending side.

2. 2. The power conversion device according to claim 1, The wiring board has a through hole, The semiconductor package is mounted on a wiring board so as to be inserted into the through hole.

3. 3. The power conversion device according to claim 2, the semiconductor package has a first heat dissipation surface exposed on a front surface side of the substrate through the through hole and a second heat dissipation surface exposed on a rear surface side of the substrate through the through hole, The power conversion device further includes a first cooler that cools the first heat dissipation surface and a second cooler that cools the second heat dissipation surface.

4. 2. The power conversion device according to claim 1, the semiconductor package has a plurality of the terminals protruding from the same side surface, A power conversion device, wherein the bent portions provided on a pair of adjacent terminals are bent in directions approaching each other.

5. 2. The power conversion device according to claim 1, a plurality of the semiconductor packages are arranged on the wiring board in a direction perpendicular to a protruding direction of the terminals; A power conversion device in which a plurality of the semiconductor packages are arranged side by side in an arrangement direction.

6. 2. The power conversion device according to claim 1, The wiring board is a multilayer board in which a plurality of wiring layers are laminated in a thickness direction of the board with insulating layers interposed therebetween, A power conversion device, wherein the first wiring portion is formed in the wiring layer provided on the surface side of the wiring board, and at the end portion of the extension side, is connected to at least one of the other wiring layers provided in the thickness direction of the board by an interlayer connection portion.

7. 7. The power conversion device according to claim 6, the wiring board has the wiring layer on a rear surface side of the board, the other wiring layer connected by the interlayer connection portion includes the wiring layer on the back surface side of the substrate, The power conversion device further includes a third cooler that cools the wiring layer on the back surface side of the substrate.

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