Circuit device

The circuit device addresses the issue of potential changes affecting the control of drive circuits by incorporating a bidirectional thyristor for static protection, effectively separating the switching control circuit from voltage fluctuations and ensuring reliable operation.

JP2025071938APending Publication Date: 2025-05-09SEIKO EPSON CORP
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Patent Information

Application Number
JP2023182374
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-10-24
Publication Date
2025-05-09

AI Technical Summary

Technical Problem

Existing circuit devices, such as those using bridge circuits, face issues with potential changes caused by large currents affecting the control of the drive circuit, leading to malfunctions in the detection and control of the driving circuit.

Method used

A circuit device is designed with a first and second low potential side power supply terminals, a driving circuit for driving a target by switching operation, a switching control circuit connected to a second low potential side power supply terminal, and a bidirectional thyristor for static protection, one end connected to the first low potential side power supply terminal and the other end connected to the second low potential side power supply terminal.

Benefits of technology

The proposed solution effectively separates the switching control circuit from voltage fluctuations, preventing noise propagation and ensuring reliable operation of the drive circuit by using a bidirectional thyristor for static protection.

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Abstract

To provide a circuit device, etc., capable of reducing influences exerted upon the control of a drive circuit, which drives a drive target, by a potential change generated by the drive circuit.SOLUTION: A circuit device 100 includes a first low potential side power supply terminal TMC, a second low potential side power supply terminal TMD, a drive circuit 10, a switching control circuit 40, and a bidirectional thyristor 61 for electrostatic protection. The drive circuit 10 is connected to the first low potential side power supply terminal TMC and drives a drive target through a switching operation. The switching control circuit 40 is connected to the second low potential side power supply terminal TMD and controls the switching operation of the drive circuit 10. One end of the bidirectional thyristor 61 is connected to the first low potential side power supply terminal TMC, and the other end is connected to the second low potential side power supply terminal TMD.SELECTED DRAWING: Figure 4
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Description

[Technical field]

[0001] The present invention relates to a circuit device and the like. [Background technology]

[0002] There is known a circuit device that drives a drive target such as a DC motor or a linear solenoid. Patent Document 1 discloses a circuit device including a bridge circuit that drives a motor, a detection circuit that detects a current flowing through the bridge circuit based on a voltage at one end of a sense resistor, and a control circuit that controls the bridge circuit based on a detection result of the detection circuit. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2015-153937 A Summary of the Invention [Problem to be solved by the invention]

[0004] A large current flows through the drive circuit that drives the driven object, and potential changes caused by this current may affect the control of the drive circuit. In the above-mentioned Patent Document 1, the drive circuit is a bridge circuit, and potential changes caused by the current flowing through the bridge circuit may affect the operation of the detection circuit, which may cause the control of the bridge circuit to malfunction. [Means for solving the problem]

[0005] One aspect of the present disclosure relates to a circuit device including a first low potential side power supply terminal, a second low potential side power supply terminal, a drive circuit connected to the first low potential side power supply terminal and configured to drive a drive target through a switching operation, a switching control circuit connected to the second low potential side power supply terminal and configured to control the switching operation of the drive circuit, and a bidirectional thyristor for electrostatic protection having one end connected to the first low potential side power supply terminal and the other end connected to the second low potential side power supply terminal.

[0006] Another aspect of the present disclosure relates to a circuit device including a first high potential side power supply terminal, a second high potential side power supply terminal, a drive circuit connected to the first high potential side power supply terminal and configured to drive a drive target by a switching operation, a switching control circuit connected to the second high potential side power supply terminal and configured to control the switching operation of the drive circuit, and a bidirectional thyristor having one end connected to the first high potential side power supply terminal and the other end connected to the second high potential side power supply terminal. [Brief description of the drawings]

[0007] [Figure 1] 1 shows an example of a motor driver configuration and an example of a circuit device configuration when a bidirectional diode is used as an electrostatic protection circuit. [Diagram 2] 3 shows a detailed configuration example of a drive circuit. [Diagram 3] An example of the voltage-current characteristics of a bidirectional diode. [Figure 4] 1 shows a first configuration example of a circuit device. [Diagram 5] 4 shows a discharge path when static electricity is applied in the first configuration example. [Figure 6] Example of voltage-current characteristics of a bidirectional thyristor. [Figure 7] Detailed configuration example of a bidirectional thyristor. [Figure 8] Detailed configuration example of a bidirectional thyristor. [Figure 9] Equivalent circuit diagram of a bidirectional thyristor. [Figure 10] 2 shows a second configuration example of a circuit device. [Figure 11] 13 shows a discharge path when static electricity is applied in the second configuration example. [Figure 12] 3 shows a detailed configuration example of a control circuit and a pre-driver. [Figure 13] 3 shows a detailed configuration example of a control circuit and a pre-driver. [Figure 14] 3 shows a third configuration example of a circuit device. [Figure 15] 13 shows a discharge path when static electricity is applied in the third configuration example. [Figure 16] 13 shows a current path during a charging period in the third example configuration. [Figure 17] The current path during the decay period of the third configuration example. [Figure 18] 13A shows a configuration example of a synchronous rectification step-down switching regulator and a fourth configuration example of a circuit device. [Figure 19] 5 shows a fifth example configuration of a circuit device. [Figure 20] 13 shows a current path in the first and second periods of the fifth configuration example. [Figure 21] 13 shows a configuration example of an asynchronous rectification step-down switching regulator and a sixth configuration example of a circuit device. [Figure 22] 7 shows an example of a configuration of a synchronous rectification boost type switching regulator and a seventh example of a circuit device. [Figure 23] 8. An eighth example configuration of a circuit device. [Figure 24] 23 shows a current path in the first and second periods of the eighth configuration example. [Diagram 25] A configuration example of an asynchronous rectification boost type switching regulator and a ninth configuration example of a circuit device. [Figure 26] A configuration example of a solenoid driver and a tenth configuration example of a circuit device. [Figure 27] 13 shows a current path in the first and second periods of the tenth configuration example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] A preferred embodiment of the present disclosure will be described in detail below. Note that the embodiment described below does not unduly limit the contents described in the claims, and all of the configurations described in the embodiment are not necessarily essential configurations.

[0009] 1. Motor driver The circuit device of the present embodiment can be applied to, for example, a motor driver, a switching regulator, or a solenoid driver. That is, the circuit device can drive, for example, a motor, a coil, or a solenoid. An example in which the circuit device of the present embodiment is applied to a motor driver will be described below.

[0010] 1 shows an example of the configuration of a motor driver and an example of the configuration of a circuit device when a bidirectional diode is used as an electrostatic protection circuit. The motor driver 210 includes a circuit device 100 and a sense resistor RS. The circuit device 100 includes a drive circuit 10, a switching control circuit 40, a bidirectional diode 50, a first low potential side power supply terminal TMC, a second low potential side power supply terminal TMD, a first high potential side power supply terminal TVBB, a first drive terminal TMA, and a second drive terminal TMB.

[0011] The first high potential side power supply terminal TVBB is supplied with a power supply voltage VBB from a power supply. The second low potential side power supply terminal TMD is connected to a ground node NVS. The ground node NVS is supplied with a ground voltage VSS from a power supply. The first low potential side power supply terminal TMC is connected to one end of a sense resistor RS. The other end of the sense resistor RS is connected to the ground node NVS. Note that VBB is also called a high potential side power supply voltage, and VSS is also called a low potential side power supply voltage. VSS is not limited to the ground voltage, and may be any constant voltage lower than VBB. The first drive terminal TMA is connected to one end of the motor. The second drive terminal TMB is connected to the other end of the motor.

[0012] The circuit device 100 is, for example, an integrated circuit device in which a plurality of circuit elements are integrated on a semiconductor substrate. Each of the above terminals is, for example, a pad provided on the semiconductor substrate, or a terminal of a package that accommodates the semiconductor substrate.

[0013] The switching control circuit 40 controls the switching operation of the drive circuit 10 based on the voltage VS at one end of the sense resistor RS. The switching control circuit 40 includes a detection circuit 30, a control circuit 20, and a pre-driver 18.

[0014] The detection circuit 30 detects the current flowing through the motor driven by the drive circuit 10, based on the voltage VS at one end of the sense resistor RS. Specifically, the detection circuit 30 includes a reference voltage generation circuit 32, a D / A conversion circuit 34, and a comparison circuit 36.

[0015] The reference voltage generating circuit 32 generates a plurality of voltages VRF. The reference voltage generating circuit 32 includes, for example, a bandgap reference circuit and a voltage dividing circuit that generates a plurality of voltages VRF based on the output voltage of the bandgap reference circuit. The D / A conversion circuit 34 selects one voltage from the plurality of voltages VRF and outputs the selected voltage as a reference voltage VR. The D / A conversion circuit 34 is, for example, a switch circuit configured with transistors. The comparison circuit 36 ​​compares the reference voltage VR with the voltage VS and outputs the result as a detection result signal RQ. In the example of FIG. 1, the reference voltage VR is a voltage VSS.<VRのときRQはハイレベルであり、VS> When VR, RQ is at a low level.

[0016] The control circuit 20 outputs a control signal for controlling each transistor of the drive circuit 10 to be on or off based on the detection result signal RQ. The pre-driver 18 outputs a pre-drive signal for driving the gate of each transistor of the drive circuit 10 by buffering the control signal from the control circuit 20. The high potential side power supply voltage of the control circuit 20 and the pre-driver 18 is VBB.

[0017] The driving circuit 10 drives the motor based on the pre-driving signal. Fig. 2 shows a detailed configuration example of the driving circuit. The driving circuit 10 is a bridge circuit and includes transistors Q1 to Q4.

[0018] The transistors Q1 and Q3 are P-type MOS transistors. The source of the transistor Q1 is connected to the first high potential side power supply terminal TVBB, and the drain is connected to the first drive terminal TMA. The source of the transistor Q3 is connected to the first high potential side power supply terminal TVBB, and the drain is connected to the second drive terminal TMB.

[0019] The transistors Q2 and Q4 are N-type MOS transistors. The source of the transistor Q2 is connected to the first low potential side power supply terminal TMC, and the drain is connected to the first drive terminal TMA. The source of the transistor Q4 is connected to the first low potential side power supply terminal TMC, and the drain is connected to the second drive terminal TMB.

[0020] During the charge period, the control circuit 20 turns on the transistors Q1 and Q4 and turns off the transistors Q2 and Q3. The charge period is also called the first period. At this time, a current flows from the first high potential side power supply terminal TVBB to the transistor Q1, the first driving terminal TMA, the motor, the second driving terminal TMB, the transistor Q4, the first low potential side power supply terminal TMC, the sense resistor RS, and the ground node NVS.

[0021] During the decay period, the control circuit 20 turns on the transistors Q2 and Q3 and turns off the transistors Q1 and Q4. The decay period is also called the second period. At this time, a current flows from the ground node NVS to the sense resistor RS, the first low potential side power supply terminal TMC, the transistor Q2, the first drive terminal TMA, the motor, the second drive terminal TMB, the transistor Q3, and the first high potential side power supply terminal TVBB.

[0022] The voltage VS at one end of the sense resistor RS varies depending on the current flowing through the sense resistor RS. The control circuit 20 repeats a charge period and a decay period based on a detection result signal RQ, which is a result of comparing the voltage VS with a reference voltage VR. This controls the current flowing through the motor to a current corresponding to the reference voltage VR.

[0023] The direction of the current flowing through the sense resistor RS is from the first low potential side power supply terminal TMC to the ground node NVS during the charge period, and from the ground node NVS to the first low potential side power supply terminal TMC during the decay period. Therefore, the voltage VS at one end of the sense resistor RS is positive during the charge period and negative during the decay period. In other words, the bridge circuit generates noise due to positive and negative surge currents during normal operation to drive the motor.

[0024] If the first low potential side power supply terminal TMC is connected to the ground line of the switching control circuit 40, the above-mentioned noise may affect the switching control circuit 40, causing the motor driver 210 to malfunction. For example, during the decay period, the voltage VS at one end of the sense resistor RS becomes lower than the ground voltage VSS. If the first low potential side power supply terminal TMC is connected to the ground line of the switching control circuit 40, the reference voltage VR is generated based on the voltage VS, and therefore loses its role as a reference voltage when the voltage VS becomes negative. This may cause the comparator circuit 36 ​​to be unable to perform an appropriate voltage comparison, and the control circuit 20 to be unable to perform appropriate switching control.

[0025] Therefore, in order to isolate the switching control circuit 40 from the voltage VS, the ground line of the switching control circuit 40 is connected to the second low potential side power supply terminal TMD. Since the second low potential side power supply terminal TMD is connected to the ground node NVS without passing through the sense resistor RS, the ground of the switching control circuit 40 is basically not affected by fluctuations in the voltage VS.

[0026] In the example of Fig. 1, a bidirectional diode 50 is provided as an electrostatic protection circuit to ensure a discharge path when static electricity is applied between the first low potential side power supply terminal TMC and the second low potential side power supply terminal TMD. The electrostatic protection circuit needs to protect the circuit from static electricity and isolate the ground of the switching control circuit 40 from fluctuations in the voltage VS. However, the bidirectional diode 50 may not be able to achieve both of these goals. This point will be explained below.

[0027] The bidirectional diode 50 includes a first diode and a second diode connected in parallel between a first low potential side power supply terminal TMC and a second low potential side power supply terminal TMD. The forward direction of the first diode is from the first low potential side power supply terminal TMC to the second low potential side power supply terminal TMD. The forward direction of the second diode is from the second low potential side power supply terminal TMD to the first low potential side power supply terminal TMC. FIG. 1 shows an example in which the first diode and the second diode each have one stage.

[0028] For example, suppose that static electricity is applied to the first low potential side power supply terminal TMC with the second low potential side power supply terminal TMD as the ground. When positive static electricity is applied, the discharge path is from the first low potential side power supply terminal TMC to the bidirectional diode 50 and the second low potential side power supply terminal TMD, and when negative static electricity is applied, the discharge path is from the second low potential side power supply terminal TMD to the bidirectional diode 50 and the first low potential side power supply terminal TMC.

[0029] 3 is an example of the voltage-current characteristics of a bidirectional diode. The horizontal axis is the voltage applied to both ends of the bidirectional diode 50. The vertical axis is the current flowing through the bidirectional diode 50. Line 3301 shows the characteristics when the first diode and the second diode each have one stage. Line 3302 shows the characteristics when the first diode and the second diode each have two stages. Line 3303 shows the characteristics when the first diode and the second diode each have three stages.

[0030] The forward voltage of one diode stage is 0.6V. As shown by the line 3301, in the case of one diode stage, almost no current flows through the bidirectional diode 50 in the range of -0.6V to +0.6V. Therefore, during normal operation of driving the motor, noise in the range of -0.6V to +0.6V is blocked and is not transmitted to the switching control circuit 40. When static electricity is applied, the bidirectional diode 50 discharges when the static electricity voltage exceeds the range of -0.6V to +0.6V. The clamp voltage is -0.6V or less or +0.6V or more.

[0031] When the amplitude of the noise is large, using two or three diodes makes it possible to set the noise blocking range to the range of -1.2 V to +1.2 V or -1.8 V to +1.8 V. However, because the voltage range of the noise that can be blocked and the clamping voltage are linked, if one tries to further widen the voltage range of the noise that can be blocked, the clamping voltage will increase, raising the issue of the possibility of electrostatic breakdown.

[0032] 4 shows a first configuration example of a circuit device. The circuit device 100 includes a drive circuit 10, a switching control circuit 40, a bidirectional thyristor 61, a first low potential side power supply terminal TMC, a second low potential side power supply terminal TMD, a first high potential side power supply terminal TVBB, a first drive terminal TMA, and a second drive terminal TMB.

[0033] The operation of the motor driver 210 is the same as in Fig. 1. In Fig. 4, a bidirectional thyristor 61 is provided as an electrostatic protection circuit between the first low potential side power supply terminal TMC and the second low potential side power supply terminal TMD. One end of the bidirectional thyristor 61 is connected to the first low potential side power supply terminal TMC, and the other end is connected to the second low potential side power supply terminal TMD.

[0034] 5 is a diagram showing a discharge path when static electricity is applied in the first configuration example. For example, assume that static electricity is applied to the first low potential side power supply terminal TMC with the second low potential side power supply terminal TMD as the ground. Arrow 3601 is the discharge path when positive static electricity is applied. The discharge path is from the first low potential side power supply terminal TMC to the bidirectional thyristor 61 and the second low potential side power supply terminal TMD. Arrow 3602 is the discharge path when negative static electricity is applied. The discharge path is from the second low potential side power supply terminal TMD to the bidirectional thyristor 61 and the first low potential side power supply terminal TMC.

[0035] 6 is an example of the voltage-current characteristics of a bidirectional thyristor. The horizontal axis is the voltage applied to both ends of the bidirectional thyristor 61. The vertical axis is the current flowing through the bidirectional thyristor 61. The voltage indicated by reference numeral 2001 is the trigger voltage of the bidirectional thyristor 61, and the voltage indicated by reference numeral 2002 is the hold voltage of the bidirectional thyristor 61. Here, an example is shown in which the trigger voltage is 6V and the hold voltage is 1.8V.

[0036] No current flows through the bidirectional thyristor 61 until the applied voltage exceeds the range of -6V to +6V. Therefore, during normal operation to drive the motor, noise in the range of -6V to +6V is blocked and not transmitted to the switching control circuit 40. When static electricity is applied, the bidirectional thyristor 61 turns on to discharge when the static electricity voltage exceeds the trigger voltage. The clamp voltage when the bidirectional thyristor 61 is turned on is -1.8V or lower or +1.8V or higher.

[0037] The clamp voltage of the bidirectional thyristor 61 is equivalent to the clamp voltage of the three-stage bidirectional diode. Meanwhile, the three-stage bidirectional diode can block noise in the range of -1.8V to +1.8V, whereas the bidirectional thyristor 61 can block noise in the range of -6V to +6V. That is, the bidirectional thyristor 61 can widen the voltage range in which it can block noise while maintaining the same electrostatic withstand capability as the bidirectional diode 50. Conversely, the bidirectional thyristor 61 can lower the clamp voltage and increase the electrostatic withstand capability while maintaining the same voltage range in which it can block noise as the bidirectional diode. In this way, by using the bidirectional thyristor 61, it is possible to both protect the circuit from static electricity and isolate the ground of the switching control circuit 40 from fluctuations in the voltage VS.

[0038] Known bidirectional thyristors of various configurations may be used as the bidirectional thyristor 61. Alternatively, the bidirectional thyristor 1 described below may be used as the bidirectional thyristor 61.

[0039] 7 and 8 show examples of detailed configurations of a bidirectional thyristor. Fig. 7 shows a substrate configuration of a bidirectional thyristor 1 including a substrate 2 and elements formed on the substrate 2.

[0040] The substrate 2 is, for example, a Si substrate, and may be, for example, a Si substrate doped with a P-type impurity element. The substrate 2 is also called a semiconductor substrate. As shown in FIG. 7, the downward direction with respect to a plane including the substrate 2 is defined as a first direction DR1. The downward direction is a direction from the front surface to the back surface in the thickness direction of the substrate 2. The opposite direction to the first direction DR1, that is, the upward direction with respect to the plane including the substrate 2 is defined as a third direction DR3. That is, the first direction DR1 and the third direction DR3 are perpendicular to the semiconductor substrate. The direction along the plane including the substrate 2 is defined as a second direction DR2. As shown in FIG. 8 described later, the second direction DR2 is oriented along the direction in which, for example, the first impurity region 503, the first anode region 402, the first cathode region 403, and the like are alternately arranged. The direction along the plane including the substrate 2 and perpendicular to the second direction DR2 is defined as a fourth direction DR4. The plan view refers to viewing the bidirectional thyristor 1 and the like from the third direction DR3.

[0041] As shown in FIG. 7, the bidirectional thyristor 1 of this embodiment includes a first anode region 402, a first cathode region 403, a first impurity region 503, a first gate region 404, a second anode region 407, a second cathode region 408, a second impurity region 505, a second gate region 409, and a third gate region 401.

[0042] The first anode region 402 is provided in the region of the N-type first well 601 and is connected to the anode line Lm, which is the intermediate node Nm, via a contact AN1. The first anode region 402 is an impurity region doped with, for example, a P-type impurity element.

[0043] Here, the intermediate node Nm is a node that is connected to the first cathode line L1 through the first diode element DI1 and to the second cathode line L2 through the second diode element DI2. As will be described later with reference to FIG. 9 and the like, for example, when a positive potential is applied to the first cathode terminal T1 and a ground potential is applied to the second cathode terminal T2, the anode line Lm that is the intermediate node Nm becomes the anode side of the second thyristor TY2 described later, and the second cathode terminal T2 becomes the cathode side of the second thyristor TY2. Also, for example, when a ground potential is applied to the first cathode terminal T1 and a positive potential is applied to the second cathode terminal T2, the anode line Lm that is the intermediate node Nm becomes the anode side of the first thyristor TY1 described later, and the first cathode terminal T1 becomes the cathode side of the first thyristor TY1.

[0044] When the bidirectional thyristor 1 in FIG. 7 is applied to the bidirectional thyristor 61 in FIG. 4, one of the first cathode terminal T1 and the second cathode terminal T2 in FIG. 7 corresponds to the first low potential side power supply terminal TMC in FIG. 4, and the other corresponds to the second low potential side power supply terminal TMD in FIG. 4.

[0045] The first cathode region 403 is provided in a P-type second well 602, and is connected to a first cathode line L1 via a contact CS1 and to a first cathode terminal T1. The first cathode region 403 is an impurity region doped with, for example, an N-type impurity element.

[0046] The first impurity region 503 is provided in the P-type second well 602 and is electrically connected to the anode line Lm, which is the intermediate node Nm, via the contact D1 and the second resistor element Rexc. The first impurity region 503 is an impurity region doped with, for example, an N-type impurity element.

[0047] The third gate region 401 is provided in the first well 601 and is electrically connected to the anode line Lm, which is the intermediate node Nm, via a contact GA3 and a second resistor element Rexc. The third gate region 401 is an impurity region doped with, for example, an N-type impurity element.

[0048] Fig. 8 shows a configuration example of the bidirectional thyristor 1 in a plan view relative to the substrate 2. Fig. 8 shows a schematic diagram of the shapes and positional relationships of the components of the bidirectional thyristor 1, such as the diffusion layer, well, gate electrode, and contact, in a plan view. As shown in Fig. 8, in a plan view, the third gate region 401 is provided with contacts GA3 aligned along a fourth direction DR4. The third gate region 401 is connected in a ring shape to the fourth gate region 405 in which the contact GA4 is provided, and the fifth gate region 410 in which the contact GA5 is provided.

[0049] The contacts GA3, GA4, and GA5, as well as the above-mentioned contacts AN1, CS1, D1, etc., are electrode plugs made by filling via holes provided on a diffusion layer with a metal material such as tungsten.

[0050] The first gate region 404 is provided in the second well 602 and is electrically connected to the first cathode line L1 via the contact GA1 and the first resistor element Rexa, and is connected to the first cathode terminal T1. The first gate region 404 is an impurity region doped with, for example, a P-type impurity element.

[0051] The second anode region 407 is provided in the region of the N-type first well 601 and is connected to the anode line Lm, which is the intermediate node Nm, via a contact AN2. The second anode region 407 is an impurity region doped with, for example, a P-type impurity element.

[0052] The second cathode region 408 is provided in the P-type third well 603, and is connected to the second cathode line L2 via a contact CS2 and to the second cathode terminal T2. The second cathode region 408 is an impurity region doped with, for example, an N-type impurity element.

[0053] The second impurity region 505 is provided in the P-type third well 603 and is electrically connected to the anode line Lm, which is the intermediate node Nm, via the contact D2 and the second resistor element Rexc. The second impurity region 505 is an impurity region doped with, for example, an N-type impurity element.

[0054] The second gate region 409 is provided in the second well 602 and is electrically connected to the second cathode line L2 via the contact GA2 and the third resistor element Rexb, and is connected to the second cathode terminal T2. The second gate region 409 is an impurity region doped with, for example, a P-type impurity element.

[0055] The first resistor element Rexa, the third resistor element Rexb, the second resistor element Rexc, etc. can be provided by, for example, polysilicon resistors formed on an insulating film (not shown). As shown in FIG. 7, each resistor element is connected by a metal wiring.

[0056] 7, the first well 601 is an N-type impurity region provided in the first direction DR1 of the first anode region 402, the third gate region 401, and the second anode region 407. The first well 601 is in contact with a deep well 608 on the first direction DR1 side. The first well 601 is, for example, N-type like the third gate region 401, but its impurity concentration is lower than that of the third gate region 401. In this way, the first well 601 is provided in the first direction DR1 of the first anode region 402, the third gate region 401, the second anode region 407, etc., when the direction perpendicular to the semiconductor substrate is defined as the first direction DR1.

[0057] 7, the second well 602 is a P-type region provided in the first direction DR1 of the first cathode region 403, the first impurity region 503, and the first gate region 404. The second well 602 is in contact with a deep well 608 on the first direction DR1 side. The second well 602 is, for example, a P-type like the first gate region 404, but the impurity concentration thereof is lower than that of the first gate region 404.

[0058] The third well 603 is a P-type region provided in the first direction DR1 of the second cathode region 408, the second impurity region 505, and the second gate region 409. The third well 603 is in contact with the deep well 608 on the first direction DR1 side. The third well 603 is, for example, a P-type like the second gate region 409, but the impurity concentration thereof is lower than that of the second gate region 409.

[0059] The fourth well 604 and the fifth well 605 are N-type regions provided in the first direction DR1 of the fourth gate region 405 and the fifth gate region 410, respectively. The fourth well 604 and the fifth well 605 are in contact with a deep well 608 on the first direction DR1 side. The fourth well 604 and the fifth well 605 are, for example, N-type like the fourth gate region 405 and the fifth gate region 410, but their impurity concentrations are lower than those of the fourth gate region 405 and the fifth gate region 410. As shown in FIG. 8, the fourth well 604 and the fifth well 605 are connected to the first well 601 in which the third gate region 401 is provided in a plan view.

[0060] The deep well 608 is an N-type region provided in the first direction DR1 of the first well 601 to the fifth well 605. The deep well 608 contacts the substrate 2 on the side of the first direction DR1.

[0061] The sixth well 606 and the seventh well 607 are regions provided in the first direction DR1 of the diffusion regions 406 and 411, respectively. The sixth well 606, the seventh well 607, and the diffusion regions 406 and 411 are P-type impurity regions, respectively. The sixth well 606 and the seventh well 607 are in contact with the substrate 2 on the first direction DR1 side. The sixth well 606 is in contact with the deep well 608 on the second direction DR2 side, and the seventh well 607 is in contact with the deep well 608 on the side opposite to the second direction DR2. The impurity concentrations of the sixth well 606 and the seventh well 607 are lower than the impurity concentrations of the diffusion regions 406 and 411. As shown in FIG. 8, the diffusion region 406 and the diffusion region 411 are connected in a ring shape. The sixth well 606 and the seventh well 607 provided on the first direction DR1 side of the diffusion regions 406 and 411 are also connected in a ring shape.

[0062] 7, the P-type first anode region 402, the N-type first well 601, the P-type second well 602, and the N-type first cathode region 403 constitute a PNPN thyristor with the first anode region 402 as the anode, the first cathode region 403 as the cathode, and the second well 602 as the gate, as indicated by the dashed line frame. The PNPN thyristor including the first anode region 402, the first well 601, the second well 602, and the first cathode region 403 is referred to as a first thyristor TY1.

[0063] Here, in the first thyristor TY1, the configuration including the N-type first well 601, the P-type second well 602, and the N-type first cathode region 403 can be regarded as an NPN bipolar transistor with the first cathode region 403 as the emitter, the second well 602 as the base, and the first well 601 as the collector. Also, in the first thyristor TY1, the configuration including the P-type first anode region 402, the N-type first well 601, and the P-type second well 602 can be regarded as a PNP bipolar transistor with the first anode region 402 as the emitter, the first well 601 as the base, and the second well 602 as the collector. A transistor including an N-type first well 601, a P-type second well 602, and an N-type first cathode region 403 is referred to as an NPN bipolar transistor NPN1, and a transistor including a P-type first anode region 402, an N-type first well 601, and a P-type second well 602 is referred to as a PNP bipolar transistor PNP1.

[0064] 7, the P-type second anode region 407, the N-type first well 601, the P-type third well 603, and the N-type second cathode region 408 constitute a PNPN thyristor with the second anode region 407 as the anode, the second cathode region 408 as the cathode, and the third well 603 as the gate, as indicated by the dashed line frame. The PNPN thyristor including the second anode region 407, the first well 601, the third well 603, and the second cathode region 408 is referred to as the second thyristor TY2.

[0065] Here, in the second thyristor TY2, the configuration including the N-type first well 601, the P-type third well 603, and the N-type second cathode region 408 can be regarded as an NPN bipolar transistor with the second cathode region 408 as the emitter, the third well 603 as the base, and the first well 601 as the collector. Also, in the second thyristor TY2, the configuration including the second anode region 407, the first well 601, and the third well 603 can be regarded as a PNP bipolar transistor with the third well 603 as the emitter, the first well 601 as the base, and the second anode region 407 as the collector. A transistor including the N-type first well 601, the P-type third well 603, and the N-type second cathode region 408 is referred to as an NPN bipolar transistor NPN2, and a transistor including the P-type second anode region 407, the N-type first well 601, and the P-type third well 603 is referred to as a PNP bipolar transistor PNP2.

[0066] Well resistance Rn1 is the resistance of the first well 601. A voltage between the emitter and base of the PNP bipolar transistor PNP1 is generated based on the voltage drop across the well resistance Rn1 and the voltage drop across the second resistance element Rexc. Also, well resistance Rp1 is the resistance of the second well 602. A voltage between the emitter and base of the NPN bipolar transistor NPN1 is generated based on the voltage drop across the well resistance Rp1 and the voltage drop across the first resistance element Rexa.

[0067] Well resistance Rn2 is the resistance of the first well 601. A voltage between the emitter and base of the PNP bipolar transistor PNP2 is generated based on the voltage drop across the well resistance Rn2 and the voltage drop across the second resistance element Rexc. Also, well resistance Rp2 is the resistance of the third well 603. A voltage between the emitter and base of the NPN bipolar transistor NPN2 is generated based on the voltage drop across the well resistance Rp3 and the voltage drop across the third resistance element Rexb.

[0068] 7, the first gate electrode 504 is provided between the first cathode region 403 and the first impurity region 503 in the region of the second well 602. The first gate electrode 504 is made of a conductive material such as polysilicon. In the bidirectional thyristor 1, a first transistor TA1 is formed in which the first cathode region 403, the first impurity region 503, the first gate electrode 504, and the second well 602 serve as a source, drain, gate, and substrate, respectively. The first transistor TA1 is an N-type MOS transistor.

[0069] The source of the first transistor TA1 also serves as the first cathode region 403 of the first thyristor TY1, and the substrate of the first transistor TA1 also serves as the second well 602 corresponding to the gate of the first thyristor TY1. The first impurity region 503 corresponding to the drain of the first transistor TA1 is connected to the third gate region 401 by metal wiring, is connected to the anode line Lm via the second resistor element Rexc, and is connected to the intermediate node Nm. The first gate electrode 504 corresponding to the gate of the first transistor TA1 is connected to the first cathode terminal T1 via the first cathode line L1. The first gate electrode 504 is connected to the first cathode region 403 by metal wiring, and is also connected to the first gate region 404 via the first resistor element Rexa.

[0070] 7, the second gate electrode 506 is provided between the second cathode region 408 and the second impurity region 505 in the region of the third well 603. The second gate electrode 506 is made of a conductive material such as polysilicon, similar to the first gate electrode 504. In the bidirectional thyristor 1, a second transistor TA2 is formed in which the second cathode region 408, the second impurity region 505, the second gate electrode 506, and the third well 603 serve as a source, drain, gate, and substrate, respectively. The second transistor TA2 is an N-type MOS transistor.

[0071] The source of the second transistor TA2 also serves as the second cathode region 408 of the second thyristor TY2, and the substrate of the second transistor TA2 also serves as the third well 603 corresponding to the gate of the second thyristor TY2. The second impurity region 505 corresponding to the drain of the second transistor TA2 is connected to the third gate region 401 by metal wiring, is connected to the anode line Lm via the second resistor element Rexc, and is connected to the intermediate node Nm. The second gate electrode 506 corresponding to the gate of the second transistor TA2 is connected to the second cathode terminal T2 via the second cathode line L2. The second gate electrode 506 is connected to the second cathode region 408 by metal wiring, and is connected to the second gate region 409 via the third resistor element Rexb.

[0072] 8, the first transistor TA1, the first thyristor TY1, the second thyristor TY2, and the second transistor TA2 are arranged side by side along the second direction DR2. The first transistor TA1 and the first thyristor TY1, and the second thyristor TY2 and the second transistor TA2 are arranged symmetrically with respect to the third gate region 401 provided in the center of the bidirectional thyristor 1.

[0073] In this embodiment, the first impurity region 503 and the first gate electrode 504 corresponding to the drain of the first transistor TA1 are arranged on the opposite side of the first anode region 402 with respect to the first cathode region 403 which is the cathode of the first thyristor TY1. Similarly, the second impurity region 505 and the second gate electrode 506 which are the drain of the second transistor TA2 are arranged on the opposite side of the second anode region 407 with respect to the second cathode region 408 which is the cathode of the second thyristor TY2.

[0074] Fig. 9 is an equivalent circuit diagram of the bidirectional thyristor shown in Fig. 7 and Fig. 8. As shown in Fig. 9, a first diode element DI1, a first thyristor TY1, and a first transistor TA1 are provided between a node N1 of the first cathode terminal T1 and an intermediate node Nm. In addition, a second diode element DI2, a second thyristor TY2, and a second transistor TA2 are provided between the intermediate node Nm and a node N2 of the second cathode terminal T2.

[0075] The first diode element DI1 is arranged so that the forward direction is from the node N1 of the first cathode terminal T1 to the intermediate node Nm, and the second diode element DI2 is arranged so that the forward direction is from the node N2 of the second cathode terminal T2 to the intermediate node Nm.

[0076] In the equivalent circuit diagram of FIG. 9, contacts such as GA1 described in FIG. 7 are represented by square marks.

[0077] In the following, it is assumed that positive static electricity is applied to the first cathode terminal T1 with the second cathode terminal T2 being grounded. In Fig. 9, the current paths at that time are indicated by arrows (1) to (6).

[0078] First, when the PN junction between the drain and substrate of the second transistor TA2 breaks down, this triggers the second thyristor TY2 to start transitioning to the on state. The current path that flows when the PN junction breaks down is shown by the arrow (1). That is, a current flows from the first cathode terminal T1 through the first diode element DI1, the second resistor element Rexc, and the second transistor TA2 to the second cathode terminal T2.

[0079] When a current flows through the path indicated by the arrow (1), the voltage drop at the second resistor element Rexc causes the base potential to drop relative to the emitter of the PNP bipolar transistor PNP2, and a base current flows through the PNP bipolar transistor PNP2, causing a current to flow through the path indicated by the arrow (2). When the base current flows through the PNP bipolar transistor PNP2, the PNP bipolar transistor PNP2 turns on, causing a current to flow through the path indicated by the arrow (3). When a current flows through the path indicated by the arrow (3), the voltage at the base increases relative to the emitter of the NPN bipolar transistor NPN2 due to the voltage drop at the well resistor Rp2 and the third resistor element Rexb, causing a base current to flow through the NPN bipolar transistor NPN2 through the path indicated by the arrow (4). When the base current flows through the NPN bipolar transistor NPN2, the NPN bipolar transistor NPN2 turns on, causing a current to flow through the path indicated by the arrow (5). When the potential difference between the source and drain of the first transistor TA1 exceeds a threshold value, the first transistor TA1 turns on and a current indicated by an arrow (6) flows.

[0080] In the bidirectional thyristor 1 described above in FIGS. 7 to 9, the breakdown voltage of the first transistor TA1 or the second transistor TA2, which is an N-type MOS transistor, determines the trigger voltage. This trigger voltage is, for example, 6 V. Generally, the forward voltage of a diode is 0.6 V, and the hold voltage of a thyristor is about 1.2 V. For this reason, the hold voltage of the bidirectional thyristor 1 is +1.8 V or −1.8 V. This provides the voltage-current characteristics of the bidirectional thyristor 1 described in FIG. 6.

[0081] According to the configuration example of the bidirectional thyristor 1 described above with reference to FIGS. 7 to 9, since no other impurity region is provided between the first anode region 402 and the first cathode region 403, the distance 431 between the first anode region 402 and the first cathode region 403 is shortened. Furthermore, since no other impurity region is provided between the second anode region 407 and the second cathode region 408, the distance 432 between the second anode region 407 and the second cathode region 408 is shortened. This reduces the parasitic resistance between the anode region and the cathode region, and the hold voltage of the bidirectional thyristor 1 can be lowered. This allows the clamp voltage of the bidirectional thyristor 1 to be lowered.

[0082] 10 shows a second configuration example of the circuit device. The second configuration example of the circuit device 100 further includes a second bidirectional thyristor 62 and a third low potential side power supply terminal TMCS in addition to the first configuration example. The operation as a motor driver 210 is the same as in FIG.

[0083] The first low potential side power supply terminal TMC and the third low potential side power supply terminal TMCS are connected to one end of the sense resistor RS. The inverting input terminal of the comparison circuit 36 ​​is connected to the third low potential side power supply terminal TMCS. The voltage VS at one end of the sense resistor RS is input to the comparison circuit 36 ​​via the third low potential side power supply terminal TMCS.

[0084] One end of the second bidirectional thyristor 62 is connected to the third low potential side power supply terminal TMCS, and the other end is connected to the second low potential side power supply terminal TMD. As the second bidirectional thyristor 62, the bidirectional thyristor 1 described with reference to Figures 7 to 9 may be used, or any of various known bidirectional thyristors of various configurations may be used.

[0085] 11 is a diagram showing a discharge path when static electricity is applied in the second configuration example. For example, assume that static electricity is applied to the third low potential side power supply terminal TMCS with the second low potential side power supply terminal TMD as the ground. Arrow 3801 is the discharge path when positive static electricity is applied. The discharge path is from the third low potential side power supply terminal TMCS to the second bidirectional thyristor 62 and the second low potential side power supply terminal TMD. Arrow 3802 is the discharge path when negative static electricity is applied. The discharge path is from the second low potential side power supply terminal TMD to the second bidirectional thyristor 62 and the third low potential side power supply terminal TMCS.

[0086] In the first configuration example of FIG. 4, the drive circuit 10, the first low potential side power supply terminal TMC, and the comparison circuit 36 ​​are connected inside the semiconductor substrate. Since the first low potential side power supply terminal TMC and the sense resistor RS are included in the current path between the drive circuit 10 and the ground node NVS, the voltage VS input to the comparison circuit 36 ​​is affected by the parasitic resistance of the bonding wire of the first low potential side power supply terminal TMC or the lead frame of the package. For this reason, it is necessary to set the resistance value of the sense resistor RS taking the parasitic resistance into consideration, and at the same time, the variation in the parasitic resistance causes an error. In other words, since the voltage VS, which is the detection voltage value, varies due to the parasitic resistance, the drive current of the motor also varies, which may adversely affect the operation of the motor.

[0087] According to the second configuration example of Fig. 10, one end of the sense resistor RS is connected to the comparison circuit 36 ​​via a third low potential side power supply terminal TMCS that is separate from the first low potential side power supply terminal TMC. This prevents the voltage VS input to the comparison circuit 36 ​​from being affected by parasitic resistance of the bonding wire of the first low potential side power supply terminal TMC or the lead frame of the package. This eliminates the need to set the resistance value of the sense resistor RS taking the parasitic resistance into consideration, and prevents variations in the parasitic resistance from causing errors. The effect of providing the second bidirectional thyristor 62 as an electrostatic protection circuit is similar to the effect of providing the bidirectional thyristor 61.

[0088] Figures 12 and 13 are detailed configuration examples of the control circuit and the pre-driver. The illustration of the detection circuit 30 is omitted in FIGS. 12 and 13. In FIG. 12, only the components related to the charging period are illustrated, showing the current path during the charging period. In FIG. 13, only the components related to the decay period are illustrated, showing the current path during the decay period.

[0089] The first drive terminal TMA is connected to one end of the motor 215, and the second drive terminal TMB is connected to the other end of the motor 215. The first high-potential side power supply terminal TVBB is connected to the positive terminal of the power supply 216, and the ground node NVS is connected to the negative terminal of the power supply 216. The power supply voltage supplied by the power supply 216 is, for example, 40V. The transistors Q1 to Q4 of the drive circuit 10 are high-voltage withstand transistors, for example, DMOS transistors. DMOS is the abbreviation of Double-Diffused MOS.

[0090] The control circuit 20 includes a first constant voltage circuit 21, a second constant voltage circuit 22, a first circuit 25, and a second circuit 26. The pre-driver 18 includes transistors TP1 to TP4 and TN1 to TN4. The transistors TP1 to TP4 are P-type MOS transistors. The transistors TN1 to TN4 are N-type MOS transistors.

[0091] The first constant voltage circuit 21 generates a first regulated voltage VREGA that is lower than the power supply voltage VBB by a predetermined voltage with reference to the power supply voltage VBB. For example, when the predetermined voltage is 5V, VREGA = VBB - 5V.

[0092] The second constant voltage circuit 22 generates a second regulated voltage VREGB of a predetermined voltage with reference to the ground voltage VSS. VREGB < VREGA. For example, when the predetermined voltage is 5V, VREGB = 5V.

[0093] The first circuit 25 operates using the power supply voltage VBB and the first regulated voltage VREGA as power supplies. The first circuit 25 outputs a control signal for controlling the transistors Q1 and Q3 to be on or off based on the detection result signal RQ.

[0094] The transistors TP1 and TN1 configure an inverter that uses the power supply voltage VBB and the first regulated voltage VREGA as power supplies. This inverter receives a control signal from the first circuit 25 and outputs a pre-drive signal to the gate of the transistor Q1.

[0095] The transistors TP3 and TN3 configure an inverter that uses the power supply voltage VBB and the first regulated voltage VREGA as its power supplies. This inverter receives a control signal from the first circuit 25 and outputs a pre-drive signal to the gate of the transistor Q3.

[0096] The second circuit 26 operates using the second regulated voltage VREGB and the ground voltage VSS as power supplies. The second circuit 26 outputs a control signal for controlling the transistors Q2 and Q4 to be on or off based on the detection result signal RQ.

[0097] The transistors TP2 and TN2 configure an inverter that uses the second regulated voltage VREGB and the ground voltage VSS as power sources. This inverter receives a control signal from the second circuit 26 and outputs a pre-drive signal to the gate of the transistor Q2.

[0098] The transistors TP4 and TN4 configure an inverter that uses the second regulated voltage VREGB and the ground voltage VSS as power sources. This inverter receives a control signal from the second circuit 26 and outputs a pre-drive signal to the gate of the transistor Q4.

[0099] As described above, for example, VREGA=VBB-5 V and VREGB=5 V. For this reason, the transistors included in the first circuit 25, the second circuit 26, and the pre-driver 18 are transistors with a lower withstand voltage than the transistors Q1 to Q4 of the drive circuit 10.

[0100] 12, the current path during the charge period is from the positive terminal of the power supply 216 to the first high potential side power supply terminal TVBB, the transistor Q1, the motor 215, the transistor Q4, and the first low potential side power supply terminal TMC. As shown by the arrow 3905 in Fig. 13, the current path during the decay period is from the first low potential side power supply terminal TMC to the transistor Q2, the motor 215, the transistor Q3, the first high potential side power supply terminal TVBB, and the positive terminal of the power supply 216.

[0101] 14 shows a third configuration example of the circuit device. The circuit device 100 of this configuration example further includes a third bidirectional thyristor 63 and a second high potential side power supply terminal TVBBIN in addition to the first configuration example. The third configuration example may be further combined with the second configuration example. The operation as the motor driver 210 is the same as that of FIG. 1.

[0102] The power supply lines of the control circuit 20 and the pre-driver 18 are connected to the second high potential power supply terminal TVBBIN. The power supply voltage of the control circuit 20 and the pre-driver 18 is the power supply voltage VBBIN supplied from the second high potential power supply terminal TVBBIN.

[0103] One end of the third bidirectional thyristor 63 is connected to the first high potential power supply terminal TVBB, and the other end is connected to the second high potential power supply terminal TVBBIN. As the third bidirectional thyristor 63, the bidirectional thyristor 1 described with reference to Figures 7 to 9 may be used, or any of various known bidirectional thyristors of various configurations may be used.

[0104] 15 is a diagram showing a discharge path when static electricity is applied in the third configuration example. For example, assume that static electricity is applied to the second high potential side power supply terminal TVBBIN with the first high potential side power supply terminal TVBB as the ground. An arrow 4201 is the discharge path when positive static electricity is applied. The discharge path is from the second high potential side power supply terminal TVBBIN to the third bidirectional thyristor 63 and the first high potential side power supply terminal TVBB. An arrow 4202 is the discharge path when negative static electricity is applied. The discharge path is from the first high potential side power supply terminal TVBB to the third bidirectional thyristor 63 and the second high potential side power supply terminal TVBBIN.

[0105] 12 and 13, noise on the power supply voltage VBB may cause the motor driver 210 to malfunction. This point will be described below.

[0106] 12 and 13, there is a parasitic resistance 3902 between the positive terminal of the power supply 216 and the source of the transistor Q1. The parasitic resistance 3902 includes the parasitic resistance of the power supply line and the parasitic resistance of the bonding wire of the first high potential side power supply terminal TVBB or the lead frame of the package. An arrow 3903 is a path through which the operating current of the control circuit 20 and the pre-driver 18 flows. The arrow 3903 passes through the parasitic resistance 3902. In other words, the parasitic resistance 3902 is a common impedance between the power supply line of the control circuit 20 and the pre-driver 18 and the source of the transistor Q3.

[0107] As shown in FIG. 12, a current flows in the direction of the arrow 3904 during the charge period. Because the current path has a parasitic resistance 3902, the power supply voltage VBB, which is the source voltage of the transistor Q1, becomes lower than the voltage of the positive terminal of the power supply 216. Because of the common impedance as described above, the power supply voltage VBB of the control circuit 20 and the pre-driver 18 also becomes lower than the voltage of the positive terminal of the power supply 216. As shown in FIG. 13, a current flows in the direction of the arrow 3905 during the decay period. Because the current direction is opposite to that of the charge period, the power supply voltage VBB of the control circuit 20 and the pre-driver 18 becomes higher than the voltage of the positive terminal of the power supply 216.

[0108] Thus, in normal operation of driving a motor, the bridge circuit generates noise in the power supply voltage VBB in the circuit device 100 due to positive and negative surge currents. This noise may cause malfunction of the control circuit 20 or the pre-driver 18. For example, the first constant voltage circuit 21 generates the first regulated voltage VREGA based on the power supply voltage VBB. For this reason, as the power supply voltage VBB fluctuates, the first regulated voltage VREGA may fluctuate, which may cause the pre-driver that drives the transistor Q1 or Q3 to malfunction.

[0109] 14, the power supply lines of the control circuit 20 and the pre-driver 18 are connected to the second high potential power supply terminal TVBBIN. This makes it possible to avoid the influence of the common impedance described above. This point will be described below.

[0110] Fig. 16 shows a current path during the charge period of the third configuration example. Fig. 17 shows a current path during the decay period of the third configuration example. The detection circuit 30 is omitted in Fig. 16 and Fig. 17. Fig. 16 shows only the components related to the charge period, and Fig. 17 shows only the components related to the decay period.

[0111] Parasitic resistance 3906 is a parasitic resistance between the positive terminal of the power supply 216 and the power supply line of the control circuit 20 and the pre-driver 18. As indicated by arrows 3904 and 3905, the current flowing through the motor 215 during the charge period and the decay period passes through the parasitic resistance 3902, but does not pass through the parasitic resistance 3906. On the other hand, arrow 3907 is a path through which the operating current of the control circuit 20 and the pre-driver 18 flows, and passes through the parasitic resistance 3906, but does not pass through the parasitic resistance 3902. In other words, the parasitic resistance 3902 does not serve as a common impedance for the power supply line of the control circuit 20 and the pre-driver 18.

[0112] As a result, the control circuit 20 and the pre-driver 18 are not affected by noise in the power supply voltage VBB generated by the bridge circuit, thereby preventing malfunction of the motor driver 210. The effect of using the third bidirectional thyristor 63 as an electrostatic protection circuit is similar to the effect of using the bidirectional thyristor 61.

[0113] In this embodiment, the circuit device 100 includes a first low potential side power supply terminal TMC, a second low potential side power supply terminal TMD, a drive circuit 10, a switching control circuit 40, and a bidirectional thyristor 61 for electrostatic protection. The drive circuit 10 is connected to the first low potential side power supply terminal TMC and drives the drive target by switching operation. The switching control circuit 40 is connected to the second low potential side power supply terminal TMD and controls the switching operation of the drive circuit 10. One end of the bidirectional thyristor 61 is connected to the first low potential side power supply terminal TMC, and the other end is connected to the second low potential side power supply terminal TMD.

[0114] Noise is generated in the voltage VS of the first low potential side power supply terminal TMC connected to the drive circuit 10 due to the switching operation of the drive circuit 10. According to this embodiment, the switching control circuit 40 is connected to the second low potential side power supply terminal TMD. This separates the ground node of the switching control circuit 40 from the noise of the voltage VS of the first low potential side power supply terminal TMC. Furthermore, by providing the bidirectional thyristor 61 between the first low potential side power supply terminal TMC and the second low potential side power supply terminal TMD, the internal circuit can be protected from static electricity. There is a possibility that the noise of the voltage VS of the first low potential side power supply terminal TMC will propagate to the ground node of the switching control circuit 40 via the bidirectional thyristor 61, but since the trigger voltage of the bidirectional thyristor 61 is higher than the clamp voltage, the noise propagation can be prevented. Since the clamp voltage is lower than the trigger voltage, it is possible to ensure a high electrostatic withstand voltage while preventing noise propagation.

[0115] In this embodiment, the switching control circuit 40 includes a detection circuit 30 that detects a current flowing through a drive target, and a control circuit 20 that controls a switching operation based on a detection result of the detection circuit 30.

[0116] According to this embodiment, the detection circuit 30 and the control circuit 20 are not affected by noise in the voltage VS of the first low potential side power supply terminal TMC, so that malfunctions in current detection or switching operation control can be prevented. This makes it possible to prevent malfunctions in the control for driving a drive target in a motor driver or the like.

[0117] In this embodiment, the detection circuit 30 also includes a comparison circuit 36 ​​that compares the reference voltage VR with the voltage VS of the first low potential power supply terminal TMC.

[0118] According to this embodiment, the comparator circuit 36 ​​is not affected by noise in the voltage VS of the first low potential power supply terminal TMC, so that malfunction of the voltage comparison can be prevented. This makes it possible to prevent malfunction of the control for driving the drive target in a motor driver or the like.

[0119] In this embodiment, the drive circuit 10 includes transistors Q1 to Q4 that drive the driven object. The control circuit 20 outputs a control signal that controls the switching operation of the transistors Q1 to Q4 based on the detection result of the detection circuit 30. The switching control circuit 40 includes a pre-driver 18 that drives the gates of the transistors Q1 to Q4 based on the control signal.

[0120] According to this embodiment, the pre-driver 18 is not affected by noise in the voltage VS of the first low potential power supply terminal TMC, and therefore it is possible to prevent malfunction of the transistor drive by the pre-driver 18. This makes it possible to prevent malfunction of the control for driving the drive target in a motor driver or the like.

[0121] In this embodiment, the circuit device 100 may also include a third low potential side power supply terminal TMCS and a second bidirectional thyristor 62 for electrostatic protection. One end of the second bidirectional thyristor 62 may be connected to the third low potential side power supply terminal TMCS, and the other end may be connected to the second low potential side power supply terminal TMD. The detection circuit 30 may also include a comparison circuit 36 ​​that compares a reference voltage VR with a voltage VS of the third low potential side power supply terminal TMCS.

[0122] Noise occurs in the voltage of the first low potential side power supply terminal TMC connected to the drive circuit 10 due to the switching operation of the drive circuit 10. According to this embodiment, the comparison circuit 36 ​​compares the reference voltage VR with the voltage VS of the third low potential side power supply terminal TMCS. This separates the voltage VS input to the comparison circuit 36 ​​from the noise of the voltage of the first low potential side power supply terminal TMC. Furthermore, by providing the second bidirectional thyristor 62 between the third low potential side power supply terminal TMCS and the second low potential side power supply terminal TMD, the internal circuit can be protected from static electricity. There is a possibility that the noise of the voltage of the first low potential side power supply terminal TMC propagates to the voltage VS input to the comparison circuit 36 ​​via the second bidirectional thyristor 62. According to this embodiment, the trigger voltage of the second bidirectional thyristor 62 is higher than the clamp voltage, so that the noise propagation can be prevented. Since the clamp voltage is lower than the trigger voltage, it is possible to ensure a high electrostatic withstand voltage while preventing noise propagation.

[0123] In this embodiment, the circuit device 100 may include a first high potential side power supply terminal TVBB, a second high potential side power supply terminal TVBBIN, and a third bidirectional thyristor 63. One end of the third bidirectional thyristor 63 may be connected to the first high potential side power supply terminal TVBB, and the other end may be connected to the second high potential side power supply terminal TVBBIN. The drive circuit 10 may be connected to the first high potential side power supply terminal TVBB. The switching control circuit 40 may be connected to the second high potential side power supply terminal TVBBIN.

[0124] Noise is generated in the voltage VBB of the first high potential side power supply terminal TVBB connected to the drive circuit 10 due to the switching operation of the drive circuit 10. According to this embodiment, the switching control circuit 40 is connected to the second high potential side power supply terminal TVBBIN. This isolates the power supply node of the switching control circuit 40 from the noise of the voltage VBB of the first high potential side power supply terminal TVBB. Furthermore, by providing the third bidirectional thyristor 63 between the first high potential side power supply terminal TVBB and the second high potential side power supply terminal TVBBIN, the internal circuit can be protected from static electricity. There is a possibility that the noise of the voltage VBB of the first high potential side power supply terminal TVBB may propagate to the power supply node of the switching control circuit 40 via the third bidirectional thyristor 63, but since the trigger voltage of the third bidirectional thyristor 63 is higher than the clamp voltage, the noise propagation can be prevented. Since the clamp voltage is lower than the trigger voltage, it is possible to ensure a high electrostatic withstand voltage while preventing noise propagation.

[0125] In the present embodiment, the object to be driven may be a motor, a coil, or a solenoid. An example in which the object to be driven is a coil or a solenoid will be described later.

[0126] The bidirectional thyristor 61 of this embodiment may be the bidirectional thyristor 1 of FIGS. 7 to 9. The bidirectional thyristor 1 includes a first anode region 402, a first cathode region 403, a first impurity region 503, a first gate region 404, a second anode region 407, a second cathode region 408, a second impurity region 505, a second gate region 409, and a third gate region 401. The first anode region 402 is a second-conductivity-type impurity region provided in a first-conductivity-type first well 601 and electrically connected to the anode line Lm. The first cathode region 403 is a first-conductivity-type impurity region provided in a second-conductivity-type second well 602 and electrically connected to the first low-potential-side power supply terminal TMC. The first impurity region 503 is a first-conductivity-type impurity region provided in the second well 602 and electrically connected to the anode line Lm via a second resistor element Rexc. The first gate region 404 is a second conductive type impurity region provided in the second well 602 and electrically connected to the first cathode line L1 via the first resistor element Rexa. The second anode region 407 is a second conductive type impurity region provided in the first conductive type first well 601 and electrically connected to the anode line Lm. The second cathode region 408 is a first conductive type impurity region provided in the second conductive type third well 603 and electrically connected to the second low potential side power supply terminal TMD. The second impurity region 505 is a first conductive type impurity region provided in the third well 603 and electrically connected to the anode line Lm via the second resistor element Rexc. The second gate region 409 is a second conductive type impurity region provided in the third well 603 and electrically connected to the second cathode line L2 via the third resistor element Rexb. The third gate region 401 is a first conductivity type impurity region provided in the first well 601 and electrically connected to the anode line Lm via the second resistor element Rexc.

[0127] As described with reference to FIGS. 7 to 9, in the bidirectional thyristor 1, since no other impurity region is provided between the first anode region 402 and the first cathode region 403, the distance 431 between the first anode region 402 and the first cathode region 403 is shortened. Furthermore, since no other impurity region is provided between the second anode region 407 and the second cathode region 408, the distance 432 between the second anode region 407 and the second cathode region 408 is shortened. This reduces the parasitic resistance between the anode region and the cathode region, and the hold voltage of the bidirectional thyristor 1 can be lowered. This allows the clamp voltage of the bidirectional thyristor 1 to be lowered.

[0128] 2. Switching regulator An example in which the circuit device of this embodiment is applied to a switching regulator will be described below. The driving target is a coil.

[0129] 18 shows a configuration example of a synchronous rectification step-down switching regulator and a fourth configuration example of a circuit device. The switching regulator 220 includes the circuit device 100, a coil 221, and a capacitor 222. The coil 221 is also called an inductor.

[0130] The load 225 is a target to which the output voltage of the switching regulator 220 is supplied. For example, the load 225 is a circuit that operates using the output voltage of the switching regulator 220 as a power supply. The power supply 226 generates a power supply voltage VDD that is an input voltage of the switching regulator 220.

[0131] The circuit device 100 includes a drive circuit 10, a switching control circuit 40, a bidirectional thyristor 61, a drive terminal TDR, a first low potential side power supply terminal TPG, a second low potential side power supply terminal TVSS, and a first high potential side power supply terminal TVDD.

[0132] The drive terminal TDR is connected to one end of the coil 221. The other end of the coil 221 is connected to the output node NVQ of the switching regulator 220. The first low potential side power supply terminal TPG is connected to the ground node NVS. One end of the capacitor 222 is connected to the output node NVQ, and the other end is connected to the ground node NVS. The load 225 is connected between the output node NVQ and the ground node NVS. The first high potential side power supply terminal TVDD is connected to the positive terminal of the power supply 226. The second low potential side power supply terminal TVSS is connected to the negative terminal of the power supply 226 and the ground node NVS.

[0133] The switching control circuit 40 controls the switching operation of the drive circuit 10 based on the voltage VQ of the output node NVQ. The switching control circuit 40 includes a reference voltage generating circuit 32, a comparator circuit 36, and a pre-driver 18.

[0134] The reference voltage generating circuit 32 generates a reference voltage VREF. The reference voltage generating circuit 32 includes, for example, a bandgap reference circuit and a voltage dividing circuit that generates the reference voltage VREF based on the output voltage of the bandgap reference circuit.

[0135] The comparator circuit 36 ​​compares the reference voltage VREF with the voltage VQ, and outputs the result as a detection result signal RQ. In the example of FIG.<VREFのときRQはハイレベルであり、VQ> When VREF is reached, RQ is at a low level.

[0136] The pre-driver 18 outputs a pre-drive signal that drives the gate of each transistor of the drive circuit 10 based on the detection result signal RQ. The pre-driver 18 includes, for example, a control circuit and a buffer circuit. The control circuit outputs a control signal that controls each transistor of the drive circuit 10 to be on or off based on the detection result signal RQ. The buffer circuit buffers the control signal to output a pre-drive signal that drives the gate of each transistor of the drive circuit 10.

[0137] The ground lines of the reference voltage generating circuit 32, the comparing circuit 36 ​​and the pre-driver 18 are connected to the second low potential side power supply terminal TVSS.

[0138] The driving circuit 10 drives the coil 221 based on the pre-driving signal. The driving circuit 10 includes transistors Q1 and Q2.

[0139] The transistor Q1 is a P-type MOS transistor. The source of the transistor Q1 is connected to the first high potential side power supply terminal TVDD, and the drain is connected to the drive terminal TDR. The transistor Q2 is an N-type MOS transistor. The source of the transistor Q2 is connected to the first low potential side power supply terminal TPG, and the drain is connected to the drive terminal TDR.

[0140] In the first period, the pre-driver 18 turns on the transistor Q1 and turns off the transistor Q2. In the second period, the pre-driver 18 turns on the transistor Q2 and turns off the transistor Q1. The switching control circuit 40 repeats the first period and the second period based on the result of comparing the output voltage VQ of the switching regulator 220 with the reference voltage VREF. This controls the output voltage VQ to a voltage corresponding to the reference voltage VREF.

[0141] The bidirectional thyristor 61 is an electrostatic protection circuit between the first low potential side power supply terminal TPG and the second low potential side power supply terminal TVSS. One end of the bidirectional thyristor 61 is connected to the first low potential side power supply terminal TPG, and the other end is connected to the second low potential side power supply terminal TVSS. For example, assume that static electricity is applied to the first low potential side power supply terminal TPG with the second low potential side power supply terminal TVSS as the ground. When positive static electricity is applied, the discharge path is from the first low potential side power supply terminal TPG to the bidirectional thyristor 61 and the second low potential side power supply terminal TVSS, and when negative static electricity is applied, the discharge path is from the second low potential side power supply terminal TVSS to the bidirectional thyristor 61 and the first low potential side power supply terminal TPG. The noise prevention effect of the bidirectional thyristor 61 will be described later with reference to FIG. 20.

[0142] 19 shows a fifth configuration example of the circuit device. The fifth configuration example of the circuit device 100 further includes a third bidirectional thyristor 63 and a second high potential side power supply terminal TVDD2 in addition to the fourth configuration example. The operation as a switching regulator 220 is the same as that in FIG.

[0143] The second high potential side power supply terminal TVDD2 is connected to the positive terminal of the power supply 226. The power supply lines of the reference voltage generating circuit 32 and the pre-driver 18 are connected to the second high potential side power supply terminal TVDD2. The power supply voltage of the reference voltage generating circuit 32 and the pre-driver 18 is the power supply voltage VDD2 supplied from the second high potential side power supply terminal TVDD2.

[0144] The connection and discharge path of the bidirectional thyristor 61 are as described in FIG.

[0145] The third bidirectional thyristor 63 is an electrostatic protection circuit between the first high potential side power supply terminal TVDD and the second high potential side power supply terminal TVDD2. One end of the third bidirectional thyristor 63 is connected to the first high potential side power supply terminal TVDD, and the other end is connected to the second high potential side power supply terminal TVDD2. For example, assume that static electricity is applied to the first high potential side power supply terminal TVDD with the second high potential side power supply terminal TVDD2 as the ground. When positive static electricity is applied, the discharge path is from the first high potential side power supply terminal TVDD to the third bidirectional thyristor 63 and the second high potential side power supply terminal TVDD2, and when negative static electricity is applied, the discharge path is from the second high potential side power supply terminal TVDD2 to the third bidirectional thyristor 63 and the first high potential side power supply terminal TVDD.

[0146] A parasitic resistance 2503 is a parasitic resistance between the positive terminal of the power supply 226 and the source of the transistor Q1. A parasitic resistance 2507 is a parasitic resistance between the positive terminal of the power supply 226 and the power supply lines of the reference voltage generating circuit 32 and the pre-driver 18. Although not shown, there is a parasitic resistance between the ground node NVS and the ground line of the switching control circuit 40. There is also a parasitic resistance between the ground node NVS and the source of the transistor Q2.

[0147] FIG. 20 shows the current paths in the first and second periods of the fifth configuration example.

[0148] Arrow 2505 indicates the current path in the first period. This current causes magnetic energy to accumulate in coil 221. The second period begins when voltage VS becomes higher than reference voltage VREF. Arrow 2506 indicates the current path in the second period. The magnetic energy accumulated in coil 221 becomes a current and is output to load 225.

[0149] As indicated by arrow 2505, in the first period, the power supply voltage VDD input from the first high potential power supply terminal TVDD becomes lower than the positive voltage of the power supply 226 due to the influence of parasitic resistance 2503. In the second period, since the transistor Q1 is off, the power supply voltage VDD is approximately the same as the positive voltage of the power supply 226. That is, in the drive circuit 10, during normal operation of the switching regulator 220, a surge current generates noise in the power supply voltage VDD in the circuit device 100.

[0150] An arrow 2504 indicates a path through which the operating current of the reference voltage generating circuit 32 and the pre-driver 18 flows, and passes through a parasitic resistor 2507 but not through a parasitic resistor 2503. In other words, the parasitic resistor 2503 does not serve as a common impedance for the power supply lines of the reference voltage generating circuit 32 and the pre-driver 18.

[0151] As a result, the power supply voltage VDD2 of the reference voltage generating circuit 32 and the pre-driver 18 is not affected by noise of the power supply voltage VDD generated by the drive circuit 10, thereby preventing malfunction of the switching regulator 220. The effect of using the third bidirectional thyristor 63 as the electrostatic protection circuit is as described with reference to FIG. 6 etc.

[0152] As shown by the arrow 2506, in the second period, the ground voltage PGND input from the first low potential side power supply terminal TPG becomes a negative voltage lower than the ground voltage VSS due to the influence of parasitic resistance. In the first period, the transistor Q2 is off. The current shown by the arrow 2505 flows to the ground node NVS outside the circuit device 100. At this time, due to the influence of the parasitic resistance of the ground node NVS, the ground voltage PGND becomes a voltage higher than the ground voltage VSS. In addition, when switching from the first period to the second period, the current flowing through the ground node NVS is suddenly reduced, and an undershoot voltage occurs in the ground voltage PGND. In this way, in the drive circuit 10, during normal operation of the switching regulator 220, noise is generated in the ground voltage PGND in the circuit device 100 due to a surge current.

[0153] As shown by the arrow 2504, the operating current of the reference voltage generating circuit 32 and the pre-driver 18 passes through the second low potential side power supply terminal TVSS and does not pass through the first low potential side power supply terminal TPG. In other words, the parasitic resistance of the first low potential side power supply terminal TPG does not become a common impedance for the ground line of the reference voltage generating circuit 32 and the pre-driver 18.

[0154] As a result, the reference voltage generating circuit 32 and the pre-driver 18 are not affected by noise of the ground voltage PGND generated by the drive circuit 10, thereby preventing malfunction of the switching regulator 220. The effect of using the bidirectional thyristor 61 as the electrostatic protection circuit is as described with reference to FIG. 6 etc.

[0155] In the configuration example of FIG. 18 as well, the provision of the bidirectional thyristor 61 prevents malfunction of the switching regulator 220 and provides the effects described with reference to FIG. 6 and the like.

[0156] 21 shows a configuration example of an asynchronous rectification step-down switching regulator and a sixth configuration example of a circuit device. The switching regulator 220 includes a circuit device 100, a coil 221, a capacitor 222, and a diode 223. The circuit device 100 includes a drive circuit 10, a switching control circuit 40, a third bidirectional thyristor 63, a drive terminal TDR, a second low potential side power supply terminal TVSS, a first high potential side power supply terminal TVDD, and a second high potential side power supply terminal TVDD2.

[0157] The driving circuit 10 includes a transistor Q1. The cathode of a diode 223 is connected to the driving terminal TDR, and the anode is connected to the ground node NVS.

[0158] In the first period, the transistor Q1 is on, and magnetic energy is stored in the coil 221. In the second period, the transistor Q1 is off. The magnetic energy stored in the coil 221 becomes a current and is output to the load 225. This current passes through the diode 223 and is regenerated.

[0159] The third bidirectional thyristor 63 prevents the propagation of noise, as in Fig. 20. The function of the third bidirectional thyristor 63 as an electrostatic protection circuit is as described with reference to Fig. 6 and so on.

[0160] 22 shows a configuration example of a synchronous rectification boost switching regulator and a seventh configuration example of a circuit device. The switching regulator 220 includes a circuit device 100, a coil 221, a capacitor 222, a resistor 227, and a resistor 228. The circuit device 100 includes a drive circuit 10, a switching control circuit 40, a bidirectional thyristor 61, a drive terminal TDR, a first low potential side power supply terminal TPG, a second low potential side power supply terminal TVSS, a first high potential side power supply terminal TVQ, and a third high potential side power supply terminal TVDD3.

[0161] One end of the capacitor 222 is connected to the first high potential side power supply terminal TVQ, and the other end is connected to the ground node NVS. One end of the resistor 227 is connected to the first high potential side power supply terminal TVQ, and the other end is connected to the node NVD. One end of the resistor 228 is connected to the node NVD, and the other end is connected to the ground node NVS. One end of the coil 221 is connected to the drive terminal TDR, and the other end is connected to the positive terminal of the power supply 226. The third high potential side power supply terminal TVDD3 is connected to the positive terminal of the power supply 226.

[0162] The power supply nodes of the reference voltage generating circuit 32 and the comparator circuit 36 ​​are connected to the third high potential side power supply terminal TVDD3 and are supplied with a power supply voltage VDD3. The comparator circuit 36 ​​compares the voltage VD at the node NVD with the reference voltage VREF. The power supply node of the pre-driver 18 is connected to the first high potential side power supply terminal TVQ and is supplied with the output voltage VQ of the switching regulator 220 as a power supply voltage. The ground nodes of the reference voltage generating circuit 32, the comparator circuit 36 ​​and the pre-driver 18 are connected to the second low potential side power supply terminal TVSS.

[0163] The driving circuit 10 includes transistors Q1 and Q2. The transistor Q1 is a P-type MOS transistor. The source of the transistor Q1 is connected to the first high potential side power supply terminal TVQ, and the drain of the transistor Q1 is connected to the driving terminal TDR. The transistor Q2 is an N-type MOS transistor. The source of the transistor Q2 is connected to the first low potential side power supply terminal TPG, and the drain of the transistor Q2 is connected to the driving terminal TDR.

[0164] In the first period, the pre-driver 18 turns on the transistor Q2 and turns off the transistor Q1. In the second period, the pre-driver 18 turns on the transistor Q1 and turns off the transistor Q2. The output voltage VQ is divided into a voltage VD by the resistors 227 and 228. The switching control circuit 40 repeats the first period and the second period based on the result of comparing the voltage VD with the reference voltage VREF. This controls the voltage VD to be a voltage corresponding to the reference voltage VREF. The voltage division ratio and the reference voltage VREF are set so that the output voltage VQ is higher than the positive voltage of the power supply 226.

[0165] The noise prevention effect of the bidirectional thyristor 61 will be described later with reference to FIG.

[0166] 23 shows an eighth configuration example of the circuit device. The circuit device 100 of the eighth configuration example includes a third bidirectional thyristor 63 and a second high potential side power supply terminal TVQIN in addition to the seventh configuration example. The operation as a switching regulator 220 is the same as that of FIG. 22.

[0167] The second high potential power supply terminal TVQIN is connected to the node of the output voltage VQ. The power supply line of the pre-driver 18 is connected to the second high potential power supply terminal TVQIN. The power supply voltage of the pre-driver 18 is the output voltage VQ supplied from the second high potential power supply terminal TVQIN.

[0168] The third bidirectional thyristor 63 is an electrostatic protection circuit between the first high potential side power supply terminal TVQ and the second high potential side power supply terminal TVQIN. One end of the third bidirectional thyristor 63 is connected to the first high potential side power supply terminal TVQ, and the other end is connected to the second high potential side power supply terminal TVQIN.

[0169] Incidentally, a parasitic resistance 5303 is a parasitic resistance between the output node NVQ of the switching regulator 220 and the source of the transistor Q1. A parasitic resistance 5309 is a parasitic resistance between the output node NVQ and the power supply line of the pre-driver 18. Although not shown, there is a parasitic resistance between the ground node NVS and the ground line of the switching control circuit 40. In addition, there is a parasitic resistance between the ground node NVS and the source of the transistor Q2.

[0170] FIG. 24 shows the current paths in the first and second periods of the eighth configuration example.

[0171] Arrow 5306 indicates the current path in the first period. This current causes magnetic energy to accumulate in coil 221. The second period begins when voltage VD becomes higher than reference voltage VREF. Arrow 5307 indicates the current path in the second period. The magnetic energy accumulated in coil 221 becomes a current and is output to load 225.

[0172] As indicated by an arrow 5307, in the second period, the source voltage of the transistor Q1 becomes higher than the output voltage VQ supplied to the load 225 due to the influence of the parasitic resistance 5303. Since the transistor Q1 is off in the first period, the source voltage of the transistor Q1 is approximately the same as the output voltage VQ. That is, in the drive circuit 10, during normal operation of the switching regulator 220, noise is generated in the source voltage of the transistor Q1 due to a surge current.

[0173] An arrow 5304 is a path through which the operating current of the reference voltage generating circuit 32 and the comparing circuit 36 ​​flows, and does not pass through the parasitic resistor 5303. That is, the parasitic resistor 5303 does not serve as a common impedance for the power supply lines of the reference voltage generating circuit 32 and the comparing circuit 36. An arrow 5305 is a path through which the operating current of the pre-driver 18 flows, and passes through a parasitic resistor 5309, but does not pass through the parasitic resistor 5303. That is, the parasitic resistor 5303 does not serve as a common impedance for the power supply lines of the pre-driver 18.

[0174] As a result, the power supply voltages of the reference voltage generating circuit 32, the comparator circuit 36, and the pre-driver 18 are not affected by noise in the source voltage of the transistor Q1 generated by the drive circuit 10, thereby preventing malfunction of the switching regulator 220. The effect of using the third bidirectional thyristor 63 as the electrostatic protection circuit is as described with reference to FIG. 6 etc.

[0175] As indicated by arrow 5307, in the second period, the ground voltage PGND, which is the source voltage of transistor Q2, becomes higher than the ground voltage VSS due to the influence of parasitic resistance. In this manner, in the drive circuit 10, noise is generated in the ground voltage PGND in the circuit device 100 due to the surge current during normal operation of the switching regulator 220.

[0176] As shown by an arrow 5304, the operating current of the reference voltage generating circuit 32 and the comparing circuit 36 ​​passes through the second low potential side power supply terminal TVSS, but does not pass through the first low potential side power supply terminal TPG. Also, as shown by an arrow 5305, the operating current of the pre-driver 18 passes through the second low potential side power supply terminal TVSS, but does not pass through the first low potential side power supply terminal TPG. That is, the parasitic resistance related to the first low potential side power supply terminal TPG does not become a common impedance for the ground lines of the reference voltage generating circuit 32, the comparing circuit 36, and the pre-driver 18.

[0177] As a result, the reference voltage generating circuit 32, the comparator circuit 36, and the pre-driver 18 are not affected by noise of the ground voltage PGND generated by the drive circuit 10, thereby preventing malfunction of the switching regulator 220. The effect of using the bidirectional thyristor 61 as the electrostatic protection circuit is as described with reference to FIG. 6 etc.

[0178] In the configuration example of FIG. 22 as well, the provision of the bidirectional thyristor 61 prevents malfunction of the switching regulator 220 and provides the effects described with reference to FIG. 6 and the like.

[0179] 25 shows a configuration example of an asynchronous rectification step-up switching regulator and a ninth configuration example of a circuit device. The switching regulator 220 includes a circuit device 100, a coil 221, a capacitor 222, a resistor 227, a resistor 228, and a diode 224. The circuit device 100 includes a drive circuit 10, a switching control circuit 40, a bidirectional thyristor 61, a drive terminal TDR, a first low potential side power supply terminal TPG, a second low potential side power supply terminal TVSS, and a third high potential side power supply terminal TVDD3.

[0180] The drive circuit 10 includes a transistor Q2. The cathode of a diode 224 is connected to the output node NVQ, and the anode is connected to the drive terminal TDR.

[0181] In the first period, the transistor Q2 is on, and magnetic energy is stored in the coil 221. In the second period, the transistor Q2 is off. The magnetic energy stored in the coil 221 becomes a current and is output to the load 225. This current is supplied to the load 225 through the diode 224.

[0182] The bidirectional thyristor 61 prevents the propagation of noise, similarly to Fig. 22. Moreover, the function of the bidirectional thyristor 61 as an electrostatic protection circuit is as described with reference to Fig. 6 and so on.

[0183] In addition, a synchronous rectification type or asynchronous rectification type switching regulator may be configured as a buck-boost type switching regulator that can switch between a buck type and a boost type. In these switching regulators, for example, a bidirectional thyristor 61 may be provided between the first low potential side power supply terminal TPG and the second low potential side power supply terminal TVSS.

[0184] 3. Solenoid driver An example in which the circuit device of this embodiment is applied to a solenoid driver will be described below. The object to be driven is a solenoid.

[0185] 26 shows a configuration example of a solenoid driver and a tenth configuration example of a circuit device. The solenoid driver 230 includes a circuit device 100, a solenoid 231, a sense resistor 232, and a diode 233. The circuit device 100 includes a switching control circuit 40, a drive circuit 10, a bidirectional thyristor 64, a first high potential side power supply terminal TVDD, a second high potential side power supply terminal TVDDIN, a drive terminal TDR, a sense terminal TS1, a sense terminal TS2, and a low potential side power supply terminal TVSS.

[0186] The first high potential side power supply terminal TVDD and the second high potential side power supply terminal TVDDIN are connected to the positive terminal of the power supply 236. The low potential side power supply terminal TVSS is connected to the ground node NVS. The drive terminal TDR is connected to one end of the solenoid 231. The other end of the solenoid 231 is connected to the node NS. One end of the sense resistor 232 is connected to the node NS, and the other end is connected to the ground node NVS. The sense terminal TS1 is connected to the node NS, and the sense terminal TS2 is connected to the ground node NVS. The cathode of the diode 233 is connected to the drive terminal TDR, and the anode is connected to the ground node NVS.

[0187] The driving circuit 10 includes a transistor Q1. The source of the transistor Q1 is connected to a first high potential side power supply terminal TVDD and is supplied with a power supply voltage VDD. The drain of the transistor Q1 is connected to a driving terminal TDR.

[0188] The switching control circuit 40 outputs a pre-drive signal to the gate of the transistor Q1 to control the transistor Q1 to be on or off based on the voltage across the sense resistor 232. The period during which the transistor Q1 is on is defined as a first period, and the period during which the transistor Q1 is off is defined as a second period. The power supply line of the switching control circuit 40 is connected to a second high potential side power supply terminal TVDDIN, and a power supply voltage VDDIN is supplied to the switching control circuit 40. The ground line of the switching control circuit 40 is connected to a low potential side power supply terminal TVSS, and a ground voltage VSS is supplied to the switching control circuit 40.

[0189] The bidirectional thyristor 64 is an electrostatic protection circuit between the first high potential side power supply terminal TVDD and the second high potential side power supply terminal TVDDIN. One end of the bidirectional thyristor 64 is connected to the first high potential side power supply terminal TVDD, and the other end is connected to the second high potential side power supply terminal TVDDIN.

[0190] A parasitic resistance 6406 is a parasitic resistance between the positive terminal of the power supply 236 and the source of the transistor Q1. A parasitic resistance 6407 is a parasitic resistance between the positive terminal of the power supply 236 and the power supply node of the switching control circuit 40.

[0191] FIG. 27 shows the current paths in the first and second periods of the tenth configuration example.

[0192] As indicated by an arrow 6408, in a first period, a current flows from the positive terminal of the power supply 236 to the solenoid 231, and magnetic energy is stored in the solenoid 231. The switching control circuit 40 turns off the transistor Q1 when the voltage across the sense resistor 232 reaches the target voltage.

[0193] As shown by arrow 6409, in the second period, the magnetic energy stored in solenoid 231 is released as a current. This current is regenerated through diode 233. After that, switching control circuit 40 repeats the first period and the second period. As a result, the current flowing through solenoid 231 is controlled to be a constant current corresponding to the target voltage.

[0194] An arrow 6410 is a path through which the operating current of the switching control circuit 40 flows. This path passes through a parasitic resistor 6407, but does not pass through a parasitic resistor 6406. In other words, the parasitic resistor 6406 does not serve as a common impedance for the path through which the operating current of the switching control circuit 40 flows. As a result, noise occurs in the power supply voltage VDD of the drive circuit 10 due to the influence of the parasitic resistor 6406, but the power supply voltage VDDIN of the switching control circuit 40 is not affected by this noise.

[0195] The bidirectional thyristor 64 prevents noise propagation from the power supply voltage VDD to the power supply voltage VDDIN, similarly to the third bidirectional thyristor 63 in Fig. 14 etc. In addition, the effect of using the bidirectional thyristor 64 as an electrostatic protection circuit is as described in Fig. 6 etc.

[0196] In this embodiment, the circuit device 100 includes a first high potential side power supply terminal TVDD, a second high potential side power supply terminal TVDDIN, a drive circuit 10, a switching control circuit 40, and a bidirectional thyristor 64. The drive circuit 10 is connected to the first high potential side power supply terminal TVDD and drives a drive target by switching operation. The switching control circuit 40 is connected to the second high potential side power supply terminal TVDDIN and controls the switching operation of the drive circuit 10. One end of the bidirectional thyristor 64 is connected to the first high potential side power supply terminal TVDD, and the other end is connected to the second high potential side power supply terminal TVDDIN.

[0197] Noise occurs in the voltage VDD of the first high potential power supply terminal TVDD connected to the drive circuit 10 due to the switching operation of the drive circuit 10. According to this embodiment, the switching control circuit 40 is connected to the second high potential power supply terminal TVDDIN. This isolates the power supply node of the switching control circuit 40 from noise of the voltage VDD of the first high potential power supply terminal TVDD. In addition, by providing the bidirectional thyristor 64 between the first high potential power supply terminal TVDD and the second high potential power supply terminal TVDDIN, the internal circuit can be protected from static electricity. There is a possibility that noise of the voltage VDD of the first high potential power supply terminal TVDD may propagate to the power supply node of the switching control circuit 40 via the bidirectional thyristor 64, but since the trigger voltage of the bidirectional thyristor 64 is higher than the clamp voltage, noise propagation can be prevented. Since the clamp voltage is lower than the trigger voltage, it is possible to ensure high electrostatic resistance while preventing noise propagation.

[0198] Although the present embodiment has been described in detail as above, it will be easily understood by those skilled in the art that many modifications are possible without substantially departing from the novel matters and effects of the present disclosure. Therefore, all such modifications are intended to be included in the scope of the present disclosure. For example, a term described at least once in the specification or drawings together with a different term having a broader meaning or synonymy can be replaced with that different term anywhere in the specification or drawings. In addition, all combinations of the present embodiment and modifications are also included in the scope of the present disclosure. In addition, the configurations and operations of the detection circuit, control circuit, pre-driver, switching control circuit, drive circuit, bidirectional thyristor, circuit device, motor driver, switching regulator, solenoid driver, etc. are not limited to those described in the present embodiment, and various modifications are possible. [Explanation of symbols]

[0199] 1...bidirectional thyristor, 10...driver circuit, 18...pre-driver, 20...control circuit, 21...first constant voltage circuit, 22...second constant voltage circuit, 25...first circuit, 26...second circuit, 30...detection circuit, 32...reference voltage generation circuit, 34...D / A conversion circuit, 36...comparison circuit, 40...switching control circuit, 50...bidirectional diode, 61...bidirectional thyristor, 62...second bidirectional thyristor, 63...third bidirectional thyristor, 64...bidirectional thyristor, 100...circuit device, 210...motor driver, 215...motor, 216...power supply, 220...switching regulator, 221...coil 1, 222...capacitor, 223, 224...diode, 225...load, 226...power supply, 227, 228...resistor, 230...solenoid driver, 231...solenoid, 232...sense resistor, 233...diode, 236...power supply, Q1 to Q4...transistor, TMC, TPG...first low potential power supply terminal, TMCS...third low potential power supply terminal, TMD...second low potential power supply terminal, TVBB, TVDD, TVQ...first high potential power supply terminal, TVBBIN, TVDD2, TVDDIN, TVQIN...second high potential power supply terminal, TVDD3...third high potential power supply terminal, TVSS...second low potential power supply terminal

Claims

1. A first low potential side power supply terminal; A second low potential side power supply terminal; a drive circuit connected to the first low potential side power supply terminal and configured to drive a drive target by a switching operation; a switching control circuit connected to the second low potential side power supply terminal and controlling the switching operation of the drive circuit; a bidirectional thyristor for electrostatic protection, one end of which is connected to the first low potential side power supply terminal and the other end of which is connected to the second low potential side power supply terminal; A circuit device comprising:

2. 2. The circuit device according to claim 1, The switching control circuit includes: A detection circuit for detecting a current flowing through the driven object; a control circuit for controlling the switching operation based on a detection result of the detection circuit; A circuit device comprising:

3. 3. The circuit device according to claim 2, The circuit device according to claim 1, wherein the detection circuit includes a comparison circuit that compares a reference voltage with the voltage of the first low potential power supply terminal.

4. 3. The circuit device according to claim 2, the drive circuit includes a transistor that drives the driven object, the control circuit outputs a control signal for controlling the switching operation of the transistor based on a detection result of the detection circuit; The circuit device according to claim 1, wherein the switching control circuit includes a pre-driver that drives a gate of the transistor based on the control signal.

5. 3. The circuit device according to claim 2, A third low potential side power supply terminal; a second bidirectional thyristor for electrostatic protection, one end of which is connected to the third low potential side power supply terminal and the other end of which is connected to the second low potential side power supply terminal; Including, The circuit device according to claim 1, wherein the detection circuit includes a comparison circuit that compares a reference voltage with the voltage of the third low potential power supply terminal.

6. 2. The circuit device according to claim 1, A first high potential power supply terminal; A second high potential power supply terminal; a third bidirectional thyristor having one end connected to the first high potential power supply terminal and the other end connected to the second high potential power supply terminal; Including, the drive circuit is connected to the first high potential power supply terminal, The switching control circuit is connected to the second high potential power supply terminal.

7. 2. The circuit device according to claim 1, The bidirectional thyristor is a first anode region which is an impurity region of a second conductivity type provided in a first well of a first conductivity type and electrically connected to an anode line; a first cathode region which is an impurity region of a first conductivity type provided in a second well of a second conductivity type and electrically connected to a first cathode line connected to the first low potential side power supply terminal; a first gate region which is an impurity region of a second conductivity type provided in the second well and electrically connected to the first cathode line via a first resistor element; a first impurity region of a first conductivity type provided in the second well and electrically connected to the anode line via a second resistor element; a second anode region which is an impurity region of a second conductivity type provided in a first well of a first conductivity type and electrically connected to the anode line; a second cathode region which is an impurity region of the first conductivity type provided in a third well of the second conductivity type and electrically connected to a second cathode line connected to the second low potential side power supply terminal; a second impurity region of a first conductivity type provided in the third well and electrically connected to the anode line via the second resistor element; a third gate region which is an impurity region of a first conductivity type provided in the first well and electrically connected to the anode line via the second resistance element; a second gate region which is an impurity region of a second conductivity type provided in the third well and electrically connected to the second cathode line via a third resistor element.

8. A first high potential power supply terminal; A second high potential power supply terminal; a drive circuit connected to the first high potential side power supply terminal and configured to drive a drive target by a switching operation; a switching control circuit connected to the second high potential power supply terminal and controlling the switching operation of the drive circuit; a bidirectional thyristor having one end connected to the first high potential power supply terminal and the other end connected to the second high potential power supply terminal; A circuit device comprising:

9. A circuit arrangement according to any one of claims 1 to 8, The circuit device, wherein the driven object is a motor, a coil, or a solenoid.

Citation Information

Patent Citations

  • Circuit device and electronic equipment

    JP2015153937A