Chip parts

Abstract

To provide a chip part that allows capacitance to be set in a wider variety of ways.SOLUTION: A chip part A1 includes a substrate 1, a first capacitor structure 3A formed on the substrate 1, a second capacitor structure 3B formed on the substrate 1, and a first external electrode 2A and a second external electrode 2B. The first capacitor structure 3A and the second capacitor structure 3B are electrically connected in parallel to each other. The substrate 1 has a substrate main surface 11 that is perpendicular to a first direction. The second capacitor structure 3B is a planer capacitor along a substrate main surface 11. The second capacitor structure 3B includes a plurality of capacitor elements 300B electrically connected in parallel to each other and a plurality of fuse parts 429B respectively arranged between the plurality of capacitor elements 300B and the second external electrode 2B.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present disclosure relates to chip components.

Background Art

[0002] Patent Document 1 discloses a chip capacitor including a substrate, a first conductor film and a first pad film formed on the substrate, a dielectric film formed on the first conductor film, and a second conductor film formed on the dielectric film and including a second connection region and a second capacitor formation region. The first conductor film includes a first connection region and a first capacitor formation region. A first external electrode is joined to the first connection region of the first conductor film, and a second external electrode is joined to the second connection region of the second conductor film.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

[0004] [Summary] Depending on the use of the chip capacitor, the capacitance of the chip capacitor can be set in various ways.

[0005] The present disclosure has been conceived under the above circumstances, and an object thereof is to provide a chip component capable of setting the capacitance in a more diverse manner.

[0006] The chip component provided by the present disclosure includes a substrate, a first capacitor structure formed on the substrate, a second capacitor structure formed on the substrate, a first external electrode, and a second external electrode. The first capacitor structure and the second capacitor structure are electrically connected in parallel. The substrate has a substrate main surface that is perpendicular to a first direction. The second capacitor structure is a planar capacitor along the substrate main surface. The second capacitor structure includes a plurality of capacitor elements electrically connected in parallel to each other, and a plurality of fuse portions individually disposed between the plurality of capacitor elements and the second external electrode.

[0007] Other features and advantages of the present disclosure will become more apparent from the following detailed description with reference to the accompanying drawings.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

[0009] [Detailed Description] Hereinafter, preferred embodiments of the present disclosure will be specifically described with reference to the drawings.

[0010] Terms such as "first", "second", and "third" in the present disclosure are merely used for identification and are not intended to assign an order to those objects.

[0011] In the present disclosure, unless otherwise specified, "a certain object A is formed on a certain object B" and "a certain object A is formed above a certain object B" include "a certain object A is directly formed on a certain object B" and "a certain object A is formed on a certain object B with another object intervening between the certain object A and the certain object B". Similarly, unless otherwise specified, "a certain object A is disposed on a certain object B" and "a certain object A is disposed above a certain object B" include "a certain object A is directly disposed on a certain object B" and "a certain object A is disposed on a certain object B with another object intervening between the certain object A and the certain object B". Similarly, unless otherwise specified, "a certain object A is located above a certain object B" includes "a certain object A is in contact with a certain object B and a certain object A is located above a certain object B" and "a certain object A is located above a certain object B with another object intervening between the certain object A and the certain object B". Further, unless otherwise specified, "a certain object A overlaps a certain object B when viewed in a certain direction" includes "a certain object A overlaps all of a certain object B" and "a certain object A overlaps a part of a certain object B". Also, in the present disclosure, "a certain surface A faces a direction B (one side or the other side)" is not limited to the case where the angle of the surface A with respect to the direction B is 90°, and includes the case where the surface A is inclined with respect to the direction B.

[0012] Figs. 1 to 9 show a chip component according to the first embodiment of the present disclosure. Fig. 1 is a schematic perspective view of a chip component A1 of the present embodiment. Fig. 2 is a schematic exploded perspective view of the chip component A1. In Figs. 1 and 2, the longitudinal direction of the chip component A1 having a rectangular parallelepiped shape is defined as the second direction x, the width direction of the chip component A1 is defined as the third direction y, and the thickness direction of the chip component A1 is defined as the first direction z.

[0013] The chip component A1 is formed in a rectangular parallelepiped shape. The length along the second direction x may be, for example, 0.4 mm or more and 2 mm or less. The width along the third direction y may be, for example, 0.2 mm or more and 2 mm or less. The thickness along the first direction z may be, for example, 0.05 mm or more and 0.5 mm or less.

[0014] The chip component A1 may be a small electronic component referred to as, for example, a 1608 (1.6 mm × 0.8 mm) chip, a 1005 (1.0 mm × 0.5 mm) chip, a 0603 (0.6 mm × 0.3 mm) chip, a 0402 (0.4 mm × 0.2 mm) chip, a 03015 (0.3 mm × 0.15 mm) chip, etc., using the size designation (length (mm) along the second direction x × width (mm) along the third direction y).

[0015] The chip component A1 includes a substrate 1, a first external electrode 2A, and a second external electrode 2B.

[0016] The substrate 1 forms a base for the chip component A1. The chip component A1 is constituted by a plurality of insulating films and metal films laminated on each other and supported by the substrate 1. The substrate 1 has a rectangular parallelepiped shape having substantially the same size as the chip component A1. The substrate 1 has a substrate main surface 11, a substrate back surface 12, and four substrate side surfaces 13 to 16. The substrate main surface 11 is the so-called surface of the chip component A1, and the substrate back surface 12 is the back surface of the chip component A1. The four substrate side surfaces 13 to 16 surround the substrate main surface 11 in a plan view as viewed from the z direction (hereinafter simply referred to as "plan view"). The four substrate side surfaces 13 to 16 may include a substrate side surface 13 and a substrate side surface 14 that are separated from each other in the second direction x, and a substrate side surface 15 and a substrate side surface 16 that are separated from each other in the third direction y. In other words, the side surfaces that extend parallel to each other along the third direction y may be the substrate side surface 13 and the substrate side surface 14, and the side surfaces that extend parallel to each other along the second direction x may be the substrate side surface 15 and the substrate side surface 16. The substrate side surface 13, the substrate side surface 14, the substrate side surface 15, and the substrate side surface 16 may be rephrased as a first end surface, a second end surface, a third end surface, and a fourth end surface, respectively.

[0017] The first external electrode 2A and the second external electrode 2B are formed on the main surface 11 of the substrate. The first external electrode 2A and the second external electrode 2B are separated from each other in the second direction x. In this embodiment, the first external electrode 2A and the second external electrode 2B form both terminals of the chip component A1, and a current flows in the lateral direction along the main surface 11 of the substrate 1 between the first external electrode 2A and the second external electrode 2B. Therefore, the chip component A1 may be referred to as a lateral chip component. The lateral chip component A1 can be used, for example, by flip chip bonding to a mounting substrate. Also, the first external electrode 2A and the second external electrode 2B may be alternatively referred to as the first terminal electrode and the second terminal electrode, or the first external terminal and the second external terminal. The first external electrode 2A and the second external electrode 2B are formed, for example, by electroless plating.

[0018] The first external electrode 2A is formed in a region on the main surface 11 of the substrate 1, which is spaced inward from the four substrate side surfaces 13 to 16. The first external electrode 2A is formed in a rectangular shape in a plan view, with the direction along the substrate side surface 13 being the longitudinal direction. The first external electrode 2A is positioned at a distance from the substrate side surfaces 13, 14, 15, and 16 of the substrate 1. Note that the first external electrode 2A may partially cover the substrate side surfaces 13, 15, and 16 of the substrate 1 by overlapping with the substrate side surfaces 13, 15, and 16 of the substrate 1.

[0019] The second external electrode 2B is formed in a region on the main surface 11 of the substrate 1, which is spaced inward from the four substrate side surfaces 13 to 16. The second external electrode 2B is formed in a rectangular shape in a plan view, with the direction along the substrate side surface 14 being the longitudinal direction. The second external electrode 2B is positioned at a distance from the substrate side surfaces 14, 13, 15, and 16 of the substrate 1. Note that the second external electrode 2B may partially cover the substrate side surfaces 14, 15, and 16 of the substrate 1 by overlapping with the substrate side surfaces 14, 15, and 16 of the substrate 1.

[0020] FIG. 2 is a schematic exploded view of the chip component A1. FIG. 3 shows only the main elements constituting the chip component A1. Therefore, the chip component A1 may include elements other than the components shown in FIG. 3.

[0021] As shown in FIG. 2, the chip component A1 includes a substrate 1, a first capacitor structure 3A, a second capacitor structure 3B, a first electrode film 4A, a first external electrode 2A, and a second external electrode 2B. The number of each of the first capacitor structure 3A and the second capacitor structure 3B is not limited at all. The number of the first capacitor structures 3A may be one or more. The number of the second capacitor structures 3B may be one or more. In the present embodiment, the number of the first capacitor structures 3A is 2, and the number of the second capacitor structures 3B is 1. The two first capacitor structures 3A are separated from each other in the third direction y with one second capacitor structure 3B interposed therebetween.

[0022] FIG. 4 is a circuit diagram showing the chip component A1. In the chip component A1, the first capacitor structure 3A and the second capacitor structure 3B are electrically connected in parallel. In the present embodiment, two first capacitor structures 3A and one second capacitor structure 3B are electrically connected in parallel. The two first capacitor structures 3A and one second capacitor structure 3B are electrically conductive through the first external electrode 2A. Also, the two first capacitor structures 3A and one second capacitor structure 3B are electrically conductive through the second external electrode 2B.

[0023] [First Capacitor Structure 3A] On the main surface 11 of the substrate 1, a first capacitor portion 30A is formed. The first capacitor portion 30A is an area on the substrate 1 where the main part of the first capacitor structure 3A (the part having a three-layer structure of electrode-capacitance film-electrode that functions as a passive element) is formed, and may be referred to as a capacitor area. In FIGS. 2 and 3, the first capacitor portion 30A is shown as a closed area surrounded by a two-dot chain line and is clearly distinguished from the portions of the main surface 11 other than the capacitor portion. However, the first capacitor portion 30A may be defined as a portion where, for example, in a plan view, it is not clearly demarcated on the main surface 11 but can be visually recognized as the portion where the main part of the first capacitor structure 3A is arranged. The first capacitor structure 3A of the present embodiment is configured as a trench capacitor. The capacitance of the first capacitor structure 3A configured as a trench capacitor may be, for example, 100 pF or more and 1 μF or less.

[0024] Two first capacitor portions 30A are formed on both sides of the main surface 11 of the substrate 1 in the third direction y. As shown in FIG. 3, the first capacitor portion 30A may be defined as a rectangular area having a longitudinal direction along the second direction x. The first capacitor portion 30A may include a plurality of first capacitor portions 30A. The plurality of first capacitor portions 30A may be arranged adjacent to each other. In this embodiment, the first capacitor portion 30A includes a first region 301A and a second region 302A that are adjacent to each other in the second direction x.

[0025] On the main surface 11 of the substrate 1, in addition to the first capacitor portion 30A, a functional element portion including functional elements other than capacitors is formed. The functional element portion is an area on the substrate 1 where functional elements such as diodes, resistors, and inductors are formed, and may be referred to as a functional element area. As shown in FIG. 8, in this embodiment, since it is mainly a portion including diodes, the functional element portion may be referred to as a first diode portion 7A. Hereinafter, the functional element portion will be described as the first diode portion 7A.

[0026] The first diode portion 7A is formed at both ends of the main surface 11 of the substrate so as to sandwich the first capacitor portion 30A in a plan view. The first diode portion 7A may be formed at both ends of the substrate 1 in the third direction y (ends close to the substrate side surface 15 and the substrate side surface 16 respectively). The first diode portion 7A may include a plurality of first diode portions 7A. The plurality of first diode portions 7A may be arranged apart from each other via the first capacitor portion 30A. The first diode portion 7A includes a first region 71A and a second region 72A in this embodiment. The first region 71A is formed in a region between the first capacitor portion 30A and the substrate side surface 13 of the substrate 1. The second region 72A is formed in a region between the first capacitor portion 30A and the substrate side surface 14 of the substrate 1. The first region 71A and the second region 72A each extend along the substrate side surface 13 and the substrate side surface 14, and have, for example, substantially the same length as the length of the first capacitor portion 30A in the third direction y.

[0027] As shown in FIG. 8, the first capacitor structure 3A is formed on the main surface 11 of the substrate 1 and covers the first capacitor portion 30A. The first capacitor structure 3A includes a first internal electrode 31A, a first capacitance film 33A, and a second internal electrode 32A, and the first capacitance film 33A has a structure sandwiched between the second internal electrode 32A and the first internal electrode 31A in the first direction z. The first internal electrode 31A, the first capacitance film 33A, and the second internal electrode 32A may each be formed in a film shape or a plate shape. The first internal electrode 31A has a size (planar size) smaller than that of the substrate 1 and larger than that of the second internal electrode 32A. A first capacitor contact hole 510A for contact with the first internal electrode 31A is formed at the peripheral edge of the first capacitance film 33A. The first internal electrode 31A, the second internal electrode 32A, and the first capacitance film 33A are formed, for example, by a sputtering method, a CVD method, or the like.

[0028] The first electrode film 4A includes a first electrode film 41A and a second electrode film 42A. The first electrode film 41A and the second electrode film 42A are formed, for example, by a sputtering method.

[0029] The first electrode film 41A has contact portions with respect to the first internal electrode 31A and the first region 71A. The first electrode film 41A electrically connects the first external electrode 2A to the first internal electrode 31A and the first region 71A. As contact portions of the first electrode film 41A with respect to the first internal electrode 31A and the first region 71A, a lower contact portion 311A and a first diode contact portion 511A are shown, respectively. The first electrode film 41A includes a first pad 411A. The first pad 411A is a portion that conducts with the first external electrode 2A.

[0030] The second electrode film 42A has a contact portion with respect to the second region 72A. The second electrode film 42A electrically connects the second external electrode 2B to the second region 72A. In FIG. 2, as contact portions of the second electrode film 42A with respect to the second internal electrode 32A and the second region 72A, second diode contact portions 517A are shown, respectively. The second electrode film 42A includes a base portion 421A.

[0031] The base portion 421A is a portion of the second electrode film 42A to which the second external electrode 2B is connected. In FIG. 3, as a contact portion of the second external electrode 2B with respect to the second electrode film 42A, a first external contact portion 381A (a region surrounded by a two-dot chain line) is shown. The base portion 421A is formed in a substantially rectangular shape whose longitudinal direction is along the third direction y.

[0032] In the present embodiment, the second electrode film 42A and the second internal electrode 32A are integrally formed to form one layer.

[0033] The first external electrode 2A and the second external electrode 2B are formed on the first electrode film 4A. The first external electrode 2A has a first external contact portion 381A and is connected to the first electrode film 41A via the first external contact portion 381A. The second external electrode 2B has a second external contact portion 423A and is connected to the second electrode film 42A via the second external contact portion 423A.

[0034] Next, as shown in FIGS. 2, 3, 5, and 8, two first capacitor portions 30A are formed on both sides of the substrate main surface 11 of the substrate 1 in the third direction y. The portion of the substrate 1 other than the first capacitor portion 30A may be defined as the substrate main body portion 10. In this embodiment, the substrate main body portion 10 is a substantially square-ring-shaped (closed-ring-shaped) portion surrounding the first capacitor portion 30A in plan view. The substrate main body portion 10 is in a frame shape surrounding the first capacitor portion 30A and may be referred to as the frame portion of the substrate 1.

[0035] The first internal electrode 31A includes a first main body portion 315A and a first peripheral portion 316A. The first main body portion 315A is formed within the first capacitor portion 30A. The first peripheral portion 316A is integrally formed with the first main body portion 315A on the substrate main body portion 10 (the frame portion of the substrate 1) around the first capacitor portion 30A. The first peripheral portion 316A is a portion drawn out from the first main body portion 315A to the periphery of the first capacitor portion 30A and may be referred to as the lead portion of the first internal electrode 31A.

[0036] The first peripheral portion 316A may further include a plurality of separately defined portions based on the relative positional relationship with respect to the first capacitor portion 30A. The first capacitor portion 30A is surrounded by the first peripheral portion 316A as a closed region.

[0037] The first capacitive film 33A includes a second main body portion 335A and a second peripheral portion 336A. The second main body portion 335A is formed within the first capacitor portion 30A. The second peripheral portion 336A is integrally formed with the second main body portion 335A on the first peripheral portion 316A around the first capacitor portion 30A. The second peripheral portion 336A is a portion drawn out from the second main body portion 335A to the periphery of the first capacitor portion 30A and may be referred to as the lead portion of the first capacitive film 33A.

[0038] The second internal electrode 32A is formed in a shape that covers the first capacitor portion 30A. In this embodiment, the second internal electrode 32A is formed in a rectangular shape that covers the entire first capacitor portion 30A. The second internal electrode 32A integrally includes a main body portion 325A and a peripheral portion 326A. The main body portion 325A may be a portion that faces the first capacitor portion 30A in the first direction z.

[0039] The peripheral portion 326A may be a portion that is drawn out from the main body portion 325A to the periphery of the first capacitor portion 30A and surrounds the first capacitor portion 30A. In this embodiment, the first peripheral portion 316A and the second peripheral portion 336A are formed outside the peripheral portion 326A of the second internal electrode 32A in a plan view, and have a shape that further surrounds the peripheral portion 326A that surrounds the first capacitor portion 30A.

[0040] The lower contact portion 311A is a contact portion of the first electrode film 41A with respect to the first internal electrode 31A, and is formed on the first peripheral portion 316A of the first internal electrode 31A. The lower contact portion 311A may be formed in an open annular shape that surrounds the first capacitor portion 30A, with one side of the first capacitor portion 30A open and the other side blocked in the second direction x.

[0041] The first diode contact portion 511A is a contact portion of the first electrode film 41A with respect to the first region 71A. The first diode contact portion 511A overlaps the first external electrode 2A. The first diode contact portion 511A may be formed in a region below the first external electrode 2A. The first diode contact portion 511A extends along the substrate side surface 13 of the substrate 1 in the second direction x and is formed in a strip shape parallel to the substrate side surface 13.

[0042] The second diode contact portion 517A is the contact portion of the second electrode film 42A with respect to the second region 72A. The second diode contact portion 517A overlaps the second external electrode 2B. The second diode contact portion 517A may be formed in the region below the second external electrode 2B. The second diode contact portion 517A extends along the substrate side surface 14 of the substrate 1 in the second direction x and is formed in a strip shape parallel to the substrate side surface 14.

[0043] The first electrode film 41A is located on one side in the x direction of the first capacitor portion 30A.

[0044] [First capacitor portion 30A] FIG. 5 is an enlarged view of the main part including the first capacitor portion 30A of the chip component A1. FIG. 8 is a schematic cross-sectional view of the chip component A1. For clarity, in FIG. 5, the trench 112 is hatched, and the first external electrode 2A and the second external electrode 2B are shown in perspective by broken lines. Also, in FIG. 5, the components necessary for the explanation and their reference numerals are extracted and shown. Further, FIG. 8 is a diagram schematically showing the layer structure on the substrate main surface 11 of the chip component A1 and does not show the cross-section at a specific cut line in FIG. 5. However, FIG. 8 is a diagram for explaining the cross-sectional structure of the first capacitor portion 30A in FIG. 5.

[0045] The chip component A1 is a composite element in which the first capacitor structure 3A, the second capacitor structure 3B, and the first diode portion 7A are mounted on a common substrate 1. The substrate 1 may be a semiconductor substrate such as a silicon plate, or may be an insulating substrate such as a ceramic substrate or a glass substrate. The thickness of the substrate 1 may be, for example, 200 μm or more and 1000 μm or less.

[0046] In the first capacitor portion 30A, a plurality of wall portions 111 are formed using a part of the substrate 1 by selectively removing the portion on the substrate main surface 11 side of the substrate 1. Each of the plurality of wall portions 111 has a longitudinal direction and is formed in a stripe shape in plan view. The plurality of wall portions 111 are formed over the entire first capacitor portion 30A.

[0047] The first region 301A and the second region 302A are each formed and are formed adjacent to each other. In this embodiment, the first region 301A and the second region 302A are formed adjacent to each other in the second direction x. More specifically, the first region 301A is formed across the first overlap portion 313A and the intermediate portion 82A, and the second region 302A is formed across the second overlap portion 314A and the intermediate portion 82A.

[0048] In the first region 301A, a plurality of wall portions 111 are arranged at intervals in the third direction y. In the second region 302A, a plurality of wall portions 111 are arranged at intervals in the second direction x. Thereby, in each of the first region 301A and the second region 302A, the plurality of wall portions 111 are formed in a stripe shape in plan view. Note that the shape of the plurality of wall portions 111 is not limited in any way.

[0049] A plurality of trenches 112 are formed between the plurality of wall portions 111. The trench 112 is a portion where the material of the substrate 1 has been removed and is a portion partitioned by the wall portion 111. The width of the trench 112 may be, for example, 2 μm or more and 8 μm or less. The trench 112 is formed, for example, by performing dry etching on the substrate 1.

[0050] Also, in this embodiment, as shown in FIG. 8, the height of the wall portion 111 (the depth in the first direction z from the main surface 11 of the substrate to the bottom surface 1121 of the trench 112) may be 50 μm or more and 400 μm or less.

[0051] On the substrate 1, a p-type base region 113 is formed so as to be exposed from the main surface 11 of the substrate 1. In this embodiment, p-type impurities are introduced throughout the thickness direction of the substrate 1 from the main surface 11 to the back surface 12 of the substrate 1. As a result, the base region 113 is formed over the entire area of the substrate 1, and the substrate 1 is regarded as a p-type substrate. The resistivity of the substrate 1 may be about 5 mΩ·cm by the introduction of p-type impurities. This base region 113 is not selectively formed in the first diode portion 7A, but is formed over the entire substrate 1 including the first capacitor portion 30A. Therefore, the wall portion 111 and the substrate main body portion 10 of the first capacitor portion 30A are formed of the p-type base region 113.

[0052] In the first region 71A, a plurality of first impurity regions 114A are formed on the surface portion of the base region 113. The first impurity region 114A is an n-type impurity region. As shown in FIG. 5, the plurality of first impurity regions 114A are arranged at intervals in the third direction y (the direction along the substrate side surface 13 of the substrate 1). In the second region 72A, a plurality (six in FIG. 5) of second impurity regions 115A are formed on the surface portion of the base region 113. The second impurity region 115A is an n-type impurity region. The plurality of second impurity regions 115A are arranged at intervals in the third direction y (the direction along the substrate side surface 14 of the substrate 1).

[0053] The first impurity region 114A and the second impurity region 115A may be formed with the same depth and the same n-type impurity concentration. The n-type impurity concentration of each of the first impurity region 114A and the second impurity region 115A is, for example, 1.0×10 19 cm -3 or more and 1.0×10 21 cm -3 or less. The first impurity region 114A and the second impurity region 115A are both formed with the same shape and the same area in plan view. The first impurity region 114A and the second impurity region 115A extend in the third direction y in plan view and are formed in a rectangular shape (a rectangular shape with rounded corners) with the four corners cut off.

[0054] The first impurity region 114A forms a pn junction with the base region 113. A first Zener diode Di1A is formed by the pn junction of the first impurity region 114A and the base region 113. On the other hand, the second impurity region 115A forms a pn junction with the base region 113. A second Zener diode Di2A is formed by the pn junction of the second impurity region 115A and the base region 113. The first Zener diode Di1A and the second Zener diode Di2A are connected in reverse series via the base region 113. The first impurity region 114A and the second impurity region 115A are formed below the first external electrode 2A and the second external electrode 2B so as to overlap the first external electrode 2A and the second external electrode 2B in plan view, respectively. Thereby, the depletion layer extending from the pn junction of the first impurity region 114A and the base region 113 and the depletion layer extending from the pn junction of the second impurity region 115A and the base region 113 do not overlap. Therefore, a bidirectional Zener diode composed of the first Zener diode Di1A and the second Zener diode Di2A is formed on the substrate 1.

[0055] An insulating film 59 is formed on the substrate main surface 11 of the substrate 1 so as to cover the entire substrate main surface 11 of the substrate 1. The insulating film 59 is formed not only on the substrate main surface 11 which is a flat surface of the substrate 1 but also on the entire surface (upper surface 1111 and side surface 1112) of the wall portion 111. The insulating film 59 has an end surface that coincides with the substrate side surfaces 13 to 16 of the substrate 1. The insulating film 59 may be, for example, a SiO2 film or a SiN film. The thickness of the insulating film 59 may be, for example, 20,000 Å or more and 40,000 Å or less (2 μm or more and 4 μm or less). The insulating film 59 is formed, for example, by thermally oxidizing the substrate 1.

[0056] In the first capacitor section 30A, a first capacitor structure 3A is formed on this insulating film 59. The first capacitor structure 3A is formed following the upper surface 1111 and the side surface 1112 of the wall portion 111. In other words, the first capacitor structure 3A has a first internal electrode 31A that at least conforms to the uneven shape in each of the width direction and the height direction of the wall portion 111. In this embodiment, the first internal electrode 31A is formed on the insulating film 59 and is formed as an electrode film having one surface in contact with the upper surface 1111 and the side surface 1112 of the wall portion 111 and the other surface equidistant from the upper surface 1111 and the side surface 1112 of the wall portion 111. In other words, the first internal electrode 31A has a constant thickness along the upper surface 1111 and the side surface 1112 of the wall portion 111.

[0057] A first capacitance film 33A is formed on the first internal electrode 31A, and a second internal electrode 32A is formed on the first capacitance film 33A. The first main body portion 315A of the first internal electrode 31A faces the upper surface 1111 and the side surface 1112 of the wall portion 111 and the bottom surface 1121 of the trench 112 and includes a counter electrode with respect to the second internal electrode 32A. The first peripheral portion 316A of the first internal electrode 31A is drawn out from the first main body portion 315A onto the substrate main surface 11 of the substrate 1 and includes a contact portion with respect to the first external electrode 2A. Further, the first internal electrode 31A may be, for example, a semiconductor material such as polysilicon, or a metal material containing Cu or Al. In the case of a metal material, for example, it may be made of Cu, Al, AlSi, or AlCu. Also, the thickness of the first internal electrode 31A may be, for example, 1,000 Å or more and 30,000 Å or less (100 nm or more and 3000 nm or less).

[0058] The first capacitance film 33A is formed following the shape of the first internal electrode 31A and conforms to the uneven shape in each of the width direction and the height direction of the wall portion 111 and the trench 112. The first capacitance film 33A includes a second main body portion 335A that covers the first main body portion 315A of the first internal electrode 31A and a second peripheral portion 336A that covers the first peripheral portion 316A of the first internal electrode 31A. Also, the first capacitance film 33A is, for example, SiO 2It may be a film such as a SiO film or a SiN film, or a laminated film thereof. For example, a SiO 2 / SiN laminated film, a SiO 2 / SiN / SiO 2 laminated film may be used. Also, the first capacitor film 33A may be an ON film, an ONO film, or a laminated film thereof. Further, the first capacitor film 33A may be an insulating film made of a high-k material. Examples of the high-k material include aluminum oxide (Al 2 O 3 ), tantalum pentoxide (Ta 2 O 5 ), titanium pentoxide (Ti 3 O 5 ), hafnium oxide (HfO 2 ), and in addition, perovskite compounds such as strontium titanate (SrTiO 3 ), barium strontium titanate (BaxSr 1-x )TiO 3 and the like. Also, the thickness of the first capacitor film 33A may be, for example, 100 Å or more and 10,000 Å or less (10 nm or more and 1000 nm or less).

[0059] The second internal electrode 32A is embedded in the trench 112 and formed along the substrate main surface 11 of the substrate 1. The second internal electrode 32A integrally includes an embedded portion 321A embedded in the trench 112 and a flat portion 322A connected to the upper end of the embedded portion 321A and formed flat along the substrate main surface 11 of the substrate 1. The flat portion 322A forms a peripheral portion 326A of the second internal electrode 32A drawn out more outside than the first capacitor portion 30A. The flat portion 322A is integrally connected to the second electrode film 42A. Also, the second internal electrode 32A may be, for example, a semiconductor material such as polysilicon, or a metal material containing Cu or Al. In the case of a metal material, for example, it may be made of Cu, Al, AlSi, or AlCu. Also, the thickness of the second internal electrode 32A (flat portion 322A) may be, for example, 4,000 Å or more and 30,000 Å or less (400 nm or more and 3000 nm or less).

[0060] On the substrate 1, a first insulating film 58 is further formed. The first insulating film 58 covers and is laminated on the insulating film 59, the first internal electrode 31A, the first capacitor film 33A, and the second internal electrode 32A, and the third internal electrode 31B, the second capacitor film 33B, and the fourth internal electrode 32B described later. The first insulating film 58 has an end face that coincides with the substrate side faces 13 to 16 of the substrate 1. Therefore, the insulating film 59, the first insulating film 58, and the second insulating film 57 may have a laminated interface that is exposed on the extension line of the substrate side faces 13 to 16 of the substrate 1 in the cross-sectional view shown in FIG. 8. The first insulating film 58 is formed, for example, by a CVD method.

[0061] In the first insulating film 58, a first capacitor contact hole 510A for exposing the first peripheral portion 316A of the first internal electrode 31A is formed. The first capacitor contact hole 510A is also formed in the first capacitor film 33A.

[0062] Further, in the insulating film 59 and the first insulating film 58, a first diode contact hole 513A for exposing the first region 71A and a second diode contact hole 514A for exposing the second region 72A are formed. Referring to FIG. 5, the first diode contact hole 513A is formed in a strip shape whose longitudinal direction is along the third direction y, and exposes a plurality of first Zener diodes Di1A at once. The second diode contact hole 514A is formed in a strip shape whose longitudinal direction is along the third direction y, and exposes a plurality of second Zener diodes Di2A at once.

[0063] On the first insulating film 58, a first electrode film 41A and a second electrode film 42A are formed at intervals from each other.

[0064] Referring to FIG. 8, a part of the base portion 421A of the first electrode film 41A is formed in the first diode contact hole 513A as a first diode contact portion 511A and is also formed in the first capacitor contact hole 510A. A part of the first internal electrode 31A is formed in the first capacitor contact hole 510A as a lower contact portion 311A.

[0065] A part of the base portion 421A of the second electrode film 42A is formed as a second diode contact portion 517A in the second diode contact hole 514A.

[0066] In addition, as the electrode material, a material containing Al may be applied to the first electrode film 41A and the second electrode film 42A. Examples of such materials include AlCu, AlSiCu, etc., but AlCu is preferred.

[0067] On the substrate 1, a surface insulating film 56 is further formed. The surface insulating film 56 covers the first electrode film 41A and the second electrode film 42A, and the first electrode film 41B and the second electrode film 42B described later. The surface insulating film 56 may be, for example, a SiO 2 film or a SiN film. The thickness of the surface insulating film 56 may be, for example, 3000 Å or more and 30000 Å or less (0.3 μm or more and 3 μm or less). The surface insulating film 56 integrally includes a first portion 561 that covers the region on the substrate main surface 11 of the substrate 1 and a second portion 562 that covers the substrate side surfaces 13 to 16 of the substrate 1. Thereby, while the back surface 12 of the substrate 1 is the exposed surface, the entire other surface is covered by the surface insulating film 56.

[0068] A surface protection film 55 is formed on the first portion 561 of the surface insulating film 56. The surface protection film 55 may be a resin film such as a polyimide film, for example. The thickness of the surface protection film 55 may be, for example, 5,000 Å or more and 100,000 Å or less (0.5 μm or more and 10 μm or less). The surface insulating film 56 is formed by, for example, CVD method. The surface protection film 55 is formed by, for example, spraying. The surface insulating film 56 is formed by, for example, CVD method.

[0069] In the surface insulating film 56 and the surface protective film 55, first pad openings 515A are formed to expose the base portion 421A of the first electrode film 41A as first pads 411A, respectively. Also, in the surface insulating film 56 and the surface protective film 55, second pad openings 516A are formed to expose the base portion 421A of the second electrode film 42A as second pads 412A.

[0070] A first covering portion 561A that selectively covers the first pad 411A is formed on the first pad 411A. A second covering portion 562A that selectively covers the second pad 412A is formed on the second pad 412A. The first covering portion 561A and the second covering portion 562A may be made of the same material as the surface insulating film 56.

[0071] A first external electrode 2A is formed in the first pad opening 515A. The first external electrode 2A is connected to the first pad 411A as a first external contact portion 381A within the first pad opening 515A. Thereby, the first external electrode 2A is electrically connected to the first internal electrode 31A and the first impurity region 114A via the first electrode film 41A.

[0072] A second external electrode 2B is formed in the second pad opening 516A. The second external electrode 2B is connected to the second pad 412A as a second external contact portion 423A within the second pad opening 516A. Thereby, the second external electrode 2B is electrically connected to the second internal electrode 32A and the second impurity region 115A via the second electrode film 42A.

[0073] Also, the first external electrode 2A and the second external electrode 2B may be, for example, a Ni / Pd / Au laminated film including a Ni film, a Pd film, and an Au film laminated in order from the substrate 1 side. Also, these laminated films may be plating layers formed by plating growth.

[0074] [Second capacitor structure 3B] On the main surface 11 of the substrate 1, a second capacitor portion 30B is formed. The second capacitor portion 30B is a region in the substrate 1 where the main part of the second capacitor structure 3B (the portion having a three-layer structure of electrode-capacitance film-electrode that functions as a passive element) is formed, and may be referred to as a capacitor region. In FIGS. 2 and 3, the second capacitor portion 30B is shown as a closed region surrounded by a two-dot chain line, and is clearly distinguished from the portions other than the capacitor portion on the main surface 11 of the substrate. However, the second capacitor portion 30B may be defined as a portion that can be visually recognized as a portion where the main part of the second capacitor structure 3B is arranged, for example, in a plan view, although it is not clearly demarcated on the main surface 11 of the substrate. The second capacitor structure 3B of the present embodiment is configured as a planar capacitor along the main surface 11 of the substrate. The capacitance of the second capacitor structure 3B configured as a planar capacitor may be, for example, 1 pF or more and 100 pF or less.

[0075] The second capacitor portion 30B is formed substantially at the center of the main surface 11 of the substrate. As shown in FIG. 3, the second capacitor portion 30B may be defined as a rectangular region having a longitudinal direction along the second direction x.

[0076] On the main surface 11 of the substrate 1, a functional element portion is formed. As shown in FIG. 9, the functional element portion may be referred to as a second diode portion 7B. Hereinafter, the second diode portion 7B will be described. Note that the chip component A1 is not limited to a configuration having both the first diode portion 7A and the second diode portion 7B, and may have only one of the first diode portion 7A and the second diode portion 7B. Further, a configuration that does not include both the first diode portion 7A and the second diode portion 7B may be adopted.

[0077] The second diode section 7B is formed at both end portions of the main surface 11 of the substrate so as to sandwich the second capacitor section 30B in a plan view. The second diode section 7B may be formed at both end portions of the substrate 1 in the third direction y (end portions close to the substrate side surface 15 and the substrate side surface 16 respectively). The second diode section 7B may include a plurality of second diode sections 7B. The plurality of second diode sections 7B may be arranged apart from each other via the second capacitor section 30B. The second diode section 7B includes a first region 71B and a second region 72B in this embodiment. The first region 71B is formed in a region between the second capacitor section 30B and the substrate side surface 13 of the substrate 1. The second region 72B is formed in a region between the second capacitor section 30B and the substrate side surface 14 of the substrate 1. The first region 71B and the second region 72B each extend along the substrate side surface 13 and the substrate side surface 14, and have, for example, substantially the same length as the length of the second capacitor section 30B in the third direction y.

[0078] As shown in FIG. 9, the second capacitor structure 3B is formed on the main surface 11 of the substrate 1 and covers the second capacitor section 30B. The second capacitor structure 3B includes a third internal electrode 31B, a second capacitance film 33B, and a fourth internal electrode 32B, and the second capacitance film 33B has a structure sandwiched between the fourth internal electrode 32B and the third internal electrode 31B in the first direction z. The third internal electrode 31B, the second capacitance film 33B, and the fourth internal electrode 32B may each be formed in a film shape or a plate shape. The third internal electrode 31B and the second capacitance film 33B have a size (planar size) smaller than that of the substrate 1 and larger than that of the fourth internal electrode 32B. A first capacitor contact hole 510B for contact with the third internal electrode 31B is formed at the peripheral portion of the second capacitance film 33B. The third internal electrode 31B, the fourth internal electrode 32B, and the second capacitance film 33B are formed, for example, by a CVD method. In this embodiment, the first capacitance film 33A and the second capacitance film 33B are configured as one integrally formed layer.

[0079] The second electrode film 4B is formed on the second capacitor structure 3B and covers the second capacitor structure 3B. The second electrode film 4B may be formed in a conductive film shape. The second electrode film 4B includes a first electrode film 41B and a second electrode film 42B. The first electrode film 41B and the second electrode film 42B are formed, for example, by a sputtering method.

[0080] The first electrode film 41B has contact portions with respect to the third internal electrode 31B and the first region 71B. The first electrode film 41B electrically connects the first external electrode 2A to the third internal electrode 31B and the first region 71B. As contact portions of the first electrode film 41B with respect to the third internal electrode 31B and the first region 71B, a lower contact portion 311B and a first diode contact portion 511B are respectively shown. The first electrode film 41B includes a first pad 411B. The first pad 411B is a portion that conducts with the first external electrode 2A. In the present embodiment, the first electrode film 41A and the first electrode film 41B are integrally formed and connected to each other.

[0081] The second electrode film 42B has contact portions with respect to the fourth internal electrode 32B and the second region 72B. The second electrode film 42B electrically connects the second external electrode 2B to the fourth internal electrode 32B and the second region 72B. In FIG. 3, as contact portions of the second electrode film 42B with respect to the fourth internal electrode 32B and the second region 72B, second diode contact portions 517B are respectively shown. The second electrode film 42B includes a base portion 421B. In the present embodiment, the second electrode film 42A and the second electrode film 42B are integrally formed and connected to each other.

[0082] The base portion 421B is a portion of the second electrode film 42B to which the second external electrode 2B is connected. In FIG. 3, as a contact portion of the second external electrode 2B with respect to the second electrode film 42B, a first external contact portion 381B (a region surrounded by a two-dot chain line) is shown. The base portion 421B is formed in a substantially rectangular shape whose longitudinal direction is along the third direction y.

[0083] In this embodiment, the second electrode film 42B and the fourth internal electrode 32B are integrally formed to form one layer.

[0084] The first external electrode 2A and the second external electrode 2B are formed on the second electrode film 4B. The first external electrode 2A has a first external contact portion 381B and is connected to the first electrode film 41B via the first external contact portion 381B. The second external electrode 2B has a second external contact portion 423B and is connected to the second electrode film 42B via the second external contact portion 423B.

[0085] Next, as shown in FIGS. 2, 3, 5, and 9, a second capacitor portion 30B is formed substantially at the center of the substrate main surface 11 of the substrate 1. The portion of the substrate 1 other than the second capacitor portion 30B may be defined as a substrate main body portion 10. In this embodiment, the substrate main body portion 10 is a substantially square annular (closed annular) portion surrounding the second capacitor portion 30B in plan view. The substrate main body portion 10 is in a frame shape surrounding the second capacitor portion 30B and may be referred to as a frame portion of the substrate 1.

[0086] The third internal electrode 31B and the second capacitor film 33B have the same shape as each other in plan view. The third internal electrode 31B includes a first main body portion 315B and a first peripheral portion 316B. The first main body portion 315B is formed within the second capacitor portion 30B. The first peripheral portion 316B is integrally formed with the first main body portion 315B on the substrate main body portion 10 (the frame portion of the substrate 1) around the second capacitor portion 30B. The first peripheral portion 316B is a portion drawn out from the first main body portion 315B to the periphery of the second capacitor portion 30B and may be referred to as a lead-out portion of the third internal electrode 31B.

[0087] The first peripheral portion 316B may further include a plurality of separately defined portions based on the relative positional relationship with respect to the second capacitor portion 30B. The second capacitor portion 30B is surrounded by the first peripheral portion 316B as a closed region.

[0088] The second capacitance film 33B includes a second main body portion 335B and a second peripheral portion 336B. The second main body portion 335B is formed within the second capacitor portion 30B. The second peripheral portion 336B is integrally formed with the second main body portion 335B on the first peripheral portion 316B around the second capacitor portion 30B. The second peripheral portion 336B is a portion drawn out from the second main body portion 335B to the periphery of the second capacitor portion 30B, and may be referred to as the drawn-out portion of the second capacitance film 33B.

[0089] The fourth internal electrode 32B is formed in a shape covering the second capacitor portion 30B. In this embodiment, the fourth internal electrode 32B is formed in a rectangular shape covering the entire second capacitor portion 30B. The fourth internal electrode 32B integrally includes a main body portion 325B and a peripheral edge portion 326B. The main body portion 325B may be a portion facing the second capacitor portion 30B in the first direction z.

[0090] The peripheral edge portion 326B is drawn out from the main body portion 325B to the periphery of the second capacitor portion 30B and may be a portion surrounding the second capacitor portion 30B. In this embodiment, the first peripheral portion 316B and the second peripheral portion 336B are formed outside the peripheral edge portion 326B of the fourth internal electrode 32B in a plan view, and have a shape further surrounding the peripheral edge portion 326B surrounding the second capacitor portion 30B.

[0091] The lower contact portion 311B is the contact portion of the first electrode film 41B with respect to the third internal electrode 31B, and is formed on the first peripheral portion 316B of the third internal electrode 31B. The lower contact portion 311B may be formed in an open annular shape surrounding the second capacitor portion 30B, with one side of the second capacitor portion 30B open and the other side blocked in the second direction x.

[0092] The first diode contact portion 511B is a contact portion of the first electrode film 41B with respect to the first region 71B. The first diode contact portion 511B overlaps the first external electrode 2A. The first diode contact portion 511B may be formed in a region below the first external electrode 2A. The first diode contact portion 511B extends along the substrate side surface 13 of the substrate 1 in the second direction x and is formed in a strip shape parallel to the substrate side surface 13.

[0093] The second diode contact portion 517B is a contact portion of the second electrode film 42B with respect to the second region 72B. The second diode contact portion 517B overlaps the second external electrode 2B. The second diode contact portion 517B may be formed in a region below the second external electrode 2B. The second diode contact portion 517B extends along the substrate side surface 14 of the substrate 1 in the second direction x and is formed in a strip shape parallel to the substrate side surface 14.

[0094] The first electrode film 41B is located on one side in the x direction of the second capacitor portion 30B.

[0095] In the second capacitor portion 30B, the substrate main surface 11 of the substrate 1 may be, for example, in a smooth state.

[0096] The base region 113 is not selectively formed in the second diode portion 7B, but is formed over the entire substrate 1 including the second capacitor portion 30B.

[0097] In the first region 71B, a plurality of first impurity regions 114B are formed on the surface portion of the base region 113. The first impurity regions 114B are n-type impurity regions. As shown in FIG. 5, the plurality of first impurity regions 114B are arranged at intervals in the third direction y (the direction along the substrate side surface 13 of the substrate 1). In the second region 72B, a plurality (six in FIG. 5) of second impurity regions 115B are formed on the surface portion of the base region 113. The second impurity regions 115B are n-type impurity regions. The plurality of second impurity regions 115B are arranged at intervals in the third direction y (the direction along the substrate side surface 14 of the substrate 1).

[0098] The first impurity regions 114B and the second impurity regions 115B may be formed with the same depth and the same n-type impurity concentration. The n-type impurity concentration of each of the first impurity regions 114B and the second impurity regions 115B is, for example, 1.0×10 19 cm -3 or more and 1.0×10 21 cm -3 or less. The first impurity regions 114B and the second impurity regions 115B are both formed with the same shape and the same area in plan view. The first impurity regions 114B and the second impurity regions 115B extend in the third direction y in plan view and are formed in a rectangular shape (a rectangular shape with rounded corners) with the four corners cut off.

[0099] The first impurity region 114B forms a pn junction with the base region 113. A first Zener diode Di1B is formed by the pn junction of the first impurity region 114B and the base region 113. On the other hand, the second impurity region 115B forms a pn junction with the base region 113. A second Zener diode Di2B is formed by the pn junction of the second impurity region 115B and the base region 113. The first Zener diode Di1B and the second Zener diode Di2B are connected in reverse series via the base region 113. The first impurity region 114B and the second impurity region 115B are formed below the first external electrode 2A and the second external electrode 2B so as to overlap the first external electrode 2A and the second external electrode 2B in plan view, respectively. Thereby, the depletion layer extending from the pn junction of the first impurity region 114B and the base region 113 and the depletion layer extending from the pn junction of the second impurity region 115B and the base region 113 do not overlap. Therefore, a bidirectional Zener diode composed of the first Zener diode Di1B and the second Zener diode Di2B is formed on the substrate 1.

[0100] A second capacitor film 33B is formed on the third internal electrode 31B, and a fourth internal electrode 32B is formed on the second capacitor film 33B. The third internal electrode 31B may be, for example, a semiconductor material such as polysilicon, or a metal material containing Cu or Al. In the case of a metal material, for example, it may be made of Cu, Al, AlSi, or AlCu. Also, the thickness of the third internal electrode 31B may be, for example, 1,000 Å or more and 3,000 Å or less (100 nm or more and 300 nm or less).

[0101] The second capacitor film 33B is formed on the third internal electrode 31B. The second capacitor film 33B may be, for example, a SiO 2 film or a SiN film, or a laminated film thereof. For example, a SiO 2 / SiN laminated film, a SiO 2 / SiN / SiO 2It may be a laminated film. Further, the second capacitance film 33B may be an ON film or an ONO film, or may be a laminated film thereof. Furthermore, the second capacitance film 33B may be an insulating film made of a high dielectric constant material (High-k material). Examples of the high dielectric constant material include, for example, aluminum oxide (Al 2 O 3 ), tantalum pentoxide (Ta 2 O 5 ), titanium pentoxide (Ti 3 O 5 ), hafnium oxide (HfO 2 ), and in addition, strontium titanate (SrTiO 3 ), barium strontium titanate (BaxSr 1-x )TiO 3 and other perovskite compounds. Also, the thickness of the second capacitance film 33B may be, for example, 100 Å or more and 30,000 Å or less (10 nm or more and 3000 nm or less).

[0102] The fourth internal electrode 32B is formed on the second capacitance film 33B. The flat portion 322A forms the peripheral portion 326B of the fourth internal electrode 32B drawn out more outside than the second capacitor portion 30B. Also, the fourth internal electrode 32B may be, for example, a semiconductor material such as polysilicon, or may be a metal material containing Cu or Al. In the case of a metal material, for example, it may be made of Cu, Al, AlSi, or AlCu. Also, the thickness of the fourth internal electrode 32B (flat portion 322A) may be, for example, 1,000 Å or more and 30,000 Å or less (100 nm or more and 3000 nm or less).

[0103] A first capacitor contact hole 510B for exposing the first peripheral portion 316B of the third internal electrode 31B is formed in the first insulating film 58. The first capacitor contact hole 510B is also formed in the second capacitance film 33B.

[0104] In addition, in the insulating film 59 and the first insulating film 58, a first diode contact hole 513B for exposing the first region 71B and a second diode contact hole 514B for exposing the second region 72B are further formed. Referring to FIG. 5, the first diode contact hole 513B is formed in a strip shape whose longitudinal direction is along the third direction y, and exposes a plurality of first Zener diodes Di1B at once. The second diode contact hole 514B is formed in a strip shape whose longitudinal direction is along the third direction y, and exposes a plurality of second Zener diodes Di2B at once.

[0105] On the first insulating film 58, a first electrode film 41B and a second electrode film 42B are formed with a space therebetween.

[0106] Referring to FIG. 9, a part of the base portion 421B of the first electrode film 41B is formed in the first diode contact hole 513B as the first diode contact portion 511B and is also formed in the first capacitor contact hole 510B. A part of the third internal electrode 31B is formed in the first capacitor contact hole 510B as the lower contact portion 311B.

[0107] A part of the base portion 421B of the second electrode film 42B is formed in the second diode contact hole 514B as the second diode contact portion 517B.

[0108] In addition, for the first electrode film 41B and the second electrode film 42B, a material containing Al may be applied as the electrode material. Examples of such materials include AlCu, AlSiCu, etc., but AlCu is preferred.

[0109] In the surface insulating film 56 and the surface protective film 55, a first pad opening 515B for exposing the base portion 421B of the first electrode film 41B as the first pad 411B is formed. Also, in the surface insulating film 56 and the surface protective film 55, a second pad opening 516B for exposing the base portion 421B of the second electrode film 42B as the second pad 412B is formed.

[0110] A first covering portion 561B that selectively covers the first pad 411B is formed on the first pad 411B. A second covering portion 562B that selectively covers the second pad 412B is formed on the second pad 412B. The first covering portion 561B and the second covering portion 562B may be made of the same material as the surface insulating film 56.

[0111] A first external electrode 2A is formed in the first pad opening 515B. The first external electrode 2A is connected to the first pad 411B as a first external contact portion 381B within the first pad opening 515B. Thereby, the first external electrode 2A is electrically connected to the third internal electrode 31B and the first impurity region 114B via the first electrode film 41B.

[0112] A second external electrode 2B is formed in the second pad opening 516B. The second external electrode 2B is connected to the second pad 412B as a second external contact portion 423B within the second pad opening 516B. Thereby, the second external electrode 2B is electrically connected to the fourth internal electrode 32B and the second impurity region 115B via the second electrode film 42B.

[0113] As shown in FIGS. 6, 7, and 9, the second capacitor structure 3B includes a plurality of capacitor elements 300B. The plurality of capacitor elements 300B are electrically connected in parallel to each other. The capacitance of each of the plurality of capacitor elements 300B is not limited in any way. The capacitances of the plurality of capacitor elements 300B may be the same as each other or different from each other. In the present embodiment, the capacitances of the plurality of capacitor elements 300B are different from each other. When the capacitances of the plurality of capacitor elements 300B are arranged in order of magnitude, the capacitance of adjacent capacitor elements 300B may be an integer multiple such as 2 times.

[0114] The second electrode film 42B and the fourth internal electrode 32B of the present embodiment are integrally formed and form one layer.

[0115] In this embodiment, the fourth internal electrode 32B includes a plurality of individual portions 321B. The plurality of individual portions 321B are formed corresponding to the plurality of capacitor elements 300B, and each is a component of the capacitor element 300B. The plurality of individual portions 321B are integrally connected to the base portion 421B of the second electrode film 42B. In this embodiment, the capacitance of each of the plurality of capacitor elements 300B can be defined by the area of the plurality of individual portions 321B. That is, when the areas of the plurality of individual portions 321B are arranged in descending order, the areas of adjacent individual portions 321B may be an integral multiple, such as twice, of each other.

[0116] The second electrode film 42B includes a plurality of fuse portions 429B. The plurality of fuse portions 429B are individually disposed between the plurality of capacitor elements 300B and the second external electrode 2B. In other words, the plurality of fuse portions 429B are electrically individually interposed between the plurality of capacitor elements 300B and the second external electrode 2B. Each fuse portion 429B is a locally constricted portion in the second electrode film 42B in a plan view. In the illustrated example, the fuse portion 429B has a smaller dimension in the third direction y than the individual portion 321B and the base portion 421B. Also, a plurality of fuse portions 429B may be interposed between one individual portion 321B and the base portion 421B. The fuse portion 429B can be cut, for example, by laser irradiation during the manufacture of the chip component A1. The individual portion 321B (capacitor element 300B) where the fuse portion 429B is cut becomes a portion that is disconnected from the second external electrode 2B and does not contribute to the capacitance of the second capacitor structure 3B.

[0117] In this embodiment, the first internal electrode 31A and the third internal electrode 31B have the same material and thickness as each other. The second internal electrode 32A and the fourth internal electrode 32B have the same material and thickness as each other. The first capacitance film 33A and the second capacitance film 33B have the same material and thickness as each other. The first electrode film 41A and the first electrode film 41B have the same material and thickness as each other. The second electrode film 42A and the second electrode film 42B have the same material and thickness as each other.

[0118] Next, the operation of the chip component A1 will be described.

[0119] The chip component A1 includes a first capacitor structure 3A and a second capacitor structure 3B. Therefore, compared with the case where a chip component corresponding to the first capacitor structure 3A and another chip component corresponding to the second capacitor structure 3B are separately prepared and mounted on a circuit board or the like, the mounting area can be reduced. Also, there is no need to provide wiring or the like for electrically connecting the first capacitor structure 3A and the second capacitor structure 3B.

[0120] Examples of the use of the chip component A1 include noise removal in the power supply line of a high-frequency circuit. In order to achieve sufficient charge and discharge in noise removal, the chip capacitor capacitance is desirably several hundred pF to several nF. Also, in order to remove noise of a high-frequency signal of several hundred MHz or more, a capacitor with a relatively small capacitance and a resonance frequency close to the desired frequency for removing noise is desired. The chip component A1 includes a first capacitor structure 3A and a second capacitor structure 3B. By being able to individually set the configurations of the first capacitor structure 3A and the second capacitor structure 3B, it is possible to more accurately achieve the specifications required for the chip component A1.

[0121] By using a trench capacitor as the first capacitor structure 3A, the capacitance of the first capacitor structure 3A can be surely increased. By using a planar capacitor as the second capacitor structure 3B, the capacitance is smaller than that of the first capacitor structure 3A, and the capacitance can be set more accurately to a desired value. Also, by appropriately setting the configurations of the plurality of wall portions 111 and the plurality of trenches 112 of the trench capacitor constituting the first capacitor structure 3A, the series resistance component of the first capacitor structure 3A can be reduced.

[0122] By providing the large-capacity first capacitor structure 3A, even if the second capacitance film 33B of the second capacitor structure 3B is made thin, the electrostatic withstand voltage of the second capacitor structure 3B can be ensured.

[0123] By using a planar capacitor as the second capacitor structure 3B, it is possible to reduce the inductance component and the resistance component of the second capacitor structure 3B. Since the first capacitor structure 3A and the second capacitor structure 3B are electrically connected in parallel, even if the inductance component and the resistance component of the first capacitor structure 3A increase, an increase in the inductance component and the resistance component of the entire chip component A1 can be suppressed.

[0124] The second capacitor structure 3B includes a plurality of capacitor elements 300B. The plurality of capacitor elements 300B can arbitrarily cut off the conduction with the second external electrode 2B by cutting the fuse portion 429B. Thereby, it is possible to more precisely set the capacitance of the second capacitor structure 3B, which is preferable for high-frequency signal noise removal.

[0125] When the capacitances of the plurality of capacitor elements 300B are arranged in descending order of magnitude, if the capacitances of adjacent capacitor elements 300B are integer multiples such as 2 times, for example, the capacitances of the plurality of capacitor elements 300B have a configuration such as 1:2:4:8:16:32: ···. Thereby, by appropriately selecting the capacitor element 300B that cuts off the conduction with the second external electrode 2B, more diverse capacitance values can be set more accurately.

[0126] In this embodiment, the first internal electrode 31A and the third internal electrode 31B have the same material and thickness as each other. As a result, in the manufacturing method of the chip component A1, the first internal electrode 31A and the third internal electrode 31B can be formed in the same process. Also, the second internal electrode 32A and the fourth internal electrode 32B have the same material and thickness as each other. As a result, in the manufacturing method of the chip component A1, the second internal electrode 32A and the fourth internal electrode 32B can be formed in the same process. Also, the first capacitive film 33A and the second capacitive film 33B have the same material and thickness as each other. As a result, in the manufacturing method of the chip component A1, the first capacitive film 33A and the second capacitive film 33B can be formed in the same process. Also, the first electrode film 41A and the first electrode film 41B have the same material and thickness as each other. As a result, in the manufacturing method of the chip component A1, the first electrode film 41A and the first electrode film 41B can be formed in the same process. Also, the second electrode film 42A and the second electrode film 42B have the same material and thickness as each other. As a result, in the manufacturing method of the chip component A1, the second electrode film 42A and the second electrode film 42B can be formed in the same process.

[0127] FIG. 10 and FIG. 11 show modified examples and the like of the present disclosure. In these figures, elements that are the same as or similar to those in the above embodiment are denoted by the same reference numerals as in the above embodiment. Also, the configurations of the respective parts in each modified example and each embodiment can be appropriately combined with each other within a range that does not cause a technical contradiction.

[0128] FIG. 10 shows a first modified example of the chip component A1. The chip component A11 of this modified example includes one first capacitor structure 3A and one second capacitor structure 3B.

[0129] The first capacitor structure 3A and the second capacitor structure 3B are arranged in the third direction y. Also in this modified example, the first capacitor structure 3A and the second capacitor structure 3B are electrically connected in parallel. The first capacitor structure 3A and the second capacitor structure 3B are electrically conductive through the first external electrode 2A. The first capacitor structure 3A and the second capacitor structure 3B are electrically conductive through the second external electrode 2B.

[0130] As can be understood from this modified example, the number of each of the second capacitor structures 3B is not limited in any way.

[0131] FIG. 11 shows a second modified example of the chip component A1. In the chip component A12 of this modified example, the configuration of the first capacitor structure 3A is different from that of the above-described example.

[0132] The first capacitor structure 3A of this modified example is configured as a planar capacitor similar to the second capacitor structure 3B. The capacitance of the first capacitor structure 3A is larger than the capacitance of the second capacitor structure 3B.

[0133] As can be understood from this modified example, the first capacitor structure 3A may be a trench capacitor or a planar capacitor.

[0134] The chip component according to the present disclosure is not limited to the above-described embodiments. The specific configuration of each part of the chip component according to the present disclosure can be freely designed in various ways.

[0135] [Appendix 1] A substrate (1), a first capacitor structure (3A) formed on the substrate (1), a second capacitor structure (3B) formed on the substrate (1), a first external electrode (2A) and a second external electrode (2B), and the first capacitor structure (3A) and the second capacitor structure (3B) are electrically connected in parallel, The substrate (1) has a substrate main surface (11) that is perpendicular to the first direction. The second capacitor structure (3B) is a planar capacitor along the substrate main surface (11). The second capacitor structure (3B) includes a plurality of capacitor elements (300B) electrically connected in parallel to each other, and a plurality of fuse portions (429B) individually disposed between the plurality of capacitor elements (300B) and the second external electrode (2B), and is a chip component (A1). [Appendix 2] The chip component (A1) according to Appendix 1, wherein the capacitance of the first capacitor structure (3A) is larger than the capacitance of the second capacitor structure (3B). [Appendix 3] The chip component (A1) according to Appendix 2, wherein the first capacitor structure (3A) is a trench capacitor. [Appendix 4] The chip component (A1) according to any one of Appendices 1 to 3, wherein the substrate (1) includes a semiconductor. [Appendix 5] The chip component (A1) according to Appendix 4, wherein the substrate (1) includes silicon. [Appendix 6] The second capacitor structure (3B) includes a third internal electrode (31B) and a fourth internal electrode (32B), a second capacitance film (33B) interposed between the third internal electrode (31B) and the fourth internal electrode (32B), and a second electrode film (42B) electrically connected to the fourth internal electrode (32B), and is the chip component (A1) according to any one of Appendices 1 to 5. [Appendix 7] The second electrode film (42B) includes a base portion (421B), a plurality of second extending portions (422B) corresponding to the plurality of capacitor elements, and the plurality of fuse portions (429B) individually interposed between the 421B and the plurality of second extending portions (422B), and is the chip component (A1) according to Appendix 6. [Appendix 8] The fourth internal electrode (32B) includes a plurality of individual portions (321B) individually corresponding to the plurality of second extending portions (422B), and is the chip component (A1) according to Appendix 7. [Supplementary Note 9] The plurality of second extending portions (422B) and the plurality of individual portions (321B) are the chip component (A1) described in Supplementary Note 8, in which at least some of each other overlap individually in a plan view. [Supplementary Note 10] The first capacitor structure (3A) includes a first internal electrode (31A), a second internal electrode (32A), and a first capacitance film (33A) interposed between the first internal electrode (31A) and the second internal electrode (32A), and is the chip component (A1) described in any one of Supplementary Notes 6 to 9. [Supplementary Note 11] The material of the first internal electrode (31A) and the material of the third internal electrode (31B) are the same, and are the chip component (A1) described in Supplementary Note 10. [Supplementary Note 12] The material of the second internal electrode (32A) and the material of the fourth internal electrode (32B) are the same, and are the chip component (A1) described in Supplementary Note 10 or 11. [Supplementary Note 13] The material of the first capacitance film (33A) and the material of the second capacitance film (33B) are the same, and are the chip component (A1) described in any one of Supplementary Notes 10 to 12. [Supplementary Note 14] The first capacitor structure (3A) and the second capacitor structure (3B) are electrically connected via the second external electrode (2B), and are the chip component (A1) described in any one of Supplementary Notes 11 to 13. [Supplementary Note 15] In a plan view, the chip component (A1) described in any one of Supplementary Notes 1 to 14 includes two first capacitor structures (3A) located on both sides with the second capacitor structure (3B) interposed therebetween.

Explanation of Reference Numerals

[0136] 1: Substrate 2A: First external electrode 2B: Second external electrode 3A: First capacitor structure 3B: Second capacitor structure 4A: First electrode film 4B: Second electrode film 7A: First Diode Section 7B: Second Diode Section 10: Substrate Body Section 11: Substrate Main Surface 12, 13, 14, 15, 16: Substrate Side Surfaces 30A: First Capacitor Section 30B: Second Capacitor Section 31A: First Internal Electrode 31B: Third Internal Electrode 32A: Second Internal Electrode 32B: Fourth Internal Electrode 33A: First Capacitance Film 33B: Second Capacitance Film 41A, 41B: First Electrode Film 42A, 42B: Second Electrode Film 55: Surface Protection Film 56: Surface Insulation Film 57: Second Insulation Film 58: First Insulation Film 59: Insulation Film 71A, 71B: First Region 72A, 72B: Second Region 82A: Intermediate Section 111: Wall Section 112: Trench 113: Base Region 114A, 114B: First Impurity Region 115A, 115B: Second Impurity Region 300B: Capacitor Element 301A: First Region 302A: Second Region 311A, 311B: Lower Contact Section 313A: First Overlap Section 314A: Second Overlap Section 315A, 315B: First Main Body Section 316A, 316B: First Peripheral Section 321A: Embedded Section 321B: Individual Section 322A: Flat Section 325A, 325B: Main Body Section 326A, 326B: Peripheral part 335A, 335B: Second main body part 336A, 336B: Second surrounding part 381A, 381B: First external contact part 411A, 411B: First pad 412A, 412B: Second pad 421A, 421B: Base part 423A, 423B: Second external contact part 429B: Fuse part 510A, 510B: First capacitor contact hole 511A, 511B: First diode contact part 512A, 512B: Second capacitor contact hole 513A, 513B: First diode contact hole 514A, 514B: Second diode contact hole 515A, 515B: First pad opening 516A, 516B: Second pad opening 517A, 517B: Second diode contact part 561: First part 561A, 561B: First covering part 562: Second part 562A, 562B: Second covering part 811A, 811B: Upper contact part 1111: Top surface 1112: Side surface 1121: Bottom surface A1: Chip component Di1A, Di1B: First Zener diode Di2A, Di2B: Second Zener diode x: Second direction y: Third direction z: First direction

Claims

1. A substrate; a first capacitor structure formed on the substrate; a second capacitor structure formed on the substrate; A first external electrode and a second external electrode, the first capacitor structure and the second capacitor structure are electrically connected in parallel; the substrate has a substrate main surface perpendicular to a first direction; the second capacitor structure being a planar capacitor along the major surface of the substrate; A chip component, wherein the second capacitor structure includes a plurality of capacitor elements electrically connected in parallel to each other, and a plurality of fuse portions individually arranged between the plurality of capacitor elements and the second external electrode.

2. The chip component according to claim 1 , wherein the capacitance of the first capacitor structure is greater than the capacitance of the second capacitor structure.

3. The chip component according to claim 2 , wherein the first capacitor structure is a trench capacitor.

4. The chip component according to claim 1 , wherein the substrate includes a semiconductor.

5. The chip component according to claim 4 , wherein the substrate includes silicon.

6. 2. The chip component according to claim 1, wherein the second capacitor structure includes a third internal electrode and a fourth internal electrode, a second capacitance film interposed between the third internal electrode and the fourth internal electrode, and a second electrode film conductive to the fourth internal electrode.

7. The chip component described in claim 6, wherein the second electrode film includes a base portion, a plurality of second extension portions corresponding to the plurality of capacitor elements, and the plurality of fuse portions individually interposed between the 421B and the plurality of second extension portions.

8. The chip part according to claim 7 , wherein the fourth internal electrode includes a plurality of individual portions individually corresponding to the plurality of second extension portions.

9. The chip part according to claim 8 , wherein the second extension portions and the individual portions individually overlap at least partially with each other when viewed from above.

10. 7. The chip part according to claim 6, wherein the first capacitor structure includes a first internal electrode, a second internal electrode, and a first capacitance film interposed between the first internal electrode and the second internal electrode.

11. The chip part according to claim 10 , wherein the first internal electrode and the third internal electrode are made of the same material.

12. 12. The chip part according to claim 10, wherein the second internal electrode and the fourth internal electrode are made of the same material.

13. The chip part according to claim 10 , wherein the first capacitive film and the second capacitive film are made of the same material.

14. The chip part according to claim 11 , wherein the first capacitor structure and the second capacitor structure are electrically connected to each other via the second external electrode.

15. The chip part according to claim 1 , further comprising: two first capacitor structures located on either side of the second capacitor structure in a plan view.

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