Circuit and method for adjusting conduction period for energy-recycling circuit

Abstract

To provide a circuit and method for determining a conduction period for an energy-recycling circuit.SOLUTION: A circuit for determining a conduction period for an energy-recycling circuit includes: an indication circuit, which is coupled to an inductor of the energy-recycling circuit to receive an inductor voltage, and configured to generate an indication signal according to the inductor voltage, where the indication signal reflects a status corresponding to a first conduction period of the energy-recycling circuit; and a control signal generator, which is coupled to a switch of the energy-recycling circuit, and configured to generate a control signal with a second conduction period for the switch according to the indication signal. The energy-recycling circuit is coupled to a first capacitive component and a second capacitive component. The energy-recycling circuit comprises the inductor and the switch coupled between the first capacitive component and the second capacitive component. The control signal generator determines the second conduction period according to the first conduction period and the indication signal.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] This application relates to a circuit and method for determining a conduction period for an energy recycling circuit.

Background Art

[0002] Unless otherwise stated in this specification, the approaches described in this section are not prior art to the claims of this application and are not admitted to be prior art by inclusion in this section.

[0003] Energy recycling circuits that utilize LC oscillation have the advantage of reducing power consumption and have been used in drive circuits for driving capacitive loads, particularly when voltage conversion is desirable (see, for example, U.S. Patent No. 11,057,692, Application No. 18 / 396,678, and Patent No. 12,107,546). An energy recycling circuit basically includes an inductor and a switch coupled between a first capacitive component and a second capacitive component having a specific capacitance. During the conduction period, the energy recycling circuit forms a current from one capacitive component to another to recycle the electrical energy stored in one capacitive component.

[0004] During the conduction period, the magnitude of the current decreases and may eventually return to zero if the conduction period is long enough. If the conduction period is too long, reverse current will occur due to the characteristics of LC oscillation.

[0005] The conduction period should not be too short. If it is too short, residual charge (electrical energy) that may not be fully recycled may occur. On the other hand, the conduction period should not be too long. If it is too long, as described above, undesirable reverse current will occur. Therefore, determining the conduction period for energy recycling is an important issue.

[0006] Furthermore, in some application scenarios, since the magnitude of its capacity is not constant, determining the conduction period becomes even more difficult.

[0007] Therefore, how to determine the conduction period of the energy recycling circuit is an important goal in this field.

Summary of the Invention

[0008] Therefore, the first object of this application is to provide a circuit and a method for determining the conduction period for an energy recycling circuit.

[0009] Embodiments of the present invention disclose a period determination circuit for determining the conduction period of an energy recycling circuit. The period determination circuit is an indication circuit coupled to the inductor of the energy recycling circuit to receive the inductor voltage and configured to generate an indication signal according to the inductor voltage. The indication signal reflects a state corresponding to the first conduction period of the energy recycling circuit. The period determination circuit includes a control signal generator coupled to the switch of the energy recycling circuit and configured to generate a control signal having a second conduction period for the switch according to the indication signal. The energy recycling circuit is coupled to a first capacitive component and a second capacitive component. The energy recycling circuit includes an inductor and a switch coupled between the first capacitive component and the second capacitive component. The control signal generator determines the second conduction period according to the first conduction period and the indication signal.

[0010] Other embodiments of the present invention disclose a period determination method for determining the conduction period of an energy recycling circuit. The period determination method includes receiving an inductor voltage corresponding to an inductor of the energy recycling circuit, generating an indication signal that reflects a state corresponding to a first conduction period of the energy recycling circuit according to the inductor voltage, determining a second conduction period according to the first conduction period and the indication signal, and generating a control signal having a second conduction period for a switch of the energy recycling circuit according to the indication signal. The energy recycling circuit is coupled to a first capacitive component and a second capacitive component, and the energy recycling circuit has an inductor and a switch coupled between the first capacitive component and the second capacitive component.

[0011] These and other objects of the present invention will become apparent to those skilled in the art after reading the following detailed description of the preferred embodiments shown in the various figures and drawings.

Brief Description of the Drawings

[0012]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Embodiments for Carrying out the Invention

[0013] FIG. 1 is a schematic diagram of a period determination circuit 20 coupled to an energy recycling circuit 10 according to an embodiment of the present application. The energy recycling circuit 10 basically includes an inductor L and a switch SW connected between a first capacitive component C1 and a second capacitive component C2. The capacitive component may be a capacitor or a component having a certain capacitance, and C1 / C2 may represent their capacitances.

[0014] The period determination circuit 20 is configured to generate a control signal (also denoted as SW) to the switch SW of the energy recycling circuit 10. That is, the period determination circuit 20 determines the conduction period T of the switch SW or the energy recycling circuit 10 via the control signal SW. on to determine.

[0015] In the present application, the switch and the related control signal share the same notation. Further, the node (in the circuit) and the related voltage also share the same notation.

[0016] When the switch SW is turned on and conducts, the energy recycling circuit 10 starts LC oscillation. The (first) voltage V corresponding to the first capacitive component C1 c1 is greater than the (second) voltage V corresponding to the second capacitive component C2 c2 That is, assuming V c1 > V c2 At the first position (the first moment when the switch SW is turned on), an inductor current I is formed from C1 to C2 L As the remaining switch SW is turned on, the magnitude of the inductor current I L gradually decreases to 0, and then the inductor current I LThe current direction is reversed.

[0017] The purpose of the period determination circuit 20 is to determine or adaptively adjust the conduction period T on as optimally as possible. In an embodiment, the optimal conduction period T on is the longest period until the inductor current reverses. If the conduction period is too short, it may mean that there is residual charge remaining in C1 at the end of the conduction period. If the conduction period is too long, it may mean that the switch SW is turned off after the reversal of the inductor current has occurred.

[0018] The period determination circuit 20 includes an instruction circuit 200 and a control signal generator 202. The instruction circuit 200 is connected to the inductor L of the energy recycling circuit 10 and receives the inductor voltage V L from the inductor L. The control signal generator 202 generates a control signal SW for the switch SW.

[0019] The instruction circuit 200 is configured to generate an instruction signal IDS according to the inductor voltage V L and the instruction signal IDS reflects the state corresponding to the current (first) conduction period shown as T on,n in the energy recycling circuit 10, and T on,n can represent the conduction period corresponding to the nth energy recycling operation. In an embodiment, the instruction signal IDS can indicate whether the current conduction period T on,n is too short or too long.

[0020] The control signal generator 202 is configured to generate a control signal SW having the next (second) conduction period T on,n+1 of the switch SW according to the instruction signal IDS. Here, T on,n+1 may be the conduction period corresponding to the (n + 1)th energy recycling operation following the nth energy recycling operation.

[0021] In an embodiment, when the instruction signal IDS indicates that the current conduction period T on,nIf it indicates that T is too short, the control signal generator 202 adjusts the conduction period so that T on,n+1 >T on,n Specifically, it may increase the conduction period T on,n to make T on,n+1 >T on,n and generate a control signal SW with an increased conduction period T on,n+1 On the other hand, if the indication signal IDS indicates that the current conduction period T on,n is too long, the control signal generator 202 adjusts the conduction period so that T on,n+1 < Ton,n Specifically, it may decrease the conduction period T on+1 <T on,n and generate a control signal SW with a decreased conduction period T on,n+1

[0022] FIG. 2 shows the voltage V on when the conduction period T c1 , V c2 and the inductor current I L and the inductor voltage V L related to the control signal SW. In FIG. 2, the inductor current I L from C1 to C2 is regarded as positive. In FIG. 2(a), at the start of the conduction period T on , V c2 >V c1 , the inductor current flows from C2 to C1, and I L is negative. When the switch is coupled between the inductor L and the first capacitive component C1, if the conduction period T on is too short, when the switch SW is turned off (shown as t off in FIG. 2), a small residual inductor current flows to the node indicated as V L from C2. Note that the node V L has a parasitic capacitance much smaller than C1, and the inductor current at time t off causes a high / positive voltage spike at the node or the inductor voltage V L as shown in FIG. 2(a).

[0023] Similarly, in FIG. 2(b), for the conduction period T​on , V c2 <V c1 At the start of, the inductor current flows from C1 to C2, and I L is positive. During the conduction period T on If it is too short, during the time t off when the switch SW is turned off, the positive residual inductor current causes a low / negative voltage spike in V L as shown in Fig. 2(b).

[0024] On the other hand, Fig. 3 shows that the conduction period T on of the inductor current I L and the inductor voltage V L are too long, where t off > t rev Here, t off is the switch-off time, and t rev is the inductor current recovery time (the time when the magnitude of the inductor current returns to 0). Fig. 3(a) shows the case where the inductor current I L from C2 to C1 is V c2 > V c1 , i.e., it becomes negative at the start of the conduction period Ton. Fig. 3(b) shows the case where the inductor current I L from C1 to C2 is V c1 > V c2 , i.e., it becomes positive at the start of the conduction period T on .

[0025] As shown in Fig. 3(a), the positive reverse inductor current I L causes a negative spike in the inductor voltage V off at time t L . As shown in Fig. 3(b), the negative reverse inductor current I L causes a positive spike in the inductor voltage V off at time t L .

[0026] From Figs. 2 and 3, whether the conduction period T on is too short or too long can be inferred according to the behavior of the voltages V c1 , V c2 and V L .

[0027] Figure 4 shows a period determination circuit 34 connected to an energy recycling circuit 10 (which is part of a modulation signal generator 30 described later) according to an embodiment of the present application. The interconnection between circuits 10 and 34 is omitted for simplicity. The conduction period T of the energy recycling circuit on The period determination circuit 34 configured to determine is connected to capacitive components C1, C2, and inductor L, and receives the voltage V corresponding to C1 c1 , the voltage V corresponding to C2 c2 and the inductor voltage V L .

[0028] Furthermore, the period determination circuit 34 can include an instruction circuit 340 and a control signal generator 342. The instruction circuit 340 may generate an instruction signal IDS indicating that V off is too short when the spike is in the positive direction at time t c1 >V c2 , or when the spike is in the negative direction at time t off and V c1 <V c2 . On the other hand, the instruction circuit 340 may generate an instruction signal IDS indicating that the current (first) conduction period T c2 is too long when the spike is in the negative direction at time t off and V c1 >V c2 , or when the spike is in the positive direction at time t off and V c1 <V c2 and V c1 is in the negative direction. Note that the time t on,n when the switch is turned off corresponds to the spike time or the time when the spike reaches its peak. off

[0029] Similar to 202, when the control signal generator 342 receives an instruction signal IDS indicating that the current conduction period T on,n is too short, the control signal generator 342 sets a longer conduction period T on,n+1 >T on,n such that T on,n+1 ​Generate a control signal SW including, and when the control signal generator 342 receives an indication signal IDS indicating that the current conduction period T on,n is too long, then T on,n+1 <T on,n Generate a control signal SW including the shortened conduction period T on,n+1 which is.

[0030] FIG. 5 is a schematic diagram of an indication circuit 31 according to an embodiment of the present application. The indication circuit 31 can be used to implement the indication circuit 340. The indication circuit 31 can include a spike detection circuit 310, a comparator 312, and a logic circuit 314. The spike detection circuit 310 is configured to detect whether a spike occurs and determine the polarity of the spike when a spike occurs. The comparator 312 is configured to compare V c1 and V c2 . The logic circuit 314 generates an indication signal IDS according to the detection result generated by the spike detection circuit 310 and the comparison result generated by the comparator 312.

[0031] Based on the observations from FIGS. 2 and 3, the period determination circuit 34 is suitable for an energy recycling circuit arranged in a drive circuit configured to drive an air pulse generation (APG) device to generate ultrasonic air pressure fluctuations amplitude-modulated at an ultrasonic carrier frequency (see U.S. Patent No. 12,075,213). That is, the period determination circuit 34 is coupled / applied to the modulation signal generator disclosed in Patent Application No. 18 / 396,678 or the energy recycling circuit in the drive circuit disclosed in U.S. Patent No. 12,107,546, and can generate a modulation drive signal SM or a carrier-suppressed generalized double-sideband (DSB-SC) signal.

[0032] Specifically, FIG. 6 shows a schematic diagram of a capacitive component C1 or an APG device according to an embodiment of the present application. The capacitive component C1 or the APG device can include a film structure 11. The film structure 11 includes a flap pair 102, and the flap pair 102 includes flaps 101 and 103. In the embodiment shown in FIG. 6, the flap pair 102 is driven by a modulation drive signal SM to perform a common mode motion, and is driven by a demodulation drive signal ±SV to perform a differential mode motion, thereby realizing a collocation of modulation and demodulation or in-situ modulation and demodulation, which means that both modulation and demodulation can be performed at the same part / position of the film structure.

[0033] Furthermore, the capacitive component C1 or the APG device can include an actuator 101A disposed on the flap 101 and an actuator 103A disposed on the flap 103. Each of the actuators 101A and 103A can include a piezoelectric material such as PZT (Lead Zirconate Titanate) sandwiched between an upper electrode and a lower electrode.

[0034] Details of the operating principle of the APG device are taught in U.S. Patent No. 12,075,213 and are omitted here for brevity. Briefly, the timing circuit 34 may be coupled to a drive circuit that generates the modulation drive signal SM.

[0035] On the other hand, the timing circuit of the present application may be coupled / applied to an energy recycling circuit in a demodulation signal generator disclosed in U.S. Patent Application No. 18 / 396,678 that generates the demodulation drive signal ±SV.

[0036] For example, FIG. 7 shows a timing circuit 44 coupled to an energy recycling circuit 42 which is a part of a demodulation signal generator 40 according to an embodiment of the present application. The timing circuit 44 includes an instruction circuit 440 and a control signal generator 442. Generally, the instruction circuit 440 is an inductor voltage V Lxand receives a control signal SWx and generates an instruction signal IDS accordingly. The control signal generator 442 generates a control signal for the switch SWx when x = 1 or 2. Here too, the interconnection between the energy recycling circuit 42 and the period determination circuit 44 is omitted for simplicity.

[0037] The demodulation signal generator 40 (energy recycling circuit 42) is configured to generate a demodulated drive signal ±SV as taught in U.S. Patent Application No. 18 / 396,678. The demodulation signal generator 40 further includes a period determination circuit 44 configured to generate control signals SW1 and SW2 for switches SW1 and SW2 within the energy recycling circuit 42, which is different from U.S. Patent Application No. 18 / 396,678.

[0038] In FIG. 7, the first capacitive component C1 coupled to the energy recycling circuit 42 may be the actuator 101A disposed on the flap 101, and the second capacitive component C2 coupled to the energy recycling circuit 42 may be the actuator 103A disposed on the flap 103.

[0039] FIG. 8 shows the voltages V c1 , V c2 , the control signals SW1 and SW2, the inductor current IL, and the inductor voltages V L1 and V L2 . The waveforms shown in FIG. 8 are obtained from simulations or experiments. Specifically, FIG. 8(a) shows the waveforms of the control signals SW1 and SW2 at a plurality of off-times t off,2 , and FIG. 8(b) shows the waveform of the inductor voltage V off,2 responding to the control signal SW2 at various off-times t L2 .

[0040] Note that in the embodiment, a certain voltage V cxWhen it is lower than other voltages, the conduction period can be ended by turning off the switch SWx. For example, at the end of the (n - 1)-th energy recycle (ER) operation, the switch SW1 is turned off because V c1 <V c2 . At the end of the n-th ER operation, the switch SW2 is turned off because V c2 <V c1 . Therefore, the conduction time T on of the (n - 1)-th ER operation is determined by t off,1- t on,2 , and the conduction time T on of the n-th ER operation is determined by t off,2- t on,1 . Note that t on / off,x is the on / off time of the switch SWx.

[0041] Note that the conduction period T on may be extended and lengthened by delaying the off time t off,x , or may be advanced and shortened by advancing the off time t off,x (assuming the on time t on,x remains unchanged).

[0042] There is a time difference TD between the falling time / edge of the control signal SW2 and the rising time of the inductor voltage V L2 . From FIG. 8(b), it can be seen that the time difference TD becomes larger as the turn-off of the switch SW2 is earlier, and becomes smaller as the cut-off of the switch SW2 is later. In the embodiment, the period determination circuit 44 may acquire / hold a predetermined time difference TD pre (before the demodulation signal generator 40 operates). The period determination circuit 44 may acquire the time difference TD n corresponding to the n-th energy recycle operation after the n-th energy recycle operation by the energy recycle circuit 42. The period determination circuit 44 may compare the time difference TD n with the predetermined time difference TD pre .

[0043] TD n >TD pre (The off time t of the switch SW2off,2 is too early, or equivalently the conduction time T on,n is too short. ) In this case, the indication circuit 440 determines whether the switch SW2 is turned off too early, or the conduction time T on,n is too short, and generates an indication signal. The control signal generator 442 adjusts the off-time t on,(n+1) >T on,n or T on,(n+2) >T on,n for the next / subsequent (e.g., (n + 1)-th or (n + 2)-th) energy recycling operation, so that the off-time t off,2 is postponed, or equivalently the conduction time T on is lengthened.

[0044] TD n <TD pre (The off-time t off,2 of the switch SW2 is too late, or equivalently the conduction time T on,n is too long. ) In this case, the indication circuit 440 determines whether the switch SW2 is turned off too late, or the conduction time T on,n is too long, and generates an indication signal. The control signal generator 442 adjusts the off-time t on,(n+1) <T on,n or T on,(n+2) <T on,n for the next / subsequent (e.g., (n + 1)-th or (n + 2)-th) energy recycling operation, so that the off-time t off,2 is advanced, or equivalently the conduction time T on is shortened.

[0045] The predetermined time difference TD pre is obtained by simulation or experiment, and may be an optimized time difference TD from the perspective of optimized power loss or optimized efficiency. Empirically, the predetermined time difference TD pre may be selected between 15 and 30 ns (nanoseconds).

[0046] FIG. 9 shows a schematic diagram of the period determination circuit 54 according to an embodiment of the present application. The period determination circuit 54 may be used to implement the period determination circuit 44. The period determination circuit 54 includes an instruction circuit 540 and a control signal generator 542.

[0047] The instruction circuit 540 includes a TD determination circuit 510 and a comparator 512. The TD determination circuit 510 receives the inductor voltage V Lx and the control signal SWx. Generally, in FIG. 9, the inductor voltage V Lx is V L1 or V L2 , and the control signal SWx may be called SW1 or SW2. Here, V Lx is a node coupled between the inductor L and the switch SWx. The TD determination circuit 510 determines the time difference TD / TD Lx corresponding to the nth (current / first) energy recycling operation based on the inductor voltage V n and the control signal SWx. The comparator 512 compares the time difference TD / TD n with a predetermined time difference TD pre , and the comparison result from the comparator 512 can be regarded as a kind of instruction signal IDS. Based on the instruction signal IDS, the control signal generator 542 updates the control signal SWx for the next / subsequent (e.g., (n + 1)th or (n + 2)th) energy recycling operation.

[0048] In short, the present invention can adaptively adjust the energy recycling period (i.e., the conduction period), which can cope with capacitive loads having various capacitances.

[0049] Those skilled in the art will easily understand that many changes and modifications can be made to the apparatus and method while maintaining the teachings of the present invention. Therefore, the above disclosure should be construed as being limited only by the scope of the appended claims.

Explanation of Reference Numerals

[0050] 10: Energy recycling circuit 20: Period determination circuit

Claims

1. A period determination circuit for determining a conduction period of the energy recycle circuit, an indicator circuit coupled to an inductor of the energy-recycle circuit to receive an inductor voltage, the indicator circuit configured to generate an indicator signal in response to the inductor voltage, the indicator signal reflecting a state of the energy-recycle circuit corresponding to a first conduction period; a control signal generator coupled to a switch of the energy recycling circuit and configured to generate a control signal having a second conduction period for the switch in response to the indication signal; the energy recycling circuit is coupled to a first capacitive component and a second capacitive component; the energy recycling circuit comprises the inductor and the switch coupled between the first capacitive component and the second capacitive component; The control signal generator determines the second conduction period in response to the first conduction period and the instruction signal.

2. the indication circuitry comprises a spike detection circuit; the spike detection circuit is coupled to the inductor to receive the inductor voltage; 2. The period determining circuit of claim 1.

3. the indication circuit generates the indication signal in response to a polarity of the spike detected by the spike detection circuit.

3. The period determining circuit of claim 2.

4. the indication circuit generates the indication signal such that the control signal generator determines that the second conduction period is longer than the first conduction period when the spike is positive and a first voltage corresponding to the first capacitive component is greater than a second voltage corresponding to the second capacitive component at a time corresponding to the spike.

4. The period determining circuit of claim 3.

5. the indication circuit generates the indication signal such that the control signal generator determines that the second conduction period is longer than the first conduction period when the spike is negative going and a first voltage corresponding to the first capacitive component is less than a second voltage corresponding to the second capacitive component at a time corresponding to the spike.

4. The period determining circuit of claim 3.

6. the indication circuit generates the indication signal such that the control signal generator determines that the second conduction period is shorter than the first conduction period when the spike is negative going and a first voltage corresponding to the first capacitive component is greater than a second voltage corresponding to the second capacitive component at a time corresponding to the spike.

4. The period determining circuit of claim 3.

7. the indication circuit generates the indication signal such that the control signal generator determines that the second conduction period is shorter than the first conduction period when the spike is positive and a first voltage corresponding to the first capacitive component is less than a second voltage corresponding to the second capacitive component at a time corresponding to the spike.

4. The period determining circuit of claim 3.

8. the indicating circuit is coupled to the first capacitive component and the second capacitive component to receive a first voltage corresponding to the first capacitive component and a second voltage corresponding to the second capacitive component; the indicating circuit generates the indicating signal in response to the inductor voltage, the first voltage, and the second voltage.

2. The period determining circuit of claim 1.

9. the indication circuit compares the first voltage with the second voltage and generates the indication signal in response to a comparison result between the first voltage and the second voltage; 9. The period determining circuit of claim 8.

10. the energy recycling circuit is disposed within a driver circuit configured to generate a carrier suppressed generalized double sideband (DSB-SC) signal; 2. The period determining circuit of claim 1.

11. the energy recycling circuit being disposed within a drive circuit configured to drive an air pulse generating device; 2. The period determining circuit of claim 1.

12. The energy recycling circuit is disposed within a drive circuit that drives the air pulse generating device to produce ultrasonic air pressure fluctuations that are amplitude modulated at an ultrasonic carrier frequency.

2. The period determining circuit of claim 1.

13. the indicating circuit obtains a time difference in response to the inductor voltage and a first control signal having the first conduction period; the indicating circuitry compares the time difference with a predetermined time difference; the indication circuit generates the indication signal in response to a comparison result between the time difference and the predetermined time difference.

2. The period determining circuit of claim 1.

14. the indication circuit generates the indication signal such that the control signal generator determines that the second conduction period is longer than the first conduction period when the time difference is greater than the predetermined time difference.

14. The period determining circuit of claim 13.

15. the indication circuit generates the indication signal such that the control signal generator determines that the second conduction period is shorter than the first conduction period when the time difference is less than the predetermined time difference.

14. The period determining circuit of claim 13.

16. the energy recycling circuit is disposed within a drive circuit configured to drive the air pulse generating device to form the aperture; 2. The period determining circuit of claim 1.

17. 2. The circuit of claim 1, wherein the indication circuit includes a comparator.

18. the comparator is configured to receive the first voltage and the second voltage and to compare the first voltage and the second voltage.

18. The period determining circuit of claim 17.

19. the comparator receives the time difference and a predetermined time difference and compares the time difference and the predetermined time difference; 18. The period determining circuit of claim 17.

20. the first capacitive component includes a first actuator disposed on a film structure; 2. The period determining circuit of claim 1.

21. the first capacitive component includes a first actuator disposed on a first flap within a film structure; the second capacitive component includes a second actuator disposed on a second flap within the film structure; 2. The period determining circuit of claim 1.

22. the energy recycling circuit comprising a first switch coupled between the first capacitive component and the inductor, and a second switch coupled between the second capacitive component and the inductor.

2. The period determining circuit of claim 1.

23. A method for determining a conduction period of an energy recycle circuit, comprising the steps of: receiving an inductor voltage corresponding to an inductor of the energy recycling circuit; generating an indication signal responsive to the inductor voltage, the indication signal reflecting a state corresponding to a first conduction period of the energy recycle circuit; determining a second conduction period in response to the first conduction period and the indication signal; generating a control signal having the second conduction period for a switch of the energy recycle circuit in response to the instruction signal; the energy recycling circuit is coupled to a first capacitive component and a second capacitive component; The energy recycling circuit includes the inductor and the switch coupled between the first capacitive component and the second capacitive component.

24. Generating the indicator signal in response to the inductor voltage performing a spike detection operation as a function of the inductor voltage; generating the indication signal in response to a polarity of a spike detected in the spike detection operation; The method for determining a period of time according to claim 23.

25. Generating the indicator signal in response to the inductor voltage comparing a first voltage corresponding to the first capacitive component and a second voltage corresponding to the second capacitive component; generating the indication signal in response to a comparison between the first voltage and the second voltage. The method for determining a period of time according to claim 23.

26. Generating the indicator signal in response to the inductor voltage obtaining a time difference in response to the inductor voltage and a first control signal having the first conduction period; comparing the time difference with a predetermined time difference; generating the indication signal in response to a comparison between the time difference and the predetermined time difference. The method for determining a period of time according to claim 23.

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