Thermal print head

Abstract

To provide a thermal print head that is enhanced in flexibility for arrangement of a wiring layer.SOLUTION: A thermal print head 100a comprises a substrate 1, a first insulation layer 21, a lower wiring layer 3, an upper individual wiring layer 4 and a second insulation layer 22. The first insulation layer 21 is formed on a main surface 11 of the substrate 1. The lower wiring layer 3 is formed on the first insulation layer 21. A direction that is perpendicular to the main surface 11 is defined as a z-direction. The second insulation layer 22 is arranged between the lower wiring layer 3 and the upper individual wiring layer 4. A protruding part 15 is formed on the main surface 11. The upper individual wiring layer 4 has individual pads 6. The individual pads 6 are arranged away from the protruding part 15. A region where the individual pads 6 are arranged when viewed from the protruding part 15 in a planar view is defined as a first region Q1. In the first region Q1, the upper individual wiring layer 4 is electrically connected to the lower wiring layer 3. The lower wiring layer 3 is arranged in the first region Q1.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to thermal printheads. [Background technology]

[0002] Japanese Patent Application Laid-Open No. 2022-180152 (Patent Document 1) discloses a thermal printhead including a wiring layer and a substrate. The wiring layer is electrically connected to individual electrodes and a common electrode. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Document 1: JP 2022-180152 A [Summary] However, there is a demand for miniaturization of thermal printheads, and there is room for improvement in the arrangement of the wiring layer.

[0004] A thermal printhead according to an embodiment of the present disclosure includes a substrate, a first insulating layer, a lower wiring layer, an upper individual wiring layer, and a second insulating layer. The substrate has a main surface, and the first insulating layer is formed on the main surface. The lower wiring layer is formed on the first insulating layer. A direction perpendicular to the main surface is defined as the z direction. In the z direction, the second insulating layer is disposed between the lower wiring layer and the upper individual wiring layer. A convex portion is formed on the main surface. The upper individual wiring layer includes an outward path portion and a return path portion. Each of the outward path portion and the return path portion extends so as to straddle the convex portion in a plan view of the main surface. A direction perpendicular to the z direction is defined as the y direction. The return path portion has an individual pad. The individual pad is disposed at a distance from the convex portion in the y direction. In a plan view, a region in which the individual pads are disposed in the y direction from the convex portion is defined as a first region. A region on the opposite side of the first region in the y direction from the convex portion is defined as a second region. The return path portion is connected to the outward path portion in the second region. In the first region, a first contact hole is formed in the second insulating layer so that the outgoing path portion and the lower wiring layer are electrically connected. The lower wiring layer is disposed in the first region. [Brief description of the drawings]

[0005] [Figure 1] FIG. 1 is a schematic plan view of a thermal printhead according to a first embodiment. [Diagram 2] FIG. 2 is a schematic plan view of the thermal printhead of the first embodiment. [Diagram 3] FIG. 3 is a schematic cross-sectional view of the thermal printhead taken along line III-III in FIG. [Figure 4] FIG. 4 is a schematic partial cross-sectional view of the thermal printhead taken along line IV-IV in FIG. [Diagram 5] FIG. 5 is a schematic partial cross-sectional view of the thermal printhead taken along line VV in FIG. [Figure 6] FIG. 6 is a flowchart showing a method for manufacturing the thermal printhead according to the first embodiment. [Figure 7] FIG. 7 is a schematic cross-sectional view showing a step in the method of manufacturing the thermal printhead according to the first embodiment. [Figure 8] FIG. 8 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 7 in the method for manufacturing the thermal printhead according to the first embodiment. [Figure 9] FIG. 9 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 8 in the method for manufacturing the thermal printhead according to the first embodiment. [Figure 10] FIG. 10 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 9 in the method for manufacturing the thermal printhead according to the first embodiment. [Figure 11] FIG. 11 is a schematic plan view showing a step subsequent to the step shown in FIG. 10 in the method for manufacturing the thermal printhead according to the first embodiment. [Figure 12] FIG. 12 is a schematic cross-sectional view of the thermal printhead taken along line XII-XII in FIG. [Figure 13] FIG. 13 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 11 in the method for manufacturing the thermal printhead according to the first embodiment. [Figure 14]FIG. 14 is a schematic plan view showing a step subsequent to the step shown in FIG. 13 in the method for manufacturing the thermal printhead according to the first embodiment. [Figure 15] FIG. 15 is a schematic cross-sectional view of the thermal printhead taken along line XV-XV in FIG. [Figure 16] FIG. 16 is a schematic partial cross-sectional view of the thermal printhead taken along line XVI-XVI in FIG. [Figure 17] FIG. 17 is a schematic plan view showing a step subsequent to the step shown in FIG. 14 in the method for manufacturing the thermal printhead according to the first embodiment. [Figure 18] FIG. 18 is a schematic cross-sectional view of the thermal printhead taken along line XVIII-XVIII in FIG. [Figure 19] FIG. 19 is a schematic plan view showing a step subsequent to the step shown in FIG. 17 in the method for manufacturing the thermal printhead according to the first embodiment. [Figure 20] FIG. 20 is a schematic partial cross-sectional view of the thermal printhead taken along line XX-XX in FIG. [Figure 21] FIG. 21 is a schematic partial cross-sectional view of the thermal printhead taken along line XXI-XXI in FIG. [Figure 22] FIG. 22 is a schematic partial cross-sectional view showing a step subsequent to the step shown in FIG. 20 in the method for manufacturing the thermal printhead according to the first embodiment. [Diagram 23] FIG. 23 is a schematic partial cross-sectional view showing a step subsequent to the step shown in FIG. 22 in the method of manufacturing the thermal printhead according to the first embodiment. [Figure 24] FIG. 24 is a schematic plan view showing a step subsequent to the step shown in FIG. 23 in the method of manufacturing the thermal printhead according to the first embodiment. [Diagram 25] FIG. 25 is a schematic cross-sectional view of the thermal printhead taken along line XXV-XXV in FIG. [Figure 26]26 is a schematic plan view of a thermal printhead according to embodiment 2. [DETAILED DESCRIPTION] The details of the embodiments of the present disclosure will be described with reference to the drawings. Note that the same or corresponding parts in the following drawings are given the same reference numerals, and the description thereof will not be repeated. At least some of the configurations of the embodiments described below may be combined in any manner.

[0006] (Embodiment 1) Figures 1 and 2 are schematic plan views of a thermal printhead 100a of the first embodiment. Figure 3 is a schematic cross-sectional view of the thermal printhead 100a taken along line III-III in Figure 1. Figure 4 is a schematic partial cross-sectional view of the thermal printhead 100a taken along line IV-IV in Figure 1. Figure 5 is a schematic partial cross-sectional view of the thermal printhead 100a taken along line VV in Figure 1.

[0007] FIG. 1 illustrates the upper individual wiring layer 4 and the upper common wiring layer 5 formed on the second insulating layer 22. That is, the third insulating layer 23 is omitted from FIG. 1. Also, the convex portion 15 and the lower wiring layer 3 are shown by dotted lines in FIG. 1 so that the positional relationship between the convex portion 15, the lower wiring layer 3, the upper individual wiring layer 4, and the upper common wiring layer 5 can be understood. FIG. 2 illustrates the lower wiring layer 3 formed on the first insulating layer 21. That is, the second insulating layer 22 and the third insulating layer 23 are omitted from FIG. 2. Also, the convex portion 15, the lower wiring layer 3, the upper individual wiring layer 4, and the upper common wiring layer 5 are shown by dotted lines in FIG. 2 so that the positional relationship between the convex portion 15, the lower wiring layer 3, the upper individual wiring layer 4, and the upper common wiring layer 5 can be understood. The line III-III shown in FIG. 1 runs along the return path portion 41L of the upper individual wiring layer 4. That is, FIG. 3 shows a cross section at the return path portion 41L of the upper individual wiring layer 4. 1 is along the outgoing portion 42 of the upper individual wiring layer 4. That is, Fig. 4 shows a cross section at the outgoing portion 42 of the upper individual wiring layer 4. Fig. 5 shows a cross section at the upper common wiring layer 5.

[0008] Thermal printhead 100a is an electronic device that prints on a print medium such as thermal paper by selectively generating heat in multiple heat generating parts 16 (see FIG. 3). Thermal printhead 100a mainly includes a substrate 1, a first insulating layer 21, a second insulating layer 22, a third insulating layer 23, and a wiring layer.

[0009] As shown in FIG. 1, the substrate 1 has a main surface 11, a back surface 12, a first end surface 13, and a second end surface 14. The back surface 12 is located on the opposite side to the main surface 11. The main surface 11 and the back surface 12 extend in an x ​​direction and a y direction perpendicular to the x direction, respectively. The x direction is the longitudinal direction of the substrate 1 and is the main scanning direction of the thermal print head 100a. The y direction is the lateral direction of the substrate 1 and is the sub-scanning direction of the thermal print head 100a. The z direction is the thickness direction of the substrate 1. The z direction is a direction perpendicular to the main surface 11. The main surface 11 faces the +z direction. The back surface 12 faces the -z direction. The y direction is a direction perpendicular to the second end surface 14. The second end surface 14 faces the +y direction. The first end surface 13 faces the -y direction. The material constituting the substrate 1 may be, for example, silicon.

[0010] As shown in Fig. 3, a protrusion 15 is formed on the main surface 11. As shown in Figs. 1 and 2, the protrusion 15 extends in the x direction. In the y direction, the protrusion 15 is located on the second end face 14 side. In other words, the distance from the second end face 14 to the protrusion 15 is shorter than the distance from the first end face 13 to the protrusion 15.

[0011] 3 and 4, the substrate 1 has protrusions 15 on the main surface 11. The protrusions 15 are formed by wet etching with, for example, an aqueous potassium hydroxide (KOH) solution, as described below. In particular, when the protrusions 15 are formed by wet etching, the material constituting the substrate 1 may be silicon. In a plan view of the main surface 11, the longitudinal direction of the protrusions 15 is the x direction, and the lateral direction of the protrusions 15 is the y direction. The height direction of the protrusions 15 is the z direction.

[0012] The first insulating layer 21 is formed on the main surface 11. The first insulating layer 21 may be formed so as to cover the entire main surface 11. That is, as shown in Figures 3 and 4, the first insulating layer 21 may cover the protrusions 15. The substrate 1 is electrically insulated from the heating element layer 4r and the wiring layer by the first insulating layer 21.

[0013] The material constituting the first insulating layer 21 is silicon dioxide (SiO 2 The oxide film such as silicon dioxide is formed, for example, by thermal oxidation.

[0014] An oxide film formed by thermal oxidation may be provided with, for example, tetraethyl orthosilicate (TEOS) oxide film. The TEOS oxide film is formed by laminating thin films of silicon dioxide multiple times using a plasma CVD method. The silicon dioxide is formed using tetraethyl orthosilicate as a raw material gas.

[0015] The wiring layer includes a lower wiring layer 3, a plurality of upper individual wiring layers 4, and a pair of upper common wiring layers 5. As shown in Figures 2 to 5, the lower wiring layer 3 is formed on a first insulating layer 21. As shown in Figures 1 and 2, in a plan view seen from the z direction of the main surface 11, the shape of the lower wiring layer 3 may be, for example, rectangular.

[0016] As shown in FIG. 3 to FIG. 5, the lower wiring layer 3 includes a first wiring layer 3a and a second wiring layer 3b. The first wiring layer 3a and the second wiring layer 3b are stacked in the z-direction. Specifically, the first wiring layer 3a is formed on the first insulating layer 21. The second wiring layer 3b is formed on the first wiring layer 3a. The material constituting the lower wiring layer 3 may be any material having electrical conductivity. The material constituting the first wiring layer 3a may be, for example, titanium (Ti). The material constituting the second wiring layer 3b may be, for example, either copper (Cu) or aluminum (Al).

[0017] 3, the second insulating layer 22 is formed on the first insulating layer 21. The second insulating layer 22 may be formed so as to cover the entire first insulating layer 21. A part of the second insulating layer 22 covers the lower wiring layer 3.

[0018] 1 and 2, a plurality of contact holes are formed in the second insulating layer 22. Specifically, as shown in Fig. 4, a first contact hole h1, through which the upper individual wiring layer 4 and the lower wiring layer 3 come into contact, is formed in the second insulating layer 22. The upper individual wiring layer 4 is formed on the inner circumferential surface of the first contact hole h1, so that the upper individual wiring layer 4 and the lower wiring layer 3 are electrically connected to each other.

[0019] 5, a second contact hole h2, through which the upper common wiring layer 5 and the lower wiring layer 3 come into contact, is formed in the second insulating layer 22. The upper common wiring layer 5 is formed on the inner circumferential surface of the second contact hole h2, so that the upper common wiring layer 5 and the lower wiring layer 3 are electrically connected to each other.

[0020] 3 to 5, the upper individual wiring layer 4 and the upper common wiring layer 5 are formed on the second insulating layer 22. From a different perspective, the second insulating layer 22 is disposed between the lower wiring layer 3 and the upper individual wiring layer 4 in the z direction. Also, the second insulating layer 22 is disposed between the lower wiring layer 3 and the upper common wiring layer 5 in the z direction. In other words, the upper individual wiring layer 4 and the upper common wiring layer 5 are formed on the same plane, and the lower wiring layer 3 is formed on a different plane from the upper individual wiring layer 4 and the upper common wiring layer 5. In this way, the wiring layers have a two-layer structure stacked in the z direction.

[0021] As shown in Figures 3 to 5, the upper individual wiring layer 4 and the upper common wiring layer 5 include a heating element layer 4r, a first wiring layer 4a, and a second wiring layer 4b. The heating element layer 4r, the first wiring layer 4a, and the second wiring layer 4b are stacked in the z-direction. Specifically, the heating element layer 4r is formed on the second insulating layer 22. The first wiring layer 4a is formed on the heating element layer 4r. The second wiring layer 4b is formed on the first wiring layer 4a.

[0022] The heating element layer 4r may be formed of a material having a higher electrical resistivity than the first wiring layer 4a and the second wiring layer 4b. The material constituting the heating element layer 4r may be, for example, tantalum nitride (TaN). The material constituting the first wiring layer 4a may be, for example, titanium (Ti). The material constituting the second wiring layer 4b may be, for example, either copper (Cu) or aluminum (Al). As shown in FIG. 3 and FIG. 4, a part of the first wiring layer 4a and the second wiring layer 4b is removed on the protrusion 15. A part of the heating element layer 4r is exposed in the region where the part of the first wiring layer 4a and the part of the second wiring layer 4b is removed. The exposed part of the heating element layer 4r is connected to the third insulating layer 23. In this way, a plurality of heating parts 16 are formed on the protrusion 15.

[0023] 1 and 2, each of the multiple upper individual wiring layers 4 includes an outgoing path portion 42 and a pair of returning path portions 41R, 41L. As shown in Fig. 1 and 2, in a plan view of the main surface 11, the outgoing path portion 42 and the pair of returning path portions 41R, 41L each extend so as to straddle the protrusion 15. In the x direction, the outgoing path portion 42 is positioned so as to be sandwiched between the pair of returning path portions 41R, 41L.

[0024] The upper individual wiring layer 4 has an individual pad 6. The individual pad 6 includes a plurality of individual pad portions. In the thermal printhead 100a according to the first embodiment, the number of individual pad portions is, for example, 64. The number of individual pad portions may be, for example, 128 or 256.

[0025] 1 and 2, in plan view from the z direction, a region in which the individual pads 6 are arranged in the y direction from the protrusion 15 is defined as a first region Q1. In plan view from the z direction, a region on the opposite side of the first region Q1 in the y direction from the protrusion 15 is defined as a second region Q2. Specifically, the first region Q1 is a region in the y direction from the protrusion 15 to the first end surface 13. The second region Q2 is a region in the y direction from the protrusion 15 to the second end surface 14.

[0026] Each of the pair of return path portions 41R, 41L has one end 41b and the other end 41t. The forward path portion 42 has one end 42b and the other end 42t. One end 41b of the pair of return path portions 41R, 41L and one end 42b of the forward path portion 42 are disposed in the first region Q1. The other end 41t of the pair of return path portions 41R, 41L and the other end 42t of the forward path portion 42 are disposed in the second region Q2.

[0027] 1 and 2, the pair of return path portions 41R, 41L are connected to the forward path portion 42 in the second region Q2. Specifically, the other end 42t of the forward path portion 42 branches out in the second region Q2. Each of the branched other ends 42t is connected to the pair of return path portions 41R, 41L. In this manner, the pair of return path portions 41R, 41L and the forward path portion 42 are electrically connected to each other.

[0028] The individual pad 6 may include individual pad portions 6R, 6L. Specifically, the individual pad portion 6R is formed at one end 41b of the return path portion 41R. The individual pad portion 6L is formed at one end 41b of the return path portion 41L. As shown in Figures 1 and 2, the individual pad portion 6R is disposed at a position farther away from the protrusion 15 in the y direction than the individual pad portion 6L. A plurality of upper individual wiring layers 4 as described above are disposed side by side in the x direction.

[0029] In this way, the multiple individual pad parts are staggered to form two rows along the x direction. The multiple individual pad parts may be staggered to form three rows along the x direction. By staggering the multiple individual pad parts along the x direction in this way, the area occupied by the multiple individual pad parts in the x direction can be reduced. As a result, the degree of freedom in arranging the upper common wiring layer 5 in the first region Q1 is improved.

[0030] 4, in the first region Q1, a first contact hole h1 is formed in the second insulating layer 22 so as to electrically connect the outgoing path portion 42 and the lower wiring layer 3. Specifically, in a plan view of the main surface 11, a portion of one end 42b of the outgoing path portion 42 overlaps with the lower wiring layer 3. In a plan view of the main surface 11, the first contact hole h1 is disposed in a region where a portion of one end 42b of the outgoing path portion 42 overlaps with the lower wiring layer 3.

[0031] The first contact hole h1 may be disposed on the protrusion 15 side as viewed from the center in the y direction of the lower wiring layer 3. The center in the y direction of the lower wiring layer 3 is a position at half the width w in the y direction of the lower wiring layer 3 shown in FIG.

[0032] From a different perspective, it is sufficient that at least a part of one end 42b of the outgoing path portion 42 overlaps with the lower wiring layer 3, and the one end 42b of the outgoing path portion 42 does not need to extend to the region where the individual pad 6 is arranged in the y direction. In this way, the pair of return path portions 41R, 41L can be arranged close to each other in the region where the one end 42b of the outgoing path portion 42 does not extend in the y direction (the region from the first contact hole h1 to the individual pad 6 in the y direction). As a result, the region occupied by the multiple individual pad portions in the x direction can be reduced. That is, the degree of freedom in arranging the upper common wiring layer 5 in the x direction is improved in the first region Q1.

[0033] As shown in FIGS. 1 and 2, a pair of upper common wiring layers 5 are arranged so as to sandwich a plurality of individual pad portions in the x direction. Specifically, the upper common wiring layer 5 includes a first upper common wiring layer 51 and a second upper common wiring layer 52. The plurality of individual pad portions are sandwiched between the first upper common wiring layer 51 and the second upper common wiring layer 52 in the x direction. The distance from the first upper common wiring layer 51 to the second upper common wiring layer 52 in the x direction may be shorter than the distance between the other ends 42t of the two upper individual wiring layers 4 arranged at both ends among the plurality of individual pad portions.

[0034] As shown in FIGS. 1 and 2, the first upper common wiring layer 51 and the second upper common wiring layer 52 are arranged spaced apart from the convex portion 15 in the y direction. In a plan view of the main surface 11, a part of each of the first upper common wiring layer 51 and the second upper common wiring layer 52 overlaps the lower wiring layer 3.

[0035] In the first region Q1, a plurality of second contact holes h2 are formed in the second insulating layer 22 so that the upper common wiring layer 5 and the lower wiring layer 3 are electrically connected. Specifically, in a plan view of the main surface 11, the second contact holes h2 are arranged in a region where a part of each of the first upper common wiring layer 51 and the second upper common wiring layer 52 overlaps the lower wiring layer 3.

[0036] The upper common wiring layer 5 has a common pad 7. The common pad 7 may include a first common pad portion 71 and a second common pad portion 72. Specifically, in a plan view of the main surface 11, the first common pad portion 71 is formed in a region where the first upper common wiring layer 51 does not overlap the lower wiring layer 3. In a plan view of the main surface 11, the second common pad portion 72 is formed in a region where the second upper common wiring layer 52 does not overlap the lower wiring layer 3. The plurality of individual pad portions are arranged between the first upper common wiring layer 51 and the second upper common wiring layer 52 in the x direction.

[0037] The second contact hole h2 may be arranged on the common pad 7 side when viewed from the center of the lower wiring layer 3 in the y direction.

[0038] 3 to 5, the third insulating layer 23 is formed on the second insulating layer 22, the upper individual wiring layer 4, and the upper common wiring layer 5. The third insulating layer 23 may be formed so as to cover the entire second insulating layer 22.

[0039] 3 and 5, the individual pads 6 and the common pad 7 are exposed from the third insulating layer 23. Specifically, a plurality of contact holes are formed in the third insulating layer 23. The individual pads and the common pad are formed so as to fill the contact holes.

[0040] The individual pads 6 and the common pad 7 may have a three-layer structure. Specifically, the individual pads 6 and the common pad 7 may be composed of a nickel layer, a palladium layer, and a gold layer. The nickel layer may be disposed on the inner circumferential surface of a contact hole formed in the third insulating layer 23. The palladium layer may be disposed on the nickel layer. The gold layer may be disposed on the palladium layer.

[0041] (Thermal print head operation) The operation of the thermal printhead 100a will now be described.

[0042] The common pad 7 is electrically connected to the upper common wiring layer 5. The upper common wiring layer 5 is electrically connected to the lower wiring layer 3 through a second contact hole h2. The lower wiring layer 3 is electrically connected to the outward path 42 of the upper individual wiring layer 4 through a first contact hole h1. A common potential is supplied from the common pad 7 to the multiple outward path portions 42.

[0043] The individual pads 6 are electrically connected to output terminals of a driver IC (not shown) via bonding wires or a flexible printed circuit (FPC). As a result, an output potential from the driver IC is selectively supplied to each of the multiple return path sections 41R, 41L. As a result, the heating element layer 4r exposed from the first wiring layer 4a and the second wiring layer 4b of the upper individual wiring layer 4 selectively generates heat. Then, when paper comes into contact with the third insulating layer 23 on the selectively generating heating element layer 4r, printing is performed on the paper.

[0044] Here, the thermal printhead 100a according to the first embodiment is characterized in that the wiring layer has a two-layer structure, as shown in Figures 3 to 5. In a conventional thermal printhead, the outward path section 42 connected to the common pad 7 is formed on the same plane as the upper individual wiring layer 4 in the first region Q1. Therefore, the wiring of the return path sections 41R, 41L and the outward path section 42 are arranged alternately in the x direction. This increases the area occupied by the individual pads 6 in the x direction, which places restrictions on the arrangement of the wiring layer in the x direction. Also, the common pad 7 is arranged farther away from the convex portion 15 in the y direction than the individual pads 6.

[0045] On the other hand, the thermal printhead 100a according to the first embodiment has a two-layer wiring structure, so that the pair of return path portions 41R, 41L can be arranged close to each other in the y direction in a region where one end 42b of the forward path portion 42 does not extend (the region from the first contact hole h1 to the individual pad 6 in the y direction). As a result, the region occupied by the multiple individual pad portions in the x direction can be reduced. In other words, the degree of freedom in arranging the upper common wiring layer 5 in the x direction is improved in the first region Q1.

[0046] Specifically, the area occupied by the multiple individual pad portions in the x direction is reduced, and the upper common wiring layer 5 can be arranged accordingly. In other words, the first upper common wiring layer 51 and the second upper common wiring layer 52 can be arranged so as to sandwich the multiple individual pad portions in the x direction.

[0047] Furthermore, in the present embodiment 1, the distance in the y direction from the protrusion 15 to the common pad 7 can be made the same as the distance in the y direction from the protrusion 15 to the individual pad 6. In other words, the width of the substrate 1 in the y direction can be reduced. As a result, the thermal printhead 100a can be made smaller.

[0048] In a plan view of the main surface 11, the lower wiring layer 3 does not have to be formed over the entire main surface 11. It is sufficient that the lower wiring layer 3 is disposed in the first region Q1. It is sufficient that the outgoing path portion 42 is electrically connected to the lower wiring layer 3 in the first region Q1. Therefore, it is sufficient that one end 42b of the outgoing path portion 42 partially overlaps the lower wiring layer 3 in a plan view of the main surface 11.

[0049] Moreover, it is only necessary that the upper common wiring layer 5 is electrically connected to the lower wiring layer 3 in the first region Q1. Therefore, it is only necessary that a part of the upper common wiring layer 5 overlaps with the lower wiring layer 3 in a plan view of the main surface 11. In other words, the lower wiring layer 3 may be disposed between the protrusion 15 and the common pad 7 in the y direction.

[0050] Furthermore, if the individual pads 6 overlap the lower wiring layer 3 in a plan view of the main surface 11, there is a risk that current will flow through the lower wiring layer 3 located below when a voltage is applied to the individual pads 6. Therefore, the individual pads 6 do not have to overlap the lower wiring layer 3 in a plan view of the main surface 11. In other words, the lower wiring layer 3 may be located between the protrusion 15 and the individual pads 6 in the y direction. In this way, current flow through the lower wiring layer 3 is suppressed when a voltage is applied to the individual pads 6.

[0051] Heat is generated in the heating layer 4r when a voltage is applied to the individual pads 6. Since the lower wiring layer 3 is not formed over the entire main surface 11, the amount of heat dissipated to the substrate 1 can be reduced.

[0052] (Thermal printhead manufacturing method) A method for manufacturing the thermal printhead 100a of the present embodiment will now be described with reference to Fig. 6. Fig. 6 is a flowchart showing the method for manufacturing the thermal printhead 100a of the first embodiment.

[0053] First, a step (S1) of preparing a substrate 1 is performed. Figure 7 is a schematic cross-sectional view showing one step in the manufacturing method of the thermal printhead 100a of the embodiment 1. In this step (S1), a substrate 1 having a surface 11a is prepared, as shown in Figure 7. Substrate 1 includes single crystal silicon.

[0054] Next, a step (S2) of forming protrusions 15 is carried out. FIG. 8 is a schematic cross-sectional view showing a step subsequent to the step shown in FIG. 7 in the method of manufacturing thermal printhead 100a according to the first embodiment. In this step (S2), a mask layer is formed on surface 11a in the areas where protrusions 15 are to be formed. The material constituting the mask layer is, for example, silicon nitride (SiN) or silicon dioxide (SiO 2 The mask layer is formed by using a CVD method or sputtering.

[0055] Next, the surface 11a of the substrate 1 is wet-etched using the mask layer as a mask. In plan view from the z direction, the substrate 1 in the region where the mask layer is not disposed is etched in the -z direction. For example, wet etching is performed using an aqueous potassium hydroxide (KOH) solution as an etching solution. In this manner, the protrusions 15 are formed. After the protrusions 15 are formed, the mask layer is removed by wet etching using hydrofluoric acid (HF). In this manner, the protrusions 15 are formed on the main surface 11 as shown in FIG. 8.

[0056] Next, a step (S3) of forming a first insulating layer 21 is performed. Fig. 9 is a schematic cross-sectional view showing a step subsequent to the step shown in Fig. 8 in the manufacturing method of the thermal printhead 100a of the first embodiment. In this step (S3), as shown in Fig. 9, a first insulating layer 21 is formed to cover the main surface 11 and the protrusions 15. Specifically, the first insulating layer 21 is formed by thermal oxidation. A TEOS oxide film may be formed by stacking thin films of silicon dioxide multiple times on an oxide film formed by thermal oxidation using a plasma CVD method.

[0057] Next, a step (S4) of forming the lower wiring layer 3 is performed. Fig. 10 is a schematic cross-sectional view showing a step subsequent to the step shown in Fig. 9 in the manufacturing method of the thermal printhead 100a of the first embodiment. In this step (S4), as shown in Fig. 10, the lower wiring layer 3 is formed on the entire first insulating layer 21 by sputtering. Specifically, after the first wiring layer 3a is laminated on the first insulating layer 21, the second wiring layer 3b is laminated to form the lower wiring layer 3. The first wiring layer 3a is formed by laminating a thin film of titanium by sputtering. The second wiring layer 3b is formed by laminating a thin film of copper or aluminum by sputtering.

[0058] Next, a step (S5) of etching the lower wiring layer 3 is performed. FIG. 11 is a schematic plan view showing a step subsequent to the step shown in FIG. 10 in the manufacturing method of the thermal printhead 100a of the first embodiment. FIG. 12 is a schematic cross-sectional view of the thermal printhead 100a taken along line segment XII-XII in FIG. 11. In this step (S5), as shown in FIG. 11 and FIG. 12, a part of the lower wiring layer 3 formed on the entire first insulating layer 21 is etched. Specifically, a mask layer is formed on the lower wiring layer 3 by using a photolithography method. A part of the lower wiring layer 3 is removed by etching using the mask layer as a mask. Wet etching can be used for the etching of the lower wiring layer 3. In this way, a rectangular lower wiring layer 3 as shown in FIG. 11 is formed.

[0059] Next, the step (S6) of forming second insulating layer 22 is performed. Fig. 13 is a schematic cross-sectional view showing the step subsequent to the step shown in Fig. 11 in the manufacturing method of thermal printhead 100a of embodiment 1. In this step (S6), as shown in Fig. 13, second insulating layer 22 is formed on first insulating layer 21 and lower wiring layer 3. Specifically, second insulating layer 22 is formed by using plasma CVD. Second insulating layer 22 is formed by stacking thin films of silicon nitride.

[0060] Next, a step (S7) of forming contact holes is performed. FIG. 14 is a schematic plan view showing a step subsequent to the step shown in FIG. 13 in the manufacturing method of the thermal printhead 100a of the first embodiment. FIG. 15 is a schematic cross-sectional view of the thermal printhead 100a taken along line segment XV-XV in FIG. 14. FIG. 16 is a schematic partial cross-sectional view of the thermal printhead 100a taken along line segment XVI-XVI in FIG. 14. In this step (S7), as shown in FIGS. 14 to 16, a plurality of first contact holes h1 and a plurality of second contact holes h2 are formed in the second insulating layer 22. Specifically, a mask layer is formed on the second insulating layer 22. The first contact holes h1 and the second contact holes h2 are formed by dry etching such as reactive ion etching (RIE) using the mask layer as a mask. As shown in FIG. 14, the plurality of first contact holes h1 and the plurality of second contact holes h2 are arranged at positions overlapping the lower wiring layer 3 in a plan view of the main surface 11.

[0061] Next, a step (S8) of forming an upper wiring layer is performed. FIG. 17 is a schematic plan view showing a step subsequent to the step shown in FIG. 14 in the manufacturing method of the thermal printhead 100a of the first embodiment. FIG. 18 is a schematic cross-sectional view of the thermal printhead 100a taken along line segment XVIII-XVIII in FIG. 17. In this step (S8), as shown in FIG. 17 and FIG. 18, the upper wiring layer is formed on the entire second insulating layer 22 by sputtering. Specifically, after the heating element layer 4r is laminated on the second insulating layer 22, the first wiring layer 4a is laminated on the heating element layer 4r. Thereafter, the second wiring layer 4b is laminated on the first wiring layer 4a to form the upper wiring layer.

[0062] The heating element layer 4r is formed by sputtering. The material constituting the heating element layer 4r is, for example, tantalum nitride (TaN). The material constituting the heating element layer 4r may be polysilicon. The first wiring layer 4a is formed by stacking a thin film of titanium by sputtering. The second wiring layer 4b is formed by stacking a thin film of copper or aluminum by sputtering.

[0063] Next, a step (S9) of etching the upper wiring layer is performed. FIG. 19 is a schematic plan view showing a step subsequent to the step shown in FIG. 17 in the manufacturing method of the thermal printhead 100a of the first embodiment. FIG. 20 is a schematic partial cross-sectional view of the thermal printhead 100a taken along the line segment XX-XX in FIG. 19. FIG. 21 is a schematic partial cross-sectional view of the thermal printhead 100a taken along the line segment XXI-XXI in FIG. 19. In this step (S9), the upper wiring layer is etched to form the upper individual wiring layer 4 and the upper common wiring layer 5 as shown in FIG. 19. First, a mask layer is formed using a photolithography method. Using the mask layer as a mask, parts of the first wiring layer 4a and the second wiring layer 4b are removed by etching. Wet etching can be used for the etching of the first wiring layer 4a and the second wiring layer 4b. As a result, parts of the heating element layer 4r are exposed from the first wiring layer 4a and the second wiring layer 4b as shown in FIG. 20.

[0064] Next, a portion of the second wiring layer 4b is removed by etching. Fig. 22 is a schematic partial cross-sectional view showing a step subsequent to the step shown in Fig. 20 in the manufacturing method of the thermal printhead 100a of the first embodiment. As a result, a portion of the first wiring layer 4a is exposed from the second wiring layer 4b, as shown in Fig. 22. In this manner, a plurality of heat generating portions 16 are formed on the protrusions 15.

[0065] Next, a portion of the heating element layer 4r is etched using reactive ion etching. Fig. 23 is a schematic partial cross-sectional view showing a step subsequent to the step shown in Fig. 22 in the manufacturing method of the thermal printhead 100a of the first embodiment. As a result, the second insulating layer 22 is exposed as shown in Fig. 23. In this manner, the upper individual wiring layer 4 and the upper common wiring layer 5 are formed.

[0066] Next, a step (S10) of forming a third insulating layer 23 is performed. Fig. 24 is a schematic plan view showing a step subsequent to the step shown in Fig. 23 in the manufacturing method of the thermal printhead 100a of the first embodiment. Fig. 25 is a schematic cross-sectional view of the thermal printhead 100a taken along line segment XXV-XXV in Fig. 24. In this step (S10), as shown in Figs. 24 and 25, the third insulating layer 23 is formed on the second insulating layer 22, the upper individual wiring layer 4, and the upper common wiring layer 5 by using plasma CVD. The third insulating layer 23 is formed by stacking thin films of silicon nitride.

[0067] Next, a step (S11) of forming electroless plating is performed. In this step (S11), a mask layer is formed on the third insulating layer 23. Using the mask layer as a mask, a plurality of contact holes are formed by dry etching such as reactive ion etching. The plurality of contact holes are formed at positions farther in the y direction from the protrusion 15 than the lower wiring layer 3. Electroless plating is formed so as to fill the contact holes. In this manner, the individual pads 6 and the common pads 7 as shown in FIGS. 1 to 5 are formed.

[0068] The individual pads 6 and the common pad 7 may have a three-layer structure. Specifically, the individual pads 6 and the common pad 7 may be composed of a nickel layer, a palladium layer, and a gold layer. The nickel layer may be disposed on the inner circumferential surface of a contact hole formed in the third insulating layer 23. The palladium layer may be disposed on the nickel layer. The gold layer may be disposed on the palladium layer. In this manner, the thermal printhead 100a of the present embodiment shown in FIGS. 1 to 5 is obtained.

[0069] An electrical characteristic test may be performed on the manufactured thermal printhead 100a. Specifically, a measurement unit corresponding to the number of individual pads is used to measure the resistance between each individual pad and the common pad 7. If the number of individual pads is, for example, 64, a measurement unit having 64 probes is used to measure the resistance.

[0070] (Action and effect) A thermal printhead 100a according to the present disclosure includes a substrate 1, a first insulating layer 21, a lower wiring layer 3, an upper individual wiring layer 4, and a second insulating layer 22. The substrate 1 has a main surface 11, and the first insulating layer 21 is formed on the main surface 11. The lower wiring layer 3 is formed on the first insulating layer 21. The direction perpendicular to the main surface 11 is defined as the z direction. In the z direction, the second insulating layer 22 is disposed between the lower wiring layer 3 and the upper individual wiring layer 4. A convex portion 15 is formed on the main surface 11. The upper individual wiring layer 4 includes an outward path portion 42 and return path portions 41R, 41L. Each of the outward path portion 42 and the return path portions 41R, 41L extends so as to straddle the convex portion 15 in a plan view of the main surface 11. The direction perpendicular to the z direction is defined as the y direction. The return path portions 41R, 41L have individual pads 6. The individual pads 6 are arranged at a distance from the convex portion 15 in the y direction. In a plan view, a region in which the individual pads 6 are arranged in the y direction as viewed from the convex portion 15 is defined as a first region Q1. A region on the opposite side of the first region Q1 in the y direction as viewed from the convex portion 15 is defined as a second region Q2. The return path portions 41R, 41L are connected to the outgoing path portion 42 in the second region Q2. In the first region Q1, a first contact hole h1 is formed in the second insulating layer 22 so that the outgoing path portion 42 and the lower wiring layer 3 are electrically connected. The lower wiring layer 3 is arranged in the first region Q1.

[0071] In this way, in the y direction, in a region where one end 42b of the outward path portion 42 does not extend (the region from the first contact hole h1 to the individual pad 6 in the y direction), the pair of return path portions 41R, 41L can be disposed close to each other. As a result, the region occupied by the multiple individual pad portions in the x direction can be reduced. In other words, in the first region Q1, the degree of freedom in arranging the upper common wiring layer 5 in the x direction is improved.

[0072] Specifically, the area occupied by the multiple individual pad portions in the x direction is reduced, and the upper common wiring layer 5 can be arranged accordingly. In other words, the first upper common wiring layer 51 and the second upper common wiring layer 52 can be arranged so as to sandwich the multiple individual pad portions in the x direction.

[0073] Furthermore, in the present embodiment 1, the distance in the y direction from the protrusion 15 to the common pad 7 can be made the same as the distance in the y direction from the protrusion 15 to the individual pad 6. In other words, the width of the substrate 1 in the y direction can be reduced. As a result, the thermal printhead 100a can be made smaller.

[0074] In the thermal printhead 100a, the lower wiring layer 3 is disposed between the protrusion 15 and the individual pad 6 in the y direction.

[0075] In this way, when a voltage is applied to the individual pad 6, it is possible to suppress current flow through the lower wiring layer 3. In addition, since the lower wiring layer 3 is not formed on the entire main surface 11, it is possible to suppress the amount of heat dissipated to the substrate 1.

[0076] In the thermal printhead 100a, the first contact hole h1 is disposed on the protruding portion 15 side when viewed from the center of the lower wiring layer 3 in the y direction in a plan view.

[0077] In this way, in the y direction, in a region where one end 42b of the outward path portion 42 does not extend (the region from the first contact hole h1 to the individual pad 6 in the y direction), the pair of return path portions 41R, 41L can be disposed close to each other. As a result, the region occupied by the multiple individual pad portions in the x direction can be reduced. In other words, in the first region Q1, the degree of freedom in arranging the upper common wiring layer 5 in the x direction is improved.

[0078] The thermal printhead 100a further includes an upper common wiring layer 5. The upper common wiring layer 5 has a common pad 7. In the first region Q1, a second contact hole h2 is formed in the second insulating layer 22 so that the upper common wiring layer 5 and the lower wiring layer 3 are electrically connected. The lower wiring layer 3 is disposed between the protrusion 15 and the common pad 7 in the y direction.

[0079] In this manner, since lower wiring layer 3 is not formed over the entire main surface 11, the amount of heat dissipated to substrate 1 can be reduced.

[0080] In the thermal printhead 100a, the individual pad 6 includes a plurality of individual pad portions. The common pad 7 includes a first common pad portion 71 and a second common pad portion 72. The direction perpendicular to the z direction and the y direction is defined as the x direction. The plurality of individual pad portions are disposed between the first common pad portion 71 and the second common pad portion 72 in the x direction.

[0081] In this way, the distance in the y direction from the protrusion 15 to the common pad 7 can be made the same as the distance in the y direction from the protrusion 15 to the individual pad 6. In other words, the width of the substrate 1 in the y direction can be reduced. As a result, the thermal printhead 100a can be made smaller.

[0082] In the thermal printhead 100a, the upper individual wiring layer 4 includes a heat generating layer 4r.

[0083] In this way, the thermal print head 100a can selectively heat the multiple heat generating elements 16 to perform printing on a print medium such as thermal paper.

[0084] In the thermal printhead 100a, the material constituting the substrate 1 is silicon.

[0085] In this way, the protrusions 15 can be formed on the main surface 11 of the substrate 1 by wet etching.

[0086] (Embodiment 2) Fig. 26 is a schematic plan view of a thermal printhead 100b of the second embodiment. Fig. 26 corresponds to Fig. 1. The thermal printhead 100b shown in Fig. 26 basically has a similar configuration to the thermal printhead 100a shown in Figs. 1 to 5 and can obtain similar effects, but differs in that the common pad 7 further includes a third common pad portion 73. Specifically, as shown in Fig. 26, the upper common wiring layer 5 includes a third upper common wiring layer 53.

[0087] As described above, since the wiring layer has a two-layer structure, the degree of freedom in arranging the upper common wiring layer 5 in the x direction in the first region Q1 is improved. As a result, like the thermal printhead 100b according to the second embodiment, the third upper common wiring layer 53 can be arranged between a plurality of individual pad portions in the x direction. Specifically, the third upper common wiring layer 53 is arranged between the first upper common wiring layer 51 and the second upper common wiring layer 52 in the x direction.

[0088] A portion of the third upper common wiring layer 53 overlaps with the lower wiring layer 3. In a region where a portion of the third upper common wiring layer 53 overlaps with the lower wiring layer 3, a second contact hole h2 is disposed.

[0089] The common pad 7 includes a third common pad portion 73. Specifically, in a plan view of the main surface 11, the third common pad portion 73 is formed in a region where the third upper common wiring layer 53 does not overlap the lower wiring layer 3. The third common pad portion 73 is disposed between the first common pad portion 71 and the second common pad portion 72 in the x direction.

[0090] 26, the distance in the x direction from the first common pad portion 71 to the third common pad portion 73 may be equal to the distance in the x direction from the second common pad portion 72 to the third common pad portion 73. In other words, the number of individual pad portions arranged between the first common pad portion 71 and the third common pad portion 73 in the x direction may be the same as the number of individual pad portions arranged between the third common pad portion 73 and the second common pad portion 72 in the x direction.

[0091] In this way, when the number of individual pads increases, the resistance value can be measured using an existing measurement unit. Specifically, when the number of individual pads is, for example, 128, the number of individual pads arranged between the first common pad 71 and the third common pad 73 and the number of individual pads arranged in the x direction between the third common pad 73 and the second common pad 72 are both 64. Therefore, by using a measurement unit having 64 probes twice, the resistance value of the thermal print head 100b having 128 individual pads can be measured.

[0092] The common pad 7 may further include a fourth common pad portion. The fourth common pad may be disposed between the third common pad portion 73 and the second common pad portion 72 in the x direction. The number of individual pad portions disposed between the third common pad portion 73 and the fourth common pad portion in the x direction may be the same as the number of the individual pad portions disposed between the fourth common pad portion and the second common pad portion 72 in the x direction.

[0093] By increasing the number of common pad portions arranged between the first common pad portion 71 and the second common pad portion 72 in this manner, when the number of individual pad portions increases, the resistance value can be measured using an existing measurement unit.

[0094] (Action and effect) In the thermal printhead 100b, the common pad 7 further includes a third common pad portion 73. The third common pad portion 73 is disposed in the x direction between the first common pad portion 71 and the second common pad portion 72. The number of individual pad portions disposed between the first common pad portion 71 and the third common pad portion 73 in the x direction is the same as the number of individual pad portions disposed between the third common pad portion 73 and the second common pad portion 72 in the x direction.

[0095] In this way, when the number of individual pads increases, the resistance value can be measured multiple times using the existing measurement unit.

[0096] Various aspects of the present disclosure are summarized below as appendices. (Appendix 1) A substrate having a major surface; a first insulating layer formed on the main surface; a lower wiring layer formed on the first insulating layer; an upper individual wiring layer; a second insulating layer; If the direction perpendicular to the main surface is the z direction, In the z direction, the second insulating layer is disposed between the lower wiring layer and the upper individual wiring layer, A convex portion is formed on the main surface, the upper individual wiring layer includes a forward path portion and a return path portion each extending so as to straddle a protruding portion in a plan view of the main surface, If the direction perpendicular to the z direction is the y direction, the return path portion has an individual pad arranged to be spaced apart from the protruding portion in the y direction, In the plan view, a region in which the individual pads are arranged in the y direction as viewed from the protrusion is defined as a first region, and a region on the opposite side of the first region in the y direction as viewed from the protrusion is defined as a second region. the return path portion is connected to the outward path portion in the second region, a first contact hole is formed in the second insulating layer so that the outgoing path portion and the lower wiring layer are electrically connected in the first region; A thermal printhead, wherein the lower wiring layer is disposed in the first region. (Appendix 2) 2. The thermal printhead of claim 1, wherein the lower wiring layer is arranged between the convex portion and the individual pad in the y direction. (Appendix 3) 3. The thermal printhead of claim 1, wherein, in the plan view, the first contact hole is arranged on the convex portion side when viewed from the center in the y direction of the lower wiring layer. (Appendix 4) Further comprising an upper common wiring layer having a common pad; a second contact hole is formed in the second insulating layer so that the upper common wiring layer and the lower wiring layer are electrically connected in the first region; 4. The thermal printhead of claim 1, wherein the lower wiring layer is disposed between the convex portion and the common pad in the y direction. (Appendix 5) The individual pad includes a plurality of individual pad portions, the common pad includes a first common pad portion and a second common pad portion; If the direction perpendicular to the z direction and the y direction is the x direction, 5. The thermal printhead of claim 4, wherein the individual pad portions are arranged between the first common pad portion and the second common pad portion in the x direction. (Appendix 6) the common pad further includes a third common pad portion disposed between the first common pad portion and the second common pad portion in the x-direction, A thermal printhead as described in Appendix 5, wherein the number of individual pad portions arranged between the first common pad portion and the third common pad portion in the x direction is the same as the number of individual pad portions arranged between the third common pad portion and the second common pad portion in the x direction. (Appendix 7) 7. The thermal printhead of claim 1, wherein the upper individual wiring layer includes a heating element layer. (Appendix 8) 8. A thermal printhead according to any one of claims 1 to 7, wherein the material constituting the substrate is silicon.

[0097] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The basic scope of the present disclosure is defined by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0098] 1 substrate, 3 lower wiring layer, 3a first wiring layer, 3b second wiring layer, 4 upper individual wiring layer, 4a first wiring layer, 4b second wiring layer, 4r heating element layer, 5 upper common wiring layer, 6 individual pad, 6R, 6L individual pad portion, 7 common pad, 11 main surface, 11a front surface, 12 back surface, 13 first end surface, 14 second end surface, 15 convex portion, 16 heating portion, 21 first insulating layer, 22 second insulating layer, 23 third insulating layer, 41b, 42b one end, 41R, 41L return path portion, 41t, 42t other end, 42 outward path portion, 51 first upper common wiring layer, 52 second upper common wiring layer, 53 third upper common wiring layer, 71 first common pad portion, 72 second common pad portion, 73 third common pad portion, 100a, 100b Thermal Printhead 100b thermal print head, h1 first contact hole, h2 second contact hole, Q1 first area, Q2 second area, w width.

Claims

1. A substrate having a major surface; a first insulating layer formed on the main surface; a lower wiring layer formed on the first insulating layer; an upper individual wiring layer; a second insulating layer; If the direction perpendicular to the main surface is the z direction, In the z direction, the second insulating layer is disposed between the lower wiring layer and the upper individual wiring layer, A convex portion is formed on the main surface, the upper individual wiring layer includes a forward path portion and a return path portion each extending so as to straddle a protruding portion in a plan view of the main surface, If the direction perpendicular to the z direction is the y direction, the return path portion includes an individual pad disposed apart from the protruding portion in the y direction, In the plan view, a region in which the individual pads are arranged in the y direction as viewed from the protrusion is defined as a first region, and a region on the opposite side of the first region in the y direction as viewed from the protrusion is defined as a second region. the return path portion is connected to the outward path portion in the second region, a first contact hole is formed in the second insulating layer so that the outgoing path portion and the lower wiring layer are electrically connected in the first region; The lower wiring layer is disposed in the first region.

2. The thermal printhead according to claim 1 , wherein the lower wiring layer is disposed between the convex portion and the individual pad in the y direction.

3. 3 . The thermal printhead according to claim 1 , wherein, in the plan view, the first contact hole is disposed on the convex portion side when viewed from a center in the y direction of the lower wiring layer.

4. Further comprising an upper common wiring layer having a common pad; a second contact hole is formed in the second insulating layer so that the upper common wiring layer and the lower wiring layer are electrically connected in the first region; 3. The thermal printhead according to claim 1, wherein the lower wiring layer is disposed between the convex portion and the common pad in the y direction.

5. The individual pad includes a plurality of individual pad portions, the common pad includes a first common pad portion and a second common pad portion; If the direction perpendicular to the z direction and the y direction is defined as the x direction, The thermal printhead according to claim 4 , wherein the individual pad portions are arranged between the first common pad portion and the second common pad portion in the x direction.

6. the common pad further includes a third common pad portion disposed between the first common pad portion and the second common pad portion in the x-direction, A thermal printhead as described in claim 5, wherein the number of individual pad portions arranged between the first common pad portion and the third common pad portion in the x direction is the same as the number of individual pad portions arranged between the third common pad portion and the second common pad portion in the x direction.

7. 3. The thermal printhead according to claim 1, wherein the upper individual wiring layer includes a heating element layer.

8. 3. The thermal printhead according to claim 1, wherein the material constituting the substrate is silicon.

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