Wafer

Abstract

To provide a wafer whose chips can be cut out easily even when the number of chips per wafer is increased.SOLUTION: A wafer 1 comprises: a frame part 11 surrounding a chip formation region 10 in which a number of chips 30 are formed; a first crosspiece part 21 whose both ends are connected to the frame part 11; a second crosspiece part 22 whose both ends are connected to the frame part 11 and which crosses the first crosspiece part 21, in the chip formation region 10; a plurality of third crosspiece parts 23 in which the plurality of chips 30 is cuttably provided respectively and which extends in parallel to each other in the chip formation region 10; and fourth crosspiece parts 24a-24d whose one ends are connected to the frame part 11 and whose other ends are connected to the second crosspiece part 22. One ends of the third crosspiece parts 23 are connected to one of the fourth crosspiece parts (24a-24d) and the other ends thereof are connected to the frame part 11 or the first crosspiece part 21.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a wafer on which a large number of chips are formed.

Background Art

[0002] FIG. 6 of Patent 5352777 describes a quartz substrate 9 having two orthogonal linear frame portions 15a and 15b. An elongated branch frame portion 18 is passed between the linear frame portion 15a and the annular frame portion 14, and a large number of device forming portions 16 are provided on both edges of the branch frame portion 18. A quartz resonator 8 is obtained by separating the portion of the device forming portion 16 from the branch frame portion 18.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the quartz substrate 9 of Patent 5352777, when cutting out the portion of the device forming portion 16 from the branch frame portion 18, the elongated branch frame portion 18 is likely to be twisted or warped. The thinner and longer the branch frame portion 18 is made to increase the number of quartz resonators 8 per wafer, the more easily the branch frame portion 18 is deformed, making it difficult to cut out the device forming portion 16.

[0005] In recent years, with the increasing speed and capacity of mobile communication systems (such as 5G and 6G), the operating frequency of electronic devices has been showing a tendency to become higher and higher. For crystal oscillators used in the generation of clock signals and the like, higher frequencies are required. Since the crystal wafer that makes up the crystal oscillator becomes thinner as the frequency increases, the crystal wafer used in the manufacture of the crystal wafer is required to be thinner. However, when the crystal substrate 9 (crystal wafer) becomes thinner in the structure shown in Patent 5352777, the branch frame portion 18 is more likely to be deformed during the cutting of the device forming portion 16, and the cutting process of the device forming portion 16 becomes more difficult.

[0006] The present invention has been made in view of such circumstances, and an object thereof is to provide a wafer that is easy to cut chips even when the number of chips per wafer is increased.

Means for Solving the Problems

[0007] A wafer according to an aspect of the present invention is a plate-shaped wafer on which a large number of chips are formed, a frame portion surrounding a chip formation region where chips are formed, a first bar portion having both ends connected to the frame portion, a second bar portion having both ends connected to the frame portion and intersecting the first bar portion in the chip formation region, a plurality of third bar portions each provided with a plurality of chips so as to be cuttable and extending parallel to each other in the chip formation region, and one or more fourth bar portions having one end connected to the second bar portion and the other end connected to the frame portion. At least a part of the third bar portions is a wafer having one end connected to one fourth bar portion and the other end connected to the frame portion, the first bar portion, or another one fourth bar portion. According to this configuration, since the third bar portion is supported by the fourth bar portion, when cutting the chip provided on the third bar portion, large deformation of the third bar portion due to twisting or bending is easily suppressed.

[0008] Preferably, the first bar portion and the second bar portion are orthogonal, the third bar portion and the second bar portion extend parallel to each other, and the fourth bar portion and the first bar portion extend parallel to each other. This makes it easier for the lengths of the third cross bars extending from the first cross bar to the fourth cross bar to be uniform. Therefore, deformation of the third cross bar during chip cutting is more likely to be uniformly suppressed.

[0009] Preferably, the frame portion has an annular shape, and the first cross bar and the second cross bar are orthogonal to each other at the central portion in the longitudinal direction of the first cross bar and the central portion in the longitudinal direction of the second cross bar. As a result, the length of the third cross bar becomes shorter as it moves away from the second cross bar, so deformation during chip cutting is more likely to be suppressed.

[0010] Preferably, the fourth cross bar is connected to the central portion in the longitudinal direction of the second cross bar that spans between the first cross bar and the frame portion. As a result, at a position close to the second cross bar, the length of the third cross bar between the first cross bar and the fourth cross bar and the length of the third cross bar between the frame portion and the fourth cross bar are substantially equal. By making the lengths of the third cross bars at positions close to the second cross bar uniform, the maximum deformation of the third cross bar that occurs during chip cutting is more likely to be suppressed compared to the case where these lengths are uneven.

[0011] Preferably, at least a part of the inner edge of the frame portion facing the chip formation region is along a virtual circle with a diameter d, and the value (d / L) obtained by dividing the diameter d of the virtual circle by the distance L between the first cross bar and the fourth cross bar is 3.5 to 4. This makes it easier to uniformly suppress the deformation of the third cross bar during chip cutting while increasing the chip yield.

[0012] Preferably, the wafer has four fourth cross bars that are line-symmetric with respect to the first cross bar and line-symmetric with respect to the second cross bar. As a result, variations in the length of the third cross bar are more likely to be suppressed, and deformation of the third cross bar during chip cutting is more likely to be uniformly suppressed.

[0013] Preferably, the portion where the first crossbar portion and the second crossbar portion intersect is called the intersection portion, the portion extending from the intersection portion to the frame portion in the first crossbar portion is called the first crossbar body, and the portion extending from the intersection portion to the frame portion in the second crossbar portion is called the second crossbar body. The width of the first crossbar body in the short direction of the first crossbar portion is called the lateral width W1, the width of the second crossbar body in the short direction of the second crossbar portion is called the lateral width W2, the width of the intersection portion in the short direction of the first crossbar portion is called the lateral width C1, and the width of the intersection portion in the short direction of the second crossbar portion is called the lateral width C2. The lateral width C1 of the intersection portion is larger than the lateral width W1 of the first crossbar body, and the lateral width C2 of the intersection portion is larger than the lateral width W2 of the second crossbar body. According to this configuration, stress is likely to concentrate at the intersection portion of the first crossbar portion and the second crossbar portion. However, since the lateral width C1 of the intersection portion is larger than the lateral width W1 of the first crossbar body and the lateral width W2 of the intersection portion is larger than the lateral width W2 of the second crossbar body, the strength of the intersection portion is improved, and it becomes difficult for the intersection portion to be damaged even if stress concentrates. Also, compared to the case where the entire first crossbar portion and the second crossbar portion are thickened to increase the strength of the intersection portion, the chip formation region can be widened, so the number of chips per wafer can be increased.

[0014] Preferably, the frame portion has an annular shape, the first crossbar portion and the second crossbar portion are orthogonal to each other at the central portion in the longitudinal direction of the first crossbar portion and the central portion in the longitudinal direction of the second crossbar portion, the value C1 / W1 obtained by dividing the lateral width C1 of the intersection portion by the lateral width W1 of the first crossbar body is 1.8 to 2.2, and the value C2 / W2 obtained by dividing the lateral width C2 of the intersection portion by the lateral width W2 of the second crossbar body is 1.5 to 2.0. Thereby, since the locations where the frame portion is supported by the first crossbar portion and the second crossbar portion are separated at substantially equal intervals, deformation of the frame portion due to an external force is likely to be suppressed. Also, it is possible to increase the strength of the intersection portion to make it difficult to cause damage while suppressing a decrease in the chip formation region due to thickening of the first crossbar body and the second crossbar body.

[0015] Preferably, the frame portion has an annular shape, the first crossbar portion and the second crossbar portion are orthogonal to each other at the central portion in the longitudinal direction of the first crossbar portion and the central portion in the longitudinal direction of the second crossbar portion, and the lateral width W2 of the second crossbar body is smaller than the lateral width W1 of the first crossbar body. As a result, the locations where the frame portion is supported by the first crossbar portion and the second crossbar portion are separated at substantially equal intervals, making it easier to suppress deformation of the frame portion due to external forces. Also, when cutting a chip from the third crossbar portion, since the external force associated with the cutting does not directly act on the second crossbar portion via the third crossbar portion, the lateral width W2 of the second crossbar portion body may be smaller than the lateral width W1 of the first crossbar portion body. By reducing the lateral width W2 of the second crossbar portion body, the chip formation region becomes larger, and the number of chips per wafer can be increased.

[0016] Preferably, the value W2 / W1 obtained by dividing the lateral width W2 of the second crossbar portion body by the lateral width W1 of the first crossbar portion body satisfies 0.6 < W2 / W1 < 1.0. Thereby, while maintaining the strength of the entire wafer obtained by the second crossbar portion supporting the first crossbar portion within an appropriate range, the lateral width W2 of the second crossbar portion body can be reduced to increase the number of chips per wafer.

[0017] Preferably, a plurality of positioning holes through which a plurality of pins for positioning the wafer are inserted are formed in one of the first crossbar portion and the second crossbar portion, or one or more positioning holes are formed in both the first crossbar portion and the second crossbar portion. According to this configuration, by inserting pins into the plurality of positioning holes respectively, the position and orientation of the wafer on the plane with respect to a jig or the like are appropriately set. Also, since the positioning holes are formed outside the chip formation region, it is possible to avoid a decrease in the number of chips per wafer due to the positioning holes. Furthermore, since the positioning holes can be formed at a location away from the outer edge of the wafer, it becomes difficult to be restricted by a jig or the like, and the pins can be appropriately inserted into the positioning holes.

[0018] Preferably, each third crossbar portion extends parallel to the second crossbar portion, at least a part of the third crossbar portions has one end connected to the first crossbar portion, the lateral width of the first crossbar portion in the short side direction is larger than the lateral width of the second crossbar portion in the short side direction, and a plurality of positioning holes are formed in the first crossbar portion. According to this configuration, when cutting a chip from the third bar portion, since the external force associated with the cutting does not directly act on the second bar portion via the third bar portion, the lateral width of the second bar portion may be smaller than the lateral width of the first bar portion. By reducing the lateral width of the second bar portion, the chip formation region becomes larger, and the number of chips per wafer can be increased. Further, since a plurality of positioning holes are formed in the first bar portion having a larger lateral width than the second bar portion, it becomes easier to suppress a decrease in the strength of the bar portion due to the formation of the positioning holes.

[0019] Preferably, the plurality of positioning holes formed in the first bar portion include a first positioning hole and a second positioning hole, and the first positioning hole and the second positioning hole are in a non-point-symmetric and non-line-symmetric relationship with each other in a plan view, and at least one of the first positioning hole and the second positioning hole has a non-line-symmetric planar shape, or the first positioning hole and the second positioning hole have planar shapes that are line-symmetric with respect to different symmetry axes. As a result, when the correctly positioned wafer is rotated by 180 degrees or when the front and back of the correctly positioned wafer are reversed, the arrangement of the first positioning hole and the second positioning hole becomes different from that of the correctly positioned wafer, so that it becomes impossible to insert the positioning pins into these positioning holes.

[0020] Preferably, the first positioning hole and the second positioning hole have different planar shapes from each other. This makes it easier to distinguish the first positioning hole and the second positioning hole by their planar shapes, and thus makes it easier to confirm the position and orientation of the wafer by visual inspection or image recognition.

[0021] Preferably, the center of the planar shape of the first positioning hole and the center of the planar shape of the second positioning hole are each offset from the center in the short side direction of the first bar portion. This makes it easier to identify which of the first positioning hole and the second positioning hole each positioning hole is from the position and planar shape of each positioning hole in the short side direction of the first bar portion, and thus makes it easier to confirm the position and orientation of the wafer by visual inspection or image recognition.

[0022] Preferably, the first positioning hole has a rectangular shape, and the second positioning hole has a rectangular shape in plan view, with the length of each side being shorter than the long side of the rectangle and longer than the short side of the rectangle. As a result, a pin that fits into the first positioning hole cannot be inserted into the second positioning hole, and a pin that fits into the second positioning hole cannot be inserted into the first positioning hole. Also, by making the first positioning hole and the second positioning hole into simple rectangular shapes, it becomes easier to form precise shapes, and the positioning accuracy is improved.

[0023] Preferably, the wafer is a quartz wafer. This makes it easier to cut out quartz chips from a thin quartz wafer. Also, even for a thin quartz wafer, breakage at the intersection due to stress concentration is less likely to occur.

Advantages of the Invention

[0024] According to the present invention, it is possible to provide a wafer that is easy to cut chips even when the number of chips per wafer is increased.

Brief Description of the Drawings

[0025]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Mode for Carrying Out the Invention

[0026] Hereinafter, the wafer according to the embodiment of the present invention will be described with reference to the drawings. The wafer according to this embodiment is a plate-shaped wafer on which a large number of chips are formed, for example, a quartz wafer on which chips of a quartz crystal resonator are formed.

[0027] FIG. 1 is a diagram showing an example of the wafer according to this embodiment. The wafer 1 shown in FIG. 1 has a frame portion 11 surrounding a chip formation region 10 in which a large number of chips 30 are formed, and a first crossbar portion 21 and a second crossbar portion 22 whose both ends are connected to the frame portion 11. The first crossbar portion 21 and the second crossbar portion 22 intersect in the chip formation region 10. In the example of FIG. 1, the first crossbar portion 21 and the second crossbar portion 22 are orthogonal to each other at the central portion in the longitudinal direction of the first crossbar portion 21 and the central portion in the longitudinal direction of the second crossbar portion 22. The intersection portion 200, which is the intersecting portion of the first crossbar portion 21 and the second crossbar portion 22, is located approximately at the center of the chip formation region 10.

[0028] Here, when the quartz crystal resonator is an AT-cut quartz crystal resonator, the first crossbar portion 21 is parallel to the X-axis of the quartz, and the second crossbar portion 22 is parallel to the Z'-axis of the quartz. This is the arrangement of the crossbar portions corresponding to the AT-cut quartz crystal resonator abbreviated as so-called X-long. Or conversely, the first crossbar portion 21 is parallel to the Z'-axis of the quartz, and the second crossbar portion 22 is parallel to the X-axis of the quartz. This is the arrangement of the crossbar portions corresponding to the AT-cut quartz crystal resonator abbreviated as so-called Z-long. Further, when the quartz crystal resonator is a tuning fork type quartz crystal resonator, the first crossbar portion 21 is parallel to the Y'-axis of the quartz, and the second crossbar portion 22 is parallel to the X-axis of the quartz. Further, when the quartz crystal resonator is a two-rotation quartz crystal resonator typified by SC-cut or the like, the first crossbar portion 21 is parallel to the X''-axis of the quartz, the second crossbar portion 22 is parallel to the Z''-axis of the quartz, or vice versa. In the above expression of the crystal axis, the crystal axis with a dash is shifted from the normal crystal axis due to the cutting angle of the quartz crystal resonator.

[0029] The first crossbar portion 21 includes two first crossbar main bodies (210a, 210b) which are portions extending from the intersection portion 200 to the frame portion 11. Also, the second crossbar portion 22 includes two second crossbar main bodies (220a, 220b) which are portions extending from the intersection portion 200 to the frame portion 11. Hereinafter, the first crossbar main bodies 210a and 210b may be referred to as "first crossbar main body 210" without distinction, and the second crossbar main bodies 220a and 220b may be referred to as "second crossbar main body 220" without distinction.

[0030] As shown in FIG. 1, both the first crossbar portion 21 and the second crossbar portion 22 have a strip shape. The lateral width W1 of the first crossbar main body 210 in the short side direction (the horizontal direction of the paper surface in FIG. 1) of the first crossbar portion 21 and the lateral width W2 of the first crossbar main body 210 in the short side direction (the vertical direction of the paper surface in FIG. 1) of the second crossbar portion 22 are both substantially constant.

[0031] Also, as shown in FIG. 1, the lateral width C1 of the intersection portion 200 in the short side direction of the first crossbar portion 21 is larger than the lateral width W1 of the first crossbar main body 210. Also, the lateral width C2 of the intersection portion 200 in the short side direction of the second crossbar portion 22 is larger than the lateral width W2 of the second crossbar main body 220. That is, the intersection portion 200 is wider than the first crossbar main body 210 and the second crossbar main body 220. By increasing the width of the intersection portion 200, the strength of the intersection portion 200 is enhanced.

[0032] Furthermore, as shown in FIG. 1, the lateral width W2 of the second crossbar main body 220 is smaller than the lateral width W1 of the first crossbar main body 210. Since the second crossbar main body 220 is not directly connected to the third crossbar portion 23 described below and the force from the third crossbar portion 23 does not directly act thereon, the lateral width can be made smaller than that of the first crossbar main body 210.

[0033] The wafer 1 shown in FIG. 1 has a plurality of third crossbar portions 23 on which a plurality of chips 30 are provided so as to be cuttable. The plurality of third crossbar portions 23 extend parallel to each other in the chip formation region 10. Also, the plurality of third crossbar portions 23 extend parallel to the second crossbar portion 22 respectively.

[0034] Figure 2 is an enlarged view of the third crossbar portion 23 provided with the chip 30. As shown in Figure 2, the third crossbar portion 23 has a strip shape, and the lateral width W3 in the short side direction (the vertical direction of the paper surface in Figure 2) of the third crossbar portion 23 is generally constant. A plurality of chips 30 of the same size are arranged side by side at equal intervals on one side edge portion of the third crossbar portion 23. In the example of Figure 2, electrodes 31 are formed on the front surface side and the back surface side of the chip 30, respectively. The chip 30 has a rectangular shape, and the chip 30 is connected to the third crossbar portion 23 at one side of the rectangular shape. A horizontally long through hole 32 is formed between the chip 30 and the third crossbar portion 23. Due to this through hole 32, the width of the portion connecting the chip 30 and the third crossbar portion 23 becomes narrow, so that the chip 30 can be easily folded off (folded and cut off) from the third crossbar portion 23 by an automatic machine or the like.

[0035] Further, the wafer 1 shown in FIG. 1 has fourth crossbar portions 24a to 24d (hereinafter, may be referred to as "fourth crossbar portion 24" without distinction) having one end connected to the frame portion 11 and the other end connected to the second crossbar portion 22. In the example of FIG. 1, the chip formation region 10 is divided into four regions by the first crossbar portion 21 and the second crossbar portion 22 that intersect at the center of the chip formation region 10, and one fourth crossbar portion 24 extends through each of these four regions. The fourth crossbar portion 24 has a strip shape, and the lateral width W4 in the short side direction (the horizontal direction of the paper surface in FIG. 1) of the fourth crossbar portion 24 is generally constant.

[0036] The four fourth crossbar portions 24 are line-symmetric with respect to the first crossbar portion 21 and line-symmetric with respect to the second crossbar portion 22. That is, the pair of the fourth crossbar portion 24a and the fourth crossbar portion 24d, and the pair of the fourth crossbar portion 24b and the fourth crossbar portion 24c are each line-symmetric with respect to the first crossbar portion 21. Also, the pair of the fourth crossbar portion 24a and the fourth crossbar portion 24b, and the pair of the fourth crossbar portion 24d and the fourth crossbar portion 24c are each line-symmetric with respect to the second crossbar portion 22.

[0037] One end of the third crossbar portion 23 is connected to the fourth crossbar portion 24, and the other end is connected to the first crossbar portion 21 or the frame portion 11. That is, the third crossbar portion 23 does not directly span from the first crossbar portion 21 to the frame portion 11, but is supported by the fourth crossbar portion 24 between the first crossbar portion 21 and the frame portion 11.

[0038] In the example of FIG. 1, some of the third crossbar portions 23 (the third crossbar portions 23 from the third row from the top to the third crossbar portions 23 from the fourth row from the bottom) are not connected to the fourth crossbar portion 24, but are connected between the frame portion 11 and the first crossbar portion 21.

[0039] In the example of FIG. 1, the first crossbar portion 21 and the second crossbar portion 22 are orthogonal. Also, the third crossbar portion 23 and the second crossbar portion 22 extend in parallel, and the fourth crossbar portion 24 and the first crossbar portion 21 extend in parallel. That is, the third crossbar portion 23 extends in a direction orthogonal to the first crossbar portion 21 and the fourth crossbar portion 24, respectively.

[0040] Also in the example of FIG. 1, the outer shape of the wafer 1 is circular, and the frame portion 11 has an annular shape. The first crossbar portion 21 and the second crossbar portion 22 are orthogonal at the central portion in the longitudinal direction of the first crossbar portion 21 and the central portion in the longitudinal direction of the second crossbar portion 22.

[0041] One end of the fourth crossbar portion 24 is connected to the central portion in the longitudinal direction of the second crossbar portion 22 (the second crossbar main body 220) that spans between the first crossbar portion 21 and the frame portion 11. In the example of FIG. 1, the length from the connection portion of the second crossbar portion 22 and the fourth crossbar portion 24 to the connection portion of the second crossbar portion 22 and the frame portion 11 is substantially the same as the length from the connection portion of the second crossbar portion 22 and the fourth crossbar portion 24 to the connection portion of the second crossbar portion 22 and the first crossbar portion 21.

[0042] In the example of FIG. 1, the frame portion 11 has two edges 110a and 110b that extend parallel to the first crossbar portion 21 and the fourth crossbar portion 24. One end of the second crossbar portion 22 is connected to the edge 110a, and the other end of the second crossbar portion 22 is connected to the edge 110b. The lengths of the edges 110a and 110b are approximately equal, and both ends of the second crossbar portion 22 are connected to the central portions of the edges 110a and 110b. Due to the presence of the edges 110a and 110b parallel to the fourth crossbar portion 24, the lengths of the third crossbar portion 23 that cross between these edges (110a, 110b) and the fourth crossbar portion 24 become substantially equal. Therefore, variations in the overall length of the third crossbar portion 23 are suppressed.

[0043] In the wafer 1 according to the present embodiment, at least a part of the inner edge of the frame portion 11 facing the chip formation region 10 is along a virtual circle 9 with a diameter d (radius r × 2). The first crossbar portion 21 and the second crossbar portion 22 intersect at approximately the central portion of this virtual circle 9. In this case, it is desirable that the value d / L obtained by dividing the diameter d of the virtual circle 9 by the distance L between the first crossbar portion 21 and the fourth crossbar portion 24 is between 3.5 and 4.

[0044] For example, when the diameter d of the virtual circle 9 is 92 [mm], it is desirable that the distance L between the first crossbar portion 21 and the fourth crossbar portion 24 is between 23.0 and 26.3 [mm].

[0045] Also, when the diameter d of the virtual circle 9 is 92 [mm], it is desirable that the thickness and width of each crossbar portion (21 - 24) are included in the following ranges, for example. Thickness of each crossbar portion (21 - 24): 0.08 - 0.10 [mm] Width W1 of the first crossbar body 210: 3.00 - 4.37 [mm] Width W2 of the second crossbar body 220: 3.00 - 4.52 [mm] Width W3 of the third crossbar portion 23: 0.18 - 0.25 [mm] Width W4 of the fourth crossbar portion 24: 0.15 - 0.30 [mm]

[0046] In addition, in the wafer 1 according to the present embodiment, it is desirable that the value C1 / W1 obtained by dividing the lateral width C1 of the intersection portion 200 by the lateral width W1 of the first bar portion main body 210 is 1.8 to 2.2, and the value C2 / W2 obtained by dividing the lateral width C2 of the intersection portion 200 by the lateral width W2 of the second bar portion main body 220 is 1.5 to 2.0. That is, it is desirable that the intersection portion 200 has a lateral width about twice that of the first bar portion 21 and the second bar portion 22.

[0047] Furthermore, in the wafer 1 according to the present embodiment, it is desirable that the value W2 / W1 obtained by dividing the lateral width W2 of the second bar portion main body 220 by the lateral width W1 of the first bar portion main body 210 satisfies 0.6 < W2 / W1 < 1.0.

[0048] In addition, in the wafer 1 according to the present embodiment, as shown in FIG. 1, the first positioning hole 41 and the second positioning hole 42 are formed in the first bar portion 21 having a larger lateral width than the second bar portion 22. Pins provided on a jig or the like are inserted into the first positioning hole 41 and the second positioning hole 42, respectively, to position the wafer 1 with respect to the jig or the like. In the following description, it is assumed that when the wafer 1 is in the correct positioning state, the first pin is inserted into the first positioning hole 41 and the second pin is inserted into the second positioning hole 42. Although details will be described later, the shapes and sizes of the first positioning hole 41 and the second positioning hole 42 are different in this case. Correspondingly, the diameters of the first pin and the second pin are also different.

[0049] In the example of FIG. 1, the planar shape of the first positioning hole 41 is rectangular, and the planar shape of the second positioning hole 42 is generally square. The long side of the rectangle of the first positioning hole 41 is parallel to the longitudinal direction of the first bar portion 21, and the short side of the rectangle is parallel to the short-side direction of the first bar portion 21. Also, a part of the sides of the square of the second positioning hole 42 is parallel to the longitudinal direction of the first bar portion 21, and the other sides of the square are parallel to the short-side direction of the first bar portion 21.

[0050] FIG. 3B shows an enlarged view of the vicinity of the first positioning hole 41, and FIG. 3A shows an enlarged view of the vicinity of the second positioning hole 42. As shown in FIGS. 3A and 3B, if the length of the long side of the rectangle of the first positioning hole 41 is "a" and the length of the short side is "b", and the length of each side of the square of the second positioning hole 42 is "s", then the length "s" of each side of the second positioning hole 42 is shorter than the length "a" of the long side of the first positioning hole 41 and longer than the length "b" of the short side of the first positioning hole 41. Therefore, the first pin that fits the rectangular shape of the first positioning hole 41 cannot be inserted into the second positioning hole 42 because the length "a" of the long side of the rectangle is longer than the length "s" of the side of the square of the second positioning hole 42. Also, the second pin that fits the square shape of the second positioning hole 42 cannot be inserted into the first positioning hole 41 because the length "s" of the side of the square is longer than the length "b" of the short side of the rectangle of the first positioning hole 41.

[0051] The following is an example of the dimensions of the first positioning hole 41 and the second positioning hole 42 when the diameter d of the virtual circle 9 is 92 [mm]. Length a of the long side of the first positioning hole 41: 1.200 [mm] Length b of the short side of the first positioning hole 41: 0.805 [mm] Length s of each side of the second positioning hole 42: 1.005 [mm]

[0052] Also, the following is an example of the diameters of the first pin and the second pin. Diameter of the first pin: 0.8 [mm] Diameter of the second pin: 1.0 [mm]

[0053] In the example of FIG. 1, the center of the planar shape (square) of the first positioning hole 41 and the center of the planar shape (rectangle) of the second positioning hole 42 are each displaced from the center in the short side direction (the horizontal direction of the paper surface of FIG. 1) of the first crossbar portion 21. In the example of FIG. 1, with respect to the center in the short side direction of the first crossbar portion 21, the centers of the first positioning hole 41 and the second positioning hole 42 are displaced in opposite directions from each other. That is, with respect to the center in the short side direction of the first crossbar portion 21, the center of the first positioning hole 41 is displaced to the left side, and the center of the second positioning hole 42 is displaced to the right side.

[0054] In the example of FIG. 1, the first positioning hole 41 and the second positioning hole 42 in the first crossbar portion 21 are in a non-point-symmetric and non-line-symmetric relationship with each other in a plan view.

[0055] Since the first positioning hole 41 and the second positioning hole 42 are in a non-point-symmetric relationship, even if the wafer 1 is rotated 180 degrees around an arbitrary point on the plane, the first positioning hole 41 and the second positioning hole 42 before and after the rotation do not overlap. That is, even if the wafer 1 in the correct positioning state is rotated 180 degrees around an arbitrary point on the plane, it is not possible to insert the first pin into the second positioning hole 42 while inserting the second pin into the first positioning hole 41. Therefore, the wafer 1 is not positioned in a state rotated 180 degrees with respect to the correct positioning state.

[0056] Since the first positioning hole 41 and the second positioning hole 42 are in a non-line-symmetric relationship, even if the wafer 1 is rotated around an arbitrary axis on the plane to reverse the front and back surfaces, the first positioning hole 41 and the second positioning hole 42 do not overlap before and after the reversal of the front and back surfaces. That is, even if the wafer 1 in the correct positioning state is rotated around an arbitrary axis on the plane to reverse the front and back surfaces, it is not possible to insert the first pin into the second positioning hole 42 while inserting the second pin into the first positioning hole 41. Therefore, the wafer 1 is not positioned in a state where the front and back surfaces are reversed with respect to the correct positioning state.

[0057] Further, the first positioning hole 41 and the second positioning hole 42 shown in FIG. 1 have plane shapes that are line-symmetric with respect to different axes of symmetry. The plane shape of the first positioning hole 41 is rectangular, and the plane shape of the second positioning hole 42 is square. Both are line-symmetric shapes, but their axes of symmetry for line symmetry are different. Therefore, for example, when the wafer 1 is rotated around the axis of symmetry of the rectangle of the first positioning hole 41 to reverse the front and back surfaces, while inserting the first pin into the first positioning hole 41, the second pin cannot be inserted into the second positioning hole 42. Also, when the wafer 1 is rotated around the axis of symmetry of the square of the second positioning hole 42 to reverse the front and back surfaces, while inserting the first pin into the first positioning hole 41, the second pin cannot be inserted into the second positioning hole 42. Therefore, even though the plane shapes of the first positioning hole 41 and the second positioning hole 42 are line-symmetric shapes respectively, the wafer 1 will not be positioned in a state where the front and back surfaces are reversed with respect to the correct positioning state.

[0058] As described above, according to the wafer 1 according to this embodiment, both ends of the first crossbar portion 21 and the second crossbar portion 22 are connected to the frame portion 11, the first crossbar portion 21 and the second crossbar portion intersect in the chip formation region 10, one end of the fourth crossbar portion 24 is connected to the second crossbar portion 22, and the other end of the fourth crossbar portion 24 is connected to the frame portion 11. Also, a plurality of third crossbar portions 23 that extend parallel to each other in the chip formation region 10 have one end connected to the fourth crossbar portion 24 and the other end connected to the frame portion 11 or the first crossbar portion 21. As a result, since the third crossbar portion 23 is supported by the fourth crossbar portion 24, when cutting out the chip 30 provided on the third crossbar portion 23, it is possible to effectively suppress the third crossbar portion 23 from being greatly deformed due to twisting or bending. Therefore, even when the width of the third crossbar portion 23 is reduced to increase the chip yield, the deformation of the third crossbar portion 23 during chip cutting is reduced, making it easier to perform the chip cutting process. Even if the wafer 1 is a thin crystal wafer, since large deformation of the third crossbar portion 23 can be suppressed, it is possible to easily cut out crystal chips.

[0059] Also, according to the wafer 1 according to the present embodiment, since the first crossbar portion 21 and the second crossbar portion 22 are orthogonal to each other, the frame portion 11 is more easily supported evenly by the first crossbar portion 21 and the second crossbar portion 22, so that deformation of the frame portion 11 due to an external force is more easily suppressed. Further, since the third crossbar portion 23 and the second crossbar portion 22 extend in parallel, and the fourth crossbar portion 24 and the first crossbar portion 21 extend in parallel, the lengths of the third crossbar portion 23 extending from the first crossbar portion 21 to the fourth crossbar portion 24 are likely to be uniform. Therefore, deformation of the third crossbar portion 23 during chip cutting is more easily suppressed uniformly.

[0060] Also, according to the wafer 1 according to the present embodiment, the frame portion 11 has an annular shape, and the first crossbar portion 21 and the second crossbar portion 22 are orthogonal to each other at the central portion in the longitudinal direction of the first crossbar portion 21 and the central portion in the longitudinal direction of the second crossbar portion 22. As a result, the locations where the frame portion 11 is supported by the first crossbar portion 21 and the second crossbar portion 22 are separated at substantially equal intervals, so that deformation of the frame portion 11 due to an external force is more easily suppressed. Further, since the frame portion 11 has an annular shape, as shown in FIG. 1, the length of the third crossbar portion 23 becomes shorter as it moves away from the second crossbar portion 22, so that deformation during chip cutting of the chip 30 is more easily suppressed.

[0061] Also, according to the wafer 1 according to the present embodiment, one end of the fourth crossbar portion 24 is connected to the central portion in the longitudinal direction of the second crossbar portion 22 that spans between the first crossbar portion 21 and the frame portion 11. As a result, at a position close to the second crossbar portion 22, the length of the third crossbar portion 23 between the first crossbar portion 21 and the fourth crossbar portion 24 and the length of the third crossbar portion 23 between the frame portion 11 and the fourth crossbar portion 24 become substantially equal. As shown in FIG. 2, the third crossbar portion 23 at a position close to the second crossbar portion 22 is the longest among the entire third crossbar portion 23 and is likely to deform during chip cutting. Therefore, by making the lengths of the third crossbar portion 23 at a position close to the second crossbar portion 22 uniform, the maximum deformation of the third crossbar portion 23 that occurs during chip cutting can be suppressed as compared with the case where these lengths become non-uniform (one becomes longer and the other becomes shorter).

[0062] Further, according to the wafer 1 according to the present embodiment, the value d / L obtained by dividing the diameter d of the virtual circle 9 by the distance L between the first bar portion 21 and the fourth bar portion 24 is 3.5 to 4. Thereby, while increasing the chip yield, deformation of the third bar portion 23 during chip cutting can be uniformly suppressed.

[0063] Further, according to the wafer 1 according to the present embodiment, four fourth bar portions 24 that are line-symmetric with respect to the first bar portion 21 and line-symmetric with respect to the second bar portion 22 are provided. Thereby, it becomes easier for the patterns of the lengths of the third bar portions 23 to be aligned among the four regions of the chip formation region 10 divided by the orthogonal first bar portion 21 and second bar portion 22. Therefore, it becomes easier to suppress variations in the length of the third bar portion 23, and deformation of the third bar portion 23 during chip cutting can be uniformly suppressed.

[0064] Further, according to the wafer 1 according to the present embodiment, both ends of the first bar portion 21 and the second bar portion 22 are connected to the frame portion 11, and the first bar portion 21 and the second bar portion 22 intersect in the chip formation region 10. The intersection portion 200 of the first bar portion 21 and the second bar portion 22 has a larger lateral width in the short side direction of the first bar portion 21 than the first bar portion main body 210 (C1>W1), and a larger lateral width in the short side direction of the second bar portion 22 than the second bar portion main body 220 (C2>W2). As a result, stress is likely to concentrate on the intersection portion 200 of the first bar portion 21 and the second bar portion 22. However, since the lateral width C1 of the intersection portion 200 is larger than the lateral width W1 of the first bar portion main body 210, and the lateral width C2 of the intersection portion 200 is larger than the lateral width W2 of the second bar portion main body 220, the strength of the intersection portion 200 is improved, and the intersection portion 200 is less likely to be damaged even if stress concentrates. In particular, even if the wafer 1 is a thin crystal wafer, breakage of the intersection portion 200 is likely to be avoided. Further, compared with the case of thickening the entire first bar portion 21 and second bar portion 22 in order to increase the strength of the intersection portion 200, the chip formation region 10 can be widened, so that the number of chips 30 per wafer can be increased.

[0065] Further, according to the wafer 1 according to the present embodiment, the frame portion 11 has an annular shape, and the first crossbar portion 21 and the second crossbar portion 22 are orthogonal to each other at the central portion in the longitudinal direction of the first crossbar portion 21 and the central portion in the longitudinal direction of the second crossbar portion 22. As a result, the locations where the frame portion 11 is supported by the first crossbar portion 21 and the second crossbar portion 22 are separated at substantially equal intervals, so that deformation of the frame portion 11 due to external force is likely to be suppressed.

[0066] Further, according to the wafer 1 according to the present embodiment, the value C1 / W1 obtained by dividing the lateral width C1 of the intersection portion 200 by the lateral width W1 of the first crossbar main body 210 is 1.8 to 2.2, and the value C2 / W2 obtained by dividing the lateral width C2 of the intersection portion 200 by the lateral width W2 of the second crossbar main body 220 is 1.5 to 2.0. Thereby, while suppressing a decrease in the chip formation region 10 due to the thickening of the first crossbar main body 210 and the second crossbar main body 220, the strength of the intersection portion 200 can be increased to make it difficult to cause breakage.

[0067] Further, according to the wafer 1 according to the present embodiment, a plurality of third crossbar portions 23, each provided with a plurality of chips 30 cuttable therein, extend in parallel with the second crossbar portion 22 in the chip formation region 10, and at least a part of the third crossbar portions 23 has one end connected to the first crossbar main body 210. When cutting the chip 30 from the third crossbar portion 23, the external force associated with the cutting acts on the first crossbar portion 21 via the third crossbar portion 23 and does not act directly on the second crossbar portion 22. Therefore, the lateral width W2 of the second crossbar main body 220 can be made smaller than the lateral width W1 of the first crossbar main body 210. By making the lateral width W2 of the second crossbar main body 220 smaller, the chip formation region 10 becomes larger than when making it the same as the lateral width W1, and the number of chips 30 per wafer can be increased.

[0068] Further, according to the wafer 1 according to the present embodiment, the value W2 / W1 obtained by dividing the lateral width W2 of the second crossbar main body 220 by the lateral width W1 of the first crossbar main body 210 satisfies 0.6 < W2 / W1 < 1.0. Thereby, while maintaining the strength of the entire wafer obtained by the second crossbar portion 22 supporting the first crossbar portion 21 within an appropriate range, the lateral width W2 of the second crossbar main body 220 can be made smaller to increase the number of chips 30 per wafer.

[0069] Further, according to the wafer 1 according to the present embodiment, one end of the fourth crossbar portion 24 is connected to the second crossbar portion 22, and the other end of the fourth crossbar portion 24 is connected to the frame portion 11. One end of each of the plurality of third crossbar portions 23 extending in parallel with the second crossbar portion 22 in the chip formation region 10 is connected to the fourth crossbar portion 24, and the other end is connected to the frame portion 11 or the first crossbar portion 21. Thereby, since the third crossbar portion 23 is supported by the fourth crossbar portion 24, when cutting out the chip 30 provided on the third crossbar portion 23, large deformation of the third crossbar portion 23 due to twisting or bending is easily suppressed.

[0070] Further, according to the wafer 1 according to the present embodiment, a plurality of positioning holes (41, 42) through which a plurality of pins for positioning the wafer 1 are inserted are formed in the first crossbar portion 21. Therefore, by inserting pins into the plurality of positioning holes (41, 42) respectively, the position and orientation of the wafer 1 on the plane with respect to a jig or the like can be appropriately set. Further, since the positioning holes (41, 42) are formed outside the chip formation region 10, it is possible to avoid a decrease in the number of chips 30 per wafer due to the positioning holes (41, 42). Furthermore, since the positioning holes (41, 42) can be formed at a location away from the outer edge of the wafer 1, it becomes difficult to be restricted by a jig, a device, or the like arranged at a position close to the outer edge of the wafer 1, and the positioning pins can be appropriately inserted into the positioning holes (41, 42).

[0071] Further, according to the wafer 1 according to the present embodiment, a plurality of third bar portions 23, each provided with a plurality of chips 30 cutoutably, extend in parallel with the second bar portions 22 in the chip formation region 10, and at least a part of the third bar portions 23 has one end connected to the first bar portion 21. When cutting out the chip 30 from the third bar portion 23, the external force accompanying the cutting acts on the first bar portion 21 via the third bar portion 23, but does not act directly on the second bar portion 22. Therefore, the width W2 of the second bar portion 22 can be made smaller than the width W1 of the first bar portion 21. By making the width W2 of the second bar portion 22 smaller, the chip formation region 10 becomes larger than when making it the same as the width W1 of the first bar portion 21, and the number of chips 30 per wafer can be increased. Moreover, since a plurality of positioning holes (41, 42) are formed in the first bar portion 21 having a larger width than the second bar portion 22, it becomes easier to suppress a decrease in the strength of the bar portion due to the formation of the positioning holes.

[0072] Further, according to the wafer 1 according to the present embodiment, the first positioning hole 41 and the second positioning hole 42 formed in the first bar portion 21 are in a non-point-symmetric and non-line-symmetric relationship with each other in a plan view, and have a line-symmetric planar shape with respect to different symmetry axes. Thereby, when the correctly positioned wafer 1 is rotated by 180 degrees or when the front and back of the correctly positioned wafer 1 are reversed, the arrangement of the first positioning hole 41 and the second positioning hole 42 becomes different from that of the correctly positioned wafer 1. Therefore, it becomes impossible to insert the positioning pin into these positioning holes. Accordingly, it is possible to prevent the wafer 1 from being positioned in a state where the correctly positioned wafer 1 is rotated by 180 degrees or in a state where the front and back of the correctly positioned wafer 1 are reversed.

[0073] Further, according to the wafer 1 according to the present embodiment, the first positioning hole 41 and the second positioning hole 42 have different planar shapes from each other. Thereby, since it becomes easier to visually distinguish the first positioning hole 41 and the second positioning hole 42 by the planar shape, it becomes easier to confirm the position and orientation of the wafer 1 by visual inspection or image recognition.

[0074] Further, according to the wafer 1 according to the present embodiment, the center of the planar shape (rectangle) of the first positioning hole 41 and the center of the planar shape (square) of the second positioning hole 42 are each displaced from the center in the short side direction of the first bar portion 21. Thereby, it becomes easy to visually identify which of the first positioning hole and the second positioning hole each positioning hole is from the position and planar shape of each positioning hole in the short side direction of the first bar portion 21, so that it becomes easy to confirm the position and orientation of the wafer 1 by visual inspection or image recognition.

[0075] Further, according to the wafer 1 according to the present embodiment, the first positioning hole 41 has a rectangular shape, the second positioning hole 42 has a square shape, and each side of the square of the second positioning hole 42 is shorter than the long side of the rectangle of the first positioning hole 41 and longer than the short side. Thereby, the first pin that fits into the first positioning hole 41 becomes unable to be inserted into the second positioning hole 42, and the second pin that fits into the second positioning hole 42 becomes unable to be inserted into the first positioning hole 41. Therefore, it is possible to surely avoid an incorrect positioning state in which the first pin is inserted into the second positioning hole 42 and the second pin is inserted into the first positioning hole 41. Further, by making the first positioning hole 41 and the second positioning hole 42 into simple rectangular shapes, respectively, it becomes easy to form each positioning hole into a precise shape, and the positioning accuracy is improved.

[0076] Note that the present invention is not limited only to the above-described embodiment and includes various variations.

[0077] For example, the shape of the wafer is not limited to a circular shape, and other shapes (such as a quadrangle) may be used.

[0078] The base material of the wafer may be other than quartz, for example, silicon.

[0079] In the above-described embodiment, four fourth bar portions 24 are provided on the wafer 1. However, in other examples of the present embodiment, the number of fourth bar portions may be 5 or more or 3 or less.

[0080] When two or more fourth cross bars are provided between the first cross bar portion and the frame portion, some of the third cross bar portions may be connected between the two fourth cross bar portions. That is, one end of the third cross bar portion may be connected to one fourth cross bar portion, and the other end of the third cross bar portion may be connected to another fourth cross bar portion.

[0081] In a modified example of the wafer 1 shown in FIG. 4, in four regions of the chip formation region 10 divided by the orthogonal first cross bar portion 21 and second cross bar portion 22, two fourth cross bar portions 24 each extend across. That is, in the four regions, the fourth cross bar portions 24e and 24f extend across the region divided by the first cross bar body 210a and the second cross bar body 220b, the fourth cross bar portions 24g and 24h extend across the region divided by the first cross bar body 210b and the second cross bar body 220b, the fourth cross bar portions 24i and 24j extend across the region divided by the first cross bar body 210b and the second cross bar body 220a, and the fourth cross bar portions 24k and 24m extend across the region divided by the first cross bar body 210a and the second cross bar body 220a. Some of the third cross bar portions are connected between the two fourth cross bar portions 24 in each region (between 24e and 24f, between 24g and 24h, between 24i and 24j, between 24k and 24m).

[0082] In the example of the above-described embodiment, there are two positioning holes, but in other examples of this embodiment, there may be three or more positioning holes.

[0083] In the example of the above-described embodiment, a plurality of positioning holes (41, 42) are formed only in the first cross bar portion 21, but in other examples of this embodiment, one or more positioning holes may be formed in each of the first cross bar portion 21 and the second cross bar portion 22. In a modified example of the wafer 1 shown in FIG. 5, one positioning hole 42a is formed in the first cross bar portion 21, and the other positioning hole 41a is formed in the second cross bar portion 22. In still another example of this embodiment, a plurality of positioning holes may be formed only in the second cross bar portion 22.

[0084] In the example of the above-described embodiment, the second positioning hole 42 is square. However, in other examples of this embodiment, the second positioning hole 42 may have a rectangular shape other than square. Even if the second positioning hole 42 has a rectangular shape other than square, if each side of the rectangular shape is shorter than the long side of the rectangle of the first positioning hole 41 and longer than the short side, the first pin that fits the first positioning hole 41 cannot be inserted into the second positioning hole 42, and the second pin that fits the second positioning hole 42 cannot be inserted into the first positioning hole 41. Therefore, similar to the above, an incorrect positioning state of the wafer 1 can be avoided.

[0085] In the example of the above-described embodiment, the positioning holes (41, 42) are rectangular. However, in other examples of this embodiment, the positioning holes may have any shape other than rectangular.

[0086] In the example of the above-described embodiment, the first positioning hole 41 and the second positioning hole 42 each have a line-symmetric planar shape (square, rectangle). However, in other examples of this embodiment, at least one of the first positioning hole 41 and the second positioning hole 42 may have a non-line-symmetric planar shape. Thereby, when the front and back of the wafer 1 in the correct positioning state are inverted, for the positioning hole having a non-line-symmetric planar shape, the pin corresponding to the positioning hole cannot be inserted. Therefore, it is possible to prevent the wafer 1 from being positioned in a state where the front and back are inverted with respect to the correct positioning state.

Explanation of Reference Numerals

[0087] 1... Wafer, 10... Chip formation region, 11... Frame portion, 110a, 110b... Edges, 21... First crossbar portion, 22... Second crossbar portion, 23... Third crossbar portion, 24... Fourth crossbar portion, 24a~24k, 24m... Fourth crossbar portion, 30... Chip, 31... Electrode, 32... Through hole, 41, 41a... First positioning hole, 42, 42a... Second positioning hole, 9... Virtual circle

Claims

1. A plate-like wafer on which a plurality of chips are formed, a frame portion surrounding a chip formation region in which the chips are formed, a first crossbar portion having both ends connected to the frame portion, a second crossbar portion having both ends connected to the frame portion and intersecting the first crossbar portion in the chip formation region, a plurality of third crossbar portions each provided so that the plurality of chips can be cut out and extending parallel to each other in the chip formation region, and one or more fourth crossbar portions having one end connected to the second crossbar portion and the other end connected to the frame portion. At least some of the third crossbar portions have one end connected to one of the fourth crossbar portions and the other end connected to the frame portion, the first crossbar portion, or another one of the fourth crossbar portions. The wafer.

2. The first crossbar portion and the second crossbar portion are orthogonal to each other, the third crossbar portion and the second crossbar portion extend parallel to each other, and the fourth crossbar portion and the first crossbar portion extend parallel to each other. The wafer according to claim 1.

3. The frame portion has an annular shape, and the first crossbar portion and the second crossbar portion are orthogonal to each other at the central portion in the longitudinal direction of the first crossbar portion and the central portion in the longitudinal direction of the second crossbar portion. The wafer according to claim 2.

4. The fourth crossbar portion is connected to the central portion in the longitudinal direction of the second crossbar portion that spans between the first crossbar portion and the frame portion. The wafer according to claim 3.

5. At least a part of the inner edge of the frame portion facing the chip formation region is along a virtual circle with a diameter d, and the value d / L obtained by dividing the diameter d of the virtual circle by the distance L between the first crossbar portion and the fourth crossbar portion is 3.5 to 4. The wafer according to claim 3.

6. Having four of the fourth crossbar portions that are line-symmetric with respect to the first crossbar portion and line-symmetric with respect to the second crossbar portion. The wafer according to claim 4.

7. The portion where the first crossbar portion and the second crossbar portion intersect is called the intersection portion, the portion of the first crossbar portion that extends from the intersection portion to the frame portion is called the first crossbar portion main body, the portion of the second crossbar portion that extends from the intersection portion to the frame portion is called the second crossbar portion main body, the width of the first crossbar portion main body in the short direction of the first crossbar portion is called the lateral width W1, the width of the second crossbar portion main body in the short direction of the second crossbar portion is called the lateral width W2, the width of the intersection portion in the short direction of the first crossbar portion is called the lateral width C1, the width of the intersection portion in the short direction of the second crossbar portion is called the lateral width C2, the lateral width C1 of the intersection portion is larger than the lateral width W1 of the first crossbar portion main body, The width C2 of the intersection part is larger than the width W2 of the second bar part main body. The wafer according to claim 1.

8. The frame part has an annular shape. The first bar part and the second bar part are orthogonal to each other at the central part in the longitudinal direction of the first bar part and the central part in the longitudinal direction of the second bar part. The value C1 / W1 obtained by dividing the width C1 of the intersection part by the width W1 of the first bar part main body is 1.8 to 2.

2. The value C2 / W2 obtained by dividing the width C2 of the intersection part by the width W2 of the second bar part main body is 1.5 to 2.

0. The wafer according to claim 7.

9. The frame part has an annular shape. The first bar part and the second bar part are orthogonal to each other at the central part in the longitudinal direction of the first bar part and the central part in the longitudinal direction of the second bar part. The width W2 of the second bar part main body is smaller than the width W1 of the first bar part main body. The wafer according to claim 7.

10. The value W2 / W1 obtained by dividing the width W2 of the second bar part main body by the width W1 of the first bar part main body is 0.6 < W2 / W1 < 1.

0. The wafer according to claim 9.

11. A plurality of positioning holes through which a plurality of pins for positioning the wafer are inserted are formed in one of the first bar part and the second bar part, or one or more of the positioning holes are formed in both the first bar part and the second bar part. The wafer according to claim 1.

12. Each of the third bar parts extends parallel to the second bar part. At least a part of the third bar parts has one end connected to the first bar part. The width in the short direction of the first bar part is larger than the width in the short direction of the second bar part. A plurality of the positioning holes are formed in the first bar part. The wafer according to claim 11.

13. The plurality of positioning holes formed in the first bar part include a first positioning hole and a second positioning hole. The first positioning hole and the second positioning hole are in a non-point-symmetric and non-line-symmetric relationship with each other in a plan view. At least one of the first positioning hole and the second positioning hole has a non-line-symmetric planar shape, or the first positioning hole and the second positioning hole have planar shapes that are line-symmetric with respect to different symmetry axes. The wafer according to claim 12.

14. The first positioning hole and the second positioning hole have different planar shapes from each other. The wafer according to claim 13.

15. The center of the planar shape of the first positioning hole and the center of the planar shape of the second positioning hole are each displaced from the center in the short side direction of the first crosspiece portion. The wafer according to claim 14. **Claim 16** The first positioning hole has a rectangular shape. The second positioning hole is quadrangular in plan view and has a rectangular shape in which the length of each side is shorter than the long side of the rectangle and longer than the short side. The wafer according to claim 15. **Claim 17** The wafer according to any one of claims 1 to 16, wherein the wafer is a quartz wafer.

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