Wafer

Abstract

To provide a wafer which can be properly positioned at a jig or the like, while being avoided from decreasing in the number of chips per wafer.SOLUTION: A wafer 1 comprises: a frame part 11 surrounding a chip formation region 10 in which a number of chips 30 are formed; a first crosspiece part 21 whose both ends are connected to the frame part 11; and a second crosspiece part 22 whose both ends are connected to the frame part 11 and which crosses the first crosspiece part 21, at the central part of the chip formation region 10. A plurality of positioning holes (41 and 42) through which a plurality of pins for positioning the wafer 1 is inserted, is formed in the first crosspiece part 21. Thus the positioning holes (41 and 42) are formed outside the chip formation region 10, which can avoid the number of chips 30 per wafer from decreasing due to the positioning holes (41 and 42).SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a wafer on which a large number of chips are formed.

Background Art

[0002] Japanese Patent Publication No. 2017-530569, FIG. 5 etc. describe a quartz substrate 8 provided with a large number of cutting positioning holes 9 for cutting chips by laser cutting or blade cutting.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When cutting individual chips from a quartz wafer on which a large number of cuttable chips are formed, it is necessary to position the quartz wafer at the correct position in the two-dimensional direction and fix it to a jig or the like. Since the quartz substrate 8 described in Japanese Patent Publication No. 2017-530569 is provided with a large number of cutting positioning holes 9, the chip formation range is reduced accordingly, and the number of chips per wafer is decreased. If the wafer is not fixed to a jig or the like at the correct position, there is a risk that the chips will be damaged when cutting.

[0005] The present invention has been made in view of such circumstances, and an object thereof is to provide a wafer that can be appropriately positioned with respect to a jig or the like while avoiding a decrease in the number of chips per wafer.

Means for Solving the Problems

[0006] One aspect of the present invention is a plate-like wafer on which a large number of chips are formed, having a frame portion surrounding a chip formation region where the chips are formed, a first crossbar portion with both ends connected to the frame portion, and a second crossbar portion with both ends connected to the frame portion and intersecting the first crossbar portion in the chip formation region, and a plurality of positioning holes through which a plurality of pins for positioning the wafer are inserted are formed in one of the first crossbar portion and the second crossbar portion, or one or more positioning holes are formed in both the first crossbar portion and the second crossbar portion. According to this configuration, by inserting pins into the plurality of positioning holes respectively, the position and orientation of the wafer on the plane with respect to a jig or the like are appropriately set. Further, since the positioning holes are formed outside the chip formation region, it is possible to avoid a decrease in the number of chips per wafer due to the positioning holes. Furthermore, since the positioning holes can be formed at a location away from the outer edge of the wafer, it becomes difficult to be restricted by a jig or the like, and the pins can be appropriately inserted into the positioning holes.

[0007] Preferably, in the wafer, a plurality of chips are provided so as to be cuttable respectively, and the wafer has a plurality of third crossbar portions extending parallel to the second crossbar portion respectively in the chip formation region, at least a part of the third crossbar portions has one end connected to the first crossbar portion, the lateral width of the first crossbar portion in the short side direction is larger than the lateral width of the second crossbar portion in the short side direction, and a plurality of positioning holes are formed in the first crossbar portion. According to this configuration, when cutting a chip from the third crossbar portion, since the external force accompanying the cutting does not directly act on the second crossbar portion via the third crossbar portion, the lateral width of the second crossbar portion may be smaller than the lateral width of the first crossbar portion. By reducing the lateral width of the second crossbar portion, the chip formation region becomes larger, and the number of chips per wafer can be increased. Further, since a plurality of positioning holes are formed in the first crossbar portion having a larger lateral width than the second crossbar portion, it becomes easier to suppress a decrease in the strength of the crossbar portion due to the formation of the positioning holes.

[0008] Preferably, the plurality of positioning holes formed in the first crossbar portion include a first positioning hole and a second positioning hole, and the first positioning hole and the second positioning hole are in a non-point-symmetric and non-line-symmetric relationship with each other in plan view. At least one of the first positioning hole and the second positioning hole has a non-line-symmetric planar shape, or the first positioning hole and the second positioning hole have planar shapes that are line-symmetric with respect to different axes of symmetry. As a result, when the correctly positioned wafer is rotated 180 degrees or when the front and back of the correctly positioned wafer are reversed, the arrangement of the first positioning hole and the second positioning hole becomes different from that of the correctly positioned wafer, so that the positioning pins cannot be inserted into these positioning holes.

[0009] Preferably, the first positioning hole and the second positioning hole have different planar shapes from each other. Thereby, it becomes easy to identify the first positioning hole and the second positioning hole by their planar shapes, and it becomes easy to confirm the position and orientation of the wafer by visual inspection or image recognition.

[0010] Preferably, the center of the planar shape of the first positioning hole and the center of the planar shape of the second positioning hole are each displaced from the center in the short side direction of the first crossbar portion. Thereby, it becomes easy to identify which of the first positioning hole and the second positioning hole each positioning hole is from the position and planar shape of each positioning hole in the short side direction of the first crossbar portion, and it becomes easy to confirm the position and orientation of the wafer by visual inspection or image recognition.

[0011] Preferably, the first positioning hole has a rectangular shape, and the second positioning hole is a quadrangle in plan view and has a rectangular shape in which the length of each side is shorter than the long side of the rectangle and longer than the short side. Thereby, the pin that fits into the first positioning hole becomes non-insertable into the second positioning hole, and the pin that fits into the second positioning hole becomes non-insertable into the first positioning hole. Also, by making the first positioning hole and the second positioning hole each have a simple rectangular shape, it becomes easy to form a precise shape and the positioning accuracy is improved.

Advantages of the Invention

[0012] According to the present invention, it is possible to provide a wafer that can be appropriately positioned with respect to a jig or the like while avoiding a decrease in the number of chips per wafer.

Brief Description of the Drawings

[0013]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Modes for Carrying Out the Invention

[0014] Hereinafter, a wafer according to an embodiment of the present invention will be described with reference to the drawings. The wafer according to the present embodiment is a plate-shaped wafer on which a large number of chips are formed, for example, a crystal wafer on which chips of a crystal oscillator are formed.

[0015] FIG. 1 is a diagram showing an example of a wafer according to the present embodiment. The wafer 1 shown in FIG. 1 has a frame portion 11 surrounding a chip formation region 10 in which a large number of chips 30 are formed, and a first bar portion 21 and a second bar portion 22 whose both ends are connected to the frame portion 11. The first bar portion 21 and the second bar portion 22 intersect in the chip formation region 10. In the example of FIG. 1, the first bar portion 21 and the second bar portion 22 are orthogonal to each other at the central portion in the longitudinal direction of the first bar portion 21 and the central portion in the longitudinal direction of the second bar portion 22. The intersection portion 200, which is the intersection of the first bar portion 21 and the second bar portion 22, is located approximately at the center of the chip formation region 10.

[0016] Here, when the crystal resonator is an AT-cut crystal resonator, the first crossbar portion 21 is parallel to the X-axis of the crystal, and the second crossbar portion 22 is parallel to the Z'-axis of the crystal. This is the arrangement of the crossbar portions corresponding to the AT-cut crystal resonator abbreviated as so-called X-long. Or, conversely, the first crossbar portion 21 is parallel to the Z'-axis of the crystal, and the second crossbar portion 22 is parallel to the X-axis of the crystal. This is the arrangement of the crossbar portions corresponding to the AT-cut crystal resonator abbreviated as so-called Z-long. Also, when the crystal resonator is a tuning fork type crystal resonator, the first crossbar portion 21 is parallel to the Y'-axis of the crystal, and the second crossbar portion 22 is parallel to the X-axis of the crystal. Further, when the crystal resonator is a two-fold rotation crystal resonator typified by SC-cut or the like, the first crossbar portion 21 is parallel to the X''-axis of the crystal, the second crossbar portion 22 is parallel to the Z''-axis of the crystal, or vice versa. In the above expression of the crystal axis, the crystal axis with a dash is shifted from the normal crystal axis due to the cutting angle of the crystal resonator.

[0017] The first crossbar portion 21 includes two first crossbar main bodies (210a, 210b) that are portions extending from the intersection portion 200 to the frame portion 11. Also, the second crossbar portion 22 includes two second crossbar main bodies (220a, 220b) that are portions extending from the intersection portion 200 to the frame portion 11. Hereinafter, the first crossbar main bodies 210a and 210b may be referred to as "first crossbar main body 210" without distinction, and the second crossbar main bodies 220a and 220b may be referred to as "second crossbar main body 220" without distinction.

[0018] As shown in FIG. 1, both the first crossbar portion 21 and the second crossbar portion 22 have a strip shape. The lateral width W1 of the first crossbar main body 210 in the short side direction (the horizontal direction of the paper surface of FIG. 1) of the first crossbar portion 21 and the lateral width W2 of the first crossbar main body 210 in the short side direction (the vertical direction of the paper surface of FIG. 1) of the second crossbar portion 22 are both substantially constant.

[0019] Also, as shown in FIG. 1, the lateral width C1 of the intersection portion 200 in the short side direction of the first bar portion 21 is larger than the lateral width W1 of the first bar portion main body 210. Further, the lateral width C2 of the intersection portion 200 in the short side direction of the second bar portion 22 is larger than the lateral width W2 of the second bar portion main body 220. That is, the intersection portion 200 has a larger width compared to the first bar portion main body 210 and the second bar portion main body 220. By increasing the width of the intersection portion 200, the strength of the intersection portion 200 is enhanced.

[0020] Furthermore, as shown in FIG. 1, the lateral width W1 of the first bar portion 21 in the short side direction is larger than the lateral width W2 of the second bar portion 22 in the short side direction. The second bar portion 22 is not directly connected to the third bar portion 23 described later, and the force from the third bar portion 23 does not directly act on it. Therefore, the second bar portion 22 can have a smaller lateral width than the first bar portion 21.

[0021] The wafer 1 shown in FIG. 1 has a plurality of third bar portions 23 on which a plurality of chips 30 are provided so as to be cuttable. The plurality of third bar portions 23 extend parallel to each other in the chip formation region 10. Also, the plurality of third bar portions 23 extend parallel to the second bar portion 22, respectively.

[0022] FIG. 2 is an enlarged view of the third bar portion 23 provided with the chip 30. As shown in FIG. 2, the third bar portion 23 has a strip shape, and the lateral width W3 in the short side direction (the vertical direction of the paper surface in FIG. 2) of the third bar portion 23 is substantially constant. A plurality of chips 30 of the same size are provided side by side at equal intervals on one side edge portion of the third bar portion 23. In the example of FIG. 2, electrodes 31 are formed on the front surface side and the back surface side of the chip 30, respectively. The chip 30 has a rectangular shape, and the chip 30 is connected to the third bar portion 23 on one side of the rectangular shape. A horizontally long through hole 32 is formed between the chip 30 and the third bar portion 23. Due to this through hole 32, the width of the portion connecting the chip 30 and the third bar portion 23 becomes narrow, so that the chip 30 can be easily folded and cut off from the third bar portion 23 by an automatic machine or the like.

[0023] The wafer 1 shown in FIG. 1 has fourth cross bars 24a to 24d (hereinafter, may be referred to as "fourth cross bar 24" without distinction) having one end connected to the frame portion 11 and the other end connected to the second cross bar 22. In the example of FIG. 1, the chip formation region 10 is divided into four regions by the first cross bar 21 and the second cross bar 22 that intersect at the center of the chip formation region 10, and one fourth cross bar 24 extends across each of these four regions. The fourth cross bar 24 has a strip shape, and the lateral width W4 in the short side direction of the fourth cross bar 24 (the horizontal direction of the paper surface of FIG. 1) is substantially constant.

[0024] The four fourth cross bars 24 are symmetric with respect to the first cross bar 21 and symmetric with respect to the second cross bar 22. That is, the pair of the fourth cross bar 24a and the fourth cross bar 24d, and the pair of the fourth cross bar 24b and the fourth cross bar 24c are symmetric with respect to the first cross bar 21, respectively. Also, the pair of the fourth cross bar 24a and the fourth cross bar 24b, and the pair of the fourth cross bar 24d and the fourth cross bar 24c are symmetric with respect to the second cross bar 22, respectively.

[0025] One end of the third cross bar 23 is connected to the fourth cross bar 24, and the other end is connected to the first cross bar 21 or the frame portion 11. That is, the third cross bar 23 does not directly extend from the first cross bar 21 to the frame portion 11, and is supported by the fourth cross bar 24 between the first cross bar 21 and the frame portion 11.

[0026] In the example of FIG. 1, some of the third cross bars 23 (the third cross bars 23 from the third row from the top to the third cross bars 23 from the fourth row from the bottom) are not connected to the fourth cross bar 24, but are connected between the frame portion 11 and the first cross bar 21.

[0027] In the example of FIG. 1, the first cross bar 21 and the second cross bar 22 are orthogonal. Also, the third cross bar 23 and the second cross bar 22 extend in parallel, and the fourth cross bar 24 and the first cross bar 21 extend in parallel. That is, the third cross bar 23 extends in a direction orthogonal to the first cross bar 21 and the fourth cross bar 24, respectively.

[0028] Also, in the example of FIG. 1, the outer shape of the wafer 1 is circular, and the frame portion 11 has an annular shape. The first bar portion 21 and the second bar portion 22 are orthogonal to each other at the central portion in the longitudinal direction of the first bar portion 21 and the central portion in the longitudinal direction of the second bar portion 22.

[0029] One end of the fourth bar portion 24 is connected to the central portion in the longitudinal direction of the second bar portion 22 (second bar portion main body 220) that crosses between the first bar portion 21 and the frame portion 11. In the example of FIG. 1, the length from the connection portion of the second bar portion 22 and the fourth bar portion 24 to the connection portion of the second bar portion 22 and the frame portion 11, and the length from the connection portion of the second bar portion 22 and the fourth bar portion 24 to the connection portion of the second bar portion 22 and the first bar portion 21 are substantially the same.

[0030] In the wafer 1 according to the present embodiment, at least a part of the inner edge of the frame portion 11 facing the chip formation region 10 is along a virtual circle 9 having a predetermined diameter. The first bar portion 21 and the second bar portion 22 intersect at substantially the central portion of this virtual circle 9.

[0031] When the diameter d of the virtual circle 9 is 92 [mm], it is desirable that the thickness and the width of each bar portion (21 to 24) are included in the following ranges, for example. Thickness of each bar portion (21 to 24): 0.08 to 0.10 [mm] Width W1 of the first bar portion main body 210: 3.00 to 4.37 [mm] Width W2 of the second bar portion main body 220: 3.00 to 4.52 [mm] Width W3 of the third bar portion 23: 0.18 to 0.25 [mm] Width W4 of the fourth bar portion 24: 0.15 to 0.30 [mm]

[0032] Also, in the wafer 1 according to the present embodiment, it is desirable that the value C1 / W1 obtained by dividing the lateral width C1 of the intersection portion 200 by the lateral width W1 of the first bar portion main body 210 is 1.8 to 2.2, and the value C2 / W2 obtained by dividing the lateral width C2 of the intersection portion 200 by the lateral width W2 of the second bar portion main body 220 is 1.5 to 2.0. That is, it is desirable that the intersection portion 200 has a lateral width about twice that of the first bar portion 21 and the second bar portion 22. Thereby, while suppressing a decrease in the chip formation region 10 due to the thickening of the first bar portion main body 210 and the second bar portion main body 220, the strength of the intersection portion 200 can be increased to make it difficult to cause breakage.

[0033] Furthermore, in the wafer 1 according to the present embodiment, it is desirable that the value W2 / W1 obtained by dividing the lateral width W2 of the second bar portion main body 220 by the lateral width W1 of the first bar portion main body 210 satisfies 0.6 < W2 / W1 < 1.0. Thereby, while maintaining the strength of the entire wafer obtained by the second bar portion 22 supporting the first bar portion 21 within an appropriate range, the lateral width W2 of the second bar portion main body 220 can be reduced to increase the number of chips 30 per wafer.

[0034] Also, in the wafer 1 according to the present embodiment, as shown in FIG. 1, the first positioning hole 41 and the second positioning hole 42 are formed in the first bar portion 21 having a larger lateral width than the second bar portion 22. Pins provided in a jig or the like are inserted into the first positioning hole 41 and the second positioning hole 42, respectively, to position the wafer 1 with respect to the jig or the like. In the following description, it is assumed that when the wafer 1 is in the correct positioning state, the first pin is inserted into the first positioning hole 41 and the second pin is inserted into the second positioning hole 42. Although details will be described later, the shapes and sizes of the first positioning hole 41 and the second positioning hole 42 are different in this case. Correspondingly, the diameters of the first pin and the second pin are also different.

[0035] In the example of FIG. 1, the planar shape of the first positioning hole 41 is rectangular, and the planar shape of the second positioning hole 42 is generally square. The long side of the rectangle of the first positioning hole 41 is parallel to the longitudinal direction of the first crossbar 21, and the short side of the rectangle is parallel to the lateral direction of the first crossbar 21. Also, a part of the sides of the square of the second positioning hole 42 is parallel to the longitudinal direction of the first crossbar 21, and the other sides of the square are parallel to the lateral direction of the first crossbar 21.

[0036] FIG. 3B shows an enlarged view of the vicinity of the first positioning hole 41, and FIG. 3A shows an enlarged view of the vicinity of the second positioning hole 42. As shown in FIGS. 3A and 3B, if the length of the long side of the rectangle of the first positioning hole 41 is "a", the length of the short side is "b", and the length of each side of the square of the second positioning hole 42 is "s", then the length "s" of each side of the second positioning hole 42 is shorter than the length "a" of the long side of the first positioning hole 41 and longer than the length "b" of the short side of the first positioning hole 41. Therefore, the first pin that fits the rectangular shape of the first positioning hole 41 cannot be inserted into the second positioning hole 42 because the length "a" of the long side of the rectangle is longer than the length "s" of the side of the square of the second positioning hole 42. Also, the second pin that fits the square shape of the second positioning hole 42 cannot be inserted into the first positioning hole 41 because the length "s" of the side of the square is longer than the length "b" of the short side of the rectangle of the first positioning hole 41.

[0037] The following is an example of the dimensions of the first positioning hole 41 and the second positioning hole 42 when the diameter d of the virtual circle 9 is 92 [mm]. Length a of the long side of the first positioning hole 41: 1.200 [mm] Length b of the short side of the first positioning hole 41: 0.805 [mm] Length s of each side of the second positioning hole 42: 1.005 [mm]

[0038] Also, the following is an example of the diameters of the first pin and the second pin. Diameter of the first pin: 0.8 [mm] Diameter of the second pin: 1.0 [mm]

[0039] In the example of FIG. 1, the center of the planar shape (square) of the first positioning hole 41 and the center of the planar shape (rectangle) of the second positioning hole 42 are each displaced from the center in the short side direction of the first crosspiece 21 (the horizontal direction of the paper surface of FIG. 1). In the example of FIG. 1, with respect to the center in the short side direction of the first crosspiece 21, the centers of the first positioning hole 41 and the second positioning hole 42 are displaced in opposite directions from each other. That is, with respect to the center in the short side direction of the first crosspiece 21, the center of the first positioning hole 41 is displaced to the left side, and the center of the second positioning hole 42 is displaced to the right side.

[0040] In the example of FIG. 1, the first positioning hole 41 and the second positioning hole 42 in the first crosspiece 21 are in a relationship of being non-point-symmetric and non-line-symmetric with respect to each other in a plan view.

[0041] Since the first positioning hole 41 and the second positioning hole 42 are in a non-point-symmetric relationship, even if the wafer 1 is rotated 180 degrees around an arbitrary point on the plane, the first positioning hole 41 and the second positioning hole 42 before and after the rotation do not overlap. That is, even if the wafer 1 in the correct positioning state is rotated 180 degrees around an arbitrary point on the plane, it is not possible to insert the first pin into the second positioning hole 42 while inserting the second pin into the first positioning hole 41. Therefore, the wafer 1 is not positioned in a state rotated 180 degrees with respect to the correct positioning state.

[0042] Since the first positioning hole 41 and the second positioning hole 42 are in a non-line-symmetric relationship, even if the wafer 1 is rotated around an arbitrary axis on the plane to reverse the front and back surfaces, the first positioning hole 41 and the second positioning hole 42 before and after the reversal of the front and back surfaces do not overlap. That is, even if the wafer 1 in the correct positioning state is rotated around an arbitrary axis on the plane to reverse the front and back surfaces, it is not possible to insert the first pin into the second positioning hole 42 while inserting the second pin into the first positioning hole 41. Therefore, the wafer 1 is not positioned in a state where the front and back surfaces are reversed with respect to the correct positioning state.

[0043] In addition, the first positioning hole 41 and the second positioning hole 42 shown in FIG. 1 have plane shapes that are line-symmetric with respect to different axes of symmetry. The plane shape of the first positioning hole 41 is rectangular, and the plane shape of the second positioning hole 42 is square. Both are line-symmetric shapes, but the axes of symmetry of their line symmetry are different. Therefore, for example, when the wafer 1 is rotated around the axis of symmetry of the rectangle of the first positioning hole 41 to reverse the front and back, while inserting the first pin into the first positioning hole 41, the second pin cannot be inserted into the second positioning hole 42. Also, when the wafer 1 is rotated around the axis of symmetry of the square of the second positioning hole 42 to reverse the front and back, while inserting the first pin into the first positioning hole 41, the second pin cannot be inserted into the second positioning hole 42. Therefore, even if the plane shapes of the first positioning hole 41 and the second positioning hole 42 are line-symmetric shapes respectively, the wafer 1 will not be positioned in a state where the front and back are reversed with respect to the correct positioning state.

[0044] As described above, according to the wafer 1 according to the present embodiment, a plurality of positioning holes (41, 42) through which a plurality of pins for positioning the wafer 1 are inserted are formed in the first bar portion 21. Therefore, by inserting pins into the plurality of positioning holes (41, 42) respectively, the position and orientation of the wafer 1 on the plane with respect to a jig or the like can be appropriately set. Also, since the positioning holes (41, 42) are formed outside the chip formation region 10, it is possible to avoid a decrease in the number of chips 30 per wafer due to the positioning holes (41, 42). Furthermore, since the positioning holes (41, 42) can be formed at a location away from the outer edge of the wafer 1, it becomes difficult to be restricted by jigs, devices, etc. arranged at positions close to the outer edge of the wafer 1, and the positioning pins can be appropriately inserted into the positioning holes (41, 42).

[0045] Also, according to the wafer 1 according to the present embodiment, a plurality of third bar portions 23, each provided with a plurality of chips 30 cuttably, extend in parallel with the second bar portions 22 in the chip formation region 10, respectively, and at least a part of the third bar portions 23 has one end connected to the first bar portion 21. When cutting the chip 30 from the third bar portion 23, the external force accompanying the cutting acts on the first bar portion 21 via the third bar portion 23, but does not act directly on the second bar portion 22. Therefore, the lateral width W2 of the second bar portion 22 can be made smaller than the lateral width W1 of the first bar portion 21. By making the lateral width W2 of the second bar portion 22 smaller, the chip formation region 10 becomes larger than when making it the same as the lateral width W1 of the first bar portion 21, and the number of chips 30 per wafer can be increased. Moreover, since a plurality of positioning holes (41, 42) are formed in the first bar portion 21 having a larger lateral width than the second bar portion 22, it becomes easier to suppress a decrease in the strength of the bar portion due to the formation of the positioning holes.

[0046] Also, according to the wafer 1 according to the present embodiment, the first positioning hole 41 and the second positioning hole 42 formed in the first bar portion 21 are in a non-point-symmetric and non-line-symmetric relationship with each other in a plan view, and have a line-symmetric planar shape with respect to different symmetry axes. Thereby, when the correctly positioned wafer 1 is rotated 180 degrees or when the front and back of the correctly positioned wafer 1 are reversed, the arrangement of the first positioning hole 41 and the second positioning hole 42 becomes different from that of the correctly positioned wafer 1. Therefore, it becomes impossible to insert the positioning pin into these positioning holes. Accordingly, it is possible to prevent the wafer 1 from being positioned in a state where the correctly positioned wafer 1 is rotated 180 degrees or in a state where the front and back of the correctly positioned wafer 1 are reversed.

[0047] Also, according to the wafer 1 according to the present embodiment, the first positioning hole 41 and the second positioning hole 42 have different planar shapes from each other. Thereby, since it becomes easier to visually distinguish the first positioning hole 41 and the second positioning hole 42 by the planar shape, it becomes easier to confirm the position and orientation of the wafer 1 by visual inspection or image recognition.

[0048] Further, according to the wafer 1 according to the present embodiment, the center of the planar shape (rectangle) of the first positioning hole 41 and the center of the planar shape (square) of the second positioning hole 42 are each displaced from the center in the short side direction of the first bar portion 21. Thereby, from the positions and planar shapes of the positioning holes in the short side direction of the first bar portion 21, it becomes easier to visually identify which of the first positioning hole and the second positioning hole each positioning hole is, and thus it becomes easier to confirm the position and orientation of the wafer 1 by visual inspection or image recognition.

[0049] Further, according to the wafer 1 according to the present embodiment, the first positioning hole 41 has a rectangular shape, the second positioning hole 42 has a square shape, and each side of the square of the second positioning hole 42 is shorter than the long side of the rectangle of the first positioning hole 41 and longer than the short side. Thereby, the first pin that fits into the first positioning hole 41 becomes non-insertable into the second positioning hole 42, and the second pin that fits into the second positioning hole 42 becomes non-insertable into the first positioning hole 41. Therefore, it is possible to reliably avoid an incorrect positioning state in which the first pin is inserted into the second positioning hole 42 and the second pin is inserted into the first positioning hole 41. Further, by making the first positioning hole 41 and the second positioning hole 42 each into a simple rectangular shape, it becomes easier to form each positioning hole into a precise shape, and the positioning accuracy is improved.

[0050] Note that the present invention is not limited only to the above-described embodiments and includes various variations.

[0051] In the example of the above-described embodiment, there are two positioning holes, but in other examples of the present embodiment, there may be three or more positioning holes.

[0052] In the example of the above-described embodiment, a plurality of positioning holes (41, 42) are formed only in the first crosspiece portion 21. However, in other examples of this embodiment, one or more positioning holes may be formed in each of the first crosspiece portion 21 and the second crosspiece portion 22. In a modified example of the wafer 1 shown in FIG. 4, one positioning hole 42a is formed in the first crosspiece portion 21, and another positioning hole 41a is formed in the second crosspiece portion 22. In still other examples of this embodiment, a plurality of positioning holes may be formed only in the second crosspiece portion 22.

[0053] In the example of the above-described embodiment, the second positioning hole 42 is square. However, in other examples of this embodiment, the second positioning hole 42 may have a rectangular shape other than square. Even if the second positioning hole 42 has a rectangular shape other than square, if each side of the rectangular shape is shorter than the long side of the rectangle of the first positioning hole 41 and longer than the short side, the first pin that fits into the first positioning hole 41 cannot be inserted into the second positioning hole 42, and the second pin that fits into the second positioning hole 42 cannot be inserted into the first positioning hole 41. Therefore, similar to the above, an incorrect positioning state of the wafer 1 can be avoided.

[0054] In the example of the above-described embodiment, the positioning holes (41, 42) are rectangular. However, in other examples of this embodiment, the positioning holes may have any shape other than rectangular.

[0055] In the example of the above-described embodiment, the first positioning hole 41 and the second positioning hole 42 each have a line-symmetric planar shape (square, rectangle). However, in other examples of this embodiment, at least one of the first positioning hole 41 and the second positioning hole 42 may have a non-line-symmetric planar shape. Thereby, when the front and back of the wafer 1 in the correct positioning state are reversed, for the positioning hole having a non-line-symmetric planar shape, the pin corresponding to the positioning hole cannot be inserted. Therefore, it is possible to prevent the wafer 1 from being positioned in a state where the front and back are reversed with respect to the correct positioning state.

[0056] The shape of the wafer is not limited to circular, and other shapes (such as quadrilateral) may also be used.

[0057] The base material of the wafer may be other than quartz, for example, it may be silicon.

[0058] In the example of the above-described embodiment, four fourth cross bars 24 are provided on the wafer 1. However, in other examples of this embodiment, the number of the fourth cross bars may be five or more, or may be three or less.

[0059] When two or more fourth cross bars are provided between the first cross bar and the frame portion, some of the third cross bars may be connected between the two fourth cross bars. That is, one end of the third cross bar may be connected to one fourth cross bar, and the other end of the third cross bar may be connected to another fourth cross bar.

[0060] In the modified example of the wafer 1 shown in FIG. 5, in four regions of the chip formation region 10 divided by the orthogonal first cross bar 21 and second cross bar 22, two fourth cross bars 24 extend respectively. That is, in the four regions, the fourth cross bars 24e and 24f extend through the region divided by the first cross bar main body 210a and the second cross bar main body 220b, the fourth cross bars 24g and 24h extend through the region divided by the first cross bar main body 210b and the second cross bar main body 220b, the fourth cross bars 24i and 24j extend through the region divided by the first cross bar main body 210b and the second cross bar main body 220a, and the fourth cross bars 24k and 24m extend through the region divided by the first cross bar main body 210a and the second cross bar main body 220a. Some of the third cross bars are connected between the two fourth cross bars 24 in each region (between 24e and 24f, between 24g and 24h, between 24i and 24j, between 24k and 24m).

Explanation of Reference Numerals

[0061] 1... wafer, 10... chip formation region, 11... frame portion, 21... first cross bar, 22... second cross bar, 23... third cross bar, 24... fourth cross bar, 24a~24k, 24m... fourth cross bar, 30... chip, 31... electrode, 32... through hole, 41, 41a... first positioning hole, 42, 42a... second positioning hole, 9... virtual circle

Claims

1. A plate-shaped wafer on which a plurality of chips are formed, a frame portion surrounding a chip formation region where the chips are formed, a first crossbar portion having both ends connected to the frame portion, a second crossbar portion having both ends connected to the frame portion and intersecting the first crossbar portion in the chip formation region, a plurality of positioning holes through which a plurality of pins for positioning the wafer are inserted are formed in one of the first crossbar portion and the second crossbar portion, or one or more of the positioning holes are formed in both the first crossbar portion and the second crossbar portion, wafer.

2. Each of the plurality of chips is provided so as to be cuttable, and has a plurality of third crossbar portions extending in parallel with the second crossbar portion in the chip formation region, at least a part of the third crossbar portions has one end connected to the first crossbar portion, the lateral width of the first crossbar portion in the short side direction is larger than the lateral width of the second crossbar portion in the short side direction, a plurality of the positioning holes are formed in the first crossbar portion, the wafer according to claim 1.

3. The plurality of positioning holes formed in the first crossbar portion include a first positioning hole and a second positioning hole, the first positioning hole and the second positioning hole are in a non-point-symmetric and non-line-symmetric relationship with each other in plan view, at least one of the first positioning hole and the second positioning hole has a non-line-symmetric planar shape, or the first positioning hole and the second positioning hole have planar shapes that are line-symmetric with respect to different symmetry axes, the wafer according to claim 2.

4. The first positioning hole and the second positioning hole have different planar shapes from each other, the wafer according to claim 3.

5. The center of the planar shape of the first positioning hole and the center of the planar shape of the second positioning hole are each displaced from the center in the short side direction of the first crossbar portion, the wafer according to claim 4.

6. The first positioning hole has a rectangular shape, the second positioning hole is a quadrangle in plan view and has a rectangular shape in which the length of each side is shorter than the long side of the rectangle and longer than the short side, the wafer according to claim 5.

7. The wafer is a quartz wafer, the wafer according to any one of claims 1 to 6.

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