Multilayer electronic component and mounting board

Abstract

To provide a multilayer electronic component with an excellent machine strength and electronic characteristic.SOLUTION: A multilayer electronic component 100a includes: a body 110 having a dielectric layer 111 and a first internal electrode 121 and a second internal electrode 122 alternately arranged in a first direction across the dielectric layer, the body also having a first surface and a second surface facing each other in the first direction, a third surface and a fourth surface connected to the first surface and the second surface and facing each other in a second direction, and a fifth surface and a sixth surface connected to the first to fourth surfaces and facing each other in a third direction; a first external electrode 131 and a second external electrode 132 arranged on the body and respectively connected to the first internal electrode and the second internal electrode; a first via electrode 141 penetrating the dielectric layer 111 and connecting two first internal electrodes adjacent to each other in the first direction; a second via electrode 142 penetrating the dielectric layer and connecting two second internal electrodes adjacent to each other in the first direction. The first via electrode and the second via electrode adjacent to each other in the first direction are displaced from each other.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a multilayer electronic component and a method for manufacturing the same.

Background Art

[0002] A multilayer ceramic capacitor (MLCC), which is one type of multilayer electronic component, is a chip-shaped capacitor that is mounted on a printed circuit board of various electronic products such as video devices like liquid crystal displays (LCDs) and plasma display panels (PDPs), computers, smartphones, and mobile phones, and serves to charge or discharge electricity. The MLCC has the advantages of being small in size while ensuring high capacitance and being easy to mount, and thus is used as a component in various electronic devices.

[0003] An MLCC generally includes a body including a plurality of internal electrodes alternately arranged with dielectric layers, and external electrodes arranged outside the body and connected to the plurality of internal electrodes.

[0004] On the other hand, in the firing process for manufacturing an MLCC, a phenomenon may occur in which the internal electrodes shrink or cracks occur in the body, resulting in the disconnection of the connection between the internal electrodes and the external electrodes. Due to such a phenomenon, a problem has occurred in that the capacitance of the MLCC decreases.

Summary of the Invention

Problems to be Solved by the Invention

[0005] One of the various objects of the present invention is to provide a multilayer electronic component having excellent mechanical strength and electrical characteristics.

[0006] However, the object of the present invention is not limited to the above content and can be more easily understood in the process of explaining specific embodiments of the present invention.

Means for Solving the Problem

[0007] One embodiment of the present invention includes a dielectric layer, and a first internal electrode and a second internal electrode that are alternately arranged in the first direction with the dielectric layer interposed therebetween. The first surface and the second surface facing each other in the first direction, the third surface and the fourth surface facing each other in the second direction and connected to the first surface and the second surface, and the fifth surface and the sixth surface facing each other in the third direction and connected to the first surface to the fourth surface. A main body having, a first external electrode and a second external electrode disposed on the main body and connected to the first internal electrode and the second internal electrode respectively, a first via electrode passing through the dielectric layer and connecting two adjacent first internal electrodes in the first direction, and a second via electrode passing through the dielectric layer and connecting two adjacent second internal electrodes in the first direction. The two first via electrodes adjacent to each other in the first direction are arranged offset from each other, and the two second via electrodes adjacent to each other in the first direction are arranged offset from each other, to provide a stacked electronic component.

[0008] One embodiment of the present invention has a first surface and a second surface facing each other in a first direction, a third surface and a fourth surface connected to the first surface and the second surface and facing each other in a second direction, and a fifth surface and a sixth surface connected to the first surface to the fourth surface and facing each other in a third direction, and includes a first dielectric layer, and a first internal electrode layer including a first internal electrode and a first auxiliary electrode disposed apart from each other in the second direction on the first dielectric layer, and a second dielectric layer, and a second internal electrode layer including a second internal electrode and a second auxiliary electrode disposed apart from each other in the second direction on the second dielectric layer, a main body in which the first internal electrode layer and the second internal electrode layer are alternately arranged in the first direction, a first external electrode and a second external electrode disposed on the main body and connected to the first internal electrode and the second internal electrode respectively, a first via electrode penetrating the first dielectric layer and connecting the first internal electrode and the second auxiliary electrode, a second via electrode penetrating the first dielectric layer and connecting the first auxiliary electrode and the second internal electrode, a third via electrode penetrating the second dielectric layer and connecting the second auxiliary electrode and the first internal electrode, and a fourth via electrode penetrating the second dielectric layer and connecting the second internal electrode and the first auxiliary electrode, and the first via electrode is arranged offset from the third via electrode adjacent to it in the first direction, and the second via electrode is arranged offset from the fourth via electrode adjacent to it in the first direction, and provides a multilayer electronic component.

[0009] One embodiment of the present invention provides a method for manufacturing a multilayer electronic component, including the steps of forming vias in a continuously supplied dielectric sheet, filling the vias with an electrode paste, printing an internal electrode pattern connected to the vias on the dielectric sheet, laminating the dielectric sheets on which the internal electrode pattern is printed to form a laminate, cutting the laminate to obtain a unit laminate, firing the unit laminate to obtain a main body, and forming external electrodes on the main body.

Advantages of the Invention

[0010] As one of various advantages of the present invention, it is possible to provide a multilayer electronic component excellent in mechanical strength and electrical characteristics.

Brief Description of the Drawings

[0011]

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Best Mode for Carrying Out the Invention

[0012] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Also, the embodiments of the present invention are provided to more fully explain the present invention to those having average knowledge in the technical field. Therefore, the shape and size of elements in the drawings may be enlarged or reduced (or emphasized or simplified) for clearer explanation.

[0013] In order to clearly explain the present invention, parts not related to the description are omitted in the drawings, the thickness is enlarged to clearly show various layers and regions, and components having the same function within the scope of the same concept are described using the same reference numerals. Further, throughout the specification, when a component is described as "including", it means that other components can be further included, rather than excluding other components, unless otherwise specified.

[0014] In the drawings, the first direction can be defined as the thickness (T) direction, the second direction as the length (L) direction, and the third direction as the width (W) direction.

[0015] (First Embodiment) FIG. 1 is a perspective view schematically showing a stacked electronic component according to the first embodiment of the present invention, FIG. 2 is a cross-sectional view schematically showing a cross-section cut along I-I' of FIG. 1, FIG. 3 is a cross-sectional view schematically showing a cross-section cut along II-II' of FIG. 1, FIG. 4 is a cross-sectional view schematically showing a cross-section cut along III-III' of FIG. 2, FIG. 5 is a cross-sectional view schematically showing a cross-section cut along IV-IV' of FIG. 2, FIG. 6 is a cross-sectional view schematically showing a cross-section cut along V-V' of FIG. 3, and FIGS. 7a to 7c are partial enlarged cross-sectional views of FIG. 2.

[0016] Hereinafter, with reference to FIGS. 1 to 7c, the stacked electronic component 100a according to the first embodiment of the present invention will be described in detail. Further, a multilayer ceramic capacitor will be described as an example of the stacked electronic component, but the present invention is not limited thereto and is applicable to various stacked electronic components, such as inductors, piezoelectric elements, varistors, or thermistors.

[0017] The size of the multilayer electronic component 100a is not particularly limited. However, the dimension (L size) of the multilayer electronic component 100a in the second direction is, for example, 0.2 mm to 3.2 mm, the dimension (W size) of the multilayer electronic component 100a in the third direction is, for example, 0.1 mm to 2.5 mm, and the dimension (T size) of the multilayer electronic component 100a in the first direction can be, for example, 0.05 mm to 2.5 mm.

[0018] The multilayer electronic component 100a according to the first embodiment of the present invention can include a main body 110 including a dielectric layer 111 and internal electrodes 121 and 122, external electrodes 131 and 132, and via electrodes 141 and 142.

[0019] The specific shape of the main body 110 is not particularly limited, but as shown in the drawing, the main body 110 can be formed in a hexahedron shape or a shape similar thereto. Due to the shrinkage of the main body 110 during the firing process and the polishing process at the corners of the main body 110, the main body 110 can have a substantially hexahedron shape although it does not have a hexahedron shape with perfect straight lines.

[0020] The main body 110 can have a first surface 1 and a second surface 2 facing each other in the first direction, a third surface 3 and a fourth surface 4 facing each other in the second direction and connected to the first surface 1 and the second surface 2, and a fifth surface 5 and a sixth surface 6 facing each other in the third direction and connected to the first surface 1, the second surface 2, the third surface 3, and the fourth surface 4.

[0021] The main body 110 can include a dielectric layer 111 and internal electrodes 121 and 122 laminated alternately with the dielectric layer 111. The plurality of dielectric layers 111 forming the main body 110 are in a fired state, and the boundary between adjacent dielectric layers 111 can be integrated to such an extent that it is difficult to confirm without using a scanning electron microscope (SEM).

[0022] The dielectric layer 111 can contain, for example, a perovskite-type compound represented by ABO 3 as a main component. ABO 3The perovskite-type compound represented by is, for example, BaTiO 3 , (Ba 1-x Ca x )TiO 3 (0 < x < 1), Ba(Ti 1-y Ca y )O 3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O 3 (0 < x < 1, 0 < y < 1), Ba(Ti 1-y Zr y )O 3 (0 < y < 1), CaZrO 3 , or (Ca 1-x Sr x )(Zr 1-y Ti y )O 3 (0 < x ≤ 0.5, 0 < y ≤ 0.5).

[0023] The average thickness of the dielectric layer 111 is not particularly limited. The average thickness of the dielectric layer 111 can be, for example, 0.1 μm to 10 μm, 0.1 μm to 5 μm, 0.1 μm to 2 μm, or 0.1 μm to 0.4 μm.

[0024] The main body 110 can include a first internal electrode 121 and a second internal electrode 122 that are alternately arranged in the first direction with the dielectric layer 111 interposed therebetween. That is, the first internal electrode 121 and the second internal electrode 122, which are a pair of electrodes having different polarities, can be arranged so as to face each other with the dielectric layer 111 interposed therebetween. The first internal electrode 121 and the second internal electrode 122 can be electrically separated from each other by the dielectric layer 111 disposed therebetween.

[0025] The first internal electrode 121 can be separated from the fourth surface 4 and connected to the first external electrode 131 at the third surface 3. The second internal electrode 122 can be separated from the third surface 3 and connected to the second external electrode 132 at the fourth surface 4.

[0026] The metal contained in the internal electrodes 121 and 122 is one or more of Ni, Cu, Pd, Ag, Au, Pt, Sn, W, Ti, and alloys thereof, and more preferably, it can contain Ni, but the present invention is not limited thereto.

[0027] The average thickness of the internal electrodes 121 and 122 is not particularly limited. The average thickness of the internal electrodes 121 and 122 can be, for example, 0.1 μm to 3.0 μm, 0.1 μm to 1.0 μm, or 0.1 μm to 0.4 μm.

[0028] The average thickness of the dielectric layer 111 and the average thickness of the internal electrodes 121 and 122 respectively mean the average dimensions of the dielectric layer 111 and the internal electrodes 121 and 122 in the first direction. The average thickness of the dielectric layer 111 and the average thickness of the internal electrodes 121 and 122 can be measured by scanning the cross-sections of the main body 110 in the first and second directions with a scanning electron microscope (SEM) at a magnification of 10,000 times. More specifically, after measuring the thicknesses at a number of points of one dielectric layer 111, for example, 30 points equally spaced in the second direction, the average value can be taken to measure the average thickness of the dielectric layer 111. Also, after measuring the thicknesses at a number of points of one internal electrode 121 or 122, for example, 30 points equally spaced in the second direction, the average value can be taken to measure the average thickness of the internal electrodes 121 and 122. The 30 equally spaced points can be specified by the capacitance forming portion Ac. On the other hand, after performing such measurement of the average value for 10 dielectric layers 111 and 10 internal electrodes 121 and 122 respectively, and then measuring the average value, the average thickness of the dielectric layer 111 and the average thickness of the internal electrodes 121 and 122 can be further generalized.

[0029] The main body 110 can include a capacitance forming portion Ac which is disposed inside the main body 110, in which the first internal electrode 121 and the second internal electrode 122 are alternately arranged in the first direction with the dielectric layer 111 interposed therebetween to form a capacitance, and cover portions 112 and 113 which are disposed on both surfaces facing each other in the first direction of the capacitance forming portion Ac. The cover portions 112 and 113 can have a configuration similar to that of the dielectric layer 111 except that they do not contain internal electrodes.

[0030] The average thickness of the cover portions 112 and 113 is not particularly limited. The average thickness of the cover portions 112 and 113 can be, for example, 40 μm or less, 30 μm or less, or 20 μm or less. The average thickness of the cover portions 112 and 113 can be, for example, 5 μm or more, or 10 μm or more. Here, the average thickness of the cover portions 112 and 113 means the respective average thicknesses of the first cover portion 112 and the second cover portion 113.

[0031] The average thickness of the cover portions 112 and 113 means the average dimension of the cover portions 112 and 113 in the first direction, and can be a value obtained by averaging the dimensions of the cover portions 112 and 113 in the first direction measured at five points equally spaced in the second direction in the cross-sections in the first and second directions obtained by cutting the main body 110 at the center in the third direction.

[0032] The main body 110 can include margin portions 114 and 115 disposed on both surfaces facing each other in the third direction of the capacitance forming portion Ac. That is, the margin portions 114 and 115 can mean the regions between the interfaces of the both ends of the internal electrodes 121 and 122 and the main body 110 in the cross-section obtained by cutting the main body 110 in the first and third directions. The margin portions 114 and 115 can have a configuration similar to that of the dielectric layer 111 except for not including the internal electrodes 121 and 122.

[0033] The average thickness of the margin portions 114 and 115 is not particularly limited. The average thickness of the margin portions 114 and 115 can be, for example, 40 μm or less, 20 μm or less, or 15 μm or less. The average thickness of the margin portions 114 and 115 can be, for example, 2 μm or more, or 10 μm or more. Here, the average thickness of the margin portions 114 and 115 means the respective average thicknesses of the first margin portion 114 and the second margin portion 115.

[0034] The average thickness of the margin portions 114 and 115 means the average dimension of the margin portions 114 and 115 in the third direction, and can be a value obtained by averaging the dimensions of the margin portions 114 and 115 in the third direction measured at five points equally spaced in the first direction in the cross section in the first and third directions cut at the center in the second direction of the main body 110.

[0035] The first external electrode 131 and the second external electrode 132 can be disposed on the main body 110 and connected to the first internal electrode 121 and the second internal electrode 122 respectively. The first external electrode 131 is disposed on the third surface 3 and can extend onto a part of the first surface 1 and the second surface 2. The second external electrode 132 is disposed on the fourth surface 4 and can extend onto a part of the first surface 1 and the second surface 2. The first external electrode 131 and the second external electrode 132 can also extend onto a part of the fifth surface 5 and the sixth surface 6 respectively.

[0036] The types of the external electrodes 131 and 132 are not particularly limited and may have a multilayer structure. The external electrodes 131 and 132 can include, for example, a base electrode layer that contacts the internal electrodes 121 and 122, and a plating layer disposed on the base electrode layer. The base electrode layer can include, for example, one or more of a fired electrode layer, a conductive resin layer, and a thin film electrode layer.

[0037] The fired electrode layer can include a metal and a glass. The metal included in the fired electrode layer can include one or more of Cu, Ni, Pd, Pt, Au, Ag, Pb, and alloys thereof, but the present invention is not limited thereto. The glass included in the base electrode layer can include one or more oxides of Ba, Ca, Zn, Al, B, and Si, but the present invention is not limited thereto.

[0038] The above conductive resin layer can contain metal particles and a resin. The metal particles contained in the above conductive resin layer can contain one or more of spherical particles and flaky particles. Here, the spherical particles can also include forms that are not completely spherical. For example, it can include forms where the ratio of the length of the major axis to the minor axis (major axis / minor axis) is 1.45 or less. The flaky particles mean particles having a flat and long form. For example, the ratio of the length of the major axis to the minor axis (major axis / minor axis) can be 1.95 or more. The metal particles contained in the above conductive resin layer can contain, for example, one or more of Cu, Ni, Pd, Pt, Au, Ag, Pb, Sn, and alloys thereof. The resin contained in the above conductive resin layer can contain, for example, one or more of epoxy resin, acrylic resin, and ethyl cellulose.

[0039] The above conductive resin layer can, for example, be made of a conductive polymer. The above conductive polymer can contain, for example, one or more of polypyrrole, polyaniline, polythiophene, and PEDOT:PSS.

[0040] The above thin film electrode layer can be formed, for example, by an electrolytic plating method, an electroless plating method, an atomic layer deposition (ALD) method, a chemical vapor deposition (CVD) method, and / or a sputtering method.

[0041] The above base electrode layer can, for example, be the above fired electrode layer, or can be in a form where the above fired electrode layer and the conductive resin layer are laminated in order, or can be in a form where the above thin film electrode layer and the fired electrode layer are laminated in order.

[0042] The above plating layer can improve mounting characteristics. The above plating layer can contain, for example, Ni, Sn, Pd, and / or alloys thereof, and can be formed of a plurality of layers. The above plating layer can, for example, be a Ni plating layer or a Sn plating layer, or can be in a form where a Ni plating layer and a Sn plating layer are formed in order. Also, the above plating layer can contain a plurality of Ni plating layers and / or a plurality of Sn plating layers.

[0043] In the drawings, a structure in which the multilayer electronic component 100a has two external electrodes 131 and 132 is described, but the present invention is not limited thereto, and the number and shape of the external electrodes 131 and 132 can vary depending on the form of the internal electrodes 121 and 122 and other purposes.

[0044] The multilayer electronic component 100a according to the first embodiment of the present invention can include a first via electrode 141 that penetrates the dielectric layer 111 and connects two first internal electrodes 121 adjacent to each other in the first direction, and a second via electrode 142 that penetrates the dielectric layer 111 and connects two second internal electrodes 122 adjacent to each other in the first direction. The first via electrode 141 can connect adjacent ones of the plurality of first internal electrodes 121, and the second via electrode 142 can connect adjacent ones of the plurality of second internal electrodes 122.

[0045] The first via electrode 141 can penetrate, for example, a region adjacent to the third surface 3 of the dielectric layer 111. The first via electrode 141 can penetrate a region where the third surface 3 and the second internal electrode 122 are separated from each other in the second direction (hereinafter referred to as a first margin region).

[0046] The second via electrode 142 can penetrate, for example, a region adjacent to the fourth surface 4 of the dielectric layer 111. The second via electrode 142 can penetrate a region where the fourth surface 4 and the first internal electrode 121 are separated from each other in the second direction (hereinafter referred to as a second margin region).

[0047] Conventionally, there has been a problem that the connection between the internal electrode and the external electrode is broken due to shrinkage of the internal electrode during the firing process or cracks generated in the main body. As the number of internal electrodes whose connection to the external electrode is broken increases among the plurality of internal electrodes, the capacitance of the multilayer electronic component decreases.

[0048] In contrast, according to the first embodiment of the present invention, even if some of the internal electrodes 121 and 122 contract during the firing process and the contact with the external electrodes 131 and 132 is broken at the third surface 3 or the fourth surface 4, the corresponding internal electrodes can be electrically connected to the external electrodes 131 and 132 via the via electrodes 141 and 142 and the internal electrodes 121 and 122 of other layers. Thereby, it is possible to prevent the capacitance of the multilayer electronic component 100a from decreasing.

[0049] According to the first embodiment of the present invention, two first via electrodes 141 adjacent in the first direction can be arranged so as to be displaced from each other, and two second via electrodes 142 adjacent in the first direction can be arranged so as to be displaced from each other. Here, two via electrodes adjacent in the first direction can mean one via electrode that contacts the upper surface of the same internal electrode and another via electrode that contacts the lower surface of the same internal electrode in a cross section of the main body in the first and second directions or in a cross section of the main body in the first and third directions. Further, when there are a plurality of via electrodes that contact the upper surface and the lower surface, respectively, two via electrodes adjacent in the first direction can mean one via electrode that contacts the upper surface of the same internal electrode and another via electrode that is closest to the first or third direction among the plurality of via electrodes that contact the lower surface of the same internal electrode.

[0050] Referring to FIG. 7a, the fact that two via electrodes 141 adjacent in the first direction are arranged so as to be displaced from each other can mean, for example, that in a cross section of the main body 110 in the first and second directions, a virtual line L1 connecting the midpoints of the upper and lower surfaces of one via electrode 141 that respectively contact two adjacent internal electrodes 121 and a virtual line L2 connecting the midpoints of the upper and lower surfaces of the other via electrode 141 that respectively contact two adjacent internal electrodes 121 do not coincide with each other.

[0051] By arranging two via electrodes 141 and 142 adjacent to each other in the first direction so as to be displaced from each other, the via electrodes 141 and 142 can be dispersedly arranged within the margin region. Thereby, the via electrodes 141 and 142 can effectively support the margin region. That is, the step due to the difference in the number of stacked layers of the internal electrodes 121 and 122 between the margin region and the capacitance forming portion Ac, the density difference between the region where the via electrodes 141 and 142 are arranged and the region where the via electrodes 141 and 142 are not arranged within the margin region, or the external stress, the phenomenon that the margin region is recessed can be suppressed.

[0052] In one embodiment, two first via electrodes 141 adjacent to each other in the first direction may not overlap each other in the first direction, and two second via electrodes 142 adjacent to each other in the first direction may not overlap each other in the first direction.

[0053] When two via electrodes 141 and 142 adjacent to each other in the first direction are arranged so as to be displaced from each other in the first direction, the effect of improving the mechanical strength of the stacked electronic component 100a intended in the present invention can be exhibited. However, when two via electrodes 141 and 142 adjacent to each other in the first direction do not overlap each other in the first direction, the effect of improving the mechanical strength of the present invention can be more remarkable.

[0054] Referring to FIG. 7a, the fact that two via electrodes adjacent to each other in the first direction do not overlap each other in the first direction means that a virtual line TL in the first direction that contacts one via electrode at the point where the width of one via electrode is maximum does not intersect the other via electrode.

[0055] In one embodiment, a plurality of first via electrodes 141 and second via electrodes 142 penetrating the same dielectric layer 111 can be respectively arranged. The plurality of first via electrodes 141 and second via electrodes 142 penetrating the same dielectric layer 111 can be arranged in the second direction and the third direction, for example.

[0056] Referring to FIGS. 5 and 6, a plurality of first via electrodes 141 penetrating the same dielectric layer 111 are arranged to be displaced from each other with reference to the second direction and the third direction, thereby forming the first lattice pattern LP1 or the third lattice pattern LP3.

[0057] The first lattice pattern LP1 and the third lattice pattern LP3 can be alternately arranged with each other in the main body 110 with the first internal electrode 121 interposed therebetween. The first lattice pattern LP1 and the third lattice pattern LP3 can be non-overlapping with each other in the first direction. That is, the first lattice pattern LP1 and the third lattice pattern LP3 each including a plurality of first via electrodes 141 arranged in a staggered manner are non-overlapping with each other in the first direction, so that the effect of improving the mechanical strength of the present invention can be made more remarkable.

[0058] Similarly, a plurality of second via electrodes 142 penetrating the same dielectric layer 111 are arranged to be displaced from each other with reference to the second direction and the third direction, thereby forming the second lattice pattern LP2 or the fourth lattice pattern LP4.

[0059] The second lattice pattern LP2 and the fourth lattice pattern LP4 can be alternately arranged with each other in the main body 110 with the second internal electrode 122 interposed therebetween. The second lattice pattern LP2 and the fourth lattice pattern LP4 can be non-overlapping with each other in the first direction. That is, the second lattice pattern LP2 and the fourth lattice pattern LP4 each including a plurality of second via electrodes 142 arranged in a staggered manner are non-overlapping with each other in the first direction, so that the effect of improving the mechanical strength of the present invention can be made more remarkable.

[0060] The number of via electrodes 141 and 142 forming one lattice pattern LP1, LP2, LP3, LP4 is not particularly limited and can vary depending on the size of the multilayer electronic component 100a, the size of the via electrodes 141 and 142, and the like. For example, the number of via electrodes 141 and 142 forming one lattice pattern LP1, LP2, LP3, LP4 can be 5 or more and 1000 or less.

[0061] Referring to FIGS. 7b and 7c, in one embodiment, the first via electrode 141 is in a form in which a plurality of first unit vias UV1 are stacked in a first direction, and the second via electrode 142 can be in a form in which a plurality of second unit vias UV2 are stacked in the first direction. The via electrodes 141 and 142 can be formed, for example, by stacking a plurality of dielectric sheets in which vias are formed, whereby a plurality of unit vias UV1 and UV2 can have a form in which they are stacked in the first direction.

[0062] Since the via electrodes 141 and 142 are formed, for example, by stacking a plurality of dielectric sheets in which vias are formed, the plurality of stacked unit vias UV1 and UV2 may not be perfectly aligned with each other. As a result, the central axes CA1 of the plurality of stacked first unit vias UV1 may not coincide with each other, and the central axes CA2 of the plurality of stacked second unit vias UV2 may not coincide with each other. However, the present invention is not limited thereto, and the central axes CA1 and CA2 of the plurality of stacked unit vias UV1 and UV2 may coincide with each other.

[0063] In one embodiment, the width of the upper surface of the first unit via UV1 can be wider than the width of the lower surface of the first unit via UV1, and the width of the upper surface of the second unit via UV2 can be wider than the width of the lower surface of the second unit via UV2.

[0064] As described later, the via formed in the dielectric sheet can be formed, for example, by irradiating the dielectric sheet with a laser. At this time, the amount of energy of the laser light can decrease from one surface of the dielectric sheet irradiated with the laser toward the opposite other surface. As a result, the width of the first unit via UV1 gradually becomes narrower as it approaches the lower surface of the first unit via UV1 from the upper surface of the first unit via UV1, and the width of the second unit via UV2 can gradually become narrower as it approaches the lower surface of the second unit via UV2 from the upper surface of the second unit via UV2.

[0065] However, the present invention is not limited thereto, and by adjusting the irradiation conditions of the laser, the cross-sections of the unit vias UV1 and UV2 can have various forms in addition to trapezoids, and the side walls of the unit vias UV1 and UV2 may have curved surfaces.

[0066] On the other hand, the maximum widths of the unit vias UV1 and UV2 can vary depending on the size of the stacked electronic component 100a, the thickness of the dielectric layer 111, etc. The maximum widths of the unit vias UV1 and UV2 are not particularly limited, but for example, they can be 0.03 μm to 3.0 μm.

[0067] FIG. 8 is a perspective view schematically showing a stacked electronic component according to a first modification of the first embodiment of the present invention, FIG. 9 is a cross-sectional view schematically showing a cross-section cut along VI-VI' of FIG. 8, and FIG. 10 is a cross-sectional view schematically showing a cross-section cut along VII-VII' of FIG. 9.

[0068] Hereinafter, with reference to FIGS. 8 to 10, the stacked electronic component 100b according to the first modification of the first embodiment of the present invention will be described. The same / similar reference numerals are used for the same / similar configurations as those of the stacked electronic component 100a described with reference to FIGS. 1 to 7c, and redundant descriptions are omitted.

[0069] The stacked electronic component 100b can include a first connection electrode 151 that penetrates the cover portions 112 and 113 and connects the first internal electrode 121 and the first external electrode 131 disposed on the outermost side with reference to the first direction, and a second connection electrode 152 that penetrates the cover portions 112 and 113 and connects the second internal electrode 122 and the second external electrode 132 disposed on the outermost side with reference to the first direction. The first connection electrode 151 and the second connection electrode 152 can be respectively disposed on the first cover portion 112 and the second cover portion 113.

[0070] The connection electrodes 151 and 152 can be formed, for example, by laminating two or more cover portion forming sheets in which vias are formed. As a result, the connection electrodes 151 and 152 can have a form in which a plurality of unit vias are laminated in the first direction. The number of unit vias forming the connection electrodes 151 and 152 is not particularly limited and can vary depending on the number of the cover portion forming sheets.

[0071] The number and arrangement form of the connection electrodes 151 and 152 are not particularly limited, and one or more of the connection electrodes 151 and 152 can be arranged on the first cover portion 112 and the second cover portion 113, respectively.

[0072] The connection electrodes 151 and 152 connect the internal electrodes 121 and 122 arranged on the outermost side with respect to the first direction and the regions extending on the first surface 1 or the second surface 2 of the external electrodes 131 and 132, thereby increasing the current path of the multilayer electronic component 100b. As a result, the equivalent series resistance (ESR) of the multilayer electronic component 100b can be reduced.

[0073] FIG. 11 is a perspective view schematically showing a multilayer electronic component according to a second modification of the first embodiment of the present invention, FIG. 12 is a cross-sectional view schematically showing a cross-section cut along VIII-VIII' of FIG. 11, and FIG. 13 is a cross-sectional view schematically showing a cross-section cut along IX-IX' of FIG. 12.

[0074] Hereinafter, with reference to FIGS. 11 to 13, the multilayer electronic component 100c according to the second modification of the first embodiment of the present invention will be described. The same / similar reference numerals are used for the same / similar configurations as those of the multilayer electronic components 100a and 100b described with reference to FIGS. 1 to 10, and redundant descriptions are omitted.

[0075] The external electrodes 131c and 132c of the multilayer electronic component 100c can have a bottom electrode structure. For example, the first external electrode 131c and the second external electrode 132c can be respectively arranged on the second surface 2 and not arranged on the first surface 1. The first external electrode 131c and the second external electrode 132c can be not arranged on the third surface 3, the fourth surface 4, the fifth surface 5 and the sixth surface 6. However, the present invention is not limited thereto, and the first external electrode 131c and the second external electrode 132c may extend on at least one of the third surface 3, the fourth surface 4, the fifth surface 5 and the sixth surface 6.

[0076] The multilayer electronic component 100c can include a first connection electrode 151 that penetrates the cover portion 113 and connects the first internal electrode 121c disposed on the outermost side with reference to the first direction and the first external electrode 131c, and a second connection electrode 152 that penetrates the cover portion 113 and connects the second internal electrode 122c disposed on the outermost side with reference to the first direction and the second external electrode 132c. The first connection electrode 151 and the second connection electrode 152 can be arranged on the second cover portion 113 and not arranged on the first cover portion 112.

[0077] The internal electrodes 121c and 122c may be arranged, for example, separated from the third surface 3, the fourth surface 4, the fifth surface 5 and the sixth surface 6. The internal electrodes 121c and 122c are not exposed on the outer surface of the main body 110, thereby preventing the moisture resistance reliability of the multilayer electronic component 100c from decreasing.

[0078] By arranging the external electrodes 131c and 132c only on the second surface 2, miniaturization of the multilayer electronic component 100c can be achieved, and the distortion strength of the multilayer electronic component 100c can be improved.

[0079] FIG. 14 is a perspective view schematically showing a multilayer electronic component according to a third modification of the first embodiment of the present invention, FIG. 15 is a cross-sectional view schematically showing a cross-section cut along X-X' of FIG. 14, and FIG. 16 is a cross-sectional view schematically showing a cross-section cut along XI-XI' of FIG. 15.

[0080] Hereinafter, with reference to FIGS. 14 to 16, the multilayer electronic component 100d according to the third modification of the first embodiment of the present invention will be described. The same / similar reference numerals are used for the same / similar configurations as those of the multilayer electronic components 100a, 100b, and 100c described with reference to FIGS. 1 to 13, and redundant descriptions will be omitted.

[0081] The first external electrodes 131d of the multilayer electronic component 100d can be respectively arranged on the first surface 1 and the second surface 2, and the second external electrodes 132d can be respectively arranged on the first surface 1 and the second surface 2. The first external electrodes 131d and the second external electrodes 132d arranged on the first surface 1 can be arranged separately from the first external electrodes 131d and the second external electrodes 132d arranged on the second surface 2. The first external electrodes 131c and the second external electrodes 132c cannot be arranged on the third surface 3, the fourth surface 4, the fifth surface 5, and the sixth surface 6. However, the present invention is not limited thereto, and the first external electrodes 131d and the second external electrodes 132d may extend on at least one of the third surface 3, the fourth surface 4, the fifth surface 5, and the sixth surface 6.

[0082] The multilayer electronic component 100d can include a first connection electrode 151 that penetrates the cover portions 112 and 113 and connects the first internal electrode 121d arranged on the outermost side with respect to the first direction and the first external electrode 131d, and a second connection electrode 152 that penetrates the cover portions 112 and 113 and connects the second internal electrode 122d arranged on the outermost side with respect to the first direction and the second external electrode 132d. The first connection electrode 151 and the second connection electrode 152 can be respectively arranged on the first cover portion 112 and the second cover portion 113.

[0083] The internal electrodes 121d and 122d may be arranged separately from the third surface 3, the fourth surface 4, the fifth surface 5, and the sixth surface 6. The internal electrodes 121d and 122d are not exposed on the outer surface of the main body 110, thereby preventing the moisture resistance reliability of the multilayer electronic component 100d from decreasing.

[0084] In addition, in the multilayer electronic component 100d, since the external electrodes 131d and 132d are respectively arranged on the first surface 1 and the second surface 2, mounting convenience can be ensured as compared with the multilayer electronic component 100c.

[0085] FIG. 17 is a perspective view schematically showing a multilayer electronic component according to a fourth modification of the first embodiment of the present invention, FIG. 18 is a cross-sectional view schematically showing a cross-section cut along XII-XII' of FIG. 17, and FIG. 19 is a cross-sectional view schematically showing a cross-section cut along XIII-XIII' of FIG. 18.

[0086] Hereinafter, with reference to FIGS. 17 to 19, the multilayer electronic component 100e according to the fourth modification of the first embodiment of the present invention will be described. The same / similar reference numerals are used for the same / similar configurations as those of the multilayer electronic component 100a described with reference to FIGS. 1 to 7c, and redundant descriptions will be omitted.

[0087] The first via electrode 141e of the multilayer electronic component 100e can have a form in which a plurality of first unit vias UV1 are stacked in the first direction, and the second via electrode 142e can have a form in which a plurality of second unit vias UV2 are stacked in the first direction.

[0088] The main body 110 of the multilayer electronic component 100e includes a first auxiliary electrode 123 that is arranged at a distance from the first internal electrode 121 in the second direction and is arranged between a plurality of second unit vias UV2 stacked in the first direction, and a second auxiliary electrode 124 that is arranged at a distance from the second internal electrode 122 in the second direction and is arranged between a plurality of first unit vias UV1 stacked in the first direction.

[0089] The first auxiliary electrode 123 can be connected to the second external electrode 132 on the fourth surface 4, and the second auxiliary electrode 124 can be connected to the first external electrode 131 on the third surface 3. However, the present invention is not limited thereto, and the first auxiliary electrode 123 may be arranged at a distance from the fourth surface 4, and the second auxiliary electrode 124 may be arranged at a distance from the third surface 3.

[0090] The first auxiliary electrode 123 can be connected to a plurality of second via electrodes 142e, and the second auxiliary electrode 124 can be connected to a plurality of first via electrodes 141e. For example, a plurality of second via electrodes 142e passing through the same dielectric layer 111 can pass through the same first auxiliary electrode 123, and a plurality of first via electrodes 141e passing through the same dielectric layer 111 can pass through the same second auxiliary electrode 124.

[0091] By arranging the auxiliary electrodes 123 and 124, it is possible to suppress the generation of steps due to the difference in the number of stacked layers with the capacitance forming portion Ac, and thereby more effectively suppress the phenomenon that the above-mentioned margin region is recessed. Further, by appropriately arranging the auxiliary electrodes 123 and 124, even if the alignment of the unit vias UV1 and UV2 constituting the via electrodes 141e and 142e is shifted, the electrical connection between the adjacent internal electrodes 121 and 122 can be stably ensured.

[0092] The metal contained in the auxiliary electrodes 123 and 124 can be one or more of Ni, Cu, Pd, Ag, Au, Pt, Sn, W, Ti, and alloys thereof. The auxiliary electrodes 123 and 124 can contain the same metal as the internal electrodes 121 and 122, but the present invention is not limited thereto.

[0093] On the other hand, in order to prevent a short circuit due to the contact between the internal electrodes 121 and 122 to which voltages of different polarities are applied and the auxiliary electrodes 123 and 124, the distance in the second direction between the first internal electrode 121 and the first auxiliary electrode 123 or the distance in the second direction between the second internal electrode 122 and the second auxiliary electrode 124 is preferably 10% to 90% of the distance between the first internal electrode 121 and the fourth surface 4 or the distance between the second internal electrode 122 and the third surface 3.

[0094] (Second Embodiment) FIG. 20 is a perspective view schematically showing a multilayer electronic component according to a second embodiment of the present invention, FIG. 21 is an exploded perspective view schematically showing the main body of the multilayer electronic component according to the second embodiment of the present invention, FIG. 22 is a cross-sectional view schematically showing a cross-section cut along XIV-XIV' of FIG. 20, FIG. 23 is a cross-sectional view schematically showing a cross-section cut along XV-XV' of FIG. 22, FIG. 24 is a plan view schematically showing a first internal electrode layer of the multilayer electronic component according to the second embodiment of the present invention, and FIG. 25 is a plan view schematically showing a second internal electrode layer of the multilayer electronic component according to the second embodiment of the present invention.

[0095] Hereinafter, with reference to FIGS. 20 to 25, a multilayer electronic component 200a according to a second embodiment of the present invention will be described. The same / similar reference numerals are used for the same / similar configurations as those of the multilayer electronic component 100a described with reference to FIGS. 1 to 6, and redundant descriptions will be omitted.

[0096] The multilayer electronic component 200a according to the second embodiment of the present invention can include a main body 210, external electrodes 231 and 232, and via electrodes 241, 242, 243, and 244.

[0097] The main body 210 can have a first surface 1 and a second surface 2 facing each other in a first direction, a third surface 3 and a fourth surface 4 facing each other in a second direction and connected to the first surface 1 and the second surface 2, and a fifth surface 5 and a sixth surface 6 facing each other in a third direction and connected to the first surface 1, the second surface 2, the third surface 3, and the fourth surface 4.

[0098] The main body 210 can include a first internal electrode layer 220a and a second internal electrode layer 220b alternately arranged in a first direction.

[0099] The first internal electrode layer 220a can include a first dielectric layer 211a, and a first internal electrode 221 and a first auxiliary electrode 223 arranged apart from each other in a second direction on the first dielectric layer 211a.

[0100] The second internal electrode layer 220b can include a second dielectric layer 211b, and a second internal electrode 222 and a second auxiliary electrode 224 that are arranged on the second dielectric layer 211b and spaced apart from each other in a second direction.

[0101] The first internal electrode 221 can be connected to the first external electrode 231 on the third surface 3, and the second internal electrode 222 can be connected to the second external electrode 232 on the fourth surface 4. A part of the first internal electrode 221 overlaps the second internal electrode 222 in a first direction, so that the capacitance of the multilayer electronic component 200a can be formed.

[0102] The first auxiliary electrode 223 can be connected to the second external electrode 232 on the fourth surface 4, and the second auxiliary electrode 224 can be connected to the first external electrode 231 on the third surface 3. However, the present invention is not limited thereto, and the first auxiliary electrode 223 may be arranged at a distance from the second external electrode 232, and the second auxiliary electrode 224 may be arranged at a distance from the first external electrode 231.

[0103] On the other hand, the dimension of the first internal electrode 221 in the second direction can be larger than the dimension of the first auxiliary electrode 223 in the second direction, and the dimension of the second internal electrode 222 in the second direction can be larger than the dimension of the second auxiliary electrode 224 in the second direction.

[0104] The main body 210 is arranged inside the main body 210, and the first internal electrode 221 and the second internal electrode 222 are alternately arranged with the first dielectric layer 211a or the second dielectric layer 211b interposed therebetween, and a capacitance forming portion Ac in which a capacitance is formed, and cover portions 212 and 213 arranged on both surfaces facing each other in the first direction of the capacitance forming portion Ac can be included. Further, the main body 210 can include margin portions 214 and 215 arranged on both surfaces facing each other in the third direction of the capacitance forming portion Ac.

[0105] The first external electrode 231 and the second external electrode 232 are arranged on the main body 210 and can be respectively connected to the first internal electrode 221 and the second internal electrode 222. The first external electrode 231 is arranged on the third surface 3 and can extend onto a part of the first surface 1 and the second surface 2. The second external electrode 232 is arranged on the fourth surface 4 and can extend onto a part of the first surface 1 and the second surface 2. The first external electrode 231 and the second external electrode 232 can also respectively extend onto a part of the fifth surface 5 and the sixth surface 6.

[0106] The external electrodes 231 and 232 can include, for example, a base electrode layer that contacts the internal electrodes 221 and 222, and a plating layer arranged on the base electrode layer. The base electrode layer can include, for example, one or more layers among a fired electrode layer, a conductive resin layer, and a thin film electrode layer.

[0107] The multilayer electronic component 200a according to the second embodiment of the present invention can include a first via electrode 241 that penetrates the first dielectric layer 211a and connects the first internal electrode 221 and the second auxiliary electrode 224, a second via electrode 242 that penetrates the first dielectric layer 211a and connects the first auxiliary electrode 223 and the second internal electrode 222, a third via electrode 243 that penetrates the second dielectric layer 211b and connects the second auxiliary electrode 224 and the first internal electrode 221, and a fourth via electrode 244 that penetrates the second dielectric layer 211b and connects the second internal electrode 222 and the first auxiliary electrode 223.

[0108] The first via electrode 241 can penetrate, for example, a region adjacent to the third surface 3 in the first dielectric layer 211a, and the second via electrode 242 can penetrate, for example, a region adjacent to the fourth surface 4 in the first dielectric layer 211a. The region adjacent to the third surface 3 in the first dielectric layer 211a means the region between the third surface 3 and the capacitance forming portion Ac in the first dielectric layer 211a (hereinafter referred to as the first margin region), and the region adjacent to the fourth surface 4 in the first dielectric layer 211a can mean the region between the fourth surface 4 and the capacitance forming portion Ac in the first dielectric layer 211a (hereinafter referred to as the second margin region).

[0109] The third via electrode 243 can penetrate, for example, a region adjacent to the third surface 3 in the second dielectric layer 211b, and the fourth via electrode 244 can penetrate, for example, a region adjacent to the fourth surface 4 in the second dielectric layer 211b. The region adjacent to the third surface 3 in the second dielectric layer 211b means the region between the third surface 3 and the capacitance forming portion Ac in the second dielectric layer 211b (hereinafter referred to as the third margin region), and the region adjacent to the fourth surface 4 in the second dielectric layer 211b can mean the region between the fourth surface 4 and the capacitance forming portion Ac in the second dielectric layer 211b (hereinafter referred to as the fourth margin region).

[0110] According to the second embodiment of the present invention, even if some of the internal electrodes 221 and 222 contract due to the firing process and the contact with the external electrodes 231 and 232 is broken at the third surface 3 or the fourth surface 4, the corresponding internal electrodes 221 and 222 can be electrically connected to the external electrodes 231 and 232 via the via electrodes 241, 242, 243, 244 and the internal electrodes 221 and 222 or the auxiliary electrodes 224 and 223 of other layers. Thereby, it is possible to prevent the capacitance of the multilayer electronic component 200a from decreasing.

[0111] According to the second embodiment of the present invention, the first via electrode 241 can be arranged offset from the third via electrode 243 adjacent in the first direction, and the second via electrode 242 can be arranged offset from the fourth via electrode 244 adjacent in the first direction.

[0112] That the first via electrode 241 and the third via electrode 243 adjacent in the first direction are arranged offset from each other means that in a cross section of the main body 210 in the first and second directions (for example, FIG. 22) or a cross section of the main body 210 in the first and third directions (for example, FIG. 23), a virtual line connecting the midpoints of the upper and lower surfaces of the first via electrode 241 that respectively contact the first internal electrode 221 and the second auxiliary electrode 224 does not coincide with a virtual line connecting the midpoints of the upper and lower surfaces of the third via electrode 243 that respectively contact the second auxiliary electrode 224 and the first internal electrode 221.

[0113] Similarly, the fact that the second via electrode 242 and the fourth via electrode 244 adjacent to each other in the first direction are arranged offset from each other means that in the cross section of the main body 210 in the first and second directions or in the cross section of the main body 210 in the first and third directions, a virtual line connecting the midpoints of the upper and lower surfaces of the second via electrode 242 that are in contact with the first auxiliary electrode 223 and the second internal electrode 222 respectively does not coincide with a virtual line connecting the midpoints of the upper and lower surfaces of the fourth via electrode 244 that are in contact with the second internal electrode 222 and the first auxiliary electrode 223 respectively.

[0114] Since the first via electrode 241 and the third via electrode 243 adjacent to each other in the first direction are arranged offset from each other, the first via electrode 241 and the third via electrode 243 can be dispersedly arranged within the first margin region and the third margin region. Thereby, the first via electrode 241 and the third via electrode 243 can effectively support the first margin region and the third margin region. That is, due to the density difference between the regions where the first via electrode 241 and the third via electrode 243 are arranged and the regions where the first via electrode 241 and the third via electrode 243 are not arranged within the first margin region and the third margin region, and the external stress, the phenomenon that the first margin region and the third margin region are recessed can be suppressed.

[0115] Similarly, since the second via electrode 242 and the fourth via electrode 244 adjacent to each other in the first direction are arranged offset from each other, the second via electrode 242 and the fourth via electrode 244 can be dispersedly arranged within the second margin region and the fourth margin region. Thereby, the second via electrode 242 and the fourth via electrode 244 can effectively support the second margin region and the fourth margin region. That is, due to the density difference between the regions where the second via electrode 242 and the fourth via electrode 244 are arranged and the regions where the second via electrode 242 and the fourth via electrode 244 are not arranged within the second margin region and the fourth margin region, and the external stress, the phenomenon that the second margin region and the fourth margin region are recessed can be suppressed.

[0116] In one embodiment, the first via electrode 241 may not overlap with the third via electrode 243 adjacent in the first direction, and the second via electrode 242 may not overlap with the fourth via electrode 244 adjacent in the first direction.

[0117] When the first via electrode 241 and the third via electrode 243 adjacent in the first direction are arranged to be offset from each other in the first direction, and the second via electrode 242 and the fourth via electrode 244 adjacent in the first direction are arranged to be offset from each other in the first direction, the effect of improving the mechanical strength of the stacked electronic component 200a intended in the present invention can be exerted. However, when the first via electrode 241 does not overlap with the third via electrode 243 adjacent in the first direction, and the second via electrode 242 does not overlap with the fourth via electrode 244 adjacent in the first direction, the effect of improving the mechanical strength of the present invention can be made more remarkable.

[0118] Further, the stacked electronic component 200a according to the second embodiment of the present invention includes the auxiliary electrodes 223 and 224, so that even if the first via electrode 241 and the third via electrode 243 do not overlap with each other in the first direction, or the second via electrode 242 and the fourth via electrode 244 do not overlap with each other in the first direction, the electrical connection between the adjacent internal electrodes 221 and 222 of the same polarity can be ensured.

[0119] In one embodiment, a plurality of the first via electrodes 241 and the second via electrodes 242 penetrating the same first dielectric layer 211a can be arranged respectively, and a plurality of the third via electrodes 243 and the fourth via electrodes 244 penetrating the same second dielectric layer 211b can be arranged respectively. The plurality of the first via electrodes 241 and the second via electrodes 242 penetrating the same first dielectric layer 211a can be arranged, for example, in the second direction and the third direction respectively, and the plurality of the third via electrodes 243 and the fourth via electrodes 244 penetrating the same second dielectric layer 211b can be arranged in the second direction and the third direction respectively.

[0120] Referring to FIGS. 24 and 25, a plurality of first via electrodes 241 penetrating the same first dielectric layer 211a are arranged to be offset from each other with reference to the second direction and the third direction, so that a first lattice pattern LP1 can be formed. A plurality of second via electrodes 242 penetrating the same first dielectric layer 211a are arranged to be offset from each other with reference to the second direction and the third direction, so that a second lattice pattern LP2 can be formed.

[0121] A plurality of third via electrodes 243 penetrating the same second dielectric layer 211b are arranged to be offset from each other with reference to the second direction and the third direction, so that a third lattice pattern LP3 can be formed. A plurality of fourth via electrodes 244 penetrating the same second dielectric layer 211b are arranged to be offset from each other with reference to the second direction and the third direction, so that a fourth lattice pattern LP4 can be formed.

[0122] The first lattice pattern LP1 and the third lattice pattern LP3 can be alternately arranged with each other in the main body 210 with the first internal electrode 221 or the second auxiliary electrode 224 therebetween. The first lattice pattern LP1 and the third lattice pattern LP3 can be non-overlapping with each other in the first direction. That is, the first lattice pattern LP1 and the third lattice pattern LP3 each including a plurality of first via electrodes 241 and third via electrodes 243 arranged in a staggered manner are non-overlapping with each other in the first direction, so that the effect of improving the mechanical strength of the present invention can be made more remarkable.

[0123] The second lattice pattern LP2 and the fourth lattice pattern LP4 can be alternately arranged with each other in the main body 210 with the second internal electrode 222 or the first auxiliary electrode 223 therebetween. The second lattice pattern LP2 and the fourth lattice pattern LP4 can be non-overlapping with each other in the first direction. That is, the second lattice pattern LP2 and the fourth lattice pattern LP4 each including a plurality of second via electrodes 242 and fourth via electrodes 244 arranged in a staggered manner are non-overlapping with each other in the first direction, so that the effect of improving the mechanical strength of the present invention can be made more remarkable.

[0124] For example, the first dielectric layer 211a may include a first region R1 disposed between two first via electrodes 241 adjacent to each other in the second or third direction among the plurality of first via electrodes 241, and a second region R2 disposed between two second via electrodes 242 adjacent to each other in the second or third direction among the plurality of second via electrodes 242. The plurality of third via electrodes 243 may overlap with the first region R1 in the first direction, and the plurality of fourth via electrodes 244 may overlap with the second region R2 in the first direction.

[0125] Referring to FIGS. 22 and 23, in one embodiment, the width of the upper surface of the first via electrode 241 may be wider than the width of the lower surface of the first via electrode 241, the width of the upper surface of the second via electrode 242 may be wider than the width of the lower surface of the second via electrode 242, the width of the upper surface of the third via electrode 243 may be wider than the width of the lower surface of the third via electrode 243, and the width of the upper surface of the fourth via electrode 244 may be wider than the width of the lower surface of the fourth via electrode 244.

[0126] The via formed in the dielectric sheet can be formed, for example, by irradiating the dielectric sheet with a laser. At this time, the amount of energy of the laser light can decrease from one surface of the dielectric sheet irradiated with the laser toward the other opposite surface. As a result, the width of the first via electrode 241 gradually becomes narrower as it approaches the second auxiliary electrode 224 from the first internal electrode 221, the width of the second via electrode 242 gradually becomes narrower as it approaches the second internal electrode 222 from the first auxiliary electrode 223, the width of the third via electrode 243 gradually becomes narrower as it approaches the first internal electrode 221 from the second auxiliary electrode 224, and the width of the fourth via electrode 244 gradually becomes narrower as it approaches the first auxiliary electrode 223 from the second internal electrode 222.

[0127] On the other hand, the maximum width of the via electrodes 241, 242, 243, 244 can vary depending on the size of the multilayer electronic component 200a, the thickness of the dielectric layers 211a, 211b, etc. The maximum width of the via electrodes 241, 242, 243, 244 is not particularly limited, but can be, for example, 0.03 μm to 3.0 μm.

[0128] FIG. 26 is a perspective view schematically showing a stacked electronic component according to a first modification of the second embodiment of the present invention, FIG. 27 is a cross-sectional view schematically showing a cross-section cut along XVI-XVI' of FIG. 26, and FIG. 28 is a cross-sectional view schematically showing a cross-section cut along XVII-XVII' of FIG. 27.

[0129] Hereinafter, with reference to FIGS. 26 to 28, a stacked electronic component 200b according to a first modification of the second embodiment of the present invention will be described. The same / similar reference numerals are used for the same / similar configurations as those of the stacked electronic component 200a described with reference to FIGS. 20 to 25, and redundant descriptions will be omitted.

[0130] The stacked electronic component 200b can include a first connection structure 251 and a second connection structure 252. The first connection structure 251 and the second connection structure 252 can be respectively arranged on the first cover portion 212 and the second cover portion 213.

[0131] The first connection structure 251 can penetrate the cover portions 212 and 213 and connect the first internal electrode 221 or the second auxiliary electrode 224 disposed on the outermost side with respect to the first direction and the first external electrode 231.

[0132] The second connection structure 252 can connect the second internal electrode 222 or the first auxiliary electrode 223 disposed on the outermost side with respect to the first direction and the second external electrode 232.

[0133] The first connection structure 251 can include first connection electrodes 251a and first dummy electrodes 251b alternately arranged in the first direction. The second connection structure 252 can include second connection electrodes 252a and second dummy electrodes 252b alternately arranged in the first direction. The first dummy electrode 251b can be connected to the first external electrode 231 on the third surface 3, and the second dummy electrode 252b can be connected to the second external electrode 232 on the fourth surface 4.

[0134] The connection structures 251 and 252 can be formed in a manner similar to the auxiliary electrodes 223 and 224 and the via electrodes 241, 242, 243, and 244. For example, the connection structures 251 and 252 can be formed by forming a dummy electrode pattern on a cover portion forming sheet in which vias are formed, and laminating two or more cover portion forming sheets on which the dummy electrode pattern is formed.

[0135] The connection structures 251 and 252 can have a structure similar to that of the auxiliary electrodes 223 and 224 and the via electrodes 241, 242, 243, and 244.

[0136] For example, two first connection electrodes 251a adjacent in the first direction can be arranged offset from each other, and two second connection electrodes 252a adjacent in the first direction can be arranged offset from each other.

[0137] For example, a plurality of first connection electrodes 251a and second connection electrodes 252a can be arranged respectively. The plurality of first connection electrodes 251a and second connection electrodes 252a arranged at the same level can be arranged in the second direction and the third direction respectively. The first connection electrode 251a can have the aforementioned first grid pattern or third grid pattern, and the second connection electrode 252a can have the aforementioned second grid pattern or fourth grid pattern, but the present invention is not limited thereto.

[0138] The first connecting structure 251 can connect the first internal electrode 221 or the second auxiliary electrode 224 disposed on the outermost side with respect to the first direction and the region extending on the first surface 1 or the second surface 2 of the first external electrode 231. Further, the second connecting structure 252 can connect the second internal electrode 222 or the first auxiliary electrode 223 disposed on the outermost side with respect to the first direction and the region extending on the first surface 1 or the second surface 2 of the second external electrode 232. Thereby, the current path of the multilayer electronic component 200b can be increased, and as a result, the ESR of the multilayer electronic component 200b can be reduced. Further, the connecting structures 251 and 252 can more effectively improve the mechanical strength of the multilayer electronic component 200b.

[0139] FIG. 29 is a perspective view schematically showing a multilayer electronic component according to a second modification of the second embodiment of the present invention, FIG. 30 is a cross-sectional view schematically showing a cross-section cut along XVIII-XVIII' of FIG. 29, and FIG. 31 is a cross-sectional view schematically showing a cross-section cut along XIX-XIX' of FIG. 30.

[0140] Hereinafter, with reference to FIGS. 29 to 31, the multilayer electronic component 200c according to the second modification of the second embodiment of the present invention will be described. The same / similar reference numerals are used for the same / similar configurations as those of the multilayer electronic components 200a and 200b described with reference to FIGS. 20 to 28, and redundant description will be omitted.

[0141] The external electrodes 231c and 232c of the multilayer electronic component 200c can have a bottom electrode structure. For example, the first external electrode 231c and the second external electrode 232c can be respectively disposed on the second surface 2 and not disposed on the first surface 1. The first external electrode 231c and the second external electrode 232c can be not disposed on the third surface 3, the fourth surface 4, the fifth surface 5, and the sixth surface 6, but the present invention is not limited thereto, and the first external electrode 231c and the second external electrode 232c may extend on at least one of the third surface 3, the fourth surface 4, the fifth surface 5, and the sixth surface 6.

[0142] The multilayer electronic component 200c can include a first connection structure 251 that penetrates the cover portion 213 and connects the first internal electrode 221c or the second auxiliary electrode 224c disposed on the outermost side with reference to the first direction and the first external electrode 231c, and a second connection structure 252 that penetrates the cover portion 213 and connects the second internal electrode 222c or the first auxiliary electrode 223c disposed on the outermost side with reference to the first direction and the second external electrode 232c. The first connection structure 251 and the second connection structure 252 can be disposed on the second cover portion 213 and not on the first cover portion 212.

[0143] The internal electrodes 221c, 222c and the auxiliary electrodes 223c, 224c can be disposed at intervals from the third surface 3, the fourth surface 4, the fifth surface 5 and the sixth surface 6, respectively. The internal electrodes 221c, 222c and the auxiliary electrodes 223c, 224c are not exposed on the outer surface of the main body 210, respectively, whereby it is possible to prevent the moisture resistance reliability of the multilayer electronic component 200c from being reduced.

[0144] By disposing the external electrodes 231c, 232c only on the second surface 2, miniaturization of the multilayer electronic component 200c can be achieved, and the strain strength of the multilayer electronic component 200c can be improved.

[0145] FIG. 32 is a perspective view schematically showing a multilayer electronic component according to a third modification of the second embodiment of the present invention, FIG. 33 is a cross-sectional view schematically showing a cross-section cut along XX-XX' of FIG. 32, and FIG. 34 is a cross-sectional view schematically showing a cross-section cut along XXI-XXI' of FIG. 33.

[0146] Hereinafter, with reference to FIGS. 32 to 34, the multilayer electronic component 200d according to the third modification of the second embodiment of the present invention will be described. The same / similar reference numerals are used for the same / similar configurations as those of the multilayer electronic components 200a, 200b, 200c described with reference to FIGS. 20 to 31, and redundant description will be omitted.

[0147] The first external electrodes 231d of the multilayer electronic component 200d can be respectively arranged on the first surface 1 and the second surface 2, and the second external electrodes 232d can be respectively arranged on the first surface 1 and the second surface 2. The first external electrodes 231d and the second external electrodes 232d arranged on the first surface 1 can be arranged separately from the first external electrodes 231d and the second external electrodes 232d arranged on the second surface 2. The first external electrodes 231d and the second external electrodes 232d cannot be arranged on the third surface 3, the fourth surface 4, the fifth surface 5, and the sixth surface 6. However, the present invention is not limited thereto, and the first external electrodes 231d and the second external electrodes 232d may extend on at least one of the third surface 3, the fourth surface 4, the fifth surface 5, and the sixth surface 6.

[0148] The multilayer electronic component 200d includes a first connection structure 251 that penetrates the cover portions 212 and 213 and connects the first internal electrode 221d or the second auxiliary electrode 224d arranged on the outermost side with reference to the first direction and the first external electrode 231d, and a second connection structure 252 that penetrates the cover portions 212 and 213 and connects the second internal electrode 222d or the first auxiliary electrode 223d arranged on the outermost side with reference to the first direction and the second external electrode 232d. The first connection structure 251 and the second connection structure 252 can be respectively arranged on the first cover portion 212 and the second cover portion 213.

[0149] The internal electrodes 221d, 222d and the auxiliary electrodes 223d, 224d can be respectively arranged separately from the third surface 3, the fourth surface 4, the fifth surface 5, and the sixth surface 6.

[0150] By including the external electrodes 231d, 232d respectively arranged on the first surface 1 and the second surface 2, the multilayer electronic component 200d can ensure mounting convenience compared to the multilayer electronic component 200c.

[0151] (Method for manufacturing a multilayer electronic component) FIG. 35 is a cross-sectional view schematically showing the filling and printing steps for manufacturing a multilayer electronic component according to the first or second embodiment of the present invention.

[0152] Hereinafter, with reference to FIG. 35, an example of a method for manufacturing the multilayer electronic components 100a and 200a according to the first embodiment or the second embodiment of the present invention will be described.

[0153] On the other hand, the method for manufacturing the multilayer electronic component will be described with reference to the multilayer electronic components 100a and 200a according to the first embodiment or the second embodiment. However, this is also applicable as it is to the multilayer electronic components 100b, 100c, 100d, 100e according to the first to fourth modification examples of the first embodiment and the multilayer electronic components 200b, 200c, 300d according to the first to third modification examples of the second embodiment, as long as there is no contradiction.

[0154] Hereinafter, the method for manufacturing the multilayer electronic component will be described step by step.

[0155] (Dielectric Sheet Preparation Step) First, a dielectric powder for forming the dielectric sheet 10 is prepared. Examples of the dielectric powder include BaTiO 3 , (Ba 1-x Ca x )TiO 3 (0 < x < 1), Ba(Ti 1-y Ca y )O 3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O 3 (0 < x < 1, 0 < y < 1), Ba(Ti 1-y Zr y )O 3 (0 < y < 1), CaZrO 3 , or (Ca 1-x Sr x )(Zr 1-y Ti y )O 3 (0 < x ≤ 0.5, 0 < y ≤ 0.5), etc. BaTiO 3The powder can be synthesized by reacting a titanium raw material such as titanium dioxide with a barium raw material such as barium carbonate. Examples of the method for synthesizing the dielectric powder include, but are not limited to, the solid-phase method, the sol-gel method, the hydrothermal synthesis method, etc.

[0156] Next, after drying and pulverizing the prepared dielectric powder, an organic solvent such as ethanol and a binder such as polyvinyl butyral are mixed to produce a dielectric slurry. Then, by applying and drying the dielectric slurry on a carrier film, the dielectric sheet 10 can be manufactured.

[0157] The dielectric layer can be formed by firing the unit laminate described later on the dielectric sheet 10.

[0158] (Via formation stage) The manufactured dielectric sheet 10 can be continuously supplied, for example, by moving from a supply roller (not shown) around which the dielectric sheet 10 is wound to a recovery roller (not shown) that unwinds the dielectric sheet 10.

[0159] At this time, vias 20 can be formed in the continuously supplied dielectric sheet 10. The step of forming the vias 20 can be performed, for example, by irradiating the dielectric sheet 10 with a laser. The laser can be irradiated from a laser device 50 disposed on the dielectric sheet 10.

[0160] The type of the laser device 50 is not particularly limited. For example, a CO 2 laser, a YAG laser, a femtosecond laser, or a picosecond UV laser can be used. The vias 20 can have a tapered shape in which the width gradually decreases from one surface of the dielectric sheet 10 irradiated with the laser toward the opposite other surface by laser processing.

[0161] (Filling stage) Next, a filling step of filling the via 20 with the electrode paste EP can be performed. The electrode paste EP can contain, for example, metal powder, binder, organic solvent, etc.

[0162] The method of filling the via 20 with the electrode paste EP is not particularly limited. For example, as shown in FIG. 35, the dielectric sheet 10 can pass between the coating roller 61 and the cylinder 71. The coating roller 61 can be in contact with the electrode paste EP, and by rotationally driving the coating roller 61, the electrode paste EP can be filled into the recesses (not shown) formed on the outer peripheral surface of the coating roller 61.

[0163] On the other hand, the coating roller 61 and the cylinder 71 can rotate in opposite directions to apply pressure to the dielectric sheet 10. Due to the above pressure, the electrode paste EP applied to the outer peripheral surface of the coating roller 61 can be filled into the vias 20 formed in the moving dielectric sheet 10. The electrode paste EP filled in the vias 20 can form via electrodes by firing the unit laminate described later.

[0164] The excess electrode paste EP applied to the outer surface of the coating roller 61 can be removed using a doctor blade DB.

[0165] (Printing step) A printing step of printing the internal electrode pattern 30 connected to the via 20 on the dielectric sheet 10 can be performed. The method of forming the internal electrode pattern 30 is not particularly limited. For example, the internal electrode pattern 30 can be formed using the coating roller 61 and the cylinder 71. That is, the above printing step can include a step of supplying the electrode paste EP to the outer peripheral surface of the coating roller 61 and a step of bringing the dielectric sheet 10 into contact with the coating roller 61 to apply the electrode paste EP onto the dielectric sheet 10.

[0166] In this case, by adjusting the form of the recess (not shown) formed on the outer surface of the coating roller 61, while filling the inside of the via 20 with the electrode paste EP, the internal electrode pattern 30 can be formed. That is, in one embodiment, the filling step and the printing step can be performed simultaneously. The printed internal electrode pattern 30 can be dried using a drying device or the like.

[0167] The internal electrode pattern 30 can form an internal electrode by firing the unit laminate described later. Also, although not shown, an auxiliary electrode pattern for forming an auxiliary electrode can be formed in the same manner as the internal electrode pattern 30 by firing the unit laminate.

[0168] (Lamination step) FIG. 39 is a cross-sectional view schematically showing the step of forming a laminate for manufacturing a laminated electronic component according to the first embodiment of the present invention.

[0169] First, the lamination step for manufacturing the laminated electronic component according to the first embodiment will be described.

[0170] As shown in FIG. 39, after peeling the dielectric sheet 10 on which the internal electrode pattern 30 is printed from the carrier film, a laminate can be formed by laminating a predetermined number of them.

[0171] The laminate for forming the laminated electronic component 100a according to the first embodiment is such that the vias 20 formed in the different dielectric sheets 10 are laminated in the first direction and can contact each other. The vias 20 laminated in the first direction will form via electrodes 141 and 142 by firing.

[0172] In this case, in order to form the via electrodes 141 and 142, it is necessary to align the vias 20 formed in the different dielectric sheets 10 with each other during the lamination step. However, since the vias 20 have a tapered shape, the alignment can be more easily achieved.

[0173] On the other hand, in order to form the multilayer electronic component 100d according to the fourth modification of the first embodiment of the present invention, an auxiliary electrode pattern can be formed on the dielectric sheet 10. In this case, since it is not necessary to align the vias 20 formed in the different dielectric sheets 10 with each other, process convenience can be ensured.

[0174] FIG. 40 is a cross-sectional view schematically showing a stage of forming a laminate for manufacturing a multilayer electronic component according to the second embodiment of the present invention.

[0175] Hereinafter, with reference to FIG. 40, the lamination stage for manufacturing the multilayer electronic component according to the second embodiment will be described.

[0176] As shown in FIG. 40, after peeling the dielectric sheet 10 printed with the internal electrode pattern 30 and the auxiliary electrode pattern 40 from the carrier film, a laminate can be formed by laminating a predetermined number of sheets. The auxiliary electrode pattern 40 can be formed between two adjacent internal electrode patterns 30 in the second direction.

[0177] Since the laminate for forming the multilayer electronic component 200a according to the second embodiment includes the auxiliary electrode pattern 40, it is not necessary to align the vias 20 formed in the different dielectric sheets 10 with each other, so process convenience can be ensured.

[0178] On the upper and lower portions of the laminate in the first direction, in order to form a cover portion after firing, a cover portion forming sheet on which no internal electrode pattern and auxiliary electrode pattern are formed can be laminated in a predetermined number of layers.

[0179] On the other hand, in order to form the multilayer electronic components 100b, 100c, 100d according to the first to third modifications of the first embodiment of the present invention, cover portion forming sheets with vias formed can be laminated in a predetermined number of layers on the upper and lower portions of the laminate in the first direction.

[0180] In addition, in order to manufacture the multilayer electronic components 200b, 200c, and 200d according to the first to third modified examples of the second embodiment of the present invention, a cover portion forming sheet having vias and dummy electrode patterns formed thereon may be laminated a predetermined number of layers on the upper and lower portions of the multilayer body in the first direction.

[0181] (Cutting and firing steps) Thereafter, after pressing the multilayer body, as shown in FIGS. 39 and 40, the unit multilayer body can be obtained by cutting along a plurality of cutting lines CL.

[0182] Further, the unit multilayer body can be fired to obtain a main body. The firing can be performed, for example, at a temperature of 1000 ° C or higher and 1400 ° C or lower, but the present invention is not limited thereto.

[0183] (External electrode forming step) Thereafter, an external electrode can be formed on the main body. The method of forming the external electrode is not particularly limited.

[0184] When the external electrode includes a fired electrode layer, the external electrode forming step may include a step of dipping the main body in a fired paste containing metal powder, glass frit, binder, and organic solvent, etc., and then firing the fired paste at a temperature of 500 ° C to 900 ° C.

[0185] However, the present invention is not limited thereto. In order to manufacture the multilayer electronic components 100c, 100d, 200c, and 200d according to the second and third modified examples of the first and second embodiments of the present invention having a bottom electrode structure, the external electrode forming step may include a step of transferring a metal-containing sheet to the main body.

[0186] When the external electrode includes a conductive resin layer, the external electrode forming step may include a step of dipping the main body in a conductive resin composition containing metal powder, resin, binder, and organic solvent, etc., and then performing a curing heat treatment at a temperature of 250 ° C to 550 ° C.

[0187] When the external electrode includes a thin film electrode layer, the external electrode formation step can include steps of performing an electrolytic plating method, an electroless plating method, an atomic layer deposition (ALD) method, a chemical vapor deposition (CVD) method, and / or a sputtering method.

[0188] Also, by further performing an electrolytic plating method and / or an electroless plating method, a plating layer can be formed.

[0189] Figures 36 to 38 are cross-sectional views showing modified examples of Figure 35.

[0190] Hereinafter, with reference to Figures 36 to 38, a modified example of a method for manufacturing a stacked electronic component according to the first embodiment or the second embodiment of the present invention will be described.

[0191] The same / similar reference numerals are used for the same / similar configurations as those described in Figure 35, and redundant descriptions are omitted.

[0192] Referring to Figure 36, the step of forming via 20 can be performed by bringing dielectric sheet 10 into contact with imprint roller 80 having convex portion 81 disposed on its outer peripheral surface.

[0193] Specifically, dielectric sheet 10 can pass between imprint roller 80 and cylinder 72. At this time, imprint roller 80 and cylinder 72 rotate in opposite directions to each other, so that pressure can be applied to dielectric sheet 10. By the above pressure and convex portion 81, via 20 can be formed in dielectric sheet 10.

[0194] Convex portion 81 formed on the outer peripheral surface of imprint roller 80 can have a pattern corresponding to the grid pattern of the via electrode.

[0195] Referring to Figure 37, after irradiating dielectric sheet 10 with a laser to form via 20, electrode paste EP can be filled into via 20 using coating roller 61 and cylinder 71.

[0196] After that, the internal electrode pattern 30 can be separately formed by applying the electrode paste EP onto the dielectric sheet 10 using the coating roller 62 and the cylinder 73. That is, the above filling step and printing step can be performed in sequence.

[0197] Referring to FIG. 38, after forming the via 20 in the dielectric sheet 10 using the imprint roller 80 having the convex portion 81 disposed on the outer peripheral surface and the cylinder 72, the electrode paste EP can be filled into the via 20 using the coating roller 61 and the cylinder 71.

[0198] Specifically, the dielectric sheet 10 can pass between the imprint roller 80 and the cylinder 72. At this time, the imprint roller 80 and the cylinder 72 rotate in opposite directions to each other, so that pressure can be applied to the dielectric sheet 10, and thereby, the via 20 can be formed in the dielectric sheet 10.

[0199] Next, the internal electrode pattern 30 can be separately formed by applying the electrode paste EP onto the dielectric sheet 10 using the coating roller 62 and the cylinder 73. That is, the above filling step and printing step can be performed in sequence.

[0200] As described above in detail for the embodiments of the present invention, the scope of the present invention is not limited thereto, and it is obvious to those having ordinary knowledge in the art that various modifications and variations are possible within the scope not departing from the technical idea of the present invention described in the claims.

[0201] On the one hand, the expression "an embodiment used in the present invention" does not mean the same embodiment, but is provided to emphasize and explain each different unique feature. However, the above-presented embodiment does not exclude the case where it is implemented in combination with the features of other embodiments. For example, even if a matter described in a specific embodiment is not described in other embodiments, it can be interpreted as an explanation related to other embodiments as long as there is no explanation contrary to that matter or no explanation conflicting with that matter in other embodiments.

[0202] In the present disclosure, the meaning of "connected" includes not only being directly connected but also being indirectly connected via an adhesive layer or the like. Further, the meaning of "electrically connected" is a concept that includes both the case of being physically connected and the case of not being connected.

[0203] Also, expressions such as "first", "second", etc. are used to distinguish one component from another component, and do not limit the order and / or importance of the corresponding components. In some cases, without departing from the scope of the rights, the first component can also be named the second component, and similarly, the second component can also be named the first component.

Description of Reference Numerals

[0204] 100a, 100b, 100c, 100d, 100e, 200a, 200b, 200c, 200d Stacked electronic components 110, 210 Main body 111, 211a, 211b Dielectric layer 112, 113, 212, 213 Cover part 114, 115, 214, 215 Margin part 121, 122, 221, 222 Internal electrode 123, 124, 223, 224 Auxiliary electrode 131, 132, 231, 232 External electrode 141, 142, 241, 242, 243, 244 Via electrode 151, 152 Connecting electrode 251 and 252 connected structures

Claims

1. a main body including a dielectric layer, and first and second internal electrodes alternately disposed in a first direction with the dielectric layer sandwiched therebetween, the main body having a first surface and a second surface facing each other in the first direction, a third surface and a fourth surface connected to the first surface and the second surface and facing each other in the second direction, and a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface, and the fourth surface and facing each other in the third direction; a first external electrode and a second external electrode disposed on the body and connected to the first internal electrode and the second internal electrode, respectively; a first via electrode penetrating the dielectric layer and connecting two of the first internal electrodes adjacent to each other in the first direction; a second via electrode penetrating the dielectric layer and connecting two of the second internal electrodes adjacent to each other in the first direction, The multilayer electronic component, wherein two of the first via electrodes adjacent to each other in the first direction are arranged offset from each other, and two of the second via electrodes adjacent to each other in the first direction are arranged offset from each other.

2. Two of the first via electrodes adjacent to each other in the first direction do not overlap each other in the first direction, The multilayer electronic component according to claim 1 , wherein two of the second via electrodes adjacent to each other in the first direction do not overlap each other in the first direction.

3. The multilayer electronic component according to claim 1 , wherein a plurality of the first via electrodes and a plurality of the second via electrodes are disposed through the same dielectric layer.

4. The multilayer electronic component according to claim 3 , wherein the first via electrodes and the second via electrodes penetrating the same dielectric layer are arranged in the second direction and the third direction, respectively.

5. the first internal electrode is connected to the first external electrode at the third surface, The multilayer electronic component according to claim 1 , wherein the second internal electrode is connected to the second external electrode at the fourth surface.

6. the first via electrode has a shape in which a plurality of first unit vias are stacked in the first direction, The multilayer electronic component according to claim 1 , wherein the second via electrode is formed by stacking a plurality of second unit vias in the first direction.

7. a width of an upper surface of the first unit via is wider than a width of a lower surface of the first unit via; The multilayer electronic component according to claim 6 , wherein a width of an upper surface of each of the second unit vias is wider than a width of a lower surface of each of the second unit vias.

8. 7. The multilayer electronic component according to claim 6, wherein the body includes: a first auxiliary electrode spaced apart from the first internal electrode in the second direction and disposed between the plurality of second unit vias stacked in the first direction; and a second auxiliary electrode spaced apart from the second internal electrode in the second direction and disposed between the plurality of first unit vias stacked in the first direction.

9. the main body includes a capacitance forming portion in which the first internal electrodes and the second internal electrodes are alternately arranged in the first direction with the dielectric layer sandwiched therebetween, and cover portions are arranged on both sides of the capacitance forming portion facing each other in the first direction, the first external electrode is disposed on the third surface and extends over a portion of the first surface and the second surface; the second external electrode is disposed on the fourth surface and extends over a portion of the first surface and the second surface; 9. The multilayer electronic component according to claim 1, further comprising: a first connecting electrode that penetrates the cover portion and connects a first internal electrode that is arranged on the outermost side with respect to the first direction to the first external electrode; and a second connecting electrode that penetrates the cover portion and connects a second internal electrode that is arranged on the outermost side with respect to the first direction to the second external electrode.

10. the main body includes a capacitance forming portion in which the first internal electrodes and the second internal electrodes are alternately arranged in the first direction with the dielectric layer sandwiched therebetween, and cover portions are arranged on both sides of the capacitance forming portion facing each other in the first direction, the first external electrode and the second external electrode are each disposed on the second surface and not disposed on the first surface; 9. The multilayer electronic component according to claim 1, further comprising: a first connecting electrode that penetrates the cover portion and connects a first internal electrode that is arranged on the outermost side with respect to the first direction to the first external electrode; and a second connecting electrode that penetrates the cover portion and connects a second internal electrode that is arranged on the outermost side with respect to the first direction to the second external electrode.

11. the main body includes a capacitance forming portion in which the first internal electrodes and the second internal electrodes are alternately arranged in the first direction with the dielectric layer sandwiched therebetween, and cover portions are arranged on both sides of the capacitance forming portion facing each other in the first direction, the first external electrode and the second external electrode are disposed on the first surface and the second surface, respectively; the first external electrode and the second external electrode disposed on the first surface are spaced apart from the first external electrode and the second external electrode disposed on the second surface, 9. The multilayer electronic component according to claim 1, further comprising: a first connecting electrode that penetrates the cover portion and connects a first internal electrode that is arranged on the outermost side with respect to the first direction to the first external electrode; and a second connecting electrode that penetrates the cover portion and connects a second internal electrode that is arranged on the outermost side with respect to the first direction to the second external electrode.

12. a first surface and a second surface facing each other in a first direction, a third surface and a fourth surface connected to the first surface and the second surface and facing each other in a second direction, and a fifth surface and a sixth surface connected to the first surface, the second surface, the third surface, and the fourth surface and facing each other in a third direction, a main body including a first internal electrode layer including a first dielectric layer, a first internal electrode and a first auxiliary electrode spaced apart from each other on the first dielectric layer in the second direction, and a second internal electrode layer including a second dielectric layer, a second internal electrode and a second auxiliary electrode spaced apart from each other on the second dielectric layer in the second direction, the first internal electrode layers and the second internal electrode layers being alternately arranged in the first direction; a first external electrode and a second external electrode disposed on the body and connected to the first internal electrode and the second internal electrode, respectively; a first via electrode penetrating the first dielectric layer and connecting the first internal electrode and the second auxiliary electrode; a second via electrode penetrating the first dielectric layer and connecting the first auxiliary electrode and the second internal electrode; a third via electrode penetrating the second dielectric layer and connecting the second auxiliary electrode and the first internal electrode; a fourth via electrode penetrating the second dielectric layer and connecting the second internal electrode and the first auxiliary electrode; A multilayer electronic component, wherein the first via electrode is positioned offset from the third via electrode adjacent to the first direction, and the second via electrode is positioned offset from the fourth via electrode adjacent to the first direction.

13. the first via electrode does not overlap with the third via electrode adjacent thereto in the first direction, The multilayer electronic component according to claim 12 , wherein the second via electrode does not overlap in the first direction with the fourth via electrode adjacent to the second via electrode in the first direction.

14. the first via electrodes and the second via electrodes penetrating the same first dielectric layer are each arranged in a plurality of numbers, The multilayer electronic component according to claim 12 , wherein a plurality of the third via electrodes and a plurality of the fourth via electrodes are disposed through the same second dielectric layer.

15. The first via electrodes and the second via electrodes penetrating the same first dielectric layer are arranged in the second direction and the third direction, respectively; The multilayer electronic component according to claim 14 , wherein the third via electrodes and the fourth via electrodes penetrating the same second dielectric layer are arranged in the second direction and the third direction, respectively.

16. the first dielectric layer includes a first region disposed between two first via electrodes adjacent to each other in the second direction or a third direction among the plurality of first via electrodes, and a second region disposed between two second via electrodes adjacent to each other in the second direction or a third direction among the plurality of second via electrodes, the third via electrodes overlap with the first region in the first direction; The multilayer electronic component according to claim 15 , wherein the fourth via electrodes overlap the second region in the first direction.

17. the first internal electrode is connected to the first external electrode at the third surface, The multilayer electronic component according to claim 12 , wherein the second internal electrode is connected to the second external electrode at the fourth surface.

18. the first auxiliary electrode is connected to the second external electrode at the fourth surface, The multilayer electronic component according to claim 12 , wherein the second auxiliary electrode is connected to the first external electrode at the third surface.

19. The width of an upper surface of the first via electrode is wider than the width of a lower surface of the first via electrode, The width of an upper surface of the second via electrode is wider than the width of a lower surface of the second via electrode, The width of an upper surface of the third via electrode is wider than the width of a lower surface of the third via electrode, The multilayer electronic component according to claim 12 , wherein a width of the upper surface of the fourth via electrode is wider than a width of a lower surface of the fourth via electrode.

20. the main body includes a capacitance forming portion in which first internal electrodes and second internal electrodes are alternately arranged with the first dielectric layer or the second dielectric layer interposed therebetween, and cover portions are arranged on both sides of the capacitance forming portion facing each other in the first direction, the first external electrode is disposed on the third surface and extends over a portion of the first surface and the second surface; the second external electrode is disposed on the fourth surface and extends over a portion of the first surface and the second surface; 20. The multilayer electronic component according to claim 12, further comprising: a first connecting structure that penetrates the cover portion and connects a first internal electrode or a second auxiliary electrode that is disposed at an outermost position in the first direction to the first external electrode; and a second connecting structure that penetrates the cover portion and connects a second internal electrode or a first auxiliary electrode that is disposed at an outermost position in the first direction to the second external electrode.

21. the main body includes a capacitance forming portion in which first internal electrodes and second internal electrodes are alternately arranged with the first dielectric layer or the second dielectric layer interposed therebetween, and cover portions are arranged on both sides of the capacitance forming portion facing each other in the first direction, the first external electrode and the second external electrode are each disposed on the second surface and not disposed on the first surface; 20. The multilayer electronic component according to claim 12, further comprising: a first connecting structure that penetrates the cover portion and connects a first internal electrode or a second auxiliary electrode that is disposed at an outermost position in the first direction to the first external electrode; and a second connecting structure that penetrates the cover portion and connects a second internal electrode or a first auxiliary electrode that is disposed at an outermost position in the first direction to the second external electrode.

22. the main body includes a capacitance forming portion in which first internal electrodes and second internal electrodes are alternately arranged with the first dielectric layer or the second dielectric layer interposed therebetween, and cover portions are arranged on both sides of the capacitance forming portion facing each other in the first direction, the first external electrode and the second external electrode are disposed on the first surface and the second surface, respectively; the first external electrode and the second external electrode disposed on the first surface are spaced apart from the first external electrode and the second external electrode disposed on the second surface, 20. The multilayer electronic component according to claim 12, further comprising: a first connecting structure that penetrates the cover portion and connects a first internal electrode or a second auxiliary electrode that is disposed at an outermost position in the first direction to the first external electrode; and a second connecting structure that penetrates the cover portion and connects a second internal electrode or a first auxiliary electrode that is disposed at an outermost position in the first direction to the second external electrode.

23. forming vias in a succession of applied dielectric sheets; a filling step of filling the vias with an electrode paste; a printing step of printing an internal electrode pattern connected to the vias on the dielectric sheet; laminating the dielectric sheets on which the internal electrode patterns are printed to form a laminate; cutting the laminate to obtain unit laminate bodies; sintering the unit laminate to obtain a main body; and forming an external electrode on the body.

24. The method for manufacturing a multilayer electronic component according to claim 23 , wherein the step of forming the vias is performed by irradiating the dielectric sheet with a laser.

25. The method for manufacturing a multilayer electronic component according to claim 23 , wherein the step of forming the vias is performed by contacting the dielectric sheet with an imprint roller having a protrusion disposed on an outer circumferential surface thereof.

26. The method for producing a multilayer electronic component according to any one of claims 23 to 25, wherein the filling step and the printing step are carried out simultaneously.

27. The method for producing a multilayer electronic component according to claim 23 , wherein the filling step and the printing step are carried out in sequence.

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