Method for manufacturing semiconductor device

Abstract

To provide manufacturing technology for a semiconductor device that includes a WBG semiconductor, in which manufacturing costs are reduced significantly.SOLUTION: In a method for manufacturing a semiconductor device, a dividing layer is formed on a base material of a wide bandgap semiconductor. Next, the main surface of the base material is held by a dummy substrate formed of a wide band gap semiconductor of the same or different kind as the base material (first holding step). Thereafter, a portion on the main surface side from the dividing layer is separated from the base material, as a semiconductor substrate, while remaining in a state of being held by the dummy substrate. Then, at least a part of a semiconductor device is formed on the semiconductor substrate. Next, the surface of the semiconductor substrate is held by a holding part different from the dummy substrate. Thereafter, the dummy substrate is separated from the semiconductor substrate (separation step). When these steps are repeatedly executed, in the first holding step, the dummy substrate separated in the separation step is reused as the dummy substrate used therein.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to semiconductor device manufacturing techniques. [Background technology]

[0002] 2. Description of the Related Art There exists a semiconductor device manufacturing technique that includes a process of thinning a semiconductor wafer (eg, a wafer having a thickness of about 350 μm) to a desired thickness (eg, a thickness of 150 μm or less) by grinding it.

[0003] In recent years, wide band gap (hereinafter abbreviated as "WBG") semiconductors such as SiC have been attracting attention as semiconductor materials that enable normal operation of semiconductor devices even at high temperatures of 250°C or more. WBG semiconductors are also semiconductor materials that enable faster switching speeds, and in that respect, they are expected to be used as materials for semiconductor devices for high-speed communication. In addition, WBG semiconductors have a dielectric strength that is 10 times higher than that of conventional Si semiconductor devices, and therefore are semiconductor materials that can thin the N-type layer (drift layer) doped with a low concentration of N-type impurities. Therefore, WBG semiconductors are semiconductor materials that can have both low resistance (low on-resistance) and high voltage resistance, and in that respect, they are also expected to be used as materials for high-voltage semiconductor devices. In this way, WBG semiconductors have various advantages as materials for semiconductor devices. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2007-250576 A Summary of the Invention [Problem to be solved by the invention]

[0005] On the other hand, WBG semiconductors are expensive semiconductor materials, so if they are thinned by grinding as in the past, the parts of the semiconductor wafer removed by grinding are wasted, resulting in a significant increase in material costs.

[0006] Furthermore, when manufacturing high-voltage semiconductor devices using WBG semiconductors, it was previously necessary to form the N-type semiconductor layer (N-layer) by epitaxial growth. However, epitaxial growth required a long time. Furthermore, the higher the withstand voltage required for semiconductor devices, the thicker the N-layer needed to be, and the longer the time required for epitaxial growth. For this reason, forming the N-layer by epitaxial growth was one of the causes of increased running costs required for manufacturing semiconductor devices.

[0007] Therefore, an object of the present invention is to significantly reduce manufacturing costs in the manufacturing technology of semiconductor devices using WBG semiconductors. [Means for solving the problem]

[0008] The method for manufacturing a semiconductor device according to the present invention includes a split layer forming step, a first holding step, a dividing step, a device forming step, a second holding step, and a removal step (aspect 1). In the split layer forming step, a split layer is formed in a wide band gap semiconductor substrate at a position of a predetermined depth from the main surface of the substrate, which allows the substrate to be divided at the position. After the split layer forming step, in the first holding step, the main surface of the substrate is held by a dummy substrate formed of the same or a different type of wide band gap semiconductor as the substrate. After the first holding step, in the dividing step, the substrate is divided at a position of a predetermined depth using the split layer, so that the main surface side portion is separated from the substrate while being held by the dummy substrate as a semiconductor substrate. After the dividing step, in the device forming step, at least a part of the elements to be included in the semiconductor device is fabricated on the surface side of the semiconductor substrate opposite to the main surface. After the device forming step, in the second holding step, the surface of the semiconductor substrate is held by a holder different from the dummy substrate. After the second holding step, in the removing step, the dummy substrate is removed from the semiconductor substrate. When these steps are repeatedly performed, the dummy substrate detached in the detaching step is reused as the dummy substrate used in the first holding step.

[0009] According to the above manufacturing method, by using a dummy substrate made of the same type of WBG semiconductor as the semiconductor substrate to be held or a different type (specifically, a different type with a similar thermal expansion coefficient) of WBG semiconductor (for example, among such WBG semiconductors, one with a heat resistance temperature of 1800°C or higher), the difference in thermal expansion coefficient between the dummy substrate and the semiconductor substrate can be reduced, and as a result, it is possible to suppress warping that may occur during heating in a later process due to the difference in thermal expansion coefficient. And even when such an expensive dummy substrate made of a WBG semiconductor is used, according to the above manufacturing method, the dummy substrate can be reused, and the dummy substrate can be effectively used repeatedly without being wasted.

[0010] The semiconductor device manufacturing method of the present invention may include the device formation step, the second holding step, and the separation step among the steps included in the above-mentioned aspect 1, and the manufacturing method may be performed after the division layer formation step, the first holding step, and the division step have been performed (aspect 2).

[0011] The semiconductor device manufacturing method of the present invention may include the division layer forming step, the first holding step, and the division step among the steps included in the above-mentioned aspect 1, and after the manufacturing method is performed, the device forming step, the second holding step, and the separation step may be carried out (aspect 3).

[0012] In the manufacturing method according to any one of the above aspects 1 to 3, in the first holding step, dot-like or linear fixing portions for fixing the dummy substrate may be formed in the peripheral region of the main surface of the base material (aspect 4).

[0013] According to the above-mentioned aspect 4, the fixing area can be reduced by forming the fixing parts in a dot-like or linear shape, and as a result, it becomes possible to relatively easily detach the dummy substrate from the semiconductor substrate. Also, by forming the fixing parts in the peripheral region, it becomes possible to reduce the influence (influence of stress and heat generated during detachment) on the region inside the peripheral region (region that becomes the semiconductor device) that may occur when the dummy substrate is detached.

[0014] In the manufacturing method according to the above aspect 4, in the first holding step, a substrate having a bonding prevention layer formed in an area inside the area that will face the peripheral area of ​​the main surface of the base material may be used as the dummy substrate (aspect 5).

[0015] According to the above-mentioned aspect 5, it is possible to prevent the dummy substrate from being bonded to an inner region (region that will become a semiconductor device) on the main surface of the base material where bonding is not intended.

[0016] In the manufacturing methods according to the above aspects 1 to 4, in the first holding step, a ring-shaped substrate that holds the peripheral region of the main surface of the base material may be used as the dummy substrate (aspect 6).

[0017] The annular dummy substrate used in the above-mentioned embodiment 6 can be formed by using a disk-shaped substrate and hollowing out its inner portion. The hollowed-out inner portion can be reused as a dummy substrate in the manufacture of another semiconductor substrate of a different size. This allows for effective use of the dummy substrate. Effect of the Invention

[0018] According to the present invention, in a manufacturing technique for semiconductor devices using WBG semiconductors, it is possible to significantly reduce manufacturing costs. [Brief description of the drawings]

[0019] [Figure 1] 1A to 1C are conceptual diagrams showing a part of a manufacturing method according to an embodiment in the order of processing. [Diagram 2] FIG. 2 is a conceptual diagram showing a continuation of a portion of FIG. 1 in the order of processing. [Diagram 3] FIG. 3 is a conceptual diagram showing a continuation of a portion of FIG. 2 in the order of processing. [Figure 4] FIG. 4 is a conceptual diagram showing a continuation of a part of FIG. 3 in the order of processing. [Diagram 5] FIG. 5 is a conceptual diagram showing a subsequent process of FIG. 4. [Figure 6] FIG. 4 is a plan view showing the shape of a fixing portion formed in the embodiment. [Figure 7] 10A to 10C are conceptual diagrams showing a part of a manufacturing method according to a first modified example in a processing order. [Figure 8] 13 is a conceptual diagram showing a part of a manufacturing method according to a second modified example in the order of processing. FIG. [Figure 9] FIG. 13 is a conceptual diagram showing a first holding step executed in a third modified example. [Figure 10] FIG. 13 is a conceptual diagram showing a first holding step executed in a fourth modified example. [Figure 11](A) is a conceptual diagram showing some steps within the first holding step executed in the fifth modification example, and (B) and (C) are conceptual diagrams each showing two further modification examples for some of those steps.

Embodiments for Carrying Out the Invention

[0020] Hereinafter, the manufacturing method of the semiconductor device according to the present invention will be specifically described with respect to its embodiments and modification examples. Note that the manufacturing method described below can be realized using various well-known apparatuses.

[0021] [1] Embodiment FIGS. 1 to 5 are conceptual diagrams showing the manufacturing method according to the embodiment in the processing order. In this manufacturing method, an N+ layer formation step S1, a division layer formation step S2, a first holding step S3, a division step S4, a device formation step S5, a second holding step S6, a separation step S7, an electrode layer formation step S8, a transfer step S9, and a singulation step S10 are executed in this order. Hereinafter, each step will be specifically described.

[0022] <N+ layer formation step S1> In the N+ layer formation step S1 (see FIG. 1), first, a substrate 1 in which a WBG semiconductor is doped with N-type impurities at a low concentration is prepared. Here, "low concentration" means a case where the concentration of N-type impurities in the WBG semiconductor is 1×10 17 cm -3 or less. As the WBG semiconductor, semiconductor materials such as SiC, diamond, GaN, GaO, Ga 2 O 3 , AlN, BN, GaAs can be used. Further, as the substrate 1, a single crystal ingot formed from a WBG semiconductor may be prepared, or a semiconductor wafer cut out from the ingot (for example, a wafer having a thickness of about 350 μm) may be prepared.

[0023] Then, an N-type impurity is injected into the prepared substrate 1 from the main surface 10a side of the substrate 1 to form an N+ layer 11S doped with the N-type impurity at a high concentration. Here, "high concentration" refers to a concentration of the N-type impurity in the WBG semiconductor of 1×10 18 cm -3 This means the above cases. In addition, the following surfaces are used as the main surface 10a. When the base material 1 is an ingot, a flat cut surface exposed by cutting off an end of the ingot or a polished surface thereof is used as the main surface 10a. When the base material 1 is a semiconductor wafer, a flat cut surface formed when the semiconductor wafer is cut out from the ingot or a polished surface thereof is used as the main surface 10a.

[0024] In this embodiment, when the electrode layer 4 is formed on the main surface 10a (the back surface Kb of the semiconductor substrate K) in the electrode layer forming step S8 described later, the N+ layer 11S enables an ohmic junction between the electrode layer 4 and the semiconductor substrate K. Note that such an ohmic junction is possible if the thickness Tc of the N+ layer 11S is about several microns.

[0025] <Dividing layer forming step S2> In the division layer forming step S2 (see FIG. 1), a division layer 12 that enables division of the base material 1 at a predetermined position Pt (a position of a predetermined depth Dt) in the base material 1, the position being deeper from the main surface 10a than the formation region of the N+ layer 11S, is formed. Here, the division layer 12 is a layer that enables the semiconductor substrate K having a thickness Td of the predetermined depth Dt to be separated from the base material 1 (see the division step S4 in FIG. 3), and can be formed by implanting hydrogen ions from the main surface 10a side of the base material 1. By implanting hydrogen ions, the division layer 12 can be formed at a position about 10 μm deep from the main surface 10a or a position shallower than that, and as a result, a semiconductor substrate K having a thickness Td according to that depth can be obtained.

[0026] For the formation of the division layer 12, instead of the method of implanting hydrogen ions, a method of irradiating laser light from the main surface 10a side with a focal point at a predetermined position Pt (position of a predetermined depth Dt) can be used. According to this method, the focal position can be changed in the depth direction, so that the division layer 12 can be formed at a desired depth. Therefore, according to the method of irradiating laser light, the division layer 12 can be formed at a deeper position (for example, a position at a depth of about 50 to 150 μm from the main surface 10a) than the method of implanting hydrogen ions, and as a result, a semiconductor substrate K with a thickness Td according to that depth can be obtained.

[0027] According to such a division layer forming step S2, unlike the conventional process of grinding off the WBG semiconductor to the desired thickness Td, it is possible to form a very thin semiconductor substrate K without wasting the semiconductor material (here, the expensive WBG semiconductor). On the other hand, when the thickness of the semiconductor substrate K becomes very thin, it becomes difficult for the semiconductor substrate K to maintain its flat state by itself. For this reason, before separating the semiconductor substrate K from the base material 1 in the division step S4 described later, it is necessary to hold the part of the base material 1 that will become the semiconductor substrate K with some kind of holding part so that the flat state of the semiconductor substrate K can be maintained by the holding part even after separation. Therefore, the following first holding step S3 is executed before the division step S4.

[0028] <First holding step S3> In the first holding step S3 (see FIG. 2), first, a dummy substrate 2 to be used as the holding part is prepared.

[0029] Here, the dummy substrate 2 only needs to have enough strength to maintain the flat state of the semiconductor substrate K even after the portion of the base material 1 that will become the semiconductor substrate K is separated. For this reason, it is possible to use a substrate having inferior quality in terms of electrical properties to the base material 1. On the other hand, it is preferable that the dummy substrate 2 is formed of a material having a thermal expansion coefficient close to that of the base material 1. This is because it is possible to reduce the difference in thermal expansion coefficient between the dummy substrate 2 and the semiconductor substrate K, and as a result, it is possible to suppress warping that may occur during heating in a later process (such as device formation step S5) due to the difference in thermal expansion coefficient.

[0030] Therefore, in this embodiment, a polycrystalline semiconductor wafer formed from the same type of WBG semiconductor as the base material 1 or a type of WBG semiconductor having a similar thermal expansion coefficient (for example, one of such WBG semiconductors having a heat-resistant temperature of 1800°C or higher) is prepared as the dummy substrate 2.

[0031] Then, the holding surface 20a of the dummy substrate 2 is joined to the main surface 10a of the base material 1, whereby the portion of the base material 1 that will become the semiconductor substrate K is held by the dummy substrate 2.

[0032] Specifically, when preparing the dummy substrate 2, a metal layer 13 that enables bonding between the substrate 1 and the dummy substrate 2 is formed over the entire circumference of the holding surface 20a of the dummy substrate 2, which is to face the peripheral region 10r of the main surface 10a of the substrate 1 when the main surface 10a is held, or partially only at the portion of the holding surface 20a that is to be bonded (step S31). Here, this metal layer 13 enables bonding between the substrate 1 and the dummy substrate 2 by heating through irradiation with laser light, and is a layer that contains a metal such as Cu, Al, Cr, Ti, Ta, or Au as a main component.

[0033] Next, the base material 1 and the dummy substrate 2 are overlapped to interpose the metal layer 13 between the peripheral region 10r of the main surface 10a and the holding surface 20a of the dummy substrate 2, and in this state, the metal layer 13 is heated by irradiation with laser light (step S32). At this time, the base material 1 and the dummy substrate 2 may be sandwiched between quartz plates or the like to increase the degree of adhesion with the metal layer 13.

[0034] By irradiating the metal layer 13 with the laser light, it is possible to form an adhesion portion Q for adhering the dummy substrate 2 to the main surface 10a of the base material 1 at the irradiated portion of the metal layer 13 with the laser light (the portion to be bonded) (step S33). Specifically, at the irradiated portion of the laser light, the metal layer 13 can be melted together with the base material 1 and the dummy substrate 2, or the metal that is the main component of the metal layer 13 can be diffused into the base material 1 and the dummy substrate 2. As a result, at the interfaces between the base material 1 and the dummy substrate 2 and the metal layer 13, compounds (metal silicide, etc.) or alloys (metal-Si alloy, etc.) of the main components (WBG semiconductor, etc.) of the base material 1 and the dummy substrate 2 and the metal are formed as adhesion portions Q, and the base material 1 (portion to become the semiconductor substrate K) and the dummy substrate 2 are bonded through the adhesion portion Q.

[0035] In this embodiment, the fixing portion Q is formed in the peripheral region 10r of the main surface 10a of the base material 1, and the dummy substrate 2 is bonded to the main surface 10a of the base material 1 through the fixing portion Q (step S33). Here, in a later process (such as device formation step S5), semiconductor devices are fabricated in a region of the semiconductor substrate K after separation that is inside the peripheral region 10r. Specifically, a plurality of device regions Rd for fabricating semiconductor devices are provided in the inner region (see FIG. 6). Therefore, by forming the fixing portion Q in the peripheral region 10r, it is possible to reduce the influence (influence of stress and heat generated during separation) that may occur at the time of separating the dummy substrate 2 from the semiconductor substrate K in a separation step S7 described later.

[0036] Furthermore, in this embodiment, the fixing portion Q is formed in a linear shape by scanning the laser light. This is because forming the fixing portion Q in a linear shape can reduce the fixing area, and as a result, in a detachment step S7 described later, it becomes possible to relatively easily detach the dummy substrate 2 from the semiconductor substrate K. The example of Fig. 6 shows a case where the linear fixing portion Q is formed in a ring shape around the entire circumference of the peripheral region 10r.

[0037] From the viewpoint of facilitating detachment, the fixing portion Q may be formed in a dot shape by pinpoint irradiation with laser light, and a plurality of such dot-shaped fixing portions Q may be formed so as to hold the semiconductor substrate K. The method of forming the fixing portion Q is not limited to the method using the metal layer 13, and may be changed as appropriate to a method in which the base material 1 and the dummy substrate 2 are brought into direct surface contact without using the metal layer 13, and the fixing portion Q is formed by irradiating the interface therebetween with laser light.

[0038] By holding the portion of the base material 1 that will become the semiconductor substrate K by the dummy substrate 2 in this manner, even if the thickness Td of the semiconductor substrate K after separation is very thin, the flat state of the semiconductor substrate K can be maintained by the dummy substrate 2, and subsequent handling can be easily performed. Therefore, when determining the predetermined position Pt for forming the division layer 12 in the division layer formation step S2, it is possible to determine the predetermined position Pt by setting the thickness Td (=predetermined depth Dt) of the portion to be separated from the base material 1 as small as possible (for example, as small as possible within the range of thickness according to the required pressure resistance). In other words, it is possible to manufacture a very thin semiconductor substrate K without performing the conventional process of grinding off the WBG semiconductor to the desired thickness Td. Therefore, it is possible to reduce waste of the WBG semiconductor, which is a valuable material (waste generated during the manufacturing process).

[0039] <Division step S4> In the division step S4 (see FIG. 3), the base material 1 is divided at a predetermined position Pt (position of a predetermined depth Dt) using the division layer 12, so that the portion on the main surface 10a side (the portion that will become the semiconductor substrate K) is separated from the base material 1 while still being held by the dummy substrate 2. This forms a semiconductor substrate K having a thickness Td corresponding to the predetermined depth Dt. Also, the semiconductor substrate K includes both an N+ layer 11S and an N- layer 11T (a semiconductor layer doped with a low concentration of N-type impurities).

[0040] According to the above-mentioned process from the N+ layer forming step S1 to the division step S4, by preparing a base material 1 doped with the same concentration of N-type impurity as that of the portion of the semiconductor substrate K that will become the N- layer 11T, a desired semiconductor substrate K including both the N+ layer 11S and the N- layer 11T can be formed by only simple processes (processes that can be performed in a short time) such as further injecting the N-type impurity into the base material 1 (forming the N+ layer 11S) and dividing the base material 1 at the above-mentioned predetermined position Pt. In other words, it is possible to significantly shorten the time required to manufacture the semiconductor substrate K compared to the conventional manufacturing method in which the N- layer 11T is formed by epitaxial growth.

[0041] Then, the device formation step S5 described below is performed on the divided semiconductor substrate K. Moreover, the remaining portion 1R of the base material 1 other than the semiconductor substrate K (the remaining portion after division) is reused for manufacturing a new semiconductor substrate K and a semiconductor device.

[0042] <Device formation step S5> In the device formation step S5 (see FIG. 3), at least a part of the elements Gd to be included in the semiconductor device is fabricated in each of a plurality of device regions Rd (see also FIG. 6) provided in the semiconductor substrate K. Specifically, the elements Gd are fabricated in the N-layer 11T from the surface Ka (surface exposed by division at the division layer 12 (surface where the N-type WBG semiconductor is exposed)) side of the semiconductor substrate K. Although not particularly limited, a MOSFET, a Schottky diode, or the like can be formed as the elements Gd in each device region Rd.

[0043] Such a device formation step S5 is often performed at a high temperature exceeding 1000° C. If there is a large difference in thermal expansion coefficient between the semiconductor substrate K and the dummy substrate 2, the difference in thermal expansion coefficient may cause the semiconductor substrate K to warp when heated to a high temperature. Such warping may cause stress to be generated in the semiconductor substrate K, and the stress may appear in the semiconductor substrate K as defects such as distortion. In addition, such stress may cause defects in elements Gd such as MOSFETs and Schottky diodes formed on the semiconductor substrate K.

[0044] On the other hand, in this embodiment, a semiconductor wafer formed from the same type of WBG semiconductor as the base material 1 or a type of WBG semiconductor having a similar thermal expansion coefficient is used as the dummy substrate 2. Therefore, the difference in thermal expansion coefficient between the dummy substrate 2 and the semiconductor substrate K is small. Therefore, even if the semiconductor substrate K is heated to a high temperature together with the dummy substrate 2 in this device formation step S5, the semiconductor substrate K is unlikely to warp. Therefore, stress is unlikely to be generated in the semiconductor substrate K, and therefore defects are unlikely to be generated in the elements Gd formed on the semiconductor substrate K.

[0045] <Second holding step S6> In the second holding step S6 (see FIG. 3), the surface Ka of the semiconductor substrate K is held by a holding part 3 separate from the dummy substrate 2. The holding part 3 may be the same as the dummy substrate 2, or may be a substrate formed of another material (Si, sapphire, quartz, etc.) that is not limited to semiconductor. When such a substrate is used as the holding part 3, the holding surface 30a of the holding part 3 is attached to the surface Ka of the semiconductor substrate K by using an adhesive member 31 (such as a heat-resistant double-sided tape).

[0046] The holding part 3 may be capable of chucking the front surface Ka of the semiconductor substrate K by vacuum suction. Such a holding part 3 makes the adhesive member 31 unnecessary and can prevent foreign matter from adhering to the front surface Ka of the semiconductor substrate K.

[0047] <Separation step S7> In a detaching step S7 (see FIG. 4), the dummy substrate 2 is detached from the semiconductor substrate K while the semiconductor substrate K is held by the holding portion 3.

[0048] As a first specific example, a wedge is driven between the semiconductor substrate K and the dummy substrate 2 to destroy the fixing portion Q, thereby allowing the dummy substrate 2 to be detached from the semiconductor substrate K. As a second specific example, a laser beam is irradiated onto the fixing portion Q to destroy the fixing portion Q, thereby allowing the dummy substrate 2 to be detached from the semiconductor substrate K.

[0049] As a third specific example, the semiconductor substrate K may be cut into an annular shape at a position inside the fixing portion Q by irradiating the semiconductor substrate K with laser light, thereby detaching the dummy substrate 2 from the semiconductor substrate K. As a fourth specific example, the semiconductor substrate K may be broken into annular shapes at a position inside the fixing portion Q by tearing the semiconductor substrate K and the dummy substrate 2 vertically using the bonding force of the fixing portion Q, thereby detaching the dummy substrate 2 from the semiconductor substrate K.

[0050] In this embodiment, after the dummy substrate 2 is separated from the semiconductor substrate K, the dummy substrate 2 is reused. Specifically, after the dummy substrate 2 is separated from the semiconductor substrate K, the holding surface 20a of the dummy substrate 2 is polished to remove the adhesion portion Q and the remains of the semiconductor substrate K from the holding surface 20a. Then, the dummy substrate 2 is reused in the first holding step S3 when the steps from the N+ layer forming step S1 are repeatedly performed.

[0051] In this embodiment, an expensive dummy substrate 2 formed from a WBG semiconductor is used. However, as described above, the dummy substrate 2 can be reused, and therefore such an expensive dummy substrate 2 can be effectively utilized repeatedly without being wasted.

[0052] <Electrode layer formation step S8> In the electrode layer formation step S8 (see FIG. 4), the electrode layer 4 is formed on the back surface Kb of the semiconductor substrate K exposed by removing the dummy substrate 2. As an example, a sputtering method can be used to form the electrode layer 4. At this time, since the N+ layer 11S is exposed on the back surface Kb of the semiconductor substrate K, the electrode layer 4 can be formed on the back surface Kb by ohmic junction.

[0053] <Transfer step S9> In a transfer step S9 (see FIG. 4), the semiconductor substrate K is transferred from the holder 3 to a holder sheet 5 (such as a dicing tape). Specifically, after the semiconductor substrate K is held by the holder sheet 5 from the back surface Kb side, the holder 3 is detached from the semiconductor substrate K.

[0054] In this embodiment, after the holder 3 is detached from the semiconductor substrate K, the holder 3 is reused in the second holding step S6 when the steps from the N+ layer forming step S1 onwards are repeatedly performed.

[0055] <Singulation step S10> In the singulation step S10 (see FIG. 5), while the semiconductor substrate K is held on the holding sheet 5, the semiconductor substrate K is cut to singulate each of the device regions Rd provided on the semiconductor substrate K. Specifically, the semiconductor substrate K is cut along boundary lines Lb (see FIG. 6) that separate the device regions Rd to singulate each of the device regions Rd. The cutting method used in this process may be a blade dicing method, a plasma etching method, a laser ablation method, or the like. This results in the manufacture of a plurality of semiconductor devices each having an element Gd such as a MOSFET or a Schottky diode.

[0056] According to the manufacturing method of this embodiment, as described above, the time required to manufacture the semiconductor substrate K can be significantly reduced compared to the conventional manufacturing method in which the N-layer 11T is formed by epitaxial growth. In addition, a thin semiconductor substrate K can be manufactured without performing the conventional process of grinding the WBG semiconductor down to the desired thickness Td, and therefore waste of the WBG semiconductor, which is a valuable material (waste generated during the manufacturing process) can be reduced. Therefore, in the manufacturing technology for semiconductor devices using the WBG semiconductor, it is possible to significantly reduce the manufacturing cost.

[0057] [2] Variations [2-1] First modified example 7 is a conceptual diagram showing a part of the manufacturing method according to the first modification in the order of processing. In the above-mentioned manufacturing method, the split layer forming step S2 may be performed before the N+ layer forming step S1. In this case, in the split layer forming step S2, a base material 1 in which a WBG semiconductor is doped with an N-type impurity at a low concentration is prepared. Then, in the split layer forming step S2, a predetermined position Pt (a position of a predetermined depth Dt) is set so that the depth from the main surface 10a is deeper than the planned formation region Rx of the N+ layer 11S, and then the split layer 12 is formed at the predetermined position Pt. After that, in the N+ layer forming step S1, an N-type impurity is injected from the main surface 10a side of the base material 1 to form an N+ layer 11S doped with the N-type impurity at a high concentration in the planned formation region Rx.

[0058] [2-2] Second variant 8 is a conceptual diagram showing a part of the manufacturing method according to the second modified example in the order of processing. In the above-mentioned manufacturing method, the electrode layer forming step S8 may be performed after the N+ layer forming step S1 and before the first holding step S3. Specifically, the electrode layer 4 is formed on the main surface 10a of the base material 1 (the surface that becomes the back surface Kb of the semiconductor substrate K). In this case, too, since the N+ layer 11S is exposed on the main surface 10a of the base material 1, the electrode layer 4 can be formed on the main surface 10a by ohmic junction.

[0059] According to the second modification, by forming the electrode layer 4 before the first holding step S3, the electrode layer 4 can be used as the metal layer 13 in the first holding step S3. In other words, it is possible to form the fixing portion Q by using the electrode layer 4. Specifically, by overlapping the dummy substrate 2 on the electrode layer 4, the electrode layer 4 is interposed between the main surface 10a of the base material 1 and the holding surface 20a of the dummy substrate 2 (step S32), and in this state, it is possible to form the fixing portion Q by using the electrode layer 4 by locally heating the electrode layer 4 by irradiating it with laser light (step S33). At this time, by irradiating the portion of the electrode layer 4 on the peripheral region 10r of the main surface 10a with laser light, it is possible to form the fixing portion Q in the peripheral region 10r that can reduce the influence on the device region Rd (step S33).

[0060] Furthermore, if it is necessary to use different materials for the electrode layer 4 and the metal layer 13, both the electrode layer 4 and the metal layer 13 may be formed in the electrode layer formation step S8, and the fixing portion Q may be formed using the metal layer 13 in the first holding step S3.

[0061] [2-3] Third variant 9 is a conceptual diagram showing the first holding step S3 executed in the third modified example. In the above-mentioned manufacturing method, in the first holding step S3, a substrate may be used as the dummy substrate 2, on which a bonding prevention layer 21 for preventing bonding between the dummy substrate 2 and the base material 1 (semiconductor substrate K) is formed in the following region. The region is a region 20x on the holding surface 20a of the dummy substrate 2, which is located inside a region (region where the metal layer 13 is formed) that faces the peripheral region 10r of the main surface 10a of the base material 1. Although not particularly limited, the bonding prevention layer 21 may be formed of, for example, SiO 2 layer and carbon (C) layer. SiO 2 The SiO layer is formed on the support surface 20a of the dummy substrate 2. 2 The carbon layer is formed by growing the carbon layer on the supporting surface 20a of the dummy substrate 2 by a sputtering method or a CVD method.

[0062] According to the third modification, it is possible to prevent the dummy substrate 2 from being bonded to an inner region (region that will become a semiconductor device) of the main surface 10a of the substrate 1 where bonding is not intended. In addition, by forming the bonding prevention layer 21 to be at the same height as the metal layer 13, the gap between the dummy substrate 2 and the substrate 1 in the region inside the region where the metal layer 13 is formed can be filled with the bonding prevention layer 21, and as a result, it is possible to prevent distortion (distortion that may be caused by the above-mentioned gap) from occurring in the semiconductor substrate K to be formed later.

[0063] [2-4] Fourth variant 10 is a conceptual diagram showing the first holding step S3 performed in the fourth modified example. In the above-described manufacturing method, in the first holding step S3, a ring-shaped substrate that holds the peripheral region 10r of the main surface 10a of the base material 1 may be used as the dummy substrate 2.

[0064] Such an annular dummy substrate 2 can be formed by using a disk-shaped substrate and hollowing out its inner portion. The hollowed-out inner portion can be reused as another dummy substrate 2 in the manufacture of another semiconductor substrate K of a different size. Thus, according to the fourth modification, the dummy substrate 2 can be effectively utilized.

[0065] [2-5] Fifth variant 11(A) is a conceptual diagram showing step S31 in the first holding step S3 executed in the fifth modified example. As shown in this figure, on the holding surface 20a of the dummy substrate 2, the metal layer 13 may be formed in an area shifted inward from the outer periphery of the holding surface 20a. With this configuration, even if the metal layer 13 is deformed by heat or the like in a subsequent process, the metal layer 13 is less likely to flow out to the outside.

[0066] 11(B) and 11(C) are conceptual diagrams showing two further modified examples of step S31 shown in FIG. 11(A). As shown in these figures, from the viewpoint of preventing the metal layer 13 from flowing out to the outside, an outflow prevention layer 22 may be formed on the holding surface 20a of the dummy substrate 2 between its outer periphery and the region where the metal layer 13 is formed. Here, the outflow prevention layer 22 may be formed of, for example, SiO 2 layer and carbon (C) layer. SiO 2 The SiO layer is formed on the support surface 20a of the dummy substrate 2. 2 The carbon layer is formed by growing the carbon layer by a LOCOS method. The carbon layer is formed by depositing carbon on the holding surface 20a of the dummy substrate 2 by a sputtering method or a CVD method. Such an outflow prevention layer 22 may be formed on the holding surface 20a of the dummy substrate 2 together with the bonding prevention layer 21 (see FIG. 11(C)).

[0067] [2-6] 6th variant As a sixth modified example, the method for manufacturing a semiconductor device may include the device formation step S5, the second holding step S6, and the separation step S7 among the steps described above, and the manufacturing method may be performed after the N+ layer formation step S1 to the division step S4 have been performed.

[0068] [2-7] 7th variant As a seventh variant, the method for manufacturing a semiconductor device may include the N+ layer formation step S1, the division layer formation step S2, the first holding step S3, and the division step S4 among the steps described above, and after the manufacturing method is performed, the device formation step S5 to the separation step S7 may be carried out.

[0069] The above-mentioned embodiments and the description of the modifications should be considered as illustrative in all respects and not restrictive. The scope of the present invention is indicated by the claims, not by the above-mentioned embodiments and modifications. Furthermore, the scope of the present invention is intended to include all modifications within the meaning and scope of the claims.

[0070] Furthermore, from the above-described embodiments and modifications, some steps constituting the method for manufacturing a semiconductor device may be partially extracted as the subject of the invention, or each step may be extracted individually. [Explanation of symbols]

[0071] 1 Base material 1R remainder 2 Dummy board 3 Holding part 4 electrode layer 5 Retaining Sheet K Semiconductor substrate Q Attachment 10a Main surface 10r Peripheral region 11S N+ layer 11T N-layer 12 split layers 13 Metal layer 20a Holding surface 20x inner area 21 Anti-bonding layer 22 Spill prevention layer 30a Holding surface 31 Adhesive materials Dt Predetermined depth Gd element Ka surface Kb back side Lb border Pt in place Rd Device Region Rx planned formation area Tc, Td thickness S1 N+ layer formation step S2 Dividing layer formation step S3 First holding step S4 Division Step S5 Device formation step S6 Second holding step S7 Withdrawal step S8 Electrode layer formation step S9 Transcription step S10 Singulation step

Claims

1. a split layer forming step of forming a split layer at a position at a predetermined depth from a main surface of a wide band gap semiconductor substrate, the split layer enabling the substrate to be split at the position; A first holding step of holding the main surface of the base material with a dummy substrate formed from the same or a different type of wide band gap semiconductor as the base material after the division layer forming step; a dividing step of dividing the base material at the predetermined depth position using the dividing layer after the first holding step, thereby separating the main surface side portion from the base material while being held as a semiconductor substrate by the dummy substrate; a device forming step of forming at least some of the elements to be included in a semiconductor device on a surface side of the semiconductor substrate opposite to the main surface after the dividing step; a second holding step of holding the surface of the semiconductor substrate by a holding part different from the dummy substrate after the device forming step; a detachment step of detaching the dummy substrate from the semiconductor substrate after the second holding step; Equipped with In the method for manufacturing a semiconductor device, when these steps are repeatedly performed, the dummy substrate detached in the detaching step is reused as the dummy substrate used in the first holding step.

2. a split layer forming step of forming a split layer at a position at a predetermined depth from a main surface of a wide band gap semiconductor substrate, the split layer enabling the substrate to be split at the position; A first holding step of holding the main surface of the base material with a dummy substrate formed from the same or a different type of wide band gap semiconductor as the base material after the division layer forming step; a dividing step of dividing the base material at the predetermined depth position using the dividing layer after the first holding step, thereby separating the main surface side portion from the base material while being held as a semiconductor substrate by the dummy substrate; A method for manufacturing a semiconductor device, comprising: a device formation step of fabricating at least some of the elements to be included in a semiconductor device on a surface side of the semiconductor substrate opposite to the main surface; a second holding step of holding the surface of the semiconductor substrate by a holding part different from the dummy substrate after the device forming step; a detachment step of detaching the dummy substrate from the semiconductor substrate after the second holding step; Equipped with In the method for manufacturing a semiconductor device, when these steps are repeatedly performed, the dummy substrate detached in the detaching step is reused as the dummy substrate used in the first holding step.

3. a split layer forming step of forming a split layer at a position at a predetermined depth from a main surface of a wide band gap semiconductor substrate, the split layer enabling the substrate to be split at the position; A first holding step of holding the main surface of the base material with a dummy substrate formed from the same or a different type of wide band gap semiconductor as the base material after the division layer forming step; a dividing step of dividing the base material at the predetermined depth position using the dividing layer after the first holding step, thereby separating the main surface side portion from the base material while being held as a semiconductor substrate by the dummy substrate; A method for manufacturing a semiconductor device, comprising: After carrying out this manufacturing method, a device formation step of fabricating at least some of the elements to be included in a semiconductor device on a surface side of the semiconductor substrate opposite to the main surface; a second holding step of holding the surface of the semiconductor substrate by a holding part different from the dummy substrate after the device forming step; a detachment step of detaching the dummy substrate from the semiconductor substrate after the second holding step; is executed, In the method for manufacturing a semiconductor device, when these steps are repeatedly performed, the dummy substrate obtained by separation in the separation step is reused as the dummy substrate used in the first holding step.

4. 4. The method for manufacturing a semiconductor device according to claim 1, wherein in the first holding step, dot-like or linear fixing portions for fixing the dummy substrate are formed in a peripheral region of the main surface.

5. 5. The method for manufacturing a semiconductor device according to claim 4, wherein in the first holding step, a substrate having a bonding prevention layer formed in an area inside a area that will face the peripheral area of ​​the main surface is used as the dummy substrate.

6. The method for manufacturing a semiconductor device according to claim 4 , wherein in the first holding step, a ring-shaped substrate for holding a peripheral area of ​​the main surface is used as the dummy substrate.

Images