Mounting method of substrate, substrate, and image formation device

Abstract

To suppress a solder bridge, and miniaturize a substrate.SOLUTION: A mounting method of a substrate, comprises: a first coating step of coating a solder surface of a substrate 2 with a thin mask plate 8, and further applying a cream solder 7a; a first mounting step of mounting a jumper wire for connecting between conductive patterns; a second coating step of coating the solder surface with a thickness mask plate 10, and further applying a cream solder 7b for mounting the jumper wire to be mounted; a second mounting step of mounting a chip component onto the cream solder 7a; a reflow step of fusing the cream solders 7a and 7b by reflow treatment, and soldering the chip component with the jumper wire to be mounted; a third mounting step of mounting a lead component from a surface opposite to the solder surface; a protection step of mounting a frame fixture 16 that coats a frame fixture mounting area 15; and a flow step of soldering the lead component by transporting the substrate 2 in a flow solder tank 25 in a state where the frame fixture 16 is mounted.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a method for mounting a substrate, a substrate, and an image forming apparatus, and more particularly to a method for mounting an electric substrate having conductive patterns on one side, for example.

Background Art

[0002] In a conventional electric substrate, when lead components and chip components are mixed and mounted, there is a case where flow mounting is performed. FIG. 9 is a diagram for explaining solder bridges of chip components in a conventional mounting method, where the upper side is a top view and the lower side is a cross-sectional view. FIG. 9(A) is a diagram showing the state of solder bridges. Chip components 1 are mounted adjacent to each other on a substrate 2 on which the components are mounted. In flow solder mounting, when the chip components 1 in the solder bath come out of the solder bath, solder may remain between the components, and solder bridges 3 may occur. In order to suppress the occurrence of solder bridges 3, as shown in FIG. 9(B), it is necessary to ensure a wide space between the components. However, by ensuring a wide space between the components, a correspondingly large substrate area is required. In addition, many patterns (signal patterns) for transmitting signals are routed around the periphery of a CPU or the like, and many lead jumpers for crossing the signal patterns are arranged. The lead jumpers also need to be arranged at a distance from the chip components 1 in order to suppress the occurrence of solder bridges 3.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in the conventional example, there is a problem that solder bridges and miniaturization of the substrate are in a trade-off relationship, and it is difficult to solve both of them.

[0005] The present invention has been made under such circumstances, and aims to suppress solder bridges and miniaturize a substrate.

Means for Solving the Problems

[0006] In order to solve the above-described problems, the present invention includes the following configuration.

[0007] (1) A method for mounting components on a substrate having a conductive pattern, the method including: a first coating step of covering a solder surface on which the conductive pattern of the substrate is provided with a first mask plate and further applying a first cream solder for mounting chip components; a first mounting step of mounting a jumper wire for connecting between the conductive patterns; a second coating step of covering the solder surface with a second mask plate and further applying a second cream solder for mounting the mounted jumper wire; a second mounting step of mounting the chip component on the first cream solder applied in the first coating step; a reflow step of melting the first cream solder and the second cream solder by reflow processing to solder the mounted jumper wire and the chip component; a third mounting step of mounting a lead component from a surface opposite to the solder surface; a protection step of mounting a cover member that covers at least a part of the region of the solder surface including the jumper wire and the chip component soldered in the reflow step; and a flow step of soldering the lead component by transporting the substrate in a flow solder bath with the cover member mounted thereon.

[0008] (2) A substrate having a solder surface provided with a conductive pattern, the substrate including: a first mounting region in which a lead component is mounted on a surface opposite to the solder surface; a second mounting region in which a chip component is mounted on the solder surface; and a jumper wire mounted in the second mounting region by reflow processing.

[0009] (3) An image forming apparatus that forms an image on a recording material, characterized by comprising the substrate described in (2).

Advantages of the Invention

[0010] According to the present invention, solder bridges can be suppressed and the substrate can be miniaturized.

Brief Description of the Drawings

[0011]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Modes for Carrying Out the Invention

Examples

[0012] [Image Forming Apparatus] In this embodiment, a laser beam printer (hereinafter simply referred to as a printer) will be described as an example of an electronic device to which the substrate is applied. FIG. 1 shows a schematic configuration of a laser beam printer as an example of an image forming apparatus. The laser beam printer 1000 (hereinafter referred to as the printer 1000) includes a photosensitive drum 1010, a charging unit 1020, and a developing unit 1030. The photosensitive drum 1010 is an image carrier on which an electrostatic latent image is formed. The charging unit 1020 uniformly charges the photosensitive drum 1010. The optical scanning device 1025, which is an exposure means, forms an electrostatic latent image by scanning the photosensitive drum 1010 with laser light according to image data. The developing unit 1030 forms a toner image by developing the electrostatic latent image formed on the photosensitive drum 1010 with toner. The toner image formed on the photosensitive drum 1010 (on the image carrier) is transferred to a sheet P as a recording material supplied from the cassette 1040 by the transfer unit 1050, and the unfixed toner image transferred to the sheet P is fixed by the fixing unit 1060 and discharged to the tray 1070. The photosensitive drum 1010, the charging unit 1020, the developing unit 1030, and the transfer unit 1050 are the image forming unit. Further, the printer 1000 includes a power supply device 1080, and supplies power from the power supply device 1080 to a drive unit such as a motor and a control unit 5000. The control unit 5000 has a CPU (Central Processing Unit) (not shown), and controls an image forming operation by the image forming unit, a conveyance operation of the sheet P, and the like. From the required voltage accuracy of the CPU, the voltage accuracy standard of the embodiment is, for example, 5V ± 5% (Vmin = 4.75V to Vmax = 5.25V). After a predetermined time has elapsed after the printer 1000 finishes the printing operation, the printer 1000 transitions to a standby state in which the printing operation can be executed immediately. After a further predetermined time has elapsed, the printer 1000 transitions from the standby state to a sleep state, which is a low power consumption mode, in order to reduce the power consumption during standby. The printer 1000 has three states: a sleep state, which is a second mode, a standby state, and a print state, which is a first mode, and the control unit 5000 causes transitions to each state. Note that the image forming apparatus to which the substrate of the present invention can be applied is not limited to the configuration illustrated in FIG. 1.

[0013] [Circuit Board] The printer 1000 is mainly provided with the following circuit boards. For example, a low-voltage power supply that generates a DC voltage from an AC voltage, a DC controller that controls the printer 1000, and a high-voltage power supply that generates a high voltage used in the electrophotographic process. Also, for example, a drive circuit that supplies power to an actuator that drives the conveyance of the sheet P, a toner cartridge, and a fixing roller, a sensor circuit that detects various states, and the like. In this embodiment, as an example, a process of mounting a low-voltage power supply (the power supply device 1080 described above) and a DC controller (the control unit 5000 described above) on one board will be described.

[0014] FIG. 2 is a diagram for explaining a board according to this embodiment to which the present invention is applicable. FIG. 2(A) is a top view for explaining the board 2 of this embodiment. The board 2 is a single-sided mounting board having a conductive pattern only on one side, which is advantageous in terms of cost. In a conventional single-sided board, only flow processing was performed, and in order not to generate solder bridges, it was not miniaturized. In this embodiment, it is possible to achieve miniaturization even with a single-sided board by the method described below. Here, the side on which the conductive pattern is provided is referred to as the solder side, and the surface on which lead components to be described later are mounted, which is the side opposite to the solder side, is referred to as the mounting surface. On the board 2, there are a flow area 14 as a first mounting area, a reflow area 13 as a second mounting area, and a frame jig mounting area 15. The flow area 14 is an area where components are mounted by flow mounting, and the reflow area 13 is an area where components are mounted by reflow mounting. The frame jig mounting area 15 is an area for installing a frame jig for preventing solder from entering the reflow area 13 during flow mounting. Here, flow mounting is a soldering process suitable for mounting large components and is a highly productive mounting method. On the other hand, reflow mounting is a soldering process suitable for mounting chip components to be described later and is a highly accurate mounting method.

[0015] In the flow area 14, mainly large lead components 12 (first lead components) such as AC connectors, power semiconductors, power transformers (transformers), electrolytic capacitors, and AC filters (primary filters) are mounted. Here, a lead component is a component with lead wires, and the lead wires are inserted into holes (through holes) provided in the substrate 2 from the mounting surface side and soldered on the solder surface on the side opposite to the mounting surface. On the other hand, in the reflow area 13, lead jumpers 9 as jumper wires for bridging signal lines (connecting between conductive patterns), chip components 1 (first chip components) such as CPUs, resistors, and capacitors, and small lead components 21 (second lead components) such as connectors and crystal oscillators are mounted. Here, a chip component is a component directly soldered on the solder surface of the substrate 2 and is also called a surface mount component. The reflow area 13 can mount components at a higher density compared to the flow area 14.

[0016] Figure 2(B) is a cross-sectional view for explaining the substrate 2. Here, 23 is the fillet of the reflow solder, 22 is the fillet of the flow solder, and only some of the reference numerals are shown. The substrate 2 is divided into a flow area 14 and a reflow area 13, and components are mounted on each area. As described above, in the reflow area 13, components can be mounted at a high density, and the generation of solder bridges such as those occurring in flow soldering can be greatly suppressed, so miniaturization of the substrate and improvement of quality can be expected.

[0017] [Component Area Division] The following describes the specific manufacturing method of this embodiment. In the substrate 2 of this embodiment, since it includes a low-voltage power supply circuit and many large lead components 12 are used, an inexpensive paper phenolic material with copper foil provided on one side is used. Also, generally, since lead components have a large heat capacity, there are problems such as the solder not melting even when the solder part of the lead component is heated by reflow soldering, or the coating of electrolytic capacitors melting due to heat and the components being damaged. Therefore, flow soldering mounting is used for substrates with lead components.

[0018] In the DC controller circuit, there are many patterns (hereinafter referred to as signal patterns) for transmitting signals connected from the CPU. Therefore, connection between patterns is made using lead jumpers that can span multiple signal patterns. Furthermore, in the DC controller circuit, there are many chip components except for lead jumpers.

[0019] For these reasons, in this embodiment, the lead jumper 9 with a small heat capacity is reflow-mounted in the reflow area 13, so that the power supply circuit is mounted separately in the flow area 14 and the DC controller circuit is mounted in the reflow area 13. Also, the small lead component 21 is also mounted in the reflow area 13 by applying a kink process (bending process) to the lead.

[0020] [Mounting method of the substrate] The following describes each step of the mounting method of the substrate 2. FIG. 3 is a cross-sectional view of the substrate 2 seen from the side. First, cream solder 7a is applied (first application step) to the solder surface of the substrate 2 where the conductive pattern is provided, using a thin mask plate for applying cream solder to the chip component 1 for reflow mounting. The cream solder 7a is solder for reflow mounting. The thin mask plate 8 (first mask plate) is a thin mask plate for applying cream solder 7a (first cream solder) only to the location of the target chip component 1. In the thin mask plate 8, holes are opened at the positions where the cream solder 7a is applied, that is, the positions corresponding to the lands, so that the cream solder 7a is applied to the solder surface of the substrate 2. That is, in the first application step, the solder surface of the substrate 2 where the conductive pattern is provided is covered with the first mask plate, and further, the first cream solder for mounting the chip component 1 is applied.

[0021] First, as shown in FIG. 3(A), the thin mask plate 8 is attached to the copper foil surface (solder surface) of the substrate 2, and as shown in FIG. 3(B), the cream solder 7a is squeegeed and applied only to the target location. Then, when the thin mask plate 8 is removed from the substrate 2 as shown in FIG. 3(C), the cream solder 7a is applied to the lands of the chip component 1.

[0022] FIG. 3(D) is a diagram for explaining a mounting process (first mounting process) of mounting a lead jumper 9 and a small lead component 21 on a substrate 2 according to an embodiment. First, the substrate 2 coated with cream solder 7a is turned over, and the lead jumper 9 is mounted as shown in FIG. 3(D) and bent (crimped) so that the lead jumper 9 does not come off the substrate 2. Subsequently, the small lead component 21 is mounted. Note that the lead wire of the small lead component 21 is kink-processed to prevent it from falling off the substrate 2.

[0023] Subsequently, cream solder 7b (second cream solder) is applied (second application process) using a thick mask plate 10 (second mask plate) for applying the cream solder 7b to the lead jumper 9 and the small lead component 21. In the thick mask plate 10, holes are formed at positions where the cream solder 7b is to be applied, that is, positions corresponding to the lands, so that the cream solder 7b is applied to the solder surface of the substrate 2. That is, the solder surface is covered with the second mask plate, and the cream solder 7b for mounting the mounted jumper wire is applied. FIG. 4 is a diagram for explaining the process of applying the cream solder 7b to the lead jumper 9 and the small lead component 21. First, as shown in FIG. 4(A), the substrate 2 is turned over, and the thick mask plate 10 for applying the cream solder 7b to the lead jumper 9 and the small lead component 21 is mounted as shown in FIG. 4(B).

[0024] Here, the thick mask plate 10 is a thick one used to apply more cream solder 7b to the lead jumper 9 and the small lead component 21 than the cream solder 7a to the chip component 1. If the thickness of the thin mask plate 8 is Th1 (see FIG. 3(A)) and the thickness of the thick mask plate 10 is Th2, then Th1 < Th2. Note that the thickness is the thickness in the direction orthogonal to the surface of the substrate 2. Further, the thick mask plate 10 is provided with a recess 10a as a concave portion. The recess 10a is provided at a position (region) facing the cream solder 7a for the chip component 1 when the thick mask plate 10 is mounted on the substrate 2, and is provided so as to avoid the cream solder 7a in order to protect the cream solder 7a for the chip component 1.

[0025] Then, as shown in FIG. 4(C), cream solder 7b is squeegeed and applied only to the target location. Then, as shown in FIG. 4(D), when the thick mask plate 10 is removed from the substrate 2, the cream solder 7b is applied to the lands of the lead jumper 9 and the small lead component 21. Note that since the small lead component 21 is also subjected to kink processing for preventing lead dropout, the cream solder 7b can be applied in the same manner as the lead jumper 9.

[0026] Subsequently, as shown in FIG. 5(A), the chip component 1 is mounted on the surface of the substrate 2 to which the cream solder 7a is applied (second mounting step). Subsequently, as shown in FIG. 5(B), in a reflow furnace, the cream solders 7a and 7b are melted (fused), and the chip component 1, the small lead component 21, and the lead jumper 9 are mounted by reflow processing (reflow step). Then, the cream solders 7a and 7b become fillet-shaped 23 and are soldered. Subsequently, the substrate 2 on which reflow mounting has been performed is turned over, and as shown in FIG. 6, the large lead component 12 is mounted from the surface opposite to the solder surface (third mounting step).

[0027] (Frame jig) Subsequently, an explanation of the frame jig used to prevent the intrusion of solder into the reflow area 13 during flow soldering is given. FIG. 7(A) is a perspective view of the substrate 2 seen from below (solder surface side), and the lower surface side is the solder surface. As shown in FIG. 7(B), before performing flow soldering, a frame jig 16 as a protective member (cover member) is mounted so that the flow solder does not intrude into the reflow area 13 (protection step). That is, the cover member is mounted so as to cover at least a part of the area of the solder surface including the jumper wire and the chip component soldered in the reflow step. The frame jig 16 protects at least a part of the area of the solder surface including the lead jumper 9 and the lead component 21 soldered by the above-described reflow step.

[0028] FIG. 8 is a cross-sectional view showing the substrate 2 with the frame jig 16 mounted thereon and the flow solder bath 25. The large lead component 12 is mounted in the flow area 14. The lead jumper 9, the chip component 1, and the small lead component 21 are already mounted in the reflow area 13. The frame jig 16 is mounted so as to surround the reflow area 13 in the frame jig mounting area 15. Then, the substrate 2 with the components mounted thereon is conveyed (flowed) in the flow solder bath 25 in the direction indicated by the flow direction 24 for moving the substrate 2, and the large lead component 12 is flow soldered (flow mounting process).

[0029] By performing the mounting process described above, in the reflow area 13 where reflow mounting is performed, no solder bridge occurs and high-density mounting is possible, solder bridges can be suppressed, and the substrate can be miniaturized.

[0030] Note that since chip components and lead jumpers can also be mounted by flow mounting, even if some chip components and lead jumpers are flow mounted, the same effects as the present configuration can be obtained. Also, in this configuration, the lead jumper is mounted in the reflow area 13, but even if one side (the first jumper line) of the lead jumper is mounted in the reflow area 13 and the other side (the second jumper line) is mounted in the flow area 14, the same effects as the present configuration can be obtained. Also, not only the first lead component and the second jumper line mounted by flow processing in the flow area 14, but also a second chip component may be provided. Also, in this configuration, a paper phenolic material is used for the substrate 2, but for a substrate using a lead jumper, even if it is made of another material, the same effects as the present configuration can be obtained.

[0031] As described above, according to this embodiment, solder bridges can be suppressed and the substrate can be miniaturized.

[0032] The disclosure of this embodiment includes the following methods and configurations. (Method 1) A method for mounting a substrate for mounting components on a substrate having a conductive pattern, Cover the solder surface of the substrate where the conductive pattern is provided with a first mask plate, and further perform a first coating step of applying a first cream solder for mounting chip components. A first mounting step of mounting jumper wires connecting between the conductive patterns. Cover the solder surface with a second mask plate, and further perform a second coating step of applying a second cream solder for mounting the mounted jumper wires. A second mounting step of mounting the chip components on the first cream solder applied in the first coating step. A reflow step of melting the first cream solder and the second cream solder by reflow processing to solder the mounted jumper wires and the chip components. A third mounting step of mounting lead components from the surface opposite to the solder surface. A protection step of mounting a cover member covering at least a partial region of the solder surface including the jumper wires and the chip components soldered in the reflow step. A flow step of soldering the lead components by transporting the substrate in a flow solder bath with the cover member mounted. A method for mounting a substrate, characterized by comprising the above steps. (Method 2) The method for mounting a substrate according to Method 1, wherein the first mask plate has a thickness in a direction orthogonal to the substrate that is thinner than the thickness of the second mask plate in the direction orthogonal to the substrate. (Method 3) The method for mounting a substrate according to Method 1 or Method 2, wherein the second mask plate has recesses in a region facing the first cream solder applied in the first coating step when being applied in the second coating step. (Method 4) The method for mounting a substrate according to any one of Methods 1 to 3, wherein the substrate is a single-sided substrate with the conductive pattern provided on one side. (Configuration 1) A substrate having a solder surface provided with a conductive pattern. A first mounting area where lead components are mounted on the surface opposite to the solder surface, A second mounting area where chip components are mounted on the solder surface, A jumper wire mounted in the second mounting area by reflow processing, A substrate characterized by comprising the above. (Configuration 2) When the lead component is a first lead component, The substrate according to Configuration 1, characterized by comprising a second lead component mounted in the second mounting area. (Configuration 3) The substrate according to Configuration 2, characterized by comprising a CPU and a crystal oscillator mounted in the second mounting area. (Configuration 4) When the jumper wire is a first jumper wire, The substrate according to Configuration 1, characterized by comprising a second jumper wire mounted in the first mounting area by flow processing. (Configuration 5) When the chip component is a first chip component and the jumper wire is a first jumper wire, The substrate according to Configuration 1, characterized by comprising a second jumper wire and a second chip component mounted in the first mounting area by flow processing. (Configuration 6) The substrate according to Configuration 5, characterized by comprising an AC connector, a transformer, a primary filter, an electrolytic capacitor, and a power semiconductor mounted in the first mounting area by flow processing. (Configuration 7) When the lead component mounted in the first mounting area is a first lead component, the chip component mounted in the second mounting area is a first chip component, and the jumper wire is a first jumper wire, A second lead component mounted in the second mounting area, A second jumper wire and a second chip component mounted in the first mounting area by flow processing, The substrate according to Configuration 1, characterized by comprising the above. (Configuration 8) A CPU, a crystal oscillator, and a connector mounted in the second mounting area, An AC connector, a transformer, a primary filter, an electrolytic capacitor, and a power semiconductor implemented by flow processing in the first implementation area, The substrate according to Configuration 1, characterized in that it comprises (Configuration 9) The substrate according to any one of Configurations 1 to 8, characterized in that the substrate is a single-sided substrate on which the conductive pattern is provided on one side. (Configuration 10) An image forming apparatus for forming an image on a recording material, An image forming apparatus comprising the substrate according to any one of Configurations 1 to 9. (Configuration 11) A power supply circuit for generating a DC voltage from an AC voltage is implemented in the first implementation area, The image forming apparatus according to Configuration 10, characterized in that a DC controller for controlling the image forming apparatus is implemented in the second implementation area.

Explanation of Signs

[0033] 1 Chip component 2 Substrate 7a, 7b Cream solder 8 Thin mask plate 9 Lead jumper 10 Thick mask plate 12 Lead component 16 Frame jig 21 Small lead component 25 Flow solder bath

Claims

1. A method for mounting a substrate for mounting components on a substrate having a conductive pattern, comprising: a first coating step of covering a solder surface of the substrate where the conductive pattern is provided with a first mask plate and further applying a first cream solder for mounting chip components; a first mounting step of mounting jumper wires connecting between the conductive patterns; a second coating step of covering the solder surface with a second mask plate and further applying a second cream solder for mounting the mounted jumper wires; a second mounting step of mounting the chip components on the first cream solder applied in the first coating step; a reflow step of melting the first cream solder and the second cream solder by reflow processing to solder the mounted jumper wires and the chip components; a third mounting step of mounting lead components from a surface opposite to the solder surface; a protection step of mounting a cover member covering at least a part of the region of the solder surface including the jumper wires and the chip components soldered in the reflow step; a flow step of soldering the lead components by transporting the substrate in a flow solder bath with the cover member mounted; A method for mounting a substrate, characterized by comprising the above steps.

2. The method for mounting a substrate according to claim 1, wherein the first mask plate has a thickness in a direction orthogonal to the substrate that is thinner than the thickness of the second mask plate in the direction orthogonal to the substrate.

3. The method for mounting a substrate according to claim 1 or claim 2, wherein the second mask plate has a recess in a region facing the first cream solder applied in the first coating step when being applied in the second coating step.

4. The method for mounting a substrate according to claim 1 or claim 2, wherein the substrate is a single-sided substrate having the conductive pattern provided on one side.

5. A substrate having a solder surface provided with a conductive pattern, comprising: a first mounting region where lead components are mounted on a surface opposite to the solder surface; a second mounting region where chip components are mounted on the solder surface; jumper wires mounted in the second mounting region by reflow processing; A substrate, characterized by comprising the above components.

6. When the lead components mounted in the first mounting region are regarded as first lead components, The substrate according to claim 5, comprising a second lead component mounted in the second mounting area.

7. The substrate according to claim 6, comprising a CPU and a crystal oscillator mounted in the second mounting area.

8. When the jumper wire is a first jumper wire, The substrate according to claim 5, comprising a second jumper wire mounted in the first mounting area by a flow process.

9. When the chip component is a first chip component and the jumper wire is a first jumper wire, The substrate according to claim 5, comprising a second jumper wire and a second chip component mounted in the first mounting area by a flow process.

10. The substrate according to claim 9, comprising an AC connector, a transformer, a primary filter, an electrolytic capacitor, and a power semiconductor mounted in the first mounting area by a flow process.

11. When the lead component mounted in the first mounting area is a first lead component, the chip component mounted in the second mounting area is a first chip component, and the jumper wire is a first jumper wire, a second lead component mounted in the second mounting area; a second jumper wire and a second chip component mounted in the first mounting area by a flow process; The substrate according to claim 5, characterized by comprising the same.

12. a CPU, a crystal oscillator, and a connector mounted in the second mounting area; an AC connector, a transformer, a primary filter, an electrolytic capacitor, and a power semiconductor mounted in the first mounting area by a flow process; The substrate according to claim 5, characterized by comprising the same.

13. The substrate according to claim 5, characterized in that the substrate is a single-sided substrate with the conductive pattern provided on one side.

14. An image forming apparatus for forming an image on a recording material, The image forming apparatus, characterized by comprising the substrate according to any one of claims 5 to 13.

15. In the first mounting area, a power supply circuit for generating a DC voltage from an AC voltage is mounted, In the second mounting area, a DC controller for controlling the image forming apparatus is mounted. The image forming apparatus according to claim 14.

Images