Electronic device

Abstract

To provide an electronic device capable of suppressing peeling of a solder.SOLUTION: A sub-substrate 30 includes a plurality of lands 34 to one surface 30a that is opposite to an opposite surface of a main substrate 20. An electron component 40 is arranged to the one surface 30a and includes a plurality of terminals 41 to an opposite surface 40a with the one surface 30a. A solder 50 bonds each land 34 with a terminal 41. The sub-substrate 30 includes: a wiring 33 containing each land 34 as a conductor 32; and a via hole 35. Each land 34 contains: a land 341 to which the via hole 35 is connected; and a land 342 to which the via hole 35 is not connected so as to be arranged adjacently to the land 341. The conductor 32 is thermally connected to the land 341 and contains a heat reception conductor 32H that is extended to a position which is not overlapped with the electron component 40 in a plan view from a Z direction.SELECTED DRAWING: Figure 5

Description

Technical Field

[0001] The disclosure in this specification relates to an electronic device.

Background Art

[0002] Patent Document 1 discloses an electronic device. The description of the prior art document is incorporated herein by reference as an explanation of the technical elements in this specification.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In Patent Document 1, a ball-shaped solder (solder bump) is interposed between the land (pad) of a substrate (printed wiring board) and the terminal of an electronic component to join the land and the terminal. In such a configuration, at the time of the second or subsequent reflow, there is a difference in the timing of melting of the solder at adjacent solder joints, and there is a risk of peeling of the solder that melts slowly. Such peeling may be referred to as ball drop or the like. From the above viewpoints or other viewpoints not mentioned, further improvement of the electronic device is required.

[0005] One object of the present disclosure is to provide an electronic device capable of suppressing peeling of solder.

Means for Solving the Problems

[0006] One aspect of the disclosure is a main substrate (20), a sub-substrate (30) laminated on the main substrate and having a plurality of lands (34) on one surface opposite to the surface facing the main substrate, An electronic component (40) disposed on one surface of a sub-substrate and having a plurality of terminals (41) on the surface opposite to the one surface; Solder (50) interposed between the land and the terminal and joining the land and the terminal; Comprising: The sub-substrate includes a land as a conductor (32) disposed on an insulating base material (31), wiring (33) disposed in multiple layers on the insulating base material, and an interlayer connection portion (35) connected to the wiring. The land includes a first land (341) to which the interlayer connection portion is connected and a second land (342) disposed adjacent to the first land and to which the interlayer connection portion is not connected. The conductor includes a heat-receiving conductor (32H) that is thermally connected to the first land and extends to a position that does not overlap the electronic component in a plan view from the stacking direction.

[0007] In the multiple reflows, among the stacking directions, the heat from below is blocked by the main substrate disposed below the sub-substrate. The heat from above easily escapes to the interlayer connection portion side through the first land. According to the disclosed electronic device, the portion of the heat-receiving conductor that does not overlap the electronic component absorbs the heat from above. Thereby, it is possible to suppress the delay in the melting of the solder on the first land with respect to the melting of the solder on the second land. Therefore, it is possible to suppress the occurrence of peeling of the solder at the interface with the joining target.

[0008] Another aspect of the disclosure is A substrate (30S) having a plurality of lands (34) on one surface; An electronic component (40) disposed on one surface of the substrate and having a plurality of terminals (41) on the surface opposite to the one surface; Solder (50) interposed between the land and the terminal and joining the land and the terminal; Comprising: The substrate includes a land as a conductor (32) disposed on an insulating base material (31), wiring (33) disposed in multiple layers on the insulating base material, and an interlayer connection portion (35) connected to the wiring. The land includes a first land (341) to which an interlayer connection portion is connected, and a second land (342) that is disposed adjacent to the first land and to which the interlayer connection portion is not connected. The conductor includes a heat-receiving conductor (32H) that is thermally connected to the second land and extends to a position that does not overlap with the electronic component in a plan view from the thickness direction of the substrate.

[0009] In the multiple reflows, among the thickness direction, the heat from below is transmitted to the first land through the interlayer connection portion, while it is difficult to be transmitted to the second land to which the interlayer connection portion is not connected. According to the disclosed electronic device, the portion of the heat-receiving conductor that does not overlap with the electronic component absorbs heat. Thereby, it is possible to suppress the melting of the solder on the second land from lagging behind the melting of the solder on the first land. Therefore, it is possible to suppress the occurrence of solder peeling at the interface with the bonding target.

[0010] The multiple aspects disclosed in this specification adopt different technical means to achieve their respective purposes. The claims and the reference numerals in parentheses described in this column exemplify the correspondence with the parts of the embodiments described later, and are not intended to limit the technical scope. The objects, features, and effects disclosed in this specification will become clearer by referring to the subsequent detailed description and the attached drawings.

Brief Description of the Drawings

[0011]

Figure 1

Figure 2

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Figure 10

Figure 11

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Figure 13

Figure 14

Figure 15

Figure 16

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Figure 20

Figure 21

Figure 22

Modes for Carrying Out the Invention

[0012] Hereinafter, a plurality of embodiments will be described with reference to the drawings. In each embodiment, corresponding components may be denoted by the same reference numerals, and redundant descriptions may be omitted. When only a part of the configuration is described in each embodiment, the configuration of other embodiments described previously can be applied to other parts of the said configuration. Further, not only the combinations of configurations explicitly shown in the description of each embodiment, but also the configurations of a plurality of embodiments can be partially combined with each other as long as there is no problem with the combination, even if not explicitly shown.

[0013] (First Embodiment) First, based on FIGS. 1 and 2, the schematic configuration of the electronic device will be described.

[0014] <Electronic Device> FIG. 1 is a plan view showing an example of the electronic device. FIG. 2 is a cross-sectional view taken along line II-II of FIG. 1. For convenience, in FIG. 2, the conductors of the substrate and the terminals of some electronic components are omitted.

[0015] Hereinafter, a predetermined direction is shown as the Z direction. Also, one direction orthogonal to the Z direction is shown as the X direction, and the direction orthogonal to both the Z direction and the X direction is shown as the Y direction. Unless otherwise specified, the shape viewed from the Z direction, in other words, the shape along the XY plane defined by the X direction and the Y direction, is defined as the planar shape. The plan view from the Z direction may be simply referred to as the plan view.

[0016] The electronic device 10 illustrated in FIGS. 1 and 2 includes a main substrate 20, a sub-substrate 30, electronic components 40, and solder 50. The electronic device 10 may further include a housing (not shown). The housing houses the main substrate 20, the sub-substrate 30, the electronic components 40, etc. The electronic device 10 has, for example, a predetermined control function. Such an electronic device 10 may be referred to as an electronic control unit (ECU). ECU is an abbreviation for Electronic Control Unit.

[0017] The main board 20 and the sub-board 30 may be referred to as a board, a printed circuit board, a wiring board, etc. The sub-board 30 is mounted on the main board 20. Therefore, the main board 20 may be referred to as a mother board. The thickness direction of the main board 20 is substantially parallel to the Z direction. The main board 20 has a front surface 20a and a back surface 20b. The front surface 20a is the surface on one end side in the Z direction, and the back surface 20b is the surface on the other end side in the Z direction. That is, the back surface 20b is the surface opposite to the front surface 20a in the Z direction. The sub-board 30 is disposed on the front surface 20a of the main board 20. The planar shape of the main board 20 is not particularly limited. As an example, the main board 20 of the present embodiment has a substantially rectangular shape in a plane with the X direction as the longitudinal direction. In a plan view, the main board 20 encloses the sub-board 30.

[0018] The thickness direction of the sub-board 30 is substantially parallel to the Z direction. The sub-board 30 has a front surface 30a and a back surface 30b. The front surface 30a is the surface on one end side in the Z direction, and the back surface 30b is the surface on the other end side in the Z direction. That is, the back surface 30b is the surface opposite to the front surface 30a in the Z direction. The back surface 30b is the surface facing the front surface 20a of the main board 20 in the Z direction. The planar shape of the sub-board 30 is not particularly limited. As an example, the sub-board 30 of the present embodiment has a substantially rectangular shape in a plane with the X direction as the longitudinal direction. In a plan view, the size of the sub-board 30 is smaller than that of the main board 20. The entire sub-board 30 is enclosed by the main board 20.

[0019] The sub-board 30 is stacked on the main board 20. The stacking direction of the sub-board 30 and the main board 20 is the Z direction. Electronic components 40 are disposed on the front surface 30a of the sub-board 30. The electronic components 40 are connected to the sub-board 30 via solder 50. Although details will be described later, the electronic components 40 are electronic components having a plurality of terminals on the surface facing the sub-board 30. The solder 50 joins the terminals and the lands of the sub-board 30.

[0020] The electronic device 10 includes at least one electronic component 40 as an electronic component mounted on the sub-board 30. As an example, the electronic device 10 of the present embodiment includes a plurality of electronic components 40. The electronic device 10 further includes an electronic component 60. The electronic component 60 is the remaining electronic component among the electronic components mounted on the sub-board 30 excluding the electronic component 40. The electronic component 60 is an electronic component having a structure different from that of the electronic component 40. The electronic component 60 and the electronic component 40 are arranged on one surface 30a of the sub-board 30.

[0021] The illustrated electronic device 10 further includes solder 70, an electronic component 80, and a connector 90. The solder 70 joins, for example, the sub-board 30 and the main board 20. The solder 70 joins a land provided on the back surface 30b of the sub-board 30 and a land provided on one surface 20a of the main board 20. The electronic component 80 and the connector 90 are mounted on the main board 20 together with the sub-board 30. The electronic component 80 and the connector 90 are joined to the land of the main board 20 via, for example, the solder 70.

[0022] The connector 90 is mounted on the main board 20 to electrically connect the circuit configured in the electronic device 10 and the outside (external device) of the electronic device 10. As an example, the connector 90 of the present embodiment electrically connects the circuit composed of the main board 20, the sub-board 30, and the electronic components 40, 60, 80 and an external device.

[0023] In the exemplary electronic device 10, at least one of the electronic components 40 includes an arithmetic processing circuit including a processor, a memory, a storage, and the like. The processor executes various processes for realizing each function by accessing the memory. The memory is, for example, a RAM. RAM is an abbreviation for Random Access Memory. The storage includes a non-volatile storage medium such as a flash memory. A control program executed by the processor is stored in the storage. The circuit constituted by the sub-board 30 and the electronic components 40 and 60 provides a predetermined control function. The circuit constituted by the main board 20 and the electronic component 80 provides, for example, a power supply circuit for supplying an operating power supply to the circuit constituted by the sub-board 30 and the electronic components 40 and 60, a communication interface, and the like.

[0024] <Sub-board, Electronic Component, and Mounting Structure> FIG. 3 is an enlarged view of the III region shown by the dashed-dotted line in FIG. 1. FIG. 4 is a cross-sectional view taken along the line IV-IV of FIG. 3. FIG. 5 is a cross-sectional view taken along the line V-V of FIG. 3. FIGS. 3, 4, and 5 show the arrangement region of the electronic component 40 and its peripheral region. X1 shown in FIGS. 3 and 5 indicates the direction of the multiple reflow, that is, the conveyance direction during reflow.

[0025] The sub-board 30 includes an insulating base material 31 and a conductor 32. The insulating base material 31 is formed using an electrical insulating material such as resin. The conductor 32 is disposed on the insulating base material 31. The conductor 32 is formed using a metal material having good conductivity such as Cu. The conductor 32 has a wiring 33 including a land 34 and a via hole 35. The conductor 32 includes at least a conductor providing a wiring function (circuit function). The conductor 32 may include a conductor that does not provide a wiring function, for example, a conductor for heat dissipation. The sub-board 30 further has a solder resist 36. The solder resist 36 is disposed on both surfaces in the Z direction of the insulating base material 31.

[0026] The wiring 33 is arranged in multiple layers with respect to the insulating substrate 31. That is, the sub-board 30 is a multilayer board. The wiring 33 includes a surface layer wiring 331 arranged on the surface of the insulating substrate 31 and an inner layer wiring 332 arranged inside the insulating substrate 31. The wiring 33 is formed, for example, by patterning a metal foil. The wiring 33 may be referred to as a wiring pattern, a conductor pattern, etc.

[0027] The land 34 is a part of the wiring 33 (surface layer wiring 331) and is arranged on the surface of the insulating substrate 31. Among the surface layer wiring 331, the land 34 is exposed from the solder resist 36, and the other parts are covered by the solder resist 36. The positional relationship between the land 34 and the solder resist 36 may be a normal resist or an over resist.

[0028] The via hole 35 is connected to the wiring 33 including the land 34. The via hole 35 corresponds to an interlayer connection part. The via holes 35 that make up the circuit electrically connect the wirings 33 arranged in different layers. The via hole 35 is formed, for example, by arranging a conductor in a hole formed in the insulating substrate 31 by means of metal plating or the like. The via hole 35 may be a through hole (through-hole via) that penetrates the insulating substrate 31 in the Z direction or a non-through hole. The via hole 35 may penetrate one (single layer) of the insulating layers constituting the insulating substrate 31 or a plurality of insulating layers (multiple layers). In the via hole 35, the conductor may be provided only on the wall surface of the hole or may be provided so as to fill the hole. It is also possible to adopt a configuration in which the gap of the via hole 35 is filled with resin in a state where the conductor is provided on the wall surface. For the sake of convenience, in the cross-sectional views after FIG. 4, the via hole 35 with the gap omitted is illustrated.

[0029] The electronic component 40 is an IC package. The electronic component 40 includes an IC chip (not shown), a wiring member, a sealing body, etc. The electronic component 40 is a surface-mount type component. The electronic component 40 has a plurality of terminals 41 on the opposing surface 40a to the sub-substrate 30. The terminals 41 are arranged in a matrix (matrix shape) on the opposing surface 40a. The plurality of terminals 41 are arranged side by side in the X direction and the Y direction. The electronic component 40 is, for example, BGA, LGA, etc. BGA is an abbreviation for Ball Grid Array. LGA is an abbreviation for Land Grid Array. In the case of BGA, the electronic component 40 has ball-shaped solder 50. The solder 50 is provided individually for the plurality of terminals 41.

[0030] The lands 34 connected to the terminals 41 via the solder 50 are arranged in a matrix corresponding to the terminals 41. The plurality of lands 34 are arranged side by side in the X direction and the Y direction. The lands 34 connected to the terminals 41 include the lands 341 and 342 arranged on one surface 30a. The land 341 is the land to which the via hole 35 is connected among the plurality of lands 34. The lands 34 connected to the terminals 41 include at least one land 341. It may include only one land 341 or a plurality of lands 341. The land 342 is arranged next to the land 341 and is a land to which the via hole 35 is not connected. The lands 34 connected to the terminals 41 include at least one land 342. It may include only one land 342 or a plurality of lands 342. The land 341 corresponds to the first land, and the land 342 corresponds to the second land.

[0031] As an example, in the present embodiment, in the X direction, lands 342 are arranged on both sides of one land 341. Also, in the Y direction, lands 342 are arranged on both sides of one land 341. The land 34 connected to the terminal 41 may include lands that are not connected to via holes 35 and are not located adjacent to the land 341 in the X and Y directions. For example, lands not connected to via holes 35 may be adjacent to each other. The land 34 connected to the terminal 41 may include non-connected lands that do not provide a wiring function.

[0032] The sub-substrate 30 is a build-up substrate in which build-up layers are laminated on a core layer. In a plan view, below the land 341, LVH351 and IVH352, which are via holes 35, are arranged. LVH is an abbreviation for Laser Via Hole. IVH is an abbreviation for Inner Via Hole. LVH351 is formed in the build-up layer. LVH351 is connected to the land 341. IVH352 is formed to penetrate the core layer. IVH352 is connected to the land 341 via LVH351. IVH352 is connected to the inner layer wiring 332. At least one of the lands 342 may be connected to a surface layer wiring 331 (not shown). The land 342 may be electrically connected to the via hole 35 via the surface layer wiring 331. At least one of the lands 342 may be a non-connected land.

[0033] The land 34 includes a land 343 arranged on the back surface 30b. The land 343 is connected to the land 21 of the main substrate 20 via solder 70. Note that the main substrate 20 also has the same configuration as the sub-substrate 30. The land 21 is arranged on one surface 20a of the main substrate 20. The land 21 is exposed from a solder resist (not shown). For the sake of convenience, in the cross-sectional views after FIG. 4, only the land 21 is shown as the conductor of the main substrate 20. Also, the solder resist is omitted. The arrangement of the lands 21 and 343 shown in FIGS. 4 and 5 is merely an example. The positions of the lands 21 and 343 are not particularly limited by the positions of the lands 341 and 342.

[0034] As shown in FIGS. 3 and 5, the conductor 32 includes a heat-receiving conductor 32H. The heat-receiving conductor 32H is thermally connected to a land 341 which is the first land, and extends to a position that does not overlap with the electronic component 40 in a plan view in the Z direction. That is, the heat-receiving conductor 32H extends inside and outside the electronic component 40 in a plan view. The heat-receiving conductor 32H has a first portion thermally connected to the land 341, a second portion that does not overlap with the electronic component 40, and a portion connecting the first portion and the second portion.

[0035] As an example, the heat-receiving conductor 32H of the present embodiment has a heat-receiving wiring 33H, a heat-receiving land 34H, and a heat-receiving via 35H. The heat-receiving wiring 33H is a heat-receiving wiring 331H (inner layer wiring) disposed inside the insulating base material 31. The heat-receiving land 34H and the heat-receiving via 35H are disposed at positions that do not overlap with the electronic component 40 in a plan view. The heat-receiving land 34H is aligned with the land 341 in the X direction. The heat-receiving via 35H is aligned with an LVH351 connected to the land 341 in the X direction. As an example, in the present embodiment, the heat-receiving wiring 33H is a wiring 33 that does not provide a wiring function. The heat-receiving land 34H is a land 34 that does not provide a wiring function. The heat-receiving via 35H is a via hole 35 (LVH) that does not provide a wiring function.

[0036] The heat-receiving wiring 33H thermally connects the land 341 and the heat-receiving land 34H. The heat-receiving wiring 33H extends in the X direction. The heat-receiving wiring 33H is connected to an LVH351 continuous with the land 341 at a position that overlaps with the electronic component 40 in a plan view. The heat-receiving wiring 33H is connected to the heat-receiving via 35H at a position that does not overlap with the electronic component 40 in a plan view.

[0037] <Summary of the First Embodiment> FIG. 6 shows a reference example. FIG. 6 corresponds to FIG. 3. FIG. 7 is a cross-sectional view taken along line VII-VII of FIG. 6, showing one manufacturing process of the electronic device shown in the reference example, the multiple reflow process. FIG. 7 shows the state during the multiple reflow. FIG. 7 corresponds to FIG. 8. In the reference example, an R is appended to the end of the reference numerals of the related elements shown in the present embodiment.

[0038] As shown in FIG. 6, the sub-substrate 30R of the reference example does not have the heat-receiving conductor 32H described above. Other configurations are the same as those of the electronic device 10 shown in FIGS. 3 to 5. The sub-substrate 30R has lands 341R and 342R that are connected to the terminals 41R of the electronic component 40R as lands 34R. In the Y direction, lands 342R are arranged on both sides of the land 341R. A via hole 35R is connected to the land 341R. The via hole 35R includes an LVH351R that is continuous with the land 341 and an IVH352R that is connected to the land 341R via the LVH351R. No via hole 35R is connected to the land 342R.

[0039] The electronic component 40R is mounted on the sub-substrate 30 by the first reflow. The sub-substrate 30 on which the electronic component 40 is mounted is mounted on the main substrate 20R by multiple (for example, second) reflows. The solid arrows shown in FIG. 7 indicate heat (hot air and radiant heat) during reflow. During reflow, heat, hot air, and radiant heat are received from both sides in the Z direction.

[0040] During the multiple reflows, the solder solidified by the previous reflow is heated and melted. However, a difference occurs in the melting timing of the solder. Below the sub-board 30R, the main board 20R is positioned. For this reason, the heat from below is blocked by the main board 20R. The heat from above is transmitted to the sub-board 30R through the electronic component 40. However, in the case of the land 341R to which the via hole 35R is connected, as indicated by the dashed arrow, the heat escapes to the via hole 35R side through the land 341R. Since the via hole 35R is not connected to the land 342R, it is difficult for the heat to escape from the land 342R to the inside of the sub-board 30R. For this reason, the melting of the solder on the land 341R is delayed with respect to the melting of the solder on the land 342R. As described above, since the heat from below is blocked by the main board 20R, a temperature difference is likely to occur at the solder joint between the sub-board 30R and the electronic component 40R.

[0041] Due to the heat of reflow, deformation occurs in the electronic component 40R due to the difference in the linear expansion coefficient. Specifically, it deforms (warps upward) in the direction in which the facing interval between the electronic component 40R and the sub-board 30R expands. At this time, due to the temperature difference described above, the solder on the land 342R is the molten solder 50MR, and the solder on the land 341R is the unmolten solder 50U. The molten solder 50MR follows the deformation of the electronic component 40R. The unmolten solder 50U cannot follow the deformation of the electronic component 40R. Therefore, there is a risk of peeling of the unmolten solder 50U from the terminal 41R. In the case of BGA, solder peeling may be referred to as ball drop.

[0042] FIG. 8 shows the state during the multiple reflows in the electronic device according to the present embodiment. FIG. 8 corresponds to FIG. 4. FIG. 8 shows the multiple reflow process.

[0043] As described above, the sub-substrate 30 of the present embodiment has the heat-receiving conductor 32H. Therefore, the portion of the heat-receiving conductor 32H that does not overlap with the electronic component 40 absorbs heat from above during the multiple reflows. The heat absorbed by the heat-receiving conductor 32H is transmitted to the land 341 (first land) or diffused to the via hole 35 (interlayer connection portion), suppressing the heat transfer from the land 341 to the via hole 35. As a result, the temperature of the land 341 approaches the temperature of the land 342 (second land). Therefore, it is possible to suppress the delay in the melting of the solder 50 on the land 341 with respect to the melting of the solder 50 on the land 342.

[0044] As shown in FIG. 8, when the electronic component 40 deforms in the direction in which the facing interval between the electronic component 40 and the sub-substrate 30 expands, both the solders on the lands 341 and 342 are the molten solder 50M. The molten solder 50M follows the deformation. Therefore, it is possible to suppress the occurrence of solder peeling at the interface with the joining target, for example, the electronic component 40 (terminal 41).

[0045] As exemplified, in one direction orthogonal to the Z direction (the stacking direction), the land 342 (second land) may be arranged on both sides of the land 341 (first land). In this configuration, the solder 50 on the land 341 sandwiched between the lands 342 is likely to peel. However, by providing the heat-receiving conductor 32H, it is possible to suppress the delay in the melting of the solder 50 on the land 341 sandwiched between the lands 342. When the facing interval expands, the solder 50 on the land 341 becomes the molten solder 50M, so that it is possible to suppress the occurrence of solder peeling.

[0046] As exemplified, the heat-receiving conductor 32H may have a heat-receiving wiring 331H (33H) disposed inside the insulating base material 31. This facilitates the thermal connection to the land 341 to which the via hole 35 is connected and the drawing out of the wiring to the outside of the electronic component 40 in plan view.

[0047] As illustrated, a part of the portion of the heat-receiving conductor 32H provided at a position not overlapping with the electronic component 40 may be exposed from one surface 30a of the sub-board 30. According to this, the heat-receiving conductor 32H becomes more likely to absorb the heat of reflow. Therefore, it is possible to effectively suppress the delay in the melting of the solder 50 on the land 341 with respect to the melting of the solder 50 on the land 342.

[0048] As illustrated, the heat-receiving conductor 32H may be provided on the front side of the electronic component 40 in the direction of the multiple reflows. According to this, at the time of the multiple reflows, the portion of the heat-receiving conductor 32H that does not overlap with the electronic component 40 receives the heat of reflow before the electronic component 40, so that it is possible to effectively suppress the delay in the melting of the solder 50 on the land 341 with respect to the melting of the solder 50 on the land 342.

[0049] <Modification example> The configuration of the via hole 35 (interlayer connection portion) connected to the land 341 is not limited to the above illustration. For example, as shown in FIG. 9, a configuration in which a through-hole via 353 is connected to the land 341 may be used. FIG. 9 corresponds to FIG. 5. As described above, for convenience, a through-hole via 353 with the gap omitted is shown. The heat-receiving wiring 33H of the heat-receiving conductor 32H is connected to the through-hole via 353.

[0050] As shown in FIG. 10, the via hole 35 connected to the land 341 may be configured not to include the IVH 352. FIG. 10 corresponds to FIG. 5. One end of the LVH 351 is connected to the land 341, and the other end is connected to the heat-receiving wiring 33H.

[0051] The configuration of the heat-receiving conductor 32H is not limited to the above example. At least a part of the heat-receiving conductor 32H may provide a wiring function. For example, the heat-receiving wiring 33H may provide a wiring function. As shown in FIG. 11, a single heat-receiving conductor 32H may be configured not to have a heat-receiving land 34H. Instead of the heat-receiving land 34H, a configuration having a plurality of heat-receiving vias 35H may be used. FIG. 11 corresponds to FIG. 5. The heat-receiving conductor 32H has a plurality (for example, three) of heat-receiving vias 35H. The plurality of heat-receiving vias 35H are connected to a common heat-receiving wiring 33H. In each of the plurality of heat-receiving vias 35H, one of the ends is connected to the heat-receiving wiring 33H, and the other end is exposed on one surface 30a of the sub-substrate 30.

[0052] As shown in FIG. 12, the heat-receiving wiring 33H may include a heat-receiving wiring 331H (inner layer wiring) disposed inside the insulating base material 31 and a heat-receiving wiring 332H (surface layer wiring) disposed on the surface layer of the insulating base material 31. The heat-receiving conductor 32H may be configured not to have an exposed portion. FIG. 12 corresponds to FIG. 5. Similar to FIG. 10, one end of the LVH351 is connected to the land 341, and the other end is connected to the heat-receiving wiring 331H. The heat-receiving wiring 332H is provided at a position that does not overlap with the electronic component 40 in a plan view. The heat-receiving wiring 332H is covered with a solder resist 36. The heat-receiving via 35H is connected to the heat-receiving wirings 331H and 332H.

[0053] (Second Embodiment) This embodiment is a modified example based on the preceding embodiment, and the description of the preceding embodiment can be incorporated. In the preceding embodiment, a heat-receiving conductor was provided on a sub-substrate on the main substrate. Instead, a heat-receiving conductor may be provided on a single substrate.

[0054] FIG. 13 shows an electronic device according to this embodiment. In FIG. 13, for convenience, the conductors are shown omitted. FIG. 14 is an enlarged view of the XIV region shown by a one-dot chain line in FIG. 13. FIG. 15 is a cross-sectional view taken along the XV-XV line in FIG. 14. FIG. 16 is a cross-sectional view taken along the XVI-XVI line in FIG. 14.

[0055] As shown in FIGS. 13 to 16, the electronic device 10 includes a substrate 30S, electronic components 40, and solder 50. The electronic device 10 further includes an electronic component 60 and a connector 90. The electronic device 10 may include a housing (not shown). The electronic device 10 has a configuration in which the main substrate 20, the solder 70, and the electronic component 80 are excluded from the configuration shown in the previous embodiment (see FIGS. 3 to 5). The connector 90 is mounted on the substrate 30S.

[0056] The electronic component 40 includes a plurality of terminals 41 on the opposing surface 40a to the substrate 30S. The terminals 41 are arranged in a matrix (matrix shape) on the opposing surface 40a. The plurality of terminals 41 are arranged side by side in the X direction and the Y direction.

[0057] The substrate 30S is not mounted on another substrate. The substrate 30S has the same configuration as the sub-substrate 30. The thickness direction of the substrate 30S is substantially parallel to the Z direction. The substrate 30S has a front surface 30a and a back surface 30b. As an example, the substrate 30S of the present embodiment has a substantially rectangular planar shape with the X direction as the longitudinal direction.

[0058] The substrate 30S includes an insulating base material 31 and a conductor 32. The conductor 32 has a wiring 33 including a land 34 and a via hole 35. The wiring 33 is arranged in multiple layers with respect to the insulating base material 31. The wiring 33 includes a surface wiring (not shown) arranged on the surface of the insulating base material 31 and an inner layer wiring 332 arranged inside the insulating base material 31.

[0059] The lands 34 connected to the terminals 41 via the solder 50 are arranged in a matrix corresponding to the terminals 41. The plurality of lands 34 are arranged side by side in the X direction and the Y direction. The lands 34 connected to the terminals 41 include lands 341 and 342 arranged on the front surface 30a. Similar to the previous embodiment, the land 341 is a land to which the via hole 35 is connected among the plurality of lands 34. The land 342 is a land arranged adjacent to the land 341 and to which the via hole 35 is not connected. The lands 34 include a land 343 arranged on the back surface 30b.

[0060] As an example, in the present embodiment, in the X direction, lands 341 are arranged on both sides of one land 342. Also, in the Y direction, lands 341 are arranged on both sides of one land 342. The substrate 30S is a build-up substrate. In a plan view, under the lands 341, LVH351 and IVH352, which are via holes 35, are arranged. LVH351 is connected to the land 341. IVH352 is connected to the land 341 via LVH351. The land 343 is connected to the land 341 via the via hole 35. The land 343 is provided corresponding to the land 341. The lands 341 and 343 are connected via LVH351 and IVH352.

[0061] As shown in FIGS. 14 and 16, the conductor 32 includes a heat-receiving conductor 32H. The heat-receiving conductor 32H is thermally connected to the land 342, which is the second land, and extends to a position that does not overlap with the electronic component 40 in a plan view in the Z direction. The heat-receiving conductor 32H has a first portion thermally connected to the land 342, a second portion that does not overlap with the electronic component 40, and a portion connecting the first portion and the second portion.

[0062] As an example, the heat-receiving conductor 32H of the present embodiment has a heat-receiving wiring 33H and a heat-receiving land 34H. The heat-receiving wiring 33H is the heat-receiving wiring 332H (surface wiring). The heat-receiving land 34H is arranged at a position that does not overlap with the electronic component 40 in a plan view. The heat-receiving wiring 33H thermally connects the land 341 and the heat-receiving land 34H. The heat-receiving wiring 33H extends generally in the X direction. The heat-receiving wiring 33H is drawn out from between adjacent lands 34 in the Y direction to the outside of the electronic component 40 in a plan view. As an example, the heat-receiving wiring 33H of the present embodiment is a wiring 33 that does not provide a wiring function. As described in the previous embodiment, at least a part of the heat-receiving conductor 32H may provide a wiring function.

[0063] The heat-receiving wiring 33H is connected to the land 342 at a position overlapping the electronic component 40 in a plan view. The heat-receiving wiring 33H is connected to the heat-receiving land 34H at a position not overlapping the electronic component 40 in a plan view. A part of the single surface-layer wiring 331 forms the heat-receiving land 34H and the land 341, and the remaining part forms the heat-receiving wiring 33H. The heat-receiving wiring 33H is covered by the solder resist 36, and the heat-receiving land 34H is exposed from the solder resist 36. The heat-receiving land 34H is provided on the front side of the electronic component 40 in the reflow direction (X1 direction). Other configurations are the same as those described in the previous embodiment.

[0064] <Summary of the Second Embodiment> In a configuration including a single substrate 30S, multiple reflows may be performed, for example, by mounting electronic components on both sides. When the electronic device 10 does not have the heat-receiving conductor 32H, the heat from below during the multiple reflow is less likely to be transmitted to the land 342 not connected to the via hole 35 than to the land 341 connected to the via hole 35. Therefore, a temperature difference occurs between the lands 341 and 342, and the melting of the solder 50 on the land 342 lags behind the melting of the solder 50 on the land 341.

[0065] When the electronic component 40 deforms in a direction in which the facing interval with the substrate 30S expands while the solder 50 on the land 341 is in a molten state and the solder 50 on the land 342 is in an unmelted state, although the molten solder follows the deformation of the electronic component 40, the unmelted solder cannot follow the deformation. Therefore, in a configuration without the heat-receiving conductor 32H, there is a risk of peeling of the solder 50 on the land 342.

[0066] FIG. 17 shows the state during the multiple reflow in the electronic device according to the present embodiment. FIG. 17 corresponds to FIG. 15. FIG. 17 shows the multiple reflow process.

[0067] The substrate 30S of this embodiment includes a heat-receiving conductor 32H. Therefore, the portion of the heat-receiving conductor 32H that does not overlap with the electronic component 40 absorbs the heat of the multiple reflows, for example, the heat from above. The heat absorbed by the heat-receiving conductor 32H is transmitted to the land 342 (second land). As a result, the temperature of the land 342 approaches the temperature of the land 341 (first land). Thus, it is possible to suppress the delay in the melting of the solder 50 on the land 342 with respect to the melting of the solder 50 on the land 341.

[0068] As shown in FIG. 17, when the electronic component 40 deforms in the direction in which the facing interval with the sub-substrate 30 expands, the solder on both the lands 341 and 342 is the molten solder 50M. The molten solder 50M is the solder 50 in a molten state due to the reflow heat. Therefore, it is possible to suppress the occurrence of solder peeling at the interface with the joining target, for example, the electronic component 40 (terminal 41).

[0069] As illustrated, in one direction orthogonal to the Z direction (the stacking direction), the land 341 (first land) may be arranged on both sides of the land 342 (second land). In this configuration, the solder 50 on the land 342 sandwiched by the lands 341 is likely to peel. However, by providing the heat-receiving conductor 32H, it is possible to suppress the delay in the melting of the solder 50 on the land 342 sandwiched by the lands 341. When the facing interval expands, the solder 50 on the land 342 becomes the molten solder 50M, so it is possible to suppress the occurrence of solder peeling.

[0070] As illustrated, the heat-receiving conductor 32H may have a heat-receiving wiring 332H (33H) arranged on the surface layer of the insulating base material 31. Thereby, the thermal connection to the land 342 to which the via hole 35 is not connected and the drawing out of the wiring to the outside of the electronic component 40 in plan view can be realized with a simple configuration.

[0071] The heat-receiving conductor 32H may be configured not to be exposed on one surface 30a of the sub-substrate 30, or as illustrated, a part of the portion provided at a position not overlapping with the electronic component 40 in the heat-receiving conductor 32H may be exposed from the one surface 30a. Due to the exposure, the heat-receiving conductor 32H becomes more likely to absorb the heat of reflow. Therefore, it is possible to effectively suppress the delay in the melting of the solder 50 on the land 342 with respect to the melting of the solder 50 on the land 341.

[0072] As illustrated, the heat-receiving conductor 32H may be provided on the front side of the electronic component 40 in the direction of the second and subsequent reflows. According to this, at the time of the second and subsequent reflows, the portion of the heat-receiving conductor 32H that does not overlap with the electronic component 40 receives the heat of reflow earlier than the electronic component 40. Therefore, it is possible to effectively suppress the delay in the melting of the solder 50 on the land 342 with respect to the melting of the solder 50 on the land 341.

[0073] (Third Embodiment) This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be incorporated by reference. In the preceding embodiment, heat was applied from both sides in the second and subsequent reflows. Instead of this, heat may be applied only from the side of the electronic component in the second and subsequent reflows.

[0074] FIG. 18 shows the electronic device according to this embodiment. FIG. 18 corresponds to FIG. 5. The overall configuration of the electronic device 10 is the same as that of the electronic device 10 shown in FIG. 13. The electronic device 10 includes a substrate 30S, an electronic component 40, and solder 50. The electronic device 10 has a configuration in which the main substrate 20 and the like are excluded from the configuration shown in the preceding embodiment (see FIGS. 3 to 5).

[0075] A via hole 35 is connected to the land 341. As an example in this embodiment, a through-hole via 353 is connected to the land 341. One end of the through-hole via 353 is connected to the land 341, and the other end is connected to the land 343. The heat-receiving conductor 32H is thermally connected to the land 341. As an example, the heat-receiving conductor 32H of this embodiment has a heat-receiving wiring 33H (331H), a heat-receiving land 34H, and a heat-receiving via 35H, similar to the configuration shown in FIG. 9.

[0076] The heat-receiving land 34H and the corresponding electronic component 40 are arranged side by side in the X direction. The heat-receiving land 34H is provided on the front side of the corresponding electronic component 40 in the reflow direction (X1 direction). The heat-receiving wiring 33H extends in the X direction. As shown by the solid arrow in FIG. 18, in the multiple reflows, heat is applied only from the side of the electronic component 40 (from above). No heat is applied from below. Other configurations are the same as those described in the previous embodiment.

[0077] <Summary of the Third Embodiment> In a configuration including a single substrate 30S, for repair or the like, the multiple reflows may be performed by applying heat only from the side of the electronic component 40. When the electronic device 10 does not have the heat-receiving conductor 32H, the heat from above in the multiple reflows is transmitted from the land 341 to the via hole 35. Therefore, in a configuration without the heat-receiving conductor 32H, a temperature difference occurs between the lands 341 and 342, and the melting of the solder 50 on the land 341 lags behind the melting of the solder 50 on the land 342. Thus, there is a risk of peeling of the solder 50 on the land 341 due to the deformation of the electronic component 40.

[0078] The substrate 30S of this embodiment has a heat-receiving conductor 32H. Therefore, the portion of the heat-receiving conductor 32H that does not overlap with the electronic component 40 absorbs heat from above during the multiple reflow processes. The heat absorbed by the heat-receiving conductor 32H is transmitted to the land 341 (first land) or diffused to the via hole 35 (interlayer connection portion), suppressing the heat transfer from the land 341 to the via hole 35. As a result, the temperature of the land 341 approaches the temperature of the land 342 (second land). Thus, it is possible to suppress the delay in the melting of the solder 50 on the land 341 compared to the melting of the solder 50 on the land 342. Therefore, it is possible to suppress the occurrence of solder peeling at the interface with the joining target, for example, the electronic component 40 (terminal 41).

[0079] The configuration of the via hole 35 connected to the land 341 is not limited to the above example. The configuration of the heat-receiving conductor 32H is not limited to the above example. Various configurations exemplified in the first embodiment can be adopted.

[0080] (Fourth Embodiment) This embodiment is a modification based on the preceding embodiment, and the description of the preceding embodiment can be incorporated by reference. In the preceding embodiment, attention was paid to the heat-receiving conductor for a single electronic component. In addition to this, the arrangement of the heat-receiving conductors corresponding to a plurality of electronic components may be characterized.

[0081] FIG. 19 shows an electronic device according to this embodiment. FIG. 19 corresponds to FIG. 1. In FIG. 19, among the conductors, the heat-receiving conductor is shown. The basic configuration of the electronic device 10 is the same as the configuration shown in the preceding embodiment (see FIGS. 3 to 5). The sub-substrate 30 is mounted on the main substrate 20. A plurality of electronic components 40 are arranged on one surface 30a of the sub-substrate 30.

[0082] The sub-substrate 30 includes a plurality of heat-receiving conductors 32H. The heat-receiving conductors 32H are provided individually for the plurality of electronic components 40. The heat-receiving conductors 32H are thermally connected to a land 341 which is a first land. The heat-receiving conductors 32H have a heat-receiving wiring 33H, a heat-receiving land 34H, and a heat-receiving via 35H (not shown). The heat-receiving land 34H and the corresponding electronic component 40 are arranged side by side in the X direction. The heat-receiving land 34H is provided on the front side of the corresponding electronic component 40 in the reflow direction (X1 direction). The plurality of heat-receiving conductors 32H extend in the X direction and in a common direction with respect to each other. The heat-receiving wiring 33H extends in the X direction. Other configurations are the same as those described in the previous embodiment.

[0083] <Summary of the Fourth Embodiment> As illustrated in this embodiment, in a configuration in which a plurality of electronic components 40 are arranged on one surface 30a and the heat-receiving conductors 32H corresponding to the plurality of electronic components 40 each have a heat-receiving land 34H (exposed portion), the arrangement direction of the heat-receiving land 34H and the corresponding electronic component 40 may be common to each other. According to this, by performing the reflow a plurality of times so that the heat-receiving land 34H side is on the front side in the reflow direction (X1 direction), for the plurality of electronic components 40, it is possible to suppress the melting of the solder 50 on the land 341 from lagging behind the melting of the solder 50 on the land 342.

[0084] As illustrated in this embodiment, in a configuration in which a plurality of electronic components 40 are arranged on one surface 30a, the heat-receiving conductors 32H corresponding to the plurality of electronic components 40 may extend in a common direction with respect to each other. According to this, by performing the reflow a plurality of times so that the side where the heat-receiving conductor 32H extends is on the front side in the reflow direction (X1 direction), for the plurality of electronic components 40, it is possible to suppress the melting of the solder 50 on the land 341 from lagging behind the melting of the solder 50 on the land 342.

[0085] The configuration shown in this embodiment can be combined with various configurations shown in the previous embodiments. For example, the above-described configuration may be applied to the substrate 30S. Instead of the heat-receiving land 34H, a configuration in which the heat-receiving via 35H is exposed may be used. The heat-receiving conductor 32H may have a plurality of exposed portions. The heat-receiving conductors 32H may extend in a direction common to each other and may not have exposed portions.

[0086] (Fifth Embodiment) This embodiment is a modification based on the preceding embodiments, and the descriptions of the preceding embodiments can be incorporated herein. In this embodiment, various variations that can be adopted as the heat-receiving conductor are shown.

[0087] FIG. 20 is a plan view showing the periphery of an electronic component among the electronic devices according to this embodiment. FIG. 20 corresponds to FIG. 3. In FIG. 20, for comparison, the heat-receiving land 34H (341H) provided on the front side of the electronic component 40 in the reflow direction (X1 direction) is indicated by a dashed-dotted line.

[0088] The heat-receiving conductor 32H has a heat-receiving land 34H (342H) as an exposed portion. The heat-receiving land 342H is provided side by side with the land 341 (electronic component 40) in the Y direction, rather than on the front side of the electronic component 40 in the reflow direction. The heat-receiving wiring 33H, and thus the heat-receiving conductor 32H, extends in the Y direction. In a plan view, the area of the heat-receiving land 342H is larger than the area of the front heat-receiving land 341H shown as a comparative example.

[0089] FIG. 21 shows another example of an electronic device. FIG. 21 corresponds to FIG. 20. Also in FIG. 21, for comparison, the heat-receiving land 341H is shown by a dashed line. The heat-receiving conductor 32H has a heat-receiving land 34H (343H) as an exposed portion. The heat-receiving land 343H includes a portion arranged on the rear side rather than the front side of the electronic component 40 in the reflow direction. At least a part of the heat-receiving land 343H is provided side by side with the electronic component 40 in the X direction. In the example shown in FIG. 21, the heat-receiving land 343H has a portion arranged side by side with the electronic component 40 in the X direction and a portion arranged side by side with the electronic component 40 in the Y direction. The heat-receiving wiring 33H extends, for example, in the X direction. In plan view, the area of the heat-receiving land 343H is larger than the area of the heat-receiving land 341H. The relationship of the areas is heat-receiving land 343H > heat-receiving land 342H > heat-receiving land 341H.

[0090] FIG. 22 shows another example of an electronic device. FIG. 22 corresponds to FIG. 20. The heat-receiving conductor 32H has branched heat-receiving wirings 33H. The heat-receiving conductor 32H has a plurality of heat-receiving wirings 33H that are thermally connected to a common land 341. The heat-receiving conductor 32H has a plurality of heat-receiving wirings 33H with different extending directions. The heat-receiving conductor 32H has a plurality of heat-receiving lands 34H with different areas. The heat-receiving conductor 32H has a heat-receiving land 34H and a heat-receiving via 35H as exposed portions.

[0091] The heat-receiving land 34H includes heat-receiving lands 341H, 343H, and 344H. The heat-receiving land 341H is arranged on the front side of the electronic component 40 in the reflow direction. The heat-receiving land 343H includes a portion arranged on the rear side of the electronic component 40 in the reflow direction. The heat-receiving land 343H has a portion arranged side by side with the electronic component 40 in the X direction and a portion provided so as to sandwich the electronic component 40 in the Y direction. The heat-receiving land 343H is thermally connected to the land 341 by, for example, a heat-receiving wiring 33H extending in the X direction.

[0092] The heat-receiving land 344H is disposed near the corner (front corner in the reflow direction) among the four corners of the electronic component 40. The heat-receiving land 344H is thermally connected to the land 341 by a heat-receiving wiring 33H that extends in an oblique direction between the reflow direction and the Y direction. In terms of area relationship, the heat-receiving land 343H > the heat-receiving land 344H > the heat-receiving land 341H. The heat-receiving wiring 33H that thermally connects the heat-receiving land 341H to the land 341 branches. The branched heat-receiving wiring 33H extends in an oblique direction. A plurality of heat-receiving vias 35H are connected to the branched heat-receiving wiring 33H. Each of the plurality of heat-receiving vias 35H is exposed on one surface 30a. Other configurations are the same as those described in the previous embodiment.

[0093] <Summary of the Fifth Embodiment> As exemplified in this embodiment, the heat-receiving conductor 32H may include at least one of the branched heat-receiving wiring 33H and the plurality of heat-receiving wiring 33H. Thereby, while improving the wiring degree of freedom, it becomes easier to secure the heat-receiving area necessary for suppressing peeling.

[0094] As exemplified in this embodiment, at least a part of the plurality of heat-receiving conductors 32H may extend in different directions from each other. Further, the areas of the exposed portions of the heat-receiving conductors 32H extending in different directions from each other may be different from each other. Thereby, it becomes easier to secure the heat-receiving area. Also, by making the areas of the exposed portions different, it is possible to suppress the variation in melting timing while improving the wiring degree of freedom.

[0095] Although not shown in the figure, the heat-receiving conductors 32H provided individually for the plurality of electronic components 40 may extend in different directions from each other as described above, and the areas exposed from one surface 30a of the heat-receiving conductors 32H extending in different directions from each other may be different from each other.

[0096] The above-described configuration may be applied to the heat-receiving conductor 32H that is thermally connected to the land 342.

[0097] (Other Embodiments) The disclosure in this specification, drawings, etc. is not limited to the illustrated embodiments. The disclosure includes the illustrated embodiments and modifications by those skilled in the art based thereon. For example, the disclosure is not limited to the combination of parts and / or elements shown in the embodiments. The disclosure can be implemented by various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure includes those in which parts and / or elements of the embodiments are omitted. The disclosure includes the replacement or combination of parts and / or elements between one embodiment and another. The disclosed technical scope is not limited to the description of the embodiments. Some of the disclosed technical scopes should be understood to be indicated by the description of the claims and to include all changes within the meaning and scope equivalent to the description of the claims.

[0098] The disclosure in the specification, drawings, etc. is not limited by the description of the claims. The disclosure in the specification, drawings, etc. includes the technical idea described in the claims and extends to more diverse and extensive technical ideas than the technical idea described in the claims. Therefore, various technical ideas can be extracted from the disclosure in the specification, drawings, etc. without being restricted by the description of the claims.

[0099] When an element or layer is referred to as "above", "connected to", "attached to", or "coupled with", it may be directly above, connected to, attached to, or coupled with another element or layer, and there may also be intervening elements or intervening layers. In contrast, when an element is referred to as "directly above", "directly connected to", "directly attached to", or "directly coupled with" another element or layer, there are no intervening elements or intervening layers. Other words used to describe the relationship between elements should be interpreted in a similar manner (e.g., "between" vs. "directly between", "adjacent" vs. "directly adjacent", etc.). As used in this specification, the term "and / or" includes any combination and all combinations of one or more of the associated listed items. That is, the description of A and / or B means at least one of A and B.

[0100] Spatially relative terms such as "inside", "outside", "beneath", "below", "lower", "above", "upper", etc. are used herein to facilitate the description of the relationship of one element or feature to another element or feature as illustrated. Spatially relative terms can be intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the drawings. For example, if the device in the figure is turned over, an element described as "below" or "directly below" another element or feature will be oriented "above" the other element or feature. Thus, the term "below" can encompass both upward and downward orientations. The device may be oriented in other directions (rotated 90 degrees or other orientations), and the spatially relative descriptors used in this specification are to be interpreted accordingly.

Description of the Reference Numerals

[0101] 10... Electronic device, 20... Main substrate, 20a... One side, 20b... Back side, 21... Land, 30... Substrate, 30S... Substrate, 30a... One side, 30b... Back side, 31... Insulating base material, 32... Conductor, 32H... Heat-receiving conductor, 33... Wiring, 331... Surface layer wiring, 332... Inner layer wiring, 33H, 331H, 332H... Heat-receiving wiring, 34, 341, 342, 343... Land, 34H, 341H, 342H, 343H... Heat-receiving land, 35... Via hole, 351... LVH, 352... IVH, 353... Through-hole via, 35H... Heat-receiving via, 36... Solder resist, 40... Electronic component, 40a... Opposite surface, 41... Terminal, 50, 70... Solder, 50M, 70M... Molten solder, 50U... Unmelted solder, 60, 80... Electronic component, 90... Connector

Claims

1. A main substrate (20), a sub-substrate (30) laminated on the main substrate and having a plurality of lands (34) on one surface opposite to the surface facing the main substrate, an electronic component (40) disposed on the one surface of the sub-substrate and having a plurality of terminals (41) on the surface facing the one surface, a solder (50) interposed between the land and the terminal and joining the land and the terminal, comprising: The sub-substrate includes, as a conductor (32) disposed on an insulating base material (31), the land, wirings (33) disposed in multiple layers on the insulating base material, and an interlayer connection portion (35) connected to the wirings, The land includes a first land (341) to which the interlayer connection portion is connected and a second land (342) disposed adjacent to the first land and to which the interlayer connection portion is not connected, The conductor includes a heat-receiving conductor (32H) that is thermally connected to the first land and extends to a position that does not overlap with the electronic component in a plan view from the stacking direction, an electronic device.

2. The electronic device according to claim 1, wherein the second lands are disposed on both sides of the first land in a direction orthogonal to the stacking direction.

3. A substrate (30S) having a plurality of lands (34) on one surface, an electronic component (40) disposed on the one surface of the substrate and having a plurality of terminals (41) on the surface facing the one surface, a solder (50) interposed between the land and the terminal and joining the land and the terminal, comprising: The substrate includes, as a conductor (32) disposed on an insulating base material (31), the land, wirings (33) disposed in multiple layers on the insulating base material, and an interlayer connection portion (35) connected to the wirings, The land includes a first land (341) to which the interlayer connection portion is connected and a second land (342) disposed adjacent to the first land and to which the interlayer connection portion is not connected, The conductor includes a heat-receiving conductor (32H) that is thermally connected to the second land and extends to a position that does not overlap with the electronic component in a plan view from the plate thickness direction of the substrate, an electronic device.

4. The electronic device according to claim 3, wherein the first lands are disposed on both sides of the second land in a direction orthogonal to the plate thickness direction.

5. The electronic device according to any one of claims 1 to 4, wherein the heat-receiving conductor has inner layer wirings (331H, 33H) that are the wirings disposed inside the insulating base material.

6. The electronic device according to any one of claims 1 to 4, wherein the heat-receiving conductor has surface wirings (332H, 33H) which are the wirings arranged on the surface layer on the one surface side.

7. The electronic device according to any one of claims 1 to 4, wherein a part of a portion provided at a position where the heat-receiving conductor does not overlap with the electronic component is exposed from the one surface.

8. The electronic device according to claim 7, wherein the heat-receiving conductor has a plurality of exposed portions exposed from the one surface.

9. The electronic device includes a plurality of the electronic components arranged on the one surface, the heat-receiving conductors corresponding to the plurality of the electronic components each have an exposed portion exposed from the one surface, and the arrangement directions of the exposed portions and the corresponding electronic components are common to each other. The electronic device according to claim 7.

10. The electronic device includes a plurality of the electronic components arranged on the one surface, and the heat-receiving conductors corresponding to the plurality of the electronic components extend in a common direction to each other. The electronic device according to any one of claims 1 to 4.

11. The electronic device according to any one of claims 1 to 4, wherein the heat-receiving conductor has at least one of the branched wiring and the plurality of the wirings.

12. The electronic device includes a plurality of the heat-receiving conductors, at least a part of the plurality of the heat-receiving conductors extend in different directions from each other, and the areas of the heat-receiving conductors extending in different directions from each other and exposed from the one surface are different from each other. The electronic device according to any one of claims 1 to 4.

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