Display device

The display device addresses the challenges of achieving high-definition and low power consumption by using a transistor with multiple semiconductor layers and metal oxide channel formation regions, resulting in improved reliability, visibility, and aperture ratio.

JP2025087777AInactive Publication Date: 2025-06-10SEMICON ENERGY LAB CO LTD
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Patent Information

Application Number
JP2025032557
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2018-03-30
Filing Date
2025-03-03
Publication Date
2025-06-10
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

Existing display devices, particularly liquid crystal display devices, face challenges in achieving high-definition displays with low power consumption, high reliability, and high visibility, while also maintaining a high aperture ratio.

Method used

The display device incorporates a transistor with a channel width of 30 μm or more and 1000 μm or less, featuring multiple semiconductor layers with a channel formation region made of metal oxide, such as indium or zinc. This configuration includes conductive layers that allow for visible light transmission and enhances the aperture ratio.

Benefits of technology

This configuration enables the creation of high-definition display devices with low power consumption, high reliability, and high visibility, while maintaining a high aperture ratio, thus improving light extraction efficiency and reducing power consumption.

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Abstract

To provide a high-definition display device, a display device with low power consumption, a highly reliable display device, or a display device with high visibility.SOLUTION: A display device comprises: a transistor including a metal oxide; a first conductive layer; a second conductive layer; and a third conductive layer. A channel width of the transistor is 30 μm or more and 1000 μm or less. The transistor includes more than 2 and 50 or more semiconductor layers. Each of the semiconductor layers has a first region, a second region, and a channel formation region held between the first region and the second region when viewed from a top surface. The channel formation region has a region overlapping with the first conductive layer. The first region overlaps with the second conductive layer, but not with the first conductive layer. The second region overlaps with the third conductive layer, but not with the first conductive layer. The third conductive layer has a function of transmitting visible light. The second region and the third conductive layer being laminated has a function of transmitting visible light.SELECTED DRAWING: Figure 3
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Description

Technical Field

[0001] One aspect of the present invention relates to a display device, a display module, and an electronic device. Further, one aspect of the present invention relates particularly to a liquid crystal display device.

[0002] Note that one aspect of the present invention is not limited to the above technical field. Examples of the technical field of one aspect of the present invention include semiconductor devices, display devices, light-emitting devices, power storage devices, storage devices, electronic devices, lighting devices , input devices (e.g., touch sensors, etc.), input / output devices (e.g., touch panels, etc.), their driving methods, or their manufacturing methods.

Background Art

[0003] As display devices, flat panel displays typified by liquid crystal display devices and light-emitting display devices are widely used. Patent Document 1 shows an example of a pixel portion and a driving circuit of a display device.

[0004] In recent years, technologies using transistors with metal oxides in the pixels of display devices have also been developed. Patent Document 2 discloses a technique of using a transistor with a metal oxide as a semiconductor material for a switching element of a pixel of a display device.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0006] One aspect of the present invention aims to provide a high-definition display device. Or, one aspect of the present invention aims to provide a display device with low power consumption. Or, one aspect of the present invention aims to provide a highly reliable display device. Or, one aspect of the present invention aims to provide a display device with high visibility. Or, one aspect of the present invention aims to provide a liquid crystal display device with a high aperture ratio. Or, one aspect of the present invention aims to provide a high-definition liquid crystal display device.

[0007] Or, one aspect of the present invention aims to provide a liquid crystal display device having a high aperture ratio. Or, one aspect of the present invention aims to provide a high-definition liquid crystal display device.

[0008] Note that the description of these problems does not prevent the existence of other problems. One aspect of the present invention does not necessarily need to solve all of these problems. It is possible to extract other problems from the description of the specification, drawings, and claims.

Means for Solving the Problems

[0009] One aspect of the present invention includes a transistor, a first conductive layer, a second conductive layer, and a third conductive layer. The channel width of the transistor is 30 μm or more and 1000 μm or less. The transistor has a plurality of semiconductor layers, the number of the plurality of semiconductor layers is greater than 2 and 50 or less. Each of the plurality of semiconductor layers has a channel formation region, a first region, and a second region. In each of the plurality of semiconductor layers, the channel formation region is disposed between the first region and the second region when viewed from above. The channel formation region included in each of the plurality of semiconductor layers has a metal oxide, and the metal oxide has at least indium or zinc. ​​​​​​​​​​Each of the semiconductor layers has a channel formation region that has a region overlapping with the first conductive layer, The first region overlaps with the second conductive layer and does not overlap with the first conductive layer. The second region overlaps with the third conductive layer and does not overlap with the first conductive layer. The third conductive layer transmits visible light and has a function of transmitting visible light in a stacked state with the second region and the third conductive layer. A display device having a function of transmitting visible light.

[0010] Also, in the above configuration, the width of the channel formation region of each of the plurality of semiconductor layers is preferably 2 μm or more and 300 μm or less.

[0011] Also, in the above configuration, the first region functions as one of the source region and the drain region of the transistor and the second region functions as the other of the source region and the drain region of the transistor. The first region and the second region have a lower electrical resistance than the channel formation region and preferably have boron or phosphorus.

[0012] Also, in the above configuration, the display device preferably has a function of displaying by a field sequential drive method. Preferably.

[0013] Also, in the above configuration, the display device has a liquid crystal element, and the liquid crystal element is a light-scattering type liquid crystal element and preferably scatters light when in the on state and transmits light when in the off state. Preferably.

Advantages of the Invention

[0014] According to one aspect of the present invention, a high-definition display device can be provided. Also, according to one aspect of the present invention, a display device with low power consumption can be provided. Also, according to one aspect of the present invention Furthermore, a highly reliable display device can be provided. Also, according to one aspect of the present invention, a display device with high visibility can be provided.

[0015] Also, according to one aspect of the present invention, a liquid crystal display device with a high aperture ratio can be provided. Moreover, according to one aspect of the present invention, a high-definition liquid crystal display device can be provided.

[0016] Note that the description of these effects does not preclude the existence of other effects. One aspect of the present invention does not necessarily have to have all of these effects. It is possible to extract other effects from the descriptions in the specification, drawings, and claims.

Brief Description of the Drawings

[0017]

Figure 1

Figure 2

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Figure 11

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Figure 14

Embodiments for Carrying Out the Invention

[0018] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and those skilled in the art can easily understand that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not interpreted as being limited to the description of the embodiments shown below.

[0019] In the configuration of the invention described below, the same reference numerals are commonly used for the same parts or parts having the same function among different drawings, and the repeated description thereof is omitted. Also, when referring to the same function, the hatching patterns may be the same, and there may be cases where no reference numerals are particularly assigned.

[0020] In addition, in the drawings, the positions, sizes, ranges, etc. of the respective configurations shown are, for the sake of simplicity of understanding, not necessarily representative of the actual positions, sizes, ranges, etc. For this reason, the disclosed invention is not necessarily It is not necessarily limited to the positions, sizes, ranges, etc. disclosed in the drawings.

[0021] Note that the terms "film" and "layer" can, in some cases or depending on the situation, be interchangeable with each other. For example, the term "conductive layer" can be changed to the term "conductive film". Or, for example, the term "insulating film" can be changed to the term "insulating layer".

[0022] (Embodiment 1) In this embodiment, a display device according to one aspect of the present invention will be described with reference to FIGS. 1 to 7. .

[0023] <Top surface layout of the display module> FIG. 1 shows a top view of the display module.

[0024] The display module shown in FIG. 1 includes a display device, an integrated circuit (IC) connected to the display device, and flexible printed circuit boards (FPCa, FPCb).

[0025] The display device includes a display area 100, a gate driver GD_L, and a gate driver GD_R.

[0026] The display area 100 has a plurality of pixels 11 and has a function of displaying an image.

[0027] The pixel 11 can also be called a sub-pixel. For example, one pixel unit is composed of a sub-pixel that exhibits red, a sub-pixel that exhibits green, and a sub-pixel that exhibits blue, so that full-color display can be performed in the display area 100. Note that the colors exhibited by the sub-pixels are not limited to red, green, and blue. The pixel unit may include, for example, white, yellow, magenta, or cyan. Sub-pixels presenting colors such as this may be used. Note that, in this specification and the like, sub-pixels may be simply referred to as pixels. There are cases where it is described.

[0028] The display device may incorporate one or more of a scanning line driving circuit (gate driver), a signal line driving circuit (source driver), and a driving circuit for a touch sensor. Also, one or more of these may be externally attached. The display device shown in FIG. 1 incorporates a gate driver and an integrated circuit IC having a source driver is externally attached.

[0029] Of the gate drivers GD_L and GD_R, one has a function of controlling pixels in odd-numbered rows, and the other has a function of controlling pixels in even-numbered rows. For example, the pixels in the m-th row are connected to the scanning line GL_m and are controlled by the gate driver GD_L. Also, the pixels in the (m + 1)-th row are connected to the scanning line GL_m+1 and are controlled by the gate driver GD_R. To the signal line SL_n in the n-th column, pixels 11 electrically connected to the gate driver GD_L and pixels 11 electrically connected to the gate driver GD_R are alternately connected. By providing the gate drivers separately on two opposite sides, the pitch of the wiring connected to one gate driver can be widened. Also, when the gate driver is provided only on one side, the non-display area on that side becomes wider. From this, by providing the gate drivers separately on two sides, the non-display area on each side of the display device can be narrowed and the narrow bezel can be achieved.

[0030] Signals and power are supplied to the gate drivers GD_L and GD_R from the outside via a flexible printed circuit substrate FPCa. To the integrated circuit IC, a flexible Signals and power are supplied from the outside via the flexible printed circuit board FPCb.

[0031] An example of the circuit configuration of pixel 11 will be described with reference to FIG. 2(A). FIG. 2(A) The pixel 11a shown in FIG. 2(A) has a transistor 102 and a capacitor element 105.

[0032] One of the source or drain of the transistor 102 is electrically connected to one electrode of the capacitor element 105. electrically connected.

[0033] Preferably, a display element is electrically connected in parallel or in series to the capacitor element 105. Examples of the display element include a liquid crystal element, an organic EL element, an LED element, and a MEMS (Micro Electro Mechanical Systems) element. element, etc. .

[0034] Here, a node where one of the source or drain of the transistor 102 and one electrode of the capacitor element 105 are connected is defined as node NA. node NA.

[0035] The gate of the transistor 102 is electrically connected to the wiring 121. The other of the source or drain of the transistor 102 is electrically connected to the wiring 124.

[0036] The wiring 121 can be called a scanning line and has a function of controlling the operation of the transistor. The wiring 124 has a function as a signal line for supplying an image signal.

[0037] By using a transistor with an extremely low off-current for the transistor 102, the potential of the node NA can be held for a long time. For such a transistor, for example, a metal oxide is used as the channel A transistor used in the channel formation region (hereinafter referred to as an OS transistor) can be used. .

[0038] Alternatively, a transistor having silicon in the channel formation region in the transistor included in the pixel (hereinafter referred to as an Si transistor) may be applied. Examples of the Si transistor include a transistor having amorphous silicon, a transistor having crystalline silicon (typically, low-temperature polysilicon or single-crystalline silicon), and the like. For example, when rewriting an image signal every one frame period, an OS transistor may be used, or an Si transistor may be used. When it is necessary to hold the potential of the node NA for a long time, it is preferable to use an OS transistor rather than an Si transistor. For example, when rewriting an image signal every one frame period, an OS transistor may be used, or an Si transistor may be used. When it is necessary to hold the potential of the node NA for a long time, it is preferable to use an OS transistor rather than an Si transistor. For example, when rewriting an image signal every one frame period, an OS transistor may be used, or an Si transistor may be used. When it is necessary to hold the potential of the node NA for a long time, it is preferable to use an OS transistor rather than an Si transistor.

[0039] For example, when rewriting an image signal every one frame period, an OS transistor may be used, or an Si transistor may be used. When it is necessary to hold the potential of the node NA for a long time, it is preferable to use an OS transistor rather than an Si transistor. For example, when rewriting an image signal every one frame period, an OS transistor may be used, or an Si transistor may be used. When it is necessary to hold the potential of the node NA for a long time, it is preferable to use an OS transistor rather than an Si transistor. For example, when rewriting an image signal every one frame period, an OS transistor may be used, or an Si transistor may be used. When it is necessary to hold the potential of the node NA for a long time, it is preferable to use an OS transistor rather than an Si transistor.

[0040] <Top layout of pixel> An example of the transistor 102 and the capacitor element 105 included in the pixel 11a will be described with reference to FIGS. 2(B) and 3. An example of the transistor 102 and the capacitor element 105 included in the pixel 11a will be described with reference to FIGS. 2(B) and 3.

[0041] FIG. 3(A) shows an example of a top view of the transistor 102 and the capacitor element 105. FIG. 2(B) shows a cross section corresponding to the dashed two-dot line C-D shown in FIG. 3(A). The capacitor element 105 is electrically connected to the transistor 102 via a conductive layer 41 or the like. FIG. 3(A) shows an example of a top view of the transistor 102 and the capacitor element 105. FIG. 2(B) shows a cross section corresponding to the dashed two-dot line C-D shown in FIG. 3(A). The capacitor element 105 is electrically connected to the transistor 102 via a conductive layer 41 or the like. FIG. 3(A) shows an example of a top view of the transistor 102 and the capacitor element 105. FIG. 2(B) shows a cross section corresponding to the dashed two-dot line C-D shown in FIG. 3(A). The capacitor element 105 is electrically connected to the transistor 102 via a conductive layer 41 or the like.

[0042] The transistor 102 includes a semiconductor layer 231a, a conductive layer 223a, a conductive layer 221a, a conductive layer 222a, and a conductive layer 46c. The capacitor element 105 can be configured by a conductive layer 46b, a conductive layer 41, and an insulating layer 44 sandwiched between two conductive layers. The transistor 102 includes a semiconductor layer 231a, a conductive layer 223a, a conductive layer 221a, a conductive layer 222a, and a conductive layer 46c. The capacitor element 105 can be configured by a conductive layer 46b, a conductive layer 41, and an insulating layer 44 sandwiched between two conductive layers. The transistor 102 includes a semiconductor layer 231a, a conductive layer 223a, a conductive layer 221a, a conductive layer 222a, and a conductive layer 46c. The capacitor element 105 can be configured by a conductive layer 46b, a conductive layer 41, and an insulating layer 44 sandwiched between two conductive layers. Layer 223a and conductive layer 221a preferably function as gate electrodes. The conductive layer 223a is laminated with semiconductor layer 231a with an insulating layer 225 therebetween that functions as a gate insulating film and is arranged. Conductive layer 221a is laminated with semiconductor layer 231a with an insulating layer 211 therebetween that functions as a gate insulating film and is arranged. Conductive layer 223a and conductive layer 221a may be electrically connected at an opening 303 provided in a layer sandwiched between conductive layer 223a and conductive layer 221a.

[0043] Here, in FIG. 3(A), conductive layer 223a and conductive layer 221a are electrically connected by opening 303, and conductive layer 221a is used as a wiring that extends to other regions, for example, adjacent pixels. Instead of conductive layer 221a, conductive layer 223a may be used as the wiring. Conductive layer 221a has a region that intersects conductive layer 222a, for example, when viewed from above. By using conductive layer 221a as the wiring, a plurality of insulating layers can be arranged between conductive layer 222a and conductive layer 221a, and the physical distance between the conductive layers can be increased, so there are advantages such as less likelihood of short circuits and smaller parasitic capacitance.

[0044] Conductive layer 222a is arranged on semiconductor layer 231a via an insulating layer. In particular, conductive layer 222a is arranged on a low-resistance region of semiconductor layer 231a. An opening 301 is provided in the insulating layer. Conductive layer 222a is preferably electrically connected to semiconductor layer 231a at opening 301. Also, conductive layer 222a is preferably provided so as to fill the inside of opening 301. Semiconductor layer 231a has a region 231ai that is a region overlapping conductive layer 223a and two low-resistance regions 231an. The two low-resistance regions 231an ​ 、When viewed from above, they are arranged with the conductive layer 223a therebetween. The region 231ai preferably functions as a channel formation region. One of the two low-resistance regions 231an functions preferably as a source region, and the other preferably functions as a drain region. The low-resistance region of the semiconductor layer contains, for example, impurity elements such as hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, arsenic, aluminum, or noble gases . In particular, it preferably contains boron or phosphorus. Also, it may contain two or more of these elements .

[0045] The conductive layer 41 is disposed on the conductive layer 46b and on the conductive layer 46c via an insulating layer. In this insulating layer, an opening 304 is provided in the region overlapping with the conductive layer 46c. The conductive layer 4 1 is preferably electrically connected to the conductive layer 46c at the opening 304. Also , the conductive layer 41 is provided so as to cover the opening 302.

[0046] FIG. 3(B) is a top view in the case where the conductive layer 41 is not shown in FIG. 3(A) for easier viewing of the figure. Also, FIG. 3(C) is a top view in the case where the conductive layer 222a, the conductive layer 46c, the conductive layer 46b, the opening 301, the opening 302, etc. are not shown. The conductive layer 46 c is disposed on the semiconductor layer 231a via an insulating layer. In particular, the conductive layer 46c is disposed on the low-resistance region 231an of the semiconductor layer 231a. An opening 302 is provided in this insulating layer. The conductive layer 46c is preferably electrically connected to the semiconductor layer 231a at the opening 302 . Also, the conductive layer 46c is provided so as to cover the inside of the opening 302.

[0047] The conductive layer 222a is electrically connected to one of the source and drain of the transistor 102 and the conductive layer 46c is electrically connected to the other of the source and drain of the transistor 102 is done.

[0048] By using an OS transistor as the transistor 102, the semiconductor layer 231a can be configured to have a function of transmitting visible light. Also, by including impurity elements in the semiconductor layer 231a or the like, while maintaining the function of transmitting visible light, the resistance of the semiconductor layer can be reduced.

[0049] It is preferable to use materials that transmit visible light for the semiconductor layer 231a, the conductive layer 46c, the conductive layer 46b, and the conductive layer 41. By forming the transistor 102 and the capacitor element 105 on a substrate that transmits visible light, the region 111 shown in FIG. 3(A) can be made into a region having a function of transmitting visible light. By using the configuration of one aspect of the present invention, the area of the region 111 as viewed from the top surface can be made wider. Therefore, the aperture ratio of the pixel can be increased and. By increasing the aperture ratio, the light extraction efficiency (or the transmittance of the pixel) can be increased and. Thereby, the power consumption of the display device can be reduced. Also, the display quality of the display device can be improved.

[0050] The transistor 102 shown in FIG. 3(A) can be configured such that one of the wirings electrically connected to the source and drain is formed by the conductive layer 222a and the other is formed by the conductive layer 46c. As shown in the cross-section of FIG. 2(B ), each conductive layer is formed in a different layer via an insulating layer. Compared with the case where each conductive layer is formed in the same layer, the distance between the conductive layers can be made smaller when viewed from the top surface in some cases. For example, as shown in FIG. 3(D), the conductive layer 222a is from the top surface ​​​​​By having a region overlapping with the conductive layer 223a, the wiring width of the conductive layer 222a can be made wider. By making the wiring width wider, for example, the wiring resistance can be decreased, and the performance of the display device can be enhanced. By widening the channel width of the transistor 102, the current driving ability of the transistor 102 is improved, and the charging speed to the capacitive element 105 is improved. On the other hand, when the channel width of the transistor 102 is widened, the occupation area of the transistor 102 in the pixel becomes larger, and the aperture ratio may decrease. Here, the channel width is, for example, the width of the channel formation region. By using the configuration of one aspect of the present invention, a higher aperture ratio may be achievable in the case where the channel width of the transistor 102 is wide.

[0051] By using the configuration of one aspect of the present invention, the capacitance can be increased. Therefore, even when a liquid crystal material with a high relative dielectric constant is used, an excellent response speed can be realized. The semiconductor layer included in the transistor may be composed of a plurality of island-shaped semiconductor layers. FIG. 4 shows an example in which the semiconductor layer 231a included in the transistor 102 is composed of a plurality of island-shaped semiconductor layers. The semiconductor layer 231a shown in FIG. 4 is composed of m (where m is an integer of 2 or more and 50 or less, more preferably 3 or more and 20 or less, still more preferably 3 or more and 10 or less) island-shaped semiconductor layers 231a_1 to 231a_m. By using a plurality of island-shaped semiconductor layers, heat dissipation may be facilitated. Therefore, the temperature rise during the operation of the transistor can be suppressed. When the channel width of the transistor 102 is widened, the occupation area of the transistor 102 in the pixel becomes larger, and the aperture ratio may decrease. Here, the channel width is, for example, the width of the channel formation region. By using the configuration of one aspect of the present invention, a higher aperture ratio may be achievable in the case where the channel width of the transistor 102 is wide.

[0052] By using the configuration of one aspect of the present invention, a higher aperture ratio may be achievable in the case where the channel width of the transistor 102 is wide. By using the configuration of one aspect of the present invention, a higher aperture ratio may be achievable in the case where the channel width of the transistor 102 is wide.

[0053] By using the configuration of one aspect of the present invention, the capacitance can be increased. Therefore, even when a liquid crystal material with a high relative dielectric constant is used, an excellent response speed can be realized. By using the configuration of one aspect of the present invention, the capacitance can be increased. Therefore, even when a liquid crystal material with a high relative dielectric constant is used, an excellent response speed can be realized.

[0054] The semiconductor layer included in the transistor may be composed of a plurality of island-shaped semiconductor layers. FIG. 4 shows an example in which the semiconductor layer 231a included in the transistor 102 is composed of a plurality of island-shaped semiconductor layers. The semiconductor layer 231a shown in FIG. 4 is composed of m (where m is an integer of 2 or more and 50 or less, more preferably 3 or more and 20 or less, still more preferably 3 or more and 10 or less) island-shaped semiconductor layers 231a_1 to 231a_m. By using a plurality of island-shaped semiconductor layers, heat dissipation may be facilitated. Therefore, the temperature rise during the operation of the transistor can be suppressed. FIG. 4 shows an example in which the semiconductor layer 231a included in the transistor 102 is composed of a plurality of island-shaped semiconductor layers. The semiconductor layer 231a shown in FIG. 4 is composed of m (where m is an integer of 2 or more and 50 or less, more preferably 3 or more and 20 or less, still more preferably 3 or more and 10 or less) island-shaped semiconductor layers 231a_1 to 231a_m. By using a plurality of island-shaped semiconductor layers, heat dissipation may be facilitated. Therefore, the temperature rise during the operation of the transistor can be suppressed. The semiconductor layer 231a shown in FIG. 4 is composed of m (where m is an integer of 2 or more and 50 or less, more preferably 3 or more and 20 or less, still more preferably 3 or more and 10 or less) island-shaped semiconductor layers 231a_1 to 231a_m. By using a plurality of island-shaped semiconductor layers, heat dissipation may be facilitated. Therefore, the temperature rise during the operation of the transistor can be suppressed. The semiconductor layer 231a shown in FIG. 4 is composed of m (where m is an integer of 2 or more and 50 or less, more preferably 3 or more and 20 or less, still more preferably 3 or more and 10 or less) island-shaped semiconductor layers 231a_1 to 231a_m. By using a plurality of island-shaped semiconductor layers, heat dissipation may be facilitated. Therefore, the temperature rise during the operation of the transistor can be suppressed. The semiconductor layer 231a shown in FIG. 4 is composed of m (where m is an integer of 2 or more and 50 or less, more preferably 3 or more and 20 or less, still more preferably 3 or more and 10 or less) island-shaped semiconductor layers 231a_1 to 231a_m. By using a plurality of island-shaped semiconductor layers, heat dissipation may be facilitated. Therefore, the temperature rise during the operation of the transistor can be suppressed. By using a plurality of island-shaped semiconductor layers, heat dissipation may be facilitated. Therefore, the temperature rise during the operation of the transistor can be suppressed. It may be manufactured. As a result, the reliability of the transistor may be improved.

[0055] For example, the channel width of the transistor 102 is in the region overlapping the gate electrode in the semiconductor layer of the transistor 102, and is the width in a direction substantially perpendicular to the direction from the source region to the drain region as viewed from above. in the region overlapping the gate electrode, and is the width in a direction substantially perpendicular to the direction from the source region to the drain region as viewed from above. is the width in a direction substantially perpendicular to the direction from the source region to the drain region as viewed from above.

[0056] When the transistor 102 has a plurality of island-shaped semiconductor layers, the channel width of the transistor 102 is, for example, the sum of the widths of the respective island-shaped semiconductor layers. The width of each island-shaped semiconductor layer is, for example, 2 μm or more and 300 μm or less, or 3 μm or more and 200 μm or less, is, for example, the sum of the widths of the respective island-shaped semiconductor layers. The width of each island-shaped semiconductor layer is, for example, 2 μm or more and 300 μm or less, or 3 μm or more and 200 μm or less, or 5 μm or more and 100 μm or less, or 10 μm or more and 50 μm or less. Also, or 5 μm or more and 100 μm or less, or 10 μm or more and 50 μm or less. Also, the width of each island-shaped semiconductor layer is, for example, smaller than 100 times the channel length of the transistor 102, more preferably smaller than 50 times, and even more preferably smaller than 25 times. the width of each island-shaped semiconductor layer is, for example, smaller than 100 times the channel length of the transistor 102, more preferably smaller than 50 times, and even more preferably smaller than 25 times.

[0057] When the configuration shown in FIG. 4 is used for the transistor 102, the channel width is, for example, 30 μm or more and 1000 μm or less, or 30 μm or more and 500 μm or less, or 50 μm or more and 350 μm or less.

[0058] <Configuration example of display device> Using FIGS. 5(A), (B), (C), FIG. 6, and FIGS. 7(A), (B), a configuration example of a display device having two transistors and two capacitive elements in a pixel will be described. Using FIGS. 5(A), (B), (C), FIG. 6, and FIGS. 7(A), (B), a configuration example of a display device having two transistors and two capacitive elements in a pixel will be described.

[0059] The display device according to one aspect of the present invention has a function for adding a correction signal to an image signal.

[0060] The correction signal is added to the image signal by capacitive coupling and supplied to the liquid crystal element. Thus, the liquid crystal element can display the corrected image. By this correction, for example, the liquid crystal element can express more gradations than those that can be expressed using only the image signal.

[0061] Also, by this correction, the liquid crystal element can be driven at a voltage higher than the output voltage of the source driver. Since the voltage supplied to the liquid crystal element within the pixel can be changed to a desired value, an existing source driver can be used, and the cost of newly designing the source driver can be reduced. Also, an increase in the output voltage of the source driver can be suppressed, and the power consumption of the source driver can be reduced.

[0062] By driving the liquid crystal element with a high voltage, the display device can be used in a wide temperature range, and reliable display can be performed in both low-temperature and high-temperature environments. For example, the display device can be used as a display device for in-vehicle or camera applications.

[0063] Also, since the liquid crystal element can be driven with a high voltage, a liquid crystal material having a high driving voltage, such as a liquid crystal showing a blue phase, can be used, and the range of selection of the liquid crystal material can be widened.

[0064] Also, since the liquid crystal element can be driven with a high voltage, the response speed of the liquid crystal can be improved by over-drive driving in which the voltage applied to the liquid crystal element is temporarily increased to quickly change the alignment of the liquid crystal.

[0065] ​​​​​​​​​​​​The correction signal is generated by an external device, for example, and written to each pixel. Generation of the correction signal may be performed in real time using an external device, or the correction signal stored in a recording medium may be read out and synchronized with the image signal.

[0066] In the display device according to one aspect of the present invention, the supplied image signal is not changed, and a new image signal can be generated at the pixel to which the correction signal is supplied. Compared with the case of generating the new image signal itself using an external device, the load on the external device can be reduced. Further, the operation for generating a new image signal at the pixel can be performed in a small number of steps, and it is possible to cope with a display device having a large number of pixels and a short horizontal period. When generating the new image signal itself using an external device, the load on the external device can be reduced. Also, the operation for generating a new image signal at the pixel can be performed in a small number of steps, and it is possible to cope with a display device having a large number of pixels and a short horizontal period. When generating the new image signal itself using an external device, the load on the external device can be reduced. Also, the operation for generating a new image signal at the pixel can be performed in a small number of steps, and it is possible to cope with a display device having a large number of pixels and a short horizontal period. When generating the new image signal itself using an external device, the load on the external device can be reduced. Also, the operation for generating a new image signal at the pixel can be performed in a small number of steps, and it is possible to cope with a display device having a large number of pixels and a short horizontal period. When generating the new image signal itself using an external device, the load on the external device can be reduced. Also, the operation for generating a new image signal at the pixel can be performed in a small number of steps, and it is possible to cope with a display device having a large number of pixels and a short horizontal period.

[0067] <Circuit> FIG. 5(A) shows a circuit diagram of pixel 11b.

[0068] Pixel 11b includes transistor 101, transistor 102, capacitor element 104, capacitor element 105, and liquid crystal element 106.

[0069] One of the source or drain of transistor 101 is electrically connected to one electrode of capacitor element 104. The other electrode of capacitor element 104 is electrically connected to one of the source or drain of transistor 102, one electrode of capacitor element 105, and one electrode of liquid crystal element 106. One of the source or drain of transistor 101 is electrically connected to one electrode of capacitor element 104. The other electrode of capacitor element 104 is electrically connected to one of the source or drain of transistor 102, one electrode of capacitor element 105, and one electrode of liquid crystal element 106. One of the source or drain of transistor 101 is electrically connected to one electrode of capacitor element 104. The other electrode of capacitor element 104 is electrically connected to one of the source or drain of transistor 102, one electrode of capacitor element 105, and one electrode of liquid crystal element 106. One of the source or drain of transistor 101 is electrically connected to one electrode of capacitor element 104. The other electrode of capacitor element 104 is electrically connected to one of the source or drain of transistor 102, one electrode of capacitor element 105, and one electrode of liquid crystal element 106.

[0070] Here, the node to which one of the source or drain of transistor 101 and one electrode of capacitor element 104 are connected is defined as node NS. The other electrode of capacitor element 104, one of the source or drain of transistor 102, one electrode of capacitor element 105, and the liquid crystal element One of the source or drain of transistor 101 and one electrode of capacitor element 104 are connected to node NS. The other electrode of capacitor element 104, one of the source or drain of transistor 102, one electrode of capacitor element 105, and the liquid crystal element One of the source or drain of transistor 101 and one electrode of capacitor element 104 are connected to node NS. The other electrode of capacitor element 104, one of the source or drain of transistor 102, one electrode of capacitor element 105, and the liquid crystal element Let the node to which one electrode of 106 is connected be node NA.

[0071] The gate of transistor 101 is electrically connected to wiring 122. Transistor 10 The gate of 2 is electrically connected to wiring 121. The source or drain of the other of transistor 101 is electrically connected to wiring 125. The source or the other of the drain of transistor 102 is electrically connected to wiring 124.

[0072] The other electrode of capacitor element 105 and the other electrode of liquid crystal element 106 are each electrically connected to common wiring VCOM and common wiring TCOM. Arbitrary potentials can be supplied to common wiring VCOM and common wiring TCOM respectively.

[0073] Wiring 121 and wiring 122 can each be called a scanning line and have the function of controlling the operation of the transistor. Wiring 125 has the function of a signal line for supplying an image signal . Wiring 124 has the function of a signal line for writing data to node NA.

[0074] Each transistor shown in Fig. 5(A) has a back gate electrically connected to the gate, but the connection of the back gate is not limited to this. Also, a transistor does not necessarily need to be provided with a back gate.

[0075] By making transistor 101 non-conductive, the potential of node NS can be held. Also, by making transistor 102 non-conductive, the potential of node NA can be held. Also, in a state where transistor 102 is non-conductive, by supplying a predetermined potential to node NS through transistor 101, by capacitive coupling through capacitor element 104, the node ​ The potential of node NA can be changed according to the change in the potential of node NS.

[0076] In pixel 11b, the correction signal written from wiring 124 to node NA is capacitively coupled with the image signal supplied from wiring 12 5 and supplied to the liquid crystal element 106. Therefore, The liquid crystal element 106 can display the corrected image.

[0077] By using a transistor with an extremely low off-current for transistor 101, the potential of node NS can be held for a long time. As such a transistor, for example, an OS transistor can be used. Similarly, by using a transistor with an extremely low off-current for transistor 102, the potential of node NA can be held for a long time. Examples of transistors with an extremely low off-current include, for example, OS transistors. Also, Si transistors may be applied to the transistors included in the pixel. Or, both an OS transistor and an S i transistor may be used.

[0078] Or, Si transistors may be applied to the transistors included in the pixel. Examples of Si transistors include transistors having amorphous silicon, transistors having crystalline silicon (typically, low-temperature polysilicon or single-crystalline silicon), etc.

[0079] For example, when rewriting the correction signal and the image signal every one-frame period, either an OS transistor or an Si transistor may be used for transistor 101 and transistor 102. When it is necessary to hold the potential of node NS or node NA for a long time In the transistors 101 and 102, OS transistors are used rather than Si transistors. It is preferable to use a diastereomer.

[0080] <Timing chart> Using the timing chart shown in FIG. 5B, the correction signal (Vp) in the pixel 11b The operation of writing the voltage Vs to the node NA will be described. It is preferable that the positive signal Vp is written every frame period. The correction signal (Vp) supplied can be any positive or negative signal. In the following description, a positive signal is supplied. In addition, in the following description, a high potential is referred to as "H". , low potential is represented by “L”.

[0081] At time T1, the potential of the wiring 121 is set to "H", the potential of the wiring 122 is set to "L", and the potential of the wiring 124 is set to "L". When the potential of the wiring 125 is set to "L", the transistor 102 is turned on, and the potential of the node N The potential of A becomes the potential of the wiring 124. At this time, the potential of the wiring 124 is reset (for example, For example, by setting the potential to "L", the operation of the liquid crystal element 106 can be reset.

[0082] Before time T1, the display operation of the liquid crystal element 106 in the previous frame period is performed. This is the current state.

[0083] At time T2, the potential of the wiring 121 is set to "L", the potential of the wiring 122 is set to "H", and the potential of the wiring 124 is set to "H". When the potential of the wiring 125 is set to "L", the transistor 101 is turned on. The potential of one electrode of the transistor 104 becomes "L". This operation is for carrying out the subsequent capacitive coupling operation. This is the reset operation.

[0084] At time T3, when the potential of wiring 121 is "H", the potential of wiring 122 is "H", and the potential of wiring 124 is "Vp" and the potential of wiring 125 is "L", the potential of wiring 124 (correction signal (Vp)) is written to node NA.

[0085] At time T4, when the potential of wiring 121 is "L", the potential of wiring 122 is "H", and the potential of wiring 124 is "Vp" and the potential of wiring 125 is "L", transistor 102 becomes non-conductive, and the correction signal (Vp) is held at node NA.

[0086] At time T5, when the potential of wiring 121 is "L", the potential of wiring 122 is "L", and the potential of wiring 125 is "L", transistor 101 becomes non-conductive, and the writing operation of the correction signal (Vp) ends.

[0087] Next, using the timing chart shown in Fig. 5(C), the correction operation of the image signal ( Vs) in pixel 11b and the display operation of liquid crystal element 106 will be described. It is assumed that a desired potential is supplied to wiring 125 at an appropriate timing.

[0088] At time T11, when the potential of wiring 121 is "L", the potential of wiring 122 is "H", and the potential of wiring 124 is "L", transistor 101 conducts, and due to the capacitive coupling of capacitor element 104, the potential of wiring 125 is added to the potential of node NA. That is, node NA becomes the potential (Vs +Vp)' obtained by adding the correction signal (Vp) to the image signal (Vs). Note that the potential (Vs +Vp)' also includes potential fluctuations due to capacitive coupling between wirings.

[0089] At time T12, when the potential of wiring 121 is "L", the potential of wiring 122 is "L", and the potential of wiring 124 When the bit is set to "L", the transistor 101 becomes non-conductive, and the potential (Vs + V p)' is held at the node NA. Then, a display operation is performed on the liquid crystal element 106 according to the potential.

[0090] The above is the description of the correction operation of the image signal (Vs) and the display operation of the liquid crystal element 106. Note that the writing operation of the correction signal (Vp) and the input operation of the image signal (Vs) described above may be performed continuously, or the input operation of the image signal (Vs) may be performed after writing the correction signal (Vp) to all pixels.

[0091] When the correction operation is not performed, the image signal may be supplied to the wiring 124, and the display operation by the liquid crystal element 106 may be performed by controlling the conduction and non-conduction of the transistor 10 2. At this time, the transistor 101 may be always non-conductive, or the transistor 101 may be always conductive in a state where a fixed potential is supplied to the wiring 125.

[0092] FIG. 6 shows an example of a top view of the pixel 11b.

[0093] By using OS transistors as the transistor 101 and the transistor 102, the semiconductor layer 231a and the semiconductor layer 231b can be configured to have a function of transmitting visible light.

[0094] In FIG. 6, the conductive layer 222a included in the transistor 102 has a region overlapping with the conductive layer 223a.

[0095] The transistor 101 shown in FIG. 6 includes a semiconductor layer 231b, a conductive layer 223b, a conductive layer 2 21b, and a conductive layer 222c. The capacitor element 104 includes a conductive layer 46a and a conductive layer 4 ​​​​​It can be composed of 1 and the insulating layer 44 sandwiched between the two conductive layers. Conductive layer 4 1 is a common electrode in the capacitor element 105 and the capacitor element 104.

[0096] In the pixel of one aspect of the present invention, the capacitor element 104 preferably has a capacitance value larger than that of the capacitor element 105. For example, the area of the region where the conductive layer 41 and the conductive layer 46a overlap is preferably larger than the area of the region where the conductive layer 41 and the conductive layer 46b overlap.

[0097] Also, a capacitor element is formed by two electrodes, namely the conductive layer 41 and the conductive layer 43c (to be described later with reference to FIG. 7 and the like).

[0098] The conductive layer 223b and the conductive layer 221b preferably function as gate electrodes. Also, the conductive layer 223b and the conductive layer 221b may be electrically connected at an opening provided in the layer sandwiched therebetween.

[0099] The conductive layer 222c is disposed on the semiconductor layer 231b with an insulating layer interposed therebetween. In particular, the conductive layer 222c is disposed on the low-resistance region of the semiconductor layer 231b. The conductive layer 222c is preferably electrically connected to the semiconductor layer 231b at an opening provided in the insulating layer.

[0100] The conductive layer 46a is preferably electrically connected to the semiconductor layer 231b. The conductive layer 222c and the conductive layer 46a are electrically connected to either the source or the drain of the transistor 101.

[0101] The conductive layer 46a and the semiconductor layer 231b preferably have a function of transmitting visible light.

[0102] Here, the conductive layer 46a, the conductive layer 46b, the conductive layer 46c, and the conductive layer 41 are more transmissive to visible light than the semiconductor layer 231a and the semiconductor layer 231b. Being more transmissive to visible light, for example, indicates that the transmittance of visible light is higher. Also, the channel formation region (e.g., region 231ai) of the semiconductor layer 231a and the semiconductor layer 231b may be more transmissive to visible light than the low resistance region (e.g., low resistance region 231 an) of the semiconductor layer 231a and the semiconductor layer 231b.

[0103] FIG. 7(A) shows an example of a cross-section of the display device 10 having a pixel according to an aspect of the present invention. The cross-section A - B shows a cross-section corresponding to the two-dot chain line A - B shown in FIG. 6.

[0104] The display device 10 shown in FIG. 7(A) includes a substrate 31, a transistor 1 01 and a transistor 102 provided on the substrate 31, an insulating layer 213 provided on both transistors, and an insulating layer 2 14 provided on the insulating layer 213 and an insulating layer 215 provided on the insulating layer 214. Further, the display device 10 includes an FPC 172, a connector 242, and a conductive layer 43b provided on the substrate. In the example shown in FIG. 7(A), the FPC 172 is electrically connected to the conductive layer 43b by the connector 242. Also, the conductive layer 43b is preferably formed of the same layer as the conductive layer 222a or the like.

[0105] Also, the display device 10 shown in FIG. 7(A) includes a substrate 32 arranged to face the substrate 31. On the substrate 32, a light-shielding layer 38, an overcoat 135, and a conductive layer 43c are sequentially provided on the surface facing the substrate 31.

[0106] ​​​The liquid crystal layer 42 is sandwiched between the substrate 31 and the substrate 32. More specifically, for example, it is sandwiched between the conductive layer 43 c and the conductive layer 41 or the like.

[0107] The display device 10 may also have spacers, alignment films, coloring layers, and the like.

[0108] Also, the display device 10 shown in FIG. 7(A) has a polarizing plate 61, a polarizing plate 63, and a backlight uni t 30. The backlight unit 30 has a light-emitting element 33, a diffusion plate 34, and a light guide plate 3 9. If necessary, a lens for light diffusion may be provided for the light-emitting element 33. Here, in FIG. 7 (A), a configuration having the polarizing plate 61 and the polarizing plate 63 is adopted, but the display device 10 may have a configuration without either both or any one of the polarizing plate 61 and the polarizing plate 63.

[0109] The insulating layers 211 and 225 in contact with the semiconductor layers 231a and 231b are preferably oxide insulating layers. Note that when the insulating layer 211 or the insulating layer 225 has a laminated structure, it is preferable that at least the layer in contact with the semiconductor layer 231a or the like is an oxide insulating layer . This can suppress the occurrence of oxygen deficiency in the semiconductor layer 231a or the like, and can improve the reliability of the transistor . . .

[0110] Either the insulating layer 213 or the insulating layer 214 is preferably a nitride insulating layer. This can suppress the entry of impurities into the semiconductor layer 231a or the like, and in some cases, can improve the reliability of the transistor . .

[0111] The insulating layer 215 preferably has a planarizing function, and for example, is preferably an organic insulating layer. Note that the insulating layer 215 may not be formed, and a conductive layer may be in contact with the insulating layer 214 . 46a or the like may be formed.

[0112] The insulating layers 211, 225, 213, 214, and 215 preferably have a function of transmitting visible light.

[0113] The substrates 31 and 32 preferably have a function of transmitting visible light. There are no major restrictions on the materials of the substrates 31 and 32, and various substrates can be used. For example, a glass substrate, a quartz substrate, a sapphire substrate, a semiconductor substrate, a ceramic substrate, a metal substrate, or a plastic substrate or the like can be used.

[0114] By using a thin substrate, the weight reduction and thickness reduction of the display device can be achieved. Furthermore, by using a substrate with a thickness that has flexibility, a flexible display device can be realized.

[0115] The backlight unit 30 shown in Fig. 7(A) has a configuration in which a light guide plate 39 is provided via a diffusion plate 34 directly below the pixel. A light emitting element 33 is provided at an end of the light guide plate 39. The light guide plate 39 has an uneven shape on the surface opposite to the diffusion plate 34, and can scatter the guided light with the uneven shape and emit it in the direction of the diffusion plate 34.

[0116] The light emitting element 33 has a function of emitting visible light.

[0117] The light emitted in the direction of the diffusion plate 34 is emitted to the substrate 32 side through paths such as path 36 and path 37 shown in Fig. 7(A).

[0118] In path 36, the light incident from the substrate 31 side passes through the insulating layers 211, 225, 21 ​​​​​3, insulating layer 214, insulating layer 215, conductive layer 46a, insulating layer 44, conductive layer 41, liquid crystal layer 42 , passes through conductive layer 43 c and overcoat 135 and is ejected onto substrate 32 .

[0119] In the path 37, the light incident from the substrate 31 side passes through the insulating layer 211 and the low resistance semiconductor layer 231a. region, conductive layer 46c, conductive layer 41, liquid crystal layer 42, conductive layer 43c, and overcoat 135. Then, the light is emitted to the substrate 32 side.

[0120] The light emitting element 33 can be fixed to a printed circuit board 35. For example, the light emitting element 33 may be The light emitting elements of each of the R, G and B colors are arranged in a row.

[0121] The display device 10 is capable of displaying color images.

[0122] When the display device 10 has a colored layer, the light source of the backlight unit 30 Of the emitted light, light outside a specific wavelength range is absorbed by the colored layer. For example, light emitted from a red pixel (subpixel) to the outside of the display module exhibits red color. The light emitted from the green subpixel to the outside of the display module is green, and the light emitted from the blue subpixel is blue. The light emitted from this sub-pixel to the outside of the display module exhibits blue color.

[0123] In addition, the backlight unit 30 is configured to sequentially blink three-color light-emitting elements. The display device 10 sequentially blinks the three color light emitting elements and synchronizes the blinking of the three color light emitting elements. The pixels are driven by the driving method, and color display can be performed based on the time-series additive color mixing method. This method can also be called field sequential driving.

[0124] In field sequential driving, a vivid color image can be displayed. Also, a smooth moving image can be displayed. Further, by using the above driving method, it is not necessary to configure one pixel with a plurality of sub-pixels of different colors, and the effective reflection area (also referred to as the effective display area or aperture ratio) of one pixel can be increased, so that a bright display can be performed. Furthermore, since it is not necessary to provide a color filter for the pixel, the transmittance of the pixel can also be improved, and a brighter display can be further performed. Also, the manufacturing process can be simplified and the manufacturing cost can be reduced.

[0125] The field sequential driving method is a driving method for performing color display by time division. Specifically, light emitting elements of various colors such as red, green, and blue are sequentially lit with a time shift, and the pixels are driven in synchronization with this, and color display is performed based on the sequential addition color mixing method.

[0126] When applying the field sequential driving method, since it is not necessary to configure one pixel with a plurality of sub-pixels of different colors, the aperture ratio of the pixel can be increased. Also, the high definition of the display device is also possible. Further, since it is not necessary to provide a coloring layer such as a color filter, there is no absorption of light by the coloring layer, and the transmittance of the pixel can be improved. As a result, the required luminance can be obtained with less power, so that low power consumption can be achieved. Also, the manufacturing process of the display device can be simplified and the manufacturing cost can be reduced.

[0127] When applying the field sequential driving method, a high frame frequency is required. The display device according to one aspect of the present invention has two capacitive elements for one pixel, so the holding of the pixel Since it has a large capacity and can supply a high voltage to the liquid crystal element, the response speed of the liquid crystal element can be improved. For example, by overdrive driving in which the voltage applied to the liquid crystal element is temporarily increased to quickly change the alignment of the liquid crystal, the response speed of the liquid crystal element can be improved. Therefore, it can be said that the display device according to one aspect of the present invention has a suitable configuration when applying a field sequential driving method that requires a high frame frequency. When the rotational viscosity coefficient of the liquid crystal material is small, the response of the liquid crystal element can be made faster, which is preferable. Specifically, it is preferable that the rotational viscosity coefficient of the liquid crystal material is 10 mPa·sec or more and 150 mPa·sec or less.

[0128] In FIG. 7(A), the backlight unit 30 is configured to make light incident from the substrate 31 side using the light guide plate 39. However, the backlight unit 30 may be configured to provide the light emitting element 33 directly below the pixel facing the substrate 31. For example, it may be configured to provide a planar light emitting element facing the substrate 31. In FIG. 7(B), an example is shown in which an electrode electrically connected to one of the source and drain of the transistor 101 is formed using a conductive layer 46d formed in the same layer as the conductive layer 46c. The conductive layer 46d has a function of transmitting visible light. In FIG. 7(B), the semiconductor layer 231b overlapping the conductive layer 46d also has a function of transmitting visible light. In a region where the semiconductor layer 231b and the conductive layer 46d overlap and do not overlap the conductive layer 223b, the light emitted from the backlight unit 30 can be emitted to the substrate 32 side.

[0129]

[0130]

[0131] <Materials of Components>​​​​​​​​​​​ Next, details of materials and the like that can be used for each component of the display device and the display module of the present embodiment will be described.

[0132] There are no major restrictions on the material of the substrate included in the display device, and various substrates can be used. For example, a glass substrate, a quartz substrate, a sapphire substrate, a semiconductor substrate, a ceramic substrate, a metal substrate, or a plastic substrate can be used.

[0133] By using a thin substrate, the display device can be made lighter and thinner. Furthermore, by using a substrate with a thickness that allows flexibility, a flexible display device can be realized.

[0134] Liquid crystal materials include positive liquid crystal materials with a positive dielectric anisotropy (Δε) and negative liquid crystal materials with a negative dielectric anisotropy. In one aspect of the present invention, either material can be used, and the optimal liquid crystal material can be selected according to the applied mode and design.

[0135] In the display device, liquid crystal elements to which various modes are applied can be used. For example, TN mode, FFS mode, IPS mode, ASM (Axially Symmetric aligned Micro-cell) mode, OCB (Optically Co mpensated Birefringence) mode, FLC (Ferroele ctric Liquid Crystal) mode, AFLC (AntiFerroe lectric Liquid Crystal) mode, ECB (Electrica lly Controlled Birefringence) mode, VA-IPS mode ​A liquid crystal element to which a mode such as a guest-host mode is applied can be used.

[0136] Note that a liquid crystal element is an element that controls the transmission or non-transmission of light by the optical modulation action of liquid crystal. The optical modulation action of liquid crystal is controlled by an electric field applied to the liquid crystal (including a horizontal electric field, a vertical electric field, or an oblique electric field). As the liquid crystal used in the liquid crystal element, thermotropic liquid crystal, low molecular liquid crystal, high molecular liquid crystal, polymer dispersed liquid crystal (PDLC: Polymer Dispersed Liquid Crystal), ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions.

[0137] As described above, since the display device of the present embodiment can drive the liquid crystal element by applying a high voltage, a liquid crystal showing a blue phase may be used. The blue phase is one of the liquid crystal phases, and when the cholesteric liquid crystal is heated up, it is a phase that appears immediately before the transition from the cholesteric phase to the isotropic phase. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition in which 5% by weight or more of a chiral agent is mixed is used for the liquid crystal layer in order to improve the temperature range. A liquid crystal composition containing a liquid crystal showing a blue phase and a chiral agent has a short response speed and shows optical isotropy.

[0137]

[0138] A liquid crystal composition containing a liquid crystal showing a blue phase and a chiral agent does not require alignment treatment and has a small viewing angle dependence. Also, since an alignment film does not need to be provided, rubbing treatment is not required, and electrostatic breakdown caused by rubbing treatment can be prevented, and defects or breakage of the display panel during the manufacturing process can be reduced.

[0138] ​​In addition, the liquid crystal element may be a light scattering type liquid crystal element. It is preferable to use an element having a composite material of liquid crystal and polymer. For example, a polymer dispersion type liquid crystal Crystal (PDLC(Polymer Dispersed Liquid Crystal) Alternatively, a polymer network liquid crystal (PNLC (Poly A mer Network Liquid Crystal) element may also be used.

[0139] The light-scattering liquid crystal element is a liquid crystal in the three-dimensional network structure of a resin part sandwiched between a pair of electrodes. The liquid crystal portion is made of a material such as nematic liquid crystal. The resin portion can be made of a photocurable resin. Examples of the polymers include monofunctional monomers such as acrylate and methacrylate, diacrylate, and the like. Polyfunctional monomers such as acrylates, triacrylates, dimethacrylates, and trimethacrylates Alternatively, a polymerizable compound in which these are mixed can be used.

[0140] Light-scattering liquid crystal elements utilize the anisotropy of the refractive index of the liquid crystal material to transmit or scatter light. The resin portion may also have anisotropy in refractive index. When the liquid crystal molecules are aligned in a certain direction according to the voltage applied to the element, The difference in refractive index between the liquid crystal section and the resin section becomes smaller, and the light incident along that direction is scattered by the liquid crystal section. Therefore, the light scattering type liquid crystal element appears transparent from that direction. On the other hand, when the alignment of liquid crystal molecules becomes random according to the applied voltage, Since there is no significant change in the difference in refractive index between the liquid crystal part and the resin part, the incident light is scattered by the liquid crystal part. Therefore, the light-scattering type liquid crystal element becomes opaque regardless of the viewing direction.

[0141] When using a light-scattering type liquid crystal element, an alignment film and a polarizing plate are not required.

[0142] When using a light-scattering type liquid crystal element as the liquid crystal element, for example, the light-scattering type liquid crystal element is set to the off state such as, for example, a state where no voltage is applied, or a state where the absolute value of the applied voltage is small and the light is transmitted, and it is set to the on state, that is, when the absolute value of the applied voltage is made larger and the light is scattered. The display device is operated in this mode. With this configuration, a transparent display device can be obtained in the normal state (a state where no display is made). In this case, color display can be performed when the operation of scattering light is performed. Such an operation is sometimes called the reverse smode.

[0143] As the conductive material that transmits visible light, for example, a material containing one or more selected from indium (In), zinc (Zn), tin (Sn) may be used. Specifically, indium oxide, indium tin oxide (ITO), indium zinc oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide containing silicon oxide (ITSO), zinc oxide, zinc oxide containing gallium, etc. can be mentioned. In addition, a film containing graphene can also be used. The film containing graphene can be formed, for example, by reducing a film containing graphene oxide.

[0144] In addition, the conductive film that transmits visible light can be formed using an oxide semiconductor (hereinafter ​​​​​​, the conductive film formed using an oxide semiconductor is also referred to as an oxide conductive layer). The oxide conductive layer For example, it preferably contains indium, and more preferably contains In-M-Zn oxide (M is Al, Ti, G a, Y, Zr, La, Ce, Nd, Sn or Hf).

[0145] The oxide semiconductor is a semiconductor material whose resistance can be controlled by at least one of the oxygen deficiency in the film and the impurity concentration of hydrogen, water, etc. in the film. Therefore, by selecting a process in which at least one of the oxygen deficiency and the impurity concentration increases in the oxide semiconductor layer, or a process in which at least one of the oxygen deficiency and the impurity concentration decreases, the resistivity of the oxide conductive layer can be controlled.

[0146] Note that, as described above, the oxide conductive layer formed using an oxide semiconductor can also be referred to as an oxide semiconductor layer with a high carrier density and low resistance, an oxide semiconductor layer having conductivity, or an oxide semiconductor layer with high conductivity.

[0147] The transistor included in the display device of this embodiment may have any structure of a top gate type or a bottom gate type. Or, gate electrodes may be provided above and below the channel. The semiconductor material used for the transistor is not particularly limited, and examples thereof include an oxide semiconductor, silicon, germanium, etc.

[0148] The crystallinity of the semiconductor material used for the transistor is not particularly limited either, and any of an amorphous semiconductor, a semiconductor having crystallinity (microcrystalline semiconductor, polycrystalline semiconductor, single crystal semiconductor, or a semiconductor having a partially crystalline region) may be used. When a semiconductor having crystallinity is used, the transistor ​​​​​​​It is preferable because it can suppress deterioration of transistor characteristics.

[0149] For example, an element of Group 14, a compound semiconductor, or an oxide semiconductor can be used for the semiconductor layer. Typically, a semiconductor containing silicon, a semiconductor containing gallium arsenide, or an oxide semiconductor containing indium can be applied to the semiconductor layer.

[0150] It is preferable to apply an oxide semiconductor to the semiconductor in which the channel of the transistor is formed. In particular, it is preferable to apply an oxide semiconductor having a larger bandgap than silicon. Using a semiconductor material having a wider bandgap and a smaller carrier density than silicon is preferable because it can reduce the current in the off state of the transistor.

[0151] By using an oxide semiconductor, fluctuations in electrical characteristics are suppressed, and a highly reliable transistor can be realized.

[0152] Also, due to its low off-current, it is possible to hold the charge accumulated in the capacitor through the transistor for a long time. By applying such a transistor to a pixel, it is possible to stop the driving circuit while maintaining the gradation of the displayed image. As a result, a display device with extremely low power consumption can be realized.

[0153] The transistor preferably has an oxide semiconductor layer with high purity and suppressed formation of oxygen vacancies. Thereby, the current value (off-current value) in the off state of the transistor can be made low. Therefore, the holding time of an electrical signal such as an image signal can be lengthened, and the writing interval can also be set long in the power-on state. Therefore, the frequency of the refresh operation can be reduced. Since it can be achieved, it has the effect of suppressing power consumption.

[0154] In addition, a transistor using an oxide semiconductor can obtain a relatively high field-effect mobility, so it can be driven at high speed. By using such a transistor capable of high-speed driving in a display device, the transistor in the display unit and the transistor in the drive circuit unit can be formed on the same substrate. That is, as a drive circuit, there is no need to separately use a semiconductor device formed of a silicon wafer or the like, so the number of components of the display device can be reduced. Also, in the display unit, by using a transistor capable of high-speed driving, a high-quality image can be provided.

[0155] The transistors included in the gate drivers GD_L and GD_R and the transistors included in the display area 100 may have the same structure or different structures. The transistors included in the gate driver may all have the same structure, or two or more types of structures may be combined and used. Similarly, the transistors included in the display area 100 may all have the same structure or two or more types of structures may be combined and used.

[0156] As the insulating material that can be used for each insulating layer, overcoat, etc. included in the display device, an organic insulating material or an inorganic insulating material can be used. Examples of the organic insulating material include acrylic resin, epoxy resin, polyimide resin, polyamide resin, polyimideamide resin, siloxane resin, benzocyclobutene-based resin, and phenol resin, etc. Examples of the inorganic insulating layer include a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, and nitrogen Silicon oxide film, aluminum oxide film, hafnium oxide film, yttrium oxide film, zirconium oxide film conium oxide film, gallium oxide film, tantalum oxide film, magnesium oxide film, lanthanum oxide film cerium oxide film, neodymium oxide film, etc. can be mentioned.

[0157] In addition to the gates, sources, and drains of transistors, various wirings and electrodes of the display device such conductive layers as can be formed in a single-layer structure or a laminated structure by using one or more of metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium ium, molybdenum, silver, tantalum, and tungsten, and alloys mainly composed of the metals For example, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a titanium film is laminated on a tungsten film, a two-layer structure in which a copper film is laminated on a molybdenum film, a two-layer structure in which a copper film is laminated on an alloy film containing molybdenum and tungsten, a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum ium alloy film, a three-layer structure in which a titanium film or a titanium nitride film and an aluminum film or a copper film are laminated on the titanium film or the titanium nitride film, and then a titanium film or a titanium nitride film is formed thereon, a three-layer structure in which a molybdenum film or a molybdenum nitride film and an aluminum film or a copper film are laminated on the molybdenum film or the molybdenum nitride film and then a molybdenum film or a molybdenum nitride film is formed thereon, etc. For example when the conductive layer has a three-layer structure, a film made of titanium, titanium nitride, molyb denum, tungsten, an alloy containing molybdenum and tungsten, an alloy containing molybdenum and zirconium or molybdenum nitride is formed on the first and third layers, and a film made of copper, aluminum is laminated on the second layer and then a film made of titanium, titanium nitride, molybdenum, tungsten, an alloy containing molybdenum and tungsten, an alloy containing molybdenum and zirconium or molybdenum nitride is formed thereon. For example when the conductive layer has a three-layer structure, a film made of titanium, titanium nitride, molyb denum, tungsten, an alloy containing molybdenum and tungsten, an alloy containing molybdenum and zirconium It is preferable to form a film made of a low-resistance material such as gold, silver, or an alloy of copper and manganese. In addition, it is also possible to use a conductive material with translucency such as ITO, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, ITSO, etc. It is also possible to form an oxide conductive layer by controlling the resistivity of the oxide semiconductor.

[0158] A silicon nitride film is suitable for the insulating layer 44 that functions as a dielectric of the capacitive element.

[0159] As the adhesive layer 141, a curable resin such as a thermosetting resin, a photocurable resin, or a two-component mixed curable resin can be used. For example, an acrylic resin, a urethane resin, an epoxy resin, or a siloxane resin can be used.

[0160] As the connector 242, for example, an anisotropic conductive film (ACF: Anisotropic Conductive Film) or an anisotropic conductive paste (ACP: Anisotropic Conductive Paste) can be used.

[0161] The colored layer is a colored layer that transmits light in a specific wavelength range. Examples of materials that can be used for the colored layer include metal materials, resin materials, and resin materials containing pigments or dyes.

[0162] The light-shielding layer 38 is provided, for example, between adjacent colored layers of different colors. For example, a black matrix formed using a metal material or a resin material containing a pigment or a dye. It can be used as the light-shielding layer 38. Note that it is preferable to provide the light-shielding layer 38 in an area outside the display unit, such as a drive circuit unit, because light leakage such as guided light can be suppressed.

[0163] For the backlight unit 30, a direct-lit backlight, an edge-lit backlight, etc. can be used. As the light source, an LED (Light Emitting Diode), an organic EL (Electroluminescence) element, etc. can be used.

[0164] The thin films (insulating films, semiconductor films, conductive films, etc.) constituting the display device can be formed by sputtering, chemical vapor deposition (CVD: Chemical Vapor Deposition), vacuum evaporation, pulsed laser deposition (PLD: Pulsed Laser Deposition), atomic layer deposition (ALD: Atomic Layer Deposition), etc. respectively. Examples of the CVD method include plasma enhanced chemical vapor deposition (PECVD: Plasma Enhanced Chemical Vapor Deposition) method and thermal CVD method. Examples of the thermal CVD method include metal organic chemical vapor deposition (MOCVD: Metal Organic CVD) method.

[0165] The thin films (insulating films, semiconductor films, conductive films, etc.) constituting the display device can be formed by spin coating, dip coating, spray coating, inkjet printing, dispensing, screen printing, offset printing, slit coating, roll coating, curtain coating, knife coating, etc. respectively, or by tools such as a doctor knife.

[0166] ​​​​​​​​​​​​​​The thin film constituting the display device can be processed using photolithography or the like. Alternatively, island-shaped thin films may be formed by a film deposition method using a masking mask. Or, the thin film may be processed by nanoimprinting, sandblasting, or lift-off methods. As the photolithography method, there are a method of forming a resist mask on the thin film to be processed, processing the thin film by etching or the like, and then removing the resist mask, and a method of forming a photosensitive thin film and then performing exposure and development to process the thin film into a desired shape.

[0167] In the photolithography method, examples of the light used for exposure include i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), and light obtained by mixing these. In addition, ultraviolet light, KrF laser light, or ArF laser light can also be used. Further, exposure may be performed by immersion lithography technology. Examples of the light used for exposure include extreme ultraviolet light (EUV) and X-rays. In addition to the light used for exposure, an electron beam can also be used. Using extreme ultraviolet light, X-rays, or an electron beam is preferable because extremely fine processing becomes possible. When exposure is performed by scanning a beam such as an electron beam, a photomask is not required.

[0168] For etching the thin film, a dry etching method, a wet etching method, a sandblasting method, etc. can be used.

[0169] This embodiment can be appropriately combined with other embodiments.

[0170] (Embodiment 2) This embodiment describes an example of a transistor that can be used in one aspect of the present invention .

[0171] [Configuration Example 1] FIG. 8(A) is a top view of the transistor 200, and FIG. 8(B) corresponds to a cross-sectional view of the cutting plane along the dashed line A1 - A2 shown in FIG. 8(A). FIG. 8(C) corresponds to a cross-sectional view of the cutting plane along the dashed line B1 - B2 shown in FIG. 8(A). In FIG. 8(A), a part of the components of the transistor 200 (such as the gate insulating layer) is omitted for illustration. Also, the direction of the dashed line A1 - A2 corresponds to the channel length direction, and the direction of the dashed line B1 - B2 corresponds to the channel width direction. Also, for the top view of the transistor, in the following drawings, like FIG. 8(A), a part of the components will be omitted for illustration.

[0172] The transistor 200 is provided on the substrate 109 and has an insulating layer 103, a semiconductor layer 108, an insulating layer 110, a metal oxide layer 114, a conductive layer 112, an insulating layer 116, an insulating layer 118, etc. The island-shaped semiconductor layer 108 is provided on the insulating layer 103. The insulating layer 110 is provided in contact with the upper surface, the upper surface and the side surface of the semiconductor layer 108 of the insulating layer 103. The metal oxide layer 114 and the conductive layer 112 are laminated in this order on the insulating layer 110 and have a portion overlapping the semiconductor layer 108. The insulating layer 116 covers the upper surface of the insulating layer 110, the side surface of the metal oxide layer 114, and the upper surface and the side surface of the conductive layer 112. The insulating layer 118 covers the insulating layer 116.

[0173] A part of the conductive layer 112 functions as a gate electrode. A part of the insulating layer 110 functions as a gate insulation ​​​​​​​​​The transistor 200 has a gate electrode provided on the semiconductor layer 108. This is a so-called top-gate transistor.

[0174] As shown in FIGS. 8A and 8B, the transistor 200 has a structure in which a The conductive layer 120a and the conductive layer 120b may be provided in the conductive layer 120a. The conductive layer 120a and the conductive layer 120b function as a source electrode and a drain electrode. b are the openings 14 provided in the insulating layer 118, the insulating layer 116, and the insulating layer 110, respectively. Through the opening 141b and the insulating layer 141a, the insulating layer 141b is electrically connected to a region 108n, which will be described later.

[0175] The semiconductor layer 108 preferably comprises a metal oxide.

[0176] For example, the semiconductor layer 108 may be made of indium and M (where M is gallium, aluminum, or silicon). Boron, Yttrium, Tin, Copper, Vanadium, Beryllium, Titanium, Iron, Nickel , Germanium, Zirconium, Molybdenum, Lanthanum, Cerium, Neodymium, Hafnium one or more selected from the group consisting of aluminum, tantalum, tungsten, and magnesium; and zinc. In particular, M is aluminum, gallium, yttrium, or It is preferable to use one or more elements selected from tin.

[0177] In particular, the semiconductor layer 108 is made of an oxide containing indium, gallium, and zinc. It is preferable.

[0178] The semiconductor layer 108 may be a layer having a different composition, a layer having a different crystallinity, or a layer having a different impurity concentration. Alternatively, a laminate structure in which different layers are laminated may be used.

[0179] The conductive layer 112 and the metal oxide layer 114 are processed so that their upper surface shapes substantially coincide with each other. They are.

[0180] In this specification and the like, "substantially coinciding upper surface shapes" means that at least a part of the contours overlap between the stacked layers. For example, it includes the case where the upper layer and the lower layer are processed by the same mask pattern or a part of them is processed by the same mask pattern. However, strictly speaking, the contours do not overlap, the contour of the upper layer is located inside the contour of the lower layer, or the contour of the upper layer is located outside the contour of the lower layer. In this case as well, it is said that "the upper surface shapes substantially coincide". For example, when the upper layer and the lower layer are processed by the same mask pattern or a part of them is processed by the same mask pattern. However, strictly speaking, the contours do not overlap, the contour of the upper layer is located inside the contour of the lower layer, or the contour of the upper layer is located outside the contour of the lower layer. In this case as well, it is said that "the upper surface shapes substantially coincide". Including the case where the upper layer and the lower layer are processed by the same mask pattern or a part of them is processed by the same mask pattern. However, strictly speaking, the contours do not overlap, the contour of the upper layer is located inside the contour of the lower layer, or the contour of the upper layer is located outside the contour of the lower layer. In this case as well, it is said that "the upper surface shapes substantially coincide". The metal oxide layer 114 located between the insulating layer 110 and the conductive layer 112 functions as a barrier film to prevent oxygen contained in the insulating layer 110 from diffusing to the conductive layer 112 side. Further, the metal oxide layer 114 also functions as a barrier film to prevent hydrogen and water contained in the conductive layer 112 from diffusing to the insulating layer 110 side. The metal oxide layer 114 can be made of, for example, a material that is less permeable to oxygen and hydrogen than at least the insulating layer 110. The metal oxide layer 114 located between the insulating layer 110 and the conductive layer 112 functions as a barrier film to prevent oxygen contained in the insulating layer 110 from diffusing to the conductive layer 112 side. Further, the metal oxide layer 114 also functions as a barrier film to prevent hydrogen and water contained in the conductive layer 112 from diffusing to the insulating layer 110 side. The metal oxide layer 114 can be made of, for example, a material that is less permeable to oxygen and hydrogen than at least the insulating layer 110.

[0181] The metal oxide layer 114 located between the insulating layer 110 and the conductive layer 112 functions as a barrier film to prevent oxygen contained in the insulating layer 110 from diffusing to the conductive layer 112 side. Further, the metal oxide layer 114 also functions as a barrier film to prevent hydrogen and water contained in the conductive layer 112 from diffusing to the insulating layer 110 side. The metal oxide layer 114 can be made of, for example, a material that is less permeable to oxygen and hydrogen than at least the insulating layer 110. The metal oxide layer 114 located between the insulating layer 110 and the conductive layer 112 functions as a barrier film to prevent oxygen contained in the insulating layer 110 from diffusing to the conductive layer 112 side. Further, the metal oxide layer 114 also functions as a barrier film to prevent hydrogen and water contained in the conductive layer 112 from diffusing to the insulating layer 110 side. The metal oxide layer 114 can be made of, for example, a material that is less permeable to oxygen and hydrogen than at least the insulating layer 110. The metal oxide layer 114 located between the insulating layer 110 and the conductive layer 112 functions as a barrier film to prevent oxygen contained in the insulating layer 110 from diffusing to the conductive layer 112 side. Further, the metal oxide layer 114 also functions as a barrier film to prevent hydrogen and water contained in the conductive layer 112 from diffusing to the insulating layer 110 side. The metal oxide layer 114 can be made of, for example, a material that is less permeable to oxygen and hydrogen than at least the insulating layer 110. The metal oxide layer 114 located between the insulating layer 110 and the conductive layer 112 functions as a barrier film to prevent oxygen contained in the insulating layer 110 from diffusing to the conductive layer 112 side. Further, the metal oxide layer 114 also functions as a barrier film to prevent hydrogen and water contained in the conductive layer 112 from diffusing to the insulating layer 110 side. The metal oxide layer 114 can be made of, for example, a material that is less permeable to oxygen and hydrogen than at least the insulating layer 110. The metal oxide layer 114 located between the insulating layer 110 and the conductive layer 112 functions as a barrier film to prevent oxygen contained in the insulating layer 110 from diffusing to the conductive layer 112 side. Further, the metal oxide layer 114 also functions as a barrier film to prevent hydrogen and water contained in the conductive layer 112 from diffusing to the insulating layer 110 side. The metal oxide layer 114 can be made of, for example, a material that is less permeable to oxygen and hydrogen than at least the insulating layer 110.

[0182] Even when a metal material such as aluminum or copper that easily attracts oxygen is used for the conductive layer 112, the metal oxide layer 114 can prevent oxygen from diffusing from the insulating layer 110 to the conductive layer 112. Further, even when the conductive layer 112 contains hydrogen, it can prevent hydrogen from diffusing from the conductive layer 112 to the semiconductor layer 108 through the insulating layer 110. As a result, the carrier density in the channel formation region of the semiconductor layer 108 can be made extremely low. Even when a metal material such as aluminum or copper that easily attracts oxygen is used for the conductive layer 112, the metal oxide layer 114 can prevent oxygen from diffusing from the insulating layer 110 to the conductive layer 112. Further, even when the conductive layer 112 contains hydrogen, it can prevent hydrogen from diffusing from the conductive layer 112 to the semiconductor layer 108 through the insulating layer 110. As a result, the carrier density in the channel formation region of the semiconductor layer 108 can be made extremely low. Even when a metal material such as aluminum or copper that easily attracts oxygen is used for the conductive layer 112, the metal oxide layer 114 can prevent oxygen from diffusing from the insulating layer 110 to the conductive layer 112. Further, even when the conductive layer 112 contains hydrogen, it can prevent hydrogen from diffusing from the conductive layer 112 to the semiconductor layer 108 through the insulating layer 110. As a result, the carrier density in the channel formation region of the semiconductor layer 108 can be made extremely low. Even when a metal material such as aluminum or copper that easily attracts oxygen is used for the conductive layer 112, the metal oxide layer 114 can prevent oxygen from diffusing from the insulating layer 110 to the conductive layer 112. Further, even when the conductive layer 112 contains hydrogen, it can prevent hydrogen from diffusing from the conductive layer 112 to the semiconductor layer 108 through the insulating layer 110. As a result, the carrier density in the channel formation region of the semiconductor layer 108 can be made extremely low. Even when a metal material such as aluminum or copper that easily attracts oxygen is used for the conductive layer 112, the metal oxide layer 114 can prevent oxygen from diffusing from the insulating layer 110 to the conductive layer 112. Further, even when the conductive layer 112 contains hydrogen, it can prevent hydrogen from diffusing from the conductive layer 112 to the semiconductor layer 108 through the insulating layer 110. As a result, the carrier density in the channel formation region of the semiconductor layer 108 can be made extremely low. Even when a metal material such as aluminum or copper that easily attracts oxygen is used for the conductive layer 112, the metal oxide layer 114 can prevent oxygen from diffusing from the insulating layer 110 to the conductive layer 112. Further, even when the conductive layer 112 contains hydrogen, it can prevent hydrogen from diffusing from the conductive layer 112 to the semiconductor layer 108 through the insulating layer 110. As a result, the carrier density in the channel formation region of the semiconductor layer 108 can be made extremely low.

[0183] As the metal oxide layer 114, an insulating material or a conductive material can be used. Gold When the metal oxide layer 114 has insulating properties, it functions as part of the gate insulating layer. On the other hand when the metal oxide layer 114 has conductive properties, it functions as part of the gate electrode.

[0184] It is preferable to use an insulating material having a higher dielectric constant than silicon oxide as the metal oxide layer 114. In particular, using an aluminum oxide film, a hafnium oxide film, or a hafnium aluminum oxide film, etc. is preferable because the driving voltage can be reduced.

[0185] As the metal oxide layer 114, for example, conductive oxides such as indium oxide, indium tin oxide (ITO) or indium tin oxide containing silicon (ITSO) can also be used. In particular, conductive oxides containing indium are preferable because of their high conductivity .

[0186] Also, as the metal oxide layer 114, it is preferable to use an oxide material containing one or more of the same elements as the semiconductor layer 108. In particular, it is preferable to use an oxide semiconductor material applicable to the semiconductor layer 108. At this time, by applying a metal oxide film formed using the same sputtering target as the semiconductor layer 108 as the metal oxide layer 114, the apparatus can be made common and thus it is preferable.

[0187] Or, when using a metal oxide material containing indium and gallium for both the semiconductor layer 108 and the metal oxide layer 114, if a material with a higher gallium composition ratio (content ratio) than that of the semiconductor layer 108 is used for the metal oxide layer 114, the metal oxide layer 114's resistance to oxygen ​​​​​​It is preferable because the blocking property can be further enhanced. At this time, for the semiconductor layer 108, by using a material having a higher indium composition ratio than the material of the metal oxide layer 114, the field-effect mobility of the transistor 200 can be increased.

[0188] Also, the metal oxide layer 114 is preferably formed using a sputtering apparatus. For example, when forming an oxide film using a sputtering apparatus, oxygen can be suitably added to the insulating layer 110 and the semiconductor layer 108 by forming in an atmosphere containing oxygen gas.

[0189] The semiconductor layer 108 has a region that overlaps with the conductive layer 112 and a pair of low-resistance regions 108n sandwiching the region. The region of the semiconductor layer 108 that overlaps with the conductive layer 112 functions as the channel formation region of the transistor 200. On the other hand, the region 108n functions as the source region or the drain region of the transistor 200 .

[0190] Also, the region 108n can also be referred to as a region having a lower resistance than the channel formation region, a region having a high carrier concentration, a region having a high oxygen defect density, a region having a high impurity concentration, or an n-type region.

[0191] The region 108n of the semiconductor layer 108 is a region containing an impurity element. Examples of the impurity element include, for example, hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, arsenic, aluminum, and also noble gases. Representative examples of noble gases include helium, neon, argon, krypton, and xenon. In particular, it is preferable to contain boron or phosphorus . Also, two or more of these elements may be contained.

[0192] ​​​​The insulating layer 110 has a region that contacts the channel formation region of the semiconductor layer 108, that is, a region that overlaps with the conductive layer 1 12. Further, the insulating layer 110 has a region that contacts the low-resistance region 1 08n of the semiconductor layer 108 and does not overlap with the conductive layer 112.

[0193] Also, for the insulating layer 103 that contacts the channel formation region of the semiconductor layer 108 and the insulating layer 110, it is preferable to use an oxide film. For example, an oxide film such as a silicon oxide film, a silicon oxynitride film, or an aluminum oxide film can be used. Thereby, oxygen desorbed from the insulating layer 103 or the insulating layer 110 during heat treatment or the like in the manufacturing process of the transistor 200 can be supplied to the channel formation region of the semiconductor layer 108, and oxygen vacancies in the semiconductor layer 108 can be reduced.

[0194] Fig. 9 shows an enlarged cross-sectional view of the region P surrounded by the dashed-dotted line in Fig. 8(B).

[0195] The insulating layer 110 has a region 110d containing the above-described impurity element. The region 110d is located at least near the interface with the region 108n. Further, the region 110d is also located at least near the interface with the insulating layer 1 08 in a region where the semiconductor layer 108 is not provided and does not overlap with the conductive layer 112. Also, as shown in Figs. 8(B), (C), and 9, it is preferable that the region 110d is not provided in the portion that contacts the channel formation region of the semiconductor layer 108.

[0196] Also, the insulating layer 103 has a region 103d containing the above-described impurity element near the interface that contacts the insulating layer 110. Further, as shown in Fig. 9, the region 103d contacts the region 108n. ​​​​​​It may also be provided near the interface to be formed. At this time, the impurity concentration in the portion overlapping with the region 108n is lower than that in the portion in contact with the insulating layer 110.

[0197] Here, the impurities in the region 108n preferably have a concentration gradient such that the concentration becomes higher as it approaches the insulating layer 110. As a result, the upper part of the region 108n has a lower resistance, so that the contact resistance with the conductive layer 120a (or the conductive layer 120b) can be more effectively reduced. In addition, compared with the case where the concentration is uniform throughout the region 108n, the total amount of impurities in the region 108n can be reduced, so that the amount of impurities that can diffuse into the channel formation region due to the influence of heat during the manufacturing process can be kept low.

[0198] Also, the impurities in the region 110d preferably have a concentration gradient such that the concentration becomes higher as it approaches the semiconductor layer 108. In the insulating layer 110 to which an oxide film capable of releasing oxygen by heating is applied, in the region 110d where the above-described impurity element is added, the release of oxygen can be suppressed compared to other regions. Therefore, the region 110d located near the interface between the insulating layer 110 and the region 108n functions as a blocking layer for oxygen, and can effectively reduce the oxygen supplied to the region 108n.

[0199] As will be described later, the process of adding the impurity element to the region 108n and the region 110d can be performed using the conductive layer 112 as a mask. Thereby, the region 110d can be formed self-alignedly simultaneously with the formation of the region 108n.

[0200] In FIG. 9 and the like, the portion with a high impurity concentration of the insulating layer 110 is at the interface with the semiconductor layer 108. ​​​​​​​​To exaggerate the indication of being located in the vicinity, the region 110d is shown with a hatching pattern only in the vicinity of the semiconductor layer 1 in the insulating layer 1 08, but actually the above impurity elements are contained throughout the thickness direction of the insulating layer 110.

[0201] The regions 108n and 110d each have an impurity concentration of 1×10 19 atoms / cm 3 or more and 1×10 23 atoms / cm 3 or less, preferably 5×10 19 atoms / cm 3 or more and 5×10 22 atoms / cm 3 or less, more preferably 1×10 20 at oms / cm 3 or more and 1×10 22 atoms / cm 3 or less, and preferably includes regions. Also, if the region 108n has a portion with a higher impurity concentration than the region 110d of the insulating layer 110, it is preferable because the electrical resistance of the region 108n can be made lower in resistance more effectively.

[0202] The concentrations of the impurities contained in the regions 108n and 110d can be analyzed by, for example, secondary ion mass spectrometry (SIMS) or , X-ray photoelectron spectroscopy (XPS) and other analytical methods. When using XPS analysis, by combining ion sputtering from the surface side or the back side and XPS analysis, the concentration distribution in the depth direction can be known.

[0203] ​​​​In the region 108n, the impurity element is preferably present in an oxidized state. For example, impurity elements such as boron, phosphorus, magnesium, aluminum, and silicon are used. It is preferable to use an element that is easily oxidized. Since it can combine with the oxygen in 108 and exist stably in an oxidized state, it can be used at high temperatures ( For example, even if exposed to temperatures of 400°C or higher, 600°C or higher, or 800°C or higher, In addition, the impurity element removes oxygen from the semiconductor layer 108, Many oxygen vacancies are generated in the region 108n. These oxygen vacancies combine with hydrogen in the film, Since the region 108n becomes a carrier supply source by this, the region 108n becomes in a state of extremely low resistance.

[0204] In addition, when performing a process at high temperatures in a later step, the film near the outside or the region 108n may be damaged. If too much oxygen is supplied to the region 108n, the resistance may increase. Therefore, when performing a high-temperature process, the insulating layer 1 having a high barrier property against oxygen is required. It is preferable to treat the substrate while covered with 16.

[0205] Also in the region 110d, the impurity element is preferably present in an oxidized state. Such easily oxidizable elements are bonded to oxygen in the insulating layer 110 and remain in an oxidized state. Because it can exist stably, it is prevented from being desorbed even when exposed to high temperatures in later processes. In particular, the insulating layer 110 contains oxygen (also called excess oxygen) that can be desorbed by heating. In this case, the excess oxygen and the impurity element are bonded and stabilized, so that the region 110d It is possible to suppress the supply of oxygen to the region 108n. Since the region 110d containing the pure elemental substance has a state in which oxygen hardly diffuses, oxygen is prevented from being supplied to the region 108n through the region 110d from above the region 110d. This can be achieved.

[0206] For example, when boron is used as the impurity element, the boron contained in the region 108n and the region 110d may exist in a state of being combined with oxygen. This can be confirmed by observing a spectral peak caused by the B O 2 bond in XPS analysis. Also, in XPS analysis, no spectral peak caused by the state in which the boron element exists alone is observed 3 , or the peak intensity becomes extremely small to the extent that it is buried in the background noise of the measurement lower limit.

[0207] The insulating layer 116 and the insulating layer 118 function as a protective layer for protecting the transistor 200. Also, it is preferable that either one of the insulating layer 116 and the insulating layer 118 has a function of preventing oxygen that can be released from the insulating layer 110 from diffusing to the outside. For example, an inorganic insulating material such as an oxide or a nitride can be used. More specific examples include inorganic insulating materials such as silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminate.

[0208] Here, the case where the insulating layer 116 and the insulating layer 118 have a laminated structure as the protective layer is shown, but either one of the insulating layer 116 and the insulating layer 118 may not be provided if it is unnecessary.

[0209] ​​​​​​​​​​​Here, the semiconductor layer 108 and oxygen deficiencies that can be formed in the semiconductor layer 108 will be described. Do.

[0210] Oxygen deficiencies formed in the semiconductor layer 108 become a problem because they affect transistor characteristics. For example, when an oxygen deficiency is formed in the semiconductor layer 108, hydrogen binds to the oxygen deficiency and can become a carrier supply source. When a carrier supply source is generated in the semiconductor layer 108, the electrical characteristics of the transistor 200 fluctuate, typically resulting in a shift in the threshold voltage. Therefore, in the semiconductor layer 108, it is preferable that the oxygen deficiency is less.

[0211] Therefore, in one aspect of the present invention, the insulating films in the vicinity of the semiconductor layer 108, specifically, the insulating layer 110 located above the semiconductor layer 108 and the insulating layer 103 located below it, include an oxide film. By moving oxygen from the insulating layer 103 and the insulating layer 110 to the semiconductor layer 108 due to heat during the manufacturing process or the like, it becomes possible to reduce the oxygen deficiency in the semiconductor layer 108.

[0212] Also, the semiconductor layer 108 preferably has a region where the atomic ratio of In is greater than the atomic ratio of M. The higher the atomic ratio of In, the more the field-effect mobility of the transistor can be improved. Can.

[0213] Here, in the case of a metal oxide containing In, Ga, and Zn, the binding force between In and oxygen is weaker than the binding force between Ga and oxygen. Therefore, when the atomic ratio of In is large, oxygen deficiencies are likely to be formed in the metal oxide film. Also, even when the metal element represented by M is used instead of Ga, there is a similar tendency. When many oxygen deficiencies are present in the metal oxide film, the electrical characteristics of the transistor deteriorate and the reliability decreases.

[0214] However, in one aspect of the present invention, since a large amount of oxygen can be supplied into the semiconductor layer 108 containing a metal oxide, it becomes possible to use a metal oxide material having a large atomic ratio of In. Thereby, a transistor having extremely high field-effect mobility, stable electrical characteristics, and high reliability can be realized.

[0215] For example, a metal oxide in which the atomic ratio of In is 1.5 times or more, or 2 times or more, or 3 times or more, or 3.5 times or more, or 4 times or more with respect to the atomic ratio of M can be preferably used.

[0216] In particular, the atomic ratio of In, M, and Zn in the semiconductor layer 108 is preferably In:M:Zn = 5:1 :6 or in the vicinity thereof (when In is 5, M is 0.5 or more and 1.5 or less, and Zn includes 5 or more and 7 or less). Or, the atomic ratio of In, M, and Zn is preferably , In:M:Zn = 4:2:3 or in the vicinity thereof. Also, as the composition of the semiconductor layer 108, the atomic ratio of In, M, and Zn in the semiconductor layer 108 may be made substantially equal. That is, it may contain a material in the vicinity of In:M:Zn = 1:1:1.

[0217] For example, by using the above-described transistor having high field-effect mobility as a gate driver that generates a gate signal, a display device having a narrow frame width (also referred to as a narrow frame) can be provided. Also, by using the above-described transistor having high field-effect mobility as a source driver (particularly, a demultiplexer connected to the output terminal of a shift register included in the source driver), ​​​​​​​Thus, it is possible to provide a display device with a small number of wirings connected to the display device.

[0218] Even if the semiconductor layer 108 has a region where the atomic ratio of In is larger than the atomic ratio of M, when the crystallinity of the semiconductor layer 108 is high, the field-effect mobility may be low. The crystallinity of the semiconductor layer 108 can be analyzed, for example, by using X-ray diffraction (XRD: X-Ray Diffracti on) or by using a transmission electron microscope (TEM: Transmissi on Electron Microscope).

[0219] Here, impurities such as hydrogen or moisture mixed into the semiconductor layer 108 are a problem because they affect the transistor characteristics. Therefore, in the semiconductor layer 108, it is preferable that there are fewer impurities such as hydrogen or water moisture. By using a metal oxide film with a low impurity concentration and a low defect level density, it is possible to fabricate a transistor having excellent electrical characteristics, which is preferable. By using a metal oxide film with a low impurity concentration and a low defect level density (less oxygen deficiency), the carrier density in the film can be lowered. A transistor using such a metal oxide film as the semiconductor layer is less likely to have electrical characteristics (also referred to as normally-on) in which the threshold voltage becomes negative. In addition, a transistor using such a metal oxide film can obtain characteristics in which the off-current is extremely small.

[0220]

[0221] Further, the semiconductor layer 108 may have a laminated structure of two or more layers.

[0221] For example, it is possible to use a semiconductor layer 108 formed by laminating two or more metal oxide films having different compositions. It is possible. For example, when using an In-M-Zn oxide, among the films formed using a sputtering target in which the atomic ratio of In, M, and Zn is In:M:Zn = 5:1:6, In:M:Zn = 4:2:3, In:M:Zn = 1 :1:1, In:M:Zn = 2:2:1, In:M:Zn = 1:3:4, In:M:Zn = 1:3:2, or in the vicinity thereof, it is preferable to stack and use two or more of them.

[0222] In addition, it is possible to use a semiconductor layer 108 in which two or more metal oxide films having different crystallinities are stacked. In that case, it is preferable to continuously form them without exposure to the atmosphere by using the same oxide target and varying the film formation conditions.

[0223] For example, the oxygen flow rate ratio during the film formation of the first metal oxide film formed first is made smaller than the oxygen flow rate ratio during the film formation of the second metal oxide film to be formed later. Or, during the film formation of the first metal oxide film, conditions are set such that no oxygen is passed. Thereby, oxygen can be effectively supplied during the film formation of the second metal oxide film. Also, the first metal oxide film can be made a film having lower crystallinity and higher electrical conductivity than the second metal oxide film. On the other hand, by making the second metal oxide film provided on the upper part a film having higher crystallinity than the first metal oxide film, damage during the processing of the semiconductor layer 1 08 or during the film formation of the insulating layer 110 can be suppressed. More specifically, the oxygen flow rate ratio during the film formation of the first metal oxide film is 0% or more and less than 50%,

[0224] preferably 0% or more and 30% or less, more preferably 0% or more and 20% or less, and typically 10% Preferably, it is 60% or more and 100% or less, more preferably 80% or more and 100% or less, still more preferably 90% or more and 100% or less, and typically 100%. Further, for the first metal oxide film and the second metal oxide film, conditions such as pressure, temperature, and power during film formation may be made different, but by making conditions other than the oxygen flow ratio the same, the time required for the film formation process can be shortened which is preferable.

[0225] By adopting such a configuration, a transistor 200 excellent in electrical characteristics and highly reliable can be realized.

[0226] The above is the description of Configuration Example 1.

[0227] [Configuration Example 2] Hereinafter, a configuration example of a transistor that is partially different from the above Configuration Example 1 will be described . Note that in the following, parts overlapping with the above Configuration Example 1 may be omitted from the description. Also, in the drawings shown below, parts having the same functions as those in the above configuration example may have the same hatching pattern and may not be labeled.

[0228] FIG. 10(A) is a top view of the transistor 200A, FIG. 10(B) is a cross-sectional view of the transistor 200A in the channel length direction, and FIG. 10(C) is a cross-sectional view of the transistor 200A in the channel width direction.

[0229] The transistor 200A mainly differs from the transistor 100 illustrated in Configuration Example 1 in that it has a conductive layer 107 between the substrate 109 and the insulating layer 103. The conductive layer 107 has a region overlapping with the semiconductor layer 108 and the conductive layer 112.

[0230] In transistor 200A, conductive layer 107 functions as a first gate electrode (also referred to as a bottom gate electrode), and conductive layer 112 functions as a second gate electrode (also referred to as a top gate electrode). Also, a part of insulating layer 103 functions as a first gate insulating layer, and a part of insulating layer 110 functions as a second gate insulating layer. The portion of semiconductor layer 108 that overlaps at least one of conductive layer 112 and conductive layer 107 functions as a channel formation region. For ease of explanation hereinafter, the portion of semiconductor layer 108 that overlaps conductive layer 112 may be referred to as the channel formation region, but actually, a channel may also be formed in the portion that overlaps conductive layer 107 (the portion including region 108n) without overlapping conductive layer 112. As shown in FIG. 10(C), conductive layer 107 may be electrically connected to conductive layer 112 through metal oxide layer 114, insulating layer 110, and opening 142 provided in insulating layer 103. Thereby, the same potential can be applied to conductive layer 107 and conductive layer 112. Conductive layer 107 can use the same material as conductive layer 112, conductive layer 120a, or conductive layer 120b. In particular, using a material containing copper for conductive layer 107 is preferable because it can reduce the wiring resistance.

[0231] As shown in FIGS. 10(A) and (C), in the channel width direction, it is preferable that conductive layer 112 and conductive layer 107 protrude outside the end of semiconductor layer 108. At this time, as shown in FIG. 10(C), the entire channel width direction of semiconductor layer 108 is covered by the insulating layer. Note that hereinafter, for the sake of simplicity of explanation, the portion of semiconductor layer 108 that overlaps conductive layer 112 may be referred to as the channel formation region. However, in reality, a channel may be formed in the portion that overlaps conductive layer 107 (the portion including region 108n) without overlapping conductive layer 112. In the transistor 200A, the conductive layer 107 functions as a first gate electrode (also called the bottom gate electrode), and the conductive layer 112 functions as a second gate electrode (also called the top gate electrode). Also, a part of the insulating layer 103 functions as the first gate insulating layer, and a part of the insulating layer 110 functions as the second gate insulating layer. The portion of the semiconductor layer 108 that overlaps at least one of the conductive layer 112 and the conductive layer 107 functions as a channel formation region. That is, in the following, for the sake of easy explanation, the portion of the semiconductor layer 108 that overlaps the conductive layer 112 may be called the channel formation region. However, in fact, a channel may also be formed in the portion that overlaps the conductive layer 107 (the portion including the region 108n) without overlapping the conductive layer 112.

[0232] Also, as shown in FIG. 10(C), the conductive layer 107 may be electrically connected to the conductive layer 112 through the metal oxide layer 114, the insulating layer 110, and the opening 142 provided in the insulating layer 103. Thus, the same potential can be applied to the conductive layer 107 and the conductive layer 112. The conductive layer 107 can use the same material as the conductive layer 112, the conductive layer 120a, or the conductive layer 120b. In particular, it is preferable to use a material containing copper for the conductive layer 107 because it can reduce the wiring resistance.

[0233] As shown in FIGS. 10(A) and (C), in the channel width direction, it is preferable that the conductive layer 112 and the conductive layer 107 protrude outside the end of the semiconductor layer 108. At this time, as shown in FIG. 10(C), the entire channel width direction of the semiconductor layer 108 is covered by the insulating layer. In the transistor 200A, the conductive layer 107 functions as a first gate electrode (also called the bottom gate electrode), and the conductive layer 112 functions as a second gate electrode (also called the top gate electrode). Also, a part of the insulating layer 103 functions as the first gate insulating layer, and a part of the insulating layer 110 functions as the second gate insulating layer.

[0234] The portion of the semiconductor layer 108 that overlaps at least one of the conductive layer 112 and the conductive layer 107 functions as a channel formation region. That is, in the following, for the sake of easy explanation, the portion of the semiconductor layer 108 that overlaps the conductive layer 112 may be called the channel formation region. However, in fact, a channel may also be formed in the portion that overlaps the conductive layer 107 (the portion including the region 108n) without overlapping the conductive layer 112. As shown in FIGS. 10(A) and (C), in the channel width direction, it is preferable that the conductive layer 112 and the conductive layer 107 protrude outside the end of the semiconductor layer 108. It is configured to be covered by the conductive layer 112 and the conductive layer 107 via the edge layer 110 and the insulating layer 103. .

[0235] With such a configuration, the semiconductor layer 108 can be electrically surrounded by the electric field generated by the pair of gate electrodes. At this time, in particular, it is preferable to apply the same potential to the conductive layer 107 and the conductive layer 112. Thereby, since the electric field for inducing a channel in the semiconductor layer 108 can be effectively applied, the on-current of the transistor 200A can be increased. Therefore, it is also possible to miniaturize the transistor 200A. Moreover, it is also possible to adopt a configuration in which the conductive layer 112 and the conductive layer 107 are not connected. At this time, a fixed potential may be applied to one of the pair of gate electrodes, and a signal for driving the transistor 200A may be applied to the other. At this time, the threshold voltage when driving the transistor 200A with the other gate electrode can also be controlled by the potential applied to one gate electrode. The above is the description of Configuration Example 2. This embodiment can be appropriately combined with other embodiments.

[0236]

[0237]

[0238]

[0239] (Embodiment 3) In this embodiment, an electronic device according to an aspect of the present invention will be described with reference to FIGS. 11(A), (B), (C) and FIGS. 12(A), (B), (C), (D), (E).

[0240] The electronic device of this embodiment has a display device according to an aspect of the present invention in the display unit. As a result, the display unit of the electronic device can display high-quality images. Also, within a wide temperature range It is possible to perform display with high reliability.

[0241] In the display unit of the electronic device according to this embodiment, for example, it is possible to display a video having a resolution of full high vision, 2K, 4K, 8K, 16K, or higher. Also, the screen size of the display unit can be 20 inches or more in diagonal, 30 inches or more in diagonal, 50 inches or more in diagonal, 60 inches or more in diagonal, or 70 inches or more in diagonal.

[0242] As an electronic device that can use the display device according to one aspect of the present invention, for example, a television device, a desktop or notebook personal computer, a monitor for a computer, etc., a digital signage, a large game machine such as a pachinko machine, etc., in addition to electronic devices having a relatively large screen, a digital camera, a digital video camera, a digital photo frame, a mobile phone, a portable game machine, a portable information terminal, an audio playback device, etc. can be mentioned. Also, the display device according to one aspect of the present invention can also be suitably used for portable electronic devices, wearable electronic devices (wearable devices), VR (Virtual Reality) devices, AR (Augmented Reality) devices, etc.

[0243]

[0244] The electronic device according to one aspect of the present invention may have a secondary battery, and it is preferable that the secondary battery can be charged using non-contact power transmission.

[0244] Examples of the secondary battery include lithium ion secondary batteries such as lithium polymer batteries (lithium ion polymer batteries) using a gel electrolyte, nickel metal hydride batteries, nickel cadmium batteries, organic Examples include radical batteries, lead-acid batteries, air secondary batteries, nickel-zinc batteries, silver-zinc batteries, etc. and so on.

[0245] An electronic device according to an aspect of the present invention may have an antenna. By receiving a signal with the antenna, it is possible to display images, information, etc. on the display unit. Further, when the electronic device has an antenna and a secondary battery, the antenna may be used for non-contact power transmission.

[0246] An electronic device according to an aspect of the present invention may have a sensor (including a function of measuring force, displacement, position, speed, acceleration, angular velocity, rotation number, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power , radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays). and may have a function of measuring).

[0247] An electronic device according to an aspect of the present invention can have various functions. For example, functions of displaying various information (such as still images, moving images, text images, etc.) on the display unit, a touch panel function, a calendar , a function of displaying the date or time, etc., functions of executing various software (programs), a wireless communication function, a function of reading programs or data recorded on a recording medium, etc. can be provided.

[0248] Furthermore, in an electronic device having a plurality of display units, a function of mainly displaying image information on one display unit and mainly displaying character information on another display unit, or a function of displaying a stereoscopic image by displaying an image considering parallax on a plurality of display units can be provided. Furthermore, in an electronic device having an imaging unit, functions of taking still images or moving images, automatically or manually correcting the captured images, and recording the captured images on a recording medium (external or electronic It can have functions such as a function of storing in a built-in device of the machine and a function of displaying the captured image on the display unit. Note that the functions of the electronic device according to one aspect of the present invention are not limited to these, and it can have various functions.

[0249] FIG. 11(A) shows a television device 1810. The television device 1810 includes a display unit 1811, a housing 1812, a speaker 1813, etc. Further, it can have an LED lamp, operation keys (including a power switch or an operation switch), connection terminals, various sensors, a microphone, etc.

[0250] The television device 1810 can be operated by a remote control unit 1814.

[0251] Examples of the broadcast radio waves that the television device 1810 can receive include terrestrial waves or radio waves transmitted from a satellite. Also, as broadcast radio waves, there are analog broadcasts, digital broadcasts, etc., and there are broadcasts of video and audio, or audio only. For example, it can receive broadcast radio waves transmitted in a specific frequency band within the UHF band (about 300 MHz to 3 GHz) or the VHF band (30 MHz to 300 MHz). Also, for example, by using a plurality of data received in a plurality of frequency bands, the transfer rate can be increased, and more information can be obtained. Thereby, a video having a resolution exceeding full high definition can be displayed on the display unit 1811. For example, a video having a resolution of 4K, 8K, 16K, or higher can be displayed.

[0252] Also, the Internet, LAN (Local Area Network), Wi-Fi Transmitted by data transmission technology via a computer network such as i (registered trademark), etc. It may be configured to generate an image to be displayed on the display unit 1811 using the data of the broadcast. At this time, the television device 1810 may not have a tuner.

[0253] FIG. 11(B) shows the digital signage 1820 attached to the columnar pillar 1822. The digital signage 1820 has a display unit 1821.

[0254] The larger the display unit 1821, the more information can be provided at once. Also, the larger the display unit 1821, the more likely it is to catch people's eyes, for example, enhancing the advertising effect. The larger the display unit 1821, the more likely it is to catch people's eyes, for example, enhancing the advertising effect. can be achieved.

[0255] By applying a touch panel to the display unit 1821, not only can a still image or a moving image be displayed on the display unit 1821, but also the user can intuitively operate it, which is preferable. Also, when used for applications such as providing route information or traffic information, the usability can be enhanced more than with intuitive operations. can be achieved. information such as route information or traffic information, the usability can be enhanced more than with intuitive operations. than with intuitive operations.

[0256] FIG. 11(C) shows a notebook personal computer 1830. The personal computer 1830 has a display unit 1831, a housing 1832, a touch pad 1833, a connection port 1834, etc.

[0257] The touch pad 1833 functions as an input means such as a pointing device or a tablet, and can be operated with a finger or a stylus, etc. and can be operated with a finger or a stylus, etc.

[0258] Also, a display element is incorporated in the touch pad 1833. As shown in FIG. 11(C), By displaying the input keys 1835 on the surface of the touch pad 1833, the touch pad 1833 can be used as a keyboard. At this time, when touching the input keys 1835 to realize the tactile sensation by vibration, a vibration module may be incorporated into the touch pad 1833.

[0259] FIGS. 12(A) and (B) show the portable information terminal 800. The portable information terminal 800 includes a housing 801, a housing 802, a display unit 803, a display unit 804, and a hinge unit 805, etc.

[0260] The housing 801 and the housing 802 are connected by the hinge unit 805. The portable information terminal 800 can be opened from the folded state shown in FIG. 12(A) to open the housing 801 and the housing 802 as shown in FIG. 12(B).

[0261] For example, document information can be displayed on the display unit 803 and the display unit 804, and it can also be used as an e - book terminal. In addition, still images and moving images can also be displayed on the display unit 803 and the display unit 804.

[0262] In this way, since the portable information terminal 800 can be folded when carried, it has excellent versatility.

[0263] Note that the housing 801 and the housing 802 may have a power button, operation buttons, an external connection port, a speaker, a microphone, etc.

[0264] FIG. 12(C) shows an example of the portable information terminal. The portable information terminal 810 shown in FIG. 12(C) includes a housing 811, a display unit 812, operation buttons 813, an external connection port 814, a speaker 81 5, a microphone 816, a camera 817, etc.

[0265] The mobile information terminal 810 is equipped with a touch sensor on the display unit 812. All operations such as making a call or inputting characters can be performed by touching the display unit 812 with a finger or a stylus.

[0266] Also, by operating the operation button 813, the power can be turned on and off, and the type of image displayed on the display unit 812 can be switched. For example, it can be switched from the email creation screen to the main news screen.

[0267] Also, by providing a detection device such as a gyro sensor or an acceleration sensor inside the mobile information terminal 810, the orientation (portrait or landscape) of the mobile information terminal 810 can be determined, and the display orientation of the display unit 812 can be automatically switched. Also, the switching of the display orientation can be performed by touching the display unit 812, operating the operation button 813, or voice input using the microphone 816.

[0268] The mobile information terminal 810 has one or more functions selected from, for example, a telephone, a notebook, or an information browsing device. Specifically, it can be used as a smartphone. The mobile information terminal 810 can execute various applications such as a mobile phone, email, text browsing and creation, music playback, video playback, Internet communication, and games.

[0269] FIG. 12(D) shows an example of a camera. The camera 820 has a housing 821, a display unit 822, operation buttons 823, a shutter button 824, etc. Also, a detachable lens 826 is attached to the camera 820. ​​​​​​​​​​​​

[0270] Here, the camera 820 is configured such that the lens 826 can be removed from the housing 821 and replaced. However, the lens 826 and the housing 821 may be integrated.

[0271] The camera 820 can capture a still image or a moving image by pressing the shutter button 824. In addition, the display unit 822 has a function as a touch panel, and it is also possible to capture an image by touching the display unit 8 22.

[0272] Note that the camera 820 can be separately equipped with a strobe device, a viewfinder, etc. Alternatively, these may be incorporated in the housing 821.

[0273] FIG. 12(E) shows an example in which the display device according to one aspect of the present invention is mounted as an in-vehicle display. The display units 832 and 833 can display various information such as navigation information, a speedometer, a tachometer, a travel distance, a fuel gauge, a gear state, and an air conditioner setting. The display can appropriately change the display items and layout according to the user's preference. The display device according to one aspect of the present invention can be used in a wide temperature range, and can display with high reliability in both a low-temperature environment and a high-temperature environment. Therefore, by using the display device according to one aspect of the present invention as an in-vehicle display, the driving safety can be improved.

[0274] FIGS. 13(A), (B) and FIGS. 14(A), (B) show a display system to which the display device according to one aspect of the present invention is applied.

[0275] FIG. 13(A) shows a perspective view of a display system, which includes a display device 910 and an imaging device 911 arranged behind the display device 910. An image of the other party is displayed on the first display surface 912 of the display device 910. The display system shown in FIGS. 13(A) and (B) may be referred to as a videophone device. Since the display device 910 has the function of transmitting visible light, the imaging device 911 arranged behind the display device 910 can be used to image the interlocutor 913. The interlocutor 913 is on the side of the first display surface 912 and visually recognizes the first display surface so as to align the line of sight with the image of the other party. Further, in the imaging device 911, specifically, the imaging lens 914 is arranged on the line of sight of the interlocutor 913. At this time, the imaging device 911 is within the range of a distance at which the interlocutor 913 can be imaged, and it is necessary to adjust the focus to the interlocutor 913. FIG. 13(B) shows a top view of the videophone device, showing the display device 910, the imaging device 911, and the first display surface 912. When the interlocutor 913 faces the front of the first display surface 912, the other interlocutor can align the line of sight with the image captured by the imaging device 911.

[0276] Also, this display system can obtain information behind the display device 910 while looking at the image displayed on the first display surface 912. In the example shown in FIG. 14(A), the interlocutor 913 can observe the state of the passerby 915 behind the display device 910 while looking at the video projected on the first display surface 912. FIG. 14(B) corresponds to FIG. 14(A).

[0277]

[0278]

[0279] ​​​​​​​​​​​​​​ The upper view corresponding thereto is shown. Note that the configuration shown in Fig. 14(A) may not have an imaging device. As shown in Figs. 14(A) and (B), this display system can obtain an image obtained by synthesizing an image displayed on the first display surface 912 and information behind it.

[0280] As described above, an electronic device can be obtained by applying the display device according to one aspect of the present invention. The applicable range of the display device is extremely wide and can be applied to electronic devices in all fields.

[0281] This embodiment can be appropriately combined with other embodiments.

Explanation of reference numerals

[0282] FPCa: Flexible printed circuit board, FPCb: Flexible printed circuit board, GD_L: Gate driver, GD_R: Gate driver, GL_m: Scanning line, GL_m+ 1: Scanning line, IC: Integrated circuit, P: Region, SL_n: Signal line, TCOM: Common wiring, VC OM: Common wiring, 10: Display device, 11: Pixel, 11a: Pixel, 11b: Pixel, 30: Ba cklight unit, 31: Substrate, 32: Substrate, 33: Light-emitting element, 34: Diffusion plate, 35: Printed circuit board, 36: Route, 37: Route, 38: Light-shielding layer, 39: Light guide plate, 41: Conductive layer, 42: Liquid crystal layer, 43b: Conductive layer, 43c: Conductive layer, 44: Insulating layer, 46a: Conductive layer, 46 b: Conductive layer, 46c: Conductive layer, 46d: Conductive layer, 61: Polarizing plate, 63: Polarizing plate, 100: Display area, 101: Transistor, 102: Transistor, 103: Insulating layer, 104: Cap acitance element, 105: Capacitance element, 106: Liquid crystal element, 107: Conductive layer, 108: Semiconductor layer, 1 08n: Region, 109: Substrate, 110: Insulating layer, 110d: Region, 111: Region, 112 ​: Conductive layer, 116: Insulating layer, 118: Insulating layer, 120a: Conductive layer, 120b: Conductive layer, 1 21: Wiring, 122: Wiring, 124: Wiring, 125: Wiring, 135: Overcoat, 1 41: Adhesive layer, 141a: Opening, 141b: Opening, 172: FPC, 200: Tran sistor, 200A: Transistor, 211: Insulating layer, 213: Insulating layer, 214: Insulating layer, 215: Insulating layer, 221a: Conductive layer, 221b: Conductive layer, 222a: Conductive layer, 222c: Conductive layer, 223a: Conductive layer, 223b: Conductive layer, 225: Insulating layer, 231a: Semiconductor layer, 231a_1: Semiconductor layer, 231a_m: Semiconductor layer, 231ai: Region, 231an: Low Resistance region, 231b: Semiconductor layer, 242: Connector

Claims

[Claim 1] a transistor, a first conductive layer, a second conductive layer, and a third conductive layer; The transistor has a plurality of semiconductor layers, The number of the semiconductor layers is greater than 2 and is not greater than 50, Each of the plurality of semiconductor layers has a channel formation region, a first region, and a second region; In each of the plurality of semiconductor layers, the channel formation region is disposed between the first region and the second region when viewed from above, the channel formation region of each of the plurality of semiconductor layers includes a metal oxide; the metal oxide comprises indium and zinc; the channel formation region of each of the plurality of semiconductor layers has a region overlapping with the first conductive layer, the first region overlaps the second conductive layer and does not overlap the first conductive layer; the second region overlaps the third conductive layer but does not overlap the first conductive layer; the third conductive layer has a function of transmitting visible light; A display device in which the second region and the third conductive layer in a stacked state have a function of transmitting visible light.

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