Doherty amplifier circuit

Abstract

To provide a Doherty amplifier circuit capable of widening the bandwidth.SOLUTION: A Doherty amplifier circuit includes: a distribution node N1 that distributes an input signal into a first signal and a second signal; a main amplifier 10 that amplifies the first signal and outputs the amplified signal as a fourth signal; a first peak amplifier 12 that amplifies the second signal and outputs the amplified signal as a fifth signal; a combination node N2 that combines the fourth signal and the fifth signal and outputs the combined signal to an output terminal as an output signal; and a notch filter 21 that is connected between the distribution node and the first peak amplifier and suppresses a signal at a center frequency of an operating band.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a Doherty amplifier circuit.

Background Art

[0002] An N (N is 3 or more)-way Doherty amplifier circuit using a main amplifier and two or more peak amplifiers is known (for example, Patent Documents 1 and 2).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, in a Doherty amplifier circuit, an impedance converter is used in a synthesizer. Also, a phase adjuster for adjusting phase fluctuations due to the impedance converter is provided. For this reason, the bandwidth becomes narrow.

[0005] The present disclosure aims to widen the bandwidth.

Means for Solving the Problems

[0006] One embodiment of the present disclosure includes a distribution node that distributes an input input signal into a first signal and a second signal, a main amplifier that amplifies the first signal and outputs the amplified signal as a fourth signal, a first peak amplifier that amplifies the second signal and outputs the amplified signal as a fifth signal, a synthesis node that synthesizes the fourth signal and the fifth signal and outputs the synthesized signal to an output terminal as an output signal, and a notch filter connected between the distribution node and the first peak amplifier that suppresses a signal at the center frequency of the operating band.

Advantages of the Invention

[0007] According to the present disclosure, broadband can be achieved.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Modes for Carrying Out the Invention

[0009] [Description of Embodiments of the Present Disclosure] First, the content of the embodiments of the present disclosure will be listed and described. (1) One embodiment of the present disclosure includes a distribution node that distributes an input input signal into a first signal and a second signal, a main amplifier that amplifies the first signal and outputs the amplified signal as a fourth signal, a first peak amplifier that amplifies the second signal and outputs the amplified signal as a fifth signal, a combining node that combines the fourth signal and the fifth signal and outputs the combined signal to an output terminal as an output signal, and a notch filter connected between the distribution node and the first peak amplifier that suppresses a signal at the center frequency of the operating band. This enables broadband. (2) In the above (1), a second peak amplifier that amplifies the third signal and outputs the amplified signal as the sixth signal is provided. The distribution node distributes the input signal into the first signal, the second signal, and the third signal. The combining node combines the fourth signal, the fifth signal, and the sixth signal, and outputs the combined signal to the output terminal as the output signal. The input power of the input signal when the first peak amplifier is on may be smaller than the input power of the input signal when the second peak amplifier is on. Thereby, broadband operation becomes possible. (3) In the above (1) or (2), when the input power of the input signal is the power at which the main amplifier and the first peak amplifier operate, the power of the fourth signal at the center frequency at the combining node is greater than the power of the fourth signal at the frequencies at both ends of the operating band at the combining node, and the power of the fifth signal at the center frequency at the combining node may be smaller than the power of the fifth signal at the frequencies at both ends of the operating band at the combining node. Thereby, broadband operation becomes possible. (4) In the above (3), when the input power of the input signal is the power at which the main amplifier and the first peak amplifier operate, the absolute value of the difference between the output power of the output signal at the center frequency and the output power of the output signal at the frequencies at both ends of the operating band may be smaller than the absolute value of the difference between the power of the fourth signal at the center frequency at the combining node and the power of the fourth signal at the frequencies at both ends of the operating band at the combining node. Thereby, broadband operation becomes possible. (5) In the above (4), when the input power of the input signal is the power at which the main amplifier and the first peak amplifier operate, the absolute value of the difference between the output power of the output signal at the center frequency and the output power of the output signal at the frequencies at both ends of the operating band may be smaller than the absolute value of the difference between the power of the fifth signal at the center frequency at the combining node and the power of the fifth signal at the frequencies at both ends of the operating band. Thereby, broadband operation becomes possible. (6) In any of the above (1) to (5), a notch filter for suppressing the signal of the center frequency may not be connected between the distribution node and the main amplifier. This enables miniaturization. (7) In the above (2), a notch filter for suppressing the signal of the center frequency may not be connected between the distribution node and the second peak amplifier. This enables miniaturization. (8) In any of the above (1) to (7), a quarter-wavelength line may be connected in series to the path from the distribution node through the main amplifier to the combining node with respect to the center frequency. This enables miniaturization.

[0010] [Details of Embodiments of the Present Disclosure] A specific example of a Doherty amplifier circuit according to an embodiment of the present disclosure will be described below with reference to the drawings. Note that the present disclosure is not limited to these examples, and is defined by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims.

[0011] [Example 1] As a Doherty amplifier circuit, a high-power high-frequency amplifier circuit used in a base station for mobile communication will be described as an example. In this case, the frequency of the high-frequency signal is, for example, 0.5 GHz or more and 10 GHz or less. FIG. 1 is a block diagram of a Doherty amplifier circuit according to Example 1.

[0012] As shown in FIG. 1, in the Doherty amplifier circuit 100, a main amplifier 10, a peak amplifier 12 (first peak amplifier), and 14 (second peak amplifier) are connected in parallel between the distribution node N1 of the distributor 16 and the combining node N2 of the combiner 18. Paths 25 to 27 are paths from the distribution node N1 through the main amplifier 10, the peak amplifier 12, and 14, respectively, to the combining node N2. In this way, the Doherty amplifier circuit 100 is a 3-way amplifier circuit. The Doherty amplifier circuit may be an N-way Doherty amplifier circuit having one or three or more peak amplifiers.

[0013] A high-frequency signal is input as an input signal Sin to the input terminal Tin. The distributor 16 distributes the input signal Sin input to the input terminal Tin into signals S1 (first signal), S2 (second signal), and S3 (third signal). The distributor 16 is, for example, a Wilkinson-type distributor. The distributor 16 has a distribution node N1 to which the signals S1, S2, and S3 are distributed.

[0014] Path 25 includes a phase adjuster 20, a matching circuit 30, a bias circuit 36, a main amplifier 10, a bias circuit 39, and a matching circuit 33. Path 26 includes a notch filter 21, a matching circuit 31, a bias circuit 37, a peak amplifier 12, a matching circuit 34, and an impedance converter 23. Path 27 includes a matching circuit 32, a bias circuit 38, a peak amplifier 14, a matching circuit 35, and an impedance converter 24.

[0015] The matching circuits 30 to 32 match the impedances seen from the matching circuits 30 to 32 to the impedances seen from the main amplifier 10, the peak amplifiers 12 and 14, respectively, from the distributor 16. The bias circuits 36 to 38 supply gate bias voltages VG1 to VG3 to the gates G of the main amplifier 10, the peak amplifiers 12 and 14, respectively.

[0016] The phase adjuster 20 adjusts the phase of the signal S1 in order to align the phases of the signals S5 and S6, which change due to the impedance converters 23 and 24, with the signal S4. The notch filter 21 is a filter that suppresses a signal at the center frequency of the operating band.

[0017] The main amplifier 10, peak amplifiers 12 and 14 amplify signals S1, S2 and S3 respectively, and output amplified signals S4 (the fourth signal), S5 (the fifth signal) and S6 (the sixth signal) respectively. The bias circuit 39 supplies a drain bias voltage VD to the drains D of the main amplifier 10, peak amplifiers 12 and 14. The matching circuits 33 to 35 match the impedances seen from the main amplifier 10, peak amplifiers 12 and 14 to the impedances seen from the matching circuits 33 to 35 to the synthesizer 18 respectively.

[0018] The synthesizer 18 includes a synthesis node N2, impedance converters 23 and 24. One end of the impedance converter 23 is electrically connected to the peak amplifier 12 via the matching circuit 34, and the other end is electrically connected to the synthesis node N2. One end of the impedance converter 24 is electrically connected to the peak amplifier 14 via the matching circuit 35, and the other end is electrically connected to the synthesis node N2. The synthesis node N2 synthesizes the signals S4 to S6 and outputs the synthesized signal as the output signal Sout to the output terminal Tout.

[0019] The impedance converters 23 and 24 convert the impedances on the real axis of the Smith chart seen from the matching circuits 34 and 35 to the impedances at different positions on the real axis of the Smith chart seen from the impedance converters 23 and 24 to the synthesis node N2. Also, when the peak amplifier 12 does not operate, the impedance converter 23 makes the impedance seen from the synthesis node N2 to the peak amplifier 12 infinite. When the peak amplifier 14 does not operate, the impedance converter 24 makes the impedance seen from the synthesis node N2 to the peak amplifier 14 infinite.

[0020] The phase adjuster 20, impedance converters 23 and 24 are transmission lines such as microstrip lines or coplanar lines, and are quarter-wavelength lines at the center frequency of the operating band. The electrical length of the quarter-wavelength line does not have to be exactly a quarter wavelength. The quarter-wavelength line only needs to have an electrical length that functions as impedance converters 23 and 24. For example, the electrical length of the quarter-wavelength line may be not less than 3 / 16 wavelength and not more than 5 / 16 wavelength, or may be not less than 7 / 32 wavelength and not more than 9 / 32 wavelength. The impedance on the real axis in the Smith chart does not have to be exactly on the real axis (the reactance component is 0). The absolute value of the reactance component of the impedance may be not more than 0.2 times the resistance component, or may be not more than 0.1 times the resistance component.

[0021] The main amplifier 10, peak amplifiers 12 and 14 each include transistors Q1 to Q3. The transistors Q1 to Q3 are, for example, FETs (Field Effect Transistors), such as GaN HEMTs (Gallium Nitride High Electron Mobility Transistors) or LDMOS (Laterally Diffused Metal Oxide Semiconductor). The sources S of the transistors Q1 to Q3 are grounded, signals S1 to S3 are input to the gates G respectively, and signals S4 to S6 are output from the drains D respectively.

[0022] FIG. 2 is a diagram showing an example of the notch filter in the first embodiment. As shown in FIG. 2, the notch filter 21 includes a series resonance circuit 28 shunt-connected to the node N3 of the path 26. The series resonance circuit 28 includes a capacitor C1, an inductor L1, and a resistor R1 connected in series between the node N3 and a reference potential such as ground. By setting the resonance frequency of the series resonance circuit 28 as the center frequency f0, the signal of the center frequency f0 transmitted through the path 26 is suppressed. The notch filter 21 may be an LC parallel resonance circuit or an LCR parallel resonance circuit provided in series with the path 26. The circuit configuration of the notch filter 21 can be designed as appropriate.

[0023] FIG. 3 is a schematic diagram showing the probability with respect to Pout in Example 1, the Pout of each amplifier with respect to Pin, the gain of each amplifier with respect to Pin, and the overall gain with respect to Pin.

[0024] The probability is the probability of the modulated wave signal of the high-frequency signal for mobile communication amplified by the Doherty amplifier circuit 100. That is, it is the probability that the Doherty amplifier circuit 100 outputs a certain output power Pout. Each Pout is the output power Pout of the main amplifier 10, the peak amplifiers 12 and 14. Each gain is the power gain of each of the main amplifier 10, the peak amplifiers 12 and 14. The overall gain is the power gain of the output power Pout of the output signal Sout with respect to the input power Pin of the input signal Sin. Note that Pin and Pout are in dB display. The gain of the main amplifier 10 with an input power Pin of power P1 or less is greater than the gain of the peak amplifier 12 with a power of P1 or more and P2 or less. That is, the slope of Pout with respect to the input power Pin in the main amplifier 10 at power P1 or less is greater than the slope of Pout with respect to the input power Pin in the peak amplifier 12 at power P1 or more and P2 or less. However, FIG. 4 is a schematic diagram, and shows that the slope of Pout with respect to the input power Pin in the main amplifier 10 at power P1 or less is smaller than the slope of Pout with respect to the input power Pin in the peak amplifier 12 at power P1 or more and P2 or less.

[0025] As shown in Fig. 3, when the output power Pout is the power P0, the probability of the modulation wave is the highest. That is, when outputting the signal of the modulation wave, the time when the output power Pout is the power P0 is the longest. The main amplifier 10 is a class A or AB amplifier, and the peak amplifiers 12 and 14 are class C amplifiers. The input power Pin at which the peak amplifier 12 turns on is greater than the input power Pin at which the main amplifier 10 turns on, and the input power Pin at which the peak amplifier 14 turns on is greater than the input power Pin at which the peak amplifier 12 turns on. In order to operate in this way, it can be realized by making the gate bias voltage VG2 of the transistor Q2 more negative and larger than the gate bias voltage VG1 of the transistor Q1, and making the gate bias voltage VG3 of the transistor Q3 more negative and larger than the gate bias voltage VG2 of the transistor Q2.

[0026] The input power of the input signal Sin at which the main amplifier 10 turns on is smaller than the input power at which the peak amplifier 12 turns on. The input power of the input signal Sin at which the peak amplifier 12 turns on is smaller than the input power at which the peak amplifier 14 turns on. When the input power Pin of the input signal Sin increases and the input power Pin exceeds the power P0 and reaches the power P1, the main amplifier 10 operates, but the peak amplifiers 12 and 14 do not operate. When the input power Pin is below the power P1, as the input power Pin increases, the output power Pout of the main amplifier 10 increases linearly. Therefore, when the input power Pin is below the power P0, each gain and the overall gain are almost constant.

[0027] When the input power Pin is above the power P1 and below the power P2, the main amplifier 10 and the peak amplifier 12 operate, but the peak amplifier 14 does not operate. In this range, the main amplifier 10 saturates. Therefore, the gain of the main amplifier 10 decreases. Along with this, the overall gain also decreases. Since the peak amplifier 12 operates in class C, the gain of the peak amplifier 12 between the power P1 and P2 is lower than the gain of the main amplifier 10 below the power P1. Also, the saturation power of the peak amplifier 12 is smaller than the saturation power of the main amplifier 10.

[0028] When the input power Pin is equal to or greater than power P2 and equal to or less than power P3, all of the main amplifier 10, peak amplifiers 12 and 14 operate. In this range, in addition to the main amplifier 10, the peak amplifier 12 saturates. Therefore, the gain of the peak amplifier 12 decreases. Along with this, the overall gain also decreases. Since the operating point of the peak amplifier 14 is more negative than that of the peak amplifier 12, the gain of the peak amplifier 14 between the powers P2 and P3 is lower than the gain of the peak amplifier 12 between the powers P1 and P2. Also, the saturation power of the peak amplifier 14 is smaller than the saturation power of the peak amplifier 12.

[0029] When the input power Pin is equal to or greater than power P3, in addition to the main amplifier 10 and the peak amplifier 12, the peak amplifier 14 saturates. Therefore, the gain of the peak amplifier 14 decreases. Along with this, the overall gain also decreases.

[0030] The product of the probability and the overall gain corresponds to the gain of the modulated wave. In order to improve the gain of the modulated wave, the overall gain at the output power Pout with a high probability is improved.

[0031] [Comparative Example 1] In Comparative Example 1, the notch filter 21 is not provided. Other configurations are the same as those in the first embodiment. FIG. 4 is a diagram showing the power with respect to the frequency in Comparative Example 1. In FIG. 4, it corresponds to the case where the input power Pin is the power P2. The power P4 indicates the power of the signal S4 at the synthesis node N2. The power P5 indicates the power of the signal S5 at the synthesis node N2. The output power Pout indicates the power of the output signal Sout. The center frequency f0 indicates the center frequency of the operating band. The frequencies f1 and f2 indicate the low frequency end and the high frequency end of the operating band, respectively.

[0032] The powers P4 at the center frequency f0, frequencies f1 and f2 are power P40, P41 and P42 respectively. The difference between power P40 and P41 is ΔP41, and the difference between power P40 and P42 is ΔP42. The powers P5 at the center frequency f0, frequencies f1 and f2 are power P50, P51 and P52 respectively. The difference between power P50 and P51 is ΔP51, and the difference between power P50 and P52 is ΔP52. The output powers Pout at the center frequency f0, frequencies f1 and f2 are power Pout0, Pout1 and Pout2 respectively. The difference between power Pout0 and Pout1 is ΔPout1, and the difference between power Pout0 and Pout2 is ΔPout2.

[0033] A phase adjuster 20 is provided in path 25, and an impedance converter 23 is provided in path 26. As the phase adjuster 20 and the impedance converter 23, a 1 / 4 wavelength line is provided. For this reason, the powers P4 and P5 become narrowband. Therefore, even if the powers P40 and P50 increase at the center frequency f0, P41, P51, P42 and P52 become small at the frequencies f1 and f2. As a result, ΔP41, ΔP42, ΔP51 and ΔP52 increase.

[0034] The output power Pout is the power obtained by combining the powers P4 and P5. For this reason, ΔPout1 becomes larger than ΔP41 and ΔP51, and ΔPout2 becomes larger than ΔP42 and ΔP52. Therefore, when the input power Pin is the power P2, the gain near the frequencies f1 and f2 decreases and the bandwidth becomes narrow.

[0035] [Description of Embodiment] FIG. 5 is a diagram showing the power with respect to the frequency in Embodiment 1. As shown in FIG. 5, in Embodiment 1, a notch filter 21 is provided in path 26. For this reason, in the power P5, the power P50 at the center frequency f0 becomes smaller than the powers P51 and P52 at the frequencies f1 and f2.

[0036] In the output power Pout, the mountain-shaped spectrum of power P4 with respect to frequency is compensated by the valley-shaped spectrum of power P5 with respect to frequency. As a result, ΔPout1 and ΔPout2 become smaller than ΔPout1 and ΔPout2 in Comparative Example 1 of FIG. 4. Therefore, when the input power Pin is power P2, broadbanding becomes possible. Even when the input power Pin is power P3, broadbanding becomes possible.

[0037] According to Example 1, a notch filter 21 that suppresses a signal at the center frequency of the operating band is connected between the distribution node N1 and the peak amplifier 12. Thereby, broadbanding becomes possible at the input power at which the peak amplifier 12 operates.

[0038] When the input power Pin of the input signal Sin is the power at which the main amplifier 10 and the peak amplifier 12 operate (for example, when the input power Pin is power P2 or P3), in the signal S4 at the synthesis node N2, the power P40 at the center frequency f0 is larger than each of the powers P41 and P42 at both ends of the operating band. In the signal S5 at the synthesis node N2, the power P50 at the center frequency f0 is smaller than each of the powers P51 and P52 at both ends of the operating band. Thereby, the mountain-shaped spectrum of the signal S4 can be canceled using the valley-shaped spectrum of the signal S5. Therefore, broadbanding becomes possible.

[0039] The power P40 may be 0.5 dB or more larger than the powers P41 and P42, or may be 1 dB or more larger. The power P50 may be 0.5 dB or more smaller than the powers P51 and P52, or may be 1 dB or more smaller.

[0040] At powers P2 and P3, the absolute values of the differences ΔPout1 and ΔPout2 between the power Pout0 at the center frequency f0 of the output power Pout and the powers Pout1 and Pout2 at frequencies f1 and f2 are each smaller than the absolute values of the differences ΔP41 and ΔP42 between the power P40 and the powers P41 and P42. Thereby, the mountain-shaped spectrum of the signal S4 can be canceled using the valley-shaped spectrum of the signal S5. Therefore, broadbanding becomes possible.

[0041] The absolute values of ΔPout1 and ΔPout2 can be set to 0.8 times or less, and can be set to 0.5 times or less, of the absolute values of ΔP41 and ΔP42.

[0042] When power is P2 and P3, the absolute values of ΔPout1 and ΔPout2 are smaller than the absolute values of the differences ΔP51 and ΔP52 between power P50 and powers P51 and P52, respectively. Thereby, the peak-shaped spectrum of signal S4 can be canceled using the valley-shaped spectrum of signal S5. Therefore, broadbanding becomes possible.

[0043] The absolute values of ΔPout1 and ΔPout2 can be set to 0.8 times or less, and can be set to 0.5 times or less, of the absolute values of ΔP51 and ΔP52.

[0044] A notch filter that suppresses a signal of center frequency f0 is not connected between distribution node N1 and main amplifier 10. If a notch filter is provided in path 25, the insertion loss of main amplifier 10 that most affects the gain of the modulated wave in FIG. 3 will increase. Therefore, notch filter 21 is provided in path 26. Thereby, reduction of the gain of the modulated wave is suppressed and broadbanding becomes possible.

[0045] A notch filter that suppresses a signal of center frequency f0 may be provided between distribution node N1 and peak amplifier 14. However, as shown in FIG. 3, the operation of peak amplifier 14 does not much affect the gain of the modulated wave. Therefore, miniaturization is possible by not providing a notch filter in path 27.

[0046] A phase adjuster 20 (quarter-wavelength line) is connected in series to path 25 from distribution node N1 through main amplifier 10 to synthesis node N2 with respect to center frequency f0. Thereby, the output power Pout becomes narrowband. Therefore, broadbanding becomes possible by providing notch filter 21 in path 26.

[0047] Although the 3-way Doherty amplifier circuit has been described as an example, a 2-way Doherty amplifier circuit without the peak amplifier 14 and the impedance converter may also be used. Further, an N-way Doherty amplifier circuit where N is 4 or more may be used. In this case, N-1 peak amplifiers may be provided.

[0048] It should be considered that the embodiments disclosed this time are illustrative in all respects and not restrictive. The scope of the present disclosure is shown not by the above description but by the claims, and it is intended that all modifications within the meaning and scope equivalent to the claims are included.

Explanation of Signs

[0049] 10 Main amplifier 12, 14 Peak amplifier 16 Distributor 18 Combiner 20 Phase adjuster 21 Notch filter 23 Impedance converter 24 Impedance converter 30, 31, 32, 33, 34, 35 Matching circuit 36, 37, 38, 39 Bias circuit 100 Doherty amplifier circuit N1 Distribution node N2 Combining node S1 (First signal), S2 (Second signal), S3 (Third signal), S4 (Fourth signal), S5 (Fifth signal), S6 (Sixth signal) Signals Sin Input signal Sout Output signal Tin Input terminal Tout Output terminal

Claims

1. A distribution node that distributes an input input signal into a first signal and a second signal, A main amplifier that amplifies the first signal and outputs the amplified signal as a fourth signal, A first peak amplifier that amplifies the second signal and outputs the amplified signal as a fifth signal, A combining node that combines the fourth signal and the fifth signal and outputs the combined signal to an output terminal as an output signal, A notch filter connected between the distribution node and the first peak amplifier, which suppresses a signal at the center frequency of the operating band, A Doherty amplifier circuit comprising the same.

2. Comprising a second peak amplifier that amplifies a third signal and outputs the amplified signal as a sixth signal, The distribution node distributes the input signal into the first signal, the second signal, and the third signal, The combining node combines the fourth signal, the fifth signal, and the sixth signal and outputs the combined signal to the output terminal as the output signal, The Doherty amplifier circuit according to Claim 1, wherein the input power of the input signal when the first peak amplifier is turned on is smaller than the input power when the second peak amplifier is turned on.

3. When the input power of the input signal is the power at which the main amplifier and the first peak amplifier operate, The power of the fourth signal at the center frequency at the combining node is greater than the power of the fourth signal at the frequencies at both ends of the operating band at the combining node, The Doherty amplifier circuit according to Claim 1 or Claim 2, wherein the power of the fifth signal at the center frequency at the combining node is smaller than the power of the fifth signal at the frequencies at both ends of the operating band at the combining node.

4. When the input power of the input signal is the power at which the main amplifier and the first peak amplifier operate, The absolute value of the difference between the output power of the output signal at the center frequency and the output power at the frequencies at both ends of the operating band is smaller than the absolute value of the difference between the power of the fourth signal at the center frequency at the combining node and the power of the fourth signal at the frequencies at both ends of the operating band at the combining node. The Doherty amplifier circuit according to Claim 3.

5. When the input power of the input signal is the power at which the main amplifier and the first peak amplifier operate, The absolute value of the difference between the output power of the output signal at the center frequency and the output power of the frequencies at both ends of the operating band is smaller than the absolute value of the difference between the power of the fifth signal at the center frequency and the power of the fifth signal at the frequencies at both ends of the operating band at the combining node. The Doherty amplifier circuit according to claim 4.

6. A notch filter for suppressing a signal at the center frequency is not connected between the distribution node and the main amplifier. The Doherty amplifier circuit according to claim 1 or claim 2.

7. A notch filter for suppressing a signal at the center frequency is not connected between the distribution node and the second peak amplifier. The Doherty amplifier circuit according to claim 2.

8. A quarter-wavelength line is connected in series with respect to the center frequency in the path from the distribution node through the main amplifier to the combining node. The Doherty amplifier circuit according to claim 1 or claim 2.

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