Display device

Abstract

To provide a display device that is easy to design, and has a freedom degree of design improved.SOLUTION: A display device has a pixel circuit and a drive circuit which are provided in a display unit. The drive circuit has a plurality of pulse output circuits. The pulse output circuit has a function driving a gate line. The pixel circuit is electrically connected to the gate line. The pulse output circuit has a first transistor. The pixel circuit has a second transistor. A layer where the second transistor is provided is an upper layer of a layer where the first transistor is provided, and the display device is configured such that the first transistor and second transistor have an overlapping region.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to an article, a method, or a manufacturing method. The present invention relates to a method, manufacture, or composition of matter. One embodiment of the present invention is a semiconductor device, a light-emitting device, a display device, an electronic device, a lighting device, or any of these devices. The present invention relates to a driving method thereof or a manufacturing method thereof, and in particular to a display device (display panel). Alternatively, the present invention relates to an electronic device, a light-emitting device, a lighting device, or a manufacturing method thereof that includes a display device. Regarding.

[0002] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to devices in general. Transistors, semiconductor circuits, arithmetic units, memory devices, etc. are all types of semiconductor devices. The light-emitting device, the display device, the electronic device, the lighting device, and the electronic device are also semiconductor devices. The following may be present: [Background technology]

[0003] Liquid crystal display devices used in electronic devices, EL (Electroluminescence ce) Display devices such as display devices are becoming increasingly narrow-framed in order to reduce size and improve design freedom. To achieve a narrower frame, it is necessary to integrate the pixel circuit and the driver circuit on the same substrate. It is effective to provide part or all of the above.

[0004] The driving circuit is a CMOS (Complementary Metal Oxide Generally, it is composed of a single-polarity transistor. For example, in Patent Document 1, a circuit such as a shift register is used. A technique configured with a unipolar transistor is disclosed.

[0005] In addition, in order to achieve a narrow border, a configuration is proposed in which a circuit such as a shift register is provided in a region (pixel region) where pixels are provided. For example, Patent Document 2 discloses a configuration in which a gate driver is provided in the pixel region to improve the degree of design freedom. For example, Patent Document 2 discloses a configuration in which a gate driver is provided in the pixel region to improve the degree of design freedom. For example, Patent Document 2 discloses a configuration in which a gate driver is provided in the pixel region to improve the degree of design freedom.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0007] In the configuration described in Patent Document 2, the gate driver is dispersedly arranged within the pixel region. Therefore, a pixel circuit in which transistors constituting the gate driver are arranged and a pixel circuit in which transistors constituting the gate driver are not arranged are mixed. In this case, a pixel circuit in which transistors constituting the gate driver are arranged has an increased pixel area compared to a pixel circuit in which transistors constituting the gate driver are not arranged, and there is a problem that high refinement becomes difficult. a pixel circuit in which transistors constituting the gate driver are arranged has an increased pixel area compared to a pixel circuit in which transistors constituting the gate driver are not arranged, and there is a problem that high refinement becomes difficult.

[0008] Another problem is that when a pixel circuit in which transistors constituting the gate driver are arranged and a pixel circuit in which transistors constituting the gate driver are not arranged are mixed there are two types of pixel circuits, which complicates the circuit design. there are two types of pixel circuits, which complicates the circuit design. There is another problem. Similarly, since the wirings for connecting between the transistors constituting the gate driver also have different connection relationships, the circuit design becomes complicated, which is a problem.

[0009] One aspect of the present invention aims to provide a display device with a narrow border. Or, one aspect of the present invention aims to provide a display device that improves the degree of freedom of design. Or, one aspect of the present invention aims to provide a display device having a pixel circuit capable of enhancing the fineness. Or, one aspect of the present invention aims to provide a display device that can avoid complication of circuit design. Or, one aspect of the present invention aims to provide a display device with low power consumption. Or, one aspect of the present invention aims to provide a novel display device. Or, one aspect of the present invention aims to provide an electronic device including the above display device (display panel). Or, one aspect of the present invention aims to provide a novel electronic device.

[0010] Note that the description of these problems does not prevent the existence of other problems. One aspect of the present invention is not required to solve all of these problems. Also, other problems will be apparent from the description in the specification and the like, and it is possible to extract other problems from the description in the specification and the like.

Means for Solving the Problems

[0011] One aspect of the present invention provides, in a display unit, a stacked structure including a layer having transistors constituting a pixel circuit and a layer having transistors constituting a driving circuit. Transistors constituting the pixel circuit are arranged in the upper layer, and a gate driver as a driving circuit is constituted by transistors in the lower layer. ​​​​​​​​​​​​​Place the transistor. By placing the gate driver provided in the frame portion below the display portion , the degree of freedom in design such as a narrow bezel can be increased. Also, by arranging the pixel circuit and the transistor that forms the same circuit layout of the pixel circuit can be designed by repeating the pixel circuit in this way, it is possible to avoid the complication of the circuit design.

[0012] One aspect of the present invention has a pixel circuit and a drive circuit provided in a display portion, and the drive circuit has a plurality of pulse output circuits, the pulse output circuit has a function of driving a gate line, and the pixel circuit is electrically connected to the gate line, the pulse output circuit has a first transistor, the pixel circuit has a second transistor, the layer in which the second transistor is provided is the upper layer of the layer in which the first transistor is provided, and the first transistor and the second transistor have an overlapping region, and it is a display device.

[0013] One aspect of the present invention has a pixel circuit and a drive circuit provided in a display portion, and the drive circuit has a plurality of pulse output circuits, the pulse output circuit has a function of driving a gate line, and the pixel circuit is electrically connected to the gate line, the pulse output circuit has a first transistor, the pixel circuit has a second transistor, the layer in which the second transistor is provided is the upper layer of the layer in which the first transistor is provided, and the first transistor and the second transistor have an overlapping region, and the conductive layer functioning as a gate line is provided in the same layer as the layer in which the first transistor is provided, and it is a display device.

[0014] In one aspect of the present invention, the first transistor and the second transistor are preferably unipolar display devices.

[0015] In one aspect of the present invention, the channel formation regions of the first transistor and the second transistor preferably have a metal oxide in a display device. In one aspect of the present invention, the pixel circuit has a first display element, and the first display element preferably has a function of emitting visible light or a function of transmitting visible light in a display device.

[0016] In one aspect of the present invention, the pixel circuit has a first display element, and the first display element preferably has a function of emitting visible light or a function of transmitting visible light in a display device. In one aspect of the present invention, the pixel circuit has a first display element, and the first display element preferably has a function of emitting visible light or a function of transmitting visible light in a display device.

[0017] In one aspect of the present invention, the pixel circuit further has a second display element, and the second display element preferably has a function of reflecting visible light in a display device. In one aspect of the present invention, the pixel circuit further has a second display element, and the second display element preferably has a function of reflecting visible light in a display device.

[0018] In one aspect of the present invention, the pixel circuit further has a third transistor, and the third transistor is preferably provided in the same layer as the layer in which the first transistor is provided in a display device. In one aspect of the present invention, the pixel circuit further has a third transistor, and the third transistor is preferably provided in the same layer as the layer in which the first transistor is provided in a display device. In one aspect of the present invention, the pixel circuit further has a third transistor, and the third transistor is preferably provided in the same layer as the layer in which the first transistor is provided in a display device.

[0019] Note that in this specification, a display device may include a module in which a connector, for example, an FPC (Flexible Printed Circuit) or a TCP (Tape Carrier Package) is attached to a display element, a module in which a printed wiring board is provided at the tip of the TCP, or a module in which an IC (integrated circuit) is directly mounted on a substrate on which a display element is formed by a COG (Chip On Glass) method. Note that in this specification, a display device may include a module in which a connector, for example, an FPC (Flexible Printed Circuit) or a TCP (Tape Carrier Package) is attached to a display element, a module in which a printed wiring board is provided at the tip of the TCP, or a module in which an IC (integrated circuit) is directly mounted on a substrate on which a display element is formed by a COG (Chip On Glass) method. Note that in this specification, a display device may include a module in which a connector, for example, an FPC (Flexible Printed Circuit) or a TCP (Tape Carrier Package) is attached to a display element, a module in which a printed wiring board is provided at the tip of the TCP, or a module in which an IC (integrated circuit) is directly mounted on a substrate on which a display element is formed by a COG (Chip On Glass) method. Note that in this specification, a display device may include a module in which a connector, for example, an FPC (Flexible Printed Circuit) or a TCP (Tape Carrier Package) is attached to a display element, a module in which a printed wiring board is provided at the tip of the TCP, or a module in which an IC (integrated circuit) is directly mounted on a substrate on which a display element is formed by a COG (Chip On Glass) method. Note that in this specification, a display device may include a module in which a connector, for example, an FPC (Flexible Printed Circuit) or a TCP (Tape Carrier Package) is attached to a display element, a module in which a printed wiring board is provided at the tip of the TCP, or a module in which an IC (integrated circuit) is directly mounted on a substrate on which a display element is formed by a COG (Chip On Glass) method.

Advantages of the Invention

[0020] One aspect of the present invention can provide a display device with a narrow bezel. Or, it can provide a display device that improves the degree of freedom in design. Or, it can provide a display device having a pixel circuit that can enhance the definition. Or, it can avoid the complication of circuit design. One aspect of the present invention can provide a display device with a narrow bezel. Or, it can provide a display device that improves the degree of freedom in design. Or, it can provide a display device having a pixel circuit that can enhance the definition. Or, it can avoid the complication of circuit design. One aspect of the present invention can provide a display device with a narrow bezel. Or, it can provide a display device that improves the degree of freedom in design. Or, it can provide a display device having a pixel circuit that can enhance the definition. Or, it can avoid the complication of circuit design. A display device can be provided. Or, a display device with low power consumption can be provided. Or, a novel display device can be provided. Or, an electronic device including the above display device (display panel) can be provided. Or, a novel electronic device can be provided.

[0021] Note that the description of these effects does not prevent the existence of other effects. Note that one aspect of the present invention does not necessarily have all of these effects. Note that other effects will be apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other effects from the description in the specification, drawings, claims, etc.

Brief Description of the Drawings

[0022]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Figure 16

Figure 17

Figure 18

Figure 19

Figure 20

Mode for Carrying Out the Invention

[0023] Embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments shown below. Moreover, in the configuration of the invention described below, the same reference numerals are commonly used among different drawings for the same part or parts having the same or similar functions, and the repeated description thereof will be omitted. Also, when referring to the same function, the hatch pattern may be the same, and there may be cases where no particular reference numeral is attached. In addition, in each of the figures described in this specification, the size of each component, the thickness of a layer, or a region may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale. Note that ordinal numbers such as "first" and "second" in this specification and the like are attached to avoid confusion of components and are not numerically limiting.

[0024]

[0025]

[0026] ​

[0027] (Embodiment 1) A display device according to one aspect of the present invention includes, in a display unit, a layer having transistors constituting a pixel circuit and a layer having transistors constituting a driving circuit, which are provided in a stacked manner. In the upper layer transistors constituting the pixel circuit are arranged, and in the lower layer, transistors constituting a gate driver which is a driving circuit are arranged. By arranging the gate driver provided at the frame portion in the lower layer of the display unit the degree of freedom in design such as narrow bezel can be increased. Also, by arranging transistors that will be pixel circuits in the upper layer of the display unit it is possible to design by repeating pixel circuits with the same circuit arrangement therefore, it is possible to avoid complication of the circuit design.

[0028] <Configuration Example of Display Device> The configuration of the display device will be described with reference to the drawings.

[0029] FIG. 1(A) is a diagram for explaining the configuration of the display device. The display device 11 includes a driving circuit 91, a display unit 92, and a driving circuit 93. The display unit 92 includes a plurality of pixel circuits 94 and display elements. Note that the pixel circuit 94 and the display element may be collectively referred to as a pixel.

[0030] The driving circuit 91 includes a plurality of pulse output circuits. The driving circuit 91 receives a gate clock signal GCK and a gate start pulse GSP from the driving circuit 93. The driving circuit 9 1 functions as a gate line driving circuit. In FIG. 1(A), pulse output circuits 91_1 to 91_4 are shown as an example of the plurality of pulse output circuits . The pulse output circuits 91 _1 to 91_4 function as shift registers and output scanning signals to the pixel circuits 94 via gate lines GL_1 to GL_4 .

[0031] The pulse output circuits 91_1 to 91_4 included in the drive circuit 91 each have a plurality of transistors. The transistors included in the drive circuit 91 are composed of transistors of a single polarity, such as a shift register circuit.

[0032] The drive circuit 93 is an integrated circuit having functions as a source line drive circuit and a display controller. The drive circuit 93 outputs a gate clock signal GCK and a gate start pulse GSP to the drive circuit 91, and has a function of outputting image data D to the pixel circuit 94 via a source line (not shown). V

[0033] The pixel circuit 94 is a circuit for controlling the voltage or current applied to the display element according to the voltage of the image data. The display element is an element capable of controlling gradation according to voltage or current, such as a liquid crystal element or an EL display element.

[0034] The pixel circuit 94 has a plurality of transistors. The transistors included in the pixel circuit are composed of transistors of a single polarity, similar to circuits such as a shift register.

[0035] FIG. 1(B) is a diagram for explaining the stacked structure of the display device 11 in FIG. 1(A). In the display device 11, a layer 101 having transistors constituting the drive circuit 91, a layer 102 having transistors constituting the pixel circuit 94, and a layer 103 having display elements are stacked and provided.

[0036] FIG. 1(C) is a diagram in which the configuration shown in FIG. 1(A) of the display device 11 reflects the stacked structure in FIG. 1(B). In FIG. 1(C), the x direction, y direction, and z direction are shown in the figure. ​​​​​​​​​​​ is shown. The x-direction is parallel to the gate lines GL_1 to GL_4 as shown in FIG. 1(C). The y-direction is parallel to the source line. The z-direction is perpendicular to the plane defined by the x-direction and the y-direction as shown in FIG. 1(C).

[0037] In FIG. 1(C), a layer 101 having transistors constituting the drive circuit 91 and a layer 102 having transistors constituting the pixel circuit 94 are shown. The layer 101 has pulse output circuits 91_1 to 91_4. The layer 102 has the pixel circuit 94 and the gate lines GL_1 to GL_4. Although the drive circuit 93 is shown in FIG. 1(C), it is preferably provided in a layer different from the layer 101 and the layer 102.

[0038] As described with reference to FIGS. 1(A) to 1(C), in the display device 11 according to one aspect of the present invention, in the display unit 92 having the pixel circuit 94, the layer 102 having the transistors constituting the pixel circuit 94 and the layer 101 having the transistors constituting the drive circuit 91 having the pulse output circuits 91_1 to 91_4 are stacked. With this configuration, the drive circuit 91 that functions as a gate driver provided in the frame portion is disposed below the display unit 92, so that the degree of freedom in design such as narrow bezel can be increased. Also, by disposing the transistors that become the pixel circuit 94 in the upper layer of the display unit 92, the pixel circuit 94 having the same circuit layout can be repeated, so that it is possible to avoid complication of the circuit design.

[0039] In FIGS. 1(A) and 1(C), pulse output circuits 91_1 to 91_4 are shown as the pulse output circuits included in the drive circuit 91, but other configurations may be used. ​​​​​​​​​​​​​

[0040] For example, as shown in FIG. 2(A), the display unit 92 has a drive circuit 91A, and pixel circuits (not shown) are stacked and provided. The drive circuit 91A has pulse output circuits 91_1 to 91_n+2 (n is a natural number). The drive circuit 91A is supplied with a gate clock signal GCK_A, GCK_B, a gate start pulse GSP, and a potential VSS. The output signals of the pulse output circuits 91_1 to 91_n are respectively output as scan signals to gate lines GL_1 to GL_n. The output signals of the pulse output circuits 91_n+1 and 91_n+2 are signals for resetting the previous-stage pulse output circuits. Or, for example, as shown in FIG. 2(B), the display unit 92 may have a configuration including a drive circuit 91A and a drive circuit 91B having a different number of pulse output circuits from the drive circuit 91A. The drive circuits 91A and 91B are stacked and provided with pixel circuits (not shown) in the display unit 92. The drive circuit 91A is supplied with a gate clock signal GCK_A, GCK_B, a gate start pulse GSP, and a potential VSS. The output signals of the pulse output circuits 91_1 to 91_n are respectively output as scan signals to gate lines GLA_1 to GLA_n. The output signals of the pulse output circuits 91_n+1 and 91_n+2 are signals for resetting the previous-stage pulse output circuits. The drive circuit 91B has pulse output circuits 91_1 to 91_s+2 (s is a natural number). The drive circuit 91B is supplied with a gate clock signal GCK_A, GCK_B, a gate start pulse GSP, and a potential VSS. The output signals of the pulse output circuits 91_1 to 91_n are respectively output as scan signals to gate lines GL_1 to GL_n. The output signals of the pulse output circuits 91_n+1 and 91_n+2 are signals for resetting the previous-stage pulse output circuits. Or, for example, as shown in FIG. 2(B), the display unit 92 may have a configuration including a drive circuit 91A and a drive circuit 91B having a different number of pulse output circuits from the drive circuit 91A. The drive circuits 91A and 91B are stacked and provided with pixel circuits (not shown) in the display unit 92.

[0041] The drive circuit 91A is supplied with a gate clock signal GCK_A, GCK_B, a gate start pulse GSP, and a potential VSS. The output signals of the pulse output circuits 91_1 to 91_n are respectively output as scan signals to gate lines GLA_1 to GLA_n. The output signals of the pulse output circuits 91_n+1 and 91_n+2 are signals for resetting the previous-stage pulse output circuits. The drive circuit 91B has pulse output circuits 91_1 to 91_s+2 (s is a natural number). The drive circuit 91B is supplied with a gate clock signal GCK_A, GCK_B, a gate start pulse GSP, and a potential VSS. The output signals of the pulse output circuits 91_1 to 91_n are respectively output as scan signals to gate lines GL_1 to GL_n. The output signals of the pulse output circuits 91_n+1 and 91_n+2 are signals for resetting the previous-stage pulse output circuits.

[0042] The drive circuit 91A is supplied with a gate clock signal GCK_A, GCK_B, a gate start pulse GSP, and a potential VSS. The output signals of the pulse output circuits 91_1 to 91_n are respectively output as scan signals to gate lines GLA_1 to GLA_n. The output signals of the pulse output circuits 91_n+1 and 91_n+2 are signals for resetting the previous-stage pulse output circuits. The drive circuit 91B has pulse output circuits 91_1 to 91_s+2 (s is a natural number). The drive circuit 91B is supplied with a gate clock signal GCK_A, GCK_B, a gate start pulse GSP, and a potential VSS. The output signals of the pulse output circuits 91_1 to 91_n are respectively output as scan signals to gate lines GLA_1 to GLA_n. The output signals of the pulse output circuits 91_n+1 and 91_n+2 are signals for resetting the previous-stage pulse output circuits. The output signals of the pulse output circuits 91_1 to 91_n are respectively output as scan signals to gate lines GL_1 to GL_n. The output signals of the pulse output circuits 91_n+1 and 91_n+2 are signals for resetting the previous-stage pulse output circuits.

[0043] The drive circuit 91B has pulse output circuits 91_1 to 91_s+2 (s is a natural number). The drive circuit 91B is supplied with a gate clock signal GCK_A, GCK_B, a gate start pulse GSP, and a potential VSS. The source GSP and the potential VSS are provided. The output signals of the pulse output circuits 91_1 to 91_s are respectively output as scanning signals to the gate lines GLB_1 to GLB_s. The pulse output signals of the circuits 91_s + 1 and 91_s + 2 become signals for resetting the previous-stage pulse output circuit.

[0044] Fig. 3 is a diagram reflecting the configuration of the display unit 92 having the drive circuits 91A and 91B shown in Fig. 2(B) with the stacked structure of Fig. 1(B) in the same manner as Fig. 1(C).

[0045] In Fig. 3, a layer 101 having the transistors of the pulse output circuits 91_1 to 91_n + 2 and the transistors of the pulse output circuits 91_1 to 91_s + 2, and a layer 102 having the transistors constituting the pixel circuit 94 are illustrated. Note that in Fig. 3, the drive circuit 93 shown in Fig. 1(C) is omitted from the illustration.

[0046] As shown in Fig. 3, by varying the number of pulse output circuits of the drive circuits 91A and 91B shown in Fig. 2(B), the number of pixels in the y direction can be made different. Therefore, the degree of freedom in the shape of the display unit can be increased.

[0047] In the configuration shown in Fig. 1(C), the gate lines GL_1 to GL_4 are illustrated as being provided in the layer 102, but it may be configured to be arranged in the layer 101 as shown in Fig. 4(A). Also, in the configuration shown in Fig. 1(C), the pixel circuit 94 is illustrated as being provided in the layer 102, but it may be configured such that a part of the pixel circuit 94B is arranged in the layer 101 as shown in Fig. 4(B).

[0048] ​​​​​As described above, in the display device according to one embodiment of the present invention, a pixel circuit is formed in a display portion. A layer having a transistor constituting a driver circuit and a layer having a transistor constituting a driver circuit are stacked. The upper layer is provided with transistors that constitute the pixel circuits, and the lower layer is provided with the driver circuits. The transistors that make up the gate driver are placed. The gate driver is placed in the frame area. By placing it under the display unit, it is possible to increase the degree of freedom in design, such as by making the frame narrower. In addition, by arranging the transistors that form the pixel circuits on the upper layer of the display, pixels with the same circuit layout can be Since the circuit can be designed by repeating the circuit, it is possible to avoid the circuit design becoming complicated. do.

[0049] <Pixel circuit configuration example> 5A to 5C show an example of a pixel circuit. The pixel circuit is illustrated together with the display element.

[0050] FIG. 5A is an example of a pixel circuit in which the display element is a liquid crystal element. A transistor M1, a capacitance element C1, a liquid crystal element LC, a common electrode COM, a source line SL, and The gate lines GL are also shown.

[0051] FIG. 5B is an example of a pixel circuit in which a display element is a light-emitting element. Transistor M1, transistor M2, capacitance element C1, light-emitting element EL, anode line anod e, the cathode line, the source line SL, and the gate line GL are shown.

[0052] FIG. 5C is an example of a pixel circuit that uses a display element as a light-emitting element, which is different from FIG. 5B. In FIG. 5C, a transistor M1, a transistor M2, a transistor M3, a capacitance element Sub C1, light-emitting element EL, anode line anode, cathode line cathode, monitor line ML, source line SL, and gate line GL are illustrated.

[0053] <Configuration example of drive circuit> Figures 6(A) to (C) illustrate an example of a drive circuit, a pulse output circuit, and a timing chart. are illustrated.

[0054] Figure 6(A) is an example of a shift register included in the drive circuit. In Figure 6(A), pulse output circuits SR_1 to SR_n+2, a wiring for supplying a gate clock signal GCK_A, a wiring for supplying a gate clock signal GCK_B, and a wiring for supplying a gate start pulse GSP are illustrated. Note that the wiring between the pulse output circuits SR_1 and SR_2 is connected to the gate line GL. The output signals of the pulse output circuits SR_n+1 and SR_n+2 serve as signals for resetting the previous-stage pulse output circuit.

[0055] Figure 6(B) is an example of the circuit configuration of a pulse output circuit SR applicable to the pulse output circuits SR_1 to SR_n+2 shown in Figure 6(A). The pulse output circuit SR shown in Figure 6(B) has transistors M11 to M14 and a capacitor element C11. Also, in Figure 6(B), as signals and voltages applied to the respective transistors, a gate clock signal GCK_A, a gate clock signal GCK_B, an output signal GL, a gate start pulse GSP (or the output signal Former GL of the previous pulse output circuit SR), the output signal Next GL of the next pulse output circuit SR, and a voltage VSS are illustrated. Also, in Figure 6(B), the nodes connected to the transistors M11, M12, M13, and the capacitor element C11 are illustrated as netA. ​​​​

[0056] FIG. 6C is a timing chart for explaining the operation of the pulse output circuit SR shown in FIG. 6B. At time T1 in FIG. 6(C), GCK_A is at a low level and GCK_B is at high level, and at this time GSP is set to high level, increasing the voltage of netA. Next, at time T2, since GSP is at a low level, netA becomes floating. At time T2, GCK_A is at high level and GCK_B is at low level, so the floating The voltage of netA, which is the input, rises due to the capacitive coupling of the capacitive element C11. The transistor M13 is turned on, and GL goes high. At time T3, Nex When GL goes high, netA goes low and GCK_B goes high. When this happens, GL goes low.

[0057] <Example of stacking of pixel circuits and driving circuits> FIG. 7 shows a structure in which the pixel circuit of FIG. 5(B) and the pulse output circuit of FIG. 6(B) are stacked. The circuit symbols are used to illustrate the configuration example. In FIG. 7, the x-axis direction is the same as in FIG. 1(C). In FIG. 7, the layer 10 described in FIG. 1(B) is A pulse output circuit, a pixel circuit, and a light-emitting element which is a display element are provided corresponding to layers 1 to 103. Illustrated.

[0058] The pixel circuits of the layer 102 provided above the layer 101 are arranged in the y direction as shown in FIG. That is, the gate lines GL are spaced apart (G Pitch), and the x-direction, i.e., the source line The wiring pitch (S pitch) of the layer 101 is SL. As shown in FIG. 7, the pitch (G Pitch) of the gate lines GL is set in the y direction. Although there is a limitation in the y direction, there is no limitation in the x direction. Therefore, the degree of freedom in designing the placement of the drive circuit including the pulse output circuit can be increased. Also, since any pixel circuit provided in layer 102 can have the same circuit configuration, the circuit design can be facilitated as compared with the case where different types of circuit configurations are mixed. Also, in FIG. 8, a configuration example when the pixel circuit of FIG. 5(C) and the pulse output circuit of FIG. 6(B) are stacked is illustrated using circuit symbols. In FIG. 8, similar to FIG. 7, the x direction, y direction, and z direction are illustrated. In FIG. 8, similar to FIG. 7, a pulse output circuit, a pixel circuit, and a light-emitting element which is a display element corresponding to layers 101 to 103 described in FIG. 1(B) are illustrated.

[0059] As a difference between the diagram shown in FIG. 8 and FIG. 7, the transistor M3 and the metal line ML constituting the pixel circuit are provided in layer 101. As described above, in the configuration of one aspect of the present invention, the pulse output circuit of layer 101 is provided at the line interval (G Pitch) of the y direction, that is, the gate line GL, and there is no limitation in the x direction. Therefore, it is also possible to provide a circuit other than the pulse output circuit, for example, a part of the pixel circuit. Since the number of transistors in layer 102 can be reduced, the area of the pixel circuit can be reduced, and a high-definition display device can be achieved.

[0060] In FIG. 9(A), a top view of the pulse output circuit of FIG. 6(B) is shown. In FIG. 9(B), a top view of the pixel circuit of FIG. 5 (B) is shown. In FIGS. 9(A) and (B), FIGS. 5(B) and 6( B) are shown.

[0061] (B) are shown. ​​​​​​For the corresponding configurations in (B), the same reference numerals are used for illustration. Also, in FIGS. 9(A) and ( B), the x-direction and y-direction indicated in FIG. 1(C) are shown.

[0062] In FIGS. 9(A) and (B), the conductive layer 401 represents a layer provided in the same layer as the gate electrode of the transistor. Also, the conductive layer 402 represents a layer provided in the same layer as the source electrode or drain electrode of the transistor. Further, in FIGS. 9(A) and (B), the semiconductor layer 4 03 represents a layer provided in the same layer as the semiconductor layer of the transistor. Also, in FIGS. 9(A) and (B ), the opening 404 represents an opening for connecting the conductive layer 401 and the conductive layer 402. Also, in FIG. 9(B), the opening 405 represents an opening for connecting the conductive layer 402 and a light-emitting element EL in the upper layer 103. ) represents an opening for connecting the conductive layer 401 and the conductive layer 402. In FIG. 10, a diagram is shown in which a layer 102 having a top view of the pixel circuit of FIG. 5(B) shown in FIG. 9(B) is overlaid on a layer 1 01 having a top view of the pulse output circuit of FIG. 6(B) shown in FIG. 9(A). In FIG. 10, for the corresponding configurations in FIGS. 9(A) and (B), the same reference numerals are used for illustration. Also, in FIG. 10, the x-direction, y-direction, and z

[0063] direction indicated in FIG. 1(C) are shown. As shown in FIG. 10, the pixel circuit in the layer 102 is connected to the gate line GL of the layer 101 through the opening 406A and the opening 4 06B. Since the pixel circuits having the opening 406A and the opening 406B can have the same circuit design, they can be designed without complicating the connection relationship. Also, as shown in FIG. 10, the pixel circuit in the layer 102 is connected to the gate line GL of the layer 101 through the opening 406A and the opening 406B. Since the pixel circuits having the opening 406A and the opening 406B can have the same circuit design, they can be designed without complicating the connection relationship. direction are shown.

[0064] As shown in FIG. 10, the pixel circuit in the layer 102 is connected to the gate line GL of the layer 101 through the opening 406A and the opening 4 06B. The pixel circuits having the opening 406A and the opening 406B can have the same circuit design, so they can be designed without complicating the wiring relationship. can be designed without complicating the connection relationship. Also, as shown in FIG. 10, the pixel circuit in the layer 102 Each element such as a transistor included is provided overlapping each element such as a transistor included in the pulse output circuit in layer 101.

[0065] <Configuration Example of Transistors Provided in Different Layers> FIG. 11 shows an example of a top view for explaining a stacked structure of transistors included in the drive circuit 91 and transistors included in the pixel circuit 94, which are provided in different layers. Also, FIG. 12(A) shows a cross-sectional view taken along Y1 - Y2 shown in FIG. 11, and FIG. 12(B) shows a cross-sectional view taken along X1 - X2 shown in FIG. 11. Note that, for clarity, some insulating layers and the like are omitted from the illustration or the reference numerals are omitted.

[0066] As the transistors included in the drive circuit 91 provided in layer 101, transistors 61 and 71a are shown. Transistor 61 has a gate electrode 63, a gate insulating film 69, a semiconductor layer 62, a source electrode 64, and a drain electrode 65. Transistor 71a has a gate electrode 73a, a gate insulating film 79a, a semiconductor layer 72a, a source electrode 75a, and a drain electrode 74a.

[0067] Also, as the transistors included in the pixel circuit 94 provided in layer 102, transistor 71b is shown. Transistor 71b has a gate electrode 73b, a gate insulating film 79b, a semiconductor layer 72b, a source electrode 75b, and a drain electrode 74b.

[0068] Although transistors 71a and 71b are shown as having the same size, they may be transistors of different sizes.

[0069] Note that the transistors are not limited to the bottom gate type and may be the top gate type. Or, ​​​​​​​​​​​​It may also be a dual-gate type in which gate electrodes are arranged above and below the conductor layer. Dual-gate type In the transistor of, it may be configured to apply the same potential from both gate electrodes, or different potentials such as a potential for controlling the threshold voltage or a potential for increasing the on-current may be applied.

[0070] Note that a configuration in which the planarization film 25 provided between the transistor 71a and the transistor 71b is omitted may also be used.

[0071] The gate electrode 73a of the transistor 71a is electrically connected to the drain electrode 65 of the transistor 61 and the gate electrode 73b of the transistor 71b at the connection portion 66. Here, in FIG. 12(B), a configuration having a conductive layer 77 that can be provided in the same process as the source electrode 75b and the drain electrode 74b is illustrated, but a configuration without providing the conductive layer 77 may also be used.

[0072] By using the above configuration, in the display unit, a layer having a transistor constituting the pixel circuit and a layer having a transistor constituting the drive circuit can be stacked and provided. Transistors can be arranged in the upper layer to constitute the pixel circuit, and transistors can be arranged in the lower layer to constitute the gate driver, which is the drive circuit. Since there is no limitation on the arrangement of drive circuits such as gate drivers, a display device with a narrow bezel can be formed.

[0073] For semiconductor devices such as transistors used in the pixel circuit and the drive circuit of the display device, it is preferable to apply an oxide semiconductor using a metal oxide for the semiconductor layer. The oxide ​​​​​​​​​As the semiconductor, for example, CAC-OS (Cloud-Aligned Co mposite-Oxide Semiconductor) described later can be used. .

[0074] In particular, it is preferable to apply an oxide semiconductor having a larger band gap than silicon. When using a semiconductor material that has a wider band gap and a lower carrier density than silicon, the current in the off state of the transistor can be reduced.

[0075] Also, due to the low off-current, the charge accumulated in the capacitor via the transistor can be held over a long period of time. By applying such a transistor to a pixel, it becomes possible to stop the drive circuit while maintaining the gradation of the image displayed on each display unit. As a result, an electronic device with extremely low power consumption can be realized.

[0076] In addition, a polycrystalline semiconductor may be used for semiconductor devices such as the transistors used in each pixel provided in the display device 11 and each drive circuit. For example, it is preferable to use polycrystalline silicon. Polycrystalline silicon can be formed at a lower temperature compared to single-crystalline silicon and has a higher field-effect mobility and higher reliability compared to amorphous silicon. By applying such a polycrystalline semiconductor to a pixel, the aperture ratio of the pixel can be improved. Also, even when there are extremely many pixels, it becomes possible to form the gate drive circuit and the source drive circuit on the same substrate as the pixel,

[0077] This embodiment may be appropriately combined with at least a part of other embodiments They can be implemented in combination.

[0078] (Embodiment 2) In this embodiment, a display device that can be used in one aspect of the present invention, and the driving method of the display device will be described.

[0079] The display device according to one aspect of the present invention has pixels provided with a first display element that reflects visible light or can have pixels provided with a second display element that emits visible light. Or can have pixels provided with a third display element that transmits visible light. Or can have pixels provided with a first display element and a second or third display element.

[0080] In this embodiment, a display device having a first display element that reflects visible light and a second display element that emits visible light will be described.

[0081] The display device has a function of displaying an image by either one or both of the first light reflected by the first display element and the second light emitted by the second display element. Or, the display device has a function of expressing gradation by controlling the light amount of the first light reflected by the first display element and the light amount of the second light emitted by the second display element, respectively.

[0082] Further, the display device preferably has a configuration including a first pixel that expresses gradation by controlling the light amount of the reflected light of the first display element, and a second pixel that expresses gradation by controlling the light amount of the light emitted from the second display element. The first pixel and the second pixel are, for example, arranged in a plurality in a matrix form, respectively, to constitute a display unit.

[0083] Also, the first pixel and the second pixel preferably have the same number and the same pitch and are arranged within the display unit. Thereby, as will be described later, an image displayed only by a plurality of first pixels, an image displayed only by a plurality of second pixels, and an image displayed by both a plurality of first pixels and a plurality of second pixels can each be displayed on the same display unit.

[0084] As the first display element included in the first pixel, an element that reflects external light for display can be used. Since such an element does not have a light source, it is possible to extremely reduce the power consumption during display.

[0085] Typically, a reflective liquid crystal element can be used as the first display element. Alternatively, as the first display element, in addition to a shutter-type MEMS (Micro Electro Mechanical System) element and a MEMS element using an optical interference method, an element applied with a microcapsule method, an electrophoresis method, an electro-wetting method, an electronic powder fluid (registered trademark) method, etc. can be used. 1 hanical System) element, an optical interference method MEMS element, and other elements applied with a microcapsule ule method, an electrophoresis method, an electro-wetting method, an electronic powder fluid (registered trademark) method, etc.

[0086] The second display element included in the second pixel has a light source, and an element that uses the light from the light source for display can be used. In particular, it is preferable to use an electroluminescent element that can extract light from a light-emitting substance by applying an electric field. Since the light emitted by such a pixel is not affected by the external light in terms of its luminance and chromaticity, high color reproducibility (a wide color gamut) and high contrast, that is, vivid display can be achieved.

[0087] For the second display element, for example, a self-luminous light-emitting element such as an OLED (Organic Light Emitting Diode), an LED (Light Emitting Diode), a QLED ( Quantum-dot Light Emitting Diode), or a semiconductor laser can be used. Alternatively, as the display element included in the second pixel, a combination of a backlight that is a light source and a transmissive liquid crystal element that controls the amount of transmitted light of the light from the backlight may be used.

[0088] The first pixel can have a configuration including, for example, a sub-pixel that exhibits white (W), or sub-pixels that respectively exhibit light of three colors, for example, red (R), green (G ), and blue (B). Further, similarly, the second pixel can also have a configuration including, for example, a sub-pixel that exhibits white (W), or sub-pixels that respectively exhibit light of three colors, for example, red (R), green (G), and blue (B). Note that the sub-pixels included in the first pixel and the second pixel may each have four or more colors. The larger the number of types of sub-pixels, the more possible it is to reduce power consumption and improve color reproducibility.

[0089] One aspect of the present invention can switch between a first mode in which an image is displayed by the first pixel, a second mode in which an image is displayed by the second pixel, and a third mode in which an image is displayed by the first pixel and the second pixel.

[0090] The first mode is a mode in which an image is displayed using reflected light from the first display element. Since the first mode does not require a light source, it is a driving mode with extremely low power consumption. For example, it is effective when the illuminance of external light is sufficiently high and the external light is white light or light in the vicinity thereof. The first mode is a display mode suitable for displaying character information such as books and documents. Also, since reflected light is used, it is possible to perform eye-friendly display, and it has the effect of making the eyes less fatigued.

[0091] In the second mode, an image is displayed by using the light emission from the second display element. Therefore, regardless of the illuminance and chromaticity of external light, it is possible to perform extremely vivid (high contrast and high color reproducibility) display. For example, it is effective when the illuminance of external light is extremely small, such as at night or in a dark room. Also, when the external light is dark, if bright display is performed, the user may feel dazzled. To prevent this, in the second mode, it is preferable to perform display with suppressed brightness. Also, by doing so, in addition to suppressing glare, the power consumption can be reduced. The second mode is a mode suitable for displaying vivid images, smooth videos, etc.

[0092] In the third mode, display is performed by using both the reflected light from the first display element and the light emission from the second display element. Specifically, by mixing the light presented by the first pixel and the light presented by the second pixel adjacent to the first pixel, it is driven to express one color. It is possible to display a more vivid display than the first mode and suppress the power consumption more than the second mode. For example, it is effective when the illuminance of external light is relatively low, such as under indoor lighting or during morning or evening hours, or when the chromaticity of external light is not white. Also, by using the light obtained by mixing the reflected light and the emitted light, it is possible to display an image that gives the impression of looking at a painting.

[0093] Hereinafter, a more specific example of one aspect of the present invention will be described with reference to the drawings.

[0094] [Configuration Example of Display Device] FIG. 13(A) is a diagram for explaining a display device 11 according to one aspect of the present invention. The display device 11 has a layer 102 having transistors and a layer 101 having transistors. The display device 11 may also have a photometric unit that acquires the illuminance of external light or the like. In the following description the pixel circuit will be described as a pixel together with the display element.

[0095] The layer 102 has a plurality of pixels 45 arranged in a matrix. The pixel 45 has a first pixel 46 and a second pixel 47. The layer 101 has pulse output circuits 91_1 to 91_ 4.

[0096] In FIG. 13(A), an example is shown in which the first pixel 46 and the second pixel 47 each have display elements corresponding to the three colors of red (R), green (G), and blue (B).

[0097] The first pixel 46 has a display element 46R corresponding to red (R), a display element 46G corresponding to green (G), and a display element 46B corresponding to blue (B). The display elements 46R, 46G, 46B are each display elements that utilize the reflection of external light.

[0098] The second pixel 47 has a display element 47R corresponding to red (R), a display element 47G corresponding to green (G), and a display element 47B corresponding to blue (B). The display elements 47R, 47G, 47B are each display elements that utilize the light of a light source.

[0099] Further, as shown in FIG. 13(B), the layer 102 in which the pixel 45 is provided has transistors Alternatively, the layer 102 in which the pixels 45 are provided may be a layer 102a having the same structure as shown in FIG. As shown in FIG. 1C, a stack of multiple layers, including layers 102a and 102b, each having a transistor, is formed. It can be a layer.

[0100] In the case of FIG. 13C, one of the first pixel 46 and the second pixel 47 is provided in the layer 102a. In addition, the other of the first pixel 46 or the second pixel 47 may be provided on the layer 102b. At this time, the transistor (first transistor) of the first pixel 46 is a layer 10 2a, and the transistor (second transistor) included in the second pixel 47 The first transistor and the second transistor may be disposed on the layer 102b. By adopting such a structure, the occupied area of ​​the transistor can be reduced. This makes it easier to increase pixel density.

[0101] The above is a description of the configuration example of the display device.

[0102] [Pixel configuration example] Next, the pixel 45 will be described with reference to FIGS. 14(A), (B), and (C). 1A, 1B, and 1C are schematic diagrams showing examples of the configuration of a pixel 45.

[0103] The first pixel 46 has a display element 46R, a display element 46G, and a display element 46B. The element 46R reflects external light and outputs the red light included in the first gradation value input to the first pixel 46. The display element 46G emits red light R1 having a luminance according to the gradation value corresponding to the display surface. Similarly, the display element 46B also emits green light G1 or blue light B1 toward the display surface. Put out.

[0104] The second pixel 47 has display elements 47R, 47G, and 47B. The display element 47R has a light source and emits red light R2 with a brightness corresponding to the red tone value included in the second tone value input to the second pixel 47 toward the display surface side. The display elements 47G and 47B similarly emit green light G2 or blue light B2 toward the display surface side, respectively.

[0105] 〔Third mode〕 FIG. 14(A) shows an example of an operation mode in which both the display elements 46R, 46G, and 46B that reflect external light and the display elements 47R, 47G, and 47B that emit light are driven to display an image. As shown in FIG. 14(A), the pixel 45 can emit light 55 of a predetermined color toward the display surface side by mixing six lights: light R1, light G1, light B1, light R2, light G2, and light B2. At this time, it is preferable to keep the brightness of each of the display elements 47R, 47G, and 47B low. For example, when the maximum value of the brightness of the light that each of the display elements 47R, 47G, and 47B

[0106] can emit (also referred to as the maximum brightness) is set to 100%, the maximum value of the brightness of the light that each of the display elements 47R, 47G, and 47B emits in the third mode is preferably set to 5% or more and 50% or less, preferably 1% or more and 60% or less of the maximum brightness. This enables display with low power consumption and makes the displayed image more pictorial and enables an eye-friendly display.

[0107] 〔First mode〕 FIG. 14(B) shows an example of an operation mode in which the display elements 46R, 46G, and 46B that reflect external light are driven to display an image. As shown in FIG. 14(B), when the illuminance of external light is sufficiently high, for example, pixel 45 mixes only the light (light R1, light G1, and light B1) from the first pixel 46 without driving the second pixel 47, and thereby can emit light 55 of a predetermined color toward the display surface side. Thereby, it is possible to perform driving with extremely low power consumption. For example, when the illuminance of external light is sufficiently high, etc., pixel 45 can emit light 55 of a predetermined color toward the display surface side by mixing only the light (light R1, light G1, and light B1) from the first pixel 46 without driving the second pixel 47.

[0108] 〔Second Mode〕 FIG. 14(C) shows an example of an operation mode in which the display elements 47R, 47G, and 47B are driven to display an image. As shown in FIG. 14(C), when the illuminance of external light is extremely low, for example, pixel 45 can emit light 55 of a predetermined color toward the display surface side by mixing only the light (light R2, light G2, and light B2) from the second pixel 47 without driving the first pixel 46. Thereby, a vivid display can be performed. Also, by lowering the luminance when the illuminance of external light is low, the glare felt by the user can be suppressed and the power consumption can be reduced.

[0109] At this time, it is preferable to increase the luminance of the display element that emits visible light more than in the third mode. For example, in the second mode, the maximum value of the luminance of the light emitted by each of the display elements 47R, 47G, and 47B can be set to 100% of the maximum luminance, or 50% or more and 100% or less, preferably 60% or more and 100% or less. Thereby, a vivid image can be displayed even in a bright place with external light.

[0110] Here, the luminance of the light emitted by each of the display elements 47R, 47G, and 47B can be replaced with the dynamic range. That is, in the third mode the dynamic range of each of the display elements 47R, 47G, and 47B can be set narrower than that in the second mode. For example, the dynamic range of the third mode in the display element 47R, the display element 47G, or the display element 47B can be set to 5% or more and 50% or less, preferably 1% or more and 60% or less, of the dynamic range of the second mode .

[0111] The above is the description of the configuration example of the pixel 45.

[0112] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification .

[0113] (Embodiment 3) Hereinafter, an example of a display panel that can be used for a display device according to an aspect of the present invention will be described. The display panel exemplified below has both a reflective liquid crystal element and a light-emitting element, and is a display panel that can perform both transmissive mode and reflective mode displays .

[0114] [Configuration Example] FIG. 15(A) is a block diagram showing an example of the configuration of the display device 400. The display device 40 0 has a plurality of pixels 410 arranged in a matrix in the display unit 362. The display device 400 also has a circuit GD and a circuit SD. Further, it has a plurality of wirings G1, a plurality of wirings G2, a plurality of wirings ANO, and a plurality of wirings CSCOM that are electrically connected to a plurality of pixels 410 arranged in the direction R . Further, it has a plurality of pixels 410 arranged in the direction C and the circuit SD .​​​​ It has a plurality of wirings S1 and a plurality of wirings S2 that are electrically connected.

[0115] Here, for simplicity, a configuration having one circuit GD and one circuit SD each is shown. However, the circuit GD and circuit SD for driving the liquid crystal element and the circuit GD and circuit S D for driving the light-emitting element may be provided separately.

[0116] The pixel 410 has a reflective liquid crystal element and a light-emitting element. In the pixel 410, the liquid crystal element and the light-emitting element have overlapping portions with each other.

[0117] FIG. 15(B1) shows a configuration example of the conductive layer 311b included in the pixel 410. The conductive layer 311 b functions as a reflective electrode of the liquid crystal element in the pixel 410. Further, an opening 451 is provided in the conductive layer 311b.

[0118] In FIG. 15(B1), the light-emitting element 360 located in the region overlapping with the conductive layer 311b is shown by a dashed line. The light-emitting element 360 is disposed so as to overlap with the opening 451 included in the conductive layer 311b. Thereby, the light emitted from the light-emitting element 360 is emitted toward the display surface side through the opening 451.

[0119] In FIG. 15(B1), the pixels 410 adjacent in the direction R are pixels corresponding to different colors. At this time, as shown in FIG. 15(B1), in two pixels adjacent in the direction R, it is preferable that the openings 4 51 are provided at different positions of the conductive layer 311b so as not to be arranged in a row. Thereby, it is possible to separate the two light-emitting elements 360, and the phenomenon that the light emitted from the light-emitting element 360 enters the coloring layer included in the adjacent pixel 410 (also referred to as crosstalk) is prevented. In addition, by arranging two adjacent light emitting elements 360 apart from each other, Therefore, in the case where the EL layer of the light emitting element 360 is separately produced by using a shadow mask or the like, Even so, a high-definition display device can be realized.

[0120] Alternatively, the arrangement may be as shown in FIG.

[0121] If the ratio of the total area of ​​the openings 451 to the total area of ​​the non-openings is too large, The display becomes dark. Also, the ratio of the total area of ​​the openings 451 to the total area of ​​the non-openings If the value is too small, the display using the light emitting element 360 will be too dark.

[0122] In addition, the area of ​​the opening 451 provided in the conductive layer 311b functioning as a reflective electrode is too small. As a result, the efficiency of light that can be extracted from the light emitted by the light emitting element 360 decreases.

[0123] The shape of the opening 451 may be, for example, a polygon, a rectangle, an ellipse, a circle, a cross, or the like. The shape may also be thin stripes, slits, or a checkered pattern. The apertures 451 may be arranged close to adjacent pixels. The pixels are arranged close to the other pixels to be displayed, which helps to suppress crosstalk.

[0124] [Circuit configuration example] 16 is a circuit diagram showing a configuration example of a pixel 410. In FIG. 16, two adjacent pixels It shows 410.

[0125] The pixel 410 includes a switch SW1, a capacitance element C1, a liquid crystal element 340, a switch SW2, and a transistor. The pixel 410 includes a transistor M, a capacitance element C2, and a light emitting element 360. , wiring G1, wiring G2, wiring ANO, wiring CSCOM, wiring S1, and wiring S2 are electrically connected. Also, in FIG. 16, wiring VCO M1 that is electrically connected to the liquid crystal element 340, and wiring VCOM2 that is electrically connected to the light emitting element 360 are shown.

[0126] In FIG. 16, an example in the case where transistors are used for switch SW1 and switch SW2 is shown.

[0127] For switch SW1, the gate is connected to wiring G1, one of the source or drain is connected to wiring S1, and the other of the source or drain is connected to one electrode of the capacitor element C1 and one electrode of the liquid crystal element 340. For capacitor element C1, the other electrode is connected to wiring CSCO M. For liquid crystal element 340, the other electrode is connected to wiring VCOM1 .

[0128] Also, for switch SW2, the gate is connected to wiring G2, one of the source or drain is connected to wiring S2, and the other of the source or drain is connected to one electrode of the capacitor element C2 and the gate of the transistor M. For capacitor element C2, the other electrode is connected to one of the source or drain of transistor M and wiring ANO. For transistor M , the other of the source or drain is connected to one electrode of the light emitting element 360. For the light emitting element 360, the other electrode is connected to wiring VCOM2.

[0129] In FIG. 16, an example is shown in which transistor M has two gates sandwiching a semiconductor and these are connected together. Thereby, the current that transistor M can conduct can be increased.

[0130] A signal for controlling the switch SW1 to be in a conductive state or a non-conductive state can be applied to the wiring G1. A predetermined potential can be applied to the wiring VCOM1. A signal for controlling the alignment state of the liquid crystal of the liquid crystal element 340 can be applied to the wiring S1. A predetermined potential can be applied to the wiring CSC OM.

[0131] A signal for controlling the switch SW2 to be in a conductive state or a non-conductive state can be applied to the wiring G2. Potentials that cause a potential difference for the light-emitting element 360 to emit light can be applied to the wiring VCOM2 and the wiring ANO, respectively. A signal for controlling the conduction state of the transistor M can be applied to the wiring S2.

[0132] When the pixel 410 shown in FIG. 16 performs display in the reflection mode, for example, it can be driven by signals applied to the wiring G1 and the wiring S1, and display can be performed using optical modulation by the liquid crystal element 340. When display is performed in the transmission mode, it can be driven by signals applied to the wiring G2 and the wiring S2, and display can be performed by causing the light-emitting element 360 to emit light. Also, when driving in both modes, it can be driven by signals applied to each of the wiring G1, the wiring G2, the wiring S1, and the wiring S2.

[0133] In FIG. 16, an example in which one pixel 410 has one liquid crystal element 340 and one light-emitting element 360 is shown, but the present invention is not limited to this. FIG. 17(A) shows an example in which one pixel 410 has one liquid crystal element 340 and four light-emitting elements 360 (light-emitting elements 360r, 360g, 360b, 3 60w).

[0134] In FIG. 17(A), in addition to the example of FIG. 16, wiring G3 and wiring S3 are connected to pixel 410. are connected.

[0135] In the example shown in FIG. 17(A), for example, four light-emitting elements 360 can be used, each being a light-emitting element that exhibits red (R), green (G), blue (B), and white (W). Also, as the liquid crystal element 340, a reflective liquid crystal element that exhibits white can be used. As a result when performing display in the reflection mode, a white display with high reflectance can be performed. Also when performing display in the transmission mode, a display with high color rendering can be performed with low power.

[0136] Also, FIG. 17(B) shows a configuration example of pixel 410. Pixel 410 includes a light-emitting element 360w that overlaps with the opening of electrode 31 1, and light-emitting elements 360r, 360g, and 360b arranged around electrode 311. The light-emitting elements 360r, light-emitting element 360g, and light-emitting element 360b preferably have substantially the same light-emitting area. is preferred.

[0137] [Configuration Example of Display Panel] FIG. 18 is a perspective schematic view of a display panel 300 according to an aspect of the present invention. The display panel 300 has a configuration in which a substrate 351 and a substrate 361 are bonded together. In FIG. 18, substrate 361 is shown by a dashed line.

[0138] The display panel 300 includes a display unit 362, a circuit 364, wiring 365, etc. On the substrate 351 , for example, a circuit 364, wiring 365, and a conductive layer 311b that functions as a pixel electrode, etc. are provided. Also in FIG. 18, an IC 373 and an FPC 372 are mounted on the substrate 351. An example is shown. Therefore, the configuration shown in FIG. 18 can also be referred to as a display module having a display panel 300, an FPC 372, and an IC 373. and an IC 373.

[0139] The circuit 364 can use, for example, a circuit that functions as a scanning line driving circuit.

[0140] The wiring 365 has a function of supplying signals and power to the display unit and the circuit 364. The signals and power are input to the wiring 365 from the outside or from the IC 373 via the FPC 372.

[0141] In FIG. 18, an example is shown in which the IC 373 is provided on the substrate 351 by a COG (Chip On Glass) method or the like. The IC 373 can be an IC having a function as, for example, a scanning line driving circuit, or a signal line driving circuit. When the display panel 30 0 includes a circuit that functions as a scanning line driving circuit and a signal line driving circuit, or when a circuit that functions as a scanning line driving circuit or a signal line driving circuit is provided outside and signals for driving the display panel 300 are input via the FPC 372, the configuration may not include the IC 373. Also, the IC 373 may be mounted on the FPC 372 by a COF (Chip On Film) method or the like. the configuration may not include the IC 373. Also, the IC 373 may be mounted on the FPC 372 by a COF (Chip On Film) method or the like.

[0142] FIG. 18 shows an enlarged view of a part of the display unit 362. In the display unit 362, a conductive layer 311b included in a plurality of display elements is arranged in a matrix. The conductive layer 311b has a function of reflecting visible light and functions as a reflection electrode of a liquid crystal element 340 described later. elements is arranged in a matrix. The conductive layer 311b has a function of reflecting visible light and functions as a reflection electrode of a liquid crystal element 340 described later. elements is arranged in a matrix. The conductive layer 311b has a function of reflecting visible light and functions as a reflection electrode of a liquid crystal element 340 described later.

[0143] As shown in FIG. 18, the conductive layer 311b has openings. Further, above the conductive layer 311b On the side of the substrate 351, it has a light-emitting element 360. The light from the light-emitting element 360 is emitted to the side of the substrate 361 through the opening of the conductive layer 31 1b.

[0144] [Cross-sectional configuration example] FIG. 19 shows an example of a cross-section when a part of the region including the FPC 372, a part of the region including the circuit 36 4, and a part of the region including the display unit 362 of the display panel illustrated in FIG. 18 are each cut. is shown.

[0145] The display panel has an insulating layer 220 between the substrate 351 and the substrate 361. Also, between the substrate 35 1 and the insulating layer 220, there are a light-emitting element 360, a transistor 201a, a transistor 201 b, a transistor 205, a transistor 206, a transistor 207, a coloring layer 134, etc. are provided. Also, between the insulating layer 220 and the substrate 361, there are a liquid crystal element 340, a coloring layer 131, etc. are provided. Further, the substrate 361 and the insulating layer 220 are adhered via an adhesive layer 141, and the substrate 351 and the insulating layer 220 are adhered via an adhesive layer 142.

[0146] The transistor 206 is electrically connected to the liquid crystal element 340. Also, the transistor 20 5 is electrically connected to the transistor 207, and the transistor 207 is electrically connected to the light-emitting element 360. Since both the transistor 205 and the transistor 206 are formed on the surface of the insulating layer 220 on the side of the substrate 351, they can be manufactured using the same process. Also, since the transistor 207 is formed so as to overlap the transistor 205, the pixel size can be reduced. Note that the region where the gate electrode of the transistor 207 extends, the region where the gate insulating film extends, and the region where one of the source electrode or the drain electrode extends extends and the region where the other extends The capacitive element C2 can be formed in the area to be processed.

[0147] On the substrate 361, there are provided a coloring layer 131, a light-shielding layer 132, an insulating layer 121, and a conductive layer 113 that functions as a common electrode of the liquid crystal element 340, an alignment film 133b, an insulating layer 117, etc. On the substrate 361, there are provided a coloring layer 131, a light-shielding layer 132, an insulating layer 121, and a conductive layer 113 that functions as a common electrode of the liquid crystal element 340, an alignment film 133b, an insulating layer 117, etc. The insulating layer 117 functions as a spacer for maintaining the cell gap of the liquid crystal element 340. The insulating layer 117 functions as a spacer for maintaining the cell gap of the liquid crystal element 340.

[0148] On the substrate 351 side of the insulating layer 220, there are provided insulating layers such as an insulating layer 211a, an insulating layer 212a, an insulating layer 213a, an insulating layer 214a, an insulating layer 215, an insulating layer 211b, an insulating layer 212b, an insulating layer 213b, an insulating layer 214b, and an insulating layer 216. On the substrate 351 side of the insulating layer 220, there are provided insulating layers such as an insulating layer 211a, an insulating layer 212a, an insulating layer 213a, an insulating layer 214a, an insulating layer 215, an insulating layer 211b, an insulating layer 212b, an insulating layer 213b, an insulating layer 214b, and an insulating layer 216. On the substrate 351 side of the insulating layer 220, there are provided insulating layers such as an insulating layer 211a, an insulating layer 212a, an insulating layer 213a, an insulating layer 214a, an insulating layer 215, an insulating layer 211b, an insulating layer 212b, an insulating layer 213b, an insulating layer 214b, and an insulating layer 216.

[0149] A part of the insulating layer 211a functions as a gate insulating layer of the transistors 205 and 206. The insulating layers 212a, 213a, and 214a are provided to cover the transistors 205 and 206. The insulating layers 212a, 213a, and 214a are provided to cover the transistors 205 and 206.

[0150] A part of the insulating layer 211b functions as a gate insulating layer of the transistor 207. The insulating layers 212b, 213b, and 214b are provided to cover the transistor 207. A part of the insulating layer 211b functions as a gate insulating layer of the transistor 207. The insulating layers 212b, 213b, and 214b are provided to cover the transistor 207. A part of the insulating layer 211b functions as a gate insulating layer of the transistor 207. The insulating layers 212b, 213b, and 214b are provided to cover the transistor 207.

[0151] The insulating layers 214a and 214b have a function as a planarization layer. Here, the case where there are three insulating layers covering transistors and the like is shown, but it is not limited to this, and there may be four or more layers, or there may be a single layer or two layers. Also, if the insulating layers 214a and 214b that function as a planarization layer are not necessary, they may not be provided. Also, the case where an insulating layer 215 is provided between the insulating layer 214a and the insulating layer 211b is shown. Here, the case where there are three insulating layers covering transistors and the like is shown, but it is not limited to this, and there may be four or more layers, or there may be a single layer or two layers. Also, if the insulating layers 214a and 214b that function as a planarization layer are not necessary, they may not be provided. Also, the case where an insulating layer 215 is provided between the insulating layer 214a and the insulating layer 211b is shown. Here, the case where there are three insulating layers covering transistors and the like is shown, but it is not limited to this, and there may be four or more layers, or there may be a single layer or two layers. Also, if the insulating layers 214a and 214b that function as a planarization layer are not necessary, they may not be provided. Also, the case where an insulating layer 215 is provided between the insulating layer 214a and the insulating layer 211b is shown. Here, the case where there are three insulating layers covering transistors and the like is shown, but it is not limited to this, and there may be four or more layers, or there may be a single layer or two layers. Also, if the insulating layers 214a and 214b that function as a planarization layer are not necessary, they may not be provided. Also, the case where an insulating layer 215 is provided between the insulating layer 214a and the insulating layer 211b is shown. Here, the case where an insulating layer 215 is provided between the insulating layer 214a and the insulating layer 211b is shown. However, the insulating layer 215 may not be provided.

[0152] Also, a part of the transistors 205, 206, and 207 functions as a gate, a part functions as a source or a drain, and they have a conductive layer 221, a conductive layer 222, and a semiconductor layer 231.

[0153] The liquid crystal element 340 is a reflective liquid crystal element. The liquid crystal element 340 has a stacked structure in which a conductive layer 311a, a liquid crystal 112, and a conductive layer 113 are stacked. Also, a conductive layer 311b that reflects visible light is provided in contact with the substrate 351 side of the conductive layer 311a. The conductive layer 311b has an opening 251. Also, the conductive layer 311a and the conductive layer 113 contain a material that transmits visible light. Also, an alignment film 133a is provided between the liquid crystal 112 and the conductive layer 311a, and an alignment film 133b is provided between the liquid crystal 112 and the conductive layer 113. Also, a polarizing plate 130 is provided on the outer surface of the substrate 361.

[0154] In the liquid crystal element 340, the conductive layer 311b has a function of reflecting visible light, and the conductive layer 113 has a function of transmitting visible light. Light incident from the substrate 361 side is polarized by the polarizing plate 130, passes through the conductive layer 113 and the liquid crystal 112, and is reflected by the conductive layer 311b. Then, it passes through the liquid crystal 112 and the conductive layer 113 again and reaches the polarizing plate 130. At this time, the alignment of the liquid crystal is controlled by the voltage applied between the conductive layer 311b and the conductive layer 113, and the optical modulation of the light can be controlled. That is, the intensity of the light emitted through the polarizing plate 130 can be controlled. Also, light is absorbed by the coloring layer 131 except for light in a specific wavelength region, so that the light taken out becomes, for example, light that exhibits red color.​​​​​​​​​​​​​​

[0155] The light-emitting element 360 is a bottom emission type light-emitting element. The light-emitting element 360 has a stacked structure in which a conductive layer 191, an EL layer 192, and a conductive layer 193b are stacked in this order from the insulating layer 220 side. Also, a conductive layer 193a is provided covering the conductive layer 193b. The conductive layer 193b contains a material that reflects visible light, and the conductive layer 191 and the conductive layer 193a contain materials that transmit visible light. The light emitted by the light-emitting element 360 is emitted toward the substrate 361 side through the coloring layer 134, the insulating layer 220, the opening 251, the conductive layer 113, etc. layer structure. Also, a conductive layer 193a is provided covering the conductive layer 193b. The conductive layer 193b contains a material that reflects visible light, and the conductive layer 191 and the conductive layer 193a contain materials that transmit visible light. The light emitted by the light-emitting element 360 is emitted toward the substrate 361 side through the coloring layer 134, the insulating layer 220, the opening 251, the conductive layer 113, etc. Here, as shown in FIG. 19, it is preferable that a conductive layer 311a that transmits visible light is provided in the opening 251. Thereby, since the liquid crystal 112 is aligned in the region overlapping the opening 251 in the same manner as in the other regions, it is possible to suppress the occurrence of a defective alignment of the liquid crystal at the boundary of these regions and the leakage of unintended light. Here, as shown in FIG. 19, it is preferable that a conductive layer 311a that transmits visible light is provided in the opening 251. Thereby, since the liquid crystal 112 is aligned in the region overlapping the opening 251 in the same manner as in the other regions, it is possible to suppress the occurrence of a defective alignment of the liquid crystal at the boundary of these regions and the leakage of unintended light.

[0156] Here, as shown in FIG. 19, it is preferable that a conductive layer 311a that transmits visible light is provided in the opening 251. Thereby, since the liquid crystal 112 is aligned in the region overlapping the opening 251 in the same manner as in the other regions, it is possible to suppress the occurrence of a defective alignment of the liquid crystal at the boundary of these regions and the leakage of unintended light. Here, as shown in FIG. 19, it is preferable that a conductive layer 311a that transmits visible light is provided in the opening 251. Thereby, since the liquid crystal 112 is aligned in the region overlapping the opening 251 in the same manner as in the other regions, it is possible to suppress the occurrence of a defective alignment of the liquid crystal at the boundary of these regions and the leakage of unintended light. Here, as shown in FIG. 19, it is preferable that a conductive layer 311a that transmits visible light is provided in the opening 251. Thereby, since the liquid crystal 112 is aligned in the region overlapping the opening 251 in the same manner as in the other regions, it is possible to suppress the occurrence of a defective alignment of the liquid crystal at the boundary of these regions and the leakage of unintended light. Here, as shown in FIG. 19, it is preferable that a conductive layer 311a that transmits visible light is provided in the opening 251. Thereby, since the liquid crystal 112 is aligned in the region overlapping the opening 251 in the same manner as in the other regions, it is possible to suppress the occurrence of a defective alignment of the liquid crystal at the boundary of these regions and the leakage of unintended light.

[0157] Here, a linear polarizing plate may be used as the polarizing plate 130 disposed on the outer surface of the substrate 361, but a circular polarizing plate can also be used. As the circular polarizing plate, for example, a stacked product of a linear polarizing plate and a quarter-wave retardation plate can be used. Thereby, external light reflection can be suppressed. Also, depending on the type of the polarizing plate, by adjusting the cell gap, alignment, driving voltage, etc. of the liquid crystal element used for the liquid crystal element 340, a desired contrast can be realized. Here, a linear polarizing plate may be used as the polarizing plate 130 disposed on the outer surface of the substrate 361, but a circular polarizing plate can also be used. As the circular polarizing plate, for example, a stacked product of a linear polarizing plate and a quarter-wave retardation plate can be used. Thereby, external light reflection can be suppressed. Also, depending on the type of the polarizing plate, by adjusting the cell gap, alignment, driving voltage, etc. of the liquid crystal element used for the liquid crystal element 340, a desired contrast can be realized. Here, a linear polarizing plate may be used as the polarizing plate 130 disposed on the outer surface of the substrate 361, but a circular polarizing plate can also be used. As the circular polarizing plate, for example, a stacked product of a linear polarizing plate and a quarter-wave retardation plate can be used. Thereby, external light reflection can be suppressed. Also, depending on the type of the polarizing plate, by adjusting the cell gap, alignment, driving voltage, etc. of the liquid crystal element used for the liquid crystal element 340, a desired contrast can be realized. Here, a linear polarizing plate may be used as the polarizing plate 130 disposed on the outer surface of the substrate 361, but a circular polarizing plate can also be used. As the circular polarizing plate, for example, a stacked product of a linear polarizing plate and a quarter-wave retardation plate can be used. Thereby, external light reflection can be suppressed. Also, depending on the type of the polarizing plate, by adjusting the cell gap, alignment, driving voltage, etc. of the liquid crystal element used for the liquid crystal element 340, a desired contrast can be realized. Here, a linear polarizing plate may be used as the polarizing plate 130 disposed on the outer surface of the substrate 361, but a circular polarizing plate can also be used. As the circular polarizing plate, for example, a stacked product of a linear polarizing plate and a quarter-wave retardation plate can be used. Thereby, external light reflection can be suppressed. Also, depending on the type of the polarizing plate, by adjusting the cell gap, alignment, driving voltage, etc. of the liquid crystal element used for the liquid crystal element 340, a desired contrast can be realized. Here, a linear polarizing plate may be used as the polarizing plate 130 disposed on the outer surface of the substrate 361, but a circular polarizing plate can also be used. As the circular polarizing plate, for example, a stacked product of a linear polarizing plate and a quarter-wave retardation plate can be used. Thereby, external light reflection can be suppressed. Also, depending on the type of the polarizing plate, by adjusting the cell gap, alignment, driving voltage, etc. of the liquid crystal element used for the liquid crystal element 340, a desired contrast can be realized.

[0158] Also, an insulating layer 217 is provided on the insulating layer 216 covering the end portion of the conductive layer 191. The insulating layer 217 suppresses the insulating layer 220 and the substrate 351 from approaching each other more than necessary. Also, an insulating layer 217 is provided on the insulating layer 216 covering the end portion of the conductive layer 191. The insulating layer 217 suppresses the insulating layer 220 and the substrate 351 from approaching each other more than necessary. It has a function as a mask. Also, when forming the EL layer 192 and the conductive layer 193a using a shielding mask (metal mask), it may have a function of suppressing the contact of the shielding mask with the surface to be formed. Note that the insulating layer 217 may not be provided if it is unnecessary. When forming using a shielding mask (metal mask), it may have a function of suppressing the contact of the shielding mask with the surface to be formed. Note that the insulating layer 217 may not be provided if it is unnecessary.

[0159] One of the source or drain of the transistor 207 is electrically connected to the EL layer 192 of the light-emitting element 360 via the conductive layer 191. One of the source or drain of the transistor 206 is electrically connected to the conductive layer 311b via the connection portion 208. The conductive layer 311b and the conductive layer 311a are provided in contact with each other, and they are electrically connected. Here, the connection portion 208 is a portion that connects the conductive layers provided on both sides of the insulating layer 220 via the opening provided in the insulating layer 220.

[0160] One of the source or drain of the transistor 206 is electrically connected to the conductive layer 311b via the connection portion 208. The conductive layer 311b and the conductive layer 311a are provided in contact with each other, and they are electrically connected. Here, the connection portion 208 is a portion that connects the conductive layers provided on both sides of the insulating layer 220 via the opening provided in the insulating layer 220. Here, the connection portion 208 is a portion that connects the conductive layers provided on both sides of the insulating layer 220 via the opening provided in the insulating layer 220. The connection portion 208 is a portion that connects the conductive layers provided on both sides of the insulating layer 220 via the opening provided in the insulating layer 220.

[0161] The connection portion 204 is provided in a region where the substrate 351 and the substrate 361 do not overlap. The connection portion 204 is electrically connected to the FPC 372 via the connection layer 242. The connection portion 204 has the same configuration as the connection portion 208. The upper surface of the connection portion 204 exposes a conductive layer obtained by processing the same conductive film as the conductive layer 311a. Thus, the connection portion 204 and the FPC 372 can be electrically connected via the connection layer 242. The connection portion 204 is provided in a region where the substrate 351 and the substrate 361 do not overlap. The connection portion 204 is electrically connected to the FPC 372 via the connection layer 242. The connection portion 204 has the same configuration as the connection portion 208. The upper surface of the connection portion 204 exposes a conductive layer obtained by processing the same conductive film as the conductive layer 311a. Thus, the connection portion 204 and the FPC 372 can be electrically connected via the connection layer 242. The connection portion 204 and the FPC 372 can be electrically connected via the connection layer 242.

[0162] The connection portion 252 is provided in a part of the region where the adhesive layer 141 is provided. In the connection portion 252, a conductive layer obtained by processing the same conductive film as the conductive layer 311a and a part of the conductive layer 113 are electrically connected by the connection body 243. Therefore, on the substrate 361 side In the connection portion 252, a conductive layer obtained by processing the same conductive film as the conductive layer 311a and a part of the conductive layer 113 are electrically connected by the connection body 243. In the connection portion 252, a conductive layer obtained by processing the same conductive film as the conductive layer 311a and a part of the conductive layer 113 are electrically connected by the connection body 243. A signal input from the FPC 372 connected to the substrate 351 side can be supplied to the formed conductive layer 113 or a potential can be supplied via the connection part 252.

[0163] As the connector 243, for example, conductive particles can be used. As the conductive particles particles whose surfaces are coated with a metal material such as an organic resin or silica can be used. It is preferable to use nickel or gold as the metal material because the contact resistance can be reduced. Also it is preferable to use particles coated with two or more metal materials in layers, such as coating nickel with gold. Further, as the connector 243, a material that elastically deforms or plastically deforms is preferably used. At this time, the connector 243, which is a conductive particle, may have a shape crushed in the vertical direction as shown in FIG. 19. By doing so, the contact area between the connector 243 and the conductive layer that is electrically connected to it increases, the contact resistance can be reduced, and the occurrence of defects such as poor connection can be suppressed. the occurrence of defects such as poor connection can be suppressed. the occurrence of defects such as poor connection can be suppressed. the occurrence of defects such as poor connection can be suppressed.

[0164] The connector 243 is preferably arranged so as to be covered with the adhesive layer 141. For example, the connector 243 may be dispersed in the adhesive layer 141 before curing. the connector 243 may be dispersed in the adhesive layer 141 before curing.

[0165] In FIG. 19, an example in which transistors 201a and 201b are provided as an example of the circuit 364 is shown. is shown.

[0166] The transistor 201a can be manufactured in the same process as the transistors 205 and 206. Also, the transistor 201b can be manufactured in the same process as the transistor 207. The transistor 201a can be manufactured in the same process as the transistors 205 and 206. Also, the transistor 201b can be manufactured in the same process as the transistor 207. can be done.

[0167] Note that the transistors included in circuit 364 and the transistors included in display unit 362 may have the same structure. Also, the plurality of transistors included in circuit 364 may all have the same structure , or transistors with different structures may be combined and used. Further, the plurality of transistors included in display unit 362 may all have the same structure, or transistors with different structures may be combined and used.

[0168] At least one of insulating layer 212a and insulating layer 213a that cover each transistor and at least one of insulating layer 212b and insulating layer 213b are preferably made of a material that is less likely to allow impurities such as water and hydrogen to diffuse. That is, at least one of insulating layer 212a and insulating layer 213a and at least one of insulating layer 212b and insulating layer 213b can function as a barrier film. With such a configuration, it is possible to effectively suppress the diffusion of impurities from the outside into the transistors, and a highly reliable display panel can be realized.

[0169] On the substrate 361 side, an insulating layer 121 is provided to cover the coloring layer 131 and the light-shielding layer 132. The insulating layer 121 may have a function as a planarization layer. By the insulating layer 121, the surface of the conductive layer 113 can be made substantially flat, so that the alignment state of the liquid crystal 112 can be made uniform.

[0170] [Regarding Each Component] Hereinafter, each of the components shown above will be described.

[0171] 〔Substrate〕 For the substrate included in the display panel, a material having a flat surface can be used. Whether it is a display element or For the substrate on the side where light is extracted, a material that transmits the light is used. For example, materials such as glass, quartz, ceramics, sapphire, and organic resins can be used.

[0172] By using a thin substrate, the display panel can be made lighter and thinner. Also, by using a substrate with a thickness that allows for flexibility, a flexible display panel can be realized.

[0173] In addition, since the substrate on the side where light is not extracted does not need to have light transmittance, in addition to the substrates mentioned above, a metal substrate or the like can also be used. The metal substrate has high thermal conductivity and can easily conduct heat throughout the substrate, so it can suppress local temperature rise of the display panel, which is preferable. In order to obtain flexibility and bendability, the thickness of the metal substrate is preferably 10 μm or more and 200 μm or less, and more preferably 20 μm or more and 50 μm or less.

[0174] The material constituting the metal substrate is not particularly limited, but for example, metals such as aluminum, copper, and nickel, or alloys such as aluminum alloys or stainless steel can be preferably used.

[0175] In addition, a substrate subjected to insulation treatment may be used, for example, by oxidizing the surface of the metal substrate or forming an insulating film on the surface. For example, an insulating film may be formed using a coating method such as spin coating or dipping, electrodeposition, evaporation, or sputtering. An oxide film may also be formed on the surface of the substrate by leaving it in an oxygen atmosphere or heating it, or by anodizing or the like.

[0176] ​​​​​​​Examples of materials having flexibility and transparency to visible light include, for example, polyethylene terephthalate (PET), polyester resins such as polyethylene naphthalate (PEN), polyacrylonitrile resin, polyimide resin, polymethyl methacrylate resin, polycar bonate (PC) resin, polyethersulfone (PES) resin, polyamide resin, cyclo olefin resin, polystyrene resin, polyamideimide resin, polyvinyl chloride resin, poly tetrafluoroethylene (PTFE) resin, and the like. In particular, it is preferable to use a material with a low coefficient of thermal expansion. For example, a polyamide imide resin, polyimide resin, PET, etc. with a coefficient of thermal expansion of 30×10 -6 / K or less can be preferably used. Also, a substrate in which glass fibers are impregnated with an organic resin, or a substrate in which an inorganic filler is mixed with an organic resin to reduce the coefficient of thermal expansion can be used. A substrate using such a material is lightweight, so the display panel using the substrate can also be made lightweight. When a fibrous body is included in the above materials, the fibrous body uses high-strength fibers of organic compounds or inorganic compounds. High-strength fibers specifically refer to fibers with a high tensile elastic modulus or Young's modulus. Representative examples include polyvinyl alcohol-based fibers, polyester-based fibers, poly

[0177] amide-based fibers, polyethylene-based fibers, aramid fibers, polyparaphenylene benzobisox azole fibers, glass fibers, or carbon fibers. Examples of glass fibers include glass fibers using E glass fibers, S glass, D glass, Q glass, etc. These are used in the state of woven fabric or non-woven fabric, and a structure in which this fibrous body is impregnated with resin and the resin is cured is used. ​​It may be used as a flexible substrate. As a flexible substrate, a structure composed of a fibrous body and a resin is preferably used because the reliability against breakage due to bending or local pressing is improved.

[0178] Alternatively, glass, metal, etc. that are thin enough to have flexibility can also be used as the substrate. Or, a composite material in which a glass and a resin material are bonded together by an adhesive layer may be used.

[0179] A hard coat layer (for example, silicon nitride, aluminum oxide, etc.) that protects the surface of the display panel from scratches and a layer made of a material capable of dispersing pressure (for example, aramid resin, etc.) may be laminated on the flexible substrate. Also, in order to suppress a decrease in the life of the display element due to moisture or the like, an insulating film with low water permeability may be laminated on the flexible substrate. For example, inorganic insulating materials such as silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum oxide, and aluminum nitride can be used.

[0180] The substrate can also be used by laminating a plurality of layers. In particular, a configuration having a glass layer can improve the barrier properties against water and oxygen and provide a highly reliable display panel.

[0181] 〔Transistor〕 The transistor has a conductive layer that functions as a gate electrode, a semiconductor layer, a conductive layer that functions as a source electrode, a conductive layer that functions as a drain electrode, and an insulating layer that functions as a gate insulating layer. The above shows the case where a transistor with a bottom gate structure is applied.

[0182] ​​​​​​​​​​​​​​​Note that the structure of the transistor included in the display device according to an aspect of the present invention is not particularly limited. For example, it may be a planar transistor or a staggered transistor. Further, it may be an inverse staggered transistor. Also, it may have any of a top gate type or a bottom gate type transistor structure. Alternatively, gate electrodes may be provided above and below the channel.

[0183] The crystallinity of the semiconductor material used for the transistor is also not particularly limited, and an amorphous semiconductor, a semiconductor having crystallinity (microcrystalline semiconductor, polycrystalline semiconductor, single crystal semiconductor, or a semiconductor having a partially crystalline region) may be used. Using a semiconductor having crystallinity is preferable because deterioration of transistor characteristics can be suppressed.

[0184] In addition, as the semiconductor material used for the transistor, a metal oxide having an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more can be used. Typically, it is an oxide semiconductor containing indium, and for example, CA C-OS described later can be used.

[0185] A transistor using an oxide semiconductor having a wider band gap and a lower carrier density than silicon can hold the electric charge accumulated in a capacitive element connected in series with the transistor for a long period due to its low off-current.

[0186] The semiconductor layer is, for example, indium, zinc, and M (aluminum, titanium, gallium, ger manium, yttrium, zirconium, lanthanum, cerium, tin, neodymium, or ​​​​It can be a film represented by an In-M-Zn-based oxide containing a metal such as hafnium). .

[0187] When the oxide semiconductor constituting the semiconductor layer is an In-M-Zn-based oxide, the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide is preferably such that In ≥ M and Zn ≥ M. As the atomic ratio of the metal elements of such a sputtering target , In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, I n:M:Zn = 3:1:2, In:M:Zn = 4:2:3, In:M:Zn = 4:2:4 .1, In:M:Zn = 5:1:6, In:M:Zn = 5:1:7, In:M:Zn = 5 :1:8, etc. are preferable. Note that the atomic ratio of the metal elements of the semiconductor layer to be formed includes a plus or minus 40% variation of the atomic ratio of the metal elements contained in the above-mentioned sputtering target .

[0188] The transistor having the bottom gate structure exemplified in this embodiment is preferable because the manufacturing process can be reduced . Also, by using an oxide semiconductor at this time, it can be formed at a lower temperature than polycrystalline silicon, and as the material of the wiring and electrodes in the layer below the semiconductor layer and the material of the substrate , a material with low heat resistance can be used, so the range of material selection can be widened. For example, a glass substrate with an extremely large area can be preferably used.

[0189] As the semiconductor layer, an oxide semiconductor film with a low carrier density is used. For example, the semiconductor layer has a carrier density of 1×10 17 / cm 3 or less, preferably 1×10 15 / cm 3 or less, and more preferably 1×10 ​​13 / cm 3 More preferably, 1 × 10 11 / cm 3 or less, Even more preferably, 1 × 10 10 / cm 3 less than, and 1 × 10 -9 / cm 3 or more of the oxide semiconductor can be used. Such an oxide semiconductor is called a high-purity intrinsic or substantially high purity intrinsic oxide semiconductor. As a result, since the impurity concentration is low and the density of defect levels is low , it can be said that it is an oxide semiconductor having stable characteristics.

[0190] Note that these are not limited thereto, and those having an appropriate composition may be used according to the semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, etc.) of the required transistor. Also, in order to obtain the semiconductor characteristics of the required transistor, it is preferable to make the carrier density, impurity concentration, defect density, atomic number ratio of metal element to oxygen, interatomic distance, density, etc. of the semiconductor layer appropriate.

[0191] In the oxide semiconductor constituting the semiconductor layer, if silicon or carbon, which is one of the Group 14 elements is contained, oxygen deficiency increases in the semiconductor layer and it becomes n-type. For this reason, the concentration of silicon or carbon in the semiconductor layer (concentration obtained by secondary ion mass spectrometry) is set to 2 × 10 atoms / cm 18 or less, preferably 2 × 10 3 atoms / cm 17 or less 3 and do so.

[0192] In addition, when an alkali metal and an alkaline earth metal are combined with an oxide semiconductor, carriers may be generated, and the off-current of the transistor may increase. For this reason, half​ The concentration of alkali metal or alkaline earth metal obtained by secondary ion mass spectrometry in the conductor layer is 1×10 18 atoms / cm 3 or less, preferably 2×10 16 atoms / cm 3 or less.

[0193] In addition, when nitrogen is contained in the oxide semiconductor constituting the semiconductor layer, electrons as carriers are generated, the carrier density increases, and it is likely to be n-type. As a result, a transistor using an oxide semiconductor containing nitrogen is likely to have normally-on characteristics. Therefore, the nitrogen concentration obtained by secondary ion mass spectrometry in the semiconductor layer is 5×10 atoms / cm 18 or less. 3 Preferably, it is made to be or less.

[0194] In addition, the semiconductor layer may have, for example, a non-single crystal structure. The non-single crystal structure includes, for example, a CAAC-OS (C-Axis Aligned Crystalline Oxide Semiconductor, or C-Axis Aligned and A-B-plane Anchored Crystalline Oxide Semiconductor) having a crystal oriented along the c-axis, a polycrystalline structure, a microcrystalline structure, or an amorphous structure. In the non-single crystal structure, the amorphous structure has the highest density of defect levels, and the CAAC-OS has the lowest density of defect levels.

[0195] An oxide semiconductor film having an amorphous structure has, for example, a disordered atomic arrangement and no crystal component. Or, an oxide film having an amorphous structure is, for example, a completely amorphous structure and has no crystal part.

[0196] ​​​​​​​​ Note that the semiconductor layer may be a mixed film having two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAA C-OS region, and a single crystal structure region. The mixed film may be, for example, a single layer structure including any two or more of the above-described regions, or a laminate structure.

[0197] <Configuration of CAC-OS> Hereinafter, the configuration of CAC (C loud-Aligned Composite)-OS that can be used in the transistor disclosed in one aspect of the present invention will be described.

[0198] CAC-OS is, for example, a material configuration in which elements constituting an oxide semiconductor are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or in the vicinity thereof. Hereinafter, in the oxide semiconductor, one or more metal elements are unevenly distributed, and a region having the metal element is mixed in a size of 0.5 nm or more and 10 nm or less, preferably 1 n m or more and 2 nm or less, or in the vicinity thereof, and this state is also referred to as a mosaic state or a patch state.

[0199] Note that the oxide semiconductor preferably contains at least indium. In particular, it is preferable to contain indium and zinc. In addition to these, one or more selected from aluminum, gallium, y ttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium tantalum, tungsten, or magnesium may be contained.

[0200] ​​​For example, in an In-Ga-Zn oxide, CAC-OS (among CAC-OS, In- Ga-Zn oxide may be particularly referred to as CAC-IGZO.) refers to indium oxide (hereinafter, InO X1 (where X1 is a real number greater than 0).), or indium zinc oxide (hereinafter, In X2 Zn Y2 O Z2 (where X2, Y2, and Z2 are real numbers greater than 0 ).), and gallium oxide (hereinafter, GaO X3 (where X3 is a real number greater than 0) is used.), or gallium zinc oxide (hereinafter, Ga X4 Zn Y4 O Z4 (where X4, Y4, and Z4 are real numbers greater than 0) is used.). When the materials separate, it becomes mosaic-like, and mosaic-like InO , or In X1 Zn X2 O Y2 is uniformly distributed in the film Z2 to form a configuration (hereinafter also referred to as cloud-like). That is, CAC-OS is a composite oxide semiconductor

[0201] body having a configuration in which a region mainly composed of GaO X3 and a region mainly composed of In X2 Zn Y2 O Z2 , or InO X1 are mixed. In this specification, for example, when the atomic number ratio of In to element M in the first region is greater than the atomic number ratio of In to element M in the second region, it is considered that the concentration of In in the first region is higher than that in the second region when compared with the second region.

[0202] Note that IGZO is a general term and refers to one compound composed of In, Ga, Zn, and O. ​​There are cases. As a representative example, InGaO 3 (ZnO) m1 (where m1 is a natural number), or In (1+x0) Ga (1-x0) O 3 (ZnO) m0 (-1 ≤ x0 ≤ 1, and m0 is an arbitrary number), and crystalline compounds represented thereby can be mentioned. The above crystalline compounds have a single crystal structure, a polycrystalline structure, or a CAAC structure. Note that

[0203] The CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have c-axis orientation and are connected without orientation in the a-b plane. On the other hand, CAC-OS relates to the material composition of an oxide semiconductor. CAC-OS refers to a structure in which in a material composition containing In, Ga, Zn, and O, a region observed in the form of nanoparticles mainly composed of Ga in part and a region observed in the form of nanoparticles mainly composed of In in part are randomly dispersed in a mosaic pattern. Therefore, in CAC-OS, the crystal structure is a secondary element.

[0204] Note that CAC-OS does not include a laminated structure of two or more types of films having different compositions. For example, a structure composed of two layers of a film mainly composed of In and a film mainly composed of Ga is not included. In addition, there may be cases where no clear boundary can be observed between a region mainly composed of GaO and a region mainly composed of In Zn

[0205] O or a region mainly composed of InO

[0206] Z2

[0207] X1 Y2 O Z2 X1

[0207] In addition, when one or more selected from aluminum, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium are included instead of gallium, CAC-OS has a structure in which regions observed as nanoparticles mainly composed of the metal element and regions observed as nanoparticles mainly composed of In are randomly dispersed in a mosaic pattern. In addition, CAC-OS can be formed by, for example, a sputtering method under conditions where the substrate is not heated. When CAC-OS is formed by a sputtering method, any one or more selected from inert gases (typically argon) and oxygen gas can be used as the film-forming gas. Also, the lower the flow rate ratio of oxygen gas to the total flow rate of the film-forming gas during film formation, the more preferable it is. For example, it is preferable to set the flow rate ratio of oxygen gas to 0% or more and less than 30%, preferably 0% or more and 10% or less.

[0208]

[0209] CAC-OS has the characteristic that no distinct peak is observed when measured using θ / 2θ scan by the Out-of-plane method, which is one of the X-ray diffraction (XRD) measurement methods. That is, it can be seen from X-ray diffraction that there is no orientation in the a-b plane direction and the c-axis direction in the measurement region.

[0210] In addition, in the electron diffraction pattern obtained by irradiating an electron beam with a probe diameter of 1 nm (also referred to as a nanobeam electron beam), regions with high brightness are observed in a ring shape.​​​​​​​​​​​​​​​ Multiple bright spots are observed in the ring region. Therefore, from the electron diffraction pattern, it can be seen that the crystal structure of CAC-O S has a non-oriented nc (nano -crystal) structure in the planar direction and the cross-sectional direction.

[0211] Also, for example, in CAC-OS in In-Ga-Zn oxide, according to the EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX: Energy Dispersive X-ray spectr oscopy), it can be confirmed that the region where GaO X3 is the main component and the region where In and X2 Zn Y2 O Z2 or InO X1 is the main component are unevenly distributed and have a mixed structure. It can be confirmed that they have a mixed structure.

[0212] CAC-OS has a structure different from that of the IGZO compound in which metal elements are uniformly distributed, and has properties different from those of the IGZO compound. That is, CAC-OS has a structure in which regions such as GaO X3 as the main component and regions where In and X2 Zn Y2 O Z2 or InO X1 as the main component are phase-separated from each other, and the regions with each element as the main component have a mosaic-like structure. Here, the regions where In

[0213] and X2 Zn Y2 O Z2 or InO X1 is the main component are regions with higher conductivity compared to the regions where GaO X 3 and so on are the main components. That is, In X2 Zn Y2 O Z2、 or InO X1 In the region where X1 is the main component, when carriers flow, the conductivity as an oxide semiconductor is exhibited. Therefore, In X2 Zn Y2 O Z2 、 or InO X1 when the region where X1 is the main component is distributed in a cloud shape in the oxide semiconductor, a high field-effect mobility (μ) can be realized.

[0214] On the other hand, the region where GaO X3 etc. is the main component is a region with higher insulation compared to the region where In X2 Zn Y2 O Z2 、 or InO X1 is the main component. That is, when the region where GaO X3 etc. is the main component is distributed in the oxide semiconductor, the leakage current can be suppressed, and a good switching operation can be realized.

[0215] Therefore, when CAC-OS is used in a semiconductor device, the insulation X3 caused by GaO and the conductivity caused by In X2 Zn Y2 O Z2 、 or InO X1 act complementarily to realize a high on-current (I on ) and a high field-effect mobility (μ). This can be achieved.

[0216] In addition, the semiconductor device using CAC-OS has high reliability. Therefore, CAC-OS is suitable for various semiconductor devices including displays.

[0217] Alternatively, silicon may be used for the semiconductor in which the channel of the transistor is formed. Sili Amorphous silicon may be used as the semiconductor, but it is particularly preferable to use crystalline silicon. For example, it is preferable to use microcrystalline silicon, polycrystalline silicon, single crystal silicon, or the like. In particular, polycrystalline silicon can be formed at a lower temperature than single crystal silicon and has a higher field effect mobility and higher reliability than amorphous silicon.

[0218] The transistor having the bottom gate structure exemplified in this embodiment is preferable because the manufacturing process can be reduced. At this time, by using amorphous silicon, it can be formed at a lower temperature than polycrystalline silicon. Therefore, as the material of the wiring and electrodes below the semiconductor layer and the substrate, a material with low heat resistance can be used, so the range of material selection can be widened. For example, a very large area glass substrate or the like can be preferably used. On the other hand, the top gate type transistor is preferable because impurity regions can be formed self-alignedly, so variations in characteristics and the like can be reduced. At this time, in particular, it is suitable when using polycrystalline silicon or single crystal silicon.

[0219] 〔Conductive layer〕 As materials that can be used for the conductive layers such as the gate, source, and drain of the transistor, and various wirings and electrodes constituting the display device, metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or alloys mainly composed of these can be mentioned. Also, films containing these materials can be used as a single layer or in a laminated structure. For example, a single layer structure of an aluminum film containing silicon, a two-layer structure in which an aluminum film is laminated on a titanium film, a two-layer structure in which an aluminum film is laminated on a titanium film, A two-layer structure in which an aluminum film is laminated on a tungsten film, a copper-magnesium-aluminum alloy A two-layer structure in which a copper film is laminated on a gold film, a two-layer structure in which a copper film is laminated on a titanium film, tungsten A two-layer structure in which a copper film is laminated on a film, a titanium film or a titanium nitride film, and an aluminum A film or a copper film is laminated thereon, and a titanium film or a titanium nitride film is further formed thereon. Three A layer structure, a molybdenum film or a molybdenum nitride film, and an aluminum film or A copper film is laminated thereon, and a molybdenum film or a molybdenum nitride film is further formed thereon. A three-layer structure There are etc. In addition, oxides such as indium oxide, tin oxide, or zinc oxide may be used. Also When using copper containing manganese, it is preferable because the controllability of the shape by etching is enhanced .

[0220] In addition, as the conductive material having translucency, indium oxide, indium tin oxide, i Conductive oxides such as indium zinc oxide, zinc oxide, zinc oxide added with gallium, or Graphene can be used. Or, gold, silver, platinum, magnesium, nickel, t Metallic materials such as tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, or An alloy material containing the metallic material can be used. Or, a nitride of the metallic material (for example, titanium nitride) etc. may be used. Note that when using a metallic material, an alloy material (or a nitride thereof), it may be made thin enough to have translucency. Also, a laminated film of the above materials can be used as a conductive layer. For example, when using a laminated film of an alloy of silver and magnesium and indium tin oxide, etc., the conductivity can be enhanced, so it is preferable. These are the conductive layers such as various wirings and electrodes constituting the display device, and the conductors that the display element has If it is made thin enough to have translucency. Also, the laminated film of the above materials can be used as a conductive layer. For example, when using a laminated film of an alloy of silver and magnesium and indium tin oxide, etc., the conductivity can be enhanced, so it is preferable. These can be used as the conductive layer such as various wirings and electrodes constituting the display device, and the conductive layer of the display element For example, when using a laminated film of an alloy of silver and magnesium and indium tin oxide, etc., the conductivity can be enhanced, so it is preferable. These are the conductive layers such as various wirings and electrodes constituting the display device, and the conductors that the display element has It can also be used for an electric layer (a conductive layer that functions as a pixel electrode or a common electrode).

[0221] [Insulating layer] Examples of insulating materials that can be used for each insulating layer include resins such as acrylic and epoxy, resins having a siloxane bond, and inorganic insulating materials such as silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, and aluminum oxide. In addition, it is preferable that the light-emitting element is provided between a pair of insulating films with low water permeability. This can suppress the intrusion of impurities such as water into the light-emitting element and reduce the degradation of the reliability of the device.

[0222] Examples of insulating films with low water permeability include films containing nitrogen and silicon such as silicon nitride films and silicon oxynitride films, and films containing nitrogen and aluminum such as aluminum nitride films. Further, silicon oxide films, silicon oxynitride films, aluminum oxide films, etc. may be used. For example, the water vapor transmission rate of the insulating film with low water permeability is 1×10 [g / (m

[0223] ·day) or less, preferably 1×10 [g / (m

[0224] ·day)] or less, more preferably 1×1 -5 [g / (m 2 ·day)] or less, still more preferably 1×10 [g / (m -6 ·day)] or less, and even more preferably 1×10 2 [g / (m 0 -7 [g / (m 2 ·day)] or less, and even more preferably 1×10 -8 [g / (m 2 ·d ay)] or less.

[0225] [Liquid crystal element] Examples of liquid crystal elements include vertical alignment (VA: Vertical Alignment) A liquid crystal element in which the vertical alignment mode is applied can be used. Multi-Domain Vertical Alignment mode, PVA( Patterned Vertical Alignment) mode, ASV (Adv Anced Super View mode, etc. can be used.

[0226] In addition, the liquid crystal element may be a liquid crystal element to which various modes are applied. For example, in addition to VA mode, TN (Twisted Nematic) mode, IPS (In -Plane-Switching mode, FFS (Fringe Field Switching) mode itching) mode, ASM(Axially Symmetric aligne) d Micro-cell mode, OCB (Optically Compensated ed Birefringence mode, FLC (Ferroelectric L iquid Crystal mode, AFLC (AntiFerroelectric) Liquid crystal elements using the Liquid Crystal (LC) mode can be used. .

[0227] The liquid crystal element is a device that controls the transmission or non-transmission of light by the optical modulation action of liquid crystal. The optical modulation of liquid crystals is achieved by the electric field applied to the liquid crystal (horizontal electric field, vertical electric field). The liquid crystal used in the liquid crystal element is controlled by a These include thermotropic liquid crystal, low molecular weight liquid crystal, polymer liquid crystal, and polymer dispersed liquid crystal (PDLC). : Polymer Dispersed Liquid Crystal), Ferroelectric Liquid These liquid crystal materials can be used as colloidal liquid crystals, antiferroelectric liquid crystals, etc. Exhibiting a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. .

[0228] Also, as the liquid crystal material, either a positive liquid crystal or a negative liquid crystal may be used , and an optimal liquid crystal material may be used according to the mode and design to be applied.

[0229] Also, in order to control the alignment of the liquid crystal, an alignment film can be provided. Note that when the horizontal electric field method is adopted, a liquid crystal showing a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases , and when the cholesteric liquid crystal is heated, it is a phase that appears immediately before the transition from the cholesteric phase to the isotropic phase. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition mixed with a chiral agent of several weight% or more is used for the liquid crystal layer in order to improve the temperature range . A liquid crystal composition containing a liquid crystal showing a blue phase and a chiral agent has a short response time and is optically isotropic . Also, a liquid crystal composition containing a liquid crystal showing a blue phase and a chiral agent does not require alignment treatment and has little viewing angle dependence. Also, since an alignment film does not need to be provided, rubbing treatment is also unnecessary, so electrostatic breakdown caused by the rubbing treatment can be prevented, and defects and breakage of the liquid crystal display device during the manufacturing process can be reduced . . . . .

[0230] Also, as the liquid crystal element, a transmissive liquid crystal element, a reflective liquid crystal element, or a transflective liquid crystal element, etc. can be used.

[0231] In one aspect of the present invention, a reflective liquid crystal element can be particularly used.

[0232] When using a transmissive or transflective liquid crystal element, two polarizers are sandwiched between a pair of substrates A plate is provided. Also, a backlight is provided outside the polarizing plate. As the backlight, a direct-lit backlight or an edge-lit backlight may be used. Using a direct-lit backlight equipped with LEDs (Light Emitting Diodes) is preferable because it facilitates local dimming and can enhance contrast. Also, using an edge-lit backlight is preferable because it can reduce the thickness of the module including the backlight.

[0233] When using a reflective liquid crystal element, a polarizing plate is provided on the display surface side. Separately, placing a light diffusing plate on the display surface side is preferable because it can improve visibility.

[0234] Also, when using a reflective or transflective liquid crystal element, a front light may be provided outside the polarizing plate. As the front light, it is preferable to use an edge-lit front light. Using a front light equipped with LEDs (Light Emitting Diodes) is preferable because it can reduce power consumption.

[0235] 〔Light-emitting element〕 As the light-emitting element, an element capable of self-emission can be used, and it includes elements whose luminance is controlled by current or voltage. For example, LEDs, organic EL elements, inorganic EL elements, etc. can be used.

[0236] The light-emitting element has types such as top emission type, bottom emission type, and dual emission type. For the electrode on the side where light is extracted, a conductive film that transmits visible light is used. Also, for the electrode on the side where light is not extracted, it is preferable to use a conductive film that reflects visible light.

[0237] The EL layer has at least a light-emitting layer. The EL layer has a hole-injecting layer as a layer other than the light-emitting layer. high hole transporting material, hole blocking material, high electron transporting material, electron injection highly conductive or bipolar substances (substances with high electron transport and hole transport properties), etc. The film may further include a layer comprising:

[0238] The EL layer can be made of either low molecular weight or high molecular weight compounds. Each of the layers constituting the EL layer may be formed by deposition (including vacuum deposition). ), a transfer method, a printing method, an ink-jet method, a coating method, or the like.

[0239] When a voltage higher than the threshold voltage of the light-emitting element is applied between the cathode and anode, the EL layer is charged from the anode side. Holes are injected from the cathode side, and electrons are injected from the cathode side. The injected electrons and holes are These molecules recombine and the luminescent material contained in the EL layer emits light.

[0240] When a white-emitting light-emitting element is used as the light-emitting element, two or more types of light-emitting elements are used in the EL layer. For example, the light emitted by two or more luminescent materials may be of complementary colors. By selecting a light-emitting material so as to satisfy the above relationship, white light can be obtained. For example, Luminescent substances that emit light of R (red), G (green), B (blue), Y (yellow), O (orange), etc. Or, among luminescent materials that emit light containing two or more of the spectral components of R, G, and B, It is preferable that the spectrum of the light emitted from the light emitting element is in the visible light region. A light-emitting element having two or more peaks within a wavelength range (e.g., 350 nm to 750 nm) It is preferably applicable. Also, the emission spectrum of the material having a peak in the yellow wavelength region is preferably a material having spectral components also in the green and red wavelength regions.

[0241] The EL layer preferably has a structure in which a light-emitting layer containing a light-emitting material that emits one color and a light-emitting layer containing a light-emitting material that emits another color are laminated. For example, the plurality of light-emitting layers in the EL layer may be laminated in contact with each other, or may be laminated via a region that does not contain any light-emitting material. For example, between a fluorescent light-emitting layer and a phosphorescent light-emitting layer, the same material as that of the fluorescent light-emitting layer or the phosphorescent light-emitting layer (for example, a host material, an assist material) is included, and a region that does not contain any light-emitting material may be provided. Thereby, the manufacturing of the light-emitting element becomes easy, and the driving voltage is reduced. Further, the light-emitting element may be a single element having one EL layer, or may be a tandem element in which a plurality of EL layers are laminated via a charge generation layer.

[0242] The conductive film that transmits visible light can be formed, for example, using indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, zinc oxide added with gallium, etc. Also, metal materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum

[0243] , iron, cobalt, copper, palladium, or titanium, alloys containing these metal materials, or nitrides of these metal materials (for example, titanium nitride), etc. can also be used by forming them thinly to such an extent that they have translucency. Further, a laminated film of the above materials can be used as a conductive layer. For example, a laminated film of an alloy of silver and magnesium and indium tin oxide, etc. It is preferable to use it because it can enhance conductivity. Further, graphene or the like may be used. Yes.

[0244] The conductive film that reflects visible light can be made of, for example, a metal material such as aluminum, gold, platinum, silver, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, or palladium, or an alloy containing these metal materials. Further, lanthanum, neodymium, or germanium may be added to the above metal materials or alloys. Also, an alloy containing titanium, nickel, or neodymium and aluminum (aluminum alloy) may be used. Further, an alloy containing copper, palladium, magnesium, and silver may be used. An alloy containing silver and copper is preferable because of its high heat resistance. Furthermore, oxidation can be suppressed by laminating a metal film or a metal oxide film in contact with an aluminum film or an aluminum alloy film. Examples of materials for such metal films and metal oxide films include titanium and titanium oxide. Further, a film composed of the above conductive film that transmits visible light and a metal material may be laminated. For example, a laminated film of silver and indium tin oxide, a laminated film of an alloy of silver and magnesium and indium tin oxide, etc. can be used.

[0245] The electrodes may be formed using, respectively, a vapor deposition method or a sputtering method. In addition, they can be formed using a discharge method such as an inkjet method, a printing method such as a screen printing method, or a plating method.

[0246] In addition, the above-described light-emitting layer, and layers containing a substance with high hole injection property, a substance with high hole transport property, a substance with high electron transport property, a substance with high electron injection property, a bipolar substance, etc. ​​​Each may have an inorganic compound such as a quantum dot, or a polymer compound (oligomer, dendrimer, polymer, etc.). For example, by using a quantum dot in the light-emitting layer, it can also function as a light-emitting material. In addition, as the quantum dot material, a colloidal quantum dot material, an alloy-type quantum dot material, a core-shell type quantum dot material, a core-type quantum dot material, etc. can be used. Also,

[0247] materials containing element groups of Group 12 and Group 16, Group 13 and Group 15, or Group 14 and Group 16 may be used. Or, a quantum dot material containing elements such as cadmium, selenium, zinc, sulfur, phosphorus, indium, tellurium, lead, gallium, arsenic, aluminum, etc. may be used. 〔Adhesive layer〕 As the adhesive layer, various curable adhesives such as photocurable adhesives such as ultraviolet curable type, reaction curable adhesives, thermosetting adhesives, anaerobic adhesives, etc. can be used. These adhesives include epoxy resin, acrylic resin, silicone resin, phenol resin, polyimide resin, imide resin,

[0248] PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, EVA (ethylene vinyl acetate) resin, etc. In particular, materials with low moisture permeability such as epoxy resin are preferred. Also, a two-component mixed resin may be used. Also, an adhesive sheet or the like may be used. In addition, the above resin may contain a desiccant. For example, substances that adsorb moisture by chemical adsorption, such as oxides of alkaline earth metals (calcium oxide, barium oxide, etc.), can be used. Or, substances that adsorb moisture by physical adsorption, such as zeolite and silica gel, can be used. These adhesives include epoxy resin, acrylic resin, silicone resin, phenol resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, EVA (ethylene vinyl acetate) resin, etc. In particular, materials with low moisture permeability such as epoxy resin are preferred. Also, a two-component mixed resin may be used. Also, an adhesive sheet or the like may be used. In addition, the above resin may contain a desiccant. For example, substances that adsorb moisture by chemical adsorption, such as oxides of alkaline earth metals (calcium oxide, barium oxide, etc.), can be used. Or, substances that adsorb moisture by physical adsorption, such as zeolite and silica gel, can be used. In addition, the above resin may contain a desiccant. For example, substances that adsorb moisture by chemical adsorption, such as oxides of alkaline earth metals (calcium oxide, barium oxide, etc.), can be used. Or, substances that adsorb moisture by physical adsorption, such as zeolite and silica gel, can be used. In addition, the above resin may contain a desiccant. For example, substances that adsorb moisture by chemical adsorption, such as oxides of alkaline earth metals (calcium oxide, barium oxide, etc.), can be used. Or, substances that adsorb moisture by physical adsorption, such as zeolite and silica gel, can be used.

[0249] In addition, the above resin may contain a desiccant. For example, substances that adsorb moisture by chemical adsorption, such as oxides of alkaline earth metals (calcium oxide, barium oxide, etc.), can be used. Or, substances that adsorb moisture by physical adsorption, such as zeolite and silica gel, can be used. In addition, the above resin may contain a desiccant. For example, substances that adsorb moisture by chemical adsorption, such as oxides of alkaline earth metals (calcium oxide, barium oxide, etc.), can be used. Or, substances that adsorb moisture by physical adsorption, such as zeolite and silica gel, can be used. In addition, the above resin may contain a desiccant. For example, substances that adsorb moisture by chemical adsorption, such as oxides of alkaline earth metals (calcium oxide, barium oxide, etc.), can be used. Or, substances that adsorb moisture by physical adsorption, such as zeolite and silica gel, can be used. A substance for adsorption may be used. If a desiccant is included, it is preferable because it can suppress the intrusion of impurities such as moisture into the element, improving the reliability of the display panel.

[0250] Also, by mixing a filler with a high refractive index or a light scattering member into the resin, the light extraction efficiency can be improved. For example, titanium oxide, barium oxide, zeolite, zirconi um, etc. can be used.

[0251] 〔Connection layer〕 As the connection layer, an anisotropic conductive film (ACF: Anisotropic Condu ctive Film), an anisotropic conductive paste (ACP: Anisotropic C onductive Paste), etc. can be used.

[0252] 〔Coloring layer〕 Materials that can be used for the coloring layer include resin materials containing metal materials, resin materials, pigments, or dyes.

[0253] 〔Light-shielding layer〕 Materials that can be used as the light-shielding layer include carbon black, titanium black, metals, metal oxides, composite oxides containing a solid solution of multiple metal oxides, etc. The light-shielding layer may be a film containing a resin material, or a thin film of an inorganic material such as a metal. Also, a laminated film of a film containing the material of the coloring layer can be used for the light-shielding layer. For example, a film containing the material used for a coloring layer that transmits light of a certain color and a film containing the material used for a coloring layer that transmits light of another color can be used in a laminated structure. By sharing the materials of the coloring layer and the light-shielding layer, the device can be shared and the process can be simplified, which is preferable.

[0254] This embodiment can be implemented in appropriate combination with other embodiments described in this specification, at least in part. It can be implemented in combination.

[0255] (Embodiment 4) As an electronic device that can use the display device according to an aspect of the present invention, a display device, a personal computer, an image storage device or an image playback device equipped with a recording medium, a mobile phone, a portable game machine including a portable type, a portable data terminal, an e-book terminal, a video camera, a digital still camera such as a camera, a goggle-type display (head-mounted display), a navigation system, an audio playback device (car audio, digital audio player, etc.), a copying machine, a facsimile machine, a printer, a printer multifunction machine, an automated teller machine (ATM), a vending machine, etc. are exemplified. Specific examples of these electronic devices are shown in FIG. 20.

[0256] FIG. 20(A) is a video camera, which has a first housing 971, a second housing 972, a display unit 973 , operation keys 974, a lens 975, a connection unit 976, etc. The operation keys 974 and the lens 975 are provided on the first housing 971, and the display unit 973 is provided on the second housing 972 . By providing the display device according to an aspect of the present invention in the display unit 973 of the video camera, the visibility outdoors can be improved and the power consumption can be reduced.

[0257] FIG. 20(B) is a portable game machine, which has a housing 901, a housing 902, a display unit 903, a display unit 904, a microphone 905, a speaker 906, operation keys 907, a stylus 908, a camera 909, etc. Note that the portable game machine shown in FIG. 20(B) has two display units 903 and a display unit 904, but the number of display units of the portable game machine is not limited to this. It cannot be. By providing the display device according to one aspect of the present invention in the display unit 903 of the portable game machine, the visibility outdoors can be improved and the power consumption can be reduced.

[0258] FIG. 20(C) is a digital camera, which has a housing 961, a shutter button 962, a microphone 963, a speaker 967, a display unit 965, operation keys 966, etc. By providing the display device according to one aspect of the present invention in the display unit 965 of the digital camera, the visibility outdoors can be improved. And the power consumption can be reduced.

[0259] FIG. 20(D) is a wristwatch-type information terminal, which has a housing 931, a display unit 932, a wristband 933, operation buttons 935, a crown 936, a camera 939, etc. The display unit 932 may be a touch panel. By providing the display device according to one aspect of the present invention in the display unit 932 of the information terminal, the visibility can be improved even outdoors. Also, the bezel can be narrowed and the design can be improved.

[0260] FIG. 20(E) is an example of a mobile phone, which has a housing 951, a display unit 952, operation buttons 953 an external connection port 954, a speaker 955, a microphone 956, a camera 957, etc. The mobile phone is provided with a touch sensor in the display unit 952. All operations such as making a call or inputting characters can be performed by touching the display unit 952 with a finger or a stylus. By providing the display device according to one aspect of the present invention in the display unit 952 of the mobile phone, the visibility can be improved even outdoors. Also, the bezel can be narrowed and the design can be improved.

[0261] ​ Figure 20(F) is a portable data terminal, which includes a housing 911, a display unit 912, a camera 919, etc. The touch panel function of the display unit 912 enables input and output of information. By providing the display device according to an aspect of the present invention in the display unit 912 of the portable data terminal, visibility can be improved even outdoors. In addition, the frame can be narrowed, enabling miniaturization.

[0262] This embodiment can be implemented in appropriate combination with at least some of the other embodiments described in this specification.

Explanation of Reference Numerals

[0263] B1 Light B2 Light C1 Capacitive Element C2 Capacitive Element C11 Capacitive Element G1 Wiring G2 Wiring G3 Wiring GL_n Gate Line GL_1 Gate Line GL_4 Gate Line GLA_n Gate Line GLA_1 Gate Line GLB_s Gate Line GLB_1 Gate Line M1 Transistor M2 Transistor M3 Transistor M11 Transistor M13 Transistor M14 Transistor R1 Light R2 Light S1 Wiring S2 Wiring S3 Wiring SR_n Pulse Output Circuit SR_1 Pulse Output Circuit SW1 Switch SW2 Switch Time T1 Time T2 Time T3 VCOM1 Wiring VCOM2 Wiring Display Device 11 Planarization Film 25 Pixel 45 Pixel 46 Display Element 46B Display Element 46G Display Element 46R Pixel 47 Display Element 47B Display Element 47G Display Element 47R Light 55 Transistor 61 Semiconductor Layer 62 Gate Electrode 63 Source Electrode 64 Drain Electrode 65 Connection Part 66 Gate Insulating Film 69 Buffer Circuit 70 Transistor 71a Transistor 71b FPC 72 Semiconductor Layer 72a Semiconductor Layer 72b Gate Electrode 73a Gate Electrode 73b Drain Electrode 74a Drain Electrode 74b Source Electrode 75a Source Electrode 75b Conductive Layer 77 Gate Insulating Film 79a Gate Insulating Film 79b Drive Circuit 91 Pulse Output Circuit 91_n Pulse Output Circuit 91_s Pulse Output Circuit 91_1 Pulse Output Circuit 91_4 Drive Circuit 91A Drive Circuit 91B 92 Display section 93 Drive circuit 94 Pixel circuit 94B Circuit 100 Display panel 101 Layer 102 Layer 102a Layer 102b Layer 103 Layer 112 Liquid crystal 113 Conductive layer 117 Insulating layer 121 Insulating layer 130 Polarizing plate 131 Coloring layer 132 Light-shielding layer 133a Alignment film 133b Alignment film 134 Coloring layer 141 Adhesive layer 142 Adhesive layer 191 Conductive layer 192 EL layer 193a Conductive layer 193b Conductive layer 201a Transistor 201b Transistor 204 Connection part 205 Transistor 206 Transistor 207 Transistor 208 Connection part 211a Insulating layer 211b Insulating layer 212 Insulating layer 212a Insulating layer 212b Insulating layer 213 Insulating layer 213a Insulating layer 213b Insulating layer 214 Insulating layer 214a Insulating layer 214b Insulating layer 215 Insulating layer 216 Insulating layer 217 Insulating layer 218 Insulating layer 220 Insulating layer 221 Conductive layer 222 Conductive layer 231 Semiconductor layer 242 Connection layer 243 Connector 251 Opening 252 Connection part 300 Display panel 311 Electrode 311a Conductive layer 311b Conductive layer 340 Liquid crystal element 351 Substrate 360 Light-emitting element 360b Light-emitting element 360g Light-emitting element 360r Light-emitting element 360w Light-emitting element 361 Substrate 362 Display part 364 Circuit 365 Wiring 372 FPC 373 IC 400 Display device 401 Conductive layer 402 Conductive layer 403 Semiconductor layer 404 Opening 405 Opening 406A Opening 406B Opening 410 Pixel 451 Opening 901 Housing 902 Housing 903 Display part 904 Display part 905 Microphone 906 Speaker 907 Operation key 908 Stylus 909 Camera 911 Housing 912 Display part 919 Camera 931 Housing 932 Display part 933 Wristband 935 Button 936 faucet 939 camera 951 housing 952 display unit 953 operation button 954 external connection port 955 speaker 956 microphone 957 camera 961 housing 962 shutter button 963 microphone 965 display unit 967 speaker 971 housing 972 housing 973 display unit 974 operation key 975 lens 976 connection part

Claims

1. A display unit is provided on a substrate. The display unit is a display device having a plurality of pixels each having a light-emitting element, The display unit is A first conductive layer; and a first insulating layer having a region overlying the first conductive layer; a first semiconductor layer having a region located above the first insulating layer and having a channel formation region of a first transistor; a second insulating layer having a region located above the first semiconductor layer; a second conductive layer having a region located above the second insulating layer and functioning as a gate electrode of a second transistor; a third insulating layer having a region located above the second conductive layer and functioning as a gate insulating layer for the second transistor; a second semiconductor layer having a region located above the third insulating layer and having a channel formation region of the second transistor; a third conductive layer having a region in contact with a top surface of the second semiconductor layer and functioning as one of a source electrode and a drain electrode of the second transistor; a fourth conductive layer having a region in contact with a top surface of the second semiconductor layer and a region functioning as the other of the source electrode and the drain electrode of the second transistor; a fourth insulating layer having a region located on the third conductive layer and a region located on the fourth conductive layer; The substrate is flexible, the light emitting element has a region located above the fourth insulating layer, the first conductive layer has a region overlapping with the first semiconductor layer; the first conductive layer has a region overlapping with the second semiconductor layer; the second conductive layer is disposed in a layer different from a gate electrode of the first transistor; the second semiconductor layer does not have a region overlapping with the first semiconductor layer, the fourth conductive layer has a region functioning as one electrode of a capacitor element, The fourth conductive layer has a region overlapping with the first semiconductor layer.

2. A display unit is provided on a substrate. The display unit is a display device having a plurality of pixels each having a light-emitting element, The display unit is A first conductive layer; and a first insulating layer having a region overlying the first conductive layer; a first semiconductor layer having a region located above the first insulating layer and having a channel formation region of a first transistor; a second insulating layer having a region located above the first semiconductor layer; a second conductive layer having a region located above the second insulating layer and functioning as a gate electrode of a second transistor; a third insulating layer having a region located above the second conductive layer and functioning as a gate insulating layer for the second transistor; a second semiconductor layer having a region located above the third insulating layer and having a channel formation region of the second transistor; a third conductive layer having a region in contact with a top surface of the second semiconductor layer and functioning as one of a source electrode and a drain electrode of the second transistor; a fourth conductive layer having a region in contact with a top surface of the second semiconductor layer and a region functioning as the other of the source electrode and the drain electrode of the second transistor; a fourth insulating layer having a region located on the third conductive layer and a region located on the fourth conductive layer; The substrate is flexible, the light emitting element has a region located above the fourth insulating layer, the first conductive layer has a region overlapping with the first semiconductor layer; the first conductive layer has a region overlapping with the second semiconductor layer; the second conductive layer is disposed in a layer different from a gate electrode of the first transistor; the second semiconductor layer does not have a region overlapping with the first semiconductor layer, the fourth conductive layer has a region functioning as one electrode of a capacitor element, the fourth conductive layer has a region overlapping with a channel formation region of the first transistor.

3. In claim 1 or 2, The second semiconductor layer comprises indium, gallium, and zinc.

4. In any one of claims 1 to 3, The display device, wherein the light-emitting element has a phosphorescent light-emitting layer.

5. In claim 4, The display device, wherein the phosphorescent light-emitting layer comprises a phosphorescent material and a host material.

Images