Wiring circuit board and method for manufacturing wiring circuit board

The introduction of a barrier layer and a copper-containing external connection layer in the terminal portion of wiring circuit boards addresses the brittleness issue caused by dissimilar metals, enhancing connection reliability.

JP2025091059APending Publication Date: 2025-06-18NITTO DENKO CORP
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
JP2023206029
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-12-06
Publication Date
2025-06-18

AI Technical Summary

Technical Problem

The terminal portion of wiring circuit boards becomes brittle due to the connection of dissimilar metals, leading to a decrease in connection reliability when connected to solder balls.

Method used

A wiring circuit substrate with a terminal portion that includes a connection layer, a barrier layer, and an external connection layer, where the external connection layer contains copper and the barrier layer is made of at least one of chromium, titanium, and tungsten, preventing embrittlement from reaching the connection layer.

Benefits of technology

This configuration effectively suppresses the decrease in connection reliability by reducing the brittle portion of the terminal portion, ensuring stable connections even with dissimilar metals.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025091059000001_ABST
    Figure 2025091059000001_ABST
Patent Text Reader

Abstract

To provide: a circuit connection board capable of suppressing deterioration in connection reliability by reducing an embrittled part of a terminal part; and the like.SOLUTION: There is provided a wiring circuit board including a first insulating layer, a conductor layer disposed on the first insulating layer, and a second insulating layer disposed on the conductor layer and having an opening. The wiring circuit board has a terminal part that is between the first insulating layer and the second insulating layer and that is exposed to the outside through the opening. The terminal part has a connection layer that is a part of the conductor layer, a barrier layer disposed on the connection layer, and an external connection layer disposed on the barrier layer, the external connection layer containing copper.SELECTED DRAWING: Figure 1
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to a wiring circuit board, a method for manufacturing the wiring circuit board, a semiconductor package including the wiring circuit board, and an electronic device.

Background Art

[0002] A wiring circuit board is manufactured by laminating a conductor portion such as wiring and various insulating layers on a base material. The conductor portion and the insulating layer are patterned, for example, by a photolithography method.

[0003] As a wiring circuit board, for example, it includes a first insulating layer, a terminal, a second insulating layer disposed on one side in the thickness direction of the terminal, and a wiring continuous in a direction intersecting the thickness direction of the terminal. The first insulating layer has an opening that penetrates in the thickness direction and has an opening cross-sectional area that widens as it goes toward one side in the thickness direction. The terminal has a peripheral portion that contacts the inner surface of the first insulating layer forming the opening, and a solid portion disposed integrally with the peripheral portion inside the peripheral portion. A wiring circuit board in which the peripheral portion and the solid portion fill the entire opening has been proposed (see Patent Document 1).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] A wiring circuit board is connected to, for example, a BGA (ball grid array) or the like. At this time, the terminal portion of the wiring circuit board is connected to solder balls. In the connection between the terminal portion of the wiring circuit board and the solder balls, there is a problem that the terminal portion becomes brittle due to the connection of dissimilar metals. When the terminal portion becomes brittle, the connection reliability decreases.

[0006] An object of the present invention is to provide a circuit connection substrate capable of suppressing a decrease in connection reliability by reducing a brittle portion of a terminal portion, a semiconductor package including the wiring circuit substrate, and an electronic device.

Means for Solving the Problems

[0007] As a result of intensive studies to solve the above problems, the present inventors have found that the above problems can be solved and have completed the present invention having the following gist. That is, the present invention includes the following.

[0008] [1] A wiring circuit substrate having a first insulating layer, a conductor layer disposed on the first insulating layer, and a second insulating layer disposed on the conductor layer and having an opening, which has a terminal portion between the first insulating layer and the second insulating layer and exposed to the outside by the opening, wherein the terminal portion has a connection layer that is a part of the conductor layer, a barrier layer disposed on the connection layer, and an external connection layer disposed on the barrier layer, and the external connection layer contains copper, Wiring circuit substrate. [2] The wiring circuit substrate according to [1], wherein the barrier layer contains at least one of chromium, titanium, and tungsten. [3] The wiring circuit substrate according to [1] or [2], wherein the conductor layer is a wiring layer having wirings in addition to the connection layer. [4] Further, the wiring circuit substrate according to any one of [1] to [3], which has a metal core layer on a surface of the first insulating layer opposite to the conductor layer side. [5] Further, the wiring circuit substrate according to [4], which has a third insulating layer on a surface of the metal core layer opposite to the first insulating layer side. [6] The wiring circuit substrate according to any one of [1] to [5], wherein the thickness of the external connection layer is 10 μm or less. [7] The wiring circuit substrate according to any one of [1] to [6], wherein the thickness of the barrier layer is 1 μm or less. [8] A semiconductor package including the wiring circuit board according to any one of [1] to [7]. [9] An electronic device including the semiconductor package according to [8].

[10] A method for manufacturing a wiring circuit board, which manufactures the wiring circuit board according to any one of [1] to [7], A step of forming a barrier layer precursor on a conductor layer formed on a first insulating layer; A step of forming an external connection layer by electrolytic plating on a part of the conductor layer, which is a connection layer, and on a part of the barrier layer precursor corresponding to the barrier layer, using the barrier layer precursor as a seed layer; A step of removing the barrier layer precursor other than the part that becomes the barrier layer; A method for manufacturing a wiring circuit board, including the above steps.

[11] The method for manufacturing a wiring circuit board according to

[10] , further including a step of forming a third insulating layer having the opening so that the external connection layer is exposed from the opening. [Advantages of the Invention]

[0009] According to the present invention, it is possible to provide a circuit connection board that can suppress a decrease in connection reliability by reducing a brittle portion of a terminal portion, and a semiconductor package and an electronic device including the wiring circuit board. [Brief Description of the Drawings]

[0010]

Figure 1

Figure 2

Figure 3A

Figure 3B

Figure 3C

Figure 3D

Figure 3E

Figure 3F

Figure 3G

Figure 3H

Figure 3I

Figure 4

Figure 5A

Figure 5B

Figure 5C

Figure 5D

Figure 5E

Figure 5F

Figure 5G

Figure 5H

Figure 5I

Figure 5J

Figure 5K

Figure 6

Figure 7A

Figure 7B

Figure 7C

Figure 7D

Figure 7E

Figure 7F

Figure 7G

Figure 7H

Figure 8

[0011] (Wiring Circuit Board and Method for Manufacturing Wiring Circuit Board) The wiring circuit board of the present invention has at least a first insulating layer, a conductor layer disposed on the first insulating layer, and a second insulating layer disposed on the conductor layer and having an opening, and further has other members as required. The wiring circuit board has a terminal portion. The terminal portion is between the first insulating layer and the second insulating layer. The terminal portion is exposed to the outside through the opening. The terminal portion has a connection layer that is a part of the conductor layer, a barrier layer disposed on the connection layer, and an external connection layer disposed on the barrier layer. The external connection layer contains copper.

[0012] The terminal portion for connecting to an external terminal such as a solder ball has a barrier layer between the connection layer and the external connection layer. By doing so, even when the terminal portion becomes brittle due to alloying caused by the connection of dissimilar metals such as the metal (for example, Sn) in the external terminal and the copper in the external connection layer, the embrittlement does not reach the connection layer below the barrier layer due to the barrier layer. Therefore, the brittle portion of the terminal portion can be reduced. As a result, a decrease in connection reliability can be suppressed. As a method for suppressing a decrease in connection reliability due to embrittlement of the terminal portion, a direction of increasing the thickness of the terminal portion can be considered. However, in that case, the formation of a thick terminal portion has new problems that it is difficult to control the thickness and the flatness of the wiring circuit board decreases. Also, when a part of the conductor layer serves as the terminal portion, if a thick conductor layer is formed, the aspect ratio of the wiring constituting the conductor layer becomes large, and defects in the wiring pattern (for example, pattern collapse) are likely to occur.

[0013] An example of the wiring circuit board of the present invention will be described below with reference to FIG. 1. The wiring circuit board shown in FIG. 1 has a first insulating layer 1, a conductor layer 2, and a second insulating layer 3. The conductor layer 2 is disposed on the first insulating layer 1. The conductor layer 2 is between the first insulating layer 1 and the second insulating layer 3. The conductor layer 2 has wiring in addition to the connection layer 2x described later. Therefore, the conductor layer 2 can be referred to as a wiring layer. Since the conductor layer 2 has wiring, wiring circuit boards with various wiring designs can be obtained, improving the degree of design freedom. The second insulating layer 3 is disposed on the conductor layer 2. The second insulating layer 3 not only lies on the conductor layer 2 but also fills the spaces between the wirings of the conductor layer 2. The second insulating layer 3 has an opening 3a. The opening 3a is a through hole that penetrates the second insulating layer 3 in the thickness direction. The wiring circuit board has a terminal portion 51. The terminal portion 51 is located between the first insulating layer 1 and the second insulating layer 3 and is exposed to the outside through the opening 3a. The terminal portion 51 does not fill the opening 3a. The terminal portion 51 has a connection layer 2x that is a part of the conductor layer 2, a barrier layer 4 disposed on the connection layer 2x, and an external connection layer 5 disposed on the barrier layer 4. In the terminal portion 51, the connection layer 2x, the barrier layer 4, and the external connection layer 5 are arranged side by side in the thickness direction. In the terminal portion 51, the connection layer 2x is on the side of the first insulating layer 1 with respect to the barrier layer 4, and the external connection layer 5 is on the side opposite to the first insulating layer 1 side with respect to the barrier layer 4. The connection layer 2x and the barrier layer 4 are in contact. The connection layer 2x and the external connection layer 5 are electrically connected but not physically in contact. The external connection layer 5 contains copper. The terminal portion 51 is a terminal for connecting to an external terminal such as a solder ball.

[0014] Another example of the wiring circuit board of the present invention will be described with reference to FIG. 2. The wiring circuit board shown in FIG. 2 has a metal core layer 10, a first insulating layer 1, a conductor layer 2, and a second insulating layer 3. The metal core layer 10 is on the surface of the first insulating layer 1 opposite to the conductor layer 2 side. In other words, the first insulating layer 1 is between the metal core layer 10 and the conductor layer 2. The conductor layer 2 is disposed on the first insulating layer 1. The conductor layer 2 is between the first insulating layer 1 and the second insulating layer 3. The conductor layer 2 has wirings (not shown) in addition to the connection layer 2x described later. Therefore, the conductor layer 2 can be referred to as a wiring layer. The second insulating layer 3 is disposed on the conductor layer 2. The second insulating layer 3 not only lies on the conductor layer 2 but also fills the spaces between the wirings of the conductor layer 2. The second insulating layer 3 has an opening 3a. The opening 3a is a through hole that penetrates the second insulating layer 3 in the thickness direction. The wiring circuit board has a terminal portion 51. The terminal portion 51 is between the first insulating layer 1 and the second insulating layer 3 and is exposed to the outside through the opening 3a. The terminal portion 51 does not fill the opening 3a. The terminal portion 51 has a connection layer 2x which is a part of the conductor layer 2, a barrier layer 4 disposed on the connection layer 2x, and an external connection layer 5 disposed on the barrier layer 4. In the terminal portion 51, the connection layer 2x, the barrier layer 4, and the external connection layer 5 are arranged in the thickness direction. In the terminal portion 51, the connection layer 2x is on the side of the first insulating layer 1 rather than the barrier layer 4, and the external connection layer 5 is on the side opposite to the side of the first insulating layer 1 rather than the barrier layer 4. The connection layer 2x and the barrier layer 4 are in contact. The connection layer 2x and the external connection layer 5 are electrically connected but not physically in contact. The external connection layer 5 contains copper. The terminal portion 51 is a terminal for connecting to an external terminal such as a solder ball.

[0015] The metal core layer is, for example, an element for ensuring the rigidity of the wiring circuit board. The material of the metal core layer is not particularly limited, and examples include Cu, Cu alloys, Al, stainless steel, FeNi alloys such as 42 alloy, and combinations thereof. Among these, from the viewpoints of thermal conductivity and electrical conductivity, Cu and Cu alloys are preferably used. Also, from the viewpoint of suppressing warping, stainless steel and 42 alloy are preferably used, and more preferably 42 alloy. The thickness of the metal core layer is not particularly limited. For example, it is 10 μm or more, preferably 15 μm or more, and for example, it is 500 μm or less, preferably 300 μm or less. In the present invention, "thickness" means the length in the thickness direction of the metal core layer. The thickness direction of the metal core layer refers to the direction orthogonal to the plane direction of the metal core layer.

[0016] When the metal core layer has a through hole, the shape of the through hole in the metal core layer is not particularly limited. In the present invention, the tapered shape means a shape in which one opening of the through-hole is larger than the other opening. Therefore, when the through-hole has a tapered shape, in a cross-section parallel to the thickness direction of the metal core layer, the shape of the side surface of the through-hole is, for example, trapezoidal.

[0017] When the metal core layer has a through-hole, the shape of the side surface of the through-hole in the metal core layer is not particularly limited. The shape of the side surface of the through-hole in the metal core layer may be arcuate or linear in a cross-section parallel to the thickness direction of the metal core layer. The arcuate shape here means a shape that is concave from the through-hole side toward the metal core layer side. When the shape is arcuate, it is possible to enhance the adhesion between the metal core layer and the insulating portion that is between the metal core layer and the conductor in the through-hole and provides electrical insulation between the metal core layer and the conductor. When the shape is linear, it becomes easier to form the seed layer when forming the interlayer connection portion during the manufacture of the wiring circuit board.

[0018] The material of the insulating layer (for example, the first insulating layer, the second insulating layer, the third insulating layer, the fourth insulating layer, the fifth insulating layer) in the wiring circuit board is not particularly limited, and examples thereof include synthetic resins. Examples of the synthetic resin include polyimide, polyamideimide, polyether nitrile, polyether sulfone, polyethylene terephthalate, polyethylene naphthalate, polyvinyl chloride, epoxy resin, phenol resin, acrylic resin, liquid crystal polymer, and the like. The insulating layer may contain particles (fillers). Examples of the particles include inorganic particles and organic particles. Inorganic particles are preferred as the particles. Examples of the inorganic particles include particles containing silica such as aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, aluminum oxide, aluminum nitride, boron nitride, crystalline silica, and amorphous silica. Further, examples of the material of the inorganic particles include simple metals such as aluminum, gold, silver, copper, and nickel, and alloys. Particles such as aluminum borate whiskers, amorphous carbon black, and graphite may also be used. The shape of the particles may be various shapes such as spherical, needle-like, and flake-like. As the particles, only one of the above or two or more thereof may be adopted. The resin used for forming the insulating layer may be a thermosetting resin or a thermoplastic resin. Further, the resin used for forming the insulating layer may be a photosensitive resin or a non-photosensitive resin. The insulating layer can be formed, for example, by the following method. (I): Lamination and hot pressing of a thermosetting insulating resin film (for example, a B-stage insulating resin film) (II): Coating and drying of a liquid resin composition When the insulating layer has an opening, examples of the method for forming the opening in the insulating layer include the following methods. (III): Laser irradiation when the insulating layer is formed using a thermosetting resin or a thermoplastic resin (IV): Selective exposure and development of a photosensitive resin film when the insulating layer is formed using a photosensitive resin The thickness of the insulating layer is not particularly limited. For example, it is 1 μm or more, preferably 3 μm or more, and for example, 35 μm or less, preferably 20 μm or less.

[0019] As the material of the conductor layer (for example, conductor layer 2, the second conductor layer 22 described later, the third conductor layer 24 described later) in the wiring circuit board, for example, a metal material can be mentioned. Examples of the metal material include copper, nickel, gold, solder, and their alloys. The thickness of the conductor layer is not particularly limited. For example, it is 3 μm or more, preferably 5 μm or more, and for example, 50 μm or less, preferably 30 μm or less. Since the connection layer is a part of the conductor layer, the material of the connection layer is the same as that of the conductor layer. The thickness of the connection layer is, for example, the same as that of the conductor layer. However, when the connection layer is on the interlayer connection portion, the thickness of the connection layer may be thicker than the thickness of other parts (for example, wiring) of the conductor layer.

[0020] The barrier layer is preferably a layer that does not form an alloy with the metal (for example, Sn) in an external terminal such as a solder ball, or a layer that is not easily embrittled even when forming an alloy. The material of the barrier layer is not particularly limited, and it may be a single metal, an alloy, or a metal oxide. Such a barrier layer is not particularly limited, but preferably contains at least one of chromium, titanium, nickel, and tungsten. By doing so, it can also serve as a seed layer when forming the external connection layer by electrolytic plating, and the productivity of the wiring circuit board is improved. The barrier layer may be a single layer or a multilayer. The thickness of the barrier layer is not particularly limited. For example, it is 2 μm or less, preferably 1 μm or less, and for example, 0.01 μm or more, preferably 0.03 μm or more. The thinner the thickness of the barrier layer, the thinner the wiring circuit board can be made. In that regard, the thickness of the barrier layer is preferably 1 μm or less. The thickness of the barrier layer is, for example, 1 / 1000 to 1 / 3 of the thickness of the external connection layer, preferably 1 / 500 to 1 / 10.

[0021] The external connection layer contains copper. Even when the wiring circuit board of the present invention contains copper that is prone to embrittlement due to alloy formation in the external connection layer, since it includes a barrier layer as the lower layer of the external connection layer, embrittlement of the entire terminal portion can be prevented. The external connection layer may contain components other than copper. The thickness of the external connection layer is not particularly limited. For example, it is 20 μm or less, preferably 10 μm or less, and for example, 1 μm or more, preferably 3 μm or more. The thinner the thickness of the external connection layer, the thinner the wiring circuit board can be made. In that regard, the thickness of the external connection layer is preferably 10 μm or less.

[0022] The main component of the interlayer connection portion described later is not particularly limited, and examples include metal materials. Examples of the metal material include copper, nickel, gold, silver, solder, and alloys thereof. The shape of the interlayer connection portion is not particularly limited. The cross-sectional shape of the interlayer connection portion is not particularly limited. For example, in a cross-section parallel to the thickness direction of the metal core layer, it may be rectangular or trapezoidal.

[0023] The wiring circuit board may have a seed layer (not shown). The seed layer is used as a conductive layer for electrolytic plating. Examples of the material of the seed layer include copper, chromium, titanium, nickel, tungsten, and alloys thereof. Also, the seed layer may be a single layer or multiple layers. In the case of multiple layers, examples of the material of each layer include copper, chromium, titanium, nickel, tungsten, and alloys thereof.

[0024] The manufacturing method of the wiring circuit board of the present invention includes the following steps. · A step of forming a barrier layer precursor on a conductor layer formed on the first insulating layer · Using the barrier layer precursor as a seed layer, a step of forming an external connection layer by electrolytic plating on a connection layer that is a part of the conductor layer and on a part of the barrier layer precursor corresponding to the barrier layer · Step of removing barrier layer precursors other than the portions that will become the barrier layer The method for manufacturing a wiring circuit board of the present invention is a method for manufacturing the wiring circuit board of the present invention.

[0025] An embodiment of the method for manufacturing a wiring circuit board shown in FIG. 2 will be described with reference to FIGS. 3A to 3I. First, a first insulating layer 1 is formed on one surface of the metal core layer 10 (FIG. 3A). The first insulating layer 1 can be formed, for example, by laminating a B-stage insulating resin film and forming the insulating layer by hot pressing.

[0026] Next, a patterned conductor layer 2 (wiring layer) is formed on the first insulating layer 1. For example, the patterned conductor layer 2 is formed by the following method. · Formation of a seed layer (not shown) on the first insulating layer 1 · Formation of a photoresist film on the seed layer · Formation of a resist pattern 15 by selective exposure and development of the photoresist film (partial exposure of the seed layer) (FIG. 3B) · Formation of the conductor layer 2 by electrolytic plating on the exposed seed layer (FIG. 3C) · Removal of the resist pattern 15 and removal of the unnecessary seed layer (FIG. 3D) The formed patterned electrolytic plating layer becomes the conductor layer 2.

[0027] Next, a barrier layer precursor 4x is formed on the conductor layer 2 formed on the first insulating layer 1 (FIG. 3E). The barrier layer precursor 4x is formed so as to cover the patterned conductor layer 2. Therefore, a part of the barrier layer precursor 4x is also formed on the first insulating layer 1 exposed between the patterned conductor layers 2. Note that the barrier layer precursor 4x on the portion that becomes the connection layer 2x which is a part of the conductor layer 2 becomes the barrier layer 4. The barrier layer precursor 4x also serves as a seed layer when the external connection layer 5 is formed by electrolytic plating. The barrier layer precursor 4x may be a single layer or a multi-layer. As a method for forming the barrier layer precursor 4x, for example, a method generally used as a method for forming a seed layer can be used. Examples of the method for forming the barrier layer precursor 4x include vapor deposition and sputtering.

[0028] Next, a photoresist film is formed on the barrier layer precursor 4x. Further, by selectively exposing and developing the photoresist film, a resist pattern 16 is formed such that a part of the barrier layer precursor 4x is exposed (FIG. 3F). The exposed barrier layer precursor 4x is the barrier layer precursor 4x on the location that becomes the connection layer 2x which is a part of the conductor layer 2.

[0029] Next, using the exposed barrier layer precursor 4x as a seed layer, electrolytic plating is performed on the barrier layer precursor 4x. By doing so, an external connection layer 5 is formed on the exposed barrier layer precursor 4x (FIG. 3G).

[0030] Next, the resist pattern 16 is removed, and the unnecessary barrier layer precursor 4x is removed (FIG. 3H). Thus, a terminal portion 51 having the connection layer 2x, the barrier layer 4 disposed on the connection layer 2x, and the external connection layer 5 disposed on the barrier layer 4 is formed. In FIG. 3H and the like, the barrier layer 4 and the external connection layer 5 are disposed on a part of the surface of the connection layer 2x, but the barrier layer 4 and the external connection layer 5 may be disposed on the entire surface of the connection layer 2x.

[0031] Next, a second insulating layer 3 is formed on the conductor layer 2. Further, an opening 3a is formed in the second insulating layer 3 so that the terminal portion 51 is exposed (FIG. 3I). The formation of the second insulating layer 3 having the opening 3a can be performed, for example, as follows. ·Laminating a B-stage insulating resin film and performing a thermal press ·Forming the opening 3a by laser irradiation or the like on the insulating layer Thus, the wiring circuit board shown in FIG. 2 (FIG. 3I) is obtained.

[0032] FIG. 4 is a schematic diagram of another embodiment of the wiring circuit board. The wiring circuit board shown in FIG. 4 has the following configuration, similar to the wiring circuit board shown in FIG. 2. The wiring circuit board shown in FIG. 4 includes a metal core layer 10, a first insulating layer 1, a conductor layer 2, and a second insulating layer 3. The metal core layer 10 is on the surface of the first insulating layer 1 opposite to the conductor layer 2 side. In other words, the first insulating layer 1 is between the metal core layer 10 and the conductor layer 2. The conductor layer 2 is disposed on the first insulating layer 1. The conductor layer 2 is between the first insulating layer 1 and the second insulating layer 3. The conductor layer 2 has wirings in addition to the connection layer 2x described later. Therefore, the conductor layer 2 can be referred to as a wiring layer. The second insulating layer 3 is disposed on the conductor layer 2. The second insulating layer 3 not only covers the conductor layer 2 but also fills the spaces between the wirings of the conductor layer 2. The second insulating layer 3 has an opening 3a. The opening 3a is a through hole that penetrates the second insulating layer 3 in the thickness direction. The wiring circuit board has a terminal portion 51. The terminal portion 51 is between the first insulating layer 1 and the second insulating layer 3 and is exposed to the outside through the opening 3a. The terminal portion 51 does not fill the opening 3a. The terminal portion 51 includes a connection layer 2x that is a part of the conductor layer 2, a barrier layer 4 disposed on the connection layer 2x, and an external connection layer 5 disposed on the barrier layer 4. In the terminal portion 51, the connection layer 2x, the barrier layer 4, and the external connection layer 5 are arranged in the thickness direction. In the terminal portion 51, the connection layer 2x is closer to the first insulating layer 1 than the barrier layer 4, and the external connection layer 5 is on the side opposite to the first insulating layer 1 side with respect to the barrier layer 4. The connection layer 2x and the barrier layer 4 are in contact. The connection layer 2x and the external connection layer 5 are electrically connected but not physically in contact. The external connection layer 5 contains copper.

[0033] The wiring circuit board shown in FIG. 4 further includes a third insulating layer 21, a second conductor layer 22, a fourth insulating layer 23, a third conductor layer 24, a fifth insulating layer 25, an interlayer connection portion 27, and a second terminal portion 51b. The third insulating layer 21 is on the surface of the metal core layer 10 opposite to the first insulating layer 1 side. The second conductor layer 22 is disposed on the third insulating layer 21. The fourth insulating layer 23 covers the second conductor layer 22. The third conductor layer 24 is disposed on the fourth insulating layer 23. The fifth insulating layer 25 covers the third conductor layer 24. The interlayer connection portion 27 penetrates through the through-hole of the metal core layer 10. The second terminal portion 51b is between the first insulating layer 1 and the second insulating layer 3 and is exposed to the outside through the opening 3a. The second terminal portion 51b does not fill the opening 3a. The second terminal portion 51b includes a connection layer 2x that is a part of the conductor layer 2, a barrier layer 4 disposed on the connection layer 2x, and an external connection layer 5 disposed on the barrier layer 4. In the second terminal portion 51b, the connection layer 2x, the barrier layer 4, and the external connection layer 5 are arranged in the thickness direction. In the second terminal portion 51b, the connection layer 2x is on the side of the first insulating layer 1 rather than the barrier layer 4, and the external connection layer 5 is on the side opposite to the side of the first insulating layer 1 rather than the barrier layer 4. The connection layer 2x and the barrier layer 4 are in contact. The connection layer 2x and the external connection layer 5 are electrically connected but not physically in contact. The external connection layer 5 contains copper. The interlayer connection portion 27 electrically connects the second terminal portion 51b and a part of the second conductor layer 22. The interlayer connection portion 27 is not electrically connected to the metal core layer 10. A part of the third conductor layer 24 is electrically connected to the interlayer connection portion 27 through a part of the second conductor layer 22. A part of the third conductor layer 24 that is electrically connected to the interlayer connection portion 27 serves as a terminal for external connection. Therefore, an opening 25a is provided in the fifth insulating layer 25 so that a part of the third conductor layer 24 is exposed. A part of the third conductor layer 24 that is electrically connected to the interlayer connection portion 27 is connected to, for example, a printed wiring board.

[0034] An example of the manufacturing method of the wiring circuit board shown in FIG. 4 will be described with reference to FIGS. 5A to 5K. Here, mainly, the manufacturing method of the region indicated by the broken line X in FIG. 4 will be described.

[0035] First, a third insulating layer 21 having an opening 21a is formed on one surface of the metal core layer 10 (FIG. 5A). The third insulating layer 21 can be formed, for example, by laminating a B-stage insulating resin film and forming the insulating layer by hot pressing. The opening 21a can be formed, for example, by laser irradiation on the formed insulating layer or the like.

[0036] Next, a patterned second conductor layer 22 is formed on the third insulating layer 21 (FIG. 5B). The second conductor layer 22 can be formed, for example, as follows. · Formation of a seed layer (not shown) on the third insulating layer 21 · Formation of a photoresist film (not shown) on the seed layer · Formation of a resist pattern by selective exposure and development of the photoresist film (partial exposure of the seed layer) · Electrolytic plating on the exposed seed layer · Removal of the photoresist film and removal of the unnecessary seed layer The formed patterned electrolytic plating layer becomes the second conductor layer 22. A part of the second conductor layer 22 fills the opening 21a.

[0037] Next, a fourth insulating layer 23 having an opening 23a is formed while covering the second conductor layer 22 so that a part of the second conductor layer 22 is exposed (FIG. 5C). The fourth insulating layer 23 can be formed, for example, by laminating a B-stage insulating resin film and forming the insulating layer by hot pressing. The opening 23a can be formed, for example, by laser irradiation on the formed insulating layer or the like.

[0038] Next, a patterned third conductor layer 24 is formed on the fourth insulating layer 23 (FIG. 5D). The third conductor layer 24 can be formed, for example, as follows. · Formation of a seed layer (not shown) on the fourth insulating layer 23 · Formation of a photoresist film (not shown) on the seed layer · Formation of a resist pattern by selective exposure and development of the photoresist film (partial exposure of the seed layer) ·Electroplating on the exposed seed layer ·Removal of the photoresist film and unnecessary seed layer The formed patterned electroplated layer becomes the third conductor layer 24. A part of the third conductor layer 24 fills the opening 23a and is electrically connected to the second conductor layer 22.

[0039] Next, a fifth insulating layer 25 having an opening 25a is formed while covering the third conductor layer 24 so that a part of the third conductor layer 24 is exposed (Fig. 5E). The formation of the fifth insulating layer 25 can be performed, for example, by laminating a B-stage insulating resin film and forming the insulating layer by thermal pressing. The formation of the opening 25a can be performed, for example, by laser irradiation on the formed insulating layer or the like.

[0040] Next, a through hole 10a is formed in the metal core layer 10 so that the entire surface on the side of the metal core layer 10 of the second conductor layer 22 filling the opening 21a of the third insulating layer 21 is exposed (Fig. 5F). The through hole 10a can be formed, for example, as follows. ·Formation of a photoresist film (not shown) on the metal core layer 10 ·Formation of a resist pattern by selective exposure and development of the photoresist film (partial exposure of the metal core layer 10) ·Wet etching of the exposed metal core layer 10 (for example, wet etching using ferric chloride) ·Removal of the photoresist film Thus, the through hole 10a is formed.

[0041] Next, a seed layer (not shown) is formed on the surface of the metal core layer 10 and the surface inside the through hole 10a. Furthermore, a photoresist film 26 is formed on the surface of the metal core layer 10 on which the seed layer is formed. At this time, the photoresist film 26 is once formed so as to fill the through hole 10a, and then the photoresist film at the location where the interlayer connection portion 27 in the through hole 10a is to be formed is removed by selective exposure and development (Fig. 5G).

[0042] Next, an interlayer connection portion 27 is formed in the through hole 10a (FIG. 5H). The formation of the interlayer connection portion 27 can be performed, for example, by electrolytic plating on a seed layer (not shown).

[0043] Next, the unnecessary photoresist film 26 and the unnecessary seed layer (not shown) are removed (FIG. 5I).

[0044] Next, the first insulating layer 1 is formed so as to fill the through hole 10a while covering the metal core layer 10 and the interlayer connection portion 27 (FIG. 5J). The first insulating layer 1 can be formed, for example, by laminating a B-stage insulating resin film and forming the insulating layer by hot pressing.

[0045] Next, an opening 1a is formed in the first insulating layer 1 so that the interlayer connection portion 27 is exposed (FIG. 5K). The opening 1a can be formed, for example, by laser irradiation or the like.

[0046] Next, the conductor layer 2, the terminal portion 51a, the second terminal portion 51b, and the second insulating layer 3 are formed by the same method as the method for manufacturing the wiring circuit board shown in FIG. 2 described with reference to FIGS. 3A to 3I. By doing so, the wiring circuit board shown in FIG. 4 is obtained.

[0047] FIG. 6 is a schematic diagram of another embodiment of the wiring circuit board. The wiring circuit board shown in FIG. 6 is different from the wiring circuit board shown in FIG. 4 in that a part of the conductor layer 2 extending convexly into the through hole of the metal core layer 10 is responsible for the interlayer connection between the conductor layer 2 and the second conductor layer 22, instead of the interlayer connection portion 27 disposed in the through hole of the metal core layer 10 in the wiring circuit board shown in FIG. 4, and the second conductor layer 22 does not fill the opening (opening 21a in FIG. 4) of the third insulating layer 21, but other points are the same as those of the wiring circuit board shown in FIG. 4.

[0048] An example of the manufacturing method of the wiring circuit board shown in FIG. 6 will be described with reference to FIGS. 7A to 7H. Here, mainly, the manufacturing method of the region indicated by the broken line X in FIG. 7 will be described.

[0049] First, a third insulating layer 21 is formed on one surface of the metal core layer 10 (FIG. 7A). The third insulating layer 21 can be formed, for example, by laminating a B-stage insulating resin film and forming the insulating layer by hot pressing.

[0050] Next, a patterned second conductor layer 22 is formed on the third insulating layer 21 (FIG. 7B). The second conductor layer 22 can be formed, for example, as follows. · Formation of a seed layer (not shown) on the third insulating layer 21 · Formation of a photoresist film (not shown) on the seed layer · Formation of a resist pattern by selective exposure and development of the photoresist film (partial exposure of the seed layer) · Electrolytic plating on the exposed seed layer · Removal of the photoresist film and unnecessary seed layer The formed patterned electrolytic plating layer becomes the second conductor layer 22.

[0051] Next, a fourth insulating layer 23 having an opening 23a is formed so as to cover the second conductor layer 22 and partially expose the second conductor layer 22 (FIG. 7C). The fourth insulating layer 23 can be formed, for example, by laminating a B-stage insulating resin film and forming the insulating layer by hot pressing. The opening 23a can be formed, for example, by laser irradiation on the formed insulating layer.

[0052] Next, a patterned third conductor layer 24 is formed on the fourth insulating layer 23 (FIG. 7D). The third conductor layer 24 can be formed, for example, as follows. · Formation of a seed layer (not shown) on the fourth insulating layer 23 · Formation of a photoresist film (not shown) on the seed layer · Formation of a resist pattern by selective exposure and development of the photoresist film (partial exposure of the seed layer) · Electrolytic plating on the exposed seed layer · Removal of the photoresist film and unnecessary seed layer The formed patterned electrolytic plating layer becomes the third conductor layer 24. A part of the third conductor layer 24 fills the opening 23a and is electrically connected to the second conductor layer 22.

[0053] Next, a fifth insulating layer 25 having an opening 25a is formed while covering the third conductor layer 24 so that a part of the third conductor layer 24 is exposed (FIG. 7E). The formation of the fifth insulating layer 25 can be performed, for example, by laminating a B-stage insulating resin film and forming the insulating layer by hot pressing. The formation of the opening 25a can be performed, for example, by laser irradiation on the formed insulating layer or the like.

[0054] Next, a through hole 10a is formed at a predetermined position of the metal core layer 10 (FIG. 7F). The through hole 10a can be formed, for example, as follows. The predetermined position is a position where a part of the second conductor layer 22 exists in the thickness direction. · Formation of a photoresist film (not shown) on the metal core layer 10 · Formation of a resist pattern by selective exposure and development of the photoresist film (partial exposure of the metal core layer 10) · Wet etching of the exposed metal core layer 10 (for example, wet etching using ferric chloride) · Removal of the photoresist film Through the above, the through hole 10a is formed.

[0055] Next, a first insulating layer 1 is formed so as to cover the metal core layer 10 and fill the through hole 10a (FIG. 7G). The formation of the first insulating layer 1 can be performed, for example, by laminating a B-stage insulating resin film and forming the insulating layer by hot pressing.

[0056] Next, an opening 1a is formed that penetrates the first insulating layer 1 filling the through hole 10a and penetrates the third insulating layer 21 in contact with the first insulating layer 1 (FIG. 7H). The formation of the opening 1a can be performed, for example, by laser irradiation on the insulating layer or the like.

[0057] Next, in the same manner as the method for manufacturing the wiring circuit board shown in FIG. 2 described with reference to FIGS. 3A to 3I, the conductor layer 2, the terminal portion 51a, the second terminal portion 51b, and the second insulating layer 3 are formed. By doing so, the wiring circuit board shown in FIG. 6 is obtained. At this time, when forming the conductor layer 2 by electrolytic plating, it is preferable to use an electrolytic plating solution that can fill the deep holes of the opening 1a.

[0058] FIG. 8 is a schematic diagram of another embodiment of the wiring circuit board. The wiring circuit board shown in FIG. 8 is different from the wiring circuit board shown in FIG. 4 in that the interlayer connection portion 27 disposed in the through hole of the metal core layer 10 fills the opening of the third insulating layer 21, and the second conductor layer 22 in the portion in contact with the interlayer connection portion 27 is not convex, but other points are the same as those of the wiring circuit board shown in FIG. 4.

[0059] (Semiconductor Package) The semiconductor package of the present invention includes the wiring circuit board of the present invention. The semiconductor package includes, for example, a semiconductor chip connected to the wiring circuit board. The semiconductor package includes, for example, a sealing resin for sealing the semiconductor chip. Examples of the semiconductor package include FC-CSP (Flip Chip-Chip Scale Package), MIS-BGA (Molded Interconnect Substrate-Ball Grid Array) package, ETS-BGA (Embedded Trace Substrate-Ball Grid Array) package, Fan-out type WLP (Wafer Level Package), Fan-in type WLP, Fan-out type PLP (Panel Level Package), Fan-in type PLP, FC-BGA type (Flip Chip-Chip, -Ball Grid Array), high-end 2.5D, 3D Package, and the like.

[0060] (Electronic Device) The electronic device of the present invention includes the semiconductor package of the present invention. The electronic device is not particularly limited, and examples thereof include ICT infrastructure devices such as servers, routers, supercomputers, mainframes, workstations, etc.; antennas such as GPS antennas, wireless base station antennas, millimeter-wave antennas, RFID antennas, etc.; communication devices such as mobile phones, smartphones, PHS, PDAs, tablet terminals, etc.; digital devices such as personal computers, TVs, digital cameras, digital video cameras, POS terminals, wearable terminals, digital media players, etc.; in-vehicle electronic devices such as electronic control system devices, in-vehicle communication devices, car navigation devices, millimeter-wave radars, in-vehicle camera modules, etc.; semiconductor test devices, high-frequency measurement devices, etc.

Explanation of symbols

[0061] 1 First insulating layer 2 Conductor layer 2x Connection layer 3 Second insulating layer 3a Opening 4 Barrier layer 4x Barrier layer precursor 5 External connection layer 10 Metal core layer 15 Resist pattern 16 Resist pattern 21 Third insulating layer 22 Second conductor layer 23 Fourth insulating layer 23a Opening 24 Third conductor layer 25 Fifth insulating layer 25a Opening 26 Photoresist film 51 Terminal part 51a Terminal part 51b Second terminal part

Claims

1. A wiring circuit board having a first insulating layer, a conductor layer disposed on the first insulating layer, and a second insulating layer disposed on the conductor layer and having an opening, which is between the first insulating layer and the second insulating layer and has a terminal portion exposed to the outside by the opening, wherein the terminal portion has a connection layer that is a part of the conductor layer, a barrier layer disposed on the connection layer, and an external connection layer disposed on the barrier layer, and the external connection layer contains copper, A wiring circuit board.

2. The wiring circuit board according to claim 1, wherein the barrier layer contains at least one of chromium, titanium, and tungsten.

3. The wiring circuit board according to claim 1, wherein the conductor layer is a wiring layer having wirings in addition to the connection layer.

4. Further, the wiring circuit board according to claim 1, further comprising a metal core layer on a surface of the first insulating layer opposite to the conductor layer side.

5. Further, the wiring circuit board according to claim 4, further comprising a third insulating layer on a surface of the metal core layer opposite to the first insulating layer side.

6. The wiring circuit board according to claim 1, wherein a thickness of the external connection layer is 10 μm or less.

7. The wiring circuit board according to claim 1, wherein a thickness of the barrier layer is 1 μm or less.

8. A semiconductor package including the wiring circuit board according to any one of claims 1 to 7.

9. An electronic device including the semiconductor package according to claim 8.

10. A method for manufacturing a wiring circuit board, which manufactures the wiring circuit board according to any one of claims 1 to 7, the method comprising: a step of forming a barrier layer precursor on a conductor layer formed on a first insulating layer, Using the barrier layer precursor as a seed layer, forming an external connection layer by electrolytic plating on a part of the conductor layer, which is a connection layer, and on a part of the barrier layer precursor corresponding to the barrier layer; Removing the barrier layer precursor other than the part that becomes the barrier layer; A method for manufacturing a wiring circuit board, comprising:

11. The method for manufacturing a wiring circuit board according to claim 10, further comprising a step of forming a third insulating layer having the opening so that the external connection layer is exposed from the opening.

Citation Information

Patent Citations

  • Wiring circuit board and imaging apparatus

    JP2018190950A