Semiconductor device and display device

Abstract

To provide a semiconductor device including a transistor with a minute size.SOLUTION: A semiconductor device includes a transistor and a capacitor. The transistor is a vertical transistor. Of two conductive layers functioning as a source electrode and a drain electrode, the conductive layer existing on an upper side and an insulating layer functioning as a gate insulating layer also function as one electrode of the capacitor and a dielectric, respectively. The conductive layer provided on the dielectric while overlapping with the one electrode of the capacitor and the dielectric functions as the other electrode of the capacitor. A gate electrode of the transistor and the other electrode of the capacitor include the same material.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] One aspect of the present invention relates to a transistor. One aspect of the present invention relates to a capacitor. One aspect of the present invention relates to a semiconductor device having a transistor and a capacitor. One aspect of the present invention relates to a display device having the semiconductor device.

[0002] Note that one aspect of the present invention is not limited to the above technical field. Examples of the technical field of one aspect of the present invention disclosed in this specification and the like include semiconductor devices, display devices, light-emitting devices, power storage devices, storage devices, lighting devices, input devices, input / output devices, electronic devices having these, driving methods thereof, or manufacturing methods thereof. The semiconductor device refers to all devices that can function by utilizing semiconductor characteristics.

Background Art

[0003] As one of the display devices, there is a liquid crystal display device using a liquid crystal element as a display element. For example, an active matrix type liquid crystal display device in which pixel electrodes are arranged in a matrix and a switching element is connected to each of the pixel electrodes is used in various devices such as smartphones, tablet terminals, monitor devices, television devices, and digital signage.

[0004] Liquid crystal display devices are roughly classified into two types: transmissive type and reflective type. The larger the effective light-emitting area ratio (also referred to as the aperture ratio) in a pixel of a liquid crystal display device, the brighter the display can be, which also leads to a reduction in power consumption. Therefore, an improvement in the aperture ratio is required.

[0005] For example, an active matrix type liquid crystal display device using a transistor using a metal oxide in a channel formation region as a switching element connected to each of the pixel electrodes is known. Patent Document 1 discloses a liquid crystal display device in which a transistor using a metal oxide in a channel formation region is applied and the aperture ratio is increased.

Prior Art Documents

Patent Documents

[0006] Patent Document 1 Japanese Patent Application Laid-Open No. 2018-189938 Summary of the Invention Problems to be Solved by the Invention

[0007] One aspect of the present invention is to provide a semiconductor device having transistors of a fine size and a display device having the semiconductor device. Or, one aspect of the present invention is to provide a small semiconductor device and a display device having the semiconductor device. Or, one aspect of the present invention is to provide a display device with high definition. Or, one aspect of the present invention is to provide a highly reliable display device. Or, one aspect of the present invention is to provide a display device with high display quality. Or, one aspect of the present invention is to provide a display device with a high aperture ratio. Or, one aspect of the present invention is to provide a display device capable of high-speed driving.

[0008] One aspect of the present invention is to provide a semiconductor device, a display device, a transistor, an electronic device, etc. having a novel configuration. One aspect of the present invention is to at least reduce at least one of the problems of the prior art.

[0009] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not necessarily need to solve all of these problems. Note that other problems can be extracted from the description of the specification, drawings, claims, etc. Means for Solving the Problems

[0010] One aspect of the present invention has a transistor, a capacitor, and a first insulating layer. The transistor has a first conductive layer, a second conductive layer, a third conductive layer, a semiconductor layer, and a second insulating layer. The first insulating layer is located on the first conductive layer. The second conductive layer is located on the first insulating layer. The second conductive layer and the first insulating layer have an opening reaching the first conductive layer. In the opening, the semiconductor layer is in contact with the side surface of the second conductive layer, the side surface of the first insulating layer, and the upper surface of the first conductive layer. The second insulating layer is in contact with the upper surface of the semiconductor layer and the upper surface of the second conductive layer. The third conductive layer is located on the second insulating layer so as to have a region overlapping with the semiconductor layer. The capacitor has a second conductive layer, a second insulating layer, and a fourth conductive layer. The fourth conductive layer is located on the second insulating layer so as to have a region overlapping with the second conductive layer. It is a semiconductor device.

[0011] Also, in the above, it is preferable that the third conductive layer and the fourth conductive layer have the same material.

[0012] Also, in the above, on the same layer as the first conductive layer, there is a fifth conductive layer. The fifth conductive layer has a region overlapping with the second conductive layer via the first insulating layer. It is preferable that the capacitor has, in addition to the second conductive layer, the second insulating layer, and the fourth conductive layer, the fifth conductive layer and the first insulating layer.

[0013] Also, in the above, the semiconductor layer has a region sandwiched between the second conductive layer and the fourth conductive layer, and it is preferable that the region functions as a dielectric of the capacitor.

[0014] Also, one aspect of the present invention is a semiconductor device having a transistor, a capacitor, and a first insulating layer. The transistor has a first conductive layer, a second conductive layer, a third conductive layer, a semiconductor layer, and a second insulating layer. The first insulating layer is located on the first conductive layer. The second conductive layer is located on the first insulating layer. The second conductive layer and the first insulating layer have a first opening reaching the first conductive layer. In the first opening, the semiconductor layer is in contact with the side surface of the second conductive layer, the side surface of the first insulating layer, and the upper surface of the first conductive layer. The second insulating layer is in contact with the upper surface of the semiconductor layer and the upper surface of the second conductive layer. The third conductive layer is located on the second insulating layer so as to have a region overlapping with the semiconductor layer. The capacitor has a first conductive layer, a second insulating layer, and a fourth conductive layer. The first insulating layer has a second opening reaching the first conductive layer. In the second opening, the second insulating layer is in contact with the side surface of the first insulating layer and the upper surface of the first conductive layer. The fourth conductive layer is located on the second insulating layer so as to have a region overlapping with the second opening.

[0015] Also, in the above, it is preferable that the third conductive layer and the fourth conductive layer have the same material.

[0016] Also, one aspect of the present invention is a display device having the above semiconductor device and a display element.

[0017] Also, in the above, it is preferable that the display element is a liquid crystal element.

[0018] Also, in the above, it is preferable that the display element is a light-emitting element.

Advantages of the Invention

[0019] According to one aspect of the present invention, a semiconductor device having transistors of a fine size and a display device having the semiconductor device can be provided. Or, according to one aspect of the present invention, a small semiconductor device and a display device having the semiconductor device can be provided. Or, according to one aspect of the present invention, a display device with high definition can be provided. Or, according to one aspect of the present invention, a highly reliable display device can be provided. Or, according to one aspect of the present invention, a display device with high display quality can be provided. Or, according to one aspect of the present invention, a display device with a high aperture ratio can be provided. Or, according to one aspect of the present invention, a display device capable of high-speed driving can be provided.

[0020] According to one aspect of the present invention, a semiconductor device, a display device, a transistor, an electronic device, etc. having a novel configuration can be provided. According to one aspect of the present invention, at least one of the problems of the prior art can be at least alleviated.

[0021] Note that the description of these effects does not prevent the existence of other effects. Note that one aspect of the present invention does not necessarily have to have all of these effects. Note that other effects can be extracted from the descriptions in the specification, drawings, claims, etc.

Brief Description of the Drawings

[0022]

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Best Mode for Carrying Out the Invention

[0023] Hereinafter, embodiments will be described with reference to the drawings. However, the embodiments can be implemented in many different modes, and it is easily understood by those skilled in the art that the forms and details can be variously changed without departing from the spirit and scope thereof. Therefore, the present invention should not be construed as being limited to the description of the following embodiments.

[0024] In the configuration of the invention described below, the same reference numerals are commonly used among different drawings for the same part or parts having the same or similar functions, and the repeated description thereof will be omitted. Also, when referring to similar functions, the hatching patterns may be the same, and there may be cases where no reference numerals are particularly assigned.

[0025] In each of the drawings described in this specification, the size of each component, the thickness of a layer, or a region may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

[0026] The ordinal numbers such as "first" and "second" in this specification are attached to avoid confusion of components and are not numerically limiting.

[0027] A transistor is a type of semiconductor device and can realize functions such as amplifying current or voltage and a switching operation for controlling conduction or non-conduction. The transistors in this specification include IGFETs (Insulated Gate Field Effect Transistors) and thin film transistors (TFTs: Thin Film Transistors).

[0028] Also, the functions of "source" and "drain" may be interchanged when transistors of different polarities are employed, or when the direction of current changes in a circuit operation. For this reason, in this specification, the terms "source" and "drain" are assumed to be interchangeable.

[0029] In addition, "connection" in this specification includes, for example, "electrical connection".

[0030] In order to define the connection relationship of circuit elements as a thing, when expressing it as "electrical connection", "electrical connection" includes, for example, "direct connection" and "indirect connection". "A and B are directly connected" means, for example, that A and B are connected without passing through a circuit element (for example, a transistor or a switch, etc. Note that wiring is not a circuit element). On the other hand, "A and B are indirectly connected" means, for example, that A and B are connected through one or more circuit elements.

[0031] Here, when defining "A and B are indirectly connected", it means, for example, the connection relationship in the following cases. That is, when assuming that the circuit is operating, if there is a timing during the operation period of the circuit when an electrical signal is transmitted or received or a potential interaction occurs between A and B, such a circuit can be defined as "A and B are indirectly connected" as a thing. Note that even if there is a timing when no electrical signal is transmitted or received or potential interaction occurs between A and B, if there is a timing during the operation period of the circuit when an electrical signal is transmitted or received or a potential interaction occurs between A and B, it can be defined as "A and B are indirectly connected".

[0032] Examples of the case where "A and B are indirectly connected" include the case where A and B are connected through the sources and drains of one or more transistors.

[0033] However, exceptionally, there may be cases where it cannot be said that "A and B are indirectly connected." Examples of such exceptional cases include when a capacitive element is connected between A and B, or when a gate insulating film of a transistor or the like is interposed between A and B. In this case, it shall not be said that "A (gate of the transistor) and B (source or drain of the transistor) are indirectly connected."

[0034] Another example of a case where it cannot be said that "A and B are indirectly connected" is when a plurality of transistors are connected between A and B via their sources and drains, and a constant potential V is supplied from a power supply, GND, or the like to a node between the transistors.

[0035] In addition, in this specification and the like, "the upper surface shapes are substantially the same" means that at least a part of the contours overlap between the stacked layers. For example, it includes cases where the upper layer and the lower layer are processed by the same mask pattern or a part of them is processed by the same mask pattern. However, strictly speaking, the contours may not overlap, and the upper layer may be located inside the lower layer or outside the lower layer. Even in this case, it may be said that "the upper surface shapes are substantially the same."

[0036] In addition, in this specification and the like, the upper surface shape of a certain component means the contour shape of the component in a plan view. Also, the plan view means viewing from the normal direction of the surface on which the component is formed or the surface of the support (e.g., substrate) on which the component is formed.

[0037] In the following, expressions indicating directions such as "up" and "down" are basically used in accordance with the direction of the drawing. However, for the purpose of facilitating the explanation, etc., the direction indicated by "up" or "down" in the specification may not match the drawing. As an example, when explaining the lamination order (or formation order) of a laminate, etc., even if the surface (formed surface, support surface, adhesive surface, flat surface, etc.) on the side where the laminate is provided in the drawing is located above the laminate, the formed surface may be expressed as being below, and the laminate may be expressed as being above, etc.

[0038] Also, in this specification, etc., the term "film" and the term "layer" can be interchanged with each other. For example, the term "insulating layer" may be mutually interchangeable with the term "insulating film" in some cases.

[0039] (Embodiment 1) In this embodiment, a display device according to one aspect of the present invention will be described.

[0040] [Configuration Example of Display Device] FIG. 1(A) shows a block diagram of a display device 100 according to one aspect of the present invention. The display device 100 includes a pixel portion 101, a source line driving circuit portion 102, a gate line driving circuit portion 103, a protection circuit portion 104, and a touch sensor driving circuit portion 105.

[0041] The pixel portion 101 is an area where a plurality of pixels are arranged in a matrix. At least one display element and a pixel circuit are provided in one pixel. At least one gate line and at least one source line are connected to the pixel circuit. The pixel circuit has at least one transistor and one capacitor. As the display element, various elements can be used. Typically, a light-emitting element (also referred to as a light-emitting device) having a function of emitting light such as an organic EL (Electro Luminescence) element or an LED (Light Emitting Diode) element, a liquid crystal element, or a MEMS (Micro Electro Mechanical Systems) element can be applied.

[0042] The source line driving circuit unit 102 is a circuit connected to the source line and outputting a signal to the source line. The source line driving circuit unit 102 can be configured to include one or more of a shift register circuit, a sampling switch, a latch circuit, an analog amplifier circuit, and a demultiplexer (DeMUX) circuit.

[0043] The gate line driving circuit unit 103 is a circuit connected to the gate line and outputting a signal to the gate line. The gate line driving circuit can be configured to include a shift register circuit, an analog amplifier circuit, etc.

[0044] The protection circuit unit 104 has a function of preventing a surge voltage from being applied due to static electricity or the like to a gate line, a source line, a capacitance line, a power supply line, etc., and destroying transistors or the like provided in the pixel circuit. For example, when a surge voltage is applied, it can be configured to discharge charges to a common wiring or the like. The protection circuit can be constituted by non-linear elements arranged in parallel with the target wiring interposed therebetween. The non-linear element is constituted by a two-terminal element such as a diode or a three-terminal element such as a transistor. For example, by connecting the gate terminal and the drain terminal of a transistor, characteristics similar to those of a diode can be obtained.

[0045] The touch sensor driving circuit unit 105 has a function of outputting a signal for driving a touch sensor provided within the pixel unit 101 or overlaid with the pixel unit 101, and a function of outputting a signal input from the touch sensor. As the touch sensor, various methods such as a capacitance method, a resistive film method, an infrared method, an electromagnetic induction method, a surface acoustic wave method, and an optical method can be adopted. In particular, it is preferable to use a capacitance method or an optical method sensor. Note that when a touch sensor is not required, the touch sensor driving circuit unit 105 may not be provided.

[0046] A transistor applicable to a display device according to an aspect of the present invention will be described.

[0047] First, there is a transistor in which a source electrode and a drain electrode are located at different heights with respect to the substrate surface, and the current flowing through the semiconductor layer flows in the height direction. That is, since it can be said that the channel length direction has a component in the height direction (vertical direction), the transistor according to one aspect of the present invention can also be called a vertical transistor, a vertical channel transistor, etc. Hereinafter, it may be referred to as a vertical transistor.

[0048] The channel length of the vertical transistor can be precisely controlled by the thickness of the insulating layer that functions as a spacer between the source electrode and the drain electrode. By making the insulating layer thinner, it is possible to obtain a transistor with an extremely short channel length, and a transistor with a large current (hereinafter also referred to as an on-current) that can flow in the on state can be realized. Furthermore, by using an oxide semiconductor for the semiconductor layer, the leakage current (hereinafter also referred to as an off-current) in the off state can be made extremely small. Therefore, the vertical transistor is suitable for use as a switching element.

[0049] Second, there is a transistor having a top gate structure in which a semiconductor layer is provided on a plane and a gate is disposed above it (hereinafter may be referred to as a TG transistor). In one aspect of the present invention, it is preferable to use an oxide semiconductor layer for the semiconductor layer of the TG transistor. The TG transistor can increase the channel length. Therefore, when the transistor operates in the saturation region, the change in the source-drain current can be made small with respect to the change in the gate-source voltage. For example, by applying a TG transistor to the driving transistor included in the pixel circuit, the amount of current flowing through the light-emitting device can be finely controlled. For this reason, the number of gradations in the pixel circuit can be increased. Also, even if there are variations in the electrical characteristics (for example, resistance) of the light-emitting device or variations in the electrical characteristics, a stable current can flow.

[0050] The third is a transistor using a crystalline silicon thin film for the semiconductor layer. Typically, low temperature polycrystalline silicon (LTPS) can be used. Hereinafter, the transistor using LTPS may be referred to as an LTPS transistor. Since the LTPS transistor has a high field-effect mobility, the on-current can be increased. Also, by using LTPS for the semiconductor material of the transistor, an n-type transistor and a p-type transistor can be simultaneously fabricated on the same plane. Therefore, since the LTPS transistor can form a CMOS circuit, power consumption can be reduced by applying it to a drive circuit or the like. Also, by applying a p-type LTPS transistor to the driving transistor of the pixel, a stable circuit operation can be realized as compared with the case where only n-type transistors are used.

[0051] Also, a transistor using single crystal silicon for the semiconductor layer can be used. A transistor using a part of a single crystal silicon substrate for the semiconductor layer has a much higher field-effect mobility than an LTPS transistor and is suitable for use in a drive circuit (for example, the source line drive circuit section 102, the touch sensor drive circuit section 105, etc.) that requires high-speed operation.

[0052] The vertical transistor has a feature that it can be miniaturized more than the TG transistor. The TG transistor has a feature that it has a smaller parasitic capacitance compared with the vertical transistor. The vertical transistor and the LTPS transistor using an oxide semiconductor layer have a feature that they can increase the on-current compared with the TG transistor using an oxide semiconductor layer. By using LTPS for the semiconductor material of the transistor, a p-channel type transistor can be easily fabricated.

[0053] The pixel section 101 is required to realize high-brightness display. Therefore, it is preferable to apply a vertical transistor having a large on-current to the pixel section 101. Alternatively, it is preferable to apply a vertical transistor and an LTPS transistor.

[0054] On the other hand, when the parasitic capacitance between the wirings constituting the pixel portion 101 is large, the influence of the noise between the wirings becomes large, resulting in a decrease in display quality. Therefore, in this case, it is preferable to apply a TG transistor with a small parasitic capacitance to the pixel portion 101. Alternatively, it is preferable to apply a TG transistor and an LTPS transistor.

[0055] The gate line driving circuit section 103 is required to operate at high speed. Therefore, it is preferable to apply one or both of a vertical transistor and an LTPS transistor having a large on-current to the gate line driving circuit section 103.

[0056] The source line driving circuit section 102 is required to operate even faster than the gate line driving circuit section 103. Therefore, it is preferable to apply one or more of a vertical transistor having a large on-current, an LTPS transistor, and a transistor using single crystal silicon to the source line driving circuit section 102.

[0057] Any of a vertical transistor, a TG transistor, and an LTPS transistor may be used for the protection circuit section 104.

[0058] Similar to the gate line driving circuit section 103, the touch sensor driving circuit section 105 is required to operate at high speed. Therefore, it is preferable to apply one or both of a vertical transistor and an LTPS transistor.

[0059] The display device 100 can apply two or more of a vertical transistor, a TG transistor, and an LTPS transistor. At this time, it is preferable to fabricate the two or more transistors on the same substrate through the same process.

[0060] FIG. 1(B) shows an example of a pixel circuit applicable to the pixel section 101. FIG. 1(B) is an example when a liquid crystal element is applied to the display element. The pixel has a transistor Tr, a capacitor C, and a liquid crystal element LC. Further, a gate line GL, a source line SL, and a common line CL are connected to the pixel. The gate line GL functions as a gate line, the source line SL functions as a source line, and a fixed potential is applied to the common line CL.

[0061] One electrode of the transistor Tr has its gate connected to the gate line GL, one of its source or drain connected to the source line SL, and the other of its source or drain connected to one electrode of the capacitor C and one electrode of the liquid crystal element LC, respectively. The other electrode of the capacitor C is connected to the common line CL. The other electrode of the liquid crystal element LC functions as a common electrode. For example, a vertical transistor can be applied to the transistor Tr. By applying a vertical transistor to the transistor Tr, miniaturization can be achieved more than in the case of applying a TG transistor, so that a high-definition pixel section 101 can be realized.

[0062] Further, by using an oxide semiconductor for the semiconductor layer of the vertical transistor, the leakage current in the off state can be made extremely small. Therefore, by applying a vertical transistor using an oxide semiconductor for the semiconductor layer as the transistor Tr, a display device 100 capable of operating with lower power consumption than in the case of applying an LTPS transistor can be realized.

[0063] Here, for example, when the display device 100 has both a vertical transistor using an oxide semiconductor in the semiconductor layer and an LTPS transistor, it is necessary to stack and provide a first layer for forming the vertical transistor and a second layer for forming the LTPS transistor. Among these, it is preferable to provide a vertical transistor as the transistor Tr mainly constituting the pixel portion 101 in the first layer. Since the vertical transistor can achieve both a large on-current and a small leakage current, a high voltage can be applied to the liquid crystal element LC in the pixel portion 101, and leakage from the capacitor C can be suppressed. On the other hand, in the second layer, it is preferable to provide an LTPS transistor as the transistor mainly constituting portions that require high-speed operation, such as the gate line drive circuit portion 103 and the source line drive circuit portion 102. That is, in the case where both a vertical transistor and an LTPS transistor are used in the display device 100, the number of LTPS transistors in the second layer is more likely to be larger than the number of vertical transistors in the first layer. In other words, the occupied area of the transistors in the first layer is likely to be smaller than the occupied area of the transistors in the second layer.

[0064] Therefore, components other than the transistor Tr constituting the pixel portion 101, such as the capacitor C, are preferably provided in the same first layer as the vertical transistor rather than the LTPS transistor. Thereby, the empty space of the first layer in plan view can be effectively utilized. Also, by providing the capacitor C using the empty space, a sufficient occupied area for the capacitor can be ensured. Therefore, the capacitance value can be increased. In addition, since there is no need to form the capacitor C in the second layer, another element (such as a transistor) other than the capacitor can be arranged at a high density in the second layer. Note that the vertical transistor and the capacitor are preferably provided using some common processes. Thereby, the number of processes for the entire display device 100 can be reduced.

[0065] As the liquid crystal element LC included in the display device 100, elements with various configurations can be used. Typically, a transmissive liquid crystal element to which a VA (Vertical Alignment) mode, an FFS (Fringe Field Switching) mode, an IPS (In-Plane-Switching) mode, or the like is applied can be used. Further, as the liquid crystal element, not only a transmissive type but also a reflective type or a transflective type liquid crystal element may be used. Further, the display device is preferably a normally black type liquid crystal display device.

[0066] For example, as the VA mode, an MVA (Multi-Domain Vertical Alignment) mode, a PVA (Patterned Vertical Alignment) mode, an ASV (Advanced Super View) mode, or the like can be used.

[0067] Further, as the liquid crystal element LC, a liquid crystal element to which various modes are applied can be used. For example, in addition to the VA mode, the FFS mode, and the IPS mode, a liquid crystal element to which a TN (Twisted Nematic) mode, an ASM (Axially Symmetric aligned Micro-cell) mode, an OCB (Optically Compensated Birefringence) mode, an FLC (Ferroelectric Liquid Crystal) mode, an AFLC (AntiFerroelectric Liquid Crystal) mode, an ECB (Electrically Controlled Birefringence) mode, a guest-host mode, or the like is applied can be used.

[0068] Here, a liquid crystal display device is a display device that controls light transmission or non-transmission by utilizing the polarization and optical modulation effect of liquid crystal. The optical modulation effect of liquid crystal is controlled by an electric field applied to the liquid crystal (including a horizontal electric field, a vertical electric field, or an oblique electric field). As the liquid crystal that can be used for a liquid crystal element, thermotropic liquid crystal, low molecular liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal (PDLC: Polymer Dispersed Liquid Crystal), polymer network liquid crystal (PNLC: Polymer Network Liquid Crystal), ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions. Also, as the liquid crystal material, either a positive-type liquid crystal or a negative-type liquid crystal may be used, and an optimal liquid crystal material may be used according to the applied mode or design.

[0069] [Pixel configuration example] Hereinafter, a pixel configuration example applicable to the pixel portion 101 will be described.

[0070] <Example 1 of configuration> Fig. 2(A) shows a plan view (also referred to as a top view) of the semiconductor device 10_1 included in the pixel. Fig. 2(B) shows a cross-sectional view taken along the dashed-dotted line A - B shown in Fig. 2(A). Fig. 2(C) shows an enlarged cross-sectional view of the transistor 20_1 included in the semiconductor device 10_1 shown in Fig. 2(B). Note that in Fig. 2(A), some of the components (such as an insulating layer) of the semiconductor device 10_1 are omitted. Regarding the plan view of a semiconductor device or the like, in the following drawings as well, some of the components will be omitted in the same manner as Fig. 2(A).

[0071] The semiconductor device 10_1 has a transistor 20_1 and a capacitor 30_1 on an insulating layer 11 on a substrate (not shown).

[0072] Transistor 20_1 includes a conductive layer 22 that functions as one of the source electrode or the drain electrode, a conductive layer 23 that functions as the other of the source electrode or the drain electrode, a semiconductor layer 24, an insulating layer 25 that functions as a gate insulating layer, and a conductive layer 26 that functions as a gate electrode. Transistor 20_1 is a vertical transistor in which the source electrode and the drain electrode are located at different heights, and the current flowing through the semiconductor layer flows in the height direction.

[0073] Capacitor 30_1 includes a conductive layer 23 that functions as one of the electrodes, a conductive layer 32 that functions as the other electrode, and an insulating layer 25 that functions as a dielectric.

[0074] As described above, the conductive layer 23 can function as the other of the source electrode or the drain electrode of the transistor 20_1, and can also function as one of the electrodes of the capacitor 30_1. The insulating layer 25 can function as the gate insulating layer of the transistor 20_1, and can also function as the dielectric of the capacitor 30_1. In the conductive layer 23, it can also be said that a part functions as the other of the source electrode or the drain electrode of the transistor 20_1, and another part functions as one of the electrodes of the capacitor 30_1. In the insulating layer 25, it can also be said that a part functions as the gate insulating layer of the transistor 20_1, and another part functions as the dielectric of the capacitor 30_1. In the semiconductor device 10_1, by adopting a configuration in which a part of the components is shared by the transistor 20_1 and the capacitor 30_1, the number of steps involved in manufacturing the semiconductor device 10_1 can be reduced.

[0075] The detailed configuration of the semiconductor device 10_1 will be described.

[0076] On the insulating layer 11, a conductive layer 22, a conductive layer 52, and a conductive layer 53 are provided. On the insulating layer 11, on the conductive layer 22, on the conductive layer 52, and on the conductive layer 53, an insulating layer 21 is provided. In the insulating layer 21, a conductive layer 62 is provided so as to have a region overlapping with the conductive layer 52, and a conductive layer 63 is provided so as to have a region overlapping with the conductive layer 53. The conductive layer 62 and the conductive layer 63 are each provided so as to be embedded in the insulating layer 21. The heights of the upper surfaces of the conductive layer 62, the conductive layer 63, and the insulating layer 21 are substantially the same. On the insulating layer 21, a conductive layer 23 and a conductive layer 73 are provided. The conductive layer 23 is provided so as to have a region overlapping with the conductive layer 22 and the conductive layer 52. The conductive layer 73 is provided so as to have a region overlapping with the conductive layer 53. The conductive layer 23 has a region in contact with the upper surface of the conductive layer 62 and a region in contact with a part of the upper surface of the insulating layer 21. The conductive layer 73 has a region in contact with the upper surface of the conductive layer 63 and a region in contact with another part of the upper surface of the insulating layer 21. The conductive layer 23 and the conductive layer 73 can be formed simultaneously by processing the same material. Also, the conductive layer 22, the conductive layer 52, and the conductive layer 53 can be formed simultaneously by processing the same material.

[0077] In the conductive layer 23 and the insulating layer 21, an opening 14 reaching the conductive layer 22 is provided. A semiconductor layer 24 is provided in contact with the side wall (i.e., the side surfaces of the conductive layer 23 and the insulating layer 21 in the opening 14) and the bottom surface (i.e., the upper surface of the conductive layer 22 in the opening 14) of the opening 14, and the upper surface of the conductive layer 23. On the semiconductor layer 24, on the conductive layer 23, on the conductive layer 73, and on the insulating layer 21, an insulating layer 25 is provided. The insulating layer 25 has a region in contact with the upper surface and the side surface of the semiconductor layer 24, a region in contact with the upper surface and the side surface of the conductive layer 23, a region in contact with the upper surface and the side surface of the conductive layer 73, and a region in contact with the upper surface of the insulating layer 21.

[0078] Also, in the insulating layer 25, a conductive layer 83 is provided so as to have a region overlapping with the conductive layer 73. The conductive layer 83 is provided so as to be embedded in the insulating layer 25.

[0079] On the insulating layer 25, a conductive layer 26 and a conductive layer 32 are provided. The conductive layer 26 is provided so as to have a region overlapping with the conductive layer 22 and the semiconductor layer 24. That is, the conductive layer 26 is provided such that at least a part thereof is located within the opening 14 provided in the conductive layer 23 and the insulating layer 21. The conductive layer 32 is provided so as to have a region overlapping with the conductive layer 23 and the conductive layer 73. The conductive layer 32 has a region in contact with the upper surface of the conductive layer 83.

[0080] On the conductive layer 26, on the conductive layer 32, and on the insulating layer 25, an insulating layer 31 is provided. The insulating layer 31 is provided so as to fill the unevenness of the transistor 20_1 and the capacitor 30_1.

[0081] Among the semiconductor layer 24, the region in contact with the conductive layer 22 functions as one of the source region or the drain region of the transistor 20_1. Among the semiconductor layer 24, the region in contact with the conductive layer 23 functions as the other of the source region or the drain region of the transistor 20_1. Among the semiconductor layer 24, the region sandwiched between the source region and the drain region functions as a channel formation region. That is, among the side walls of the opening 14 provided in the conductive layer 23 and the insulating layer 21, the region of the semiconductor layer 24 in contact with the side surface of the insulating layer 21 functions as a channel formation region. Inside the opening 14, the semiconductor layer 24 has a region facing the conductive layer 26 with the insulating layer 25 interposed therebetween.

[0082] Note that there is no limitation on the semiconductor applied to the semiconductor layer 24, but it is particularly preferable to use an oxide semiconductor. Hereinafter, unless otherwise specified, the case where an oxide semiconductor is used for the semiconductor layer 24 will be described.

[0083] The insulating layer 11 is provided with a conductive layer 41, a conductive layer 42, and a conductive layer 43. The conductive layer 41, the conductive layer 42, and the conductive layer 43 are each provided so as to be embedded in the insulating layer 11. The conductive layer 41 is provided so as to have a region overlapping with the conductive layer 22. The conductive layer 42 is provided so as to have a region overlapping with the conductive layer 52. The conductive layer 43 is provided so as to have a region overlapping with the conductive layer 53. The heights of the upper surfaces of the conductive layer 41, the conductive layer 42, the conductive layer 43, and the insulating layer 11 are substantially the same.

[0084] For example, in the pixel circuit shown in FIG. 1(B), the conductive layer 41 functions as a plug that connects one of the source electrode or the drain electrode of the transistor Tr and the wiring SL. The conductive layer 42 and the conductive layer 62 function as plugs that connect the other of the source electrode or the drain electrode of the transistor Tr, one electrode of the capacitor C, and one electrode of the liquid crystal element LC via the conductive layer 52. The conductive layer 43, the conductive layer 63, and the conductive layer 83 function as plugs that connect the other electrode of the capacitor C and the wiring CL via the conductive layer 53 and the conductive layer 73.

[0085] Using FIG. 2(C), the channel length and channel width of the transistor 20_1, which is a vertical transistor, will be described.

[0086] The channel length of the transistor 20_1 is the distance between the source region and the drain region. In FIG. 2(C), the channel length L20_1 of the transistor 20_1 is indicated by double arrows of a broken line. In FIG. 2(C), the distance along the semiconductor layer 24 in the region between the conductive layer 22 and the conductive layer 23 is shown as the channel length L20_1 of the transistor 20_1.

[0087] Note that, as the channel length L20_1 of the transistor 20_1, the thickness of the insulating layer 21 in the region sandwiched between the conductive layer 22 and the conductive layer 23 may be used. Alternatively, as the channel length L20_1 of the transistor 20_1, the thickness of the thickest region of the insulating layer 21 may be used. Or, as the channel length L20_1 of the transistor 20_1, the sum of the thickness of the insulating layer 21 in the region sandwiched between the conductive layer 22 and the conductive layer 23 and the thickness of the conductive layer 23 may be used.

[0088] Here, the channel length L20_1 of the transistor 20_1 is determined by, for example, the thickness of the insulating layer 21, the thickness of the conductive layer 23, the angle θ21 formed by the side wall (here, the side surface of the insulating layer 21 in the opening 14) and the bottom surface (here, the upper surface of the conductive layer 22 in the opening 14) of the opening 14 formed in the conductive layer 23 and the insulating layer 21, etc., and is not affected by the performance of the exposure apparatus used in the fabrication of the transistor. Therefore, the channel length L20_1 can be set to a value smaller than the limit resolution of the exposure apparatus, and a transistor with a fine size can be realized.

[0089] The channel length L20_1 can be, for example, 5 nm or more and less than 3 μm, 7 nm or more and 2.5 μm or less, 10 nm or more and 2 μm or less, 10 nm or more and 1.5 μm or less, 10 nm or more and 1.2 μm or less, 10 nm or more and 1 μm or less, 10 nm or more and 500 nm or less, 10 nm or more and 300 nm or less, 10 nm or more and 200 nm or less, 10 nm or more and 100 nm or less, 10 nm or more and 50 nm or less, 10 nm or more and 30 nm or less, or 10 nm or more and 20 nm or less. For example, the channel length L20_1 can also be 100 nm or more and 1 μm or less. By shortening the channel length L20_1, the on-current of the transistor 20_1 can be increased.

[0090] The angle θ21 can be, for example, 30 degrees or more and 90 degrees or less, 35 degrees or more and 85 degrees or less, 40 degrees or more and 80 degrees or less, 45 degrees or more and 80 degrees or less, 50 degrees or more and 80 degrees or less, 55 degrees or more and 80 degrees or less, 60 degrees or more and 80 degrees or less, 65 degrees or more and 80 degrees or less, or 70 degrees or more and 80 degrees or less. The smaller the angle θ21, the more preferable it is because the covering property of the layer (such as the semiconductor layer 24) formed along the side wall of the opening 14 formed in the conductive layer 23 and the insulating layer 21 can be enhanced. On the other hand, the closer the angle θ21 is to 90 degrees, the more preferable it is because the occupation area of the transistor with respect to the substrate surface can be reduced.

[0091] The channel width of the transistor 20_1 is the length of the source region or the drain region in a plan view (Fig. 2(A)). That is, the channel width of the transistor 20_1 is the length of the region where the semiconductor layer 24 and the conductive layer 22 are in contact, or the length of the region where the semiconductor layer 24 and the conductive layer 23 are in contact in a plan view. Alternatively, as the channel width of the transistor 20_1, an intermediate value between the length of the region where the semiconductor layer 24 and the conductive layer 22 are in contact and the length of the region where the semiconductor layer 24 and the conductive layer 23 are in contact in a plan view may be used.

[0092] Here, the channel width of the transistor 20_1 will be described as the perimeter length in the region where the semiconductor layer 24 and the side surface of the conductive layer 23 are in contact in the opening 14 formed in the conductive layer 23 and the insulating layer 21. In Figs. 2(A) and 2(C), the channel width W20_1 of the transistor 20_1 is indicated by double arrows of solid lines. The channel width W20_1 can also be referred to as the perimeter of the opening 14 in a plan view.

[0093] The channel width W20_1 is determined by the upper surface shape of the opening 14 or the like. In FIGS. 2(A) and 2(C), the width D20_1 of the opening 14 is indicated by double-headed arrows of a two-dot chain line. The width D20_1 refers to the shorter side of the smallest rectangle circumscribing the opening 14 in a plan view. When forming the opening 14 using a photolithography method, the width D20_1 of the opening 14 is equal to or greater than the limit resolution of the exposure apparatus. The width D20_1 is, for example, 0.20 μm or more and less than 5.0 μm. When the upper surface shape of the opening 14 is circular, the width D20_1 corresponds to the diameter of the opening 14, and the channel width W20_1 can be calculated as "D20_1 × π".

[0094] Incidentally, the upper surface shape of the opening 14 can be, for example, circular or elliptical. The upper surface shape of the opening 14 may be a polygon such as a triangle, a quadrilateral (including a rectangle, a rhombus, a square), a pentagon, or a shape in which the corners of these polygons are rounded. As shown in FIG. 2(A), the upper surface shape of the opening 14 is preferably circular. By making the upper surface shape of the opening 14 circular, the processing accuracy when forming the opening 14 can be improved, and a fine-sized opening 14 can be formed. In this specification and the like, the circular shape is not limited to a perfect circle.

[0095] <Configuration Example 2> FIGS. 3(A) and 3(B) show a semiconductor device 10_2 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 3(A) is a plan view of the semiconductor device 10_2. FIG. 3(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 3(A).

[0096] The semiconductor device 10_2 includes a transistor 20_2 and a capacitor 30_2. Regarding the transistor 20_2, reference can be made to the description related to the transistor 20_1 included in the semiconductor device 10_1. The semiconductor device 10_2 has a different configuration of the capacitor 30_2 from that of the capacitor 30_1 included in the semiconductor device 10_1.

[0097] Specifically, in the semiconductor device 10_2, the conductive layer 53 is provided to extend to the A side of the one-dot chain line A-B rather than the semiconductor device 10_1, and the capacitor 30_2 has the insulating layer 21 and the conductive layer 53 in addition to the configuration of the capacitor 30_1.

[0098] In the capacitor 30_2, similar to the capacitor 30_1, the region where the conductive layer 23, the insulating layer 25, and the conductive layer 32 overlap can function as a capacitor (first capacitor). Further, in the capacitor 30_2, the region where the conductive layer 53, the insulating layer 21, and the conductive layer 23 overlap can also function as a capacitor (second capacitor).

[0099] That is, the capacitor 30_2 can have a larger capacitance value than the capacitor 30_1 by the amount of the second capacitor. Also, as described for the semiconductor device 10_1, the conductive layer 53 functions as a part of the conductive layer connecting one electrode of the capacitor C and one electrode of the liquid crystal element LC in the pixel circuit shown in FIG. 1(B). Therefore, in the semiconductor device 10_2, the conductive layer 53 serves both as a part of the conductive layer and as one electrode forming the second capacitor. Also, the insulating layer 21 serves both as a spacer between the source electrode and the drain electrode of the transistor 20_2 and as a dielectric forming the second capacitor. Therefore, the number of processes can be reduced as compared with the case where the part of the conductive layer and the capacitor 30_2 are separately fabricated.

[0100] Regarding the semiconductor device 10_2, for the rest, reference can be made to the description of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B).

[0101] <Configuration Example 3> FIGS. 4(A) and 4(B) show a semiconductor device 10_3 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 4(A) is a plan view of the semiconductor device 10_3. FIG. 4(B) is a cross-sectional view taken along the one-dot chain line A-B shown in FIG. 4(A).

[0102] The semiconductor device 10_3 includes a transistor 20_3 and a capacitor 30_3. In the semiconductor device 10_3, the configuration of the semiconductor layer is different from that of the semiconductor device 10_1.

[0103] Specifically, the semiconductor device 10_3 includes a semiconductor layer 24_1 provided on the conductive layer 23 and a semiconductor layer 24_2 provided on the conductive layer 73. In a plan view (FIG. 4(A)), the end of the semiconductor layer 24_1 coincides with the conductive layer 23. The end of the semiconductor layer 24_2 coincides with the conductive layer 73. Therefore, the semiconductor layer 24_1 and the conductive layer 23, and the semiconductor layer 24_2 and the conductive layer 73 can be formed collectively using the same mask. As a result, unlike the semiconductor device 10_1, it is not necessary to separately form the conductive layers 23 and 73 and the semiconductor layer 24, so the number of manufacturing steps can be reduced.

[0104] The capacitor 30_3 includes the semiconductor layer 24_1 and the insulating layer 25 between the conductive layer 23 and the conductive layer 32. Therefore, in the capacitor 30_3, the semiconductor layer 24_1 and the insulating layer 25 in the region sandwiched between the conductive layer 23 and the conductive layer 32 function as a dielectric. That is, the semiconductor layer 24_1 functions as the semiconductor layer of the transistor in the region overlapping with the transistor 20_3, and functions as the dielectric of the capacitor in the region overlapping with the capacitor 30_3.

[0105] Regarding the semiconductor device 10_3, for other aspects, reference can be made to the description of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B).

[0106] <Configuration Example 4> FIGS. 5(A) and 5(B) show a semiconductor device 10_4 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 5(A) is a plan view of the semiconductor device 10_4. FIG. 5(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 5(A).

[0107] The semiconductor device 10_4 includes a transistor 20_4 and a capacitor 30_4. The semiconductor device 10_4 has a configuration that combines the semiconductor device 10_2 shown in FIGS. 3(A) and 3(B) and the semiconductor device 10_3 shown in FIGS. 4(A) and 4(B).

[0108] Specifically, in the semiconductor device 10_4, similar to the semiconductor device 10_2, the conductive layer 53 is provided to extend to the A side of the one-dot chain line A - B from the semiconductor device 10_1. Also, similar to the semiconductor device 10_3, it has a semiconductor layer 24_1 provided on the conductive layer 23 and a semiconductor layer 24_2 provided on the conductive layer 73.

[0109] Since the semiconductor device 10_4 has the above-described configuration, effects similar to those of the semiconductor device 10_2 and the semiconductor device 10_3 can be obtained.

[0110] Regarding the semiconductor device 10_4, for other aspects, reference can be made to the descriptions related to the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B), the semiconductor device 10_2 shown in FIGS. 3(A) and 3(B), and the semiconductor device 10_3 shown in FIGS. 4(A) and 4(B).

[0111] <Configuration Example 5> FIGS. 6(A) and 6(B) show a semiconductor device 10_5 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 6(A) is a plan view of the semiconductor device 10_5. FIG. 6(B) is a cross-sectional view taken along the one-dot chain line A - B shown in FIG. 6(A).

[0112] The semiconductor device 10_5 includes a transistor 20_5 and a capacitor 30_5. The semiconductor device 10_5 is different from the semiconductor device 10_1 in that the conductive layer functioning as the other of the source electrode or drain electrode of the transistor 20_5 and the conductive layer functioning as one of the electrodes of the capacitor 30_5 are separately formed, while the semiconductor device 10_1 shares the same conductive layer (conductive layer 23) for the transistor 20_1 and the capacitor 30_1.

[0113] The transistor 20_5 has a conductive layer 23_1 as a conductive layer that functions as the other of the source electrode or the drain electrode. The capacitor 30_5 has a conductive layer 23_2 as a conductive layer that functions as one of the electrodes.

[0114] In the case of such a configuration, for example, by connecting the conductive layer 41 and the conductive layer 42 below the insulating layer 11 (not shown), the transistor 20_5 can function as the transistor Tr in the pixel circuit shown in FIG. 1(B), and the capacitor 30_5 can function as the capacitor C in the pixel circuit shown in FIG. 1(B). In this case, the source electrode and the drain electrode are interchanged between the transistor 20_1 included in the semiconductor device 10_1 and the transistor 20_5 included in the semiconductor device 10_5. Also, one electrode and the other electrode are interchanged between the capacitor 30_1 included in the semiconductor device 10_1 and the capacitor 30_5 included in the semiconductor device 10_5.

[0115] Regarding the semiconductor device 10_5, for other than the above, the description related to the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B) can be referred to.

[0116] <Configuration Example 6> FIGS. 7(A) and 7(B) show a semiconductor device 10_6 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 7(A) is a plan view of the semiconductor device 10_6. FIG. 7(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 7(A).

[0117] The semiconductor device 10_6 has a transistor 20_6 and a capacitor 30_6. The semiconductor device 10_6 has a configuration that combines the semiconductor device 10_2 shown in FIGS. 3(A) and 3(B) and the semiconductor device 10_5 shown in FIGS. 6(A) and 6(B).

[0118] Specifically, in the semiconductor device 10_6, similar to the semiconductor device 10_2, the conductive layer 53 is provided to extend to the A side of the one-dot chain line A-B from the semiconductor device 10_1. Also, similar to the semiconductor device 10_5, the conductive layer 23_1 that functions as the other of the source electrode or drain electrode of the transistor and the conductive layer 23_2 that functions as one of the electrodes of the capacitor are separately formed.

[0119] Since the semiconductor device 10_6 has the above-described configuration, effects similar to those of the semiconductor device 10_2 and the semiconductor device 10_5 can be obtained.

[0120] Regarding the semiconductor device 10_6, for other than the above, reference can be made to the descriptions related to the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B), the semiconductor device 10_2 shown in FIGS. 3(A) and 3(B), and the semiconductor device 10_5 shown in FIGS. 6(A) and 6(B).

[0121] <Constitutional Example 7> FIGS. 8(A) and 8(B) show a semiconductor device 10_7 having a configuration different from that of the semiconductor device 10_5 shown in FIGS. 6(A) and 6(B). FIG. 8(A) is a plan view of the semiconductor device 10_7. FIG. 8(B) is a cross-sectional view taken along the one-dot chain line A-B shown in FIG. 8(A).

[0122] The semiconductor device 10_7 includes a transistor 20_7 and a capacitor 30_7. The semiconductor device 10_7 has a different connection method between the conductive layer 52 and the conductive layer 23_2 from that of the semiconductor device 10_5. Also, the connection method between the conductive layer 53 and the conductive layer 32 is different from that of the semiconductor device 10_5.

[0123] Specifically, in the semiconductor device 10_7, the conductive layer 52 and the conductive layer 23_2 are connected via the conductive layer 65, the conductive layer 33, and the conductive layer 66. Also, the conductive layer 53 and the conductive layer 32 are connected via the conductive layer 64.

[0124] The conductive layer 65 is formed to fill the openings provided in the insulating layer 25 and the insulating layer 21, and has a region in contact with the upper surface of the conductive layer 52. The conductive layer 66 is formed to fill another opening provided in the insulating layer 25, and has a region in contact with the upper surface of the conductive layer 23_2. The conductive layer 33 is provided on the insulating layer 25 so as to have a region overlapping with the conductive layer 65 and the conductive layer 66. The conductive layer 33 has a region in contact with the upper surface of the conductive layer 65, the upper surface of the conductive layer 66, and the upper surface of the insulating layer 25. The conductive layers 65 and 66 function as plugs connecting the conductive layer 52 and the conductive layer 23_2 via the conductive layer 33. The conductive layer 26, the conductive layer 33, and the conductive layer 32 can be formed simultaneously by processing the same material.

[0125] The conductive layer 64 is formed to fill the openings (openings different from the openings where the conductive layer 65 is provided) provided in the insulating layer 25 and the insulating layer 21, and has a region in contact with the upper surface of the conductive layer 53. The conductive layer 32 is provided on the insulating layer 25 so as to have a region overlapping with the conductive layer 64. The conductive layer 32 has a region in contact with the upper surface of the conductive layer 64 and the upper surface of the insulating layer 25. The conductive layer 64 functions as a plug connecting the conductive layer 53 and the conductive layer 32. The conductive layers 64 and 65 can be formed simultaneously by processing the same material.

[0126] Regarding the semiconductor device 10_7, for other aspects, reference can be made to the description related to the semiconductor device 10_5 shown in FIGS. 6(A) and 6(B).

[0127] <Configuration Example 8> FIGS. 9(A) and 9(B) show a semiconductor device 10_8 having a configuration different from that of the semiconductor device 10_5 shown in FIGS. 6(A) and 6(B). FIG. 9(A) is a plan view of the semiconductor device 10_8. FIG. 9(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 9(A).

[0128] The semiconductor device 10_8 includes a transistor 20_8 and a capacitor 30_8. The semiconductor device 10_8 is different from the semiconductor device 10_5 in that a semiconductor layer 27 is used as a component that functions as one electrode of the capacitor 30_8.

[0129] The semiconductor layer 27 is provided on the insulating layer 21 so as to have a region overlapping with the conductive layer 32. The semiconductor layer 27 is in contact with the upper surface of the conductive layer 62 and the upper surface of the insulating layer 21. In a plan view (FIG. 9(A)), the semiconductor layer 27 has the same shape as the conductive layer 23_2 included in the semiconductor device 10_5 and is disposed at a position corresponding to the conductive layer 23_2. That is, it can be said that the semiconductor device 10_8 has a configuration in which the conductive layer 23_2 in the semiconductor device 10_5 is replaced with the semiconductor layer 27. In the semiconductor device 10_8, the semiconductor layer 24 and the semiconductor layer 27 can be formed simultaneously by processing the same semiconductor material.

[0130] In the capacitor 30_8 included in the semiconductor device 10_8, since the semiconductor layer 27 functions as one electrode, it preferably has a high conductivity. For example, after processing the same semiconductor material to form the semiconductor layer 24 and the semiconductor layer 27 in an island shape, it is preferable to add impurities such as hydrogen only to the semiconductor layer 27 to reduce the resistance. Thereby, the semiconductor layer 27 can function as one electrode of the capacitor 30_8.

[0131] Regarding the semiconductor device 10_8, for other matters, reference can be made to the description of the semiconductor device 10_5 shown in FIGS. 6(A) and 6(B).

[0132] <Example Configuration 9> FIGS. 10(A) and 10(B) show a semiconductor device 10_9 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 10(A) is a plan view of the semiconductor device 10_9. FIG. 10(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 10(A).

[0133] The semiconductor device 10_9 has a transistor 20_9 and a capacitor 30_9. The semiconductor device 10_9 has a configuration combining the semiconductor device 10_7 shown in FIGS. 8(A) and 8(B) and the semiconductor device 10_8 shown in FIGS. 9(A) and 9(B).

[0134] Specifically, in the semiconductor device 10_9, similar to the semiconductor device 10_7, it has a conductive layer 65, a conductive layer 33, and a conductive layer 66 that connect the conductive layer 52 and one electrode of the capacitor. Also, similar to the semiconductor device 10_8, it has a semiconductor layer 27 that functions as one electrode of the capacitor.

[0135] Since the semiconductor device 10_9 has the above-described configuration, effects similar to those of the semiconductor device 10_7 and the semiconductor device 10_8 can be obtained.

[0136] Regarding the semiconductor device 10_9, for other aspects, reference can be made to the descriptions related to the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B), the semiconductor device 10_7 shown in FIGS. 8(A) and 8(B), and the semiconductor device 10_8 shown in FIGS. 9(A) and 9(B).

[0137] <Configuration Example 10> FIGS. 11(A) and 11(B) show a semiconductor device 10_10 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 11(A) is a plan view of the semiconductor device 10_10. FIG. 11(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 11(A).

[0138] The semiconductor device 10_10 has a transistor 20_10 and a capacitor 30_10. The semiconductor device 10_10 has a configuration combining the semiconductor device 10_2 shown in FIGS. 3(A) and 3(B) and the semiconductor device 10_8 shown in FIGS. 9(A) and 9(B).

[0139] Specifically, in the semiconductor device 10_9, similar to the semiconductor device 10_2, the conductive layer 53 is provided to extend to the A side of the dashed-dotted line A-B from the semiconductor device 10_1. Also, similar to the semiconductor device 10_8, it has a semiconductor layer 27 that functions as one electrode of the capacitor.

[0140] Since the semiconductor device 10_10 has the above-described configuration, effects similar to those of the semiconductor device 10_2 and the semiconductor device 10_8 can be obtained.

[0141] Regarding the semiconductor device 10_10, for other than the above, reference can be made to the descriptions related to the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B), the semiconductor device 10_2 shown in FIGS. 3(A) and 3(B), and the semiconductor device 10_8 shown in FIGS. 9(A) and 9(B).

[0142] <Configuration Example 11> FIGS. 12(A) and 12(B) show a semiconductor device 10_11 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 12(A) is a plan view of the semiconductor device 10_11. FIG. 12(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 12(A).

[0143] The semiconductor device 10_11 has a transistor 20_11 and a capacitor 30_11. The semiconductor device 10_11 is different from the semiconductor device 10_1 in that the semiconductor layer 24 is provided to extend to the B side of the dashed-dotted line A-B from the semiconductor device 10_1 and that the capacitor 30_11 does not have a conductive layer 23.

[0144] In the semiconductor device 10_11, the semiconductor layer 24 has a region that overlaps not only the transistor 20_11 but also the capacitor 30_11. The semiconductor layer 24 is provided on the sidewalls of the opening 14 provided in the conductive layer 23 and the insulating layer 21 (i.e., the side surfaces of the conductive layer 23 and the insulating layer 21 in the opening 14) and the bottom surface (i.e., the upper surface of the conductive layer 22 in the opening 14) in addition to the region in contact with the upper surface of the conductive layer 23, the region in contact with the side surface of the conductive layer 23 on the side not facing the opening 14, and the region in contact with the upper surface of the insulating layer 21. Further, the semiconductor layer 24 has a region that overlaps the conductive layer 32 via the insulating layer 25.

[0145] In the semiconductor device 10_11, in the region where the semiconductor layer 24 overlaps the transistor 20_11, it functions as the semiconductor layer of the transistor, and in the region where it overlaps the capacitor 30_11, it functions as one electrode of the capacitor.

[0146] Since the semiconductor device 10_11 has the above-described configuration, it is not necessary to separately process the semiconductor layer of the transistor 20_11 and one electrode of the capacitor 30_11, so the number of processes can be reduced.

[0147] Note that in the semiconductor layer 24, the region overlapping the conductive layer 32 preferably has a high conductivity because it functions as one electrode of the capacitor 30_11. For example, after forming the semiconductor layer 24, it is preferable to add impurities such as hydrogen only to the region of the semiconductor layer 24 that overlaps the capacitor 30_11 to reduce the resistance. Thereby, the region of the semiconductor layer 24 can function as one electrode of the capacitor 30_11.

[0148] Regarding the semiconductor device 10_11, for other than the above, reference can be made to the description regarding the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B).

[0149] <Configuration Example 12> FIG. 13(A) and FIG. 13(B) show a semiconductor device 10_12 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 13(A) is a plan view of the semiconductor device 10_12. FIG. 13(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 13(A).

[0150] The semiconductor device 10_12 has a transistor 20_12 and a capacitor 30_12. The semiconductor device 10_12 has a configuration combining the semiconductor device 10_2 shown in FIGS. 3(A) and 3(B) and the semiconductor device 10_11 shown in FIGS. 12(A) and 12(B).

[0151] Specifically, in the semiconductor device 10_12, similar to the semiconductor device 10_2, a conductive layer 53 is provided so as to extend to the A side of the semiconductor device 10_1 with respect to the dashed-dotted line A-B. Also, similar to the semiconductor device 10_11, a semiconductor layer 24 is provided so as to extend to the B side of the semiconductor device 10_1 with respect to the dashed-dotted line A-B, and the capacitor 30_12 does not have a conductive layer 23.

[0152] Since the semiconductor device 10_12 has the above-described configuration, effects similar to those of the semiconductor device 10_2 and the semiconductor device 10_11 can be obtained.

[0153] Regarding the semiconductor device 10_12, for other matters than the above, reference can be made to the descriptions related to the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B), the semiconductor device 10_2 shown in FIGS. 3(A) and 3(B), and the semiconductor device 10_11 shown in FIGS. 12(A) and 12(B).

[0154] <Configuration Example 13> FIG. 14(A) and FIG. 14(B) show a semiconductor device 10_13 having a configuration different from that of the semiconductor device 10_3 shown in FIGS. 4(A) and 4(B). FIG. 14(A) is a plan view of the semiconductor device 10_13. FIG. 14(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 14(A).

[0155] The semiconductor device 10_13 includes a transistor 20_13 and a capacitor 30_13. The semiconductor device 10_13 is different from the semiconductor device 10_3 that shares the same conductive layer (conductive layer 23) and the same semiconductor layer (semiconductor layer 24_1) in the transistor 20_3 and the capacitor 30_3 in that a conductive layer functioning as the other of the source electrode or the drain electrode of the transistor 20_13 and a conductive layer functioning as one of the electrodes of the capacitor 30_13 are separately formed, and also in that the semiconductor layer of the transistor 20_13 and the semiconductor layer functioning as the dielectric of the capacitor 30_13 are separately formed.

[0156] The transistor 20_13 has a conductive layer 23_1 as a conductive layer functioning as the other of the source electrode or the drain electrode. The capacitor 30_13 has a conductive layer 23_2 as a conductive layer functioning as one of the electrodes. Further, the transistor 20_13 has a semiconductor layer 24_1 as the semiconductor layer of the transistor 20_13. The capacitor 30_13 has a semiconductor layer 24_3 as the dielectric.

[0157] In the case of such a configuration, for example, by connecting the conductive layer 41 and the conductive layer 42 below the insulating layer 11 (not shown), the transistor 20_13 can function as the transistor Tr in the pixel circuit shown in FIG. 1(B), and the capacitor 30_13 can function as the capacitor C in the pixel circuit shown in FIG. 1(B). In this case, the source electrode and the drain electrode are interchanged between the transistor 20_1 included in the semiconductor device 10_1 and the transistor 20_13 included in the semiconductor device 10_13. Also, one electrode and the other electrode are interchanged between the capacitor 30_1 included in the semiconductor device 10_1 and the capacitor 30_13 included in the semiconductor device 10_13.

[0158] In a plan view (FIG. 14(A)), the semiconductor layer 24_1 has an end that coincides with the conductive layer 23_1. The semiconductor layer 24_3 has an end that coincides with the conductive layer 23_2. The semiconductor layer 24_2 has an end that coincides with the conductive layer 73. Therefore, the semiconductor layer 24_1 and the conductive layer 23_1, the semiconductor layer 24_3 and the conductive layer 23_2, and the semiconductor layer 24_2 and the conductive layer 73 can be formed collectively using the same mask, respectively.

[0159] Regarding the semiconductor device 10_13, for other aspects, reference can be made to the description related to the semiconductor device 10_3 shown in FIGS. 4(A) and 4(B).

[0160] 〈Configuration Example 14〉 FIGS. 15(A) and 15(B) show a semiconductor device 10_14 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 15(A) is a plan view of the semiconductor device 10_14. FIG. 15(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 15(A).

[0161] The semiconductor device 10_14 includes a transistor 20_14 and a capacitor 30_14. The semiconductor device 10_14 has a configuration that combines the semiconductor device 10_2 shown in FIGS. 3(A) and 3(B) and the semiconductor device 10_13 shown in FIGS. 14(A) and 14(B).

[0162] Specifically, in the semiconductor device 10_14, similar to the semiconductor device 10_2, the conductive layer 53 is provided to extend to the A side of the semiconductor device 10_1 along the dashed-dotted line A-B. Also, similar to the semiconductor device 10_13, a conductive layer that functions as the other of the source electrode or drain electrode of the transistor and a conductive layer that functions as one of the electrodes of the capacitor are formed separately. Further, the semiconductor layer of the transistor and the semiconductor layer that functions as the dielectric of the capacitor are formed separately.

[0163] Since the semiconductor device 10_14 has the above-described configuration, effects similar to those of the semiconductor device 10_2 and the semiconductor device 10_13 can be obtained.

[0164] Regarding the semiconductor device 10_14, for other aspects, reference can be made to the descriptions related to the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B), the semiconductor device 10_2 shown in FIGS. 3(A) and 3(B), and the semiconductor device 10_13 shown in FIGS. 14(A) and 14(B).

[0165] <Constitutional Example 15> FIGS. 16(A) and 16(B) show a semiconductor device 10_15 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 16(A) is a plan view of the semiconductor device 10_15. FIG. 16(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 16(A).

[0166] The semiconductor device 10_15 includes a transistor 20_15 and a capacitor 30_15. Regarding the transistor 20_15, reference can be made to the description related to the transistor 20_1 of the semiconductor device 10_1. The configuration of the capacitor 30_15 of the semiconductor device 10_15 is different from that of the capacitor 30_1 of the semiconductor device 10_1.

[0167] Specifically, in the semiconductor device 10_15, a region where the conductive layer 73, the insulating layer 25, and the conductive layer 32 overlap functions as the capacitor 30_15.

[0168] Also, a conductive layer 83 that functions as a plug connecting the conductive layer 32 and the conductive layer 73 in the semiconductor device 10_1 is not provided in the semiconductor device 10_15. Instead, a conductive layer 84 that functions as a plug connecting the conductive layer 32 and the conductive layer 23 is provided. The conductive layer 84 is provided so as to be embedded in the insulating layer 25, and the conductive layer 32 is provided so as to have a region in contact with the upper surface of the conductive layer 84 and the upper surface of the insulating layer 25. When the semiconductor device 10_15 is applied to the pixel circuit shown in FIG. 1(B), the one electrode and the other electrode are interchanged between the capacitor 30_1 of the semiconductor device 10_1 and the capacitor 30_15 of the semiconductor device 10_15.

[0169] Regarding the semiconductor device 10_15, for other aspects, reference can be made to the description of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B).

[0170] <Constitutional Example 16> FIGS. 17(A) and 17(B) show a semiconductor device 10_16 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 17(A) is a plan view of the semiconductor device 10_16. FIG. 17(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 17(A).

[0171] The semiconductor device 10_16 has a transistor 20_16 and a capacitor 30_16. For the transistor 20_16, reference can be made to the description of the transistor 20_1 of the semiconductor device 10_1. The capacitor 30_16 has a conductive layer 34 functioning as one electrode, a conductive layer 73 functioning as the other electrode, and an insulating layer 25 functioning as a dielectric. The semiconductor device 10_16 has a different configuration of plugs connecting to transistors, capacitors, etc. from that of the semiconductor device 10_1.

[0172] In the semiconductor device 10_16, a conductive layer 34 and a conductive layer 35 are provided in regions different from the conductive layer 26 on the insulating layer 25. The conductive layer 34 is provided so as to have a region overlapping the conductive layer 23, a region overlapping the conductive layer 73, and a region overlapping the conductive layer 52. The conductive layer 35 is provided so as to have a region overlapping the conductive layer 73 and a region overlapping the conductive layer 53.

[0173] In the region where the conductive layer 85 overlaps with the conductive layer 23 and the conductive layer 34 of the insulating layer 25, the conductive layer 85 is provided to be embedded. The conductive layer 85 has a region in contact with the upper surface of the conductive layer 23 and the lower surface of the conductive layer 34. In the region between the conductive layer 23 and the conductive layer 73, openings reaching the conductive layer 52 are provided in the insulating layer 25 and the insulating layer 21, and the conductive layer 86 is provided to fill the openings. The conductive layer 86 has a region in contact with the upper surface of the conductive layer 52 and the lower surface of the conductive layer 34. In the region where the conductive layer 87 overlaps with the conductive layer 73 and the conductive layer 35 of the insulating layer 25, the conductive layer 87 is provided to be embedded. The conductive layer 87 has a region in contact with the upper surface of the conductive layer 73 and the lower surface of the conductive layer 35. In the region not overlapping with the conductive layer 73, openings reaching the conductive layer 53 are provided in the insulating layer 25 and the insulating layer 21, and the conductive layer 88 is provided to fill the openings. The conductive layer 88 has a region overlapping with the upper surface of the conductive layer 53 and the lower surface of the conductive layer 35.

[0174] The conductive layer 85 functions as a plug connecting the other of the source electrode or the drain electrode of the transistor 20_16 (conductive layer 23) and one electrode of the capacitor 30_16 (conductive layer 34). The conductive layer 86 functions as a plug connecting one electrode of the capacitor 30_16 (conductive layer 34) and the conductive layer 52. The conductive layer 87 functions as a plug connecting the other electrode of the capacitor 30_16 (conductive layer 73) and the conductive layer 35. The conductive layer 88 functions as a plug connecting the conductive layer 35 and the conductive layer 53.

[0175] The conductive layer 34 has a region in contact with the upper surface of the conductive layer 85, a region in contact with the upper surface of the conductive layer 86, and a region in contact with the upper surface of the insulating layer 25. The conductive layer 35 has a region in contact with the upper surface of the conductive layer 87, a region in contact with the upper surface of the conductive layer 88, and a region in contact with the upper surface of the insulating layer 25. In the semiconductor device 10_16, the region where the conductive layer 73, the insulating layer 25, and the conductive layer 34 overlap functions as the capacitor 30_16. The conductive layer 26, the conductive layer 34, and the conductive layer 35 can be formed simultaneously by processing the same material.

[0176] Regarding the semiconductor device 10_16, for other aspects, reference can be made to the description of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B).

[0177] <Configuration Example 17> FIGS. 18(A) and 18(B) show a semiconductor device 10_17 having a configuration different from that of the semiconductor device 10_15 shown in FIGS. 16(A) and 16(B). FIG. 18(A) is a plan view of the semiconductor device 10_17. FIG. 18(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 18(A).

[0178] The semiconductor device 10_17 includes a transistor 20_17 and a capacitor 30_17. For the transistor 20_17, reference can be made to the description of the transistor 20_15 included in the semiconductor device 10_15. The semiconductor device 10_17 has a different configuration of the capacitor 30_17 from that of the capacitor 30_15 included in the semiconductor device 10_15.

[0179] Specifically, in the semiconductor device 10_17, the conductive layer 52 is provided to extend further to the B side of the dashed-dotted line A - B than in the semiconductor device 10_15, and the capacitor 30_17 includes an insulating layer 21 and a conductive layer 52 in addition to the configuration of the capacitor 30_15.

[0180] In the capacitor 30_17, similar to the capacitor 30_15, a region where the conductive layer 73, the insulating layer 25, and the conductive layer 32 overlap can function as a capacitor (first capacitor). Further, in the capacitor 30_17, a region where the conductive layer 52, the insulating layer 21, and the conductive layer 73 overlap can also function as a capacitor (second capacitor).

[0181] That is, the capacitor 30_17 can have a larger capacitance value than the capacitor 30_15 by the amount corresponding to the second capacitor.

[0182] Regarding the semiconductor device 10_17, for other aspects, reference can be made to the description of the semiconductor device 10_15 shown in FIGS. 16(A) and 16(B).

[0183] <Configuration Example 18> FIG. 19(A) and FIG. 19(B) show a semiconductor device 10_18 having a configuration different from that of the semiconductor device 10_15 shown in FIGS. 16(A) and 16(B). FIG. 19(A) is a plan view of the semiconductor device 10_18. FIG. 19(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 19(A).

[0184] The semiconductor device 10_18 includes a transistor 20_18 and a capacitor 30_18. The semiconductor device 10_18 is different from the semiconductor device 10_15 in that a semiconductor layer 28 is used as a component that functions as the other electrode of the capacitor 30_18.

[0185] The semiconductor layer 28 is provided on the insulating layer 21 so as to have a region overlapping with the conductive layer 32. The semiconductor layer 28 is in contact with the upper surface of the conductive layer 63 and the upper surface of the insulating layer 21. In a plan view (FIG. 19(A)), the semiconductor layer 28 has the same shape as the conductive layer 73 included in the semiconductor device 10_15 and is disposed at a position corresponding to the conductive layer 73. That is, it can be said that the semiconductor device 10_18 has a configuration in which the conductive layer 73 in the semiconductor device 10_15 is replaced with the semiconductor layer 28. In the semiconductor device 10_18, the semiconductor layer 24 and the semiconductor layer 28 can be formed simultaneously by processing the same semiconductor material.

[0186] In the capacitor 30_18 included in the semiconductor device 10_18, since the semiconductor layer 28 functions as the other electrode, it preferably has a high conductivity. For example, after the same semiconductor material is processed to form the semiconductor layer 24 and the semiconductor layer 28 in an island shape, impurities such as hydrogen are added only to the semiconductor layer 28 to reduce the resistance. Thereby, the semiconductor layer 28 can function as the other electrode of the capacitor 30_18.

[0187] Regarding the semiconductor device 10_18, for other matters, reference can be made to the description related to the semiconductor device 10_15 shown in FIGS. 16(A) and 16(B).

[0188] <Configuration Example 19> FIG. 20(A) and FIG. 20(B) show a semiconductor device 10_19 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 20(A) is a plan view of the semiconductor device 10_19. FIG. 20(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 20(A).

[0189] The semiconductor device 10_19 includes a transistor 20_19 and a capacitor 30_19. The semiconductor device 10_19 has a configuration combining the semiconductor device 10_17 shown in FIGS. 18(A) and 18(B) and the semiconductor device 10_18 shown in FIGS. 19(A) and 19(B).

[0190] Specifically, in the semiconductor device 10_19, similar to the semiconductor device 10_17, the conductive layer 52 is provided to extend to the B side of the semiconductor device 10_1 on the dashed-dotted line A-B. Also, similar to the semiconductor device 10_18, a semiconductor layer 28 is provided as the other electrode of the capacitor.

[0191] Since the semiconductor device 10_19 has the above-described configuration, effects similar to those of the semiconductor device 10_17 and the semiconductor device 10_18 can be obtained.

[0192] Regarding the semiconductor device 10_19, for other matters, reference can be made to the descriptions related to the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B), the semiconductor device 10_17 shown in FIGS. 18(A) and 18(B), and the semiconductor device 10_18 shown in FIGS. 19(A) and 19(B).

[0193] <Configuration Example 20> FIG. 21(A) and FIG. 21(B) show a semiconductor device 10_20 having a configuration different from that of the semiconductor device 10_15 shown in FIGS. 16(A) and 16(B). FIG. 21(A) is a plan view of the semiconductor device 10_20. FIG. 21(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 21(A).

[0194] The semiconductor device 10_20 has a transistor 20_20 and a capacitor 30_20. In the semiconductor device 10_20, the configuration of the semiconductor layer is different from that of the semiconductor device 10_15.

[0195] Specifically, the semiconductor device 10_20 has a semiconductor layer 24 provided on the conductive layer 23 and a semiconductor layer 28 provided on the conductive layer 73. In a plan view (FIG. 21(A)), the end of the semiconductor layer 24 coincides with the conductive layer 23. The end of the semiconductor layer 28 coincides with the conductive layer 73. Therefore, the semiconductor layer 24 and the conductive layer 23, and the semiconductor layer 28 and the conductive layer 73 can be formed collectively using the same mask.

[0196] The capacitor 30_20 has a semiconductor layer 28 and an insulating layer 25 between the conductive layer 73 and the conductive layer 32. Therefore, in the capacitor 30_20, the semiconductor layer 28 and the insulating layer 25 in the region sandwiched between the conductive layer 73 and the conductive layer 32 function as a dielectric.

[0197] The conductive layer 84 is provided so as to be embedded in the semiconductor layer 24 and the insulating layer 25 in the region where the conductive layer 23 and the conductive layer 32 overlap. The conductive layer 84 has a region in contact with the upper surface of the conductive layer 23 and a region in contact with the lower surface of the conductive layer 32.

[0198] Regarding the semiconductor device 10_20, for other than the above, the description related to the semiconductor device 10_15 shown in FIGS. 16(A) and 16(B) can be referred to.

[0199] <Configuration Example 21> FIGS. 22(A) and 22(B) show a semiconductor device 10_21 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 22(A) is a plan view of the semiconductor device 10_21. FIG. 22(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 22(A).

[0200] The semiconductor device 10_21 includes a transistor 20_21 and a capacitor 30_21. The semiconductor device 10_21 has a configuration that combines the semiconductor device 10_17 shown in FIGS. 18(A) and 18(B) and the semiconductor device 10_20 shown in FIGS. 21(A) and 21(B).

[0201] Specifically, in the semiconductor device 10_21, similar to the semiconductor device 10_17, the conductive layer 52 is provided to extend to the B side of the one-dot chain line A-B from the semiconductor device 10_1. Also, similar to the semiconductor device 10_20, in addition to the insulating layer 25, a semiconductor layer 28 is provided as a dielectric of the capacitor.

[0202] Since the semiconductor device 10_21 has the above-described configuration, effects similar to those of the semiconductor device 10_17 and the semiconductor device 10_20 can be obtained.

[0203] Regarding the semiconductor device 10_21, for other matters, reference can be made to the descriptions related to the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B), the semiconductor device 10_17 shown in FIGS. 18(A) and 18(B), and the semiconductor device 10_20 shown in FIGS. 21(A) and 21(B).

[0204] <Configuration Example 22> FIGS. 23(A) and 23(B) show a semiconductor device 10_22 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 23(A) is a plan view of the semiconductor device 10_22. FIG. 23(B) is a cross-sectional view taken along the one-dot chain line A-B shown in FIG. 23(A).

[0205] The semiconductor device 10_22 includes a transistor 20_22 and a capacitor 30_22. For the transistor 20_22, reference can be made to the description related to the transistor 20_1 included in the semiconductor device 10_1. The configuration of the capacitor 30_22 of the semiconductor device 10_22 is different from that of the capacitor 30_1 included in the semiconductor device 10_1.

[0206] Specifically, in the semiconductor device 10_22, the capacitive-side end of the conductive layer 23 is located on the A side of the dashed line A-B compared to the semiconductor device 10_1, and the conductive layer 22 is provided to extend on the B side of the dashed line A-B compared to the semiconductor device 10_1. Also, in the insulating layer 21, an opening 15 reaching the conductive layer 22 is provided in a region different from the transistor 20_22, and an insulating layer 25 is provided in contact with the side wall (i.e., the side surface of the insulating layer 21 within the opening 15) and the bottom surface (i.e., the upper surface of the conductive layer 22 within the opening 15) of the opening 15. The conductive layer 32 is provided on the insulating layer 25 so as to have a region overlapping with the opening 15. In the semiconductor device 10_22, within the opening 15, the region where the conductive layer 22, the insulating layer 25, and the conductive layer 32 overlap functions as the capacitor 30_22.

[0207] In the semiconductor device 10_22, the conductive layer 23 functions as one of the source electrode or the drain electrode of the transistor 20_22. The conductive layer 22 functions as the other of the source electrode or the drain electrode of the transistor 20_22 and also functions as one electrode of the capacitor 30_22. The conductive layer 32 functions as the other electrode of the capacitor 30_22.

[0208] In the semiconductor device 10_22, in order to provide the capacitor 30_22, it is necessary to form the opening 15 in the insulating layer 21. As a result, the insulating layer that functions as the dielectric of the capacitor 30_22 can be only the insulating layer 25. On the other hand, when the insulating layer (i.e., the insulating layer 21 and the insulating layer 25 in this region) in the region sandwiched between the conductive layer 22 and the conductive layer 32 is used as the dielectric of the capacitor 30_22 without providing the opening 15 in the insulating layer 21, the thickness of the dielectric becomes thicker by the thickness of the insulating layer 21 compared to the case of providing the opening 15. Therefore, the capacitance value decreases compared to the case of providing the opening 15. Thus, it is preferable to provide the opening 15 in the insulating layer 21 and form the capacitor 30_22 in the region overlapping with the opening 15, like the semiconductor device 10_22, as it can increase the capacitance value.

[0209] In addition, since the semiconductor device 10_22 has the above-described configuration, the number of conductive layers that function as plugs can be reduced compared to the semiconductor device 10_1. For example, conductive layers such as the conductive layer 42, the conductive layer 52, and the conductive layer 62 included in the semiconductor device 10_1 are unnecessary in the semiconductor device 10_22, so the number of manufacturing steps can be reduced compared to the semiconductor device 10_1.

[0210] Regarding the semiconductor device 10_22, for other than the above, the description related to the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B) can be referred to.

[0211] <Configuration Example 23> FIGS. 24(A) and 24(B) show a semiconductor device 10_23 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B) and the semiconductor device 10_22 shown in FIGS. 23(A) and 23(B). FIG. 24(A) is a plan view of the semiconductor device 10_23. FIG. 24(B) is a cross-sectional view taken along the dash-dotted line A-B shown in FIG. 24(A).

[0212] The semiconductor device 10_23 includes a transistor 20_23 and a capacitor 30_23. Regarding the transistor 20_23, the description related to the transistor 20_22 included in the semiconductor device 10_22 can be referred to. The semiconductor device 10_23 has a configuration of the capacitor 30_23 different from that of the capacitor 30_22 included in the semiconductor device 10_22.

[0213] Specifically, in the semiconductor device 10_23, a conductive layer 29 is provided on the insulating layer 21 so as to have a region overlapping with the opening 16 in which the capacitor 30_23 is formed. That is, in the semiconductor device 10_23, an opening 16 reaching the conductive layer 22 is provided in the conductive layer 29 and the insulating layer 21. An insulating layer 25 is provided in contact with the side walls of the opening 16 (that is, the side surfaces of the conductive layer 29 in the opening 16 and the side surfaces of the insulating layer 21 in the opening 16) and the bottom surface (that is, the upper surface of the conductive layer 22 in the opening 16). A conductive layer 32 is provided on the insulating layer 25 so as to have a region overlapping with the opening 16 and the conductive layer 29. In the semiconductor device 10_23, in the opening 16, the region where the conductive layer 22, the insulating layer 25, and the conductive layer 32 overlap, and outside the opening 16, the region where the conductive layer 29, the insulating layer 25, and the conductive layer 32 overlap function as the capacitor 30_23.

[0214] That is, in the capacitor 30_23, similar to the capacitor 30_22, the region where the conductive layer 22, the insulating layer 25, and the conductive layer 32 overlap in the opening 16 can function as a capacitor (first capacitor). Further, in the capacitor 30_23, the region where the conductive layer 29, the insulating layer 25, and the conductive layer 32 overlap outside the opening 16 can also function as a capacitor (second capacitor).

[0215] That is, the capacitor 30_23 can have a larger capacitance value than the capacitor 30_22 by the amount of the second capacitor.

[0216] In the semiconductor device 10_23, the conductive layer 23, the conductive layer 29, and the conductive layer 73 can be formed simultaneously by processing the same material.

[0217] In the region where the conductive layer 29 of the insulating layer 21 overlaps with the conductive layer 22, an opening reaching the conductive layer 22 is provided, and a conductive layer 62 is provided so as to fill the opening. The conductive layer 62 has a region in contact with the upper surface of the conductive layer 22 and the lower surface of the conductive layer 29. The conductive layer 62 functions as a plug connecting the conductive layer 22 and the conductive layer 29. Therefore, in the semiconductor device 10_23, the region of the conductive layer 22 overlapping with the transistor 20_23 can function as one of the source electrode or the drain electrode of the transistor 20_23. Also, the region of the conductive layer 22 overlapping with the capacitor 30_23 and the conductive layer 29 can function as one of the electrodes of the capacitor 30_23.

[0218] Regarding the semiconductor device 10_23, for other than the above, reference can be made to the description of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B), and the semiconductor device 10_22 shown in FIGS. 23(A) and 23(B).

[0219] <Constitutional Example 24> FIGS. 25(A) and 25(B) show a semiconductor device 10_24 having a configuration different from that of the semiconductor device 10_22 shown in FIGS. 23(A) and 23(B). FIG. 25(A) is a plan view of the semiconductor device 10_24. FIG. 25(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 25(A).

[0220] The semiconductor device 10_24 includes a transistor 20_24 and a capacitor 30_24. In the semiconductor device 10_24, it is different from the semiconductor device 10_22 in that a conductive layer functioning as one of the source electrode or the drain electrode of the transistor and a conductive layer functioning as one of the electrodes of the capacitor are provided separately.

[0221] Specifically, in the semiconductor device 10_24, the end of the conductive layer 22 that functions as one of the source electrode or the drain electrode of the transistor 20_24 does not extend to the region overlapping with the capacitor 30_24. Further, a conductive layer 54 is provided separately from the conductive layer 22 as a conductive layer that functions as one of the electrodes of the capacitor 30_24. In the semiconductor device 10_24, the conductive layer 22, the conductive layer 54, and the conductive layer 53 can be formed simultaneously by processing the same material.

[0222] In the case of this configuration, although not shown, for example, by connecting a conductive layer that functions as a plug connected to the conductive layer 22 and a conductive layer that functions as a plug connected to the conductive layer 54 below the insulating layer 11, a semiconductor device 10_24 having the same function as the semiconductor device 10_22 can be realized.

[0223] Regarding the semiconductor device 10_24, for other than the above, the description related to the semiconductor device 10_22 shown in FIGS. 23(A) and 23(B) can be referred to.

[0224] <Configuration Example 25> FIGS. 26(A) and 26(B) show a semiconductor device 10_25 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 26(A) is a plan view of the semiconductor device 10_25. FIG. 26(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 26(A).

[0225] The semiconductor device 10_25 includes a transistor 20_25 and a capacitor 30_25. The semiconductor device 10_25 has a configuration that combines the semiconductor device 10_23 shown in FIGS. 24(A) and 24(B) and the semiconductor device 10_24 shown in FIGS. 25(A) and 25(B).

[0226] Specifically, in the semiconductor device 10_25, similar to the semiconductor device 10_24, it has a conductive layer 54 that functions as one electrode of the capacitor. Also, similar to the semiconductor device 10_23, two regions can function as capacitors: the region within the opening 16 formed in the conductive layer 29 and the insulating layer 21 (precisely, the region where the conductive layer 54, the insulating layer 25, and the conductive layer 32 overlap), and the region outside the opening 16 (precisely, the region where the conductive layer 29, the insulating layer 25, and the conductive layer 32 overlap).

[0227] Since the semiconductor device 10_25 has the above-described configuration, effects similar to those of the semiconductor device 10_23 and the semiconductor device 10_24 can be obtained.

[0228] Regarding the semiconductor device 10_25, for other aspects, reference can be made to the descriptions related to the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B), the semiconductor device 10_23 shown in FIGS. 24(A) and 24(B), and the semiconductor device 10_24 shown in FIGS. 25(A) and 25(B).

[0229] <Constitution Example 26> FIGS. 27(A) and 27(B) show a semiconductor device 10_26 having a configuration different from that of the semiconductor device 10_25 shown in FIGS. 26(A) and 26(B). FIG. 27(A) is a plan view of the semiconductor device 10_26. FIG. 27(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 27(A).

[0230] The semiconductor device 10_26 has a transistor 20_26 and a capacitor 30_26. In the semiconductor device 10_26, it is different from the semiconductor device 10_25 in that, in addition to the insulating layer 25, it has a semiconductor layer 36 as the dielectric of the capacitor 30_26.

[0231] Specifically, in the semiconductor device 10_26, a semiconductor layer 36 is provided in contact with the upper surface of a conductive layer 29, and an insulating layer 25 is provided to cover the conductive layer 29 and the semiconductor layer 36. On the side walls (i.e., the side surfaces of the conductive layer 29 and the insulating layer 21 within the opening 16) and the bottom surface (i.e., the upper surface of the conductive layer 54 within the opening 16) of the opening 16 provided in the conductive layer 29 and the insulating layer 21, and the semiconductor layer 36 can function as a dielectric of the capacitor 30_26. In the semiconductor device 10_26, the semiconductor layer 36 and the insulating layer 25 in the region sandwiched between the conductive layer 54 and the conductive layer 32, and the semiconductor layer 36 and the insulating layer 25 in the region sandwiched between the conductive layer 29 and the conductive layer 32 can function as a dielectric of the capacitor 30_26.

[0232] In the semiconductor device 10_26, the semiconductor layer 24 and the semiconductor layer 36 can be formed simultaneously by processing the same material.

[0233] Regarding the semiconductor device 10_26, for other aspects, reference can be made to the description of the semiconductor device 10_25 shown in FIGS. 26(A) and 26(B).

[0234] <Configuration Example 27> FIGS. 28(A) and 28(B) show a semiconductor device 10_27 having a configuration different from that of the semiconductor device 10_26 shown in FIGS. 27(A) and 27(B). FIG. 28(A) is a plan view of the semiconductor device 10_27. FIG. 28(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 28(A).

[0235] The semiconductor device 10_27 includes a transistor 20_27 and a capacitor 30_27. In the semiconductor device 10_27, the configuration of the plug connecting the conductive layer 54 and the conductive layer 29 is different from that of the semiconductor device 10_26.

[0236] Specifically, in the semiconductor device 10_27, in the region between the conductive layer 23 and the conductive layer 29, openings reaching the conductive layer 54 are provided in the insulating layer 25 and the insulating layer 21, and a conductive layer 90 is provided so as to fill the openings. Further, an opening reaching the conductive layer 29 is provided in the insulating layer 25, and a conductive layer 91 is provided so as to fill the opening. Then, a conductive layer 92 is provided on the insulating layer 25 so as to have a region overlapping with the conductive layer 90 and the conductive layer 91. The conductive layer 90 has a region in contact with the upper surface of the conductive layer 54 and the lower surface of the conductive layer 92. The conductive layer 91 has a region in contact with the upper surface of the conductive layer 29 and the lower surface of the conductive layer 92. The conductive layer 92 has a region in contact with the upper surface of the conductive layer 90, a region in contact with the upper surface of the conductive layer 91, and a region in contact with the upper surface of the insulating layer 25. The conductive layer 90 and the conductive layer 91 function as plugs connecting the conductive layer 54 and the conductive layer 29 via the conductive layer 92.

[0237] Also, in the region overlapping with the conductive layer 53 and the conductive layer 32, openings reaching the conductive layer 53 are provided in the insulating layer 25 and the insulating layer 21, and a conductive layer 89 is provided so as to fill the openings. The conductive layer 89 has a region in contact with the upper surface of the conductive layer 53 and the lower surface of the conductive layer 32. The conductive layer 89 functions as a plug connecting the conductive layer 53 and the conductive layer 32.

[0238] In the semiconductor device 10_27, the conductive layer 26, the conductive layer 92, and the conductive layer 32 can be formed simultaneously by processing the same material.

[0239] Regarding the semiconductor device 10_27, for other aspects, reference can be made to the description of the semiconductor device 10_26 shown in FIGS. 27(A) and 27(B).

[0240] <Constitutional Example 28> FIGS. 29(A) and 29(B) show a semiconductor device 10_28 having a configuration different from that of the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B). FIG. 29(A) is a plan view of the semiconductor device 10_28. FIG. 29(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 29(A).

[0241] The semiconductor device 10_28 includes a transistor 20_28 and a capacitor 30_28. The semiconductor device 10_28 has a configuration that combines the semiconductor device 10_23 shown in FIGS. 24(A) and 24(B) and the semiconductor device 10_26 shown in FIGS. 27(A) and 27(B).

[0242] Specifically, in the semiconductor device 10_28, similar to the semiconductor device 10_23, a conductive layer that functions as one of the source electrode or drain electrode of the transistor and a conductive layer that functions as one of the electrodes of the capacitor share the same conductive layer (conductive layer 22). Also, similar to the semiconductor device 10_26, as the dielectric of the capacitor, in addition to the insulating layer 25, it has a semiconductor layer 36.

[0243] Since the semiconductor device 10_28 has the above-described configuration, effects similar to those of the semiconductor device 10_23 and the semiconductor device 10_26 can be obtained.

[0244] Regarding the semiconductor device 10_28, for other aspects, reference can be made to the descriptions related to the semiconductor device 10_1 shown in FIGS. 2(A) and 2(B), the semiconductor device 10_23 shown in FIGS. 24(A) and 24(B), and the semiconductor device 10_26 shown in FIGS. 27(A) and 27(B).

[0245] <Configuration Example 29> FIGS. 30(A) and 30(B) show a semiconductor device 10_29 having a configuration different from that of the semiconductor device 10_26 shown in FIGS. 27(A) and 27(B). FIG. 30(A) is a plan view of the semiconductor device 10_29. FIG. 30(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 30(A).

[0246] The semiconductor device 10_29 includes a transistor 20_29 and a capacitor 30_29. In the semiconductor device 10_29, it is different from the semiconductor device 10_26 in that the conductive layer 23 included in the transistor is shared as part of the capacitor.

[0247] Specifically, in the semiconductor device 10_29, the conductive layer 23 of the transistor 20_29 extends up to the capacitor 30_29 side and is shared as a part of the capacitor 30_29. The conductive layer 23 is connected to the conductive layer 54 via the conductive layer 62. Therefore, in the semiconductor device 10_29, the region of the conductive layer 23 overlapping with the transistor 20_29 can function as the other of the source electrode or the drain electrode of the transistor 20_29. Also, the region of the conductive layer 23 overlapping with the capacitor 30_29 and the conductive layer 54 can function as one electrode of the capacitor 30_29.

[0248] Regarding the semiconductor device 10_29, for other than the above, the description related to the semiconductor device 10_26 shown in FIGS. 27(A) and 27(B) can be referred to.

[0249] <Configuration Example 30> FIGS. 31(A) and 31(B) show a semiconductor device 10_30 having a configuration different from that of the semiconductor devices 10_1 to 10_29 shown in FIGS. 2(A) to 30(B). FIG. 31(A) is a plan view of the semiconductor device 10_30. FIG. 31(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 31(A).

[0250] The semiconductor device 10_30 includes a transistor 20_30 and a transistor 40_1. Different from the semiconductor devices 10_1 to 10_29 which are each composed of one transistor and one capacitor, the semiconductor device 10_30 is composed of two transistors.

[0251] The semiconductor device 10_30 is composed of one vertical transistor (transistor 20_30) and one TG transistor (transistor 40_1). For the transistor 20_30, the description related to the transistor 20_1 etc. can be referred to.

[0252] The transistor 40_1 has a conductive layer 44 that functions as one of the source electrode or the drain electrode, a conductive layer 45 that functions as the other of the source electrode or the drain electrode, a semiconductor layer 37, an insulating layer 25 that functions as a gate insulating layer, and a conductive layer 46 that functions as a gate electrode.

[0253] The conductive layer 44 and the conductive layer 45 are provided in regions different from the conductive layer 23 on the insulating layer 21, respectively. The semiconductor layer 37 is provided in contact with the upper surface of the conductive layer 44, the side surface of the conductive layer 44 on the side facing the conductive layer 45, the upper surface of the insulating layer 21 in the region sandwiched between the conductive layer 44 and the conductive layer 45, the side surface of the conductive layer 45 on the side facing the conductive layer 44, and the upper surface of the conductive layer 45. The insulating layer 25 has regions in contact with the upper surface and side surfaces of the semiconductor layer 37, the upper surface and side surfaces of the conductive layer 44, and the upper surface of the conductive layer 45 in the region overlapping with the transistor 40_1. The conductive layer 46 is provided on the insulating layer 25 in the region between the conductive layer 44 and the conductive layer 45.

[0254] In the semiconductor device 10_30, the region of the insulating layer 25 overlapping with the transistor 20_30 functions as the gate insulating layer of the transistor 20_30, and the region of the insulating layer 25 overlapping with the transistor 40_1 functions as the gate insulating layer of the transistor 40_1.

[0255] In the semiconductor device 10_30, the conductive layer 23, the conductive layer 44, and the conductive layer 45 can be formed simultaneously by processing the same material. The semiconductor layer 24 and the semiconductor layer 37 can be formed simultaneously by processing the same material. The conductive layer 26 and the conductive layer 46 can be formed simultaneously by processing the same material.

[0256] An opening reaching the conductive layer 22 is provided in the region of the insulating layer 21 overlapping with the conductive layer 44 and the conductive layer 22, and the conductive layer 62 is provided so as to fill the opening. The conductive layer 62 has a region in contact with the upper surface of the conductive layer 22 and the lower surface of the conductive layer 44. The conductive layer 62 functions as a plug connecting the conductive layer 22 and the conductive layer 44.

[0257] In the semiconductor device 10_30, the source electrode or drain electrode of the transistor 20_30 is connected to the source electrode or drain electrode of the transistor 40_1. The two transistors (transistor 20_30 and transistor 40_1) constituting the semiconductor device 10_30 can be applied, for example, to a pixel circuit of a display device using a light-emitting element described with reference to FIGS. 40(A) to 42. As described above, the vertical transistor and the TG transistor have different characteristics. Therefore, it is preferable to apply the semiconductor device 10_30 at an appropriate material and location according to the performance required for each transistor constituting the pixel circuit.

[0258] <Configuration Example 31> FIGS. 32(A) and 32(B) show a semiconductor device 10_31 having a configuration different from that of the semiconductor device 10_30 shown in FIGS. 31(A) and 31(B). FIG. 32(A) is a plan view of the semiconductor device 10_31. FIG. 32(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 32(A).

[0259] The semiconductor device 10_31 includes a transistor 20_31 and a transistor 40_2. The semiconductor device 10_31 is different from the semiconductor device 10_30 in that the gate insulating layers are separately provided for the transistor 20_31, which is a vertical transistor, and the transistor 40_2, which is a TG transistor.

[0260] Specifically, the insulating layer 25_1 is provided only in a region overlapping the semiconductor layer 24 for the transistor 20_31, and this insulating layer functions as the gate insulating layer of the transistor 20_31. On the other hand, for the transistor 40_2, the insulating layer 25_2 is provided only in a region overlapping the upper surface of the semiconductor layer 37 in the region sandwiched between the conductive layer 44 and the conductive layer 45, and this insulating layer functions as the gate insulating layer of the transistor 40_2.

[0261] In the semiconductor device 10_31, the insulating layer 25_1 and the insulating layer 25_2 can be formed simultaneously by processing the same material.

[0262] Regarding the semiconductor device 10_31, for other aspects, reference can be made to the description of the semiconductor device 10_30 shown in FIGS. 31(A) and 31(B).

[0263] <Constitutional Example 32> FIG. 33(A) shows a semiconductor device 10_32 having a configuration different from that of the semiconductor devices 10_1 to 10_29 shown in FIGS. 2(A) to 30(B). FIG. 33(A) is a cross-sectional view of the semiconductor device 10_32 corresponding to the dashed line A-B in the plan view of the semiconductor device 10_1 shown in FIG. 2(A).

[0264] The semiconductor device 10_32 includes a transistor 20_32, a capacitor 30_32, and a transistor 50_1. For the transistor 20_32 and the capacitor 30_32, reference can be made to the descriptions of the transistor 20_1 and the capacitor 30_1 included in the semiconductor device 10_1, respectively. It can be said that the semiconductor device 10_32 has a configuration in which the transistor 50_1 is provided under the semiconductor device 10_1.

[0265] The transistor 50_1 is provided on an insulating layer 12 on a substrate (not shown). The transistor 50_1 includes a conductive layer 66, a conductive layer 68, a semiconductor layer 38, an insulating layer 39, and a conductive layer 47. The conductive layer 66 functions as one of a source electrode or a drain electrode. The conductive layer 68 functions as the other of the source electrode or the drain electrode. The insulating layer 39 functions as a gate insulating layer. The conductive layer 47 functions as a gate electrode. In addition to an oxide semiconductor, silicon can also be applied to the semiconductor layer 38. That is, not only a transistor using an oxide semiconductor (hereinafter referred to as an OS transistor) but also a transistor using silicon (hereinafter referred to as an Si transistor) can be applied to the transistor 50_1.

[0266] The semiconductor layer 38 is provided on the insulating layer 12. The insulating layer 39 covers the semiconductor layer 38 and is provided on the insulating layer 12. On the insulating layer 39, a conductive layer 47 is provided so as to have a region overlapping with the semiconductor layer 38. On the conductive layer 47 and on the insulating layer 39, an insulating layer 13 with a flattened upper surface is provided.

[0267] The insulating layer 13 is provided with an opening reaching the conductive layer 47, and a conductive layer 67 is provided so as to fill the opening. Further, the insulating layer 13 and the insulating layer 39 are provided with two openings reaching the semiconductor layer 38 so as to sandwich the conductive layer 67. A conductive layer 66 is provided so as to fill one opening, and a conductive layer 68 is provided so as to fill the other opening. The upper surfaces of the conductive layer 66, the conductive layer 67, the conductive layer 68, and the upper surface of the insulating layer 13 are substantially flush.

[0268] On the insulating layer 13, a conductive layer 55, a conductive layer 56, a conductive layer 57, a conductive layer 58, and a conductive layer 59 are provided in different regions respectively. The conductive layer 55, the conductive layer 56, the conductive layer 57, the conductive layer 58, and the conductive layer 59 can be formed simultaneously by processing the same material. The conductive layer 56 has a region overlapping with the conductive layer 66. The conductive layer 57 has a region overlapping with the conductive layer 67. The conductive layer 58 has a region overlapping with the conductive layer 68.

[0269] The conductive layer 66 has a region in contact with the upper surface of the semiconductor layer 38 and the lower surface of the conductive layer 56. The conductive layer 67 has a region in contact with the upper surface of the conductive layer 47 and the lower surface of the conductive layer 57. The conductive layer 68 has a region in contact with the upper surface of the semiconductor layer 38 and the lower surface of the conductive layer 58.

[0270] On the conductive layer 55, on the conductive layer 56, on the conductive layer 57, on the conductive layer 58, on the conductive layer 59, and on the insulating layer 13, an insulating layer 11 with a flattened upper surface is provided. The insulating layer 11 is provided with openings reaching the conductive layer 55, the conductive layer 57, and the conductive layer 59, and conductive layers 41, 42, and 43 are provided so as to fill these openings, respectively. The conductive layer 41 has a region in contact with the upper surface of the conductive layer 55 and a region in contact with the lower surface of the conductive layer 22. The conductive layer 42 has a region in contact with the upper surface of the conductive layer 57 and the lower surface of the conductive layer 52. The conductive layer 43 has a region in contact with the upper surface of the conductive layer 59 and the lower surface of the conductive layer 53.

[0271] Regarding the configuration above the conductive layers 41, 42, 43, and the insulating layer 11, reference can be made to the description of the semiconductor device 10_1 shown in FIG. 2(B).

[0272] The semiconductor device 10_32 is composed of two transistors (transistor 20_32 and transistor 50_1) and one capacitor (capacitor 30_32). In the semiconductor device 10_32, the other of the source electrode or drain electrode of the transistor 20_32, one electrode of the capacitor 30_32, and the gate electrode of the transistor 50_1 are connected. The semiconductor device 10_32 can be applied, for example, to the pixel circuit of a display device using the light-emitting element described in FIGS. 40(A) to 42.

[0273] <Configuration Example 33> FIG. 33(B) shows a semiconductor device 10_33 having a configuration different from that of the semiconductor device 10_32 shown in FIG. 33(A). FIG. 33(B) is a cross-sectional view of the semiconductor device 10_33 corresponding to the dashed line A - B in the plan view of the semiconductor device 10_1 shown in FIG. 2(A).

[0274] The semiconductor device 10_33 includes a transistor 20_33, a capacitor 30_33, and a transistor 50_2. For the transistor 20_33 and the capacitor 30_33, reference can be made to the descriptions of the transistor 20_32 and the capacitor 30_32 included in the semiconductor device 10_32, respectively. The semiconductor device 10_33 has a configuration in a layer lower than the insulating layer 21 that is different from that of the semiconductor device 10_32.

[0275] The transistor 50_2 has the same configuration as the transistor 50_1 included in the semiconductor device 10_32. However, in the semiconductor device 10_33, the insulating layer 13 included in the semiconductor device 10_32 is not provided, and the transistor 50_2 has a configuration covered with the insulating layer 11. That is, the conductive layer 66 and the conductive layer 68 that function as the source electrode and the drain electrode of the transistor 50_2, and the conductive layer 67 connected to the conductive layer 47 that functions as the gate electrode are each provided so as to be embedded in an opening formed in the insulating layer 11.

[0276] In the semiconductor device 10_33, since there is no need to form the insulating layer 13 and plugs or the like embedded in the insulating layer 13, the number of manufacturing steps can be reduced compared to the semiconductor device 10_32.

[0277] Regarding the semiconductor device 10_33, for other aspects, reference can be made to the description of the semiconductor device 10_32 shown in FIG. 33(A).

[0278] <Configuration Example 34> FIGS. 34(A) and 34(B) show a semiconductor device 10_34 having a configuration different from that of the semiconductor device 10_32 shown in FIG. 33(A) and the semiconductor device 10_33 shown in FIG. 33(B). FIG. 34(A) is a plan view of the semiconductor device 10_34. FIG. 34(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 34(A).

[0279] The semiconductor device 10_34 includes a transistor 20_34, a capacitor 30_34, and a transistor 50_3. Regarding the transistor 20_34, reference can be made to the description of the transistor 20_1 included in the semiconductor device 10_1.

[0280] The capacitor 30_34 includes a conductive layer 23, a conductive layer 32, and an insulating layer 25. In the semiconductor device 10_34, the region where the conductive layer 23, the insulating layer 25, and the conductive layer 32 overlap functions as the capacitor 30_34. In the capacitor 30_34, the conductive layer 23 functions as one electrode, the conductive layer 32 functions as the other electrode, and the insulating layer 25 functions as a dielectric.

[0281] Here, the conductive layer 23 can also function as the other of the source electrode or the drain electrode of the transistor 20_34. Also, the insulating layer 25 can also function as the gate insulating layer of the transistor 20_34.

[0282] The transistor 50_3 has the same configuration as the transistor 50_1 included in the semiconductor device 10_32 and the transistor 50_2 included in the semiconductor device 10_33. However, it is different from the semiconductor devices 10_32 and 10_33 in that the conductive layer 66 that functions as one of the source electrode or the drain electrode, the conductive layer 68 that functions as the other of the source electrode or the drain electrode, and the conductive layer 67 that connects to the conductive layer 47 that functions as the gate electrode are each provided so as to be embedded in the openings formed in the insulating layer 21 and the insulating layer 11.

[0283] The conductive layer 56 connected to the conductive layer 66, the conductive layer 52 connected to the conductive layer 67, and the conductive layer 58 connected to the conductive layer 68 are each provided on the insulating layer 21. In the semiconductor device 10_34, the conductive layer 23, the conductive layer 56, the conductive layer 52, and the conductive layer 58 can be formed simultaneously by processing the same material.

[0284] Regarding the semiconductor device 10_34, for other aspects, reference can be made to the description of the semiconductor device 10_32 shown in FIG. 33(A) and the semiconductor device 10_33 shown in FIG. 33(B).

[0285] <Constitution Example 35> FIGS. 35(A) and 35(B) show a semiconductor device 10_35 having a configuration different from that of the semiconductor device 10_34 shown in FIGS. 34(A) and 34(B). FIG. 35(A) is a plan view of the semiconductor device 10_35. FIG. 35(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 35(A).

[0286] The semiconductor device 10_35 includes a transistor 20_35, a capacitor 30_35, and a transistor 50_4. In the semiconductor device 10_35, the conductive layer 66, the conductive layer 67, and the conductive layer 68 are provided so as to be embedded in openings formed in the insulating layer 25, the insulating layer 21, and the insulating layer 11, respectively, which is different from the semiconductor device 10_34.

[0287] The conductive layer 56 connected to the conductive layer 66, the conductive layer 52 connected to the conductive layer 67, and the conductive layer 58 connected to the conductive layer 68 are each provided on the insulating layer 25. In the semiconductor device 10_35, the conductive layer 26, the conductive layer 32, the conductive layer 56, the conductive layer 52, and the conductive layer 58 can be formed simultaneously by processing the same material.

[0288] Regarding the semiconductor device 10_35, for other aspects, reference can be made to the description of the semiconductor device 10_34 shown in FIGS. 34(A) and 34(B).

[0289] <Constitution Example 36> FIGS. 36(A) and 36(B) show a semiconductor device 10_36 having a configuration different from that of the semiconductor device 10_34 shown in FIGS. 34(A) and 34(B). FIG. 36(A) is a plan view of the semiconductor device 10_36. FIG. 36(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 36(A).

[0290] The semiconductor device 10_36 includes a transistor 20_36, a capacitor 30_36, and a transistor 50_5. It can be said that the semiconductor device 10_36 has a configuration obtained by excluding the insulating layer 11 from the semiconductor device 10_34.

[0291] Regarding the transistor 20_36 and the capacitor 30_36 in the semiconductor device 10_36, the descriptions of the transistor 20_34 and the capacitor 30_34 in the semiconductor device 10_34 can be referred to respectively.

[0292] In the semiconductor device 10_36, a conductive layer 66 that functions as one of the source electrode or the drain electrode of the transistor 50_5, and a conductive layer 68 that functions as the other of the source electrode or the drain electrode are respectively provided to be embedded in the openings provided in the insulating layer 21 and the insulating layer 39, which is different from the semiconductor device 10_34. Also, a conductive layer 67 that connects to the conductive layer 47 functioning as the gate electrode is provided to be embedded in the opening formed in the insulating layer 21, which is different from the semiconductor device 10_34. Further, a conductive layer 22 that functions as one of the source electrode or the drain electrode of the transistor 20_36 is provided in contact with the upper surface of the insulating layer 39, which is different from the semiconductor device 10_34.

[0293] Since it is not necessary to form the insulating layer 11, the semiconductor device 10_36 can reduce the number of manufacturing steps compared to the semiconductor device 10_34.

[0294] Regarding the semiconductor device 10_36, for other aspects, the descriptions of the semiconductor device 10_34 shown in FIGS. 34(A) and 34(B) can be referred to.

[0295] <Configuration Example 37> FIGS. 37(A) and 37(B) show a semiconductor device 10_37 having a configuration different from that of the semiconductor device 10_35 shown in FIGS. 35(A) and 35(B). FIG. 37(A) is a plan view of the semiconductor device 10_37. FIG. 37(B) is a cross-sectional view taken along the dashed-dotted line A - B shown in FIG. 37(A).

[0296] The semiconductor device 10_37 includes a transistor 20_37, a capacitor 30_37, and a transistor 50_6. It can be said that the semiconductor device 10_37 has a configuration obtained by excluding the insulating layer 11 from the semiconductor device 10_35.

[0297] Regarding the transistor 20_37 and the capacitor 30_37 in the semiconductor device 10_37, reference can be made to the descriptions of the transistor 20_35 and the capacitor 30_35 in the semiconductor device 10_35, respectively.

[0298] In the semiconductor device 10_37, a conductive layer 66 that functions as one of the source electrode or the drain electrode of the transistor 50_6, and a conductive layer 68 that functions as the other of the source electrode or the drain electrode are each provided so as to be embedded in openings provided in the insulating layer 25, the insulating layer 21, and the insulating layer 39, which is different from the semiconductor device 10_35. Also, a conductive layer 67 that connects to the conductive layer 47 that functions as a gate electrode is provided so as to be embedded in openings formed in the insulating layer 25 and the insulating layer 21, which is different from the semiconductor device 10_35. Further, a conductive layer 22 that functions as one of the source electrode or the drain electrode of the transistor 20_37 is provided in contact with the upper surface of the insulating layer 39, which is different from the semiconductor device 10_35.

[0299] Since the semiconductor device 10_37 does not need to form the insulating layer 11, the number of manufacturing steps can be reduced compared to the semiconductor device 10_35.

[0300] Regarding the semiconductor device 10_37, for other aspects, reference can be made to the descriptions of the semiconductor device 10_35 shown in FIGS. 35(A) and 35(B).

[0301] <Example Configuration 38> FIG. 38(A) and FIG. 38(B) show a semiconductor device 10_38 having a configuration different from that of the semiconductor device 10_26 shown in FIGS. 27(A) and 27(B). FIG. 38(A) is a plan view of the semiconductor device 10_38. FIG. 38(B) is a cross-sectional view taken along the dashed line A-B shown in FIG. 38(A).

[0302] The semiconductor device 10_38 includes a transistor 20_38 and a capacitor 30_38. For the transistor 20_38, reference can be made to the description of the transistor 20_26 included in the semiconductor device 10_26. In the semiconductor device 10_38, the configuration of the capacitor 30_38 is different from that of the capacitor 30_26 included in the semiconductor device 10_26.

[0303] Specifically, in the semiconductor device 10_38, an island-shaped insulating layer 48 is provided on the insulating layer 11 so as to have a region overlapping with the conductive layer 54 and the conductive layer 53. Then, an insulating layer 21 is provided on the conductive layer 22, on the insulating layer 48, and on the insulating layer 11. On the insulating layer 21 overlapping with the insulating layer 48, a conductive layer 29 is provided in a region overlapping with the conductive layer 54, and a conductive layer 73 is provided in a region overlapping with the conductive layer 53.

[0304] The conductive layer 29, the insulating layer 21, and the insulating layer 48 are provided with an opening 17 reaching the conductive layer 54, and a semiconductor layer 36 is provided in contact with the side walls (i.e., the side surfaces of the conductive layer 29 in the opening 17, the side surfaces of the insulating layer 21 in the opening 17, and the side surfaces of the insulating layer 48 in the opening 17) and the bottom surface (i.e., the upper surface of the conductive layer 54 in the opening 17) of the opening 17. Also, a conductive layer 62 that functions as a plug connecting the conductive layer 54 and the conductive layer 29, and a conductive layer 63 that functions as a plug connecting the conductive layer 53 and the conductive layer 73 are provided so as to be respectively embedded in openings formed in the insulating layer 48 and the insulating layer 21 with the opening 17 therebetween.

[0305] At a capacitance of 30_38, compared with a capacitance of 30_26, the distance between the conductive layer 54 and the conductive layer 29 (which may also be referred to as the total film thickness of the insulating layer 48 and the insulating layer 21) becomes longer, but the magnitude of the capacitance value itself hardly changes. On the other hand, for the transistor 20_38, when the distance between the source electrode and the drain electrode (which may also be referred to as the film thickness of the insulating layer 21) changes, the channel length changes, so the electrical characteristics such as the on-current change compared with the transistor 20_26. Therefore, by appropriately adjusting the film thickness of the insulating layer 48 and the film thickness of the insulating layer 21, for example, in the semiconductor device 10_38, it is possible to make both the magnitude of the on-current required for the transistor 20_38 and the magnitude of the capacitance value required for the capacitance 30_38 compatible with each other.

[0306] Note that in the semiconductor device 10_38, an example is shown in which the configuration on the capacitance side is changed (the configuration on the transistor side remains unchanged) by adding the insulating layer 48 to the configuration of the semiconductor device 10_26, but this is not the only case. For example, by adding an island-shaped insulating layer such as the insulating layer 48 between the source electrode and the drain electrode of the transistor, the configuration on the transistor side can be changed (the configuration on the capacitance side remains unchanged).

[0307] Regarding the semiconductor device 10_38, for other aspects, reference can be made to the description related to the semiconductor device 10_26 shown in FIGS. 27(A) and 27(B).

[0308] <Constitution Example 39> FIGS. 39(A) and 39(B) show a semiconductor device 10_39 having a configuration different from that of the semiconductor device 10_38 shown in FIGS. 38(A) and 38(B). FIG. 39(A) is a plan view of the semiconductor device 10_39. FIG. 39(B) is a cross-sectional view taken along the dashed-dotted line A-B shown in FIG. 39(A).

[0309] The semiconductor device 10_39 includes a transistor 20_39 and a capacitance 30_39. In the semiconductor device 10_39, the configuration of the capacitance 30_39 is different from that of the capacitance 30_38 included in the semiconductor device 10_38.

[0310] Specifically, in the semiconductor device 10_39, an island-shaped insulating layer 49 is provided on the insulating layer 11 so as to have a region overlapping with the insulating layer 48. Then, an insulating layer 21 is provided on the conductive layer 22, on the insulating layer 49, and on the insulating layer 11. On the insulating layer 21 overlapping with the insulating layer 48 and the insulating layer 49, a conductive layer 29 is provided in a region overlapping with the conductive layer 54, and a conductive layer 73 is provided in a region overlapping with the conductive layer 53.

[0311] The conductive layer 29, the insulating layer 21, the insulating layer 49, and the insulating layer 48 are provided with an opening 18 reaching the conductive layer 54. A semiconductor layer 36 is provided in contact with the side walls (i.e., the side surfaces of the conductive layer 29 in the opening 18, the side surfaces of the insulating layer 21 in the opening 18, the side surfaces of the insulating layer 49 in the opening 18, and the side surfaces of the insulating layer 48 in the opening 18) and the bottom surface (i.e., the upper surface of the conductive layer 54 in the opening 18) of the opening 18. Also, a conductive layer 62 that functions as a plug connecting the conductive layer 54 and the conductive layer 29, and a conductive layer 63 that functions as a plug connecting the conductive layer 53 and the conductive layer 73 are provided so as to be respectively embedded in openings formed in the insulating layer 48, the insulating layer 49, and the insulating layer 21 with the opening 18 therebetween.

[0312] Thus, in the semiconductor device according to one aspect of the present invention, the total number of island-shaped insulating layers provided between the conductive layer 54 and the conductive layer 29 can be two or more (in the case of the semiconductor device 10_39, two layers of the insulating layer 48 and the insulating layer 49). By the semiconductor device 10_39 having the above-described configuration, an effect similar to the effect that the semiconductor device 10_38 can obtain can be obtained.

[0313] Regarding the semiconductor device 10_39, for other than the above, the description related to the semiconductor device 10_38 shown in FIGS. 38(A) and 38(B) can be referred to.

[0314] The above is the description of the configuration example.

[0315] [Regarding components] 〈Substrate〉 As the substrate for forming the transistor, for example, an insulator substrate, a semiconductor substrate, or a conductor substrate may be used. Examples of the insulator substrate include a glass substrate, a quartz substrate, a sapphire substrate, a stabilized zirconia substrate (such as yttria-stabilized zirconia substrate), a resin substrate, and the like. Examples of the semiconductor substrate include a semiconductor substrate made of silicon, germanium, or a compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide, gallium oxide, or gallium nitride. Further, there is a semiconductor substrate having an insulator region inside the aforementioned semiconductor substrate, such as a SOI (Silicon On Insulator) substrate. Examples of the conductor substrate include a graphite substrate, a metal substrate, an alloy substrate, and a conductive resin substrate. Alternatively, a substrate having a metal nitride or a substrate having a metal oxide can also be used. Further, there are a substrate provided with a conductive layer or a semiconductor layer on an insulator substrate, a substrate provided with a conductive layer or an insulating layer on a semiconductor substrate, and a substrate provided with a semiconductor layer or an insulating layer on a conductor substrate. Alternatively, those with elements provided on these substrates may be used. Examples of the elements provided on the substrate include a capacitor element, a resistor element, a switch element (including a transistor), a light-emitting element, and a memory element.

[0316] 〈Semiconductor layer〉 The semiconductor layers 24, 24_1, 24_2, 24_3, 27, 28, 36, 37, and 38 (hereinafter unified as "semiconductor layer") preferably have a metal oxide (oxide semiconductor).

[0317] Examples of the metal oxide that can be used for the semiconductor layer include In oxide, Ga oxide, and Zn oxide. The metal oxide preferably contains at least In, Zn, Sn, or Al, and more preferably contains In or Zn.

[0318] Further, the metal oxide preferably has two or three selected from In, element M, and Zn. For example, an In-M-Zn oxide, an In-Zn oxide, an In-M oxide, or an M-Zn oxide can be used. Here, element M is a metal element or a metalloid element having a high binding energy with oxygen. For example, it is a metal element or a metalloid element having a higher binding energy with oxygen than indium. Examples of element M include Al, Ga, Sn, Y, Ti, V, Cr, Mn, Fe, Co, Ni, Zr, Mo, Hf, Ta, W, La, Ce, Nd, Mg, Ca, Sr, Ba, B, Si, Ge, and Sb. The metal oxide preferably contains any one or more of the above elements, and particularly preferably contains one or more selected from Al, Ga, Y, and Sn. Here, in this specification and the like, "metal element" may include a metalloid element.

[0319] The atomic ratio of In in the In-M-Zn oxide is preferably equal to or more than the atomic ratio of M. By increasing the atomic ratio of indium in the metal oxide, the on-current of the transistor, the field-effect mobility, etc. can be increased. For example, as the atomic ratio of the metal elements in the In-M-Zn oxide, the ratios of In:M:Zn are 1:1:1, 1:1:1.2, 2:1:3, 3:1:2, 4:2:3, 4:2:4.1, 5:1:3, and 5:1:6, respectively, and compositions in the vicinity thereof, etc. can be mentioned. Note that the composition in the vicinity includes a range of ±30% of the desired atomic ratio.

[0320] Further, the atomic ratio of In in the In-M-Zn oxide may be less than the atomic ratio of M. By increasing the atomic ratio of M in the metal oxide, the generation of oxygen deficiency can be suppressed. For example, as the atomic ratio of the metal elements in the In-M-Zn oxide, the ratios of In:M:Zn are 1:3:2, 1:3:3, and 1:3:4, respectively, and compositions in the vicinity thereof, etc. can be mentioned.

[0321] The semiconductor layer can use, for example, indium oxide, indium-zinc oxide, indium-gallium oxide, indium-tin oxide, indium-titanium oxide, indium-tungsten oxide, indium-gallium-aluminum oxide, indium-gallium-tin oxide, indium-gallium-zinc oxide, indium-tin-zinc oxide, indium-aluminum-zinc oxide, indium-titanium-zinc oxide, indium-tungsten-zinc oxide, indium-gallium-tin-zinc oxide, indium-gallium-aluminum-zinc oxide, etc. Further, as oxides not containing indium, gallium oxide, zinc oxide, gallium-zinc oxide, gallium-tin oxide, aluminum-zinc oxide, aluminum-tin oxide, etc. may be used. Using a material without Zn such as indium oxide is preferable because the affinity with the LSI manufacturing process is enhanced. On the other hand, using a material containing Zn is preferable because it is easy to increase the crystallinity.

[0322] In addition, the metal oxide may have a metal element with a relatively large number of atoms instead of or in addition to indium. Since the carrier conduction in the metal oxide tends to increase as the orbital overlap of the metal element is larger, the field-effect mobility of the transistor may be increased by the metal oxide containing a metal element with a large number of atoms. For example, one or more of the metal elements belonging to the fifth period and the metal elements belonging to the sixth period can be used. Specifically, Y, Zr, Ag, Cd, Sn, Sb, Ba, Pb, Bi, La, Ce, Pr, Nd, Pm, Sm, Eu, etc. can be mentioned.

[0323] Also, the metal oxide may have one or more non-metal elements. The field-effect mobility of the transistor may be increased by the metal oxide having a non-metal element. For example, C, N, P, S, Se, F, Cl, Br, H, etc. can be mentioned.

[0324] The formation of the metal oxide can preferably use a sputtering method or an ALD method. The sputtering method is preferable because it can reduce the impurity concentration. Also, the ALD method is preferable because of its excellent coating property. When the metal oxide is formed by the sputtering method, the composition of the metal oxide after film formation may be different from the composition of the target. In particular, for zinc, the content in the metal oxide after film formation may decrease to about 50% compared to the target.

[0325] In this specification and the like, the content of a certain metal element in the metal oxide refers to the ratio of the number of atoms of that element to the total number of atoms of the metal element contained in the metal oxide. For example, when the metal oxide contains metal element X, metal element Y, and metal element Z, and the number of atoms of metal element X, metal element Y, and metal element Z contained in the metal oxide are A X 、A Y 、A Z respectively, the content of metal element X can be expressed as A X / (A X +A Y +A Z ). Also, when the ratio of the number of atoms (atomic ratio) of metal element X, metal element Y, and metal element Z in the metal oxide is B X :B Y :B Z respectively, the content of metal element X can be expressed as B X / (B X +B Y +B Z ).

[0326] For example, in the case of a metal oxide containing In, by increasing the content of In, a transistor with a large on-current can be realized.

[0327] By using a metal oxide that does not contain Ga or has a low Ga content in the semiconductor layer, a transistor with high reliability against positive bias application can be obtained. That is, a transistor with a small variation in threshold voltage in the PBTS (Positive Bias Temperature Stress) test can be obtained. When using a metal oxide containing Ga, it is preferable to make the Ga content lower than the In content. Thereby, a transistor with high mobility and high reliability can be realized.

[0328] On the other hand, by increasing the Ga content, a transistor with high reliability against light can be obtained. That is, a transistor with a small variation in threshold voltage in the NBTIS (Negative Bias Temperature Illumination Stress) test can be obtained. Specifically, for a metal oxide in which the atomic ratio of Ga is equal to or more than the atomic ratio of In, the bandgap becomes larger, and the variation in threshold voltage in the NBTIS test of the transistor can be reduced.

[0329] Also, by increasing the zinc content, a metal oxide with high crystallinity can be obtained, and the diffusion of impurities in the metal oxide can be suppressed. Therefore, the variation in the electrical characteristics of the transistor is suppressed, and the reliability can be improved.

[0330] The semiconductor layer may have a stacked structure having two or more metal oxides. The two or more metal oxides included in the semiconductor layer may have the same or substantially the same composition. By forming a stacked structure of metal oxides having the same composition, for example, it can be formed using the same sputtering target, so that the manufacturing cost can be reduced. Note that a stacked structure in which two or more metal oxides having different compositions are stacked may also be used. Also, by using the ALD method, metal oxides having different compositions continuously in the thickness direction can be formed. As a result, not only does the range of design choices widen compared to the case of using a film having a fixed composition, but it is also possible to prevent the generation of interface levels and the like that occur between two layers having different compositions, thus improving the electrical characteristics and reliability of the transistor.

[0331] When the semiconductor layer has a two-layer structure, it is preferable to use a material with higher mobility (a material with higher conductivity) in the second layer, that is, the layer closer to the gate electrode, than in the first layer. Thereby, a normally-off transistor with a large on-current can be obtained. Therefore, low power consumption and high performance can be achieved simultaneously. Alternatively, a material with higher mobility than the second layer may be used in the first layer, that is, the layer in contact with the source electrode and the drain electrode. Thereby, the contact resistance between the semiconductor layer and the source electrode and the drain electrode can be reduced, so that the parasitic resistance is reduced, and a transistor with a large on-current can be obtained.

[0332] Also, when the semiconductor layer has a three-layer structure, it is preferable to use a material with higher mobility in the second layer than in the first and third layers. Thereby, a transistor with a large on-current and high reliability can be realized.

[0333] When the semiconductor layer has a stacked structure, all the layers may be formed by the same film formation method, or different film formation methods may be mixed. For example, a semiconductor layer having a stacked structure may be formed by combining a sputtering method and an ALD method. Here, in a film formation method such as the sputtering method, a mixed layer may be formed at the interface between the semiconductor layer and the surface to be formed (also referred to as mixing). Therefore, by forming the first layer using the ALD method to suppress mixing and forming the second layer using the sputtering method to form a highly crystalline film, a transistor having high reliability and high electrical characteristics can be realized. Further, a three-layer structure in which the third layer is formed using the ALD method may be used. Also, after forming a stacked film by combining the ALD method and the sputtering method, it is preferable to perform heat treatment. As a result, crystal growth may occur from the layer formed by the sputtering method toward the layer formed by the ALD method, and a semiconductor layer having high crystallinity may be formed as the entire stacked film.

[0334] Also, when the semiconductor layer has a stacked structure, a material with high mobility may be used for the layer in contact with the source electrode and the drain electrode. Thereby, the contact resistance between the semiconductor layer and the source electrode and the drain electrode is reduced, and a transistor with a large on-current can be realized. Particularly in the case of a bottom contact structure (a structure in which a semiconductor layer is provided on the source electrode and the drain electrode), since the contact resistance may be relatively high compared to a top contact structure (a structure in which the source electrode and the drain electrode are provided on the semiconductor layer), it is preferable to use a material with high mobility for the layer in contact with the source electrode and the drain electrode.

[0335] The higher the content rate of elements contributing to the improvement of conductivity, such as indium, the higher the mobility and conductivity. As an example of a material with high mobility, materials having an atomic ratio in the vicinity of, for example, In:Ga:Zn = 4:3:2, In:Zn = 1:1, In:Zn = 2:1, In:Zn = 4:1, In:Sn:Zn = 40:1:10, In:Sn:Zn = 20:1:10, In:Sn = 95:5, In:Sn = 90:10 can be mentioned. On the other hand, as materials with lower mobility compared to the materials described above, materials having an atomic ratio in the vicinity of, for example, a ratio of In:Ga:Zn of 1:3:2, 1:3:4, 2:2:1, 1:1:1, 1:1:2 can be mentioned.

[0336] It is preferable to use a metal oxide layer having crystallinity for the semiconductor layer. For example, a metal oxide layer having a CAAC (C-Axis Aligned Crystal) structure, a polycrystalline structure, a microcrystalline (nc: nano-crystal) structure, etc. can be used. By using a metal oxide layer having crystallinity for the semiconductor layer, the density of defect levels in the semiconductor layer can be reduced, and a highly reliable semiconductor device can be realized.

[0337] The higher the crystallinity of the metal oxide layer used for the semiconductor layer, the more the density of defect levels in the semiconductor layer can be reduced. On the other hand, by using a metal oxide layer with low crystallinity, a transistor capable of flowing a large current can be realized.

[0338] The OS transistor has an extremely high field-effect mobility compared to a transistor using amorphous silicon. Also, the OS transistor has a significantly small leakage current between the source and drain in the off state and can hold the charge accumulated in the capacitor connected in series with the transistor for a long period of time. Further, by applying the OS transistor, the power consumption of the semiconductor device can be reduced.

[0339] Since the OS transistor has small fluctuations in electrical characteristics due to radiation exposure, that is, it has high resistance to radiation, it can be suitably used even in an environment where radiation can enter. It can be said that the OS transistor has high reliability against radiation. For example, the OS transistor can be suitably used for the pixel circuit of an X-ray flat panel detector. In addition, the OS transistor can be suitably used for semiconductor devices used in outer space. Examples of radiation include electromagnetic radiation (e.g., X-rays and gamma rays) and particle radiation (e.g., alpha rays, beta rays, proton beams, and neutron beams).

[0340] Note that the semiconductor material that can be used for the semiconductor layer is not limited to oxide semiconductors. For example, a semiconductor composed of a single element or a compound semiconductor can be used. Examples of semiconductors composed of single elements include Si (including single crystal, polycrystal, microcrystal, and amorphous), or Ge. Examples of compound semiconductors include GaAs and SiGe. Examples of compound semiconductors include organic semiconductors, nitride semiconductors, or oxide semiconductors. Note that these semiconductor materials may contain impurities as dopants.

[0341] Alternatively, the semiconductor layer may be made of a material having a layered crystal structure. The material having a layered crystal structure has high electrical conductivity in the plane of the layer. Therefore, by using such a material having a layered crystal structure for the channel formation region, a transistor with a large on-current can be provided. Examples include graphene, silicene, and chalcogenides. Examples of chalcogenides include chalcogenides of transition elements such as Mo, W, Hf, or Zr. At this time, examples of chalcogen elements include group 16 elements such as S, Se, and Te.

[0342] The crystallinity of the semiconductor material used for the semiconductor layer is not particularly limited, and any of an amorphous semiconductor, a single crystal semiconductor, or a semiconductor having crystallinity other than a single crystal (polycrystalline semiconductor, microcrystalline semiconductor, or semiconductor having a crystal region in part) may be used. Using a semiconductor having crystallinity is preferable because deterioration of transistor characteristics can be suppressed.

[0343] 〈Gate insulating layer〉 Insulating layers 25, 25_1, 25_2, and 39 function as the gate insulating layers of the transistors and can also be used as the dielectrics of the capacitor elements. When an oxide semiconductor is used for the semiconductor layer, it is preferable to use an oxide insulating film for at least the film in contact with the semiconductor layer among insulating layers 25, 25_1, 25_2, and 39. For example, one or more of silicon oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, hafnium oxide, hafnium oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, and Ga-Zn oxide can be used. In addition, nitride insulating films such as silicon nitride, silicon oxynitride, aluminum nitride, and aluminum oxynitride can also be used as insulating layers 25, 25_1, 25_2, and 39. Further, insulating layers 25, 25_1, 25_2, and 39 may have a laminated structure, for example, a laminated structure having one or more oxide insulating films and nitride insulating films respectively.

[0344] Note that in this specification and the like, oxynitride refers to a material having a higher oxygen content than nitrogen. Nitroxide refers to a material having a higher nitrogen content than oxygen.

[0345] In addition, the insulating layers 25, 25_1, 25_2, and 39 are preferably formed by laminating insulating materials made of high-k materials. It is preferable to use a laminated structure of a material with a high relative permittivity (high-k) and a material with a higher breakdown voltage than the high-k material. For example, as the insulating layers 25, 25_1, 25_2, and 39, an insulating film (also referred to as ZAZ) laminated in the order of zirconium oxide, aluminum oxide, and zirconium oxide can be used. Further, for example, an insulating film (also referred to as ZAZA) laminated in the order of zirconium oxide, aluminum oxide, zirconium oxide, and aluminum oxide can be used. Further, for example, an insulating film laminated in the order of hafnium zirconium oxide, aluminum oxide, hafnium zirconium oxide, and aluminum oxide can be used. By laminating and using an insulator such as aluminum oxide, which has a relatively high breakdown voltage, the breakdown voltage can be improved, and electrostatic breakdown of the capacitive element can be suppressed.

[0346] In addition, as the insulating layers 25, 25_1, 25_2, and 39, a ferroelectric material may be used. Examples of ferroelectric materials include metal oxides such as hafnium oxide, zirconium oxide, and HfZrO X (where X is a real number greater than 0).

[0347] 〈Conductive layer〉 The conductive layers 22, 23, 23_1, 23_2, 29, 44, 45, 54, 66, 68, 73, and 83 are in contact with the semiconductor layer. Here, when an oxide semiconductor is used as the semiconductor layer, if a metal that is easily oxidized, such as aluminum, is used in the portion of the conductive layer in contact with the semiconductor layer, an insulating oxide (for example, aluminum oxide) may be formed between the conductive layer and the semiconductor layer, which may prevent their conduction. Therefore, it is preferable to use a conductive material that is difficult to oxidize, a conductive material that maintains a low electrical resistance even when oxidized, or an oxide conductive material at least in the portion of the conductive layer in contact with the semiconductor layer.

[0348] As the conductive layer, for example, titanium, tantalum nitride, titanium nitride, nitride containing titanium and aluminum, nitride containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium, oxide containing lanthanum and nickel, etc. are preferably used. These are preferable because they are conductive materials that are not easily oxidized or materials that maintain conductivity even when oxidized.

[0349] Alternatively, conductive oxides such as indium oxide, zinc oxide, In-Sn oxide, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide, Ga-Zn oxide can be used. In particular, conductive oxides containing indium are preferable because of their high conductivity. Alternatively, oxide materials such as In-Ga-Zn oxide that can be applied to the semiconductor layer can also be used as the conductive layer by increasing the carrier concentration.

[0350] For example, as the conductive layer, a single-layer structure of the conductive oxide film, a three-layer structure in which a titanium nitride film, a tungsten film, and a titanium nitride film are laminated in sequence, a two-layer structure in which a ruthenium film or a ruthenium oxide film is laminated on tungsten, a two-layer structure in which a ruthenium film or a ruthenium oxide film is laminated on the conductive oxide film, a two-layer structure in which the conductive oxide film is laminated on the ruthenium film or the ruthenium oxide film, etc. can be used. Since ruthenium is a material that is difficult to etch, when used, it is preferably thinner, for example, it is preferably used with a thickness of 0.1 nm or more and 2 nm or less.

[0351] The conductive layer 26, the conductive layer 46, and the conductive layer 47 function as gate electrodes, and various conductive materials can be used. As the conductive layer 26, the conductive layer 46, and the conductive layer 47, for example, metal elements selected from Al, Cr, Cu, Ag, Pt, Ta, Ni, Ti, Mo, W, Hf, V, Nb, Mn, Mg, Zr, Be, In, Ru, Ir, Sr, La, etc., and alloys containing such metal elements as components are preferably used. Further, nitrides of the above metals or alloys, or oxides of the above metals or alloys may be used. For example, it is preferable to use tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, oxides containing lanthanum and nickel, etc. Also, semiconductors with high electrical conductivity typified by polycrystalline silicon containing impurity elements such as phosphorus, and silicides such as nickel silicide may be used.

[0352] Further, nitrides and oxides that can be used for the conductive layer in contact with the above-described semiconductor layer may be applied to the conductive layer 26, the conductive layer 46, and the conductive layer 47.

[0353] Since the conductive layer in contact with the above-described semiconductor layer and the conductive layer functioning as a gate electrode also function as wiring, it is preferable to stack and use a low-resistance conductive material. For example, a low-resistance conductive material that can be used for the conductive layer functioning as the gate electrode described above can also be used for the lower layer of the conductive layer in contact with the semiconductor layer.

[0354] For the conductive layer 32, the conductive layer 33, the conductive layer 34, the conductive layer 35, the conductive layer 41, the conductive layer 42, the conductive layer 43, the conductive layer 52, the conductive layer 53, the conductive layer 54, the conductive layer 55, the conductive layer 56, the conductive layer 57, the conductive layer 58, the conductive layer 59, the conductive layer 62, the conductive layer 63, the conductive layer 65, the conductive layer 67, the conductive layer 73, the conductive layer 83, the conductive layer 84, the conductive layer 85, the conductive layer 86, the conductive layer 87, the conductive layer 88, the conductive layer 89, the conductive layer 90, the conductive layer 91, and the conductive layer 92, a low-resistance conductive material that can be used for the conductive layer 26, the conductive layer 46, and the conductive layer 47 can also be used.

[0355] <Insulating layer> The insulating layer 11, insulating layer 13, insulating layer 21, insulating layer 31, insulating layer 48, and insulating layer 49 can each be used as an interlayer insulating film. For example, it is preferably formed by a film formation method such as a sputtering method or a plasma CVD method. In particular, when using the sputtering method, since it is not necessary to use hydrogen gas as the film formation gas, a film with an extremely low hydrogen content can be obtained. Therefore, it is possible to suppress the supply of hydrogen to the semiconductor layer and stabilize the electrical characteristics of the transistor.

[0356] Since the insulating layer 21 is in contact with the channel formation region of the semiconductor layer, it is preferably an oxide insulating film. In particular, it is preferably an oxide insulating film that releases oxygen by heating. As the insulating layer 21, an oxide insulating film that can be used for the gate insulating layer can be applied.

[0357] In addition, for the film that functions as an interlayer insulating layer, it is preferable to use a film formation method that enables film formation at a high film formation rate compared to other insulating layers. For example, as the insulating layer 21, a silicon oxide film formed by the plasma CVD method using TEOS (Tetra-Ethyl-Ortho-Silicate, chemical formula: Si(OC2H5)4) as a raw material may be used. Thereby, productivity can be improved.

[0358] The insulating layer 12 functions as a base insulating layer or an interlayer insulating layer. As the insulating layer 12, it is preferable to use an insulating material that can be used for the insulating layer 21 or an insulating material that has a barrier property against oxygen or hydrogen. For example, it is preferable to use silicon nitride, silicon oxynitride, or aluminum oxide.

[0359] The above is the description of the components.

[0360] [Configuration example of pixel circuit] The semiconductor device according to one aspect of the present invention is applicable not only to a display device using a liquid crystal element as a display element but also to a display device using a light-emitting element. When increasing the emission luminance of the light-emitting element included in the pixel circuit of the display device, it is necessary to increase the amount of current flowing through the light-emitting element. For this purpose, it is necessary to increase the source-drain voltage of the driving transistor included in the pixel circuit. Since the OS transistor has a higher breakdown voltage between the source and drain compared to the Si transistor, a high voltage can be applied between the source and drain of the OS transistor. Therefore, by using the OS transistor as the driving transistor included in the pixel circuit, the amount of current flowing through the light-emitting element can be increased, and the emission luminance of the light-emitting element can be increased.

[0361] When the transistor operates in the saturation region, the OS transistor can make the change in the source-drain current smaller with respect to the change in the gate-source voltage than the Si transistor. For this reason, by applying the OS transistor to the driving transistor included in the pixel circuit, the amount of current flowing through the light-emitting element can be finely controlled. Therefore, the number of gradations in the pixel circuit can be increased. Further, even if variations in the electrical characteristics (e.g., resistance) of the light-emitting element or variations in the electrical characteristics occur, a stable current can flow.

[0362] As described above, by using the OS transistor as the driving transistor included in the pixel circuit, it is possible to achieve "suppression of black floating", "increase in emission luminance", "multi-gradation", "suppression of the influence of manufacturing variations of the light-emitting element", and the like.

[0363] Hereinafter, a configuration example of a pixel circuit in the case where a light-emitting element is used as the display element will be described.

[0364] The pixel circuit shown in FIG. 40(A) includes transistors M1 to M6, capacitors C1 and C2, and a light-emitting element EL. Wiring G1 to G3 that function as gate lines, wiring D1 that functions as a source line, and wiring V1 to V3 to which a fixed potential is supplied are connected to the pixel circuit.

[0365] Transistor M1 has its gate connected to wiring G1, one of its source or drain connected to wiring D1, and the other of its source or drain connected to one of the source or drain of transistor M3, one electrode of capacitor C1, and the gate of transistor M2, respectively. Transistor M2 has its back gate connected to the other of the source or drain of transistor M4 and one electrode of capacitor C2, one of its source or drain connected to wiring V2, and the other connected to the other of the source or drain of transistor M3, the other electrode of capacitor C1, the other electrode of capacitor C2, one of the source or drain of transistor M6, and one of the source or drain of transistor M5, respectively. The gate of transistor M3 is connected to wiring G2. The gate of transistor M4 is connected to wiring G2 and one of its source or drain is connected to wiring V3, respectively. The gate of transistor M5 is connected to wiring G3 and the other of its source or drain is connected to one electrode of light-emitting element EL, respectively. The gate of transistor M6 is connected to wiring G1 and the other of its source or drain is connected to wiring V1, respectively.

[0366] Transistor M2 functions as a driving transistor, and the other transistors function as switches. It is preferable to apply a TG transistor to transistor M2. It is preferable to apply a TG transistor or an LTPS transistor with a small parasitic capacitance to transistors M1, M4, and M6, which are greatly affected by noise in capacitors C1 and C2. Also, it is preferable to apply a vertical transistor with a large on-current to transistors M3 and M5.

[0367] In addition, since both the vertical transistor and the LTPS transistor can pass a large on-current, for example, a configuration can be adopted in which a vertical transistor is applied to transistor M1 and an LTPS transistor is applied to transistor M5.

[0368] The pixel circuit shown in FIG. 40(B) includes transistors M1 and M2, capacitors C1 and C2, and a light-emitting element EL. A wiring G1 that functions as a gate line, a wiring D1 that functions as a source line, and wirings V1 and V2 to which a fixed potential is supplied are connected to the pixel circuit.

[0369] For transistor M1, one of its source or drain is connected to wiring D1, the other of its source or drain is connected to one electrode of capacitor C1 and the gate of transistor M2, respectively, and its gate is connected to wiring G1. For transistor M2, one of its source or drain is connected to the other electrode of capacitor C1, one electrode of capacitor C2, and one electrode of light-emitting element EL, respectively, and the other of its source or drain is connected to wiring V1. The other electrode of capacitor C2 is connected to wiring V2.

[0370] Transistor M2 functions as a driving transistor, and the other transistors function as switches. It is preferable to apply a TG transistor to transistor M2. It is preferable to apply a TG transistor with a small parasitic capacitance or an LTPS transistor to transistor M1, which is greatly affected by noise in capacitors C1 and C2.

[0371] The pixel circuit shown in FIG. 40(C) includes transistors M1 to M4, capacitors C1 and C2, and a light-emitting element EL. Wirings G1 to G3 that function as gate lines, a wiring D1 that functions as a source line, and wirings V1 and V2 to which a fixed potential is supplied are connected to the pixel circuit.

[0372] Transistor M1 has its gate connected to wiring G3, one of its source or drain connected to wiring D1, the other of its source or drain connected to one electrode of capacitor C1 and the gate of transistor M2, respectively. Transistor M2 has one of its source or drain and its back gate connected to the other electrode of capacitor C1, one electrode of capacitor C2, one of the source or drain of transistor M3, and one electrode of light-emitting element EL, respectively, and the other of its source or drain connected to one of the source or drain of transistor M4. Transistor M3 has its gate connected to wiring G1 and the other of its source or drain connected to wiring V2, respectively. Transistor M4 has its gate connected to wiring G2 and the other of its source or drain connected to wiring V1, respectively. Capacitor C2 has its other electrode connected to wiring V1.

[0373] Transistor M2 functions as a driving transistor, and the other transistors function as switches. It is preferable to apply a TG transistor to transistor M2. It is preferable to apply a TG transistor or an LTPS transistor with a small parasitic capacitance to transistor M1, which is greatly affected by noise to capacitors C1 and C2. Also, it is preferable to apply a vertical transistor with a large on-current to transistors M3 and M4.

[0374] The pixel circuit shown in FIG. 40(D) has transistors M1 to M6, capacitors C1 and C2, and light-emitting element EL. Wiring G1 to G4 functioning as gate lines, wiring D1 functioning as a source line, and wiring V1 and V2 to which a fixed potential is supplied are connected to the pixel circuit.

[0375] Transistor M1 has its gate connected to wiring G1, one of its source or drain connected to wiring V1, and the other of its source or drain connected to one of the source or drain of transistor M3 and one of the source or drain of transistor M2, respectively. Transistor M2 has its gate and back gate connected to wiring G2 and the gate of transistor M6, and the other of its source or drain connected to one electrode of capacitor C1 and the gate of transistor M3, respectively. Transistor M3 has its back gate and the other of its source or drain connected to the other of the source or drain of transistor M4 and one of the source or drain of transistor M5. Transistor M4 has its gate and back gate connected to wiring G4 and the other electrode of capacitor C2, and the other of its source or drain connected to wiring D1, respectively. Transistor M5 has its gate connected to wiring G3, and the other of its source or drain connected to one electrode of light-emitting element EL, the other electrode of capacitor C1, one electrode of capacitor C2, and one of the source or drain of transistor M6, respectively. Transistor M6 has the other of its source or drain connected to wiring V2.

[0376] Transistor M3 functions as a driving transistor, and the other transistors function as switches. It is preferable to apply a TG transistor to transistor M3. To transistor M2, which is greatly affected by noise to capacitors C1 and C2, it is preferable to apply a TG transistor or an LTPS transistor with a small parasitic capacitance. Also, to transistors M1, M4, M5, and M6, it is preferable to apply a vertical transistor with a large on-current.

[0377] The pixel circuit shown in FIG. 41(A) has transistors M1 to M4, capacitor C1, and light-emitting element EL. Wiring G1 to G3 that function as gate lines, wiring D1 that functions as a source line, and wiring V1 to V3 to which a fixed potential is supplied are connected to the pixel circuit.

[0378] Transistor M1 has its gate connected to wiring G1, one of its source or drain connected to wiring D1, and the other of its source or drain connected to the gate of transistor M2, one electrode of capacitor C1, and the other of the source or drain of transistor M3, respectively. Transistor M2 has one of its source or drain connected to wiring V2, and the other of its source or drain connected to the other electrode of capacitor C1, one electrode of light-emitting element EL, and one electrode of transistor M4, respectively. Transistor M3 has its gate connected to wiring G2, and one of its source or drain connected to wiring V1, respectively. Transistor M4 has its gate connected to wiring G3, and the other of its source or drain connected to wiring V3, respectively.

[0379] Transistor M2 functions as a driving transistor, and the other transistors function as switches. It is preferable to apply a TG transistor to transistor M2. To transistor M1, which is greatly affected by noise to capacitor C1, it is preferable to apply a TG transistor with a small parasitic capacitance or an LTPS transistor. Also, to transistors M3 and M4, it is preferable to apply vertical transistors with a large on-current.

[0380] The pixel circuit shown in Fig. 41(B) has transistors M1 to M3, capacitor C1, and light-emitting element EL. To the pixel circuit, wiring G1 and wiring G2 that function as gate lines, wiring D1 that functions as a source line, and wiring V1 and wiring V2 to which a fixed potential is supplied are connected.

[0381] Transistor M1 has its gate connected to wiring G2, one of its source or drain connected to wiring D1, and the other of its source or drain connected to one electrode of capacitor C1 and the gate of transistor M2, respectively. Transistor M2 has its back gate and one of its source or drain connected to the other electrode of capacitor C1, one electrode of light-emitting element EL, and the other of the source or drain of transistor M3, respectively, and the other of its source or drain connected to wiring V1. Transistor M3 has its gate connected to wiring G1, and one of its source or drain connected to wiring V2, respectively.

[0382] Transistor M2 functions as a driving transistor, and the other transistors function as switches. It is preferable to apply a TG transistor to transistor M2. For transistor M1, which is greatly affected by noise on capacitor C1, it is preferable to apply a TG transistor or an LTPS transistor with a small parasitic capacitance. Also, for transistor M3, it is preferable to apply a vertical transistor with a large on-current.

[0383] The pixel circuit shown in FIG. 41(C) includes transistors M1 to M6, capacitor C1, and light-emitting element EL. The pixel circuit is connected to wirings G1 to G3 that function as gate lines, wiring D1 that functions as a source line, and wirings V1 and V2 to which a fixed potential is supplied.

[0384] For transistor M1, one of the gate is connected to wiring G2, one of the source or drain is connected to wiring D1, and the other of the source or drain is connected to one electrode of capacitor C1 and one of the source or drain of transistor M5, respectively. For transistor M2, one of the gate is connected to the other of the source or drain of transistor M3, the other electrode of capacitor C1, and the other of the source or drain of transistor M6, one of the source or drain is connected to one of the source or drain of transistor M4 and the other of the source or drain of transistor M6, and the other of the source or drain is connected to wiring V2, respectively. For transistor M3, one of the gate is connected to wiring G1 and one of the source or drain is connected to wiring V1, respectively. For transistor M4, one of the gate is connected to wiring G3 and the gate of transistor M5, and the other of the source or drain is connected to one electrode of light-emitting element EL, respectively. For transistor M5, the other of the source or drain is connected to wiring V1. For transistor M6, one of the gate is connected to wiring G2.

[0385] Here, an example in which all of transistors M1 to M6 are p-channel transistors is shown, but one or more of them may be n-channel transistors.

[0386] Transistor M2 functions as a driving transistor, and the other transistors function as switches. It is preferable to apply a p-channel type LTPS transistor to transistor M2. It is preferable to apply a TG transistor with a small parasitic capacitance to transistors M1, M3, and M6 that are greatly affected by noise to capacitor C1. Also, it is preferable to apply a vertical transistor or an LTPS transistor with a large on-current to transistors M4 and M5. When applying a TG transistor and a vertical transistor, it is preferable to use an n-channel type transistor.

[0387] The pixel circuit shown in FIG. 41(D) has transistors M1 to M6, capacitor C1, and light-emitting element EL. Wiring G1 to G3 that function as gate lines, wiring D1 that functions as a source line, and wiring V1 and V2 to which a fixed potential is supplied are connected to the pixel circuit.

[0388] For transistor M1, one of the gate is connected to wiring G2, one of the source or drain is connected to wiring D1, and the other of the source or drain is connected to one electrode of capacitor C1 and one of the source or drain of transistor M5, respectively. For transistor M2, one of the gate is connected to the other electrode of capacitor C1 and the other of the source or drain of transistor M6, one of the source or drain is connected to one of the source or drain of transistor M4 and the other of the source or drain of transistor M6, and the other of the source or drain is connected to wiring V2, respectively. For transistor M3, one of the gate is connected to wiring G1, one of the source or drain is connected to wiring V1, and the other of the source or drain is connected to the other of the source or drain of transistor M4 and one electrode of light-emitting element EL, respectively. For transistor M4, the gate is connected to wiring G3 and the gate of transistor M5. For transistor M5, the other of the source or drain is connected to wiring V1. For transistor M6, the gate is connected to wiring G2.

[0389] Here, an example in which all of the transistors M1 to M6 are p-channel transistors has been shown, but one or more of them may be n-channel transistors.

[0390] Transistor M2 functions as a driving transistor, and the other transistors function as switches. It is preferable to apply a p-channel LTPS transistor to transistor M2. It is preferable to apply a TG transistor with a small parasitic capacitance to transistors M1 and M6 that are greatly affected by noise to capacitor C1. Also, it is preferable to apply a vertical transistor or an LTPS transistor with a large on-current to transistors M3, M4, and M5. When applying a TG transistor and a vertical transistor, it is preferable to use an n-channel transistor.

[0391] The pixel circuit shown in FIG. 42 includes transistors M1 to M7, a capacitor C1, and a light-emitting element EL. Wiring G1 to G4 that function as gate lines, wiring D1 that functions as a source line, and wiring V1 and V2 to which a fixed potential is supplied are connected to the pixel circuit.

[0392] Transistor M1 has its gate connected to wiring G2, one of its source or drain connected to wiring D1, and the other of its source or drain connected to one of the source or drain of transistor M2 and one of the source or drain of transistor M3, respectively. Transistor M2 has its gate connected to wiring G3 and the other of its source or drain connected to wiring V1, respectively. Transistor M3 has its gate connected to one electrode of capacitor C1, the other of the source or drain of transistor M4, and one of the source or drain of transistor M6, its back gate connected to wiring V1, and the other of its source or drain connected to one of the source or drain of transistor M4 and one of the source or drain of transistor M5, respectively. Transistor M4 has its gate connected to wiring G2. Transistor M5 has its gate connected to wiring G3, the other of its source or drain connected to one electrode of light-emitting element EL, and one of the source or drain of transistor M7, respectively. Transistor M6 has its gate connected to wiring G1 and the other of its source or drain connected to wiring V2, respectively. Transistor M7 has its gate connected to wiring G4 and the other of its source or drain connected to wiring V2, respectively. Capacitor C1 has its other electrode connected to wiring V1.

[0393] Here, an example in which all of transistors M1 to M7 are p-channel transistors is shown, but one or more of them may be n-channel transistors.

[0394] Transistor M3 functions as a driving transistor, and the other transistors function as switches. It is preferable to apply a p-channel LTPS transistor to transistor M3. It is preferable to apply a TG transistor with a small parasitic capacitance to transistors M4 and M6, which are greatly affected by noise to capacitor C1. Also, it is preferable to apply a vertical transistor or an LTPS transistor with a large on-current to transistors M1, M2, M5, and M7. When applying a TG transistor and a vertical transistor, it is preferable to use an n-channel transistor.

[0395] The above is an example of a pixel circuit.

[0396] This embodiment can be implemented in appropriate combination with at least some of the other embodiments described in this specification.

[0397] (Embodiment 2) In this embodiment, an electronic device according to an aspect of the present invention will be described with reference to FIGS. 43(A) to 45(G).

[0398] The electronic device of this embodiment has a display device according to an aspect of the present invention in a display unit. The display device according to an aspect of the present invention is easy to achieve high definition and high resolution. Therefore, it can be used in the display units of various electronic devices.

[0399] In addition, the semiconductor device according to an aspect of the present invention can also be applied to other than the display unit of an electronic device. For example, by using the semiconductor device according to an aspect of the present invention in a control unit or the like of an electronic device, power consumption can be reduced, which is preferable.

[0400] Examples of the electronic device include, for example, television devices, desktop or notebook personal computers, monitors for computers, digital signage, large game machines such as pachinko machines, and other electronic devices having a relatively large screen, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, portable information terminals, audio playback devices, and the like.

[0401] In particular, since the display device according to one aspect of the present invention can enhance the definition, it can be suitably used for an electronic device having a relatively small display unit. Examples of such electronic devices include wristwatch-type and bracelet-type information terminals (wearable devices), as well as virtual reality (VR: Virtual Reality)-oriented devices such as head-mounted displays, glasses-type augmented reality (AR: Augmented Reality)-oriented devices, mixed reality (MR: Mixed Reality)-oriented devices, and other wearable devices that can be worn on the head.

[0402] The display device according to one aspect of the present invention preferably has an extremely high resolution such as HD (number of pixels: 1280 × 720), FHD (number of pixels: 1920 × 1080), WQHD (number of pixels: 2560 × 1440), WQXGA (number of pixels: 2560 × 1600), 4K (number of pixels: 3840 × 2160), 8K (number of pixels: 7680 × 4320). In particular, it is preferably set to a resolution of 4K, 8K, or higher. Further, the pixel density (definition) in the display device according to one aspect of the present invention is preferably 100 ppi or more, more preferably 300 ppi or more, still more preferably 500 ppi or more, still more preferably 1000 ppi or more, still more preferably 2000 ppi or more, still more preferably 3000 ppi or more, still more preferably 5000 ppi or more, and even more preferably 7000 ppi or more. By using a display device having one or both of such a high resolution and a high definition, it is possible to further enhance the sense of presence and the sense of depth. Further, there is no particular limitation on the screen ratio (aspect ratio) of the display device according to one aspect of the present invention. For example, the display device can support various screen ratios such as 1:1 (square), 4:3, 16:9, 16:10.

[0403] The electronic device of the present embodiment may include a sensor (including a function of detecting, detecting, or measuring force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays).

[0404] The electronic device of this embodiment can have various functions. For example, it can have functions such as displaying various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function of displaying a calendar, date, or time, a function of executing various software (programs), a wireless communication function, a function of reading programs or data recorded on a recording medium, etc.

[0405] An example of a wearable device that can be worn on the head will be described with reference to FIGS. 43(A) to 43(D). These wearable devices have at least one of a function of displaying AR content, a function of displaying VR content, a function of displaying Substitutional Reality (SR) content, and a function of displaying MR content. By having the function of displaying at least one of AR, VR, SR, and MR content, it becomes possible to enhance the user's sense of immersion.

[0406] The electronic device 700A shown in FIG. 43(A) and the electronic device 700B shown in FIG. 43(B) each have a pair of display panels 751, a pair of housings 721, a communication unit (not shown), a pair of mounting parts 723, a control unit (not shown), an imaging unit (not shown), a pair of optical members 753, a frame 757, and a pair of nose pads 758.

[0407] The display device of one aspect of the present invention can be applied to the display panel 751. Therefore, an electronic device capable of extremely high-precision display can be obtained.

[0408] The electronic device 700A and the electronic device 700B can each project the image displayed on the display panel 751 onto the display area 756 of the optical member 753. Since the optical member 753 has translucency, the user can view the image displayed in the display area superimposed on the transmitted image viewed through the optical member 753. Therefore, the electronic device 700A and the electronic device 700B are each an electronic device capable of AR display.

[0409] The electronic device 700A and the electronic device 700B may each be provided with a camera capable of imaging the front as an imaging unit. Further, the electronic device 700A and the electronic device 700B may each be provided with an acceleration sensor such as a gyro sensor to detect the orientation of the user's head and display an image corresponding to the orientation in the display area 756.

[0410] The communication unit has a wireless communication device, and the wireless communication device can supply a video signal or the like. Note that instead of or in addition to the wireless communication device, a connector capable of connecting a cable to which a video signal and a power supply potential are supplied may be provided.

[0411] The electronic device 700A and the electronic device 700B are each provided with a battery and can be charged by one or both of wireless and wired methods.

[0412] The housing 721 may be provided with a touch sensor module. The touch sensor module has a function of detecting that the outer surface of the housing 721 is touched. By the touch sensor module, a tap operation or a slide operation of the user can be detected, and various processes can be executed. For example, it becomes possible to execute processes such as pausing or resuming a moving image by a tap operation, and it becomes possible to execute a fast-forward or rewind process by a slide operation. Further, by providing a touch sensor module on each of the two housings 721, the range of operations can be widened.

[0413] As the touch sensor module, various touch sensors can be applied. For example, various methods such as a capacitance method, a resistive film method, an infrared method, an electromagnetic induction method, a surface acoustic wave method, and an optical method can be adopted. In particular, it is preferable to apply a capacitance method or an optical method sensor to the touch sensor module.

[0414] When using an optical touch sensor, a photoelectric conversion element can be used as the light receiving element. One or both of an inorganic semiconductor and an organic semiconductor can be used for the active layer of the photoelectric conversion element.

[0415] The electronic device 800A shown in Fig. 43(C) and the electronic device 800B shown in Fig. 43(D) each include a pair of display units 820, a housing 821, a communication unit 822, a pair of mounting units 823, a control unit 824, a pair of imaging units 825, and a pair of lenses 832.

[0416] The display device according to one aspect of the present invention can be applied to the display unit 820. Therefore, an electronic device capable of extremely high-precision display can be obtained. As a result, a high sense of immersion can be given to the user.

[0417] The display unit 820 is provided at a position inside the housing 821 where it can be visually recognized through the lens 832. Also, by displaying different images on the pair of display units 820, three-dimensional display using parallax can be performed.

[0418] The electronic device 800A and the electronic device 800B can each be said to be an electronic device for VR. A user wearing the electronic device 800A or the electronic device 800B can visually recognize the image displayed on the display unit 820 through the lens 832.

[0419] The electronic device 800A and the electronic device 800B preferably each have a mechanism capable of adjusting the left and right positions thereof so that the lens 832 and the display unit 820 are at optimal positions according to the position of the user's eyes. Also, it preferably has a mechanism for adjusting focus by changing the distance between the lens 832 and the display unit 820.

[0420] With the mounting part 823, the user can mount the electronic device 800A or the electronic device 800B on the head. In addition, in Fig. 43(C) etc., it is illustrated as having a shape like the temple of glasses (also referred to as a temple), but it is not limited to this. The mounting part 823 only needs to be able to be mounted by the user, and for example, it may have a helmet type or band type shape.

[0421] The imaging unit 825 has a function of acquiring external information. The data acquired by the imaging unit 825 can be output to the display unit 820. An image sensor can be used for the imaging unit 825. Also, a plurality of cameras may be provided so as to be able to support a plurality of viewing angles such as telephoto and wide angle.

[0422] Here, an example having the imaging unit 825 is shown, but a distance measuring sensor (hereinafter also referred to as a detection unit) capable of measuring the distance of an object may be provided. That is, the imaging unit 825 is one aspect of the detection unit. As the detection unit, for example, an image sensor or a distance image sensor such as a lidar (Light Detection And Ranging) can be used. By using the image obtained by the camera and the image obtained by the distance image sensor, more information can be acquired and a more accurate gesture operation can be enabled.

[0423] The electronic device 800A may have a vibration mechanism that functions as a bone conduction earphone. For example, a configuration having the vibration mechanism can be applied to any one or more of the display unit 820, the housing 821, and the mounting part 823. Thereby, there is no need for a separate acoustic device such as headphones, earphones, or a speaker, and the user can enjoy video and audio just by wearing the electronic device 800A.

[0424] The electronic device 800A and the electronic device 800B may each have an input terminal. A cable for supplying a video signal from a video output device or the like, power for charging a battery provided in the electronic device, etc. can be connected to the input terminal.

[0425] An electronic device according to an aspect of the present invention may have a function of performing wireless communication with an earphone 750. The earphone 750 has a communication unit (not shown) and has a wireless communication function. The earphone 750 can receive information (for example, audio data) from the electronic device by the wireless communication function. For example, the electronic device 700A shown in FIG. 43(A) has a function of transmitting information to the earphone 750 by the wireless communication function. Also, for example, the electronic device 800A shown in FIG. 43(C) has a function of transmitting information to the earphone 750 by the wireless communication function.

[0426] The electronic device may have an earphone unit. The electronic device 700B shown in FIG. 43(B) has an earphone unit 727. For example, the earphone unit 727 and the control unit may be configured to be wired-connected to each other. A part of the wiring connecting the earphone unit 727 and the control unit may be disposed inside the housing 721 or the mounting unit 723.

[0427] Similarly, the electronic device 800B shown in FIG. 43(D) has an earphone unit 827. For example, the earphone unit 827 and the control unit 824 may be configured to be wired-connected to each other. A part of the wiring connecting the earphone unit 827 and the control unit 824 may be disposed inside the housing 821 or the mounting unit 823. Also, the earphone unit 827 and the mounting unit 823 may have magnets. Thereby, the earphone unit 827 can be fixed to the mounting unit 823 by magnetic force, which is preferable because storage is easy.

[0428] Note that the electronic device may have an audio output terminal to which an earphone or a headset can be connected. Also, the electronic device may have one or both of an audio input terminal and an audio input mechanism. As the audio input mechanism, for example, a sound collecting device such as a microphone can be used. By the electronic device having the audio input mechanism, a function as a so-called headset may be imparted to the electronic device.

[0429] As described above, as the electronic device according to one aspect of the present invention, either a glasses type (such as electronic device 700A and electronic device 700B) or a goggles type (such as electronic device 800A and electronic device 800B) is suitable.

[0430] The electronic device according to one aspect of the present invention can transmit information to the earphone, either by wire or wirelessly.

[0431] The electronic device 6500 shown in FIG. 44(A) is a portable information terminal that can be used as a smartphone.

[0432] The electronic device 6500 includes a housing 6501, a display unit 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, a light source 6508, etc. The display unit 6502 has a touch panel function.

[0433] The display device according to one aspect of the present invention can be applied to the display unit 6502.

[0434] FIG. 44(B) is a schematic cross-sectional view including the end portion on the microphone 6506 side of the housing 6501.

[0435] A protective member 6510 having translucency is provided on the display surface side of the housing 6501, and a display panel 6511, an optical member 6512, a touch sensor panel 6513, a printed circuit board 6517, a battery 6518, etc. are arranged in the space surrounded by the housing 6501 and the protective member 6510.

[0436] The display panel 6511, the optical member 6512, and the touch sensor panel 6513 are fixed to the protective member 6510 by an adhesive layer (not shown).

[0437] In a region outside the display unit 6502, a part of the display panel 6511 is folded back, and an FPC 6515 is connected to the folded-back portion. An IC 6516 is mounted on the FPC 6515. The FPC 6515 is connected to a terminal provided on the printed circuit board 6517.

[0438] The display panel 6511 can be applied with the display device of one aspect of the present invention. Therefore, an extremely lightweight electronic device can be realized. Further, since the display panel 6511 is extremely thin, a large-capacity battery 6518 can be mounted while suppressing the thickness of the electronic device. Further, by folding back a part of the display panel 6511 and arranging a connection portion with the FPC 6515 on the back side of the pixel portion, a narrow bezel electronic device can be realized.

[0439] An example of a television device is shown in FIG. 44(C). In the television device 7100, a display unit 7000 is incorporated in a housing 7101. Here, a configuration in which the housing 7101 is supported by a stand 7103 is shown.

[0440] The display device of one aspect of the present invention can be applied to the display unit 7000.

[0441] The operation of the television device 7100 shown in FIG. 44(C) can be performed by an operation switch provided in the housing 7101 and a separate remote control operation unit 7111. Alternatively, the display unit 7000 may be provided with a touch sensor, and the television device 7100 may be operated by touching the display unit 7000 with a finger or the like. The remote control operation unit 7111 may have a display unit for displaying information output from the remote control operation unit 7111. Channel and volume operations can be performed by operation keys or a touch panel provided in the remote control operation unit 7111, and the video displayed on the display unit 7000 can be operated.

[0442] Note that the television device 7100 has a configuration including a receiver, a modem, and the like. General television broadcasts can be received by the receiver. Further, by connecting to a communication network by wire or wirelessly via the modem, one-way (from sender to receiver) or two-way (between sender and receiver, or between receivers, etc.) information communication is also possible.

[0443] FIG. 44(D) shows an example of a notebook personal computer. The notebook personal computer 7200 has a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, etc. A display unit 7000 is incorporated in the housing 7211.

[0444] The display device according to one aspect of the present invention can be applied to the display unit 7000.

[0445] FIGS. 44(E) and 44(F) show an example of digital signage.

[0446] The digital signage 7300 shown in FIG. 44(E) has a housing 7301, a display unit 7000, a speaker 7303, etc. Further, it can have an LED lamp, operation keys (including a power switch or an operation switch), connection terminals, various sensors, a microphone, etc.

[0447] FIG. 44(F) shows a digital signage 7400 attached to a cylindrical column 7401. The digital signage 7400 has a display unit 7000 provided along the curved surface of the column 7401.

[0448] In FIGS. 44(E) and 44(F), the display device according to one aspect of the present invention can be applied to the display unit 7000.

[0449] The larger the display unit 7000 is, the larger the amount of information that can be provided at one time can be increased. Also, the larger the display unit 7000 is, the easier it is for people's eyes to notice, and for example, the advertising effect can be enhanced.

[0450] By applying a touch panel to the display unit 7000, not only can an image or a video be displayed on the display unit 7000, but also the user can operate it intuitively, which is preferable. Also, when used for applications such as providing route information or traffic information, the usability can be improved by intuitive operation.

[0451] As shown in FIGS. 44(E) and 44(F), it is preferable that the digital signage 7300 or the digital signage 7400 can be linked by wireless communication with an information terminal 7311 such as a smartphone or an information terminal 7411 held by a user. For example, the information of the advertisement displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411. Further, by operating the information terminal 7311 or the information terminal 7411, the display on the display unit 7000 can be switched.

[0452] It is also possible to execute a game on the digital signage 7300 or the digital signage 7400, using the screen of the information terminal 7311 or the information terminal 7411 as an operation means (controller). As a result, an unspecified number of users can participate in the game and enjoy it at the same time.

[0453] The electronic device shown in FIGS. 45(A) to 45(G) includes a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), connection terminals 9006, a sensor 9007 (including a function of detecting, detecting, or measuring force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays), a microphone 9008, etc.

[0454] In FIGS. 45(A) to 45(G), the display device according to one aspect of the present invention can be applied to the display unit 9001.

[0455] The electronic devices shown in FIGS. 45(A) to 45(G) have various functions. For example, it can have functions such as displaying various information (still images, moving images, text images, etc.) on a display unit, a touch panel function, a function of displaying a calendar, date, or time, a function of controlling processing by various software (programs), a wireless communication function, a function of reading and processing programs or data recorded on a recording medium, etc. Note that the functions of the electronic device are not limited to these, and it can have various functions. The electronic device may have a plurality of display units. Also, the electronic device may be provided with a camera or the like, and have functions such as taking a still image or a moving image and storing it in a recording medium (external or built into the camera), and displaying the taken image on the display unit, etc.

[0456] Details of the electronic devices shown in FIGS. 45(A) to 45(G) will be described below.

[0457] FIG. 45(A) is a perspective view showing a portable information terminal 9101. The portable information terminal 9101 can be used as, for example, a smartphone. Note that the portable information terminal 9101 may be provided with a speaker 9003, a connection terminal 9006, a sensor 9007, etc. Also, the portable information terminal 9101 can display character and image information on its plurality of surfaces. FIG. 45(A) shows an example in which three icons 9050 are displayed. Also, information 9051 indicated by a dashed rectangle can be displayed on other surfaces of the display unit 9001. Examples of the information 9051 include notifications of incoming calls such as e-mail, SNS, and phone calls, titles, sender names, dates, times, remaining battery levels, radio wave intensities, etc. of e-mail or SNS. Or, icons 9050 etc. may be displayed at the position where the information 9051 is displayed.

[0458] FIG. 45(B) is a perspective view showing a portable information terminal 9102. The portable information terminal 9102 has a function of displaying information on three or more sides of a display unit 9001. Here, an example is shown in which information 9052, information 9053, and information 9054 are respectively displayed on different sides. For example, the user can also check the information 9053 displayed at a position where the user can observe from above the portable information terminal 9102 while the portable information terminal 9102 is stored in the breast pocket of the clothing. The user can check the display without taking the portable information terminal 9102 out of the pocket and can, for example, determine whether to receive a call.

[0459] FIG. 45(C) is a perspective view showing a tablet terminal 9103. As an example, the tablet terminal 9103 can execute various applications such as a mobile phone, e-mail, text browsing and creation, music playback, Internet communication, and computer games. The tablet terminal 9103 has a display unit 9001, a camera 9002, a microphone 9008, and a speaker 9003 on the front surface of a housing 9000, and operation keys 9005 as operation buttons on the side surface of the housing 9000 and connection terminals 9006 on the bottom surface of the housing 9000.

[0460] FIG. 45(D) is a perspective view showing a wristwatch-type portable information terminal 9200. The portable information terminal 9200 can be used, for example, as a smartwatch (registered trademark). Further, the display surface of the display unit 9001 is provided to be curved, and the display can be performed along the curved display surface. Further, the portable information terminal 9200 can also perform hands-free calling by mutually communicating with, for example, a wirelessly communicable headset. Further, the portable information terminal 9200 can also mutually transmit data with other information terminals and perform charging by the connection terminals 9006. Note that the charging operation may be performed by wireless power supply.

[0461] Figs. 45(E) to 45(G) are perspective views showing a foldable portable information terminal 9201. Fig. 45(E) shows the portable information terminal 9201 in an unfolded state, Fig. 45(G) shows the portable information terminal 9201 in a folded state, and Fig. 45(F) is a perspective view of a state in the process of changing from one of Fig. 45(E) and Fig. 45(G) to the other. The portable information terminal 9201 has excellent portability in the folded state and excellent display listability due to a seamless wide display area in the unfolded state. A display unit 9001 included in the portable information terminal 9201 is supported by three housings 9000 connected by a hinge 9055. For example, the display unit 9001 can be bent with a curvature radius of 0.1 mm or more and 150 mm or less.

[0462] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification.

Description of Reference Numerals

[0463] 10_1: Semiconductor device, 10_2: Semiconductor device, 10_3: Semiconductor device, 10_4: Semiconductor device, 10_5: Semiconductor device, 10_6: Semiconductor device, 10_7: Semiconductor device, 10_8: Semiconductor device, 10_9: Semiconductor device, 10_10: Semiconductor device, 10_11: Semiconductor device, 10_12: Semiconductor device, 10_13: Semiconductor device, 10_14: Semiconductor device, 10_15: Semiconductor device, 10_16: Semiconductor device, 10_17: Semiconductor device, 10_18: Semiconductor device, 10_19: Semiconductor device, 10_20: Semiconductor device, 10_21: Semiconductor device, 10_22: Semiconductor device, 10_23: Semiconductor device, 10_24: Semiconductor device, 10_25: Semiconductor device, 10_26: Semiconductor device, 10_27: Semiconductor device, 10_28: Semiconductor device, 10_29: Semiconductor device, 10_30: Semiconductor device, 10_31: Semiconductor device, 10_32: Semiconductor device, 10_33: Semiconductor device, 10_34: Semiconductor device, 10_35: Semiconductor device, 10_36: Semiconductor device, 10_37: Semiconductor device, 10_38: Semiconductor device, 10_39: Semiconductor device, 11: Insulating layer, 12: Insulating layer, 13: Insulating layer, 14: Opening, 15: Opening, 16: Opening, 17: Opening, 18: Opening, 20_1: Transistor, 20_2: Transistor, 20_3: Transistor, 20_4: Transistor, 20_5: Transistor, 20_6: Transistor, 20_7: Transistor, 20_8: Transistor, 20_9: Transistor, 20_10: Transistor, 20_11: Transistor, 20_12: Transistor, 20_13: Transistor, 20_14: Transistor, 20_15: Transistor, 20_16: Transistor, 20_17: Transistor, 20_18: Transistor, 20_19: Transistor, 20_20: Transistor, 20_21: Transistor, 20_22: Transistor, 20_23: Transistor, 20_24: Transistor, 20_25: Transistor, 20_26: Transistor, 20_27: Transistor, 20_28: Transistor, 20_29: Transistor, 20_30: Transistor, 20_31: Transistor, 20_32: Transistor, 20_33: Transistor, 20_34: Transistor, 20_35: Transistor, 20_36: Transistor, 20_37: Transistor, 20_38: Transistor,20_39: Transistor, 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Conductive layer, 86: Conductive layer, 87: Conductive layer, 88: Conductive layer, 89: Conductive layer, 90: Conductive layer, 91: Conductive layer, 92: Conductive layer, 100: Display device, 101: Pixel section, 102: Source line drive circuit section, 103: Gate line drive circuit section, 104: Protection circuit section, 105: Touch sensor drive circuit section, 700A: Electronic device, 700B: Electronic device, 721: Housing, 723: Mounting portion, 727: Earphone portion750: Earphone, 751: Display panel, 753: Optical member, 756: Display area, 757: Frame, 758: Nose pad, 800A: Electronic device, 800B: Electronic device, 820: Display unit, 821: Housing, 822: Communication unit, 823: Mounting unit, 824: Control unit, 825: Imaging unit, 827: Earphone unit, 832: Lens, 6500: Electronic device, 6501: Housing, 6502: Display unit, 6503: Power button, 6504: Button, 6505: Speaker, 6506: Microphone, 6507: Camera, 6508: Light source, 6510: Protection member, 6511: Display panel, 6512: Optical member, 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Claims

1. A transistor, a capacitor, and a first insulating layer, the transistor includes a first conductive layer, a second conductive layer, a third conductive layer, a semiconductor layer, and a second insulating layer; the first insulating layer overlies the first conductive layer; the second conductive layer is located on the first insulating layer; the second conductive layer and the first insulating layer have an opening reaching the first conductive layer; In the opening, the semiconductor layer contacts a side surface of the second conductive layer, a side surface of the first insulating layer, and an upper surface of the first conductive layer; the second insulating layer is in contact with an upper surface of the semiconductor layer and an upper surface of the second conductive layer; the third conductive layer is located on the second insulating layer so as to have an area overlapping with the semiconductor layer; the capacitor includes the second conductive layer, the second insulating layer, and a fourth conductive layer; the fourth conductive layer is located on the second insulating layer so as to have an area overlapping with the second conductive layer; Semiconductor device.

2. In claim 1, the third conductive layer and the fourth conductive layer have the same material. Semiconductor device.

3. In claim 1 or 2, a fifth conductive layer on the same layer as the first conductive layer; the fifth conductive layer has a region overlapping with the second conductive layer via the first insulating layer, the capacitor has, in addition to the second conductive layer, the second insulating layer, and the fourth conductive layer, the fifth conductive layer, and the first insulating layer; Semiconductor device.

4. In claim 1 or 2, the semiconductor layer has a region sandwiched between the second conductive layer and the fourth conductive layer, The region functions as a dielectric of the capacitor. Semiconductor device.

5. A transistor, a capacitor, and a first insulating layer, the transistor includes a first conductive layer, a second conductive layer, a third conductive layer, a semiconductor layer, and a second insulating layer; the first insulating layer overlies the first conductive layer; the second conductive layer is located on the first insulating layer; the second conductive layer and the first insulating layer have a first opening reaching the first conductive layer; In the first opening, the semiconductor layer contacts a side surface of the second conductive layer, a side surface of the first insulating layer, and an upper surface of the first conductive layer; the second insulating layer is in contact with an upper surface of the semiconductor layer and an upper surface of the second conductive layer; the third conductive layer is located on the second insulating layer so as to have an area overlapping with the semiconductor layer; the capacitor includes the first conductive layer, the second insulating layer, and a fourth conductive layer; the first insulating layer has a second opening reaching the first conductive layer; In the second opening, the second insulating layer is in contact with a side surface of the first insulating layer and an upper surface of the first conductive layer; the fourth conductive layer is located on the second insulating layer so as to have an area overlapping with the second opening; Semiconductor device.

6. In claim 5, the third conductive layer and the fourth conductive layer have the same material. Semiconductor device.

7. A display device comprising the semiconductor device according to claim 1 or 5, Display device.

8. In claim 7, The display element is a liquid crystal element. Display device.

9. In claim 7, The display element is a light-emitting element. Display device.

Images