Semiconductor device including magnetic tunnel junction structures and method of fabricating the same
The semiconductor device addresses the challenge of forming magnetic tunnel junction structures with varying sizes by using a sacrificial layer and spacer patterns, resulting in a simplified manufacturing process and tailored characteristics for different applications.
Patent Information
- Application Number
- JP2024202014
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-12
- Filing Date
- 2024-11-20
- Publication Date
- 2025-06-24
Smart Images
Figure 2025093875000001_ABST
Abstract
Description
Technical Field
[0001] This patent document relates to semiconductor technology, and more particularly, to a semiconductor device including a magnetic tunnel junction structure and a method for manufacturing the same.
Background Art
[0002] In recent years, due to the miniaturization, low power consumption, high performance, and diversification of electronic devices, semiconductor devices capable of storing information in various electronic devices such as computers and portable communication devices have been demanded, and research on this has been progressing. In such semiconductor devices, there are semiconductor devices that can store data by utilizing the characteristic of switching between mutually different resistance states by an applied voltage or current, for example, RRAM (registered trademark) (Resistive Random Access Memory), PRAM (Phase-change Random Access Memory), FRAM (registered trademark) (Ferroelectric Random Access Memory), MRAM (Magnetic Random Access Memory), electronic fuses (E-fuse), and the like.
Summary of the Invention
Problems to be Solved by the Invention
[0003] The problem to be solved by embodiments of the present invention is to provide a semiconductor device and a method for manufacturing the same that can easily form magnetic tunnel junction structures while including magnetic tunnel junction structures having mutually different sizes.
Means for Solving the Problems
[0004] A semiconductor device according to an embodiment of the present invention for solving the above problems includes a plurality of first magnetic tunnel junction structures arranged along a first direction and a second direction intersecting each other, having a first width in the first direction, and arranged along the first direction and the second direction while being alternately arranged with the first magnetic tunnel junction structures in a third direction intersecting the first and second directions, and having a second width in the first direction larger than the first width. A plurality of second magnetic tunnel junction structures, and a third magnetic tunnel junction structure having a major axis parallel to the first direction and a minor axis parallel to the second direction, and being alternately arranged with the first magnetic tunnel junction structures in the first direction while being alternately arranged with the second magnetic tunnel junction structures in the second direction, and having a major axis parallel to the second direction and a minor axis parallel to the first direction, and being alternately arranged with the second magnetic tunnel junction structures in the first direction while being alternately arranged with the first magnetic tunnel junction structures in the second direction.
[0005] Further, a method of manufacturing a semiconductor device according to an embodiment of the present invention for solving the above problems includes forming a magnetic tunnel junction layer on a substrate, forming a sacrificial layer on the magnetic tunnel junction layer, and forming a plurality of first spacer patterns extending in a second direction while having different intervals from each other in a first direction on the sacrificial layer, forming a material layer covering the first spacer patterns, and forming a plurality of second spacer patterns extending in the first direction while having different intervals from each other in the second direction on the material layer, and etching the material layer while maintaining the first spacer patterns to expose a portion of the sacrificial layer that does not overlap with the first and second spacer patterns of the sacrificial layer, etching the exposed portion of the sacrificial layer to form a space, forming a hard mask pattern for filling the space, removing the sacrificial layer, and etching the magnetic tunnel junction layer using the hard mask pattern as an etching barrier to form a plurality of magnetic tunnel junction structures having different widths.
Advantages of the Invention
[0006] According to the semiconductor device and its manufacturing method of the embodiment of the present invention, while including magnetic tunnel junction structures of different sizes, these magnetic tunnel junction structures can be easily formed.
Brief Description of the Drawings
[0007]
Figure 1A
Figure 1B
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Figure 7A
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Figure 8A
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Figure 9A
Figure 9B
Embodiments for Carrying Out the Invention
[0008] Hereinafter, various embodiments will be described in detail with reference to the accompanying drawings.
[0009] The drawings are not necessarily drawn to scale, and in some examples, at least a part of the proportions of the structures shown in the drawings may be exaggerated in order to clearly show the features of the embodiments and the like. When a multilayer structure having two or more layers is disclosed in the drawings or the detailed description, the relative positional relationship and arrangement order of the layers and the like as shown in the drawings only reflect a specific embodiment, and the present invention is not limited thereto, and the relative positional relationship and arrangement order of the layers and the like can also be changed. Also, the drawings or detailed description of the multilayer structure may not reflect all the layers present in the specific multilayer structure (for example, one or more additional layers may exist between the two layers shown). For example, when the first layer is on the second layer or on the substrate in the multilayer structure of the drawings or the detailed description, it not only represents that the first layer can be directly formed on the second layer or directly formed on the substrate, but also represents the case where one or more other layers exist between the first layer and the second layer or between the first layer and the substrate.
[0010] FIGS. 1A and 1B are diagrams for explaining a semiconductor device according to an embodiment of the present invention, FIG. 1A shows a perspective view, and FIG. 1B shows a plan view of FIG. 1A seen from above.
[0011] As shown in FIGS. 1A and 1B, the semiconductor device of the present embodiment can include a substrate 100, a first magnetic tunnel junction structure 110, a second magnetic tunnel junction structure 120, and a third magnetic tunnel junction structure 130 disposed on the substrate 100.
[0012] The substrate 100 can include a semiconductor material such as silicon. Further, a required predetermined lower structure (not shown) can be formed in the substrate 100. For example, a conductive line electrically connected to the first magnetic tunnel junction structure 110 and / or the second magnetic tunnel junction structure 120, or an integrated circuit for driving this conductive line can be formed in the substrate 100.
[0013] The first magnetic tunnel junction structure 110 can have a columnar shape. In the present embodiment, the first magnetic tunnel junction structure 110 can have a circular or similar shape on a plane. A plurality of first magnetic tunnel junction structures 110 can be arranged in a matrix form along a first direction and a second direction substantially parallel to the surface of the substrate 100. Here, the first direction and the second direction may be substantially perpendicular to each other. Further, a direction substantially perpendicular to the surface of the substrate 100 is referred to as a vertical direction. The width in the first direction or the second direction of the first magnetic tunnel junction structure 110, for example, the diameter, is hereinafter referred to as the first width W1.
[0014] The second magnetic tunnel junction structure 120 can have a columnar shape. In the present embodiment, the second magnetic tunnel junction structure 120 can have a circular or similar shape on a plane. A plurality of second magnetic tunnel junction structures 120 can be arranged in a matrix form along the first direction and the second direction while being spaced apart from the first magnetic tunnel junction structure 110. Further, the second magnetic tunnel junction structures 120 can be alternately arranged with the first magnetic tunnel junction structure 110 in a direction intersecting the first direction and the second direction, for example, a third direction forming a diagonal line with respect to the first direction and the second direction. The width in the first direction or the second direction of the second magnetic tunnel junction structure 120, for example, the diameter, will be hereinafter referred to as the second width W2. The second width W2 can be larger than the first width W1.
[0015] The third magnetic tunnel junction structure 130 can have a columnar shape. In the present embodiment, the third magnetic tunnel junction structure 130 can have an elliptical or similar shape on a plane. The third magnetic tunnel junction structure 130 can have a major axis corresponding to a relatively large width and a minor axis corresponding to a relatively small width. A plurality of third magnetic tunnel junction structures 130 in a state where the major axis is parallel to the first direction and the minor axis is parallel to the second direction are arranged in a matrix form along the first and second directions while being separated from the first and second magnetic tunnel junction structures 110 and 120, and can be alternately arranged with the second magnetic tunnel junction structure 120 in the second direction while being alternately arranged with the first magnetic tunnel junction structure 110 in the first direction. A plurality of third magnetic tunnel junction structures 130 in a state where the major axis is parallel to the second direction and the minor axis is parallel to the first direction are arranged in a matrix form along the first and second directions while being separated from the first and second magnetic tunnel junction structures 110 and 120, and can be alternately arranged with the first magnetic tunnel junction structure 110 in the second direction while being alternately arranged with the second magnetic tunnel junction structure 120 in the first direction. Let the width of the minor axis of the third magnetic tunnel junction structure 120 be called the third width W3, and the width of the major axis be called the fourth width W4. The third width W3 can have a value substantially the same as the first width W1, and the fourth width W4 can have a value substantially the same as the second width W2. Here, the meaning of substantially the same includes not only complete identity but also being slightly different within a predetermined limit. For example, the third width W3 can have a value that is 0.8 times to 1.2 times the first width W1, and the fourth width W4 can have a value that is 0.8 times to 1.2 times the second width W2.
[0016] Such a first magnetic tunnel junction structure 110, a second magnetic tunnel junction structure 120, and a third magnetic tunnel junction structure 130 can have the same layer structure and substantially the same thickness, differing only in width on a plane. This is because, as will be described in the manufacturing method below, after depositing the material layers for forming the first to third magnetic tunnel junction structures 110, 120, 130, the first to third magnetic tunnel junction structures 110, 120, 130 are formed by etching this material layer in a single patterning process. The layer structure of the first to third magnetic tunnel junction structures 110, 120, 130 will be exemplarily described with reference to FIG. 2.
[0017] FIG. 2 is a cross-sectional view for explaining an example of a magnetic tunnel junction structure.
[0018] As shown in FIG. 2, the magnetic tunnel junction structure 200 can include a stacked structure of a first magnetic pattern 210, a tunnel barrier pattern 220, and a second magnetic pattern 230.
[0019] Of the first magnetic pattern 210 and the second magnetic pattern 230, either one corresponds to a fixed layer having a fixed magnetization direction, and the other one of the first magnetic pattern 210 and the second magnetic pattern 230 can correspond to a free layer having a changeable magnetization direction. The fixed layer is a layer that can be compared with the magnetization direction of the free layer and can also be called a reference layer. The free layer is a layer that can store different data depending on the magnetization direction and can also be called a storage layer. The first magnetic pattern 210 and the second magnetic pattern 230 can each have a magnetization direction substantially parallel to the surface of the layer, for example, the upper surface of the layer, or a magnetization direction substantially perpendicular to the surface of the layer. The tunnel barrier pattern 220 can enable tunneling of electrons between the first magnetic pattern 210 and the second magnetic pattern 230 by a voltage or current applied to the magnetic tunnel junction structure 200 while physically separating the first magnetic pattern 210 and the second magnetic pattern 230. The first magnetic pattern 210 and the second magnetic pattern 230 can each independently have a single film structure or a multilayer structure containing a ferromagnetic material. As an example, the first magnetic pattern 210 and the second magnetic pattern 230 can each independently contain at least one of alloys mainly composed of Fe, Ni, or Co, such as Fe-Pt alloy, Fe-Pd alloy, Co-Pd alloy, Co-Pt alloy, Fe-Ni-Pt alloy, Co-Fe-Pt alloy, Co-Ni-Pt alloy, and Co-Fe-B alloy, or can contain at least one of the Co / Pt multilayer structure and the Co / Pd multilayer structure. The tunnel barrier pattern 220 can have a single film structure or a multilayer structure containing an insulating material. As an example, the tunnel barrier pattern 220 can contain insulating oxides such as MgO, CaO, SrO, TiO, VO, and NbO.
[0020] Such a magnetic tunnel junction structure 200 can store different data by switching between different resistance states by means of a voltage or current applied through its upper and lower ends. That is, the magnetic tunnel junction structure 200 can function as a memory cell. More specifically, when the magnetization direction of the one corresponding to the free layer among the first and second magnetic patterns 210 and 230 is varied by a voltage or current applied to the magnetic tunnel junction structure 200 and becomes parallel to the magnetization direction of the one corresponding to the fixed layer, the magnetic tunnel junction structure 200 can have a low resistance state and can store, for example, the data "1". On the other hand, when the magnetization direction of the one corresponding to the free layer among the first and second magnetic patterns 210 and 230 is varied by a voltage or current applied to the magnetic tunnel junction structure 200 and becomes anti-parallel to the magnetization direction of the one corresponding to the fixed layer, the magnetic tunnel junction structure 200 can have a high resistance state and can store, for example, the data "0".
[0021] As long as the magnetic tunnel junction structure 200 includes two magnetic patterns 210 and 230 and a tunnel barrier pattern 220 interposed therebetween, the layer structure of the magnetic tunnel junction structure 200 can be variously deformed. As an example, the magnetic tunnel junction structure 200 can further include one or more layers for improving characteristics. For example, the magnetic tunnel junction structure 200 can further include one or more fixed layers that are antiferromagnetically coupled to the one corresponding to the fixed layer among the first and second magnetic patterns 210 and 230 and form a SAF structure (Synthetic Anti-Ferromagnetic structure). Or, for example, the magnetic tunnel junction structure 200 can further include one or more conductive patterns disposed under the first magnetic pattern 210 and / or above the second magnetic pattern 230. This conductive pattern can be called an electrode layer, a hard mask layer, a capping layer, a seed layer, etc. depending on the function.
[0022] Such a magnetic tunnel junction structure 200 may increase the amount of current required to reverse the magnetization direction of the free layer as it has a large width and / or size on a plane. An increase in the amount of current required to reverse the magnetization direction of the free layer means that the data retention characteristics are improved, but the operating speed is slow and the power consumption is large. On the contrary, a decrease in the amount of current required to reverse the magnetization direction of the free layer means that even if the data retention characteristics are degraded, the operating speed is fast and the power consumption is small. Therefore, when the width of the magnetic tunnel junction structure 200 is relatively large, it can be used in a semiconductor device such as a flash memory that requires excellent data retention characteristics. On the contrary, when the width of the magnetic tunnel junction structure 200 is relatively small, it can be used in a semiconductor device such as a cache memory that requires low-power high-speed operation.
[0023] Returning again to FIGS. 1A and 1B, although the illustration of the layer structure in the first to third magnetic tunnel junction structures 110, 120, 130 is omitted, each of the first to third magnetic tunnel junction structures 110, 120, 130 can have the same layer structure as the magnetic tunnel junction structure 200 of FIG. 2.
[0024] Here, the first magnetic tunnel junction structure 110 and the second magnetic tunnel junction structure 120 can each function as a memory cell for storing data. Since the first magnetic tunnel junction structure 110 and the second magnetic tunnel junction structure 120 have different widths from each other on a plane, it may be possible to realize a semiconductor device that simultaneously includes magnetic tunnel junction structures 110 and 120 having different characteristics.
[0025] On the other hand, the third magnetic tunnel junction structure 130 can correspond to a kind of dummy formed as a result of the manufacturing process described later. The third magnetic tunnel junction structure 130 is connected to the conductive lines and, unlike the first and second magnetic tunnel junction structures 110 and 120 controlled thereby, can be surrounded by an insulating material and the electrical connection with other components can be blocked. Even in such a case, the third magnetic tunnel junction structure 130 has an elliptical or similar shape on the plane, so that an in-plane stray field can be generated in the major axis direction of the third magnetic tunnel junction structure 130. Such an in-plane stray field can improve the magnetization reversal speed, that is, the switching speed, of the magnetic tunnel junction structure having a perpendicular magnetization direction. Therefore, when the first magnetic tunnel junction structure 110 adjacent to the third magnetic tunnel junction structure 130 in the major axis direction of the third magnetic tunnel junction structure 130 includes a magnetic pattern having a perpendicular magnetization direction, the third magnetic tunnel junction structure 130 can further promote the improvement of the operating speed of the first magnetic tunnel junction structure 110. In contrast, the third magnetic tunnel junction structure 130 may not substantially affect the second magnetic tunnel junction structure 120 adjacent to the third magnetic tunnel junction structure 130 in the minor axis direction.
[0026] An example of the method for manufacturing the semiconductor device described above will be described below with reference to FIGS. 3A to 7B.
[0027] FIGS. 3A to 7B are diagrams for explaining a method for manufacturing a semiconductor device according to an embodiment of the present invention, wherein FIGS. 3A, 4A, 5A, 6A, and 7A show perspective views, and FIGS. 3B, 4B, 5B, 6B, and 7B show plan views seen from above of FIGS. 3A, 4A, 5A, 6A, and 7A, respectively.
[0028] As shown in FIGS. 3A and 3B, a magnetic tunnel junction layer 300 for forming a magnetic tunnel junction structure can be formed on a substrate (not shown) by a method such as vapor deposition. The magnetic tunnel junction layer 300 can have a multilayer structure in which a tunnel barrier layer is interposed between at least two magnetic layers.
[0029] Next, a sacrificial layer 310 can be formed on the magnetic tunnel junction layer 300. The sacrificial layer 310 can be formed of various substances that are easily removable in a subsequent process. For example, the sacrificial layer 310 can include silicon oxide, amorphous carbon, and the like.
[0030] Next, a plurality of first spacer patterns 320 extending in a second direction while being spaced apart from each other in a first direction can be formed on the sacrificial layer 310. The first spacer pattern 320 can include a linear side surface S1 in the first direction and a curved side surface S2 at least at the top. When two first spacer patterns 320 whose side surfaces S1 face each other are defined as a pair of first spacer patterns 320, a plurality of pairs of first spacer patterns 320 can be arranged in the first direction. Two first spacer patterns 320 that belong to different pairs and are adjacent to each other can be arranged such that their side surfaces S2 face each other. Here, when the interval between two first spacer patterns 320 that belong to a pair and are adjacent to each other is defined as a first interval D1, and the interval between two first spacer patterns 320 that belong to different pairs and are adjacent to each other is defined as a second interval D2, the first interval D1 can be larger than the second interval D2. The second interval D2 and the first interval D1 can be repeatedly arranged in the first direction.
[0031] Such a first spacer pattern 320 can be formed in the following process. First, a plurality of line patterns (not shown) extending in the second direction while being spaced apart from each other in the first direction can be formed on the sacrificial layer 310. This line pattern can belong to a pair and have a line width substantially the same as the first interval D1 by overlapping the region corresponding to the region between two adjacent first spacer patterns 320. Next, after conformally depositing a material for forming the first spacer pattern 320 on the entire surface of the resultant product on which the line pattern is formed, blanket etching is performed so that the upper surface of the line pattern and the upper surface of the sacrificial layer 310 are exposed, whereby the first spacer pattern 320 can be formed on both sidewalls of the line pattern. Then, if the line pattern is removed, a process result as shown in FIGS. 3A and 3B can be obtained. The first spacer pattern 320 can include a material having an etching rate different from that of the sacrificial layer 310, for example, silicon nitride.
[0032] As shown in FIGS. 4A and 4B, by covering the first spacer pattern 320, a material layer 330 for filling the space between the first spacer patterns 320 can be formed. The material layer 330 can include a material having an etching rate different from that of the first spacer pattern 320 and the sacrificial layer 310. For example, when the sacrificial layer 310 includes silicon oxide, the material layer 330 can include amorphous carbon. Or, for example, when the sacrificial layer 310 includes amorphous carbon, the material layer 330 can include silicon oxide.
[0033] Next, a plurality of second spacer patterns 340 extending in the first direction while being spaced apart from each other in the second direction can be formed on the material layer 330. The second spacer pattern 340 can include a linear side surface S3 in the second direction and another side surface S4 at least in the upper part of which is curved. When two second spacer patterns 340 arranged such that the side surfaces S3 face each other are defined as a pair of second spacer patterns 340, a plurality of pairs of second spacer patterns 340 can be arranged in the second direction. Two second spacer patterns 340 belonging to different pairs and adjacent to each other can be arranged such that the other side surfaces S4 face each other. Here, when the interval between two second spacer patterns 340 belonging to a pair and adjacent to each other is defined as a third interval D3, and the interval between two second spacer patterns 340 belonging to different pairs and adjacent to each other is defined as a fourth interval D4, the third interval D3 can be larger than the fourth interval D4. Further, the third interval D3 can be substantially the same as the first interval D1 described above, and the fourth interval D4 can be substantially the same as the second interval D2 described above. The third interval D3 and the fourth interval D4 can be repeatedly arranged in the second direction. The line width of the second spacer pattern 340 can be substantially the same as the line width of the first spacer pattern 320. The second spacer pattern 340 can include a material having an etching rate different from that of the sacrificial layer 310 and the material layer 330. As an example, the second spacer pattern 340 can include the same material as the first spacer pattern 320, for example, silicon nitride. Since the forming process of the second spacer pattern 340 can be substantially the same as the forming process of the first spacer pattern 320 except for the direction of the line pattern, a detailed description thereof is omitted.
[0034] As a result of this process, on a plane, a large square region, a small square region, and a rectangular region can be defined by the first spacer pattern 320 and the second spacer pattern 340. More specifically, a large square region can be defined by a pair of first spacer patterns 320 and a pair of second spacer patterns 340 that cross these. A small square region can be defined by two adjacent first spacer patterns 320 belonging to different pairs and two adjacent second spacer patterns 340 that cross these and belong to different pairs. A rectangular region with a width in a first direction larger than a width in a second direction can be defined by a pair of first spacer patterns 320 and two adjacent second spacer patterns 340 that cross these and belong to different pairs. A rectangular region with a width in a first direction smaller than a width in a second direction can be defined by two adjacent first spacer patterns 320 belonging to different pairs and a pair of second spacer patterns 340 that cross these.
[0035] As shown in FIGS. 5A and 5B, after etching the material layer 330 using the second spacer pattern 340 as an etching barrier, the sacrificial layer 310 exposed by the etching of the material layer 330 can be etched to form a sacrificial layer pattern 310A.
[0036] Here, when etching the material layer 330, since the first spacer pattern 320 and the second spacer pattern 340 are maintained, as a result of the etching of the material layer 330, the remaining portion of the sacrificial layer 310 excluding the portions overlapping with the first spacer pattern 320 and the second spacer pattern 340 can be exposed. That is, as a result of the etching of the material layer 330, the portions of the sacrificial layer 310 corresponding to the large square region, the small square region, and the rectangular region described above can be exposed. Therefore, the sacrificial layer pattern 310A can have a mesh shape including a space SP formed by etching the portions corresponding to the large square region, the small square region, and the rectangular region described above.
[0037] During the formation process of the sacrificial layer pattern 310A, or through another removal process, the second spacer pattern 340, the etched material layer 330, and the first spacer pattern 320 can be removed.
[0038] As shown in FIGS. 6A and 6B, a hard mask pattern 350 can be formed to fill the space SP defined by the sacrificial layer pattern 310A.
[0039] The hard mask pattern 350 can include a material having an etching rate different from that of the sacrificial layer pattern 310A. For example, the hard mask pattern 350 can include a conductive material such as a metal, a metal compound, an alloy, etc., or an insulating material such as silicon nitride. The hard mask pattern 350 can be formed by depositing a material for forming the hard mask pattern 350 with a thickness sufficient to fully fill the space SP on the sacrificial layer pattern 310A and then performing a planarization process or an etch-back so that the upper surface of the sacrificial layer pattern 310A is exposed.
[0040] As shown in FIGS. 7A and 7B, the sacrificial layer pattern 310A can be removed. Thereby, the hard mask pattern 350 may exist on the magnetic tunnel junction layer 300. The hard mask pattern 350 can have a large square shape, a small square shape, and a rectangular shape.
[0041] If the magnetic tunnel junction layer 300 is etched using such a hard mask pattern 350, magnetic tunnel junction structures having substantially the same shape and arrangement as the first to third magnetic tunnel junction structures 110, 120, and 130 described in FIGS. 1A and 1B can be obtained. Among the magnetic tunnel junction layer 300, a portion etched using the small square hard mask pattern 350 can form a magnetic tunnel junction structure identical or similar to the first magnetic tunnel junction structure 110. Among the magnetic tunnel junction layer 300, a portion etched using the large square hard mask pattern 350 can form a magnetic tunnel junction structure identical or similar to the second magnetic tunnel junction structure 120. Among the magnetic tunnel junction layer 350, a portion etched using the rectangular hard mask pattern 350 can form a magnetic tunnel junction structure identical or similar to the third magnetic tunnel junction structure 130. Even if the hard mask pattern 350 has a square or rectangular shape, such square or rectangular corner portions are rounded during the process of etching the magnetic tunnel junction layer 300, and magnetic tunnel junction structures having a circular, elliptical, or similar shape can be obtained.
[0042] According to the method of manufacturing a semiconductor device described above, by means of a single magnetic tunnel junction layer 300 forming step and a single magnetic tunnel junction layer 300 patterning step, that is, a magnetic tunnel junction layer 300 etching step using the hard mask pattern 350, it is possible to form magnetic tunnel junction structures having different widths from each other, so that the process can be simplified and the effect of reducing the process cost can occur.
[0043] Furthermore, the line widths of the line patterns for forming the first spacer pattern 320 and / or the second spacer pattern 340 can be adjusted to easily adjust the first interval D1 and / or the third interval D3, and the line widths of the first spacer pattern 320 and / or the second spacer pattern 340 can be adjusted to easily adjust the second interval D2 and / or the fourth interval D4. This can mean that it is easy to adjust the width and / or size of the hard mask pattern 350 on the plane. As a result, magnetic tunnel junction structures having various desired widths can be obtained by an easy process.
[0044] On the other hand, in the semiconductor devices of FIGS. 1A and 1B, since the first magnetic tunnel junction structure 110 performs a switching operation in which its resistance changes depending on the voltage or current applied through its upper and lower ends, in order to transmit voltage or current to the first magnetic tunnel junction structure 110, it may be necessary to form conductive lines respectively connected to the upper and lower ends of the first magnetic tunnel junction structure 110. Similarly, since the second magnetic tunnel junction structure 120 performs a switching operation in which its resistance changes depending on the voltage or current applied through its upper and lower ends, in order to transmit voltage or current to the second magnetic tunnel junction structure 120, it may be necessary to form conductive lines respectively connected to the upper and lower ends of the second magnetic tunnel junction structure 120. The third magnetic tunnel junction structure 130 is dummy and may not need to be connected to a conductive line. A semiconductor device including the first and second magnetic tunnel junction structures 110 and 120 and conductive lines connected thereto will be exemplarily described with reference to FIGS. 8A and 8B.
[0045] FIGS. 8A and 8B are diagrams for explaining a semiconductor device according to another embodiment of the present invention. FIG. 8A shows a perspective view, and FIG. 8B shows a plan view as seen from above FIG. 8A. For convenience of explanation, in FIG. 8B, the conductive lines are represented by lines. For parts substantially the same as those of the semiconductor device of FIGS. 1A and 1B described above, the same reference numerals are used, and detailed description thereof is omitted.
[0046] As shown in FIGS. 8A and 8B, the semiconductor device of the present embodiment can include a first lower conductive line 410 and a second lower conductive line 420 disposed under the first to third magnetic tunnel junction structures 110, 120, 130, and a first upper conductive line 510 and a second upper conductive line 520 disposed above the first to third magnetic tunnel junction structures 110, 120, 130.
[0047] The first lower conductive line 410 can overlap with the first magnetic tunnel junction structure 110 arranged in the first direction and extend in the first direction while being electrically connected to them. The first lower conductive line 410 can be connected to the first magnetic tunnel junction structure 110 via a first lower contact 415 interposed between the first lower conductive line 410 and the first magnetic tunnel junction structure 110. The first lower contact 415 can have a columnar shape, and a plurality of first lower contacts 415 can overlap and be connected to each of the plurality of first magnetic tunnel junction structures 110.
[0048] The first upper conductive line 510 can overlap with the first magnetic tunnel junction structure 110 arranged in the second direction and extend in the second direction while being electrically connected to them. The first upper conductive line 510 can be connected to the first magnetic tunnel junction structure 110 via a first upper contact 515 interposed between the first upper conductive line 510 and the first magnetic tunnel junction structure 110. The first upper contact 515 can have a columnar shape, and a plurality of first upper contacts 515 can overlap and be connected to each of the plurality of first magnetic tunnel junction structures 110.
[0049] The first magnetic tunnel junction structure 110 can overlap with these crossing regions between the first lower conductive line 410 and the first upper conductive line 510, and can be driven by a voltage or current transmitted through the first lower conductive line 410 and the first upper conductive line 510. By driving any one of the plurality of first lower conductive lines 410 and any one of the plurality of first upper conductive lines 510, the first magnetic tunnel junction structure 110 connected thereto can be selected and driven.
[0050] The second lower conductive line 420 can overlap with the second magnetic tunnel junction structures 120 arranged in the first direction and extend in the first direction while being electrically connected to them. The second lower conductive line 420 can be connected to the second magnetic tunnel junction structures 120 via second lower contacts 425 interposed between the second lower conductive line 420 and the second magnetic tunnel junction structures 120. The second lower contacts 425 can have a columnar shape, and the plurality of second lower contacts 425 can overlap and be connected to each of the plurality of second magnetic tunnel junction structures 120. In the second direction, the second lower conductive line 420 can be alternately arranged with the first lower conductive line 410 while being spaced apart from the first lower conductive line 410.
[0051] The second upper conductive line 420 can overlap with the second magnetic tunnel junction structures 120 arranged in the second direction and extend in the second direction while being electrically connected to them. The second upper conductive line 520 can be connected to the second magnetic tunnel junction structures 120 via second upper contacts 525 interposed between the second upper conductive line 520 and the second magnetic tunnel junction structures 120. The second upper contacts 525 can have a columnar shape, and the plurality of second upper contacts 525 can overlap and be connected to each of the plurality of second magnetic tunnel junction structures 120. In the first direction, the second upper conductive line 520 can be alternately arranged with the first upper conductive line 510 while being spaced apart from the first upper conductive line 510.
[0052] The second magnetic tunnel junction structure 120 can overlap with these crossing regions between the second lower conductive line 420 and the second upper conductive line 520, and can be driven by a voltage or current transmitted through the second lower conductive line 420 and the second upper conductive line 520. By driving any one of the plurality of second lower conductive lines 420 and any one of the plurality of second upper conductive lines 520, the second magnetic tunnel junction structure 120 connected thereto can be selected and driven.
[0053] In the present embodiment, in the vertical direction, the first lower conductive line 410 and the second lower conductive line 420 can be located at the same level, and the first upper conductive line 510 and the second upper conductive line 520 can be located at the same level. However, the present disclosure is not limited thereto, and the first lower conductive line 410 and the second lower conductive line 420 can be located at different levels in the vertical direction on the premise that they are located under the first to third magnetic tunnel junction structures 110, 120, 130. In such a case, an electrical short circuit between the first lower conductive line 410 and the second lower conductive line 420 can be prevented and / or reduced. Also, the first upper conductive line 510 and the second upper conductive line 520 can be located at different levels in the vertical direction on the premise that they are located on the first to third magnetic tunnel junction structures 110, 120, 130. In such a case, an electrical short circuit between the first upper conductive line 510 and the second upper conductive line 520 can be prevented and / or reduced.
[0054] Also, in the present embodiment, the first and second lower conductive lines 410, 420 can extend in the first direction, and the first and second upper conductive lines 510, 520 can extend in the second direction. However, the present disclosure is not limited thereto, and the first and second lower conductive lines 410, 420 can also extend in the second direction, and the first and second upper conductive lines 510, 520 can extend in the first direction.
[0055] The space between the first lower conductive line 410 and the second lower conductive line 420, the space between the first lower contact 415 and the second lower contact 425, the space between the first to third magnetic tunnel junction structures 110, 120, 130, the space between the first upper conductive line 510 and the second upper conductive line 520, the space between the first upper contact 515 and the second upper contact 525, etc. can be filled with an insulating material. Thereby, the third magnetic tunnel junction structure 130 can be surrounded by such an insulating material and can be in a floating state not electrically connected to other components.
[0056] The first and second lower conductive lines 410, 420, the first and second lower contacts 415, 425, the first and second upper conductive lines 510, 520, and the first and second upper contacts 515, 525 can each independently include various conductive materials, for example, metals such as platinum (Pt), tungsten (W), aluminum (Al), copper (Cu), tantalum (Ta), metal nitrides such as titanium nitride (TiN), tantalum nitride (TaN), or combinations thereof, and can have a single-layer structure or a multi-layer structure.
[0057] On the other hand, in the above-described embodiment, each of the first magnetic tunnel junction structure 110 and the second magnetic tunnel junction structure 120 can function as one memory cell. However, the first magnetic tunnel junction structure 110 and the second magnetic tunnel junction structure 120 can be connected in series to form one memory cell, and in such a case, the memory cell can function as a multi-bit memory cell capable of storing at least 2 bits of data. This will be exemplarily described with reference to FIGS. 9A and 9B.
[0058] FIGS. 9A and 9B are diagrams for explaining a semiconductor device according to another embodiment of the present invention.
[0059] As shown in FIGS. 9A and 9B, the semiconductor device of the present embodiment can include first to third magnetic tunnel junction structures 110, 120, 130, a first conductive line 610 and a second conductive line 620 disposed under the first to third magnetic tunnel junction structures 110, 120, 130, and a connection pattern 630 disposed on the first to third magnetic tunnel junction structures 110, 120, 130.
[0060] The first conductive line 610 can overlap with the first magnetic tunnel junction structures 110 arranged in the first direction and extend in the first direction while being electrically connected to them. The first conductive line 610 can be connected to the first magnetic tunnel junction structures 110 via first contacts 615 interposed between the first conductive line 610 and the first magnetic tunnel junction structures 110. The first contacts 615 can have a columnar shape, and a plurality of first contacts 615 can overlap and be connected to each of the plurality of first magnetic tunnel junction structures 110.
[0061] The second conductive line 620 can overlap with the second magnetic tunnel junction structures 120 arranged in the second direction and extend in the second direction while being electrically connected to them. The second conductive line 620 can be connected to the second magnetic tunnel junction structures 120 via second contacts 625 interposed between the second conductive line 620 and the second magnetic tunnel junction structures 120. The second contacts 625 can have a columnar shape, and a plurality of second contacts 625 can overlap and be connected to each of the plurality of second magnetic tunnel junction structures 120.
[0062] Since the first conductive line 610 and the second conductive line 620 extend in directions intersecting each other, they can be located at different levels in the vertical direction. This is because if the first conductive line 610 and the second conductive line 620 are located at the same level in the vertical direction, an electrical short circuit will occur. In this embodiment, the first conductive line 610 can be located below the second conductive line 620. For this reason, the thickness of the first contact 615 can be greater than the thickness of the second contact 625. However, the present disclosure is not limited thereto, and the first conductive line 610 can also be located above the second conductive line 620.
[0063] The connection pattern 630 can connect one first magnetic tunnel junction structure 110 and one second magnetic tunnel junction structure 120 adjacent to each other in a third direction. The first magnetic tunnel junction structure 110 and the second magnetic tunnel junction structure 120 connected by one connection pattern 630 will be referred to as a pair of the first and second magnetic tunnel junction structures 110, 120. A plurality of pairs of the first and second magnetic tunnel junction structures 110, 120 can be repeatedly arranged in the third direction. In this embodiment, the connection pattern 630 can be in direct contact with the upper surfaces of the first and second magnetic tunnel junction structures 110, 120. However, the present disclosure is not limited thereto, and the connection pattern 630 can also be connected to the first and second magnetic tunnel junction structures 110, 120 via contacts interposed between the connection pattern 630 and the first and second magnetic tunnel junction structures 110, 120.
[0064] The pair of the first and second magnetic tunnel junction structures 110, 120 can be driven by a voltage or current transmitted through the first conductive line 610 and the second conductive line 620. By driving any one of the plurality of first conductive lines 610 and any one of the plurality of second conductive lines 620, the pair of the first and second magnetic tunnel junction structures 110, 120 connected thereto can be selected and driven. For example, when selecting the pair of the first and second magnetic tunnel junction structures 110, 120, a current flow can be formed through one first conductive line 610, the first contact 615 connected thereto, the first magnetic tunnel junction structure 110 connected thereto, the connection pattern 630 connected thereto, the second magnetic tunnel junction structure 120 connected thereto, the second contact 625 connected thereto, and the second conductive line 620 connected thereto. The first magnetic tunnel junction structure 110 and the second magnetic tunnel junction structure 120 can be connected in series via the connection pattern 630.
[0065] The pair of the first and second magnetic tunnel junction structures 110, 120 can form one memory cell. Here, the pair of the first and second magnetic tunnel junction structures 110, 120 can store 2-bit data by a voltage or current transmitted to the pair of the first and second magnetic tunnel junction structures 110, 120 through the first and second conductive lines 610, 20. For example, when each of the first and second magnetic tunnel junction structures 110, 120 has a high resistance state, the data "00" can be stored. Or, when the first magnetic tunnel junction structure 110 has a high resistance state and the second magnetic tunnel junction structure 120 has a low resistance state, the data "01" can be stored. Or, when the first magnetic tunnel junction structure 110 has a low resistance state and the second magnetic tunnel junction structure 120 has a high resistance state, the data "10" can be stored. Or, when each of the first and second magnetic tunnel junction structures 110, 120 has a low resistance state, the data "11" can be stored. It is possible to realize a multi-bit memory cell in such a manner.
[0066] The first and second conductive lines 610 and 620, the first and second contacts 615 and 625, and the connection pattern 630 can each independently include various conductive materials, such as metals like platinum (Pt), tungsten (W), aluminum (Al), copper (Cu), tantalum (Ta), etc., metal nitrides like titanium nitride (TiN), tantalum nitride (TaN), or combinations thereof, and can have a single-layer structure or a multi-layer structure.
[0067] On the other hand, in this embodiment, the case where the first and second conductive lines 610 and 620 are disposed under the first to third magnetic tunnel junction structures 110, 120, and 130 and the connection pattern 630 is disposed above the first to third magnetic tunnel junction structures 110, 120, and 130 has been described. However, the present disclosure is not limited thereto. In other embodiments, the first and second conductive lines 610 and 620 can be disposed above the first to third magnetic tunnel junction structures 110, 120, and 130, and the connection pattern 630 can be disposed under the first to third magnetic tunnel junction structures 110, 120, and 130. That is, in the vertical direction, the first and second conductive lines 610 and 620 and the connection pattern 630 can be located on opposite sides of each other with the first to third magnetic tunnel junction structures 110, 120, and 130 interposed therebetween.
[0068] Also, in this embodiment, the case where the first conductive line 610 extends in the first direction and the second conductive line 620 extends in the second direction has been described. However, the present disclosure is not limited thereto. In other embodiments, the first conductive line 610 can extend in the second direction, and the second conductive line 620 can extend in the first direction.
[0069] The technical idea of the present invention is specifically recorded by the above-described desirable embodiments and the like. However, it should be noted that the above-described embodiments are for the purpose of explanation and not for limitation. Also, those of ordinary skill in the technical field of the present invention will be able to understand that various embodiments are possible within the scope of the technical idea of the present invention.
Claims
1. a plurality of first magnetic tunnel junction structures arranged along first and second directions intersecting each other, the first magnetic tunnel junction structures having a first width in the first direction; a plurality of second magnetic tunnel junction structures arranged along the first direction and the second direction, alternating with the first magnetic tunnel junction structures in a third direction intersecting the first and second directions, the second magnetic tunnel junction structures having a second width in the first direction greater than the first width; a third magnetic tunnel junction structure having a major axis parallel to the first direction and a minor axis parallel to the second direction, alternating with the first magnetic tunnel junction structure in the first direction and alternating with the second magnetic tunnel junction structure in the second direction, and having a major axis parallel to the second direction and alternating with the second magnetic tunnel junction structure in the first direction and alternating with the first magnetic tunnel junction structure in the second direction, and having a major axis parallel to the second direction and alternating with the second magnetic tunnel junction structure in the first direction and alternating with the first magnetic tunnel junction structure in the second direction, A semiconductor device comprising:
2. The semiconductor device according to claim 1 , wherein the first, second and third magnetic tunnel junction structures have the same layer structure and the same thickness.
3. a width of the short axis of the third magnetic tunnel junction structure is equal to the first width; The semiconductor device of claim 1 , wherein the width of the major axis of the third magnetic tunnel junction structure is the same as the second width.
4. the first magnetic tunnel junction structure and the second magnetic tunnel junction structure have a circular planar shape; The semiconductor device according to claim 1 , wherein the third magnetic tunnel junction structure has an elliptical planar shape.
5. the first magnetic tunnel junction structure comprises a magnetic pattern having a perpendicular magnetization direction; the perpendicular magnetization direction is reversed by a voltage or current supplied across both ends of the first magnetic tunnel junction structure; the third magnetic tunnel junction structure has a floating state; 2. The semiconductor device of claim 1, wherein an in-plane stray magnetic field generated in the direction of the long axis of the third magnetic tunnel junction structure increases a reversal speed of the perpendicular magnetization direction.
6. Each of the first and second magnetic tunnel junction structures has a resistance state that is variable depending on a voltage or a current supplied through both ends thereof; The semiconductor device according to claim 1 , wherein the third magnetic tunnel junction structure is in a floating state.
7. a first lower conductive line electrically connecting the first magnetic tunnel junction structures arranged in one of the first direction and the second direction under the first magnetic tunnel junction structures; a first upper conductive line electrically connecting the first magnetic tunnel junction structures arranged in the other one of the first direction and the second direction on the first magnetic tunnel junction structures; a second lower conductive line electrically connecting the second magnetic tunnel junction structures arranged in one of the first direction and the second direction under the second magnetic tunnel junction structures; a second upper conductive line electrically connecting the second magnetic tunnel junction structures arranged in the other one of the first direction and the second direction on the second magnetic tunnel junction structures; The semiconductor device according to claim 1 .
8. the first and second magnetic tunnel junction structures are connected in series to form a pair of first and second magnetic tunnel junction structures; A resistance state of the pair of the first and second magnetic tunnel junction structures is changed by a voltage or a current supplied across both ends of the pair of the first and second magnetic tunnel junction structures; The semiconductor device according to claim 1 , wherein the third magnetic tunnel junction structure is in a floating state.
9. 2. The semiconductor device of claim 1, further comprising a connection pattern disposed above or below the first and second magnetic tunnel junction structures and connecting the first and second magnetic tunnel junction structures adjacent to each other in the third direction.
10. a first conductive line positioned on an opposite side of the connection pattern across the first and second magnetic tunnel junction structures in a vertical direction, electrically connecting the first magnetic tunnel junction structures arranged in one of the first direction and the second direction; a second conductive line located on an opposite side of the connection pattern across the first and second magnetic tunnel junction structures in the vertical direction, electrically connecting the second magnetic tunnel junction structures arranged in the other one of the first direction and the second direction; The semiconductor device according to claim 9 , further comprising:
11. 11. The semiconductor device according to claim 10, wherein the first conductive line and the second conductive line are located at different levels in the vertical direction.
12. 2. The semiconductor device according to claim 1, wherein an amount of current required to reverse the magnetization direction of the first magnetic tunnel junction structure is smaller than an amount of current required to reverse the magnetization direction of the second magnetic tunnel junction structure.
13. the first and second magnetic tunnel junction structures are coupled to one or more conductive lines; The semiconductor device of claim 1 , wherein the third magnetic tunnel junction structure is surrounded by an insulating material.
14. The semiconductor device of claim 1 , wherein each of the first, second and third magnetic tunnel junction structures comprises two magnetic patterns and a tunnel barrier pattern interposed between the two magnetic patterns.
15. forming a magnetic tunnel junction layer on a substrate; forming a sacrificial layer on the magnetic tunnel junction layer; forming a plurality of first spacer patterns on the sacrificial layer, the first spacer patterns extending in a second direction and having different intervals from each other in a first direction; forming a material layer covering the first spacer pattern; forming a plurality of second spacer patterns on the material layer, the second spacer patterns extending in the first direction and having different intervals in the second direction; etching the material layer using the second spacer pattern while maintaining the first spacer pattern and exposing portions of the sacrificial layer that do not overlap with the first and second spacer patterns; Etching the exposed portions of the sacrificial layer to form spaces; forming a hard mask pattern filling the space; removing the sacrificial layer; etching the magnetic tunnel junction layer using the hard mask pattern as an etching barrier to form a plurality of magnetic tunnel junction structures having different widths; A method for manufacturing a semiconductor device comprising the steps of:
16. The method of claim 15 , wherein the first spacer pattern and the second spacer pattern include the same material.
17. the plurality of first spacer patterns are arranged such that first intervals and second intervals smaller than the first intervals are alternately arranged in a first direction; The method for manufacturing a semiconductor device according to claim 15 , wherein the plurality of second spacer patterns are arranged such that a third interval and a fourth interval smaller than the third interval are alternately arranged in the second direction.
18. the first interval and the third interval are equal; The method for manufacturing a semiconductor device according to claim 17 , wherein the second interval and the fourth interval are the same.
19. 16. The method for manufacturing a semiconductor device according to claim 15, wherein the line width of the first spacer pattern is the same as the line width of the second spacer pattern.