Display device

Abstract

To provide a semiconductor device with high reliability, to manufacture the semiconductor device, to manufacture the semiconductor device with high yield, and to improve productivity.SOLUTION: In a semiconductor device having a transistor in which a gate electrode layer, a gate insulation film, and an oxide semiconductor film are laminated in this order, and a source electrode layer and a drain electrode layer in contact with the oxide semiconductor film is provided, a step of eliminating residue matter resultant of an etching step existing on the gate electrode layer or an oxide semiconductor film surface and in its vicinity after forming the gate electrode layer or the source electrode layer and a drain electrode layer by the etching step.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a semiconductor device and a method for manufacturing the same.

[0002] Note that, in this specification, a semiconductor device generally refers to a device that can function by utilizing semiconductor characteristics, and an electro-optical device, a semiconductor circuit, and an electronic device are all semiconductor devices.

Background Art

[0003] Techniques for forming a transistor (also referred to as a thin film transistor (TFT)) using a semiconductor thin film formed on a substrate having an insulating surface have attracted attention. The transistor is widely applied to electronic devices such as integrated circuits (ICs) and image display devices (display devices). Although silicon-based semiconductor materials are widely known as semiconductor thin films applicable to transistors, oxide semiconductors have attracted attention as other materials. For example, a transistor using a semiconductor layer made of an amorphous oxide containing indium (In), gallium (Ga), and zinc (Zn) (In-Ga-Zn-O-based amorphous oxide) has been disclosed (see Patent Document 1).

[0004]

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] By the way, in a semiconductor device having a transistor using an oxide semiconductor, high reliability​​​​​​ Achievement is an important matter for commercialization.

[0007] However, a semiconductor device is composed of a plurality of thin films with a complex structure and is fabricated by various materials, methods, and processes. Therefore, due to the fabrication process, there is a risk of shape defects and deterioration of electrical characteristics of the resulting semiconductor device.

[0008] In view of such problems, one of the challenges is to provide a highly reliable semiconductor device having a transistor using an oxide semiconductor.

[0009] Another challenge is to fabricate a highly reliable semiconductor device with high yield and improve productivity.

Means for Solving the Problems

[0010] In a semiconductor device having an inverted staggered transistor with a bottom gate structure, residues in an etching process for forming a metal layer (gate electrode layer, or source electrode layer and drain electrode layer) are prevented from contaminating the oxide semiconductor film, or the surface and vicinity of the gate electrode layer.

[0011] In an etching process for forming a metal layer such as a gate electrode layer, or source electrode layer and drain electrode layer, residues are generated on the surface of the metal layer, or the surface and vicinity of the oxide semiconductor film by an etching material (etching gas, or etching solution). Such residues are factors that cause a decrease in the voltage resistance of the gate insulating film and a decrease and variation in the electrical characteristics of the transistor such as leakage current.

[0012] The residues include an etching material (etching gas, or etching solution) and the metal layer to be processed ​​​​, the elements contained in the oxide semiconductor film exposed to the etching material, and compounds of the elements are included. For example, in the etching process of forming a metal layer such as a gate electrode layer, or a source electrode layer and a drain electrode layer, a gas containing halogen is preferably used. In this case, the residue becomes a halogen-based impurity (halogen or halide). Examples of the residue include chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon.

[0013] In addition, the residue may contain a metal element contained in the oxide semiconductor film (for example, indium, gallium, or zinc).

[0014] One form of the configuration of the invention disclosed in this specification is to perform a step of removing the residue (residue removal step) existing between the source electrode layer and the drain electrode layer on the surface of the oxide semiconductor film and in the vicinity thereof after forming the source electrode layer and the drain electrode layer.

[0015] Another form of the configuration of the invention disclosed in this specification is to perform a step of removing the residue (residue removal step) existing on the surface of the gate electrode layer after forming the gate electrode layer.

[0016] The above residue removal step can be performed by treatment with water or an alkaline solution, or plasma treatment. Specifically, treatment with water or a TMAH (Tetra Methyl Ammonium Hydroxide) solution, or plasma treatment using oxygen, nitrous oxide, or a noble gas (typically argon) can be preferably used. Alternatively, treatment with dilute hydrofluoric acid (hydrofluoric acid) may be performed.

[0017] ​​​​​​​​​The surface of the oxide semiconductor film or the gate electrode layer and its vicinity can be prevented from being contaminated by residues. Therefore, a semiconductor device having an inverted staggered transistor with a bottom gate structure is an oxide semiconductor. Residues on the surface of the semiconductor film (or gate electrode layer) (typically halogens (e.g., chlorine, fluorine) The surface density of the fluorine, boron, phosphorus, aluminum, iron, or carbon is set to 1×10 13 atom s / cm 2 Less than or equal to 1×10 12 atoms / cm 2 (below) In addition, residues (typically, halogens) on the surface of the oxide semiconductor film (or the gate electrode layer) The concentration of cations (e.g., chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon) is increased by 5x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 (below) and It is possible.

[0018] Therefore, a reliable transistor including a transistor having stable electrical characteristics using an oxide semiconductor film can be obtained. In addition, it is possible to provide a highly reliable semiconductor device with a high yield. This allows for improved productivity.

[0019] One embodiment of the configuration of the invention disclosed in this specification is a gate electrode layer on an insulating surface. a gate insulating film on the gate insulating film; an oxide semiconductor film on the gate insulating film; and a source electrode on the oxide semiconductor film. the electrode layer and the drain electrode layer are in contact with a region of the oxide semiconductor film which overlaps with the gate electrode layer, and an insulating film covering the source electrode layer and the drain electrode layer; The surface density of the halogen on the surface in contact with the film is 1×10 13 atoms / cm 2The following is a semiconductor device .

[0020] One form of the configuration of the invention disclosed in this specification has a gate electrode layer on an insulating surface, a gate insulating film on the gate electrode layer, an oxide semiconductor film on the gate insulating film, a source electrode layer and a drain electrode layer on the oxide semiconductor film, and is in contact with a region overlapping the gate electrode layer of the oxide semiconductor film, and has an insulating film covering the source electrode layer and the drain electrode layer, and the surface density of halogen on the surface of the gate electrode layer is 1×10 atoms / cm or less. It is a semiconductor device . 13 2 .

[0021] One form of the configuration of the invention disclosed in this specification has a gate electrode layer on an insulating surface, a gate insulating film on the gate electrode layer, an oxide semiconductor film on the gate insulating film, a source electrode layer and a drain electrode layer on the oxide semiconductor film, and is in contact with a region overlapping the gate electrode layer of the oxide semiconductor film, and has an insulating film covering the source electrode layer and the drain electrode layer, and the surface density of halogen on the surface of the oxide semiconductor film in contact with the insulating film is 1×10 atoms / cm or less, and the surface density of halogen on the surface of the gate electrode layer is 1×10 atoms / cm or less. It is a semiconductor device 13 2 . 13 2 .

[0022] One form of the configuration of the invention disclosed in this specification is to form a gate electrode layer on an insulating surface, form a gate insulating film on the gate electrode layer, form an oxide semiconductor film on the gate insulating film, form a conductive film on the oxide semiconductor film, and form a source electrode layer and a drain electrode layer by etching the conductive film with a gas containing halogen, and perform a residue removal process on the oxide semiconductor film. A semiconductor device ​​​​​​​​A method for manufacturing a semiconductor device.

[0023] One embodiment of the configuration of the invention disclosed in this specification is to form a conductive film on an insulating surface, and etch the conductive film with a gas containing halogen to form a gate electrode layer, perform a residue removal process on the gate electrode layer, form a gate insulating film on the gate electrode layer after the residue removal process, form an oxide semiconductor film on the gate insulating film, and form a source electrode layer and a drain electrode layer on the oxide semiconductor film. This is a method for manufacturing a semiconductor device. One embodiment of the configuration of the invention disclosed in this specification is to form a first conductive film on an insulating surface, etch the first conductive film with a gas containing halogen to form a gate electrode layer, perform a residue removal process on the gate electrode layer, form a gate insulating film on the gate electrode layer after the residue removal process, form an oxide semiconductor film on the gate insulating film, form a second conductive film on the oxide semiconductor film, and etch the second conductive film with a gas containing halogen to form a source electrode layer and a drain electrode layer, and perform a residue removal process on the oxide semiconductor film. This is a method for manufacturing a semiconductor device. One embodiment of the present invention relates to a semiconductor device having a transistor or a circuit including a transistor. For example, it relates to a semiconductor device having a transistor or a circuit including a transistor in which a channel formation region is formed of an oxide semiconductor. For example, it relates to an LSI, a CPU, a power device mounted on a power supply circuit, a memory, a thyristor, a converter, an image sensor, and other semiconductor integrated circuits, an electro-optical device represented by a liquid crystal display panel, and an electronic device having a light-emitting display device having a light-emitting element as a component.

[0024] One embodiment of the present invention relates to a semiconductor device having a transistor or a circuit including a transistor. For example, it relates to a semiconductor device having a transistor or a circuit including a transistor in which a channel formation region is formed of an oxide semiconductor. For example, it relates to an LSI, a CPU, a power device mounted on a power supply circuit, a memory, a thyristor, a converter, an image sensor, and other semiconductor integrated circuits, an electro-optical device represented by a liquid crystal display panel, and an electronic device having a light-emitting display device having a light-emitting element as a component. One embodiment of the present invention relates to a semiconductor device having a transistor or a circuit including a transistor. For example, it relates to a semiconductor device having a transistor or a circuit including a transistor in which a channel formation region is formed of an oxide semiconductor. For example, it relates to an LSI, a CPU, a power device mounted on a power supply circuit, a memory, a thyristor, a converter, an image sensor, and other semiconductor integrated circuits, an electro-optical device represented by a liquid crystal display panel, and an electronic device having a light-emitting display device having a light-emitting element as a component. One embodiment of the present invention relates to a semiconductor device having a transistor or a circuit including a transistor. For example, it relates to a semiconductor device having a transistor or a circuit including a transistor in which a channel formation region is formed of an oxide semiconductor. For example, it relates to an LSI, a CPU, a power device mounted on a power supply circuit, a memory, a thyristor, a converter, an image sensor, and other semiconductor integrated circuits, an electro-optical device represented by a liquid crystal display panel, and an electronic device having a light-emitting display device having a light-emitting element as a component. One embodiment of the present invention relates to a semiconductor device having a transistor or a circuit including a transistor. For example, it relates to a semiconductor device having a transistor or a circuit including a transistor in which a channel formation region is formed of an oxide semiconductor. For example, it relates to an LSI, a CPU, a power device mounted on a power supply circuit, a memory, a thyristor, a converter, an image sensor, and other semiconductor integrated circuits, an electro-optical device represented by a liquid crystal display panel, and an electronic device having a light-emitting display device having a light-emitting element as a component. One embodiment of the present invention relates to a semiconductor device having a transistor or a circuit including a transistor. For example, it relates to a semiconductor device having a transistor or a circuit including a transistor in which a channel formation region is formed of an oxide semiconductor. For example, it relates to an LSI, a CPU, a power device mounted on a power supply circuit, a memory, a thyristor, a converter, an image sensor, and other semiconductor integrated circuits, an electro-optical device represented by a liquid crystal display panel, and an electronic device having a light-emitting display device having a light-emitting element as a component. One embodiment of the present invention relates to a semiconductor device having a transistor or a circuit including a transistor. For example, it relates to a semiconductor device having a transistor or a circuit including a transistor in which a channel formation region is formed of an oxide semiconductor. For example, it relates to an LSI, a CPU, a power device mounted on a power supply circuit, a memory, a thyristor, a converter, an image sensor, and other semiconductor integrated circuits, an electro-optical device represented by a liquid crystal display panel, and an electronic device having a light-emitting display device having a light-emitting element as a component. One embodiment of the present invention relates to a semiconductor device having a transistor or a circuit including a transistor. For example, it relates to a semiconductor device having a transistor or a circuit including a transistor in which a channel formation region is formed of an oxide semiconductor. For example, it relates to an LSI, a CPU, a power device mounted on a power supply circuit, a memory, a thyristor, a converter, an image sensor, and other semiconductor integrated circuits, an electro-optical device represented by a liquid crystal display panel, and an electronic device having a light-emitting display device having a light-emitting element as a component.

[0025] One embodiment of the present invention relates to a semiconductor device having a transistor or a circuit including a transistor. For example, it relates to a semiconductor device having a transistor or a circuit including a transistor in which a channel formation region is formed of an oxide semiconductor. For example, it relates to an LSI, a CPU, a power device mounted on a power supply circuit, a memory, a thyristor, a converter, an image sensor, and other semiconductor integrated circuits, an electro-optical device represented by a liquid crystal display panel, and an electronic device having a light-emitting display device having a light-emitting element as a component. One embodiment of the present invention relates to a semiconductor device having a transistor or a circuit including a transistor. For example, it relates to a semiconductor device having a transistor or a circuit including a transistor in which a channel formation region is formed of an oxide semiconductor. For example, it relates to an LSI, a CPU, a power device mounted on a power supply circuit, a memory, a thyristor, a converter, an image sensor, and other semiconductor integrated circuits, an electro-optical device represented by a liquid crystal display panel, and an electronic device having a light-emitting display device having a light-emitting element as a component. One embodiment of the present invention relates to a semiconductor device having a transistor or a circuit including a transistor. For example, it relates to a semiconductor device having a transistor or a circuit including a transistor in which a channel formation region is formed of an oxide semiconductor. For example, it relates to an LSI, a CPU, a power device mounted on a power supply circuit, a memory, a thyristor, a converter, an image sensor, and other semiconductor integrated circuits, an electro-optical device represented by a liquid crystal display panel, and an electronic device having a light-emitting display device having a light-emitting element as a component. One embodiment of the present invention relates to a semiconductor device having a transistor or a circuit including a transistor. For example, it relates to a semiconductor device having a transistor or a circuit including a transistor in which a channel formation region is formed of an oxide semiconductor. For example, it relates to an LSI, a CPU, a power device mounted on a power supply circuit, a memory, a thyristor, a converter, an image sensor, and other semiconductor integrated circuits, an electro-optical device represented by a liquid crystal display panel, and an electronic device having a light-emitting display device having a light-emitting element as a component. One embodiment of the present invention relates to a semiconductor device having a transistor or a circuit including a transistor. For example, it relates to a semiconductor device having a transistor or a circuit including a transistor in which a channel formation region is formed of an oxide semiconductor. For example, it relates to an LSI, a CPU, a power device mounted on a power supply circuit, a memory, a thyristor, a converter, an image sensor, and other semiconductor integrated circuits, an electro-optical device represented by a liquid crystal display panel, and an electronic device having a light-emitting display device having a light-emitting element as a component. One embodiment of the present invention relates to a semiconductor device having a transistor or a circuit including a transistor. For example, it relates to a semiconductor device having a transistor or a circuit including a transistor in which a channel formation region is formed of an oxide semiconductor. For example, it relates to an LSI, a CPU, a power device mounted on a power supply circuit, a memory, a thyristor, a converter, an image sensor, and other semiconductor integrated circuits, an electro-optical device represented by a liquid crystal display panel, and an electronic device having a light-emitting display device having a light-emitting element as a component.

Advantages of the Invention

[0026] To provide a highly reliable semiconductor device having a transistor using an oxide semiconductor.

[0027] Also, to produce a highly reliable semiconductor device with high yield and improve productivity.

Brief Description of the Drawings

[0028]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Embodiments for Carrying Out the Invention

[0029] Hereinafter, embodiments of the invention disclosed in this specification will be described in detail with reference to the drawings. However, the invention disclosed in this specification is not limited to the following description, and it will be easily understood by those skilled in the art that its form and details can be changed in various ways. Also, the invention disclosed in this specification is not to be construed as being limited to the description of the embodiments shown below. Note that the ordinal numbers attached as the first, second, etc. are used for convenience and do not indicate the order of steps or the order of lamination. ​ No. In this specification, no specific name is indicated as a matter for specifying the invention. No.

[0030] (Embodiment 1) In this embodiment, one form of a semiconductor device and a method for manufacturing the semiconductor device will be described with reference to FIG. 1. In this embodiment, a semiconductor device including a transistor having an oxide semiconductor film is shown as an example of the semiconductor device. The semiconductor device includes a transistor having an oxide semiconductor film.

[0031] The transistor may have a single gate structure in which one channel formation region is formed, a double gate structure in which two channel formation regions are formed, or a triple gate structure in which three channel formation regions are formed. Further, it may have a dual gate type having two gate electrode layers disposed via a gate insulating film above and below the channel formation region. The transistor having two gate electrode layers disposed via a gate insulating film above and below the channel formation region may be of a dual gate type. The transistor having two gate electrode layers disposed via a gate insulating film above and below the channel formation region may be of a dual gate type.

[0032] The transistor 440 shown in FIG. 1(E) is an example of a transistor which is one of the bottom gate structures and is also called an inverted staggered transistor. Note that FIG. 1 is a cross-sectional view of the transistor 440 in the channel length direction. As shown in FIG. 1(E), the semiconductor device including the transistor 440 has a gate electrode layer 401, a gate insulating film 402, an oxide semiconductor film 403, a source electrode layer 405a, and a drain electrode layer 405b on a substrate 400 having an insulating surface. Further, an insulating film 407 covering the transistor 440 is provided. As shown in FIG. 1(E), the semiconductor device including the transistor 440 has a gate electrode layer 401, a gate insulating film 402, an oxide semiconductor film 403, a source electrode layer 405a, and a drain electrode layer 405b on a substrate 400 having an insulating surface. Further, an insulating film 407 covering the transistor 440 is provided.

[0033] The oxide semiconductor used for the oxide semiconductor film 403 contains at least indium (In). In particular, it preferably contains In and zinc (Zn). Further, when the oxide semiconductor film is used, The oxide semiconductor used for the oxide semiconductor film 403 contains at least indium (In). In particular, it preferably contains In and zinc (Zn). Further, when the oxide semiconductor film is used,

[0034] The oxide semiconductor used for the oxide semiconductor film 403 contains at least indium (In). In particular, it preferably contains In and zinc (Zn). Further, when the oxide semiconductor film is used, In addition to these, it is preferable to have gallium (Ga) as a stabilizer for reducing variations in the electrical characteristics of transistors. Also, it is preferable to have tin (Sn) as a stabilizer. Also, it is preferable to have hafnium (Hf) as a stabilizer. Also, it is preferable to have aluminum (Al) as a stabilizer. Also, it is preferable to have zirconium (Zr) as a stabilizer. In addition, as other stabilizers, it is also possible to have any one or more of lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), and lutetium (Lu), which are lanthanoids. For example, as oxide semiconductors, indium oxide, tin oxide, zinc oxide, In-Zn-based oxides, In-Mg-based oxides, In-Ga-based oxides, In-Ga-Zn-based oxides (also denoted as IGZO), In-Al-Zn-based oxides, In-Sn-Zn-based oxides, In-Hf-Zn-based oxides, In-La-Zn-based oxides, In-Ce-Zn-based oxides, In-Pr-Zn-based oxides, In-Nd-Zn-based oxides, In-Sm-Zn-based oxides, In-Eu-Zn-based oxides, In-Gd-Zn-based oxides, In-Tb-Zn-based oxides, In-Dy-Zn-based oxides, In-Ho-Zn-based oxides, In-Er-Zn-based oxides, In-Tm-Zn-based oxides, In-Yb-Zn-based oxides, In-Lu-Zn-based oxides, In-Sn-Ga-Zn-based oxides

[0035]

[0036] Oxides, In-Hf-Ga-Zn based oxides, In-Al-Ga-Zn based oxides, In-S n-Al-Zn based oxides, In-Sn-Hf-Zn based oxides, In-Hf-Al-Zn based oxides can be used.

[0037] Here, for example, an In-Ga-Zn based oxide means an oxide mainly composed of In, Ga, and Zn and the ratio of In, Ga, and Zn is not limited. Also, metal elements other than In, Ga, and Zn may be included.

[0038] Also, as the oxide semiconductor, InMO3(ZnO) m (m > 0 and m is not an integer) may be used. Here, M represents one or more metal elements selected from Ga, Fe, Mn, and Co. Also, as the oxide semiconductor, In2SnO5 (ZnO) (n > 0 and n is an integer) may be used. n (n > 0 and n is an integer) may be used.

[0039] For example, In-Ga-Zn based oxides with an atomic ratio of In:Ga:Zn = 1:1:1 (= 1 / 3:1 / 3:1 / 3), In:Ga:Z n = 2:2:1 (= 2 / 5:2 / 5:1 / 5), or In:Ga:Zn = 3:1:2 (= 1 / 2:1 / 6:1 / 3) and oxides in the vicinity of their compositions can be used. Or, In:Sn:Zn = 1:1:1 (= 1 / 3: 1 / 3:1 / 3), In:Sn:Zn = 2:1:3 (= 1 / 3:1 / 6:1 / 2) or In:Sn:Zn = 2:1:5 (= 1 / 4:1 / 8:5 / 8) of In-Sn -Zn based oxides and oxides in the vicinity of their compositions are preferably used.

[0040] ​However, the oxide semiconductors containing indium are not limited to these, and those with an appropriate composition may be used according to the required electrical characteristics (mobility, threshold value, variation, etc.). Also, in order to obtain the required electrical characteristics, it is preferable to make the carrier concentration, impurity concentration, defect density, atomic number ratio of metal elements and oxygen, interatomic distance, density, etc. appropriate. For example, in the In-Sn-Zn-based oxide, relatively high mobility can be obtained relatively easily. However, even in the In-Ga-Zn-based oxide, the mobility can be increased by reducing the defect density in the bulk.

[0041] For example, in the In-Sn-Zn-based oxide, relatively high mobility can be obtained relatively easily. However, even in the In-Ga-Zn-based oxide, the mobility can be increased by reducing the defect density in the bulk.

[0042] Note that, for example, when the atomic number ratio of In, Ga, and Zn is In:Ga:Zn = a:b:c (a + b + c = 1), the composition of the oxide being in the vicinity of the composition of the oxide with an atomic number ratio of In:Ga:Zn = A:B:C (A + B + C = 1) means that a, b, and c satisfy (a - A) 2 + (b - B) 2 + (c - C) 2 ≦ r 2 . For r, for example, 0.05 may be used. The same applies to other oxides.

[0043] The oxide semiconductor film 403 may be in any state of single crystal, polycrystal (also referred to as polycrystalline), or amorphous.

[0044] Preferably, the oxide semiconductor film 403 is a CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor) film.

[0045] The CAAC-OS film is neither a perfect single crystal nor a perfect amorphous. The CAAC-OS film is an oxide semiconductor film having a crystal-amorphous mixed-phase structure with a crystal part and an amorphous part in an amorphous phase The size of the crystal part is often such that it can be accommodated within a cube with a side length of less than 100 nm In an observation image obtained by a transmission electron microscope (TEM), the boundary between the amorphous part and the crystal part contained in the CAAC-OS film is not always clear Also, no grain boundaries (also referred to as grain boundaries) can be confirmed in the CAAC-OS film by TEM Therefore, in the CAAC-OS film, a decrease in electron mobility caused by grain boundaries is suppressed

[0046] The crystal parts contained in the CAAC-OS film have their c-axes aligned in a direction parallel to the normal vector of the surface to be formed of the CAAC-OS film or the normal vector of the surface, and have a trigonal shape or a hexagonal atomic arrangement when viewed from a direction perpendicular to the ab-plane, and when viewed from a direction perpendicular to the c-axis, the metal atoms are arranged in layers or the metal atoms and oxygen atoms are arranged in layers. Note that the directions of the a-axis and b-axis may be different between different crystal parts In this specification, when simply described as perpendicular, a range of 85 ° or more and 95° or less is also included. Also, when simply described as parallel, a range of -5 ° or more and 5° or less is also included. Note that part of the oxygen constituting the oxide semiconductor film may be substituted with nitrogen

[0047] In the CAAC-OS film, the distribution of the crystal parts may not be uniform. For example, when crystal growth is performed from the surface side of the oxide semiconductor film during the formation process of the CAAC-OS film, the proportion of the crystal parts may be higher near the surface than near the surface to be formed Also, by adding impurities to the CAAC-OS film, crystal parts become amorphous in the impurity-added region ​​​​​ It may also be qualified.

[0048] The c-axis of the crystal part included in the CAAC-OS film aligns in a direction parallel to the normal vector of the formed surface of the CAAC-OS film or the normal vector of the surface. Therefore, depending on the shape of the CAAC-OS film (the cross-sectional shape of the formed surface or the cross-sectional shape of the surface), they may face different directions. In addition, the direction of the c-axis of the crystal part becomes a direction parallel to the normal vector of the formed surface or the normal vector of the surface when the CAAC-OS film is formed. The crystal part is formed by film formation or by performing a crystallization treatment such as heat treatment after film formation. Furthermore, depending on the shape of the CAAC-OS film (the cross-sectional shape of the formed surface or the cross-sectional shape of the surface), they may face different directions. In addition, the direction of the c-axis of the crystal part becomes a direction parallel to the normal vector of the formed surface or the normal vector of the surface when the CAAC-OS film is formed. The crystal part is formed by film formation or by performing a crystallization treatment such as heat treatment after film formation. The crystal part is formed by film formation or by performing a crystallization treatment such as heat treatment after film formation.

[0049] The transistor using the CAAC-OS film has little variation in electrical characteristics due to irradiation with visible light or ultraviolet light. Therefore, the transistor has high reliability. Therefore, the transistor has high reliability.

[0050] Note that a part of oxygen constituting the oxide semiconductor film may be substituted with nitrogen.

[0051] Also, in an oxide semiconductor having a crystal part like the CAAC-OS film, more bulk defects can be reduced, and if the surface flatness is improved, a mobility higher than that of an amorphous oxide semiconductor can be obtained. To improve the surface flatness, it is preferable to form an oxide semiconductor on a flat surface. Specifically, it is preferably formed on a surface with an average surface roughness (Ra) of 1 nm or less, preferably 0.3 nm or less, more preferably 0.1 nm or less. To improve the surface flatness, it is preferable to form an oxide semiconductor on a flat surface. Specifically, it is preferably formed on a surface with an average surface roughness (Ra) of 1 nm or less, preferably 0.3 nm or less, more preferably 0.1 nm or less.

[0052] Note that Ra is an arithmetic mean roughness defined in JIS B601:2001 (ISO4287:1997) extended three-dimensionally so that it can be applied to a curved surface. The "reference surface" is extended three-dimensionally so that it can be applied to a curved surface. The "reference surface" It can be expressed as "the average of the absolute values of the deviations from the specified surface" and is defined by the following formula.

[0053]

Number

[0054] Here, the specified surface is the surface to be measured for roughness, and is the region of the quadrilateral represented by the four points of coordinates ((x1, y1, f(x1, y1))(x1, y2, f(x1, y2))(x2, y1, f(x2, y1))(x2, y2, f(x2, y2)). Let the area of the rectangle obtained by projecting the specified surface onto the xy plane be S0, and the height of the reference surface (the average height of the specified surface) be Z0. Ra can be measured by an atomic force microscope (AFM). It is possible.

[0055] Also, the reference surface is a plane parallel to the XY plane at the average height of the specified surface. That is, when the average value of the height of the specified surface is Z0, the height of the reference surface is also represented by Z0.

[0056] However, since the transistor 440 described in this embodiment is of the bottom gate type, a substrate 400, a gate electrode layer 401, and a gate insulating film 402 exist below the oxide semiconductor film. Therefore, after forming the gate electrode layer 401 and the gate insulating film 40 2 to obtain the above flat surface, a planarization process such as chemical mechanical polishing (CMP) processing may be performed.

[0057] The film thickness of the oxide semiconductor film 403 is 1 nm or more and 30 nm or less (preferably 5 nm or more and 10 n m or less), and the sputtering method, MBE (Molecular Beam Epita xy) method, CVD method, pulsed laser deposition method, ALD (Atomic Layer Dep osition) method, etc. can be appropriately used. Further, the oxide semiconductor film 403 may be formed using a sputtering apparatus in which a plurality of substrate surfaces are set substantially perpendicular to the surface of the sputtering target.

[0058] FIGS. 1(A) to (E) show an example of a method for manufacturing a semiconductor device having a transistor 440.

[0059] There is no major limitation on the substrate that can be used for the substrate 400 having an insulating surface, but at least it is necessary to have heat resistance sufficient to withstand subsequent heat treatment. For example, glass substrates such as barium borosilicate glass and aluminoborosilicate glass, ceramic substrates, quartz substrates, sapphire substrates, etc. can be used. Also, single crystal semiconductor substrates such as silicon and silicon carbide, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SOI substrates, etc. can be applied, and those with semiconductor elements provided on these substrates can also be used as the substrate 400.

[0060] Further, a semiconductor device may be manufactured using a flexible substrate as the substrate 400. To manufacture a semiconductor device having flexibility, a transistor 440 including an oxide semiconductor film 403 may be directly formed on the flexible substrate, or a transistor 440 including an oxide semiconductor film 403 may be formed on another manufacturing substrate and then peeled and transferred to the flexible substrate. In addition, in order to peel and transfer from the manufacturing substrate to the flexible substrate, it is advisable to provide a peeling layer between the manufacturing substrate and the transistor 440 including the oxide semiconductor film.

[0061] An insulating film may be provided as an underlayer film on the substrate 400. As the insulating film, by plasma CVD method or sputtering method, etc., silicon oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, hafnium oxide, gallium oxide and other oxide insulating films, silicon nitride nitride, silicon oxynitride, aluminum nitride, aluminum oxynitride and other nitride insulating films, or a mixed material thereof can be used to form.

[0062] Heat treatment may be performed on the substrate 400 (or the substrate 400 and the insulating film). For example, using a GRTA (Gas Rapid Thermal Annea l) apparatus for heat treatment with a high-temperature gas, heat treatment may be performed at 650 ° C for 1 minute to 5 minutes. In GRTA For the high-temperature gas, noble gases such as argon, or inert gases such as nitrogen that do not react with the object to be treated by heat treatment are used. Also, by an electric furnace, at 500 ° C, for 30 minutes to 1 hour, heat treatment may be performed. Next, a conductive film is formed on the substrate 400, and the conductive film is etched to form the gate electrode layer 4 01. The etching of the conductive film may be either dry etching or wet etching

[0063] and both may be used. The material of the gate electrode layer 401 is a metal material such as molybdenum, titanium, tantalum, tungsten, aluminum uminum, copper, chromium, neodymium, scandium or an alloy material mainly composed of these. Also, as the gate electrode layer 401, a semiconductor film typified by a polycrystalline silicon film doped with impurity

[0064] elements such as phosphorus, nickel silicide, etc. can be formed using. A silicide film may also be used. The gate electrode layer 401 may have a single-layer structure or a stacked structure.

[0065] Also, as the material of the gate electrode layer 401, indium oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide, indium tin oxide containing titanium oxide, indium tin oxide added with silicon oxide, indium zinc oxide, indium zinc oxide containing tungsten oxide, etc., conductive materials can also be applied. Also, a stacked structure of the above conductive material and the above metal material can also be used.

[0066] Also, as the gate electrode layer 401 in contact with the gate insulating film 402, a metal oxide containing nitrogen, specifically, an In-Ga-Zn-based oxide film containing nitrogen, an In-Sn-based oxide film containing nitrogen, an In-Ga-based oxide film containing nitrogen, an In-Zn-based oxide film containing nitrogen, a tin oxide film containing nitrogen, an indium oxide film containing nitrogen, a metal nitride film (such as InN, SnN, etc. ) can be used. These films have a work function of 5 eV (electron volts), preferably 5.5 eV ( electron volts) or more. When used as the gate electrode layer, the threshold voltage of the transistor's electrical characteristics can be made positive.

[0067] In this embodiment, a tungsten film with a thickness of 100 nm is formed by sputtering. .

[0068] Also, after forming the gate electrode layer 401, heat treatment may be performed on the substrate 400 and the gate electrode layer 401. For example, heat treatment can be performed at 650 °C for 1 minute to 5 minutes using a GRTA apparatus. Alternatively, a heat treatment may be performed in an electric furnace at 500° C. for 30 minutes to 1 hour.

[0069] Next, a gate insulating film 402 is formed on the gate electrode layer 401 .

[0070] In order to improve the coverage of the gate insulating film 402, a flat layer is formed on the surface of the gate electrode layer 401. In particular, when a thin insulating film is used as the gate insulating film 402, It is preferable that the surface of the gate electrode layer 401 has good flatness.

[0071] The thickness of the gate insulating film 402 is set to 1 nm or more and 20 nm or less. Methods such as a CVD method, a pulsed laser deposition method, and an ALD method can be used as appropriate. The insulating film 402 is formed by depositing a plurality of substrate surfaces approximately perpendicular to the sputtering target surface. Alternatively, a sputtering device may be used for deposition, in which deposition is performed in a set state.

[0072] The material of the gate insulating film 402 is a silicon oxide film, a gallium oxide film, an aluminum oxide film, or the like. a silicon nitride film, a silicon oxynitride film, an aluminum oxynitride film, or a nitride oxide film. It can be formed using a silicon film.

[0073] The material of the gate insulating film 402 is hafnium oxide, yttrium oxide, hafnium Silicate (HfSi x O y (x>0, y>0)), nitrogen-doped hafnium silicate HfSiO x N y (x>0, y>0)), hafnium aluminate (HfAl x O y (x>0, y>0)), and the use of high-k materials such as lanthanum oxide for the gate The leakage current can be reduced. Further, the gate insulating film 402 may have a single-layer structure or a stacked structure. It may have a stacked structure.

[0074] It is preferable that the gate insulating film 402 contains oxygen at the portion in contact with the oxide semiconductor film 403. In particular, it is preferable that the gate insulating film 402 has an amount of oxygen present in the film (in the bulk) that exceeds at least the stoichiometric composition content. For example, when using a silicon oxide film as the gate insulating film 402, it is set as SiO (where α > 0). 2+α 2+α (where α > 0).

[0075] By providing the gate insulating film 402 that contains a large amount (excess) of oxygen and serves as an oxygen supply source in contact with the oxide semiconductor film 4 03, oxygen can be supplied from the gate insulating film 402 to the oxide semiconductor film 403. By performing a heat treatment with at least a part of the oxide semiconductor film 403 and the gate insulating film 402 in contact, the supply of oxygen to the oxide semiconductor film 403 can be carried out. can be carried out. may be carried out.

[0076] By supplying oxygen to the oxide semiconductor film 403, oxygen vacancies in the film can be filled. Further, the gate insulating film 402 is preferably formed in consideration of the size of the transistor to be fabricated and the step coverage of the gate insulating film 4 02. 02.

[0077] In this embodiment, a silicon oxynitride film with a thickness of 200 nm is formed by the high-density plasma CVD method. is formed.

[0078] Further, after forming the gate insulating film 402, a heat treatment may be performed on the substrate 400, the gate electrode layer 401, and the gate insulating film 402. For example, by using a GRTA apparatus, at 650 °C for 1 minute to 5 Perform heat treatment for several minutes. Also, heat treatment may be performed at 500 °C for 30 minutes to 1 hour using an electric furnace. It may be performed.

[0079] Next, an oxide semiconductor film 403 is formed on the gate insulating film 402 (see Fig. 1(A)).

[0080] In the step of forming the oxide semiconductor film 403, in order to prevent hydrogen or water from being contained in the oxide semiconductor film 403, as a pretreatment for forming the oxide semiconductor film 403, the substrate on which the gate insulating film 402 is formed is preheated in the preheating chamber of a sputtering apparatus, and impurities such as hydrogen and moisture adsorbed on the substrate and the gate insulating film 402 are desorbed and exhausted. It is preferable. Note that a cryopump is preferable as the exhaust means provided in the preheating chamber. It is preferable. It is preferable to desorb and exhaust impurities such as hydrogen and moisture adsorbed on the substrate and the gate insulating film 402. Note that a cryopump is preferable as the exhaust means provided in the preheating chamber. Note that a cryopump is preferable as the exhaust means provided in the preheating chamber.

[0081] A planarization process may be performed on the region where the oxide semiconductor film 403 is formed in contact with the gate insulating film 402. The planarization process is not particularly limited, but polishing (e.g., CMP), dry etching, or plasma treatment can be used. The planarization process is not particularly limited, but polishing (e.g., CMP), dry etching, or plasma treatment can be used. For example, polishing (e.g., CMP), dry etching, or plasma treatment can be used.

[0082] As the plasma treatment, for example, reverse sputtering can be performed by introducing argon gas to generate plasma. Reverse sputtering is a method of forming plasma near the substrate by applying a voltage using an RF power source on the substrate side in an argon atmosphere to modify the surface. Reverse sputtering is a method of forming plasma near the substrate by applying a voltage using an RF power source on the substrate side in an argon atmosphere to modify the surface. Reverse sputtering is a method of forming plasma near the substrate by applying a voltage using an RF power source on the substrate side in an argon atmosphere to modify the surface. Note that nitrogen, helium, oxygen, etc. may be used instead of the argon atmosphere. When reverse sputtering is performed, powdery substances (also called particles or dust) adhering to the surface of the gate insulating film 402 can be removed. When reverse sputtering is performed, powdery substances (also called particles or dust) adhering to the surface of the gate insulating film 402 can be removed. Powdery substances (also called particles or dust) adhering to the surface of the gate insulating film 402 can be removed.

[0083] As the planarization process, polishing, dry etching, and plasma treatment may be performed multiple times. They may be combined and carried out. When combined, the order of steps is not particularly limited and may be appropriately set according to the uneven state of the surface of the gate insulating film 402. It is only necessary to set it as appropriate according to the uneven state of the surface of the gate insulating film 402.

[0084] Note that the oxide semiconductor film 403 is formed under conditions where a large amount of oxygen is contained during film formation (for example, film formation is performed by sputtering in an atmosphere of 100% oxygen), so that the film contains a large amount of oxygen (preferably, a region where the oxygen content is excessive with respect to the stoichiometric composition of the oxide semiconductor in the crystalline state) is preferably formed. Preferably, the film contains a large amount of oxygen (preferably, a region where the oxygen content is excessive with respect to the stoichiometric composition of the oxide semiconductor in the crystalline state). Preferably, the film contains a large amount of oxygen (preferably, a region where the oxygen content is excessive with respect to the stoichiometric composition of the oxide semiconductor in the crystalline state).

[0085] In this embodiment, as the oxide semiconductor film 403, a sputtering method using a sputtering apparatus having an AC power supply device is used to form an In-Ga-Zn-based oxide film (IGZO film) with a film thickness of 35 nm. In this embodiment, an In-Ga-Zn-based oxide target having an atomic ratio of In:Ga:Zn = 1:1: 1 (= 1 / 3:1 / 3:1 / 3) is used. The film formation conditions are an oxygen and argon atmosphere (oxygen flow ratio 50%), a pressure of 0.6 Pa, a power supply power of 5 kW, and a substrate temperature of 170°C. The film formation rate under these film formation conditions is 16 n m / min. It is preferable to use a high-purity gas from which impurities such as hydrogen, water, hydroxyl groups, or hydrides have been removed as the sputtering gas used when forming the oxide semiconductor film 403. m / min.

[0086] The substrate is held in a film formation chamber maintained in a reduced pressure state. Then, while removing the residual moisture in the film formation chamber, a sputtering gas from which hydrogen and moisture have been removed is introduced, and the oxide semiconductor film 403 is formed on the substrate 400 using the above target. To remove the residual moisture in the film formation chamber It is preferable to use a high-purity gas from which impurities such as hydrogen, water, hydroxyl groups, or hydrides have been removed as the sputtering gas used when forming the oxide semiconductor film 403.

[0087] The substrate is held in a film formation chamber maintained in a reduced pressure state. Then, while removing the residual moisture in the film formation chamber, a sputtering gas from which hydrogen and moisture have been removed is introduced, and the oxide semiconductor film 403 is formed on the substrate 400 using the above target. To remove the residual moisture in the film formation chamber while introducing a sputtering gas from which hydrogen and moisture have been removed, and the oxide semiconductor film 403 is formed on the substrate 400 using the above target. To remove the residual moisture in the film formation chamber it is sufficient to , it is preferable to use a suction-type vacuum pump, for example, a cryopump, an ion pump, or a titanium sublimation pump. Further, as the exhaust means, a turbo molecular pump with a cold trap added thereto may be used. The film formation chamber evacuated using a cryopump, for example, compounds containing hydrogen atoms such as hydrogen atoms and water (H2O) (more preferably compounds containing carbon atoms as well) are exhausted, so that the concentration of impurities contained in the oxide semiconductor film 403 formed in the film formation chamber can be reduced.

[0088] Further, it is preferable to continuously form the gate insulating film 402 and the oxide semiconductor film 40 3 without exposing the gate insulating film 402 to the atmosphere. When the gate insulating film 402 and the oxide semiconductor film 403 are continuously formed without exposing the gate insulating film 402 to the atmosphere, it is possible to prevent impurities such as hydrogen and moisture from adsorbing on the surface of the gate insulating film 402.

[0089] The oxide semiconductor film 403 can be formed by processing a film-shaped oxide semiconductor film into an island-shaped oxide semiconductor film by a photolithography process.

[0090] Further, a resist mask for forming the island-shaped oxide semiconductor film 403 may be formed by an inkjet method. When the resist mask is formed by the inkjet method, since a photomask is not used, the manufacturing cost can be reduced.

[0091] Note that the etching of the oxide semiconductor film may be dry etching, wet etching, or both may be used. For example, as the etching solution used for wet etching of the oxide semiconductor film, a solution obtained by mixing phosphoric acid, acetic acid, and nitric acid can be used. Further, IT O-07N (manufactured by Kanto Chemical Co., Inc.) may also be used. Further, dry etching may be performed by dry etching using an ICP (Inductively Coupled Plasma: inductively coupled plasma) etching method.

[0092] Further, a heat treatment may be performed on the oxide semiconductor film 403 to remove excess hydrogen (including water and hydroxyl groups) (dehydration or dehydrogenation). The temperature of the heat treatment is 300°C or higher and 700 °C or lower, or less than the distortion point of the substrate. The heat treatment can be performed under reduced pressure or in a nitrogen atmosphere, etc.

[0093] Further, when a crystalline oxide semiconductor film is used as the oxide semiconductor film 403, a heat treatment for crystallization may be performed.

[0094] In this embodiment, the substrate is introduced into an electric furnace, which is one of the heat treatment apparatuses, and the oxide semiconductor film 4 03 is heat-treated at 450°C for 1 hour in a nitrogen atmosphere and further at 450°C for 1 hour in an atmosphere containing nitrogen and oxygen.

[0095] Note that the heat treatment apparatus is not limited to an electric furnace, and an apparatus that heats the object to be processed by heat conduction or heat radiation from a heating element such as a resistance heating element may also be used. For example, an RTA (Rapid Thermal Anneal) apparatus such as a GRTA apparatus or an LRTA A (Lamp Rapid Thermal Anneal) apparatus can be used. The LRTA apparatus is an apparatus that heats the object to be processed by radiation of light (electromagnetic waves) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp. The GRTA apparatus is an apparatus that performs heat treatment using high-temperature gas. ​​​​​ It is a device. For high-temperature gas, inert gases such as argon or nitrogen, which do not react with the object to be processed during heat treatment, are used.

[0096] For example, as a heat treatment, GRTA may be performed in which a substrate is placed in an inert gas heated to a high temperature of 650°C to 700°C, heated for several minutes, and then the substrate is taken out of the inert gas.

[0097] In heat treatment, it is preferable that nitrogen or inert gases such as helium, neon, and argon do not contain water, hydrogen, etc. Or, the purity of nitrogen or inert gases such as helium, neon, and argon introduced into the heat treatment apparatus is preferably 6N (99.9999%) or more, preferably 7N (99.99999%) or more (that is, the impurity concentration is 1 ppm or less, preferably 0.1 ppm or less).

[0098] Also, after heating the oxide semiconductor film 403 by heat treatment, high-purity oxygen gas, high-purity dinitrogen monoxide gas, or ultra-dry air (when measured using a dew point meter of the CRDS (cavity ring-down laser spectroscopy) method, the moisture content is 20 ppm (dew point conversion of -55°C) or less, preferably 1 ppm or less, more preferably 10 ppb or less of air) may be introduced. It is preferable that oxygen gas or dinitrogen monoxide gas does not contain water, hydrogen, etc. Also, it is preferable that the purity of oxygen gas or dinitrogen monoxide gas introduced into the heat treatment apparatus is 6N or more, preferably 7N or more (that is, the impurity concentration in oxygen gas or dinitrogen monoxide gas is 1 ppm or less, preferably 0.1 ppm or less). Due to the action of oxygen gas or dinitrogen monoxide gas, it is simultaneously reduced by the step of removing impurities by dehydration or dehydrogenation treatment. ​​​​​​​​By supplying oxygen, which is the main component material constituting the compacted oxide semiconductor, the oxide semiconductor film 403 can be purified to high purity and made into type-I (intrinsic).

[0099] Note that the timing of the heat treatment for dehydration or dehydrogenation may be after the formation of the film-like oxide semiconductor film or after the formation of the island-like oxide semiconductor film 403.

[0100] Also, the heat treatment for dehydration or dehydrogenation may be performed multiple times or may be combined with other heat treatments.

[0101] If the heat treatment for dehydration or dehydrogenation is performed before the oxide semiconductor film 403 is processed into an island shape and while the film-like oxide semiconductor film covers the gate insulating film 402, it is preferable because oxygen contained in the gate insulating film 4 02 can be prevented from being released by the heat treatment. 02 can be prevented from being released by the heat treatment, which is preferable .

[0102] Also, oxygen (including at least any one of oxygen radicals, oxygen atoms, and oxygen ions) may be introduced into the oxide semiconductor film 403 that has undergone the dehydration or dehydrogenation treatment to supply oxygen into the film .

[0103] Also, there is a possibility that oxygen, which is the main component material constituting the oxide semiconductor, is simultaneously desorbed and reduced by the dehydration or dehydrogenation treatment. In the oxide semiconductor film, oxygen vacancies exist at the locations where oxygen has desorbed, and donor levels that cause fluctuations in the electrical characteristics of the transistor are generated due to the oxygen vacancies . Therefore, it is preferable to supply oxygen (including at least any one of oxygen radicals, oxygen atoms, and oxygen ions) to the oxide semiconductor film that has undergone the dehydration or dehydrogenation treatment. Oxide

[0104] Thus, it is preferable to supply oxygen (including at least any one of oxygen radicals, oxygen atoms, and oxygen ions) to the oxide semiconductor film that has undergone the dehydration or dehydrogenation treatment. Oxide ​​​ By supplying oxygen to the semiconductor film, oxygen vacancies in the film can be filled.

[0105] By introducing oxygen into the oxide semiconductor film 403 that has undergone dehydration or dehydrogenation treatment to supply oxygen into the film, the oxide semiconductor film 403 can be purified and made into an i-type (intrinsic) state. A transistor having the oxide semiconductor film 403 that has been purified and made into an i-type (intrinsic) state has suppressed fluctuations in electrical characteristics and is electrically stable.

[0106] As a method for introducing oxygen, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, plasma treatment, etc. can be used.

[0107] In the oxygen introduction step, when introducing oxygen into the oxide semiconductor film 403, it may be introduced directly into the oxide semiconductor film 403, or it may be introduced into the oxide semiconductor film 403 through another film such as the insulating film 407. When introducing oxygen through another film, an ion implantation method, an ion doping method, a plasma immersion ion implantation method, etc. may be used. However, when introducing oxygen directly into the exposed oxide semiconductor film 403, plasma treatment, etc. can also be used.

[0108] The introduction of oxygen into the oxide semiconductor film 403 is preferably performed after the dehydration or dehydrogenation treatment, but is not particularly limited. Also, the introduction of oxygen into the oxide semiconductor film 403 that has undergone the above dehydration or dehydrogenation treatment may be performed multiple times.

[0109] Preferably, the oxide semiconductor film provided in the transistor is in a crystalline state of the oxide semiconductor. It is preferable that the film includes a region where the oxygen content is excessive with respect to the stoichiometric composition. In this case, the oxygen content is set to exceed the stoichiometric composition of the oxide semiconductor. Alternatively , the oxygen content is set to exceed the amount of oxygen in the case of a single crystal. Oxygen may be present in the interstitial sites of the oxide semiconductor.

[0110] Hydrogen or moisture is removed from the oxide semiconductor, and it is purified to have as little impurity as possible , and by supplying oxygen to compensate for oxygen deficiencies, a type-I (intrinsic) oxide semiconductor, or an oxide semiconductor that is as close as possible to type-I (intrinsic) can be obtained. By doing so, the Fermi level (Ef) of the oxide semiconductor can be made the same level as the intrinsic Fermi level (Ei). Therefore, by using the oxide semiconductor film in a transistor, variations in the threshold voltage Vth of the transistor due to oxygen deficiencies and the shift ΔVth of the threshold voltage can be reduced.

[0111] Next, a conductive film 445 that will become a source electrode layer and a drain electrode layer (including wiring formed of the same layer) is formed on the gate electrode layer 401, the gate insulating film 402, and the oxide semiconductor film 403 (see Fig. 1(B)).

[0112] The conductive film 445 is made of a material that can withstand subsequent heat treatment. As the conductive film 445 used for the source electrode layer and the drain electrode layer, for example, a metal film containing an element selected from Al, Cr, Cu, Ta, Ti, Mo, W, or a metal nitride film (titanium nitride film, molybdenum nitride film, tungsten nitride film) composed of the above-described elements can be used. Also, on one or both of the lower side and the upper side of a metal film such as Al , Cu, etc., a high melting point metal such as Ti, Mo, W A structure in which a film or their metal nitride films (titanium nitride film, molybdenum nitride film, tungsten nitride film ) may be laminated. Also, as the conductive film 445 used for the source electrode layer and the drain electrode layer, it may be formed of a conductive metal oxide. As the conductive metal oxide , indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), indium tin oxide (In2O3―SnO2, abbreviated as ITO), indium zinc oxide ( In2O3―ZnO) or those containing silicon oxide in these metal oxide materials can be used.

[0113] Resist masks 448a and 448b are formed on the conductive film 445 by a photolithography process, and selective etching using a gas 447 containing halogen is performed to form the source electrode layer 40 5a and the drain electrode layer 405b (see Fig. 1(C)). After forming the source electrode layer 405a and the drain electrode layer 405b, the resist masks 448a and 448b are removed.

[0114] For the exposure when forming the resist masks 448a and 448b, it is advisable to use ultraviolet light, KrF laser light, or ArF laser light. The channel length L of the transistor 440 to be formed later is determined by the interval width between the lower end of the source electrode layer 405a adjacent to the oxide semiconductor film 403 and the lower end of the drain electrode layer 405b. In the case of performing exposure with a channel length L < 25 nm , it is advisable to perform the exposure when forming the resist masks 448a and 448b using extreme ultraviolet light with a very short wavelength of several nm to several tens of nm. Exposure with extreme ultraviolet light has high resolution and a large depth of focus. Therefore, for the transistor to be formed later It is also possible to set the channel length L of the dista to be 10 nm or more and 1000 nm or less, and the operating speed of the circuit can be increased.

[0115] In addition, in order to reduce the number of photomasks and the number of processes used in the photolithography process, a resist mask formed by a multi-tone mask, which is an exposure mask in which the transmitted light has a plurality of intensities, may be used in the etching process. The resist mask formed using the multi-tone mask has a shape with a plurality of film thicknesses, and the shape can be further deformed by performing etching. Therefore, it can be used in a plurality of etching processes for processing into different patterns. Therefore, a resist mask corresponding to at least two or more different patterns can be formed by one multi-tone mask. Therefore, the number of photomasks can be reduced, and the corresponding photolithography process can also be reduced, so that the process can be simplified.

[0116] In the present embodiment, a gas 447 containing a halogen is used for etching the conductive film 445. As the gas 447 containing a halogen, a gas containing chlorine, for example, chlorine (Cl2), boron trichloride (BCl3), silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc. can be used. Further, as the gas 447 containing a halogen, a gas containing fluorine, for example, carbon tetrafluoride (CF4), sulfur hexafluoride (SF6), nitrogen trifluoride (NF3), trifluoromethane (CHF3), etc. can be used. Further, a gas obtained by adding a noble gas such as helium (He) or argon (Ar) to these gases can be used.

[0117] As the etching method, a parallel plate type RIE (Reactive Ion Etching ) method or an ICP etching method can be used. The etching conditions (the amount of power applied to the coil-shaped electrode, the amount of power applied to the electrode on the substrate side, the electrode temperature on the substrate side, etc.) are appropriately adjusted so that etching can be performed into the desired processed shape. In this embodiment, as the conductive film 445, a laminate of a titanium film with a thickness of 100 nm, an aluminum film with a thickness of 400 nm, and a titanium film with a thickness of 100 nm is used by sputtering. The etching of the conductive film 445 is performed by dry etching to etch the laminate of the titanium film, the aluminum film, and the titanium film, thereby forming the source electrode layer 405a and the drain electrode layer 405b.

[0118]

[0119] In this embodiment, after etching the two layers of the titanium film and the aluminum film under the first etching conditions, the remaining single-layer titanium film is removed under the second etching conditions. The first etching conditions are as follows: using an etching gas (BCl3:Cl2 = 750 sccm:150 sccm), setting the bias power to 1500 W, setting the ICP power supply power to 0 W, and setting the pressure to 2.0 Pa. The second etching conditions are as follows: using an etching gas (BCl3:Cl2 = 700 sccm: 100 sccm), setting the bias power to 750 W, setting the ICP power supply power to 0 W, and setting the pressure to 2.0 Pa.

[0120] In the etching process of forming the source electrode layer 405a and the drain electrode layer 405b, residues are generated on the surface of the oxide semiconductor film and in the vicinity thereof by an etching material (etching gas or etching solution). Such residues cause problems such as leakage current in the transistor's electrical ) This causes deterioration and fluctuations in air characteristics. In addition, elements contained in the etching material may mix into or adhere to the oxide semiconductor film 403, which may have an adverse effect on transistor characteristics.

[0121] The residues include the etching material (etching gas or etching solution), the conductive film 445 to be processed, elements contained in the oxide semiconductor film 403 exposed to the etching material, and compounds of the elements. For example, in the etching process for forming the source electrode layer and the drain electrode layer, a gas containing halogen is preferably used. In this case, the residues include halogen-based impurities ( halogen or halide).

[0122] Examples of the residues include chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon. In addition, the residues may also include metal elements (such as indium, gallium, or zinc) contained in the conductive film 445 and the oxide semiconductor film 403 exposed to the etching material, halides of the metal elements, oxides of the metal elements, etc. In some cases, the residues may also include elements contained in the resist masks 448a and 448b.

[0123] In this embodiment, since the gas 447 containing halogen is used in the etching process for forming the source electrode layer 405a and the drain electrode layer 405b, the resulting residues are halogen (chlorine in this embodiment) - based impurities (halogen or halide). When boron is also used in the gas 447 containing halogen as in this embodiment, the resulting residues include boron or compounds containing boron. When a solution mixed with phosphoric acid, acetic acid, and nitric acid is used as the etching material, the residues include phosphorus, etc.

[0124] Therefore, after forming the source electrode layer 405a and the drain electrode layer 405b, a step of removing residues existing between the source electrode layer 405a and the drain electrode layer 405b on the surface of the oxide semiconductor film 4 03 and in the vicinity thereof is performed (see FIG. 1(D)). The residue removal step can be performed by treatment with water, an alkaline solution, or plasma treatment. For example , treatment with water or a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Further, treatment with dilute hydrofluoric acid may be performed. Note that the step of removing residues has the effect of removing residues (mainly halogens or halides in this embodiment) adhering to the surface of the oxide semiconductor film 4 03. ,

[0125] Note that during the etching step of the conductive film 445 and the residue removal step, it is desirable to optimize the etching conditions so that the oxide semiconductor film 4 03 is not etched and divided. However, it is difficult to obtain conditions where only the conductive film 445 is etched and the oxide semiconductor film 403 is not etched at all. During the etching of the conductive film 445, only a part of the oxide semiconductor film 403 may be etched, resulting in an oxide semiconductor film having a groove (concave portion).

[0126] Through the above steps, the transistor 440 of this embodiment is manufactured.

[0127] In this embodiment, an insulating film 407 serving as a protective insulating film is formed in contact with the oxide semiconductor film 403 on the source electrode layer 405a and the drain electrode layer 405b (see FIG. 1(E)).

[0128] The insulating film 407 has a film thickness of at least 1 nm or more, and can be formed by appropriately using a method that does not mix impurities such as water and hydrogen into the insulating film 40 7. When hydrogen is contained in the insulating film 407, hydrogen may enter the oxide semiconductor film 403 or oxygen in the oxide semiconductor film may be extracted by hydrogen, resulting in a low resistance (n-type) of the back channel of the oxide semiconductor film 403 and the possibility of forming a parasitic channel. Therefore, it is important not to use hydrogen in the film formation method so that the insulating film 407 becomes a film that contains as little hydrogen as possible. As the insulating film 407, typically, a single layer or a laminate of an inorganic insulating film such as a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum oxynitride film, a hafnium oxide film, or a gallium oxide film, a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or an aluminum oxynitride film can be used. When a heating process is performed as a dehydration or dehydrogenation treatment, it is preferable to supply oxygen to the oxide semiconductor film 403. By supplying oxygen to the oxide semiconductor film 403, oxygen deficiency in the film can be compensated. In this embodiment, since oxygen is supplied to the oxide semiconductor film 403 using the insulating film 407 as a supply source, an example using an oxide insulating film (for example, a silicon oxide film, a silicon oxynitride film) containing oxygen for the insulating film 407 is shown. When the insulating film 407 is used as a supply source of oxygen, the insulating film 407

[0129] is a film containing a large amount (excess) of oxygen (preferably, with respect to the stoichiometric composition in the crystalline state, oxygen ... ... ...

[0130] ... ... ...

[0131] ... ... ... ... If it is a film containing a region where the content is excessive), it can function suitably as a source of oxygen supply. It can be done.

[0132] In this embodiment, a silicon oxide film with a thickness of 300 nm is used as the insulating film 407, and it is formed by sputtering. The substrate temperature during film formation may be room temperature or higher and 300°C or lower. In this embodiment, it is set to 100°C. The film formation of the silicon oxide film by sputtering can be carried out in a rare gas (typically argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen. Also, a silicon oxide target or a silicon target can be used as the target. For example, using a silicon target, a silicon oxide film can be formed by sputtering in an atmosphere containing oxygen. (typically argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas and oxygen. Also, a silicon oxide target or a silicon target can be used as the target. For example, using a silicon target, a silicon oxide film can be formed by sputtering in an atmosphere containing oxygen.

[0133] Similar to the film formation of the oxide semiconductor film 403, in order to remove the residual moisture in the film formation chamber of the insulating film 407, it is preferable to use an adsorption type vacuum pump (such as a cryopump). The concentration of impurities contained in the insulating film 407 formed in the film formation chamber evacuated using a cryopump can be reduced. Similar to the film formation of the oxide semiconductor film 403, in order to remove the residual moisture in the film formation chamber of the insulating film 407, it is preferable to use an adsorption type vacuum pump (such as a cryopump). The concentration of impurities contained in the insulating film 407 formed in the film formation chamber evacuated using a cryopump can be reduced. Similar to the film formation of the oxide semiconductor film 403, in order to remove the residual moisture in the film formation chamber of the insulating film 407, it is preferable to use an adsorption type vacuum pump (such as a cryopump). The concentration of impurities contained in the insulating film 407 formed in the film formation chamber evacuated using a cryopump can be reduced. Also, as an exhaust means for removing the residual moisture in the film formation chamber of the insulating film 407, a turbo molecular pump with a cold trap added may be used. Also, as an exhaust means for removing the residual moisture in the film formation chamber of the insulating film 407, a turbo molecular pump with a cold trap added may be used.

[0134] As the sputtering gas used when forming the insulating film 407, it is preferable to use a high-purity gas from which impurities such as hydrogen and water have been removed. As the sputtering gas used when forming the insulating film 407, it is preferable to use a high-purity gas from which impurities such as hydrogen and water have been removed.

[0135] Next, a heating process is performed on the oxide semiconductor film 403 in a state where a part (channel formation region) is in contact with the insulating film 407. Next, a heating process is performed on the oxide semiconductor film 403 in a state where a part (channel formation region) is in contact with the insulating film 407.

[0136] The temperature of the heating process is 250°C to 700°C, or 400°C to 700°C, or For example, the substrate is introduced into an electric furnace, which is one type of heat treatment device, and The oxide semiconductor film is subjected to a heating step at 250° C. for 1 hour in a nitrogen atmosphere.

[0137] This heating step uses the same heating method and heating device as the heating step for dehydration or dehydrogenation. It can be used.

[0138] The heating process can be carried out under reduced pressure or with nitrogen, oxygen, or ultra-dry air (CRDS (Cavity Ring Down When measured using a dew point meter that uses the laser spectroscopy method, the moisture content is 20 ppm (dew point equivalent). -55°C or less, preferably 1 ppm or less, preferably 10 ppb or less of air, or The above can be carried out under an atmosphere of nitrogen, oxygen, or ultra-dry gas. It is preferable that the dry air or rare gas atmosphere does not contain water, hydrogen, etc. The purity of nitrogen, oxygen, or rare gas introduced into the heat treatment device must be 6N (99.9999%) or higher. Preferably, the concentration of impurities is 7N (99.99999%) or more (i.e., the impurity concentration is 1 ppm or less, It is preferable to keep the concentration of the EDTA concentration at 0.1 ppm or less.

[0139] Further, a heat treatment is performed while the oxide semiconductor film 403 and the insulating film 407 containing oxygen are in contact with each other. Therefore, the oxide semiconductor film 403 is reduced in the impurity removal process. Oxygen, which is one of the main components, is supplied to the oxide semiconductor film 403 through the insulating film 407 containing oxygen. can be provided.

[0140] Further, a dense inorganic insulating film may be provided on the insulating film 407. For example, An aluminum oxide film is formed on 407 by sputtering. The aluminum oxide film is made to have a high density (film density of 3.2 g / cm 3 or more, preferably 3.6 g / cm 3 or more). By doing so, stable electrical characteristics can be imparted to the transistor 440. The film density can be measured by the Rutherford Backscattering Spectrometry (RBS) or X-ray reflectometry (XRR).

[0141] The aluminum oxide film that can be used as a protective insulating film provided on the transistor 440 has a high blocking effect ( blocking effect) against both impurities such as hydrogen and moisture, and oxygen, and does not allow the film to pass through.

[0142] Therefore, the aluminum oxide film functions as a protective film that prevents the incorporation of impurities such as hydrogen and moisture, which are factors of variation, into the oxide semiconductor film 403 during and after the manufacturing process, and the release of oxygen, which is the main component constituting the oxide semiconductor, from the oxide semiconductor film 403.

[0143] In addition, a planarization insulating film may be formed to reduce surface irregularities caused by the transistor 440. As the planarization insulating film, organic materials such as polyimide, acrylic resin, and benzocyclobutene-based resin can be used. In addition to the above organic materials, low-k materials can also be used. Note that a planarization insulating film may be formed by laminating a plurality of insulating films formed of these materials.

[0144] For example, as the planarization insulating film, an acrylic resin film with a film thickness of 1500 nm may be formed. A The krill resin film can be formed by baking (for example, at 250°C for 1 hour in a nitrogen atmosphere) after coating by a coating method.

[0145] After forming the planarization insulating film, a heat treatment may be performed. For example, heat treatment is performed at 250°C for 1 hour in a nitrogen atmosphere.

[0146] As described above, a heat treatment may be performed after forming the transistor 440. Further, the heat treatment may be performed multiple times.

[0147] As described above, by performing the step of removing the residue, it is possible to prevent the surface of the oxide semiconductor film 403 and the vicinity thereof from being contaminated by the residue. Therefore, a semiconductor device having a transistor 440 which is a bottom gate structure reverse stagger type transistor has an impurity (typically, halogen (for example, chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) caused by an etching step on the surface of the oxide semiconductor film 40 3 with a surface density of 1 × 10 atoms / cm or less (preferably 1 × 10 13 atoms / cm 2 or less). 12 2 In addition, the concentration of an impurity (typically, halogen (for example, chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) caused by an etching step on the surface of the oxide semiconductor film 403 can be 5 × 10 atoms / cm 18 or less (preferably 1 × 10 3 atoms / cm 18 or less 3 ).

[0148] Note that the impurity caused by the etching step (typically, halogen (for example, chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) The concentration of (iodine, phosphorus, aluminum, iron, or carbon) can be estimated using a method such as SIMS (Secondary Ion Mass Spectrometry). It can be seen.

[0149] Therefore, a highly reliable semiconductor device including the transistor 440 having stable electrical characteristics using the oxide semiconductor film 403 can be provided. In addition, a highly reliable semiconductor device can be manufactured with high yield and productivity can be improved.

[0150] (Embodiment 2) In this embodiment, another form of the semiconductor device and the method of manufacturing the semiconductor device will be described with reference to FIG. 2. The same parts or parts having the same functions as those in the above embodiment, and the processes can be carried out in the same manner as in the above embodiment, and repeated explanations will be omitted. Also, detailed explanations of the same parts will be omitted.

[0151] The transistor 430 shown in FIG. 2(E) is an example of a transistor which is one of the bottom gate structures and is also called an inverse staggered transistor. Note that FIG. 2 is a cross-sectional view of the transistor 430 in the channel length direction.

[0152] As shown in FIG. 2(E), the semiconductor device including the transistor 430 has a gate electrode layer 401, a gate insulating film 402, an oxide semiconductor film 403, a source electrode layer 405a, and a drain electrode layer 405b on a substrate 400 having an insulating surface. Also, an insulating film 407 covering the transistor 430 is provided.

[0153] FIGS. 2(A) to (E) show an example of a method of manufacturing a semiconductor device having the transistor 430.

[0154] ​​​​​​​​​ A conductive film 441 is formed on a substrate 400 (see Fig. 2(A)). The material of the conductive film 441 can be formed using a metal material such as molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, scandium, or an alloy material having these as a main component. Also, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus, or a silicide film such as nickel silicide may be used as the conductive film 441. The conductive film 441 may have a single-layer structure or a laminated structure. ribden, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, s can be formed using a metal material such as scandium or an alloy material having these as a main component. Also, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus, or a silicide film such as nickel silicide may be used as the conductive film 441. The conductive film 441 may have a single-layer structure or a laminated structure. 441 may have a single-layer structure or a laminated structure.

[0155] In addition, as the material of the conductive film 441, indium oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide, indium tin oxide containing titanium oxide , indium tin oxide added with silicon oxide, indium zinc oxide, indium zinc oxide containing tungsten oxide, etc., can also be applied as the conductive material. Also, a laminated structure of the above conductive material and the above metal material can also be formed. conductive material and the above metal material can also be formed. conductive material and the above metal material can also be formed.

[0156] In this embodiment, a tungsten film with a thickness of 100 nm is formed as the conductive film 441 by sputtering. A tungsten film with a thickness of 100 nm is formed as the conductive film 441 by sputtering.

[0157] A resist mask 442 is formed on the conductive film 441 by a photolithography process, and selective etching is performed to form a gate electrode layer 401 (see Fig. 2(B)). After forming the gate electrode layer 401, the resist mask 442 is removed. The etching of the conductive film 441 may be either dry etching or wet etching, or both may be used.

[0158] In this embodiment, a gas 443 containing a halogen is used for etching the conductive film 441 As the gas 443 containing halogen, gases containing chlorine, such as chlorine (Cl2), boron trichloride (BCl3), silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc. can be used. Further, as the gas 443 containing halogen, gases containing fluorine, such as carbon tetrafluoride (CF4), sulfur hexafluoride (SF6), nitrogen trifluoride (NF3), trifluoromethane (CHF3), etc. can be used. Also, gases obtained by adding noble gases such as helium (He) and argon (Ar) to these gases, etc. can be used. As the etching method, a parallel plate type RIE method or an ICP etching method can be used. The etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side, the temperature of the electrode on the substrate side, etc.) are appropriately adjusted so that etching can be performed into a desired processed shape.

[0159]

[0160] In this embodiment, dry etching is used in the etching process of the conductive film 441. As the gas 443 containing halogen, a gas containing carbon tetrafluoride, chlorine, and oxygen (CF4:Cl2 :O2 = 25 sccm:25 sccm:10 sccm) is used, the bias power is set to 150 W and the ICP power supply power is set to 500 W, and the pressure is set to 1.0 Pa.

[0161] In the etching process of forming the gate electrode layer 401, residues are generated on the surface of the gate electrode layer 401 and in the vicinity thereof by an etching material (etching gas or etching solution). If impurities contained in such residues are present on the surface of the gate electrode layer, the gate insulation causes degradation of the resistance of the insulating film 402 (the breakdown voltage decreases), resulting in a leakage current between the gate electrode layer 401 and the source electrode layer 405a or the drain electrode layer 405b. Therefore, it becomes a factor causing fluctuations and degradation in the electrical characteristics of the transistor.

[0162] The residue contains an etching material (etching gas or etching solution), elements contained in the conductive film 441 to be processed, and compounds of the elements. For example, in the etching process for forming the gate electrode layer 401, a gas containing halogen is preferably used. In this case, the residue contains halogen-based impurities (halogen or halide).

[0163] Examples of the residue include chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon. Further, the residue may also contain a metal element contained in the conductive film 441, a halide of the metal element, an oxide of the metal element, etc. Also, the residue may contain elements contained in the resist mask 442.

[0164] In this embodiment, since a gas 443 containing halogen is used in the etching process for forming the gate electrode layer 401, the resulting residue becomes halogen (chlorine in this embodiment)-based impurities (halogen or halide). Also, when a solution mixed with phosphoric acid, acetic acid, and nitric acid is used as the etching material, the residue contains phosphorus, etc.

[0165] Therefore, after the formation of the gate electrode layer 401, a step of removing the residue existing on the surface of the gate electrode layer 401 and in the vicinity thereof is performed (see Fig. 2(C)). The residue removal step can be performed by treatment with water or an alkaline solution, or by plasma treatment. For example, water or an alkaline solution​​​​​​​​​​ Treatment using a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Further, treatment using dilute hydrofluoric acid may be performed. Treatment using a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Further, treatment using dilute hydrofluoric acid may be performed. Treatment using a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Further, treatment using dilute hydrofluoric acid may be performed.

[0166] Next, a gate insulating film 402 is formed on the gate electrode layer 401. In the present embodiment, a silicon oxynitride film with a thickness of 200 nm is formed by a high-density plasma CVD method. Next, a gate insulating film 402 is formed on the gate electrode layer 401. In the present embodiment, a silicon oxynitride film with a thickness of 200 nm is formed by a high-density plasma CVD method.

[0167] An oxide semiconductor film 403 is formed on the gate insulating film 402 (see Fig. 2(D)). In the present embodiment, as the oxide semiconductor film 403, a sputtering method using a sputtering apparatus having an AC power supply device is used to form an In-Ga-Zn-based oxide film (IGZO film) with a thickness of 35 nm. In the present embodiment, an In-Ga-Zn-based oxide target with an atomic ratio of In:Ga:Zn = 1:1:1 (= 1 / 3: 1 / 3: 1 / 3) is used. The film formation conditions are an oxygen and argon atmosphere (oxygen flow ratio 50%), a pressure of 0.6 Pa, a power supply power of 5 kW, and a substrate temperature of 170 °C. The film formation rate under these film formation conditions is 16 nm / min. An oxide semiconductor film 403 is formed on the gate insulating film 402 (see Fig. 2(D)). In the present embodiment, as the oxide semiconductor film 403, a sputtering method using a sputtering apparatus having an AC power supply device is used to form an In-Ga-Zn-based oxide film (IGZO film) with a thickness of 35 nm. In the present embodiment, an In-Ga-Zn-based oxide target with an atomic ratio of In:Ga:Zn = 1:1:1 (= 1 / 3: 1 / 3: 1 / 3) is used. The film formation conditions are an oxygen and argon atmosphere (oxygen flow ratio 50%), a pressure of 0.6 Pa, a power supply power of 5 kW, and a substrate temperature of 170 °C. The film formation rate under these film formation conditions is 16 nm / min. An oxide semiconductor film 403 is formed on the gate insulating film 402 (see Fig. 2(D)). In the present embodiment, as the oxide semiconductor film 403, a sputtering method using a sputtering apparatus having an AC power supply device is used to form an In-Ga-Zn-based oxide film (IGZO film) with a thickness of 35 nm. In the present embodiment, an In-Ga-Zn-based oxide target with an atomic ratio of In:Ga:Zn = 1:1:1 (= 1 / 3: 1 / 3: 1 / 3) is used. The film formation conditions are an oxygen and argon atmosphere (oxygen flow ratio 50%), a pressure of 0.6 Pa, a power supply power of 5 kW, and a substrate temperature of 170 °C. The film formation rate under these film formation conditions is 16 nm / min. An oxide semiconductor film 403 is formed on the gate insulating film 402 (see Fig. 2(D)). In the present embodiment, as the oxide semiconductor film 403, a sputtering method using a sputtering apparatus having an AC power supply device is used to form an In-Ga-Zn-based oxide film (IGZO film) with a thickness of 35 nm. In the present embodiment, an In-Ga-Zn-based oxide target with an atomic ratio of In:Ga:Zn = 1:1:1 (= 1 / 3: 1 / 3: 1 / 3) is used. The film formation conditions are an oxygen and argon atmosphere (oxygen flow ratio 50%), a pressure of 0.6 Pa, a power supply power of 5 kW, and a substrate temperature of 170 °C. The film formation rate under these film formation conditions is 16 nm / min. An oxide semiconductor film 403 is formed on the gate insulating film 402 (see Fig. 2(D)). In the present embodiment, as the oxide semiconductor film 403, a sputtering method using a sputtering apparatus having an AC power supply device is used to form an In-Ga-Zn-based oxide film (IGZO film) with a thickness of 35 nm. In the present embodiment, an In-Ga-Zn-based oxide target with an atomic ratio of In:Ga:Zn = 1:1:1 (= 1 / 3: 1 / 3: 1 / 3) is used. The film formation conditions are an oxygen and argon atmosphere (oxygen flow ratio 50%), a pressure of 0.6 Pa, a power supply power of 5 kW, and a substrate temperature of 170 °C. The film formation rate under these film formation conditions is 16 nm / min. An oxide semiconductor film 403 is formed on the gate insulating film 402 (see Fig. 2(D)). In the present embodiment, as the oxide semiconductor film 403, a sputtering method using a sputtering apparatus having an AC power supply device is used to form an In-Ga-Zn-based oxide film (IGZO film) with a thickness of 35 nm. In the present embodiment, an In-Ga-Zn-based oxide target with an atomic ratio of In:Ga:Zn = 1:1:1 (= 1 / 3: 1 / 3: 1 / 3) is used. The film formation conditions are an oxygen and argon atmosphere (oxygen flow ratio 50%), a pressure of 0.6 Pa, a power supply power of 5 kW, and a substrate temperature of 170 °C. The film formation rate under these film formation conditions is 16 nm / min. An oxide semiconductor film 403 is formed on the gate insulating film 402 (see Fig. 2(D)). In the present embodiment, as the oxide semiconductor film 403, a sputtering method using a sputtering apparatus having an AC power supply device is used to form an In-Ga-Zn-based oxide film (IGZO film) with a thickness of 35 nm. In the present embodiment, an In-Ga-Zn-based oxide target with an atomic ratio of In:Ga:Zn = 1:1:1 (= 1 / 3: 1 / 3: 1 / 3) is used. The film formation conditions are an oxygen and argon atmosphere (oxygen flow ratio 50%), a pressure of 0.6 Pa, a power supply power of 5 kW, and a substrate temperature of 170 °C. The film formation rate under these film formation conditions is 16 nm / min. An oxide semiconductor film 403 is formed on the gate insulating film 402 (see Fig. 2(D)). In the present embodiment, as the oxide semiconductor film 403, a sputtering method using a sputtering apparatus having an AC power supply device is used to form an In-Ga-Zn-based oxide film (IGZO film) with a thickness of 35 nm. In the present embodiment, an In-Ga-Zn-based oxide target with an atomic ratio of In:Ga:Zn = 1:1:1 (= 1 / 3: 1 / 3: 1 / 3) is used. The film formation conditions are an oxygen and argon atmosphere (oxygen flow ratio 50%), a pressure of 0.6 Pa, a power supply power of 5 kW, and a substrate temperature of 170 °C. The film formation rate under these film formation conditions is 16 nm / min.

[0168] Heat treatment may be performed on the oxide semiconductor film 403 to remove excessive hydrogen (including water and hydroxyl groups) (dehydration or dehydrogenation). In the present embodiment, the substrate is introduced into an electric furnace, which is one of the heat treatment apparatuses, and heat treatment is performed on the oxide semiconductor film 403 at 450 °C for 1 hour in a nitrogen atmosphere and further at 450 °C for 1 hour in a nitrogen and oxygen atmosphere. Heat treatment may be performed on the oxide semiconductor film 403 to remove excessive hydrogen (including water and hydroxyl groups) (dehydration or dehydrogenation). In the present embodiment, the substrate is introduced into an electric furnace, which is one of the heat treatment apparatuses, and heat treatment is performed on the oxide semiconductor film 403 at 450 °C for 1 hour in a nitrogen atmosphere and further at 450 °C for 1 hour in a nitrogen and oxygen atmosphere. Heat treatment may be performed on the oxide semiconductor film 403 to remove excessive hydrogen (including water and hydroxyl groups) (dehydration or dehydrogenation). In the present embodiment, the substrate is introduced into an electric furnace, which is one of the heat treatment apparatuses, and heat treatment is performed on the oxide semiconductor film 403 at 450 °C for 1 hour in a nitrogen atmosphere and further at 450 °C for 1 hour in a nitrogen and oxygen atmosphere. Heat treatment may be performed on the oxide semiconductor film 403 to remove excessive hydrogen (including water and hydroxyl groups) (dehydration or dehydrogenation). In the present embodiment, the substrate is introduced into an electric furnace, which is one of the heat treatment apparatuses, and heat treatment is performed on the oxide semiconductor film 403 at 450 °C for 1 hour in a nitrogen atmosphere and further at 450 °C for 1 hour in a nitrogen and oxygen atmosphere.

[0169] Next, a conductive film is formed on the gate electrode layer 401, the gate insulating film 402, and the oxide semiconductor film 403. Form the conductive film and etch the conductive film to form the source electrode layer 405a and the drain electrode layer 405b. The etching of the conductive film may be dry etching, wet etching, or both may be used.

[0170] In this embodiment, a titanium film with a thickness of 100 nm, an aluminum film with a thickness of 400 nm, and a titanium film with a thickness of 100 nm are laminated by sputtering, and the laminate of the titanium film, aluminum film, and titanium film is etched by dry etching to form the source electrode layer 405 a and the drain electrode layer 405b.

[0171] Through the above steps, the transistor 430 of this embodiment is fabricated.

[0172] In this embodiment, an insulating film 407 serving as a protective insulating film is formed on the source electrode layer 405a and the drain electrode layer 405b in contact with the oxide semiconductor film 403 (see FIG. 2(E)). For example, a silicon oxynitride film formed by CVD is formed to a thickness of 400 nm. Further, heat treatment may be performed after the formation of the protective insulating film. For example, heat treatment is performed at 300°C for 1 hour in a nitrogen atmosphere.

[0173] In addition, a planarizing insulating film may be formed to reduce surface unevenness caused by the transistor 430.

[0174] For example, an acrylic resin film with a thickness of 1500 nm may be formed as the planarizing insulating film on the protective insulating film. The acrylic resin film can be formed by baking (for example, at 250°C for 1 hour in a nitrogen atmosphere) after coating by the coating method.

[0175] After the formation of the planarizing insulating film, heat treatment may be performed. For example, heat treatment is performed at 250°C for 1 hour in a nitrogen atmosphere.​​​​​​​​​​ Perform an intermediate heat treatment.

[0176] As described above, it is possible to prevent the surface of the gate electrode layer 401 and the vicinity thereof from being contaminated by residues. Therefore, a semiconductor device having a transistor 420, which is an inverted staggered transistor with a bottom gate structure, has an impurity (typically a halogen (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) on the surface of the gate electrode layer 401 due to an etching process. The surface density is set to 1×10 atoms / cm 13 atoms / cm 2 or less (preferably 1×10 12 atoms / cm 2 or less). Further, the concentration of impurities (typically a halogen (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) on the surface of the gate electrode layer 401 due to an etching process can be set to 5×10 atoms / cm 18 atoms / cm 3 or less (preferably 1×10 18 at oms / cm 3 or less).

[0177] Therefore, a highly reliable semiconductor device including a transistor 430 having stable electrical characteristics using an oxide semiconductor film 403 can be provided. Further, a highly reliable semiconductor device can be manufactured with high yield and productivity can be improved.

[0178] (Embodiment 3) (Embodiment 3) In this embodiment, another form of a semiconductor device and a method for manufacturing a semiconductor device will be described with reference to FIG. 3. The same parts or parts having the same functions as those in the above embodiment, and the processes can be performed in the same manner as in the above embodiment, and repeated descriptions will be omitted. Further, detailed descriptions of the same portions will be omitted. In this embodiment, another form of a semiconductor device and a method for manufacturing a semiconductor device will be described with reference to FIG. 3. The same parts or parts having the same functions as those in the above embodiment, and the processes can be performed in the same manner as in the above embodiment, and repeated descriptions will be omitted. Further, detailed descriptions of the same portions will be omitted.

[0179] The transistor 420 shown in FIG. 3(F) is an example of a transistor that is one of the bottom gate structures and is also called an inverse staggered transistor. Note that FIG. 3 is a cross-sectional view of the transistor 420 in the channel length direction. As shown in FIG. 3(F), the semiconductor device including the transistor 420 has a gate electrode layer 401, a gate insulating film 402, an oxide semiconductor film 403, a source electrode layer 405a, and a drain electrode layer 405b on a substrate 400 having an insulating surface. Further, an insulating film 407 covering the transistor 420 is provided.

[0180] As shown in FIG. 3(A) to (F), an example of a method for manufacturing a semiconductor device having the transistor 420 is shown. A conductive film is formed on a substrate 400 having an insulating surface. The material of the conductive film can be formed using a metal material such as molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, scandium, or an alloy material having these as a main component. Further, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus, or a silicide film such as nickel silicide may be used as the conductive film. The conductive film may have a single-layer structure or a laminated structure.

[0181]

[0182] In addition, the material of the conductive film is indium oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide, indium tin oxide containing titanium oxide, indium tin oxide added with silicon oxide, indium zinc oxide, indium oxide containing tungsten oxide,

[0183] ​​​​​​​​​​​​​Conductive materials such as indium zinc oxide can also be applied. Further, a laminated structure of the conductive material and the metal material can be formed.

[0184] In this embodiment, a tungsten film with a thickness of 100 nm is formed as the conductive film by sputtering. Form a resist mask on the conductive film by photolithography, and selectively etch

[0185] to form the gate electrode layer 401 (see Fig. 3(A)). After forming the gate electrode layer 401, remove the resist mask. The etching of the conductive film may be dry etching, wet etching, or both may be used. In this embodiment, a gas containing halogen is used for etching the conductive film. As the gas containing halogen,

[0186] a gas containing chlorine, for example, a gas containing chlorine (Cl2), boron trichloride (BCl3 ), silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc. can be used. Further, as the gas containing halogen, a gas containing fluorine, for example, carbon tetrafluoride (CF4), sulfur hexafluoride (SF6), nitrogen trifluoride (NF3), trifluoromethane (CHF3), etc. can be used. Further, a gas obtained by adding a noble gas such as helium (He ) or argon (Ar) to these gases can be used. In addition, a gas obtained by adding a noble gas such as helium (He) or argon (Ar) to these gases can be used.

[0187] As the etching method, a parallel plate type RIE method or an ICP etching method can be used. Adjust the etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side, the temperature of the electrode on the substrate side, etc.) as appropriate so that etching can be performed to the desired processing shape. .

[0188] In this embodiment, dry etching is used in the etching process of the conductive film, and the etching conditions As the gas containing halogen, a gas containing carbon tetrafluoride, chlorine, and oxygen (CF4: Cl2:O2 = 25 sccm:25 sccm:10 sccm) is used, the bias power is 1 50 W, the ICP power is 500 W, and the pressure is 1.0 Pa.

[0189] In the etching process of forming the gate electrode layer 401, residues are generated on the surface of the gate electrode layer 401 and in its vicinity by the etching material (etching gas or etching solution). If impurities contained in such residues are present on the surface of the gate electrode layer, it will cause a decrease in the breakdown voltage of the gate insulating film 402, and a leakage current will occur between the gate electrode layer 401 and the source electrode layer 405a or the drain electrode layer 405b. Therefore, it becomes a factor causing fluctuations and decreases in the electrical characteristics of the transistor.

[0190] The residues include the etching material (etching gas or etching solution), elements contained in the conductive film to be processed, and compounds of these elements. For example, in the etching process of forming the gate electrode layer 401, a gas containing halogen is preferably used. In this case, the residues contain halogen-based impurities (halogen or halide).

[0191] Examples of the residues include chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon. In addition, the residues may also contain metal elements contained in the conductive film, halides of metal elements, oxides of metal elements, etc. In addition, the residues may also contain elements contained in the resist mask.

[0192] In this embodiment, a gas containing halogen is used in the etching process for forming the gate electrode layer 401. Therefore, the resulting residue becomes a halogen (chlorine in this embodiment)-based impurity (halogen, or halide). Also, when a solution obtained by mixing phosphoric acid, acetic acid, and nitric acid is used as the etching material, phosphorus or the like is contained in the residue.

[0193] Therefore, after forming the gate electrode layer 401, a step of removing the residue present on the surface of the gate electrode layer 401 and in the vicinity thereof is performed (see FIG. 3(B)). The residue removal step can be performed by treatment with water or an alkaline solution, or by plasma treatment. For example, treatment with water or a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Further, treatment using dilute hydrofluoric acid may be performed.

[0194] Next, a gate insulating film 402 is formed on the gate electrode layer 401. In this embodiment, a silicon oxynitride film having a thickness of 200 nm is formed by a high-density plasma CVD method.

[0195] An oxide semiconductor film 403 is formed on the gate insulating film 402 (see FIG. 3(C)). In this embodiment, as the oxide semiconductor film 403, a sputtering method using a sputtering apparatus having an AC power supply is used to form an In-Ga-Zn-based oxide film (IGZ O film) having a thickness of 35 nm. In this embodiment, an In-Ga-Zn-based oxide target having an atomic ratio of In:Ga:Zn = 1:1:1 (= 1 / 3: 1 / 3:1 / 3) is used. Note that the film formation conditions are an oxygen and argon atmosphere (oxygen flow rate ratio: 50%), a pressure of 0.6 Pa, and a power supply power Set it to 5 kW and a substrate temperature of 170 °C. The film formation rate under these film formation conditions is 16 nm / min. It becomes.

[0196] The oxide semiconductor film 403 may be subjected to a heat treatment for removing excess hydrogen (including water and hydroxyl groups) (dehydration or dehydrogenation). In this embodiment, the substrate is introduced into an electric furnace, which is one of the heat treatment apparatuses, and the oxide semiconductor film 403 is heated at 450 °C for 1 hour in a nitrogen atmosphere and further heated at 450 °C for 1 hour in a nitrogen and oxygen atmosphere. Next, a conductive film that will become the source electrode layer and the drain electrode layer is formed on the gate electrode layer 401, the gate insulating film 402, and the oxide semiconductor film 403. The conductive film is made of a material that can withstand subsequent heat treatment. As the conductive film used for the source electrode layer and the drain electrode layer, for example, a metal film containing an element selected from Al, Cr, Cu, Ta, Ti, Mo, W, or a metal nitride film (titanium nitride film, molybdenum nitride film, tungsten nitride film) containing the above-described elements as components can be used. Also, a high melting point metal film such as Ti, Mo, W or a metal nitride film (titanium nitride film, molybdenum nitride film, tungsten nitride film) thereof may be laminated on one or both of the lower side and the upper side of a metal film such as Al or Cu. Also, the conductive film used for the source electrode layer and the drain electrode layer may be formed of a conductive metal oxide. Examples of the conductive metal oxide include indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), indium tin oxide (In2O3—SnO2, abbreviated as ITO), indium zinc oxide (In2O3—ZnO).

[0197]

[0198] Alternatively, those containing silicon oxide in these metal oxide materials can be used.

[0199] A resist mask is formed on the conductive film by a photolithography process, and selective etching is performed to form a source electrode layer 405a and a drain electrode layer 405b (see Fig. 3(D)). After forming the source electrode layer 405a and the drain electrode layer 405b, the resist mask is removed.

[0200] In this embodiment, a gas containing halogen is used for etching the conductive film. As the gas containing halogen, a gas containing chlorine, for example, a gas containing chlorine (Cl2), boron trichloride (BCl3 ), silicon tetrachloride (SiCl4), carbon tetrachloride (CCl4), etc. can be used. Also, as the gas containing halogen, a gas containing fluorine, for example, carbon tetrafluoride (CF4), sulfur hexafluoride (SF6), nitrogen trifluoride (NF3), trifluoromethane (CH F3), etc. can be used. Further, a gas obtained by adding a noble gas such as helium (He) or argon (Ar) to these gases can be used.

[0201] As the etching method, a parallel plate type RIE method or an ICP etching method can be used. The etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side, the temperature of the electrode on the substrate side, etc.) are appropriately adjusted so that etching can be performed into a desired processed shape.

[0202] In this embodiment, a titanium film with a thickness of 100 nm, an aluminum film with a thickness of 400 nm, and a laminate of a titanium film with a thickness of 100 nm are used as the conductive film. The etching of the conductive film ​​​​Etching forms the source electrode layer 405a and the drain electrode layer 405b by etching a stack of a titanium film, an aluminum film, and a titanium film using a dry etching method.

[0203] In this embodiment, after etching two layers of the titanium film and the aluminum film under the first etching conditions, the remaining single-layer titanium film is removed under the second etching conditions. Note that the first etching conditions are as follows: using an etching gas (BCl3:Cl2 = 750 sccm:150 sccm), setting the bias power to 1500 W, setting the ICP power supply power to 0 W, and setting the pressure to 2.0 Pa. The second etching conditions are as follows: using an etching gas (BCl3:Cl2 = 700 sccm:100 sccm), setting the bias power to 750 W, setting the ICP power supply power to 0 W, and setting the pressure to 2.0 Pa.

[0204] In the etching process of forming the source electrode layer 405a and the drain electrode layer 405b, residues are generated on the surface of the oxide semiconductor film and in its vicinity by an etching material (etching gas or etching solution). Such residues are factors that cause a decrease or variation in the electrical characteristics of the transistor, such as leakage current. In addition, elements contained in the etching material may be mixed into or adhered to the oxide semiconductor film 403, which may adversely affect the transistor characteristics.

[0205] The residues include an etching material (etching gas or etching solution), the conductive film to be processed, elements contained in the oxide semiconductor film 403 exposed to the etching material, and compounds of these elements. For example, in the etching process of forming the source electrode layer and the drain electrode layer, a gas containing halogen is preferably used. In this case, the residues include halogen-based impurities (halogen N, or a halide).

[0206] Examples of the residue include chlorine, fluorine, boron, phosphorus, aluminum, iron, or carbon. In addition, the residue may include a conductive film, a metal element (e.g., indium, gallium, or zinc) contained in the oxide semiconductor film 403 exposed to the etching material, a halide of the metal element, an oxide of the metal element, etc. Further, the residue may also include an element contained in the resist mask. 03, a halide of the metal element, an oxide of the metal element, etc. Further, the residue may also include an element contained in the resist mask. In this embodiment, since a gas containing halogen is used in the etching process for forming the source electrode layer 405a and the drain electrode layer 405b, the resulting residue becomes a halogen (chlorine in this embodiment)-based impurity (halogen or halide). Also, when boron is used in the gas containing halogen as in this embodiment, the resulting residue includes boron or a compound containing boron. In addition, when a solution obtained by mixing phosphoric acid, acetic acid, and nitric acid is used as the etching material, phosphorus or the like is included in the residue.

[0207] Therefore, after forming the source electrode layer 405a and the drain electrode layer 405b, a step of removing the residue existing between the source electrode layer 405a and the drain electrode layer 405b on the surface of the oxide semiconductor film 403 and in the vicinity thereof is performed (see FIG. 3(E)). The residue removal step can be performed by treatment with water or an alkaline solution, or plasma treatment. For example, treatment with water or a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Also, diluted hydrofluoric In this embodiment, since a gas containing halogen is used in the etching process for forming the source electrode layer 405a and the drain electrode layer 405b, the resulting residue becomes a halogen (chlorine in this embodiment)-based impurity (halogen or halide). Also, when boron is used in the gas containing halogen as in this embodiment, the resulting residue includes boron or a compound containing boron. In addition, when a solution obtained by mixing phosphoric acid, acetic acid, and nitric acid is used as the etching material, phosphorus or the like is included in the residue. Therefore, after forming the source electrode layer 405a and the drain electrode layer 405b, a step of removing the residue existing between the source electrode layer 405a and the drain electrode layer 405b on the surface of the oxide semiconductor film 403 and in the vicinity thereof is performed (see FIG. 3(E)). The residue removal step can be performed by treatment with water or an alkaline solution, or plasma treatment. For example, treatment with water or a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Also, diluted hydrofluoric In this embodiment, since a gas containing halogen is used in the etching process for forming the source electrode layer 405a and the drain electrode layer 405b, the resulting residue becomes a halogen (chlorine in this embodiment)-based impurity (halogen or halide). Also, when boron is used in the gas containing halogen as in this embodiment, the resulting residue includes boron or a compound containing boron. In addition, when a solution obtained by mixing phosphoric acid, acetic acid, and nitric acid is used as the etching material, phosphorus or the like is included in the residue.

[0208] Therefore, after forming the source electrode layer 405a and the drain electrode layer 405b, a step of removing the residue existing between the source electrode layer 405a and the drain electrode layer 405b on the surface of the oxide semiconductor film 403 and in the vicinity thereof is performed (see FIG. 3(E)). The residue removal step can be performed by treatment with water or an alkaline solution, or plasma treatment. For example, treatment with water or a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Also, diluted hydrofluoric In addition, when a solution obtained by mixing phosphoric acid, acetic acid, and nitric acid is used as the etching material, phosphorus or the like is included in the residue. Therefore, after forming the source electrode layer 405a and the drain electrode layer 405b, a step of removing the residue existing between the source electrode layer 405a and the drain electrode layer 405b on the surface of the oxide semiconductor film 403 and in the vicinity thereof is performed (see FIG. 3(E)). The residue removal step can be performed by treatment with water or an alkaline solution, or plasma treatment. For example, treatment with water or a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Also, diluted hydrofluoric Therefore, after forming the source electrode layer 405a and the drain electrode layer 405b, a step of removing the residue existing between the source electrode layer 405a and the drain electrode layer 405b on the surface of the oxide semiconductor film 403 and in the vicinity thereof is performed (see FIG. 3(E)). The residue removal step can be performed by treatment with water or an alkaline solution, or plasma treatment. For example, treatment with water or a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Also, diluted hydrofluoric Therefore, after forming the source electrode layer 405a and the drain electrode layer 405b, a step of removing the residue existing between the source electrode layer 405a and the drain electrode layer 405b on the surface of the oxide semiconductor film 403 and in the vicinity thereof is performed (see FIG. 3(E)). The residue removal step can be performed by treatment with water or an alkaline solution, or plasma treatment. For example, treatment with water or a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Also, diluted hydrofluoric Typically argon) can be preferably used. Also, diluted hydrofluoric Treatment may be performed using an acid. The step of removing the residue is to remove the residue (mainly halogen or halide in this embodiment) adhering to the surface of the oxide semiconductor film 403 and has the effect of removing it.

[0209] Through the above steps, the transistor 420 of this embodiment is fabricated.

[0210] In this embodiment, an insulating film 407 serving as a protective insulating film is formed in contact with the oxide semiconductor film 403 on the source electrode layer 405a and the drain electrode layer 405b (see Fig. 3(F)). For example, a silicon oxynitride film formed by CVD is formed to a thickness of 400 nm. Further, heat treatment may be performed after the formation of the protective insulating film. For example, heat treatment is performed at 300 °C for 1 hour in a nitrogen atmosphere.

[0211] In addition, a planarizing insulating film may be formed to reduce surface unevenness caused by the transistor 430.

[0212] For example, an acrylic resin film with a thickness of 1500 nm may be formed as the planarizing insulating film on the protective insulating film. The acrylic resin film can be formed by baking (for example, at 250 °C for 1 hour in a nitrogen atmosphere) after coating by the coating method.

[0213] Heat treatment may be performed after the formation of the planarizing insulating film. For example, heat treatment is performed at 250 °C for 1 hour in a nitrogen atmosphere.

[0214] As described above, since it is possible to prevent the gate electrode layer 401 and the surface and vicinity of the oxide semiconductor film 403 from being contaminated by residues, a semiconductor device having a transistor 420 with a bottom gate structure and an inverse staggered type can prevent etching on the surface of the oxide semiconductor film 403. ​​​​​​​​​​Impurities caused by the etching process (typically, halogen (e.g., chlorine, fluorine), boron, phosphorus , aluminum, iron, or carbon) can have a surface density of 1×10 13 atoms / cm 2 or less (preferably or 1×10 12 atoms / cm 2 or less). Also, the surface density of impurities caused by the etching process on the surface of the gate electrode layer 401 (typically, halogen (e.g., chlorine , fluorine), boron, phosphorus, aluminum, iron, or carbon) can be 1×10 13 ato ms / cm 2 or less (preferably 1×10 12 atoms / cm 2 or less).

[0215] Note that the concentration of impurities caused by the etching process on the surface of the oxide semiconductor film 403 (typically, ha logen (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) can be 5×10 18 atoms / cm 3 or less (preferably 1×10 18 atoms / cm 3 or less ). The concentration of impurities caused by the etching process on the surface of the gate electrode layer 401 ( typically, halogen (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) can be 5×10 18 atoms / cm 3 or less (preferably 1×10 18 atom s / cm 3 or less).

[0216] Therefore, a highly reliable semiconductor device including a transistor 420 having stable electrical characteristics using the oxide semiconductor film 403 can be provided. Also, a highly reliable semiconductor device can be provided. It can be produced with high yield and the productivity can be improved.

[0217] (Embodiment 4) A semiconductor device (also referred to as a display device) having a display function can be produced using the transistor shown in any of Embodiments 1 to 3. Further, part or all of the drive circuit including the transistor can be integrally formed on the same substrate as the pixel portion to form a system-on-panel.

[0218] In FIG. 4(A), a sealing material 4005 is provided so as to surround a pixel portion 4002 provided on a first substrate 4001, and is sealed by a second substrate 4006. In FIG. 4(A), a scanning line drive circuit 4004 and a signal line drive circuit 4003 formed of a single crystal semiconductor film or a polycrystalline semiconductor film are mounted in a region different from the region surrounded by the sealing material 4005 on the first substrate 4001. Also, various signals and potentials supplied to the separately formed signal line drive circuit 4003, the scanning line drive circuit 4004, or the pixel portion 4002 are supplied from FPC (Flexible printed circuit) 4018a and FPC 4018b.

[0219] In FIGS. 4(B) and 4(C), a sealing material 4005 is provided so as to surround the pixel portion 4002 and the scanning line drive circuit 4004 provided on the first substrate 4001. Also, a second substrate 4006 is provided on the pixel portion 4002 and the scanning line drive circuit 4004. Therefore, the pixel portion 4002 and the scanning line drive circuit 4004 are sealed together with the display element by the first substrate 4001, the sealing material 4005, and the second substrate 4006. ​​​​​​​​​​​​​​In FIG. 4(B) and FIG. 4(C), the sealing material 4005 on the first substrate 4001 A single crystal semiconductor film or a polycrystalline semiconductor film is formed on a separately prepared substrate in a region different from the region surrounded by the semiconductor film. A signal line driver circuit 4003 formed of a crystalline semiconductor film is mounted on the semiconductor device. In FIG. 4(C), a signal line driver circuit 4003 and a scanning line driver circuit 400 Various signals and potentials applied to the pixel portion 4002 are supplied from an FPC 4018. There are.

[0220] In addition, in FIG. 4B and FIG. 4C, a signal line driver circuit 4003 is formed separately. In the illustrated example, the scanning line driver is mounted on a single substrate 4001, but the present invention is not limited to this configuration. Alternatively, a driving circuit may be formed separately and mounted, or a part of a signal line driving circuit or a part of a scanning line driving circuit may be mounted. Alternatively, only the portion may be formed separately and mounted.

[0221] The method of connecting the separately formed drive circuit is not particularly limited, and may be any of the following: ip On Glass) method, wire bonding method, or TAB (Tape A The C utomated Bonding method can be used. This is an example in which a signal line driver circuit 4003 and a scanning line driver circuit 4004 are implemented by the OG method. FIG. 4B shows an example in which a signal line driver circuit 4003 is mounted by the COG method, and FIG. 4003) is an example in which a signal line driver circuit 4003 is mounted by the TAB method.

[0222] The display device includes a panel in which a display element is sealed, and a controller for the panel. and modules in which ICs, etc., including the above, are mounted.

[0223] Note that the display device in this specification refers to an image display device, a display device, or a light source (including a lighting device).

[0224] In addition, modules with connectors attached, such as FPCs, TAB tapes, or TCPs, modules with printed wiring boards provided at the ends of TAB tapes or TCPs, or modules with ICs (integrated circuits) directly mounted on display elements by the COG method are all included in the display device.

[0225] In addition, the pixel portion and the scanning line driving circuit provided on the first substrate have a plurality of transistors, and the transistors shown in any of Embodiments 1 to 3 can be applied.

[0226] As the display element provided in the display device, a liquid crystal element (also referred to as a liquid crystal display element) or a light emitting element ( also referred to as a light emitting display element) can be used. The light emitting element includes elements whose luminance is controlled by current or voltage within its scope. Specifically, it includes inorganic EL (Electro Luminescence), organic EL, etc. In addition, display media such as electronic ink, whose contrast changes by an electrical action, can also be applied.

[0227] In addition, one form of the semiconductor device will be described with reference to FIGS. 4 to 6. FIG. 6 corresponds to a cross-sectional view taken along M-N of FIG. 4(B).

[0228] As shown in FIGS. 4 and 6, the semiconductor device has connection terminal electrodes 4015 and terminal electrodes 4016, and the connection terminal electrodes 4015 and terminal electrodes 4016 are electrically connected via an anisotropic conductive film 4019 to the terminals of the FPC 4018 (FPC 40 18a, 4018b). ​​​​​​​​​

[0229] The connection terminal electrode 4015 is formed of the same conductive film as the first electrode layer 4030, and the terminal electrode 4 016 is formed of the same conductive film as the gate electrode layer of the transistors 4010 and 4011. is.

[0230] Also, the pixel portion 4002 provided on the first substrate 4001 and the scanning line driving circuit 4004 have a plurality of transistors. In FIG. 6, the transistors 40 10 included in the pixel portion 4002 and the transistor 4011 included in the scanning line driving circuit 4004 are illustrated. FIG. In 6(A), an insulating film 4020 is provided on the transistors 4010 and 4011. In FIG. 6 (B), an insulating film 4021 is further provided.

[0231] As the transistors 4010 and 4011, the transistors shown in any of Embodiments 1 to 3 can be applied. In this embodiment, an example in which a transistor obtained by the same structure and manufacturing method as the transistor 440 shown in Embodiment 1 is applied is shown. In this embodiment, an example in which a transistor obtained by the same structure and manufacturing method as the transistor 440 shown in Embodiment 1 is applied is shown. The transistors 4010 and 4011, which have the same structure and manufacturing method as the transistor 440 shown in Embodiment 1, perform a step of removing residues existing between the source electrode layer and the drain electrode layer on the surface and in the vicinity of the oxide semiconductor film after forming the source electrode layer and the drain electrode layer.

[0232] The transistors 4010 and 4011, which have the same structure and manufacturing method as the transistor 440 shown in Embodiment 1, perform a step of removing residues existing between the source electrode layer and the drain electrode layer on the surface and in the vicinity of the oxide semiconductor film after forming the source electrode layer and the drain electrode layer. The step of removing residues can be performed by treatment with water or an alkaline solution, or plasma treatment. For example, treatment with water or a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Also, treatment with dilute hydrofluoric acid may be performed. For example, treatment with water or a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Also, treatment with dilute hydrofluoric acid may be performed. For example, treatment with water or a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Also, treatment with dilute hydrofluoric acid may be performed.

[0233] Also, after forming the gate electrode layer as shown in Embodiment 2, a step of removing residues due to the etching step in the vicinity and on the surface of the gate electrode layer may be performed. Also, as shown in Embodiment 3, after forming the gate electrode layer, a step of removing residues in the vicinity and on the surface of the gate electrode layer is performed, and further, after forming the source electrode layer and the drain electrode layer, a step of removing residues in the vicinity and on the surface of the oxide semiconductor film may be performed. Since contamination of the surface and vicinity of the oxide semiconductor film by residues can be prevented, the transistors 4010 and 4011 have impurities due to the etching step on the surface of the oxide semiconductor film ( Typically, the surface density of halogen (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) can be 1×10

[0234] atoms / cm or less (preferably 1×10 atoms / cm or less). Note that the concentration of impurities due to the etching step on the surface of the oxide semiconductor film (typically, halogen (e.g., chlorine, fluorine), boron, phosphorus, aluminum, 13 atoms / cm 2 iron, or carbon) can be 5×10 12 atoms / cm or less (preferably 1 2 ×10 atoms / cm or less). 18 atoms / cm 3 or less). ×10 18 atoms / cm 3 or less).

[0235] Therefore, a highly reliable semiconductor device can be provided as a semiconductor device including the transistors 4010 and 4011 having stable electrical characteristics using the oxide semiconductor film of the present embodiment shown in FIGS. 4 and 6. Also, such a highly reliable semiconductor device can be manufactured with good yield. including the transistors 4010 and 4011 having stable electrical characteristics using the oxide semiconductor film of the present embodiment shown in FIGS. 4 and 6. a highly reliable semiconductor device can be provided as a semiconductor device including the transistors 4010 and 4011 having stable electrical characteristics using the oxide semiconductor film of the present embodiment shown in FIGS. 4 and 6. Also, such a highly reliable semiconductor device can be manufactured with good yield. Thus, productivity can be improved.

[0236] Further, a conductive layer may be provided at a position overlapping with the channel formation region of the oxide semiconductor film of the transistor 4011 for the drive circuit. By providing the conductive layer at a position overlapping with the channel formation region of the oxide semiconductor film, the change amount of the threshold voltage of the transistor 4011 before and after the bias - thermal stress test (BT test) can be further reduced. Further, the potential of the conductive layer may be the same as that of the gate electrode layer of the transistor 4011 or different, and it can also function as a second gate electrode layer. In addition, the potential of the conductive layer may be GND, 0 V, or in a floating state. Further, the conductive layer has a function of shielding an external electric field, that is, preventing the external electric field from acting on the internal (circuit part including the transistor), especially an electrostatic shielding function against static electricity. Due to the shielding function of the conductive layer, it is possible to prevent the electrical characteristics of the transistor from fluctuating due to the influence of an external electric field such as static electricity. The transistor 4010 provided in the pixel portion 4002 is electrically connected to the display element to form a display panel.

[0237] The display element is not particularly limited as long as it can perform display, and various display elements can be used. FIG. 6(A) shows an example of a liquid crystal display device using a liquid crystal element as the display element. In FIG. 6(A), the liquid crystal element 4013, which is the display element, includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. Note that alignment films are provided so as to sandwich the liquid crystal layer 4008.

[0238] The transistor 4010 provided in the pixel portion 4002 is electrically connected to the display element to form a display panel. The display element is not particularly limited as long as it can perform display, and various display elements can be used. FIG. 6(A) shows an example of a liquid crystal display device using a liquid crystal element as the display element.

[0239] In FIG. 6(A), the liquid crystal element 4013, which is the display element, includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. In FIG. 6(A), the liquid crystal element 4013, which is the display element, includes a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer 4008. Note that alignment films are provided so as to sandwich the liquid crystal layer 4008. Insulating films 4032 and 4033 that can perform are provided. The second electrode layer 4031 is provided on the side of the second substrate 4006, and the first electrode layer 4030 and the second electrode layer 4031 are stacked via the liquid crystal layer 400 8.

[0240] Also, the spacer 4035 is a columnar spacer obtained by selectively etching an insulating film and is provided to control the film thickness (cell gap) of the liquid crystal layer 4008. Note that spherical spacers may be used.

[0241] When using a liquid crystal element as a display element, thermotropic liquid crystals, low-molecular liquid crystals, high-molecular liquid crystals, polymer-dispersed liquid crystals, ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. These liquid crystal materials (liquid crystal compositions) exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions.

[0242] Also, a liquid crystal composition that exhibits a blue phase without using an alignment film may be used for the liquid crystal layer 4008. In this case, the liquid crystal layer 4008, the first electrode layer 4030, and the second electrode layer 4031 have a contact structure. The blue phase is one of the liquid crystal phases and is a phase that appears immediately before the transition from the cholesteric phase to the isotropic phase when the cholesteric liquid crystal is heated. The blue phase can be expressed using a liquid crystal composition in which a liquid crystal and a chiral agent are mixed. Also, in order to widen the temperature range in which the blue phase appears, a polymerizable monomer and a polymerization initiator, etc. are added to the liquid crystal composition that exhibits the blue phase, and a treatment for polymer stabilization is performed to form the liquid crystal layer. The liquid crystal composition that exhibits the blue phase has a short response speed and is optically isotropic, so it can be arranged. No orientation process is required, and the viewing angle dependence is small. Also, since no alignment film needs to be provided, rubbing processing is also unnecessary, thus preventing electrostatic breakdown caused by rubbing processing and reducing defects and damages of the liquid crystal display device during the manufacturing process. Therefore, it is possible to improve the productivity of the liquid crystal display device. A transistor using an oxide semiconductor film may have its electrical characteristics significantly fluctuated due to the influence of static electricity and deviate from the design range There is a risk. Therefore, it is more effective to use a liquid crystal composition that exhibits a blue phase in a liquid crystal display device having a transistor using an oxide semiconductor film.

[0243] Also, the resistivity of the liquid crystal material is 1×10 9 Ω·cm or more, preferably 1×10 11 Ω·cm or more, more preferably 1×10 12 Ω·cm or more. Note that the resistivity value in this specification is the value measured at 20°C. The capacitance value of the holding capacitor provided in the liquid crystal display device is set to be able to hold charges for a predetermined period in consideration of the leakage current of the transistor arranged in the pixel portion. The capacitance value of the holding capacitor

[0244] can be set by considering the off-current of the transistor. By using the transistor having the oxide semiconductor film disclosed in this specification, a holding capacitor having a capacitance of 1 / 3 or less, preferably 1 / 5 or less, of the liquid crystal capacitance in each pixel is sufficient The capacitance value of the holding capacitor can be set by considering the off-current of the transistor. By using the transistor having the oxide semiconductor film disclosed in this specification, a holding capacitor having a capacitance of 1 / 3 or less, preferably 1 / 5 or less, of the liquid crystal capacitance in each pixel is sufficient for use. The transistor using the oxide semiconductor film disclosed in this specification can control the current value ( off-current value) in the off state to be low. Therefore, the holding time of an electrical signal such as an image signal can be

[0245] controlled. Therefore, the holding time of an electrical signal such as an image signal can be It can be lengthened, and the write interval can also be set longer in the power-on state. Therefore, the frequency of the refresh operation can be reduced, resulting in an effect of suppressing power consumption.

[0246] In addition, the transistor using the oxide semiconductor film disclosed in this specification has a relatively high field effect mobility, so high-speed driving is possible. For example, by using such a transistor capable of high-speed driving in a liquid crystal display device, the switching transistor in the pixel portion and the driver transistor used in the driving circuit portion can be formed on the same substrate. That is, there is no need to use a semiconductor device formed of a silicon wafer or the like as a separate driving circuit, so the number of components of the semiconductor device can be reduced. Also, in the pixel portion, by using a transistor capable of high-speed driving, a high-quality image can be provided.

[0247] For liquid crystal display devices, TN (Twisted Nematic) mode, IPS (In-P lane-Switching) mode, FFS (Fringe Field Swit ching) mode, ASM (Axially Symmetric aligned Micro-cell) mode, OCB (Optical Compensated B irefringence) mode, FLC (Ferroelectric Liqui d Crystal) mode, AFLC (AntiFerroelectric Liq uid Crystal) mode, etc. can be used.

[0248] In addition, a normally black type liquid crystal display device, for example, one adopting the vertical alignment (VA) mode ​​It may be a transmissive liquid crystal display device. Examples of the vertical alignment mode include, but are not limited to, for example, MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode , ASV (Advanced Super View) mode, etc. can be used . It can also be applied to VA-type liquid crystal display devices. The VA-type liquid crystal display device is a type of method for controlling the alignment of liquid crystal molecules in a liquid crystal display panel. The VA-type liquid crystal display device is a method in which liquid crystal molecules are oriented in the vertical direction with respect to the panel surface when no voltage is applied . Also, pixels can be divided into several regions (sub-pixels), and a multi-domain or multi-domain design method can be used in which the molecules are tilted in different directions .

[0249] In addition, in the display device, optical members (optical substrates) such as a black matrix (light-shielding layer), polarizing member, retardation member, and anti-reflection member are provided as appropriate. For example, circular polarization using a polarizing substrate and a retardation substrate may be used. Also, a backlight, side light, etc. may be used as the light source .

[0250] In addition, the display method in the pixel portion can use a progressive method, an interlace method, etc. . Also, when performing color display, the color elements controlled by the pixels are not limited to the three colors of RGB (R represents red, G represents green, and B represents blue). For example, RGBW (W represents white) , or one or more colors such as yellow, cyan, and magenta are added to RGB. Note that the size of the display area may be different for each dot of the color elements. However, the disclosed invention ​​It is not limited to a display device with color display, and can also be applied to a display device with monochrome display. This is also possible.

[0251] In addition, as a display element included in the display device, a light-emitting element using electroluminescence can be applied. The light-emitting element using electroluminescence is distinguished by whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former is called an organic EL element, and the latter is called an inorganic EL element. The organic EL element injects electrons and holes from a pair of electrodes into a layer containing a light-emitting organic compound by applying a voltage to the light-emitting element, and current flows. Then, when these carriers (electrons and holes) recombine, the light-emitting organic compound forms an excited state and emits light when the excited state returns to the ground state. From such a mechanism, such a light-emitting element is called a current-excited type light-emitting element. In this embodiment, an example of using an organic EL element as the light-emitting element is shown. The inorganic EL element is classified into a dispersed inorganic EL element and a thin-film inorganic EL element according to its element structure. The dispersed inorganic EL element has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the light-emitting mechanism is donor-acceptor recombination type light emission using a donor level and an acceptor level. The thin-film inorganic EL element has a structure in which a light-emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and the light-emitting mechanism is localized light emission using inner-shell electron transition of metal ions. Here, the organic EL element is used for explanation as the light-emitting element. This is also possible.

[0252] The organic EL element injects electrons and holes from a pair of electrodes into a layer containing a light-emitting organic compound by applying a voltage to the light-emitting element, and current flows. Then, when these carriers (electrons and holes) recombine, the light-emitting organic compound forms an excited state and emits light when the excited state returns to the ground state. From such a mechanism, such a light-emitting element is called a current-excited type light-emitting element. In this embodiment, an example of using an organic EL element as the light-emitting element is shown. The inorganic EL element is classified into a dispersed inorganic EL element and a thin-film inorganic EL element according to its element structure. The dispersed inorganic EL element has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the light-emitting mechanism is donor-acceptor recombination type light emission using a donor level and an acceptor level. The thin-film inorganic EL element has a structure in which a light-emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and the light-emitting mechanism is localized light emission using inner-shell electron transition of metal ions. Here, the organic EL element is used for explanation as the light-emitting element. The organic EL element injects electrons and holes from a pair of electrodes into a layer containing a light-emitting organic compound by applying a voltage to the light-emitting element, and current flows. Then, when these carriers (electrons and holes) recombine, the light-emitting organic compound forms an excited state and emits light when the excited state returns to the ground state. From such a mechanism, such a light-emitting element is called a current-excited type light-emitting element. In this embodiment, an example of using an organic EL element as the light-emitting element is shown. The inorganic EL element is classified into a dispersed inorganic EL element and a thin-film inorganic EL element according to its element structure. The dispersed inorganic EL element has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the light-emitting mechanism is donor-acceptor recombination type light emission using a donor level and an acceptor level. The thin-film inorganic EL element has a structure in which a light-emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and the light-emitting mechanism is localized light emission using inner-shell electron transition of metal ions. Here, the organic EL element is used for explanation as the light-emitting element. The organic EL element injects electrons and holes from a pair of electrodes into a layer containing a light-emitting organic compound by applying a voltage to the light-emitting element, and current flows. Then, when these carriers (electrons and holes) recombine, the light-emitting organic compound forms an excited state and emits light when the excited state returns to the ground state. From such a mechanism, such a light-emitting element is called a current-excited type light-emitting element. In this embodiment, an example of using an organic EL element as the light-emitting element is shown. The inorganic EL element is classified into a dispersed inorganic EL element and a thin-film inorganic EL element according to its element structure. The dispersed inorganic EL element has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the light-emitting mechanism is donor-acceptor recombination type light emission using a donor level and an acceptor level. The thin-film inorganic EL element has a structure in which a light-emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and the light-emitting mechanism is localized light emission using inner-shell electron transition of metal ions. Here, the organic EL element is used for explanation as the light-emitting element.

[0253] The inorganic EL element is classified into a dispersed inorganic EL element and a thin-film inorganic EL element according to its element structure. The dispersed inorganic EL element has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the light-emitting mechanism is donor-acceptor recombination type light emission using a donor level and an acceptor level. The thin-film inorganic EL element has a structure in which a light-emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and the light-emitting mechanism is localized light emission using inner-shell electron transition of metal ions. Here, the organic EL element is used for explanation as the light-emitting element. The dispersed inorganic EL element has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the light-emitting mechanism is donor-acceptor recombination type light emission using a donor level and an acceptor level. The thin-film inorganic EL element has a structure in which a light-emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and the light-emitting mechanism is localized light emission using inner-shell electron transition of metal ions. Here, the organic EL element is used for explanation as the light-emitting element. The dispersed inorganic EL element has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the light-emitting mechanism is donor-acceptor recombination type light emission using a donor level and an acceptor level. The thin-film inorganic EL element has a structure in which a light-emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and the light-emitting mechanism is localized light emission using inner-shell electron transition of metal ions. Here, the organic EL element is used for explanation as the light-emitting element. The dispersed inorganic EL element has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the light-emitting mechanism is donor-acceptor recombination type light emission using a donor level and an acceptor level. The thin-film inorganic EL element has a structure in which a light-emitting layer is sandwiched between dielectric layers and further sandwiched between electrodes, and the light-emitting mechanism is localized light emission using inner-shell electron transition of metal ions. Here, the organic EL element is used for explanation as the light-emitting element.

[0254] For the light-emitting element, at least one of the pair of electrodes may be translucent in order to extract light. Thus, a transistor and a light-emitting element are formed on a substrate, and light is extracted from the surface opposite to the substrate side such as top emission, light is extracted from the surface on the substrate side such as bottom emission, or there is a light-emitting element with a double-sided emission structure in which light is extracted from the surface on the substrate side and the surface opposite to the substrate, and a light-emitting element with any emission structure can be applied.

[0255] Examples of light-emitting devices using a light-emitting element as the display element are shown in FIGS. 5(A), 5(B), and 6(B).

[0256] FIG. 5(A) is a plan view of the light-emitting device, and the cross-sections cut along the dashed-dotted lines V1-W1, V2-W2, and V3-W3 in FIG. 5(A) correspond to FIG. 5(B). In the plan view of FIG. 5(A), the electroluminescent layer 542 and the second electrode layer 543 are omitted and not shown.

[0257] The light-emitting device shown in FIG. 5 has a transistor 510, a capacitor element 520, and a wiring layer intersection 530 on a substrate 500, and the transistor 510 is electrically connected to the light-emitting element 540. Note that FIG. 5 is a bottom emission type light-emitting device that extracts light from the light-emitting element 540 through the substrate 500.

[0258] As the transistor 510, the transistors shown in any of Embodiments 1 to 3 can be applied. In this embodiment, an example of applying a transistor obtained by the same structure and manufacturing method as the transistor 440 shown in Embodiment 1 is shown.

[0259] The transistor 510 includes gate electrode layers 511a and 511b, a gate insulating film 502, and an oxide semiconductor A conductive layer 512, and conductive layers 513a and 513b that function as a source electrode layer or a drain electrode layer are included. b is included.

[0260] A transistor 510 obtained by the same structure and manufacturing method as the transistor 440 shown in Embodiment 1 has, after forming the conductive layers 513a and 513b that function as a source electrode layer and a drain electrode layer, a step of removing residues existing between the surface of the oxide semiconductor film 512 and the conductive layers 513a and 513b that function as a source electrode layer and a drain electrode layer in the vicinity thereof is performed. The residue removal step can be performed by treatment with water or an alkaline solution, or plasma treatment. For example, treatment with water or a TMAH solution, or plasma treatment using oxygen, dinitrogen monoxide, or a rare gas (typically argon) can be preferably used. Further, treatment with dilute hydrofluoric acid may be performed.

[0261] Also, as shown in Embodiment 2, after forming the gate electrode layers 511a and 511b, a step of removing residues caused by the etching step on the surfaces and in the vicinity of the gate electrode layers 511a and 511b may be performed. Further, as shown in Embodiment 3, after forming the gate electrode layers 511a and 511b, a step of removing residues on the surfaces and in the vicinity of the gate electrode layers 511a and 511b is performed, and further, after forming the conductive layers 513a and 513b, a step of removing residues on the surface of the oxide semiconductor film 512 and in the vicinity thereof

[0262] may be performed.

[0262] Since contamination of the surface of the oxide semiconductor film 512 and the vicinity thereof by residues can be prevented, the transistor 510 has impurities caused by the etching step on the surface of the oxide semiconductor film 512 Examples include halogen (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or the areal density of carbon) is 1×10 13 atoms / cm 2 or less (preferably 1×10 12 ato ms / cm 2 or less). Note that impurities resulting from the etching process on the surface of the oxide semiconductor film 512 (typically, halogen (e.g., chlorine, fluorine), boron, phosphorus , aluminum, iron, or carbon) can have a concentration of 5×10 atoms / cm 18 or less (preferably 3 1×10 atoms / cm 18 or less). 3

[0263] Therefore, a highly reliable semiconductor device can be provided as a semiconductor device including the transistor 510 having stable electrical characteristics using the oxide semiconductor film 512 of the present embodiment shown in FIG. 5. Also, such a highly reliable semiconductor device can be manufactured with high yield, improving productivity.

[0264] The capacitive element 520 includes conductive layers 521a, 521b, a gate insulating film 502, an oxide semiconductor film 5 22, and a conductive layer 523. A capacitance is formed by sandwiching the gate insulating film 502 and the oxide semiconductor film 522 between the conductive layers 521a, 521b and the conductive layer 523.

[0265] The wiring layer intersection 530 is at the intersection of the gate electrode layers 511a, 511b and the conductive layer 533. The gate electrode layers 511a, 511b and the conductive layer 533 intersect with each other with the gate insulating film 502 therebetween.

[0266] In this embodiment, a titanium film with a thickness of 30 nm is used as the gate electrode layer 511a and the conductive layer 521a, and a copper thin film with a thickness of 200 nm is used as the gate electrode layer 511b and the conductive layer 521b. Therefore, the gate electrode layer has a laminated structure of a titanium film and a copper thin film. An IGZO film with a thickness of 25 nm is used as the oxide semiconductor films 512 and 522. An interlayer insulating film 504 is formed over the transistor 510, the capacitor element 520, and the wiring layer intersection 530, and a color filter layer 505 is provided in a region overlapping with the light-emitting element 540 over the interlayer insulating film 504. An insulating film 506 that functions as a planarizing insulating film is provided over the interlayer insulating film 504 and the color filter layer 505.

[0267] An IGZO film with a thickness of 25 nm is used as the oxide semiconductor films 512 and 522.

[0268] An interlayer insulating film 504 is formed over the transistor 510, the capacitor element 520, and the wiring layer intersection 530, and a color filter layer 505 is provided in a region overlapping with the light-emitting element 540 over the interlayer insulating film 504. An insulating film 506 that functions as a planarizing insulating film is provided over the interlayer insulating film 504 and the color filter layer 505. An interlayer insulating film 504 is formed over the transistor 510, the capacitor element 520, and the wiring layer intersection 530, and a color filter layer 505 is provided in a region overlapping with the light-emitting element 540 over the interlayer insulating film 504. An insulating film 506 that functions as a planarizing insulating film is provided over the interlayer insulating film 504 and the color filter layer 505. An interlayer insulating film 504 is formed over the transistor 510, the capacitor element 520, and the wiring layer intersection 530, and a color filter layer 505 is provided in a region overlapping with the light-emitting element 540 over the interlayer insulating film 504. An insulating film 506 that functions as a planarizing insulating film is provided over the interlayer insulating film 504 and the color filter layer 505. An interlayer insulating film 504 is formed over the transistor 510, the capacitor element 520, and the wiring layer intersection 530, and a color filter layer 505 is provided in a region overlapping with the light-emitting element 540 over the interlayer insulating film 504. An insulating film 506 that functions as a planarizing insulating film is provided over the interlayer insulating film 504 and the color filter layer 505.

[0269] A light-emitting element 540 including a laminated structure in which a first electrode layer 541, a light-emitting layer 542, and a second electrode layer 543 are laminated in this order is provided over the insulating film 506. The light-emitting element 540 and the transistor 510 are electrically connected by contacting the first electrode layer 541 and the conductive layer 513a at an opening formed in the insulating film 506 and the interlayer insulating film 504 that reaches the conductive layer 513a. Note that a partition wall 507 is provided so as to cover a part of the first electrode layer 541 and the opening. A light-emitting element 540 including a laminated structure in which a first electrode layer 541, a light-emitting layer 542, and a second electrode layer 543 are laminated in this order is provided over the insulating film 506. The light-emitting element 540 and the transistor 510 are electrically connected by contacting the first electrode layer 541 and the conductive layer 513a at an opening formed in the insulating film 506 and the interlayer insulating film 504 that reaches the conductive layer 513a. Note that a partition wall 507 is provided so as to cover a part of the first electrode layer 541 and the opening. A light-emitting element 540 including a laminated structure in which a first electrode layer 541, a light-emitting layer 542, and a second electrode layer 543 are laminated in this order is provided over the insulating film 506. The light-emitting element 540 and the transistor 510 are electrically connected by contacting the first electrode layer 541 and the conductive layer 513a at an opening formed in the insulating film 506 and the interlayer insulating film 504 that reaches the conductive layer 513a. Note that a partition wall 507 is provided so as to cover a part of the first electrode layer 541 and the opening. A light-emitting element 540 including a laminated structure in which a first electrode layer 541, a light-emitting layer 542, and a second electrode layer 543 are laminated in this order is provided over the insulating film 506. The light-emitting element 540 and the transistor 510 are electrically connected by contacting the first electrode layer 541 and the conductive layer 513a at an opening formed in the insulating film 506 and the interlayer insulating film 504 that reaches the conductive layer 513a. Note that a partition wall 507 is provided so as to cover a part of the first electrode layer 541 and the opening. A light-emitting element 540 including a laminated structure in which a first electrode layer 541, a light-emitting layer 542, and a second electrode layer 543 are laminated in this order is provided over the insulating film 506. The light-emitting element 540 and the transistor 510 are electrically connected by contacting the first electrode layer 541 and the conductive layer 513a at an opening formed in the insulating film 506 and the interlayer insulating film 504 that reaches the conductive layer 513a. Note that a partition wall 507 is provided so as to cover a part of the first electrode layer 541 and the opening. A light-emitting element 540 including a laminated structure in which a first electrode layer 541, a light-emitting layer 542, and a second electrode layer 543 are laminated in this order is provided over the insulating film 506. The light-emitting element 540 and the transistor 510 are electrically connected by contacting the first electrode layer 541 and the conductive layer 513a at an opening formed in the insulating film 506 and the interlayer insulating film 504 that reaches the conductive layer 513a. Note that a partition wall 507 is provided so as to cover a part of the first electrode layer 541 and the opening.

[0270] As the interlayer insulating film 504, a silicon oxynitride film with a thickness of 200 nm or more and 600 nm or less formed by plasma CVD method can be used. As the insulating film 506, a photosensitive acrylic film with a thickness of 1500 nm can be used, and as the partition wall 507, a photosensitive polyimide film with a thickness of 1500 nm can be used. As the interlayer insulating film 504, a silicon oxynitride film with a thickness of 200 nm or more and 600 nm or less formed by plasma CVD method can be used. As the insulating film 506, a photosensitive acrylic film with a thickness of 1500 nm can be used, and as the partition wall 507, a photosensitive polyimide film with a thickness of 1500 nm can be used. As the interlayer insulating film 504, a silicon oxynitride film with a thickness of 200 nm or more and 600 nm or less formed by plasma CVD method can be used. As the insulating film 506, a photosensitive acrylic film with a thickness of 1500 nm can be used, and as the partition wall 507, a photosensitive polyimide film with a thickness of 1500 nm can be used. As the interlayer insulating film 504, a silicon oxynitride film with a thickness of 200 nm or more and 600 nm or less formed by plasma CVD method can be used. As the insulating film 506, a photosensitive acrylic film with a thickness of 1500 nm can be used, and as the partition wall 507, a photosensitive polyimide film with a thickness of 1500 nm can be used.

[0271] As the color filter layer 505, for example, a colored light-transmitting resin can be used. As the colored light-transmitting resin, photosensitive and non-photosensitive organic resins can be used. However, using a photosensitive organic resin layer can reduce the number of resist masks, so the process is simplified and preferable.

[0272] Colored refers to colors excluding achromatic colors such as black, gray, and white. The color filter layer is formed of a material that transmits only the colored light that has been colored. As the colored light, red, green, blue, etc. can be used. Also, cyan, magenta, yellow, etc. may be used. Transmitting only the colored light that has been colored means that the transmitted light in the color filter layer has a peak at the wavelength of the colored light. The color filter layer may appropriately control the optimum film thickness in consideration of the relationship between the concentration of the coloring material to be included and the light transmittance. For example, the film thickness of the color filter layer 505 may be 1500 nm or more and 2000 nm or less. In the light-emitting device shown in FIG. 6(B), the light-emitting element 4513, which is a display element, is electrically connected to the transistor 4010 provided in the pixel portion 4002. Note that the configuration of the light-emitting element 4513 is a stacked structure of a first electrode layer 4030, an electroluminescent layer 4511, and a second electrode layer 4031, but is not limited to the shown configuration. The configuration of the light-emitting element 4513 can be appropriately changed according to the direction of the light extracted from the light-emitting element 4513, etc. The partition walls 4510 and 507 are formed using an organic insulating material or an inorganic insulating material. In particular, using a photosensitive resin material, openings are formed on the first electrode layers 4030 and 541, and the openings of the The color filter layer is formed of a material that transmits only the colored light that has been colored. As the colored light, red, green, blue, etc. can be used. Also, cyan, magenta, yellow, etc. may be used. Transmitting only the colored light that has been colored means that the transmitted light in the color filter layer has a peak at the wavelength of the colored light. The color filter layer may appropriately control the optimum film thickness in consideration of the relationship between the concentration of the coloring material to be included and the light transmittance. For example, the film thickness of the color filter layer 505 may be 1500 nm or more and 2000 nm or less. The color filter layer is formed of a material that transmits only the colored light that has been colored. As the colored light, red, green, blue, etc. can be used. Also, cyan, magenta, yellow, etc. may be used. Transmitting only the colored light that has been colored means that the transmitted light in the color filter layer has a peak at the wavelength of the colored light. The color filter layer may appropriately control the optimum film thickness in consideration of the relationship between the concentration of the coloring material to be included and the light transmittance. For example, the film thickness of the color filter layer 505 may be 1500 nm or more and 2000 nm or less. The color filter layer is formed of a material that transmits only the colored light that has been colored. As the colored light, red, green, blue, etc. can be used. Also, cyan, magenta, yellow, etc. may be used. Transmitting only the colored light that has been colored means that the transmitted light in the color filter layer has a peak at the wavelength of the colored light. The color filter layer may appropriately control the optimum film thickness in consideration of the relationship between the concentration of the coloring material to be included and the light transmittance. For example, the film thickness of the color filter layer 505 may be 1500 nm or more and 2000 nm or less.

[0273] In the light-emitting device shown in FIG. 6(B), the light-emitting element 4513, which is a display element, is electrically connected to the transistor 4010 provided in the pixel portion 4002. Note that the configuration of the light-emitting element 4513 is a stacked structure of a first electrode layer 4030, an electroluminescent layer 4511, and a second electrode layer 4031, but is not limited to the shown configuration. The configuration of the light-emitting element 4513 can be appropriately changed according to the direction of the light extracted from the light-emitting element 4513, etc. The light-emitting element 4513 is electrically connected to the transistor 4010 provided in the pixel portion 4002. Note that the configuration of the light-emitting element 4513 is a stacked structure of a first electrode layer 4030, an electroluminescent layer 4511, and a second electrode layer 4031, but is not limited to the shown configuration. The configuration of the light-emitting element 4513 can be appropriately changed according to the direction of the light extracted from the light-emitting element 4513, etc. The configuration of the light-emitting element 4513 is a stacked structure of a first electrode layer 4030, an electroluminescent layer 4511, and a second electrode layer 4031, but is not limited to the shown configuration. The configuration of the light-emitting element 4513 can be appropriately changed according to the direction of the light extracted from the light-emitting element 4513, etc. In the light-emitting device shown in FIG. 6(B), the light-emitting element 4513, which is a display element, is electrically connected to the transistor 4010 provided in the pixel portion 4002. Note that the configuration of the light-emitting element 4513 is a stacked structure of a first electrode layer 4030, an electroluminescent layer 4511, and a second electrode layer 4031, but is not limited to the shown configuration. The configuration of the light-emitting element 4513 can be appropriately changed according to the direction of the light extracted from the light-emitting element 4513, etc. The configuration of the light-emitting element 4513 can be appropriately changed according to the direction of the light extracted from the light-emitting element 4513, etc.

[0274] The partition walls 4510 and 507 are formed using an organic insulating material or an inorganic insulating material. In particular, using a photosensitive resin material, openings are formed on the first electrode layers 4030 and 541, and the openings of the It is preferable to form the side wall into an inclined surface formed with a continuous curvature.

[0275] The electroluminescent layers 4511 and 542 may be composed of a single layer or may be composed of a plurality of layers laminated together. Either way is acceptable.

[0276] To prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light-emitting elements 4513 and 540, a protective film may be formed on the second electrode layers 4031 and 543 and the partition walls 4510 and 507. As the protective film, a silicon nitride film, a silicon oxynitride film, a DLC film, etc. can be formed.

[0277] Also, to prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light-emitting elements 4513 and 540, a layer containing an organic compound covering the light-emitting elements 4513 and 540 may be formed by vapor deposition.

[0278] Also, a filling material 4514 is provided and sealed in the space sealed by the first substrate 4001, the second substrate 4006, and the sealing material 4005. It is preferable to perform packaging (encapsulation) with a highly airtight and low outgassing protective film (laminating film, ultraviolet curable resin film, etc.) or cover material so as not to be exposed to the outside air.

[0279] As the filling material 4514, in addition to inert gases such as nitrogen and argon, an ultraviolet curable resin or a thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic, polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate) can be used. For example, nitrogen can be used as the filling material.

[0280] Further, if necessary, a polarizing plate, or a circular polarizing plate (including an elliptical polarizing plate), a retardation plate (λ / 4 plate, λ / 2 plate), an optical film such as a color filter, etc. may be appropriately provided. Further, an antireflection film may be provided on the polarizing plate or the circular polarizing plate. For example, antiglare treatment can be performed to diffuse the reflected light due to the surface unevenness and reduce the reflection.

[0281] In addition, it is also possible to provide an electronic paper that drives electronic ink as a display device. Electronic paper is also called an electrophoretic display device (electrophoretic display), and has the advantages of being as easy to read as paper, having lower power consumption compared to other display devices, and being able to have a thin and light shape.

[0282] Although various forms of electrophoretic display devices can be considered, they are those in which microcapsules containing a first particle having a positive charge and a second particle having a negative charge are dispersed in a solvent or a solute, and by applying an electric field to the microcapsules, the particles in the microcapsules are moved in opposite directions to each other and only the color of the particles aggregated on one side is displayed. Note that the first particle or the second particle contains a dye and does not move when there is no electric field. Also, the color of the first particle and the color of the second particle are different (including colorless).

[0283] Thus, the electrophoretic display device is a display that utilizes the so-called dielectrophoretic effect in which a substance with a high dielectric constant moves to a high electric field region.

[0284] What is obtained by dispersing the above microcapsules in a solvent is called electronic ink, and The electronic ink can be printed on the surfaces such as glass, plastic, cloth, paper, etc. Also , color display is also possible by using color filters and particles having dyes.

[0285] Note that the first particles and the second particles in the microcapsules are made of a conductor material, an insulator material, a semiconductor material, a magnetic material, a liquid crystal material, a ferroelectric material, an electroluminescent material, an electr ochromic material, a magnetophoretic material, a material selected from these, or a composite material thereof can be used. That's all.

[0286] Also, as an electronic paper, a display device using a twist ball display method can also be applied. The twist ball display method is a method of disposing spherical particles painted white and black between a first electrode layer and a second electrode layer which are electrode layers used in a display element, and generating a potential difference between the first electrode layer and the second electrode layer to control the orientation of the spherical particles, thereby performing display. That's it. There is.

[0287] Note that in FIGS. 4 to 6, as the first substrates 4001, 500 and the second substrate 4006, in addition to a glass substrate, a flexible substrate can also be used. For example, a translucent plastic substrate can be used. As the plastic, an FRP (Fiber glass-Reinforced Plastics) plate, a PVF (polyvinyl fluoride ride) film, a polyester film or an acrylic resin film can be used. Also, if translucency is not required, a metal substrate (metal film) such as aluminum or stainless steel can be used. For example, a sheet having a structure in which an aluminum foil is sandwiched between a PVF film and a polyester film can also be used. That's all.

[0288] In this embodiment, an aluminum oxide film is used as the insulating film 4020. The insulating film 4020 can be formed by a sputtering method or a plasma CVD method.

[0289] The aluminum oxide film provided as the insulating film 4020 on the oxide semiconductor film has a high blocking effect of not allowing the film to permeate impurities such as hydrogen and moisture and oxygen. Yes.

[0290] Therefore, the aluminum oxide film functions as a protective film that prevents the incorporation of impurities such as hydrogen and moisture, which are factors of variation, into the oxide semiconductor film during and after the manufacturing process, and the release of oxygen, which is the main component material constituting the oxide semiconductor, from the oxide semiconductor film. Moisture, etc., into the oxide semiconductor film, and the release of oxygen, which is the main component material constituting the oxide semiconductor, from the oxide semiconductor film. It functions as a protective film that prevents the incorporation of impurities such as hydrogen and moisture, which are factors of variation, into the oxide semiconductor film during and after the manufacturing process, and the release of oxygen, which is the main component material constituting the oxide semiconductor, from the oxide semiconductor film.

[0291] In addition, the insulating films 4021 and 506 that function as planarizing insulating films can use heat-resistant organic materials such as acrylic resin, polyimide resin, benzocyclobutene-based resin, polyamide resin, and epoxy. In addition to the above organic materials, low dielectric constant materials (low-k materials), siloxane-based resins, PSG (phosphosilicate glass), BPSG (borophosphosilicate glass), etc. can be used. Note that an insulating film may be formed by laminating a plurality of insulating films formed of these materials. Yes.

[0292] The method for forming the insulating films 4021 and 506 is not particularly limited, and depending on the material, sputtering method, SOG method, spin coating, dipping, spray coating, droplet discharge method (inkjet method, etc.), printing method (screen printing, offset printing, etc.), doctor knife, roll coater , curtain coater, knife coater, etc. can be used.

[0293] A display device transmits light from a light source or a display element to display an image. All thin films such as the substrate, insulating film, and conductive film installed in the part are designed to be transparent to light in the visible light wavelength range. It shall be translucent.

[0294] A first electrode layer and a second electrode layer (a pixel electrode layer, a common electrode layer, a pair of electrodes) for applying a voltage to the display element In the case of the electrode layer, the direction of the light to be extracted, the location of the electrode layer, and The light transmitting property or the light reflecting property can be selected depending on the pattern structure of the electrode layer.

[0295] The first electrode layer 4030, 541 and the second electrode layer 4031, 543 are made of tungsten oxide. Indium oxide containing tungsten oxide, indium zinc oxide containing titanium oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide (hereinafter (denoted as ITO), indium zinc oxide, and indium tin oxide doped with silicon oxide. A light-transmitting conductive material such as graphene can be used.

[0296] The first electrode layers 4030 and 541 and the second electrode layers 4031 and 543 are made of tungsten ( W), Molybdenum (Mo), Zirconium (Zr), Hafnium (Hf), Vanadium ( V), Niobium (Nb), Tantalum (Ta), Chromium (Cr), Cobalt (Co), Nickel Ni, titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), silver ( Using one or more of the following metals: Ag, their alloys, or their metal nitrides. It can be formed.

[0297] In this embodiment, since the light emitting device shown in FIG. 5 is a bottom emission type, the first electrode layer 541 The first electrode layer 541 has translucency, and the second electrode layer 543 has reflectivity. Therefore, when a metal film is used for the first electrode layer 541, the film thickness is made thin enough to maintain translucency, and when a conductive film having translucency is used for the second electrode layer 543, a conductive film having reflectivity may be laminated. When using a metal film for the first electrode layer 541, the film thickness is made thin enough to maintain translucency, and when using a conductive film having translucency for the second electrode layer 543, a conductive film having reflectivity may be laminated. When using a metal film for the first electrode layer 541, the film thickness is made thin enough to maintain translucency, and when using a conductive film having translucency for the second electrode layer 543, a conductive film having reflectivity may be laminated.

[0298] In addition, as the first electrode layers 4030 and 541 and the second electrode layers 4031 and 543, they can be formed using a conductive composition containing a highly conductive molecule (also referred to as a conductive polymer). As the conductive polymer, so-called π-electron conjugated conductive polymers can be used. For example, In addition, as the first electrode layers 4030 and 541 and the second electrode layers 4031 and 543, they can be formed using a conductive composition containing a highly conductive molecule (also referred to as a conductive polymer). As the conductive polymer, so-called π-electron conjugated conductive polymers can be used. For example, In addition, as the first electrode layers 4030 and 541 and the second electrode layers 4031 and 543, they can be formed using a conductive composition containing a highly conductive molecule (also referred to as a conductive polymer). As the conductive polymer, so-called π-electron conjugated conductive polymers can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives, or copolymers composed of two or more of aniline, pyrrole, and thiophene or their derivatives, etc. can be mentioned.

[0299] In addition, since transistors are easily damaged by static electricity or the like, it is preferable to provide a protection circuit for protecting the drive circuit. The protection circuit is preferably configured using a non-linear element. In addition, since transistors are easily damaged by static electricity or the like, it is preferable to provide a protection circuit for protecting the drive circuit. The protection circuit is preferably configured using a non-linear element.

[0300] By applying the transistor shown in any of Embodiments 1 to 3 as described above, a semiconductor device having various functions can be provided. By applying the transistor shown in any of Embodiments 1 to 3 as described above, a semiconductor device having various functions can be provided.

[0301] The configurations, methods, etc. shown in this embodiment can be used in appropriate combination with the configurations, methods, etc. shown in other embodiments. The configurations, methods, etc. shown in this embodiment can be used in appropriate combination with the configurations, methods, etc. shown in other embodiments.

[0302] (Embodiment 5) Using the transistor shown in any of Embodiments 1 to 3, a semiconductor device having an image sensor function for reading information on an object can be manufactured. Using the transistor shown in any of Embodiments 1 to 3, a semiconductor device having an image sensor function for reading information on an object can be manufactured.

[0303] FIG. 7(A) shows an example of a semiconductor device having an image sensor function. FIG. 7(A) is an equivalent circuit of a photo sensor, and FIG. 7(B) is a cross-sectional view showing a part of the photo sensor. One electrode of the photodiode 602 is electrically connected to the photodiode reset signal line 658, and the other electrode is electrically connected to the gate of the transistor 640. One of the source or drain of the transistor 640 is electrically connected to the photo sensor reference signal line 672, and the other of the source or drain is electrically connected to one of the source or drain of the transistor 656. The gate of the transistor 656 is electrically connected to the gate signal line 659, and the other of the source or drain is electrically connected to the photo sensor output signal line 671.

[0304] One electrode of the photodiode 602 is electrically connected to the photodiode reset signal line 658, and the other electrode is electrically connected to the gate of the transistor 640. The transistor 640 has one of its source or drain electrically connected to the photo sensor reference signal line 672, and the other of the source or drain is electrically connected to one of the source or drain of the transistor 656. The gate of the transistor 656 is electrically connected to the gate signal line 659, and the other of the source or drain is electrically connected to the photo sensor output signal line 671.

[0305] Note that in the circuit diagrams in this specification, as can be clearly determined, the symbol of a transistor using an oxide semiconductor film is described as "OS". In FIG. 7(A), the transistors 640 and 656 can be any of the transistors shown in Embodiments 1 to 3, and are transistors using an oxide semiconductor film. In this embodiment, an example of applying a transistor having the same structure and manufacturing method as the transistor 440 shown in Embodiment 1 is shown. Note that in the circuit diagrams in this specification, as can be clearly determined, the symbol of a transistor using an oxide semiconductor film is described as "OS". In FIG. 7(A), the transistors 640 and 656 can be any of the transistors shown in Embodiments 1 to 3, and are transistors using an oxide semiconductor film. In this embodiment, an example of applying a transistor having the same structure and manufacturing method as the transistor 440 shown in Embodiment 1 is shown. In FIG. 7(A), the transistors 640 and 656 can be any of the transistors shown in Embodiments 1 to 3, and are transistors using an oxide semiconductor film. In this embodiment, an example of applying a transistor having the same structure and manufacturing method as the transistor 440 shown in Embodiment 1 is shown. In FIG. 7(A), the transistors 640 and 656 can be any of the transistors shown in Embodiments 1 to 3, and are transistors using an oxide semiconductor film. In this embodiment, an example of applying a transistor having the same structure and manufacturing method as the transistor 440 shown in Embodiment 1 is shown. In this embodiment, an example of applying a transistor having the same structure and manufacturing method as the transistor 440 shown in Embodiment 1 is shown. In this embodiment, an example of applying a transistor having the same structure and manufacturing method as the transistor 440 shown in Embodiment 1 is shown.

[0306] FIG. 7(B) is a cross-sectional view showing the photodiode 602 and the transistor 640 in the photo sensor. On a substrate 601 (TFT substrate) having an insulating surface, a photodiode 602 and a transistor 640 that function as sensors are provided. A substrate 613 is provided on the photodiode 602 and the transistor 640 using an adhesive layer 608. FIG. 7(B) is a cross-sectional view showing the photodiode 602 and the transistor 640 in the photo sensor. On a substrate 601 (TFT substrate) having an insulating surface, a photodiode 602 and a transistor 640 that function as sensors are provided. A substrate 613 is provided on the photodiode 602 and the transistor 640 using an adhesive layer 608. On a substrate 601 (TFT substrate) having an insulating surface, a photodiode 602 and a transistor 640 that function as sensors are provided. A substrate 613 is provided on the photodiode 602 and the transistor 640 using an adhesive layer 608. On the photodiode 602 and the transistor 640, a substrate 613 is provided using an adhesive layer 608. do.

[0307] An insulating film 631, an interlayer insulating film 633, and an interlayer insulating film 634 are provided on the transistor 640. The photodiode 602 is provided on the interlayer insulating film 633. Electrode layers 641a and 641b formed on the interlayer insulating film 634 and an electrode layer 6 42, a first semiconductor film 606a and a second semiconductor film 606 are formed between the first semiconductor film 606a and the second semiconductor film 606b in this order from the interlayer insulating film 633 side. b, and a third semiconductor film 606c.

[0308] The electrode layer 641b is electrically connected to the conductive layer 643 formed on the interlayer insulating film 634. The layer 642 is electrically connected to the conductive layer 645 via the electrode layer 641a. is electrically connected to the gate electrode layer of the transistor 640, and 2 is electrically connected to transistor 640.

[0309] Here, the first semiconductor film 606a is a semiconductor film having a p-type conductivity, and the second semiconductor film 606b is a high resistance semiconductor film (i-type semiconductor film), and the third semiconductor film 606c is an n-type A pin-type photodiode in which semiconductor films having different conductivity types are stacked is shown as an example.

[0310] The first semiconductor film 606a is a p-type semiconductor film, and is an amorphous silicon film containing an impurity element that imparts p-type. The first semiconductor film 606a can be formed of a silicon film. Using semiconductor material gas containing elements (e.g. boron (B)), the material is formed by plasma CVD. Silane (SiH4) can be used as the semiconductor material gas. 6, SiH2Cl2, SiHCl3, SiCl4, SiF4, etc. may also be used. After forming an amorphous silicon film that does not contain pure elements, the film is then etched by using a diffusion method or ion implantation method. An impurity element may be introduced into the amorphous silicon film by ion implantation or the like. After the impurity elements are introduced, they are heated to diffuse them. The method for forming the composite film includes LPCVD, vapor phase growth, sputtering, etc. The first semiconductor film 606a is formed to have a thickness of 10 nm to 50 nm. It is preferable to do so.

[0311] The second semiconductor film 606b is an i-type semiconductor film (intrinsic semiconductor film) and is made of an amorphous silicon film. The second semiconductor film 606b is formed by using a semiconductor material gas to form an amorphous silicon film. The silicon film is formed by plasma CVD. The semiconductor material gas is silane (SiH4). Alternatively, Si2H6, SiH2Cl2, SiHCl3, SiCl4, S The second semiconductor film 606b may be formed by LPCVD, vapor phase growth, or the like. The second semiconductor film 606b may be formed by sputtering or the like. It is preferable to form it so that the thickness is 1000 nm or less.

[0312] The third semiconductor film 606c is an n-type semiconductor film and is an amorphous film containing an impurity element that imparts n-type conductivity. The third semiconductor film 606c is formed of a silicon film. The semiconductor is formed by the plasma CVD method using a semiconductor material gas containing, for example, phosphorus (P). Silane (SiH4) may be used as the conductive material gas. Alternatively, Si2H6, SiH 2Cl2, SiHCl3, SiCl4, SiF4, etc. may also be used. After forming an amorphous silicon film that does not contain impurities, impurity elements may be introduced into the amorphous silicon film by a diffusion method or an ion implantation method. After introducing impurity elements by an ion implantation method or the like, heating or the like may be performed to diffuse the impurity elements. In this case, as a method for forming the amorphous silicon film, the LPCVD method, the vapor growth method, the sputtering method, or the like may be used. The film thickness of the third semiconductor film 606c is preferably formed to be 20 nm or more and 200 nm or less.

[0313] In addition, the first semiconductor film 606a, the second semiconductor film 606b, and the third semiconductor film 606c may be formed using a polycrystalline semiconductor instead of an amorphous semiconductor, or may be formed using a microcrystalline (Semi Amorphous Semiconductor: SAS) semiconductor.

[0314] In addition, since the mobility of holes generated by the photoelectric effect is smaller than that of electrons, a pin-type photodiode exhibits better characteristics when the p-type semiconductor film side is used as the light receiving surface. Here, an example is shown in which light received by the photodiode 602 from the surface of the substrate 601 on which the pin-type photodiode is formed is converted into an electrical signal. Further, since light from the semiconductor film side having a conductivity type opposite to that of the semiconductor film side used as the light receiving surface becomes disturbance light, the electrode layer is preferably made of a conductive film having light shielding properties. Further, the n-type semiconductor film side can also be used as the light receiving surface.

[0315] As the insulating film 631, the interlayer insulating film 633, and the interlayer insulating film 634, an insulating material is used, and depending on the material, the sputtering method, the plasma CVD method, the SOG method, spin coating, or the like is used. ​​It can be formed using spin coating, spray coating, droplet ejection methods (such as inkjet methods), printing methods (such as screen printing, offset printing, etc.).

[0316] As the insulating film 631, as the inorganic insulating material, oxide insulating films such as a silicon oxide layer, a silicon oxynitride layer, an aluminum oxide layer, or an aluminum oxynitride layer, a silicon nitride layer a silicon oxynitride layer, an aluminum nitride layer, or an aluminum oxynitride layer, etc., a single layer or a laminate of nitride insulating films can be used.

[0317] In this embodiment, an aluminum oxide film is used as the insulating film 631. The insulating film 631 can be formed by a sputtering method or a plasma CVD method.

[0318] The aluminum oxide film provided as the insulating film 631 on the oxide semiconductor film has a high blocking effect of not allowing the film to permeate hydrogen, moisture, any impurities, and both oxygen.

[0319] Therefore, the aluminum oxide film functions as a protective film to prevent the mixing of impurities such as hydrogen and moisture, which are factors of variation, into the oxide semiconductor film during and after the manufacturing process, and the release of oxygen, which is the main component material constituting the oxide semiconductor, from the oxide semiconductor film.

[0320] As the interlayer insulating films 633 and 634, an insulating film that functions as a planarizing insulating film to reduce surface irregularities is preferable. As the interlayer insulating films 633 and 634, for example, organic insulating materials having heat resistance such as polyimide, acrylic resin, benzocyclobutene-based resin, polyamide, and epoxy resin can be used. In addition to the above organic insulating materials, low dielectric constant materials (low- dielectric materials) can also be used. ​​​​​​​​​k material), siloxane resin, PSG (phosphosilicate glass), BPSG (phosphorus boron A single layer or a laminate such as silicate glass) can be used.

[0321] By detecting the light incident on the photodiode 602, the information of the object to be detected can be read out. Note that a light source such as a backlight can be used when reading the information of the object to be detected. It is possible.

[0322] The transistor 640 obtained by the same structure and manufacturing method as the transistor 440 shown in Embodiment 1 After forming the source electrode layer and the drain electrode layer, a step of removing the residues existing between the source electrode layer and the drain electrode layer on the surface of the oxide semiconductor film and in the vicinity thereof is performed. The residue removing step can be performed by treatment with water or an alkaline solution, or by plasma treatment. For example, treatment with water or a TMAH solution, or plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon) can be preferably used. Treatment with dilute hydrofluoric acid may also be performed.

[0323] Further, as shown in Embodiment 2, after forming the gate electrode layer, a step of removing the residues caused by the etching step on the surface of the gate electrode layer and in the vicinity thereof may be performed. Also, as shown in Embodiment 3, after forming the gate electrode layer, a step of removing the residues on the surface of the gate electrode layer and in the vicinity thereof is performed, and further, after forming the source electrode layer and the drain electrode layer, a step of removing the residues on the surface of the oxide semiconductor film and in the vicinity thereof may be performed.

[0324] Since it is possible to prevent the surface of the oxide semiconductor film and the vicinity thereof from being contaminated by residues, the transistor The stage 640 can reduce the surface density of impurities (typically, halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) caused by the etching process on the surface of the oxide semiconductor film 13 to 1×10 2 atoms / cm 12 or less (preferably 1×10 2 atoms / cm or less). Note that the density of impurities (typically, halogens (e.g., chlorine, fluorine), boron, phosphorus, aluminum, iron, or carbon) caused by the etching 18 process on the surface of the oxide semiconductor film can be reduced to 3 5×10 18 a toms / cm 3 or less (preferably 1×10

[0325] atoms / cm or less). Therefore, a highly reliable semiconductor device including the transistor

[0326] 640 having stable electrical characteristics using the oxide semiconductor film of this embodiment can be provided. In addition, a highly reliable

[0327] (Embodiment 6) The semiconductor device disclosed in this specification can be applied to various electronic devices (including gaming machines). Examples of electronic devices include television devices (also referred to as TVs or television receivers), monitors for computers, digital cameras, digital Examples include game cabinets (such as pachinko machines and slot machines). Specific examples of these electronic devices are shown in Figure 8.

[0328] Figure 8(A) shows a table 9000 having a display unit. The table 9000 has a display unit 9003 incorporated in a housing 9001, and the display unit 9003 can display images. Note that a configuration is shown in which the housing 9001 is supported by four legs 9002. The housing 9001 also has a power cord 9005 for power supply.

[0329] The semiconductor device shown in any of Embodiments 1 to 5 can be used for the display unit 9003 and can impart high reliability to the electronic device.

[0330] The display unit 9003 has a touch input function. By touching a display button 9004 displayed on the display unit 9003 of the table 9000 with a finger or the like, screen operations and information input can be performed, and communication with other household appliances or control can be made possible, so that it can also be used as a control device for controlling other household appliances by screen operations. For example, if the semiconductor device having the image sensor function shown in Embodiment 5 is used, the display unit 9003 can be provided with a touch input function.

[0331] Also, by means of a hinge provided on the housing 9001, the screen of the display unit 9003 can be set perpendicular to the floor and can also be used as a television device. In a narrow room, installing a large-screen television device will narrow the free space, but if the table has a built-in display unit, the space in the room can be effectively utilized.

[0332] Figure 8(B) shows a television apparatus 9100. The television apparatus 9100 has a display unit 9103 incorporated in a housing 9101, and the display unit 9103 can display images. Here, a configuration is shown in which the housing 9101 is supported by a stand 9105.

[0333] The operation of the television apparatus 9100 can be performed by operation switches provided in the housing 9101 or by a separate remote control unit 9110. Channel and volume operations can be performed by operation keys 9109 provided on the remote control unit 9110, and the images displayed on the display unit 9103 can be operated. Further, the remote control unit 9110 may be configured to include a display unit 9107 for displaying information output from the remote control unit 9110.

[0334] The television apparatus 9100 shown in Figure 8(B) includes a receiver, a modem, etc. The television apparatus 9100 can receive general television broadcasts by a receiver, and can further connect to a wired or wireless communication network via a modem, thereby enabling one-way ( from a sender to a receiver) or two-way (between a sender and a receiver, or between receivers, etc.) information communication.

[0335] The semiconductor device shown in any of Embodiments 1 to 5 can be used for the display units 9103 and 9107, and can impart high reliability to a television apparatus and a remote control unit.

[0336] Figure 8(C) shows a computer, which includes a main body 9201, a housing 9202, a display unit 9203, keys ​​​​​​It includes a board 9204, an external connection port 9205, a pointing device 9206, etc.

[0337] The semiconductor device shown in any one of Embodiments 1 to 5 can be used for the display unit 9203 and can be made into a highly reliable computer.

[0338] FIGS. 9(A) and 9(B) are foldable tablet terminals. FIG. 9(A) shows the open state, and the tablet terminal includes a housing 9630, a display unit 9631a, a display unit 963 1b, a display mode switch 9034, a power switch 9035, a power saving mode switch 9036, a fastener 9033, and an operation switch 9038.

[0339] The semiconductor device shown in any one of Embodiments 1 to 5 can be used for the display unit 9631a and the display unit 9631 b and can be made into a highly reliable tablet terminal.

[0340] A part of the display unit 9631a can be made into a touch panel area 9632a, and data can be input by touching the displayed operation keys 9638. Note that in the display unit 963 1a, as an example, a configuration in which half of the area has only a display function and the other half has a touch panel function is shown, but it is not limited to this configuration. The entire area of the display unit 963 1a may also have a touch panel function. For example, the entire surface of the display unit 96 31a can be made to display keyboard buttons to serve as a touch panel, and the display unit 9631b can be used as a display screen.

[0341] Also, in the display unit 9631b, similar to the display unit 9631a, a part of the display unit 9631b It can be the area 9632b of the touch panel. Also, when a finger or a stylus touches the position where the display switching button 9639 on the touch panel is displayed, keyboard buttons can be displayed on the display unit 9631b.

[0342] Also, touch input can be performed simultaneously on the area 9632a and the area 9632b of the touch panel.

[0343] Also, the display mode switching switch 9034 can select switching of the display orientation such as vertical display or horizontal display, switching between black and white display and color display, etc. The power saving mode switching switch 9036 can optimize the display brightness according to the amount of external light detected by the optical sensor built in the tablet terminal during use. The tablet terminal may incorporate other detection devices such as sensors for detecting inclination such as gyroscopes and acceleration sensors in addition to the optical sensor.

[0344] Also, in FIG. 9(A), an example where the display areas of the display unit 9631b and the display unit 9631a are the same is shown, but it is not particularly limited, and the size of one may be different from the size of the other, and the display quality may also be different. For example, one may be a display panel capable of performing higher-definition display than the other.

[0345] FIG. 9(B) shows a closed state, and the tablet terminal includes a housing 9630, a solar cell 9633, a charge and discharge control circuit 9634, a battery 9635, and a DCDC converter 9636. In FIG. 9(B), as an example of the charge and discharge control circuit 9634, a configuration having a battery 9635 and a DCDC converter 9636 is shown. ​​​​​​​​​​​​​

[0346] Note that since the tablet-type terminal can be folded in two, the housing 9630 can be closed when not in use. Therefore, the display units 9631a and 9631b can be protected, and a tablet-type terminal with excellent durability and reliability from the perspective of long-term use can be provided.

[0347] In addition, the tablet-type terminal shown in FIGS. 9(A) and 9(B) can also have functions such as displaying various information (such as still images, moving images, text images, etc.), displaying a calendar, date, or time on the display unit, a touch input function for touch input operation or editing of the information displayed on the display unit, a function of controlling processing by various software (programs), and the like.

[0348] Power can be supplied to the touch panel, the display unit, or the video signal processing unit, etc. by the solar cell 9633 mounted on the surface of the tablet-type terminal. Note that the solar cell 9633 can be provided on one or both sides of the housing 9630, and can be configured to efficiently charge the battery 9635. As the battery 9635, using a lithium-ion battery has advantages such as enabling miniaturization.

[0349] In addition, the configuration and operation of the charge / discharge control circuit 9634 shown in FIG. 9(B) will be described with reference to the block diagram in FIG. 9(C). FIG. 9(C) shows the solar cell 9633, the battery 9635, the DCDC converter 9636, the converter 9637, the switches SW1 to SW3, and the display unit 9631. The battery 9635, the DCDC converter 9636, the converter 9637, and the switches SW1 to SW3 are the charge / discharge control circuit 963 shown in FIG. 9(B). It corresponds to the location corresponding to 4.

[0350] First, an example of the operation when power is generated by the solar cell 9633 by external light will be described. The power generated by the solar cell becomes a voltage for charging the battery 9635 by DCD It is stepped up or down by the DC / DC converter 9636. And when the power from the solar cell 9633 is used for the operation of the display unit 9631, the switch SW1 is turned on, and the converter 96 37 steps up or down to the voltage required for the display unit 9631. Also, when the display on the display unit 96 31 is not performed, SW1 is turned off, SW2 is turned on, and the battery 96 35 may be configured to be charged.

[0351] Note that the solar cell 9633 is shown as an example of a power generation means, but it is not particularly limited, and the battery may be charged by other power generation means such as a piezoelectric element (piezoelectric element) or a thermoelectric conversion element (Peltier element). For example, a contactless power transmission module that wirelessly (non-contact) transmits and receives power for charging, or a configuration that combines other charging means may be used. and charges, or a configuration that combines other charging means may be used.

[0352] The configurations, methods, etc. shown in this embodiment can be appropriately combined with the configurations, methods, etc. shown in other embodiments and used.

Example

[0353] In this example, the results of performing the step of removing residues on the surface of the metal film and the surface of the oxide semiconductor film are shown.

[0354] As a sample, an oxide semiconductor film of In:Ga:Zn = 3:1:2 on a silicon substrate [original ​​An IGZO film with a thickness of 50 nm was formed by a sputtering method using an oxide target with a sub-atomic ratio. The film formation conditions were an atmosphere of argon and oxygen (argon: oxygen = 30 sccm: 15 s ccm), a pressure of 0.4 Pa, a power supply power of 0.5 kW, and a substrate temperature of 200 °C.

[0355] Next, an etching process (etching conditions: etching gas (BCl3: Cl2 = 60 sccm: 20 sccm), ICP power supply power 45 0 W, bias power 100 W, pressure 1.9 Pa) was performed on the oxide semiconductor film by a dry etching method to fabricate Sample A-1. After the etching process, a water treatment was further performed to fabricate Sample A-2.

[0356] After the water treatment, a plasma treatment using oxygen (conditions: gas (O2 = 300 scc

[0357] m), power supply power 1800 W, pressure 66.5 Pa, 3 minutes) was performed on the IGZO film after the water treatment to fabricate Sample B-1. After the water treatment, a plasma treatment using nitrous oxide (conditions: gas (N2O = 20 0 sccm), power supply power 100 W, power supply frequency 27 MHz, pressure 40 Pa, substrate temperature 35 0 °C, 25 minutes) was performed on the IGZO film after the water treatment to fabricate Sample B-2. A treatment using a TMAH solution (conditions: 50 °C, 60 seconds) was performed on the IGZO film after the water treatment to fabricate Sample B-3. A treatment using an ammonia peroxide solution (H2O: ammonia: hydrogen peroxide solution = 2: 2: 5) (room temperature, 10 seconds) was performed on the IGZO film after the water treatment to fabricate Sample B-4. A plasma treatment using oxygen (conditions: gas (O2 = 200 sccm), power supply power 100 W, power supply frequency 27 M Hz, pressure 40 Pa, substrate temperature 350 °C, 2 minutes) was performed on the IGZO film after the water treatment to fabricate Sample B-5. Note that Samples B-1 and B-5 are plasma treatments using oxygen with different treatment conditions. temperature, 10 seconds) was performed on the IGZO film after the water treatment to fabricate Sample B-4. A plasma treatment using oxygen (conditions: gas (O2 = 200 sccm), power supply power 100 W, power supply frequency 27 M Hz, pressure 40 Pa, substrate temperature 350 °C, 2 minutes) was performed on the IGZO film after the water treatment to fabricate Sample B-5. Note that Samples B-1 and B-5 are plasma treatments using oxygen with different treatment conditions. temperature, 10 seconds) was performed on the IGZO film after the water treatment to fabricate Sample B-4. A plasma treatment using oxygen (conditions: gas (O2 = 200 sccm), power supply power 100 W, power supply frequency 27 M Hz, pressure 40 Pa, substrate temperature 350 °C, 2 minutes) was performed on the IGZO film after the water treatment to fabricate Sample B-5. Note that Samples B-1 and B-5 are plasma treatments using oxygen with different treatment conditions. Hz, pressure 40 Pa, substrate temperature 350 °C, 2 minutes) was performed on the IGZO film after the water treatment to fabricate Sample B-5. Note that Samples B-1 and B-5 are plasma treatments using oxygen with different treatment conditions. Samples B-1 and B-5 are plasma treatments using oxygen with different treatment conditions.

[0358] Total Reflection X-ray Fluoresce nce) analysis was used to measure the surface chlorine area density of the samples A-1, A-2, B-1 to B-5, and the results are shown in Tables 1 and 2. The results are shown in Tables 1 and 2.

[0359] [Table 1]

[0360] [Table 2]

[0361] In the case of A-1 where the residue removal process was not performed after dry etching, the surface chlorine area density of the IGZO film increased significantly after dry etching. However, in the case of A-2 where water treatment was performed after dry etching, it was confirmed that the increase in the surface chlorine area density of the IGZO film was reduced. After dry etching, the surface chlorine area density of the IGZO film increased significantly, but in the case of A-2 where water treatment was performed after dry etching, it was confirmed that the increase in the surface chlorine area density of the IGZO film was reduced. After dry etching, the surface chlorine area density of the IGZO film increased significantly, but in the case of A-2 where water treatment was performed after dry etching, it was confirmed that the increase in the surface chlorine area density of the IGZO film was reduced. It can be confirmed that the increase is reduced.

[0362] Furthermore, in B-1 to B-5 where plasma treatment using dinitrogen monoxide, treatment with TMAH solution, treatment with aqueous ammonia peroxide, or plasma treatment using oxygen was performed as the residue removal process, after the residue removal process, the surface chlorine area density of the IGZO film was 1×10 atoms / cm or less, and it was confirmed that more chlorine was removed and the increase in the surface chlorine area density was suppressed. 13 atoms / cm 2 or less, and it was confirmed that more chlorine was removed and the increase in the surface chlorine area density was suppressed. It can be confirmed that the increase in the surface chlorine area density was suppressed.

[0363] Next, as a sample, a tungsten (W) film with a thickness of 200 nm was formed by sputtering as a metal film on a glass substrate (film formation conditions: in an argon (80 sccm) atmosphere, pressure 0.8 P atmosphere, pressure 0.8 P a. A film was formed with a power supply power of 1 kW and a substrate temperature of 230 °C.

[0364] Next, tungsten film was subjected to an etching process (etching conditions: etch ing gas (CF4:Cl2:O2 = 25 sccm:25 sccm:10 sccm), ICP power supply power of 500 W, bias power of 100 W, pressure of 1.0 Pa) to etch a film thickness of about 50 nm.

[0365] After the etching process, water treatment was performed.

[0366] The tungsten film after water treatment was subjected to plasma treatment using oxygen (conditions: gas (O2 = 300 s ccm), power supply power of 1800 W, pressure of 66.5 Pa, 3 minutes) to produce sample C-1 . The tungsten film after water treatment was subjected to plasma treatment using nitrous oxide (conditions: gas (N2 O = 200 sccm), power supply power of 100 W, power supply frequency of 27 MHz, pressure of 40 Pa, substrate temperature of 350 °C, 25 minutes) to produce sample C-2. The tungsten film after water treatment was treated with a T MAH solution (conditions: 50 °C, 60 seconds) to produce sample C-3. After water treatment the tungsten film was treated with an ammonia peroxide (H2O: ammonia: hydrogen peroxide solution = 2:2:5 ) (room temperature, 10 seconds) to produce sample C-4. The tungsten film after water treatment was subjected to plasma treatment using oxygen (conditions: gas (O2 = 200 sccm), power supply power of 100 W, power supply frequency of 27 MHz, pressure of 40 Pa, substrate temperature of 350 °C, 2 minutes) to produce sample C-5 . Note that sample C-1 and sample C-5 are plasma treatments using oxygen with different treatment conditions .

[0367] The surface density of chlorine on the film surface of samples C-1 to C-5 was measured by total reflection fluorescence X-ray analysis The results are shown in Table 3.

[0368]

Table 3

[0369] After dry etching and water treatment, plasma treatment using nitrous oxide, treatment with a TMAH solution, treatment with aqueous ammonia peroxide, or plasma treatment using oxygen was performed as a residue removal step. In C-1 to C-5, after the residue removal step, the surface density of chlorine on the tungsten film was 1×10 atoms / cm or less, and it was confirmed that the increase in the surface density of chlorine was suppressed and chlorine was removed. 13 atoms / cm 2 or less, and it was confirmed that the increase in the surface density of chlorine was suppressed and chlorine was removed. or less, and it was confirmed that the increase in the surface density of chlorine was suppressed and chlorine was removed.

[0370] From the above results, it was confirmed that the residue removal steps such as water treatment, plasma treatment using nitrous oxide, treatment with a TMAH solution, treatment with aqueous ammonia peroxide, or plasma treatment using oxygen have the effect of reducing the impurity concentration on the film surface caused by the etching process. From the above results, it was confirmed that the residue removal steps such as water treatment, plasma treatment using nitrous oxide, treatment with a TMAH solution, treatment with aqueous ammonia peroxide, or plasma treatment using oxygen have the effect of reducing the impurity concentration on the film surface caused by the etching process. From the above results, it was confirmed that the residue removal steps such as water treatment, plasma treatment using nitrous oxide, treatment with a TMAH solution, treatment with aqueous ammonia peroxide, or plasma treatment using oxygen have the effect of reducing the impurity concentration on the film surface caused by the etching process. .

Explanation of Signs

[0371] 400 Substrate 401 Gate electrode layer 402 Gate insulating film 403 Oxide semiconductor film 405a Source electrode layer 405b Drain electrode layer 407 Insulating film 420 Transistor 430 Transistor 440 Transistor 441 Conductive film 442 Resist mask 443 Gas 445 Conductive film 447 Gas 448a resist mask 448b resist mask 500 substrate 502 gate insulating film 504 interlayer insulating film 505 color filter layer 506 insulating film 507 partition wall 510 transistor 511a gate electrode layer 511b gate electrode layer 512 oxide semiconductor film 513a conductive layer 513b conductive layer 520 capacitor element 521a conductive layer 521b conductive layer 522 oxide semiconductor film 523 conductive layer 530 wiring layer intersection 533 conductive layer 540 light-emitting element 541 electrode layer 542 electroluminescent layer 543 electrode layer 601 substrate 602 photodiode 606a semiconductor film 606b semiconductor film 606c semiconductor film 608 adhesive layer 613 substrate 631 insulating film 633 interlayer insulating film 634 interlayer insulating film 640 transistor 641a electrode layer 641b electrode layer 642 electrode layer 643 conductive layer 645 conductive layer 656 transistor 658 photodiode reset signal line 659 gate signal line 671 photosensor output signal line 672 Photo Sensor Reference Signal Line 4001 Substrate 4002 Pixel Section 4003 Signal Line Driver Circuit 4004 Scanning Line Driver Circuit 4005 Sealing Material 4006 Substrate 4008 Liquid Crystal Layer 4010 Transistor 4011 Transistor 4013 Liquid Crystal Element 4015 Connection Terminal Electrode 4016 Terminal Electrode 4018 FPC 4018a FPC 4018b FPC 4019 Anisotropic Conductive Film 4020 Insulating Film 4021 Insulating Film 4030 Electrode Layer 4031 Electrode Layer 4032 Insulating Film 4033 Insulating Film 4035 Spacer 4510 Partition Wall 4511 Electroluminescent Layer 4513 Light Emitting Element 4514 Filling Material 9000 Table 9001 Housing 9002 Leg 9003 Display Section 9004 Display Button 9005 Power Cord 9033 Fastener 9034 Switch 9035 Power Switch 9036 Switch 9038 Operation Switch 9100 Television Apparatus 9101 Housing 9103 Display Section 9105 Stand 9107 Display Section 9109 Operation Key 9110 Remote control unit 9201 Main body 9202 Housing 9203 Display unit 9204 Keyboard 9205 External connection port 9206 Pointing device 9630 Housing 9631 Display unit 9631a Display unit 9631b Display unit 9632a Area 9632b Area 9633 Solar cell 9634 Charge and discharge control circuit 9635 Battery 9636 DCDC converter 9637 Converter 9638 Operation key 9639 Button

Claims

1. A display device including a transistor and a capacitor electrically connected to the transistor in each pixel, In a plan view of the one pixel, a first conductive layer having a function as a gate electrode of the transistor; a second conductive layer having the same material as the first conductive layer and functioning as one electrode of the capacitor; a first insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the second conductive layer; an oxide semiconductor layer having a region overlapping with the first conductive layer and including a channel formation region of the transistor; a third conductive layer having a region located over the oxide semiconductor layer and functioning as one of a source electrode and a drain electrode of the transistor; a fourth conductive layer having a region located over the oxide semiconductor layer and functioning as the other of the source electrode and the drain electrode of the transistor; a fifth conductive layer having the same material as the third conductive layer and the fourth conductive layer and overlapping the second conductive layer; a sixth conductive layer having a region extending in a channel length direction of the transistor, the sixth conductive layer having the same material as the third conductive layer and the fourth conductive layer; a second insulating layer having a region in contact with an upper surface of the third conductive layer, a region in contact with an upper surface of the fourth conductive layer, a region in contact with an upper surface of the fifth conductive layer, and a region in contact with an upper surface of the sixth conductive layer; a seventh conductive layer having a region located on the second insulating layer and functioning as a pixel electrode; the fifth conductive layer functions as the other electrode of the capacitor; the first conductive layer has a region extending in a direction intersecting a channel length direction of the transistor, a sixth conductive layer that does not overlap with the oxide semiconductor layer and that overlaps with the first conductive layer;

2. A display device including a transistor and a capacitor electrically connected to the transistor in each pixel, In a plan view of the one pixel, a first conductive layer having a function as a gate electrode of the transistor; a second conductive layer having the same material as the first conductive layer and functioning as one electrode of the capacitor; a first insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the second conductive layer; a first oxide semiconductor layer having a region overlapping with the first conductive layer and including a channel formation region of the transistor; a second oxide semiconductor layer having a region overlapping with the second conductive layer and containing the same material as the first oxide semiconductor layer; a third conductive layer having a region located over the first oxide semiconductor layer and functioning as one of a source electrode and a drain electrode of the transistor; a fourth conductive layer having a region located over the first oxide semiconductor layer and functioning as the other of the source electrode and the drain electrode of the transistor; a fifth conductive layer having a same material as the third conductive layer and the fourth conductive layer and having a region located above the second oxide semiconductor layer; a sixth conductive layer having a region extending in a channel length direction of the transistor, the sixth conductive layer having the same material as the third conductive layer and the fourth conductive layer; a second insulating layer having a region in contact with an upper surface of the third conductive layer, a region in contact with an upper surface of the fourth conductive layer, a region in contact with an upper surface of the fifth conductive layer, and a region in contact with an upper surface of the sixth conductive layer; a seventh conductive layer having a region located on the second insulating layer and functioning as a pixel electrode; the fifth conductive layer functions as the other electrode of the capacitor; the first conductive layer has a region extending in a direction intersecting a channel length direction of the transistor, the sixth conductive layer does not overlap with the first oxide semiconductor layer or the second oxide semiconductor layer, and overlaps with the first conductive layer.

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