Semiconductor device

Abstract

To provide a semiconductor device in which damage to a transistor or the like is reduced even when external force such as bending is applied and stress is generated in the semiconductor device.SOLUTION: A semiconductor device comprises: a first island-like reinforcement film disposed on a substrate having flexibility; a semiconductor film comprising a channel formation region and an impurity region on the first island-like reinforcement film; a first conductive film disposed over the channel formation region via a gate insulating film; and a second island-like reinforcement film disposed while covering the first conductive film and the gate insulating film.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a semiconductor device, and particularly to a semiconductor device that suppresses damage to elements such as transistors provided in the semiconductor device even when an external force is applied.

Background Art

[0002] In recent years, a technology for providing an integrated circuit composed of transistors and the like on a flexible substrate such as plastic has attracted attention. By providing an integrated circuit on a flexible substrate, the semiconductor device formed can achieve weight reduction and cost reduction compared to the case of using a substrate such as a semiconductor substrate or a glass substrate. Since the flexible semiconductor device can be bent, it is being diverted to various fields and places.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0004] However, when an external force such as bending is applied to a semiconductor device including an integrated circuit in which elements such as transistors are provided on a flexible substrate, due to the stress generated in the semiconductor device, elements such as transistors included in the semiconductor device are damaged, and the characteristics of elements such as transistors ​​​​​​​There is a risk of having an impact. Also, during the manufacturing process of a semiconductor device, when stress is generated in elements such as transistors, there is a risk that the elements may be damaged and the product yield may decrease. When stress occurs in elements such as transistors, there is a risk that the elements may be damaged and the product yield may decrease.

[0005] In view of the above problems, an object of the present invention is to provide a semiconductor device that reduces damage to elements such as transistors even when an external force such as bending is applied to the semiconductor device.

Means for Solving the Problems

[0006] The semiconductor device according to the present invention is provided with a reinforcing film in order to suppress the stress generated in elements such as transistors even when an external force such as bending is applied to the semiconductor device during the manufacturing process or during use after completion. The reinforcing film is provided in order to set the position of the neutral plane (the plane that does not stretch or shrink), where stress distortion such as tensile stress or compressive stress does not occur with respect to deformations such as bending, to a suitable position for the semiconductor device in the thickness direction of the semiconductor device. The reinforcing film is provided in the vertical region of the semiconductor film that constitutes elements such as transistors. The reinforcing film may be provided in contact with the semiconductor film, or may be provided so as not to be in contact with the semiconductor film via an insulating film. Hereinafter, the specific configuration of the semiconductor device will be described.

[0007] A first island-shaped reinforcing film provided on a flexible substrate, a semiconductor film having a channel formation region and an impurity region on the first island-shaped reinforcing film, a first conductive film provided via a gate insulating film above the channel formation region, a second island-shaped reinforcing film provided covering the first conductive film and the gate insulating film, and a second island-shaped reinforcing film and the gate insulating film are provided covering...

[0008] ​​​​​​​​​​​The formed interlayer insulating film and a second conductive film provided on the interlayer insulating film so as to be electrically connected to the impurity region through the opening It is characterized in that the entire channel formation region is provided between the first island-shaped reinforcing film and the second island-shaped reinforcing film of the island-shaped reinforcing film.

[0009] Also, the first island-shaped reinforcing film and the second island-shaped reinforcing film are formed of a material having a higher Young's modulus than the semiconductor film constituting the semiconductor device . Specifically, materials such as silicon nitride, silicon oxynitride, metal oxide, and metal nitride can be used. By forming the first island-shaped reinforcing film and the second island-shaped reinforcing film of a material having a higher Young's modulus than the semiconductor film , it is possible to improve the mechanical strength of the semiconductor film without changing the properties of the semiconductor film, and reduce the damage of the semiconductor film.

[0010] The film thickness of the first island-shaped reinforcing film is 50 nm or more and 200 nm or less, and the film thickness of the second island-shaped reinforcing film is 100 nm or more and 400 nm or less .

Advantages of the Invention

[0011] By providing a reinforcing film for elements such as transistors constituting the semiconductor device, even when an external force such as bending is applied to the semiconductor device during the manufacturing process or during use after completion , the stress generated in elements such as transistors can be suppressed. Therefore, damage to elements such as transistors can be reduced, and the yield and reliability of the semiconductor device can be improved .

Brief Description of the Drawings

[0012]

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Embodiments for Carrying Out the Invention

[0013] Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to the following description and can be easily understood by those skilled in the art that its form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not construed as being limited to the description of the embodiments shown below. In the configuration of the present invention described below, the same reference numerals may be commonly used among different drawings to indicate the same components when referring to the same thing

[0014] (Embodiment 1) In this embodiment, an example of a semiconductor device will be described with reference to the drawings

[0015] In this embodiment, a reinforcing film is provided to suppress stress generated in elements such as transistors even when an external force such as bending is applied In this embodiment, as an example of the structure, a case will be described in which reinforcing films formed of a material having a higher Young's modulus than that of the semiconductor film constituting the transistor are provided above and below the semiconductor film

[0016] An example of the semiconductor device shown in this embodiment is shown in FIG. 1. In FIG. 1, FIG. 1(A) shows a top view, and FIG. 1(B) shows a cross-sectional view taken along line A - B in FIG. 1(A)

[0017] The semiconductor device shown in FIG. 1(B) includes at least thin film transistors 100a and 100b having a semiconductor film 106, a gate insulating film 107, a first conductive film 108 functioning as a gate electrode, a reinforcing film 103 (also referred to as a first island-shaped reinforcing film) for reinforcing the semiconductor film 106, and a reinforcing film 109 (also referred to as a second island-shaped reinforcing film). In FIG. 1(B), at least a part of the semiconductor film 106 is provided sandwiched between the reinforcing film 103 and the reinforcing film 109 ​​​​​​​​ Moreover, in FIG. 1(A), the reinforcing film 109 is provided so as to cover the semiconductor film 106.

[0018] The insulating film 110 is provided so as to cover the gate insulating film 107 and the reinforcing film 109. Further, a second conductive film 111 that can function as a source electrode or a drain electrode of the thin film transistors 100a and 100b is provided on the insulating film 110. Here, an example is shown in which the thin film transistors 100a and 100b are provided via the insulating film 102 on the flexible substrate 101.

[0019] The semiconductor film 106 includes a channel formation region 106a and impurity regions 106b that can function as source regions or drain regions. Further, the impurity regions 106b are provided so as to be separated from each other with the channel formation region 106a interposed therebetween. The impurity regions 106b are electrically connected to the second conductive film 111 provided on the insulating film 110 through the openings 124 provided in the insulating film 110.

[0020] The reinforcing film 103 is provided so as to overlap with the semiconductor film 106 and the insulating film 104 that constitute the thin film transistors 100a and 100b. Further, it is provided so as to have a larger area than the semiconductor film 106.

[0021] Moreover, the reinforcing film 109 is provided so as to cover the first conductive film 108 and the gate insulating film 107. Further, it is preferable that the reinforcing film 109 covers the entire area of the semiconductor film 106. Further, it is preferable that the area of the reinforcing film 109 is larger than the area of the reinforcing film 103. In this way, the entire area of the channel formation region is provided between the reinforcing film 103 and the reinforcing film 109. ​ It is preferably as follows.

[0022] During the manufacturing process of the semiconductor device or during use after completion, an external force such as bending is applied to the semiconductor device, and stress is generated in the semiconductor film 106. This is because, in the thickness direction of the semiconductor device, the position of the neutral plane (the plane that does not stretch or shrink) where no strain such as tensile stress or compressive stress occurs with respect to deformation such as bending is at the position where stress is generated in the semiconductor film. When stress is generated in the semiconductor film 10 6, the semiconductor film 106 is damaged and the semiconductor device is destroyed. Therefore, in order to suppress the generation of stress in the semiconductor film when an external force such as bending is applied to the semiconductor device, the position of the neutral plane (the plane that does not stretch or shrink) in the thickness direction of the semiconductor device is set to a position where the generation of stress in the semiconductor film can be suppressed.

[0023] As the materials used for the reinforcing films 103 and 109, it is preferable to use materials with a higher Young's modulus than that of the semiconductor film 106. Specifically, materials such as silicon nitride, silicon oxynitride, metal oxides, and metal nitrides can be used. Also, it is preferable that the reinforcing films 103 and 109 are formed of the same material. In this way, by forming the reinforcing films 103 and 109 of materials with a higher Young's modulus than that of the semiconductor film, without changing the properties of the semiconductor film, the mechanical strength of the semiconductor film can be improved and damage to the semiconductor film can be reduced.

[0024] The film thickness of the reinforcing film 103 is preferably 50 nm or more and 200 nm or less, and the film thickness of the reinforcing film 109 is preferably 100 nm or more and 400 nm or less. Also, it is preferable that the film thickness of the reinforcing film 109 is thicker than the film thickness of the reinforcing film 103. Furthermore, the film thickness of the reinforcing film 103 and the film thickness of the reinforcing film 109​ The ratio of the film thickness (the film thickness of the reinforcing film 103 / the film thickness of the reinforcing film 109) is preferably 1 / 2 or less. Note that the film thickness of the reinforcing film 103 and the film thickness of the reinforcing film 109 may be the same.

[0025] In this way, by providing the semiconductor film 106 so as to be sandwiched between the reinforcing film 103 and the reinforcing film 109, in the thickness direction of the semiconductor device, the position of the neutral plane where no strain such as tensile stress or compressive stress occurs due to deformation such as bending can be set at a position where stress is suppressed from occurring in the semiconductor film 106. Therefore, even when an external force such as bending is applied to the semiconductor device, it is possible to suppress the occurrence of stress in the semiconductor film 106. Further, by providing a reinforcing film formed of a material having a higher Young's modulus than that of the semiconductor film 106 in the vicinity of the upper and lower sides of the semiconductor film 106, it is possible to improve the mechanical strength of the semiconductor device without changing the properties of the semiconductor film. Therefore, damage to the semiconductor film 106 can be reduced, and damage and breakage of the thin film transistors 100a and 100b can be reduced. Note that the semiconductor device shown in FIG. 1(B) shows an example in which the reinforcing film 109 is provided to cover the end portions of the semiconductor film 106 and the end portions of the reinforcing film 103. However, the semiconductor device shown in this embodiment is not limited to this configuration. The reinforcing film 109 may be provided so as to overlap with the channel formation region 106a that is easily damaged. For example, a configuration may be adopted in which the reinforcing film 109 is provided above the channel formation region 106a so as to cover the first conductive film 108 (see FIG. 1(C)). Further, the area of the reinforcing film 109 may be smaller than the area of the reinforcing film 103. The channel formation region 106a may be covered with the reinforcing film 103 and the reinforcing

[0026] film 109. Note that the semiconductor device shown in FIG. 1(B) shows an example in which the reinforcing film 109 is provided to cover the end portions of the semiconductor film 106 and the end portions of the reinforcing film 103. However, the semiconductor device shown in this embodiment is not limited to this configuration. The reinforcing film 109 is not limited to this configuration, and may be provided so as to overlap with the channel formation region 106a that is easily damaged. For example, a configuration may be adopted in which the reinforcing film 109 is provided above the channel formation region 106a so as to cover the first conductive film 108 (see FIG. 1(C)). Further, the area of the reinforcing film 109 may be smaller than the area of the reinforcing film 103. The channel formation region 106a may be covered with the reinforcing film 103 and the reinforcing

[0027] film 109. 9 may be provided (see FIG. 1(C)). Also, the area of the reinforcing film 109 may be smaller than the area of the reinforcing film 103. The channel formation region 106a may be covered with the reinforcing film 103 and the reinforcing film 109. By providing it so as to sandwich the film 109, the position of the neutral plane in the thickness direction of the semiconductor device can be set to a position where stress generation in the channel formation region 106a can be suppressed. Even when an external force such as bending is applied to the semiconductor device, stress generation in the channel formation region 106a can be suppressed. Therefore, even when an external force such as bending is applied to the semiconductor device, stress generation in the channel formation region 106 a can be suppressed. Therefore, damage and breakage of the thin film transistors 100a and 100b can be reduced. Further, by providing a reinforcing film formed of a material having a higher Young's modulus than that of the semiconductor film 106 in the vicinity above and below the semiconductor film 106, the mechanical strength of the semiconductor film can be improved without changing the properties of the semiconductor film. Also, since it is not necessary to remove the reinforcing film 109 when forming the opening 124 in the insulating film 110, etching when forming the opening portion 124 can be easily performed. Further, a configuration in which the reinforcing film 114 is laminated on the reinforcing film 103 may be employed (see FIG. 2). In this case, the reinforcing film 114 is formed so as to cover the reinforcing film 103 and the insulating film 102. By providing the reinforcing film 114 in this way, the lower side of the semiconductor film 106 can be prevented from being exposed to impurities and moisture

[0028] and the mechanical strength below the semiconductor film 106 can be improved. Note that a structure in which the reinforcing film 114 is provided on the insulating film 102 may also be employed. When the reinforcing film 103 and the reinforcing film 114 are laminated, it is preferable that the combined film thickness of the reinforcing film 103 and the reinforcing film 114 is 50 nm or more and 200 nm or less. Also, the area of the reinforcing film 109 is preferably larger than the area of the reinforcing film 103. In FIG. 1, an example in which one semiconductor film 106 is provided on one island-shaped reinforcing film 103 is shown. However, it is also possible to provide a structure in which the reinforcing film 114 is provided on the insulating film 102. When the reinforcing film 103 and the reinforcing film 114 are laminated, it is preferable that the combined film thickness of the reinforcing film 103 and the reinforcing film 114 is 50 nm or more and 200 nm or less. Also, the area of the reinforcing film 109 is preferably larger than the area of the reinforcing film 103. In FIG. 1, an example in which one semiconductor film 106 is provided on one island-shaped reinforcing film 103 is shown, but

[0029] it is also possible to provide a structure in which the reinforcing film 114 is provided on the insulating film 102. When the reinforcing It is not limited to this. As shown in FIG. 3, a plurality of island-shaped semiconductor films 1 06 may be provided on one reinforcing film 103. When a plurality of island-shaped semiconductor films are provided on one reinforcing film 103 , the step at the end of the reinforcing film 103 can be reduced, so that the step break of the semiconductor film 106 due to mask misalignment or the like can be prevented.

[0030] A first conductive film is provided above the channel formation region of each of the plurality of island-shaped semiconductor films 106 with a gate insulating film 1 07 interposed therebetween. Further, a reinforcing film 109 is provided to cover the gate insulating film 107 and the first conductive film 108, and an insulating film 110 is provided to cover the gate insulating film 107 and the first conductive film 108. Further, through an opening 124 provided in the insulating film 110 , the impurity region 106b and the second conductive film 111 provided on the insulating film 110 are electrically connected.

[0031] In this embodiment, a thin film transistor has been described as an example, but an organic transistor may be provided instead of the thin film transistor .

[0032] In this way, by providing a reinforcing film formed of a material having a higher Young's modulus than that of the semiconductor film near the top and bottom of the semiconductor film , in the thickness direction of the semiconductor device, the position of the neutral plane where no strain of tensile stress or compressive stress occurs due to deformation such as bending can be set to a position where stress is generated in the semiconductor film can be suppressed. That is, the position of the neutral plane of the semiconductor device can be set to a suitable position for the semiconductor device. Therefore, even when an external force such as bending is applied to the semiconductor device during the manufacturing process or during use after completion of the semiconductor device , transistors and the like can be prevented from being damaged. When an external force such as bending is applied to the semiconductor device, even when the semiconductor device is in use It is possible to suppress the stress generated in the element. Therefore, damage to elements such as transistors can be reduced, and the yield and reliability of the semiconductor device can be improved. The configuration of the semiconductor device shown in this embodiment can be implemented in combination with the configuration of the semiconductor device shown in other embodiments.

[0033] The configuration of the semiconductor device shown in this embodiment can be implemented in combination with the configuration of the semiconductor device shown in other embodiments. It can be implemented in combination with the configuration of the semiconductor device shown in other embodiments.

[0034] (Embodiment 2) In this embodiment, an example of the manufacturing method of the semiconductor device shown in the above Embodiment 1 will be described with reference to the drawings. In this embodiment, the process of peeling the element from the support substrate and transferring it to another substrate after forming an element such as a thin film transistor on the support substrate will be described. In this specification, "transfer" means moving the element formed on the substrate to another substrate. First, a release layer 121 is formed on one surface of the substrate 120, and then an insulating film 102 and a reinforcing film that function as a buffer layer are formed. The release layer 121, the insulating film 102, and the reinforcing film can also be formed continuously. Subsequently, selective etching is performed using a mask made of a resist formed on the reinforcing film by photolithography to form an island-shaped reinforcing film 103 (see Fig. 4(A)). The substrate 120 can be a glass substrate, a quartz substrate, a metal substrate, a stainless steel substrate, or the like. With such a substrate, there are no significant restrictions on its area and shape. Therefore, as the substrate 120, for example, if a rectangular one with a side length of 1 meter or more is used, the productivity can be significantly improved. Such an advantage is compared with the case of using a circular silicon substrate. This means moving the element formed on the substrate to another substrate.

[0035] First, a release layer 121 is formed on one surface of the substrate 120, and then an insulating film 102 and a reinforcing film that function as a buffer layer are formed. The release layer 121, the insulating film 102, and the reinforcing film can also be formed continuously. Subsequently, selective etching is performed using a mask made of a resist formed on the reinforcing film by photolithography to form an island-shaped reinforcing film 103 (see Fig. 4(A)). The release layer 121, the insulating film 102, and the reinforcing film can also be formed continuously. Subsequently, selective etching is performed using a mask made of a resist formed on the reinforcing film by photolithography to form an island-shaped reinforcing film 103 (see Fig. 4(A)). Subsequently, selective etching is performed using a mask made of a resist formed on the reinforcing film by photolithography to form an island-shaped reinforcing film 103 (see Fig. 4(A)). (See Fig. 4(A)). See Fig. 4(A).

[0036] The substrate 120 can be a glass substrate, a quartz substrate, a metal substrate, a stainless steel substrate, or the like. With such a substrate, there are no significant restrictions on its area and shape. Therefore, as the substrate 120, for example, if a rectangular one with a side length of 1 meter or more is used, the productivity can be significantly improved. Such an advantage is compared with the case of using a circular silicon substrate. With such a substrate, there are no significant restrictions on its area and shape. Therefore, as the substrate 120, for example, if a rectangular one with a side length of 1 meter or more is used, the productivity can be significantly improved. Such an advantage is compared with the case of using a circular silicon substrate. Therefore, as the substrate 120, for example, if a rectangular one with a side length of 1 meter or more is used, the productivity can be significantly improved. Such an advantage is compared with the case of using a circular silicon substrate. The productivity can be significantly improved. Such an advantage is compared with the case of using a circular silicon substrate. This is a significant advantage. In this step, although the release layer 121 is provided on the entire surface of the substrate 120, if necessary, after forming the release layer on the entire surface of the substrate 120, it may be selectively provided by photolithography. Also, although the release layer 121 is formed in contact with the substrate 120, if necessary, an underlying insulating film may be formed in contact with the substrate 120, and the release layer 121 may be formed in contact with the insulating film. The release layer 121 can use a metal film or a laminated structure of a metal film and a metal oxide film. As the metal film, an element selected from tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta), niobium (Nb), nickel (Ni), cobalt (Co), zirconium (Zr), zinc (Zn), ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), or an alloy material or a compound material mainly composed of the above elements is formed into a film, either single-layer or laminated. These materials are formed using various CVD methods such as sputtering and plasma CVD methods. As the laminated structure of the metal film and the metal oxide film, after forming the above-mentioned metal film, plasma treatment in an oxidizing atmosphere or an NO2 atmosphere, or heat treatment in an oxygen atmosphere or an NO2 atmosphere is performed. When an oxide or oxynitride of the metal film is provided on the surface of the metal film, for example, when plasma treatment is performed on a tungsten film, a metal oxide composed of tungsten oxide can be formed on the surface of the tungsten film. The insulating film 102 functions as a buffer layer. In the subsequent peeling process, the insulating film 102

[0037]

[0038] To facilitate peeling at the interface between the release layer 121 and the insulating film 102 that functions as a buffer layer or to prevent cracks and damage to semiconductor elements and wiring in subsequent peeling processes it is provided. As the insulating film 102 that functions as a buffer layer, it is formed in a single layer or laminated using an inorganic compound by a sputtering method, a plasma CVD method, a coating method, a printing method, etc. Representative examples of inorganic compounds include silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x > y), silicon nitride oxide (SiNxOy) (x > y), etc. The thickness of the insulating film 102 that functions as a buffer layer is preferably 10 nm to 1000 nm, and more preferably 100 nm to 700 nm. Here, a silicon oxynitride film with a thickness of 500 nm to 700 nm is formed by the plasma CVD method.

[0039] Next, a reinforcing film is formed on the release layer 121 using a sputtering method, a plasma CVD method, a coating method, printing method, etc. As the reinforcing film, it can be formed using ceramics such as silicon nitride, silicon oxynitride, alumina, metal oxides, and metal nitrides. By using silicon nitride, silicon oxynitride, etc., it is possible to prevent the intrusion of moisture, oxygen, etc. gases from the outside into the element formation layer 134 formed later and to prevent the lower side of the semiconductor film from being exposed to impurities. Also, tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), a luminum (Al), copper (Cu), chromium (Cr), niobium (Nb), nickel (Ni) , cobalt (Co), zirconium (Zr), zinc (Zn), ruthenium (Ru), rhodi um (Rh), palladium (Pd), osmium (Os), iridium (Ir), etc. oxides or nitrides of metals may be used to form the reinforcing film. The film thickness of the reinforcing film is 50 nm to 2 50 nm is preferred. Here, after forming silicon nitride with a film thickness of 50 nm to 200 nm by plasma CVD method, a mask made of a resist formed by photolithography is used to perform selective etching to form the island-shaped reinforcing film 103.

[0040] Next, after forming the insulating film 104 so as to cover the reinforcing film 103 and the insulating film 102, an island-shaped semiconductor film 106 is formed (see Fig. 4(B)).

[0041] The insulating film 104 functions as an underlying layer. The insulating film 104 can appropriately use the same formation method and materials as the insulating film 102 that functions as a buffer layer. Furthermore, the insulating film 104 that functions as an underlying layer may have a laminated structure. When the insulating film that functions as an underlying layer has a two-layer structure, for example, a silicon oxynitride film is formed as the first layer, and a silicon nitride oxide film is formed as the second layer. When the underlying insulating film has a three-layer structure, a silicon oxide film is formed as the first insulating film, a silicon oxynitride film is formed as the second insulating film, and a silicon nitride oxide film is formed as the third insulating film. Or, a silicon nitride oxide film is formed as the first insulating film, a silicon oxynitride film is formed as the second insulating film, and a silicon nitride oxide film is formed as the third insulating film. The underlying film functions as a blocking film that prevents the intrusion of impurities from the substrate 120.

[0042] The island-shaped semiconductor film 106 is formed by forming an amorphous semiconductor film, crystallizing the amorphous semiconductor film into a crystalline semiconductor film, and then forming a mask made of a resist using photolithography and performing selective etching on the crystalline semiconductor film.

[0043] The amorphous semiconductor film is formed by a sputtering method, an LPCVD method, a plasma CVD method, etc., to a thickness of 25 nm to 200 nm (preferably 30 nm to 150 nm).

[0044] Next, the amorphous semiconductor film is irradiated with laser light to perform crystallization. Note that the irradiation of laser light, a thermal crystallization method using an RTA or a furnace annealing furnace, a method combining a thermal crystallization method using a metal element that promotes crystallization, etc. may be used to crystallize the amorphous semiconductor film.

[0045] An example of the process for creating the island-shaped semiconductor film 106 will be briefly described below. First, an amorphous semiconductor film with a thickness of 50 to 60 nm is formed using the plasma CVD method. Next, after holding a solution containing nickel, which is a metal element that promotes crystallization, on the amorphous semiconductor film, dehydrogenation treatment (500 °C, 1 hour) and thermal crystallization treatment (550 °C, 4 hours) are performed on the amorphous semiconductor film to form a crystalline semiconductor film. Then, laser light is irradiated, a mask made of resist is formed using photolithography, and selective etching is performed on the semiconductor film to form the island-shaped semiconductor film 106. Note that the amorphous semiconductor film may be crystallized only by irradiation with laser light without performing thermal crystallization using a metal element that promotes crystallization.

[0046] The gate insulating film 107 is formed by laminating a single layer or multiple layers of a film containing silicon oxide or silicon nitride by a CVD method, a sputtering method, etc. For example, any one of a silicon oxide film, a silicon oxynitride film, and a silicon nitride oxide film is formed as a single layer, or a silicon oxide film, a silicon oxynitride film, and a silicon nitride oxide film are combined and laminated.

[0047] Also, the gate insulating film 107 may be formed by performing plasma treatment on the semiconductor film 106 to oxidize or nitride the surface. For example, plasma treatment is performed by introducing a mixed gas of a noble gas such as He, Ar, Kr, Xe, etc. and oxygen , nitrogen dioxide (NO2), ammonia, nitrogen, hydrogen, etc. In this case, when the plasma is excited by introducing microwaves, a high-density plasma can be generated at a low electron temperature . The oxygen radicals (which may contain OH radicals) or nitrogen radicals (which may contain NH radicals) generated by this high-density plasma can oxidize or nitride the surface of the semiconductor film. (There may be cases where OH radicals are included) or nitrogen radicals (there may be cases where NH radicals are included ).

[0048] By the treatment using such plasma, an insulating film of 1 to 20 nm, typically 5 to 10 nm, is formed on the semiconductor film. Since the reaction in this case is a solid-phase reaction, the interface state density between the insulating film and the semiconductor film can be extremely low. Such plasma treatment directly oxidizes (or nitrides) the semiconductor film (crystalline silicon or polycrystalline silicon), so that the variation in the thickness of the formed insulating film can be extremely small. In addition , since oxidation is not strongly performed even at the grain boundaries of crystalline silicon, it becomes a very favorable state . That is, by solid-phase oxidizing the surface of the semiconductor film by the plasma treatment shown here , an insulating film with good uniformity and a low interface state density can be formed without causing an abnormal oxidation reaction at the grain boundaries.

[0049] The gate insulating film 107 may use only the insulating film formed by plasma treatment, or silicon oxide, silicon oxynitride, silicon nitride, etc. by CVD method using plasma or thermal reaction in addition to that An insulating film such as a con may be deposited and laminated. In any case, a transistor formed by including the insulating film formed by plasma as part or all of the gate insulating film can reduce the variation in characteristics. Also, the semiconductor film 106 obtained by crystallizing the semiconductor film while irradiating it with a continuous oscillation laser or laser light oscillating at a frequency of 10 MHz or more and scanning it in one direction has the characteristic that crystals grow in the scanning direction of the beam. When the transistors are arranged with the scanning direction aligned with the channel length direction (the direction in which carriers flow when the channel formation region is formed), and the gate insulating film formed by the above-mentioned plasma is used for the transistors, a thin film transistor (TFT) with small variation in characteristics and high field effect mobility can be obtained.

[0050] Next, a conductive film for forming a gate electrode is formed on the gate insulating film 107. Here, the conductive film 122 and the conductive film 123 are laminated in order (see Fig. 4(C)). The conductive film 122 is formed to a thickness of 20 nm to 100 nm by plasma CVD method or sputtering method. The conductive film 123 is formed to a thickness of 100 nm to 400 nm by plasma CVD method or sputtering method. The conductive film 122 and the conductive film 123 are formed of an element selected from tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), niobium (Nb), etc., or an alloy material or compound material having these elements as the main component, or an alloy material or compound material containing these elements and silicon (Si) element. Alternatively, it is formed of polycrystalline silicon doped with impurity elements such as phosphorus. The conductive film 122 and the conductive film 123 are formed of an element selected from tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), niobium (Nb), etc., or an alloy material or compound material having these elements as the main component, or an alloy material or compound material containing these elements and silicon (Si) element. Or, it is formed of polycrystalline silicon doped with impurity elements such as phosphorus.

[0051] Next, a conductive film for forming a gate electrode is formed on the gate insulating film 107. Here, the conductive film 122 and the conductive film 123 are laminated in order (see Fig. 4(C)). The conductive film 122 is formed to a thickness of 20 nm to 100 nm by plasma CVD method or sputtering method. The conductive film 123 is formed to a thickness of 100 nm to 400 nm by plasma CVD method or sputtering method. The conductive film 122 and the conductive film 123 are formed of an element selected from tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), niobium (Nb), etc., or an alloy material or compound material having these elements as the main component, or an alloy material or compound material containing these elements and silicon (Si) element. Or, it is formed of polycrystalline silicon doped with impurity elements such as phosphorus. The conductive film 122 and the conductive film 123 are formed of an element selected from tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), niobium (Nb), etc., or an alloy material or compound material having these elements as the main component, or an alloy material or compound material containing these elements and silicon (Si) element. Or, it is formed of polycrystalline silicon doped with impurity elements such as phosphorus. The conductive film 122 and the conductive film 123 are formed of an element selected from tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), niobium (Nb), etc., or an alloy material or compound material having these elements as the main component, or an alloy material or compound material containing these elements and silicon (Si) element. Or, it is formed of polycrystalline silicon doped with impurity elements such as phosphorus. It is formed of a semiconductor material that can be used (for example, silicon (Si)). After forming the conductive film 122 and the conductive film 1 Taking an example of the combination of 23, a tantalum nitride film and a tungsten film, a tungsten nitride film and a tungsten film, a molybdenum nitride film and a molybdenum film, etc. can be mentioned. Since tungsten and tantalum nitride have high heat resistance, after forming the conductive film 122 and the conductive film 123, heat activation heating treatment for the purpose can be performed. Also, in the case of a three-layer structure instead of a two-layer structure it is advisable to adopt a laminated structure of a molybdenum film, an aluminum film, and a molybdenum film.

[0052] Next, a mask made of resist is formed using photolithography, and the conductive film 122 and the conductive film 123 are selectively etched to form the first conductive film 108, and then using the first conductive film 108 as a mask, an impurity element is introduced into the semiconductor film 106 to form a channel formation region 106a and an impurity region 106b (see FIG. 4(D)). The first conductive film 1 08 functions as a gate electrode (including a gate wiring) in the thin film transistor, and the impurity region 106b functions as a source region or a drain region in the thin film transistor.

[0053] Also, as the impurity element to be introduced, an n-type impurity element or a p-type impurity element is used. As the n-type impurity element, phosphorus (P), arsenic (As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used Here, phosphorus (P) is used as the impurity element to form an n-type thin film transistor .

[0054] Next, a reinforcing film 125 is formed so as to cover the first conductive film 108 and the gate insulating film 107 (See Fig. 4(E)).

[0055] For the reinforcing film 125, the same formation method and materials as those of the reinforcing film 103 can be appropriately used. Also, the film thickness of the reinforcing film 125 is preferably formed to be 100 nm or more and 400 nm or less.

[0056] Next, a mask made of resist is formed using photolithography, and the reinforcing film 109 is formed by selectively etching the reinforcing film 125 (see Fig. 5(A)). (See Fig. 5(A)). By providing the reinforcing film 109 formed of a material having a higher Young's modulus than that of the semiconductor film 106 and the reinforcing film 103 so as to sandwich the semiconductor film 106, in the thickness direction of the semiconductor device, the position of the neutral plane where no strain such as tensile stress or compressive stress occurs against deformations such as bending can be set at a position where stress can be suppressed from occurring in the semiconductor film 106. Therefore, even when an external force such as bending is applied to the semiconductor device, stress generation in the portion of the semiconductor film 106 can be suppressed.

[0057] Next, after forming an insulating film 110 that functions as an interlayer insulating film so as to cover the gate insulating film 107 and the reinforcing film 109, an opening 124 reaching the impurity region 106b of the semiconductor film 106 is formed to expose a part of the surface of the semiconductor film 106 (see Fig. 5(B)). Here, a part of the gate insulating film 107, the reinforcing film 109, and the insulating film 110 is etched to form the opening 124.

[0058] The insulating film 110 is an insulating film containing oxygen or nitrogen such as silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, a film containing carbon such as DLC (diamond-like carbon), or epoxy, ​​​​​​​​​​​It can be provided in a single-layer or laminated structure made of organic materials such as polyimide, polyamide, polyvinylphenol, benzocyclobutene, acrylic, etc. or siloxane materials such as siloxane resins.

[0059] Next, the second conductive film 111 is selectively formed so as to fill the opening 124, and an insulating film 112 is formed so as to cover the second conductive film 111 (see Fig. 5(C)).

[0060] The conductive film 111 is formed in a single layer or a laminate by a CVD method, a sputtering method, etc. using an element selected from aluminum (Al), tungsten (W), titanium (Ti), tantalum (Ta), molybdenum (Mo), nickel (Ni), platinum (Pt), copper (Cu), gold (Au), silver (Ag), manganese (Mn), neodymium (Nd), carbon (C), silicon (Si), or an alloy material or a compound material having these elements as main components. The alloy material having aluminum as the main component is, for example, a material having aluminum as the main component and containing nickel, or an alloy material having aluminum as the main component and containing one or both of nickel, carbon, and silicon. The conductive film 111 preferably adopts, for example, a laminated structure of a barrier film, an aluminum silicon (Al-Si) film, and a barrier film, or a laminated structure of a barrier film, an aluminum silicon (Al-Si) film, a titanium nitride film, and a barrier film. Note that the barrier film corresponds to a thin film made of titanium, a nitride of titanium, molybdenum, or a nitride of molybdenum. Since aluminum and aluminum silicon have low resistance values and are inexpensive, they are optimal as materials for forming the conductive film 111. Also, when upper and lower barrier layers are provided, aluminum and aluminum The generation of hillocks in silicon can be prevented. Further, even if a thin natural oxide film has formed on the crystalline semiconductor film when a barrier film made of titanium, which is an element with high reducibility, is formed, this natural oxide film can be reduced and good contact with the crystalline semiconductor film can be achieved. Note that it may be provided with the same material as the first conductive film 108. When forming a barrier film made of titanium, which is an element with high reducibility, even if a thin natural oxide film has formed on the crystalline semiconductor film, this natural oxide film can be reduced and good contact with the crystalline semiconductor film can be achieved. Note that it may be provided with the same material as the first conductive film 108.

[0061] The insulating film 112 can be provided in a single-layer or laminated structure made of an insulating film containing oxygen or nitrogen such as silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, a film containing carbon such as DLC (diamond-like carbon), or an organic material such as epoxy, polyimide, polyamide, polyvinylphenol, benzocyclobutene, acrylic, or a siloxane material such as siloxane resin. When forming a barrier film made of titanium, which is an element with high reducibility, even if a thin natural oxide film has formed on the crystalline semiconductor film, this natural oxide film can be reduced and good contact with the crystalline semiconductor film can be achieved. Note that it may be provided with the same material as the first conductive film 108. The insulating film 112 can be provided in a single-layer or laminated structure made of an insulating film containing oxygen or nitrogen such as silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, a film containing carbon such as DLC (diamond-like carbon), or an organic material such as epoxy, polyimide, polyamide, polyvinylphenol, benzocyclobutene, acrylic, or a siloxane material such as siloxane resin.

[0062] Next, the element formation layer 134 including the thin film transistors 100a, 100b, etc. is peeled off from the substrate 120. Here, after forming an opening in the element formation layer 134 by irradiating a laser beam (for example, UV light), one surface of the element formation layer 134 (the surface where the insulating film 112 is exposed) is bonded to the first sheet 126, and the element formation layer 134 is peeled off from the substrate 120 using physical force (see FIG. 6(A)). Next, the element formation layer 134 including the thin film transistors 100a, 100b, etc. is peeled off from the substrate 120. Here, after forming an opening in the element formation layer 134 by irradiating a laser beam (for example, UV light), one surface of the element formation layer 134 (the surface where the insulating film 112 is exposed) is bonded to the first sheet 126, and the element formation layer 134 is peeled off from the substrate 120 using physical force (see FIG. 6(A)). Next, the element formation layer 134 including the thin film transistors 100a, 100b, etc. is peeled off from the substrate 120. Here, after forming an opening in the element formation layer 134 by irradiating a laser beam (for example, UV light), one surface of the element formation layer 134 (the surface where the insulating film 112 is exposed) is bonded to the first sheet 126, and the element formation layer 134 is peeled off from the substrate 120 using physical force (see FIG. 6(A)). Next, the element formation layer 134 including the thin film transistors 100a, 100b, etc. is peeled off from the substrate 120. Here, after forming an opening in the element formation layer 134 by irradiating a laser beam (for example, UV light), one surface of the element formation layer 134 (the surface where the insulating film 112 is exposed) is bonded to the first sheet 126, and the element formation layer 134 is peeled off from the substrate 120 using physical force (see FIG. 6(A)). Next, the element formation layer 134 including the thin film transistors 100a, 100b, etc. is peeled off from the substrate 120. Here, after forming an opening in the element formation layer 134 by irradiating a laser beam (for example, UV light), one surface of the element formation layer 134 (the surface where the insulating film 112 is exposed) is bonded to the first sheet 126, and the element formation layer 134 is peeled off from the substrate 120 using physical force (see FIG. 6(A)).

[0063] Further, before peeling the element formation layer 134 from the substrate 120, an opening may be provided in the element formation layer 134, and an etchant may be introduced to remove the release layer 121. As the etchant, a gas or liquid containing a fluorinated halogen or an interhalogen compound can be used. For example, chlorine trifluoride (ClF3) can be used as the gas containing a fluorinated halogen. Further, before peeling the element formation layer 134 from the substrate 120, an opening may be provided in the element formation layer 134, and an etchant may be introduced to remove the release layer 121. As the etchant, a gas or liquid containing a fluorinated halogen or an interhalogen compound can be used. For example, chlorine trifluoride (ClF3) can be used as the gas containing a fluorinated halogen. Further, before peeling the element formation layer 134 from the substrate 120, an opening may be provided in the element formation layer 134, and an etchant may be introduced to remove the release layer 121. As the etchant, a gas or liquid containing a fluorinated halogen or an interhalogen compound can be used. For example, chlorine trifluoride (ClF3) can be used as the gas containing a fluorinated halogen. Further, before peeling the element formation layer 134 from the substrate 120, an opening may be provided in the element formation layer 134, and an etchant may be introduced to remove the release layer 121. As the etchant, a gas or liquid containing a fluorinated halogen or an interhalogen compound can be used. For example, chlorine trifluoride (ClF3) can be used as the gas containing a fluorinated halogen.

[0064] Generally, when peeling the element formation layer 134 from the substrate 120, stress is generated in the thin film transistors 100a and 1 00b, and there is a risk that the thin film transistors 100a and 100b may be damaged. However, by providing the reinforcing films 103 and 109 formed at a Young's modulus higher than that of the semiconductor film 106 in the semiconductor film 106 of the thin film transistor, even when an external force is applied to the element formation layer 134 due to bending or the like, the stress generated in the semiconductor film 106 can be suppressed. Therefore, damage and breakage of the thin film transistors 100a and 100b can be reduced. Particularly, when transferring elements such as transistors to another substrate after forming the elements on the support substrate, it is very effective to provide the reinforcing films 103 and 109. In addition, when peeling, by wetting the peeling surface with an aqueous solution such as water or ozone water, the elements such as the thin film transistors 100a and 100b can be prevented from being damaged by static electricity or the like.

[0065] Next, a second sheet 1 27 is provided on the other surface of the element formation layer 134 (the surface peeled from the substrate 120), and then one or both of heat treatment and pressure treatment are performed to bond the second sheet 127 to the element formation layer 134 (see FIG. 6(B)). The first sheet 126 and the second sheet 1 27 can be a hot melt film, a plastic film with an adhesive layer formed thereon, or paper.

[0066] Further, in order to improve the pressure resistance, the first sheet 126 and the second sheet 127 may be made of a thin ceramic, or a sheet in which a resin is impregnated into a woven fabric of carbon fiber or glass fiber, that is, a so-called prepreg may be used. The first sheet 126 and the second sheet 127 can be used. sheet 127 are bonded to each other (see FIG. 6(B)). The first sheet 126 and the second sheet 1 27 can be a hot melt film, a plastic film with an adhesive layer formed thereon, or paper. In addition, the first sheet 126 and the second sheet 127 may be made of a thin ceramic to improve the pressure resistance, or a sheet in which a resin is impregnated into a woven fabric of carbon fiber or glass fiber, that is, a so-called prepreg may be used. sheet 127 may be used. If a flexible material is used as the material of the sheet 127, a semiconductor device suitable for attaching to the curved surface of an article can be provided.

[0067] Further, as the first sheet 126 and the second sheet 127, a film provided with an antistatic measure (hereinafter referred to as an antistatic film) for preventing static electricity or the like can also be used. Examples of the antistatic film include a film in which an antistatic material is dispersed in a resin, and a film to which an antistatic material is attached. The film provided with an antistatic material may be a film provided with an antistatic material on one side, or a film provided with an antistatic material on both sides. Furthermore, the film provided with an antistatic material on one side may be attached to the layer so that the surface provided with the antistatic material is inside the film, or may be attached so that it is outside the film. Note that the antistatic material may be provided on the entire surface or a part of the film. Examples of the antistatic material here include metals, indium tin oxide (ITO), surfactants such as amphoteric surfactants, cationic surfactants, and nonionic surfactants. In addition, as an antistatic material, a resin material containing a crosslinked copolymer polymer having a carboxyl group and a quaternary ammonium base in the side chain can also be used. By attaching, kneading, or coating these materials on the film, an antistatic film can be obtained. By sealing the element formation layer with an antistatic film, it is possible to suppress the adverse effects on the semiconductor element caused by external static electricity or the like when handling as a product.

[0068] ​​​​​​​​Also, simultaneously with or after providing the second sheet 127, the first sheet 126 may be peeled off. By removing the first sheet 126, the semiconductor device can be formed thinner. In this case, as the first sheet 126, for example, a thermal release tape whose adhesive force weakens by applying heat can be used. Also, the first sheet and the second sheet may be referred to as a substrate, and the second sheet 127 corresponds to the substrate 101 in FIG. 1.

[0069] Through the above steps, a semiconductor device can be manufactured.

[0070] As described above, by providing a reinforcing film formed of a material having a higher Young's modulus than that of the semiconductor film near the upper and lower sides of the semiconductor film, in the thickness direction of the semiconductor device, the position of the neutral plane where no strain of tensile stress or compressive stress occurs due to deformation such as bending can be set at a position where stress generation in the semiconductor film is suppressed. That is, the position of the neutral plane of the semiconductor device can be set at a suitable position for the semiconductor device. Therefore, even when an external force such as bending is applied to the semiconductor device during the manufacturing process or during use after completion, the stress generated in elements such as transistors can be suppressed. Accordingly, damage to elements such as transistors can be reduced, and the yield and reliability of the semiconductor device can be improved.

[0071] In this embodiment, after forming a thin film transistor on a support substrate, the step of peeling the element from the support substrate and transferring it to another substrate is shown, but the manufacturing method shown in this embodiment is not limited to this. For example, directly on the substrate 101, thin film transistors 100a, 100b It may be provided. In this case, in the above-described process, the substrate 101 is used instead of the substrate 120 , and the release layer 121 does not need to be provided. As the substrate 101, a glass substrate, a quartz substrate, a metal substrate such as a stainless substrate, a plastic substrate, or the like can be used.

[0072] Further, the method for manufacturing the semiconductor device shown in this embodiment can be implemented in combination with the method for manufacturing the semiconductor device shown in other embodiments.

[0073] (Embodiment 3) In this embodiment, in the thin film transistor of the semiconductor device shown in the above Embodiment 1 and Embodiment 2, an insulating film is formed in contact with the side surface of the first conductive film that functions as a gate electrode, and the case where an LDD region is formed below the insulating film will be described with reference to the drawings.

[0074] An example of the semiconductor device shown in this embodiment is shown in FIG. 7. In FIG. 7, FIG. 7(A) shows a top view, and FIG. 7(B) shows a cross-sectional view taken along line A-B in FIG. 7(A).

[0075] The semiconductor device shown in this embodiment has thin film transistors 100a and 100b, and an insulating film 130 is provided in contact with the side surfaces of the first conductive films 108 that function as gate electrodes included in the thin film transistors 100a and 100b (see FIG. 7). The insulating film 130 is also called a sidewall, and a structure in which an LDD region is provided below the insulating film 130 can be formed. In FIG. 7(B), a structure in which an impurity region 106c that functions as the insulating film 130 and the LDD region is provided in the structure shown in FIG. 1 is shown.

[0076] Next, an example of the method for manufacturing the insulating film 130 will be described below with reference to FIG. 8.

[0077] First, after forming in the same manner up to FIG. 4(C) of the above Embodiment 2, a resist mask is formed by photolithography, and the conductive film 122 and the conductive film 123 are selectively etched to form the first conductive film 108. Next, a first impurity element is introduced into the semiconductor film 106 using the first conductive film 108 as a mask to form a channel formation region 106a and an impurity region 128 (see FIG. 8(A)). As the first impurity element, an n-type impurity element or a p-type impurity element is used. As the n-type impurity element, phosphorus (P), arsenic (As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Here, the case of forming an n-type thin film transistor using phosphorus (P) as the impurity element is shown. to form a resist mask made of resist, and selectively etch the conductive film 122 and the conductive film 123 to form the first conductive film 108. Next, a first impurity element is introduced into the semiconductor film 106 using the first conductive film 108 as a mask to form a channel formation region 106a and an impurity region 128 (see FIG. 8(A)). As the first impurity element, an n-type impurity element or a p-type impurity element is used. As the n-type impurity element, phosphorus (P), arsenic (As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Here, the case of forming an n-type thin film transistor using phosphorus (P) as the impurity element is shown. to form the first conductive film 108. Next, a first impurity element is introduced into the semiconductor film 106 using the first conductive film 108 as a mask to form a channel formation region 106a and an impurity region 128 (see FIG. 8(A)). As the first impurity element, an n-type impurity element or a p-type impurity element is used. As the n-type impurity element, phosphorus (P), arsenic (As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Here, the case of forming an n-type thin film transistor using phosphorus (P) as the impurity element is shown. to introduce a first impurity element into the semiconductor film 106 using the first conductive film 108 as a mask to form a channel formation region 106a and an impurity region 128 (see FIG. 8(A)). As the first impurity element, an n-type impurity element or a p-type impurity element is used. As the n-type impurity element, phosphorus (P), arsenic (As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Here, the case of forming an n-type thin film transistor using phosphorus (P) as the impurity element is shown. to form a channel formation region 106a and an impurity region 128 (see FIG. 8(A)). As the first impurity element, an n-type impurity element or a p-type impurity element is used. As the n-type impurity element, phosphorus (P), arsenic (As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Here, the case of forming an n-type thin film transistor using phosphorus (P) as the impurity element is shown. element or a p-type impurity element is used. As the n-type impurity element, phosphorus (P), arsenic (As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Here, the case of forming an n-type thin film transistor using phosphorus (P) as the impurity element is shown. As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Here, the case of forming an n-type thin film transistor using phosphorus (P) as the impurity element is shown. m (Al), gallium (Ga), etc. can be used. Here, the case of forming an n-type thin film transistor using phosphorus (P) as the impurity element is shown. phosphorus (P) is used as the impurity element, and the case of forming an n-type thin film transistor is shown.

[0078] Next, an insulating film 129 is formed so as to cover the first conductive film 108 and the gate insulating film 107 (see FIG. 8(B)). The insulating film 129 is formed by laminating a single layer or multiple layers of a film containing an inorganic material such as silicon, silicon oxide, or silicon nitride, or a film containing an organic material such as an organic resin by a plasma CVD method, a sputtering method, or the like. Next, an insulating film 129 is formed to cover the first conductive film 108 and the gate insulating film 107 (see FIG. 8(B)). The insulating film 129 is formed by laminating a single layer or multiple layers of a film containing an inorganic material such as silicon, silicon oxide, or silicon nitride, or a film containing an organic material such as an organic resin by a plasma CVD method, a sputtering method, or the like. Next, an insulating film 129 is formed to cover the first conductive film 108 and the gate insulating film 107 (see FIG. 8(B)). The insulating film 129 is formed by laminating a single layer or multiple layers of a film containing an inorganic material such as silicon, silicon oxide, or silicon nitride, or a film containing an organic material such as an organic resin by a plasma CVD method, a sputtering method, or the like. Next, an insulating film 129 is formed to cover the first conductive film 108 and the gate insulating film 107 (see FIG. 8(B)). The insulating film 129 is formed by laminating a single layer or multiple layers of a film containing an inorganic material such as silicon, silicon oxide, or silicon nitride, or a film containing an organic material such as an organic resin by a plasma CVD method, a sputtering method, or the like.

[0079] Next, the insulating film 129 is selectively etched by anisotropic etching mainly in the vertical direction to form an insulating film 130 (sidewall) in contact with the side surface of the first conductive film 108. Note that, simultaneously with the formation of the insulating film 130, a part of the gate insulating film 107 or a part of the insulating film 104 may be etched and removed (see FIG. 8(C)). When a part of the gate insulating film 107 is removed, the remaining gate insulating film 107 is the first conductive film Next, the insulating film 129 is selectively etched by anisotropic etching mainly in the vertical direction to form an insulating film 130 (sidewall) in contact with the side surface of the first conductive film 108. Note that, simultaneously with the formation of the insulating film 130, a part of the gate insulating film 107 or a part of the insulating film 104 may be etched and removed (see FIG. 8(C)). When a part of the gate insulating film 107 is removed, the remaining gate insulating film 107 is the first conductive film Next, the insulating film 129 is selectively etched by anisotropic etching mainly in the vertical direction to form an insulating film 130 (sidewall) in contact with the side surface of the first conductive film 108. Note that, simultaneously with the formation of the insulating film 130, a part of the gate insulating film 107 or a part of the insulating film 104 may be etched and removed (see FIG. 8(C)). When a part of the gate insulating film 107 is removed, the remaining gate insulating film 107 is the first conductive film Next, the insulating film 129 is selectively etched by anisotropic etching mainly in the vertical direction to form an insulating film 130 (sidewall) in contact with the side surface of the first conductive film 108. Note that, simultaneously with the formation of the insulating film 130, a part of the gate insulating film 107 or a part of the insulating film 104 may be etched and removed (see FIG. 8(C)). When a part of the gate insulating film 107 is removed, the remaining gate insulating film 107 is the first conductive film film 108. It is formed below the electroconductive film 108 and the insulating film 130.

[0080] Next, using the first conductive film 108 and the insulating film 130 as masks, a second impurity element is introduced into the semiconductor film 106 to form an impurity region 106b that functions as a source region or a drain region and an impurity region 106c that functions as an LDD region (see Fig. 8(C)). As the second impurity element, an n-type impurity element or a p-type impurity element is used. As the n-type impurity element, phosphorus (P), arsenic (As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Also, the second impurity element is introduced with a higher concentration than the above-described first impurity element. Here, phosphorus (P) is used as the impurity element. It is formed below the electroconductive film 108 and the insulating film 130. Next, using the first conductive film 108 and the insulating film 130 as masks, a second impurity element is introduced into the semiconductor film 106 to form an impurity region 106b that functions as a source region or a drain region and an impurity region 106c that functions as an LDD region (see Fig. 8(C)). As the second impurity element, an n-type impurity element or a p-type impurity element is used. As the n-type impurity element, phosphorus (P), arsenic (As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Also, the second impurity element is introduced with a higher concentration than the above-described first impurity element. Here, phosphorus (P) is used as the impurity element. Next, using the first conductive film 108 and the insulating film 130 as masks, a second impurity element is introduced into the semiconductor film 106 to form an impurity region 106b that functions as a source region or a drain region and an impurity region 106c that functions as an LDD region (see Fig. 8(C)). As the second impurity element, an n-type impurity element or a p-type impurity element is used. As the n-type impurity element, phosphorus (P), arsenic (As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Also, the second impurity element is introduced with a higher concentration than the above-described first impurity element. Here, phosphorus (P) is used as the impurity element. Next, using the first conductive film 108 and the insulating film 130 as masks, a second impurity element is introduced into the semiconductor film 106 to form an impurity region 106b that functions as a source region or a drain region and an impurity region 106c that functions as an LDD region (see Fig. 8(C)). As the second impurity element, an n-type impurity element or a p-type impurity element is used. As the n-type impurity element, phosphorus (P), arsenic (As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Also, the second impurity element is introduced with a higher concentration than the above-described first impurity element. Here, phosphorus (P) is used as the impurity element. Next, using the first conductive film 108 and the insulating film 130 as masks, a second impurity element is introduced into the semiconductor film 106 to form an impurity region 106b that functions as a source region or a drain region and an impurity region 106c that functions as an LDD region (see Fig. 8(C)). As the second impurity element, an n-type impurity element or a p-type impurity element is used. As the n-type impurity element, phosphorus (P), arsenic (As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Also, the second impurity element is introduced with a higher concentration than the above-described first impurity element. Here, phosphorus (P) is used as the impurity element. Next, using the first conductive film 108 and the insulating film 130 as masks, a second impurity element is introduced into the semiconductor film 106 to form an impurity region 106b that functions as a source region or a drain region and an impurity region 106c that functions as an LDD region (see Fig. 8(C)). As the second impurity element, an n-type impurity element or a p-type impurity element is used. As the n-type impurity element, phosphorus (P), arsenic (As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Also, the second impurity element is introduced with a higher concentration than the above-described first impurity element. Here, phosphorus (P) is used as the impurity element. Next, using the first conductive film 108 and the insulating film 130 as masks, a second impurity element is introduced into the semiconductor film 106 to form an impurity region 106b that functions as a source region or a drain region and an impurity region 106c that functions as an LDD region (see Fig. 8(C)). As the second impurity element, an n-type impurity element or a p-type impurity element is used. As the n-type impurity element, phosphorus (P), arsenic (As), etc. can be used. As the p-type impurity element, boron (B), aluminum (Al), gallium (Ga), etc. can be used. Also, the second impurity element is introduced with a higher concentration than the above-described first impurity element. Here, phosphorus (P) is used as the impurity element.

[0081] Next, a reinforcing film 109 is formed so as to cover the semiconductor film 106, the first conductive film 108, and the insulating film 130 (see Fig. 8(D)). The method of forming the reinforcing film 109 is the same as that shown in Figs. 4(E) and 5(A). Then, through the steps shown in Figs. 5(B), 5(C), and 6 in the above-described Embodiment 2, the semiconductor device shown in Fig. 7 can be manufactured. Next, a reinforcing film 109 is formed so as to cover the semiconductor film 106, the first conductive film 108, and the insulating film 130 (see Fig. 8(D)). The method of forming the reinforcing film 109 is the same as that shown in Figs. 4(E) and 5(A). Then, through the steps shown in Figs. 5(B), 5(C), and 6 in the above-described Embodiment 2, the semiconductor device shown in Fig. 7 can be manufactured. Next, a reinforcing film 109 is formed so as to cover the semiconductor film 106, the first conductive film 108, and the insulating film 130 (see Fig. 8(D)). The method of forming the reinforcing film 109 is the same as that shown in Figs. 4(E) and 5(A). Then, through the steps shown in Figs. 5(B), 5(C), and 6 in the above-described Embodiment 2, the semiconductor device shown in Fig. 7 can be manufactured. Next, a reinforcing film 109 is formed so as to cover the semiconductor film 106, the first conductive film 108, and the insulating film 130 (see Fig. 8(D)). The method of forming the reinforcing film 109 is the same as that shown in Figs. 4(E) and 5(A). Then, through the steps shown in Figs. 5(B), 5(C), and 6 in the above-described Embodiment 2, the semiconductor device shown in Fig. 7 can be manufactured.

[0082] Thus, by providing the reinforcing film 103 and the reinforcing film 109 formed of a material having a higher Young's modulus than that of the semiconductor film 106 so as to sandwich the semiconductor film 106, in the thickness direction of the semiconductor device, the position of the neutral plane can be set to a position where stress generation in the semiconductor film 106 can be suppressed. Therefore, even when an external force such as bending is applied to the semiconductor device, stress generation in the semiconductor film 106 can be suppressed. Also, a material having a higher Young's modulus than the semiconductor film Thus, by providing the reinforcing film 103 and the reinforcing film 109 formed of a material having a higher Young's modulus than that of the semiconductor film 106 so as to sandwich the semiconductor film 106, in the thickness direction of the semiconductor device, the position of the neutral plane can be set to a position where stress generation in the semiconductor film 106 can be suppressed. Therefore, even when an external force such as bending is applied to the semiconductor device, stress generation in the semiconductor film 106 can be suppressed. Also, a material having a higher Young's modulus than the semiconductor film Thus, by providing the reinforcing film 103 and the reinforcing film 109 formed of a material having a higher Young's modulus than that of the semiconductor film 106 so as to sandwich the semiconductor film 106, in the thickness direction of the semiconductor device, the position of the neutral plane can be set to a position where stress generation in the semiconductor film 106 can be suppressed. Therefore, even when an external force such as bending is applied to the semiconductor device, stress generation in the semiconductor film 106 can be suppressed. Also, a material having a higher Young's modulus than the semiconductor film Thus, by providing the reinforcing film 103 and the reinforcing film 109 formed of a material having a higher Young's modulus than that of the semiconductor film 106 so as to sandwich the semiconductor film 106, in the thickness direction of the semiconductor device, the position of the neutral plane can be set to a position where stress generation in the semiconductor film 106 can be suppressed. Therefore, even when an external force such as bending is applied to the semiconductor device, stress generation in the semiconductor film 106 can be suppressed. Also, a material having a higher Young's modulus than the semiconductor film Thus, by providing the reinforcing film 103 and the reinforcing film 109 formed of a material having a higher Young's modulus than that of the semiconductor film 106 so as to sandwich the semiconductor film 106, in the thickness direction of the semiconductor device, the position of the neutral plane can be set to a position where stress generation in the semiconductor film 106 can be suppressed. Therefore, even when an external force such as bending is applied to the semiconductor device, stress generation in the semiconductor film 106 can be suppressed. Also, a material having a higher Young's modulus than the semiconductor film By providing a reinforcing film formed thereon near the top and bottom of the semiconductor film, the properties of the semiconductor film can be changed without changing, the mechanical strength of the semiconductor film can be increased. Therefore, elements such as transistors damage can be reduced, and the yield and reliability of the semiconductor device can be improved

[0083] In FIGS. 7 and 8, an example is shown in which an insulating film 104 is formed on the island-shaped reinforcing film 103 and an island-shaped semiconductor film 106 is provided. However, the present invention is not limited to this. As shown in FIGS. 9(A) and 9(B), a structure in which a semiconductor film 106 is provided on the reinforcing film 103 may also be used

[0084] FIG. 9(A) shows an island-shaped semiconductor film 106 provided on an island-shaped reinforcing film 103, and a gate insulating film 107 is provided with an opening, and in the opening, the island-shaped reinforcing film 103 and the island-shaped reinforcing film 109 are in contact with each other. FIG. 9(B) shows an island-shaped semiconductor film 106 provided on an island-shaped reinforcing film 103, and an insulating film 130 is provided in contact with the side surface of a first conductive film 108 that functions as a gate electrode A reinforcing film 109 is provided so as to cover the insulating film 102, the island-shaped reinforcing film 103, the semiconductor film 106, the insulating film 130, and the first conductive film 108, and the island-shaped reinforcing film 103 and the island-shaped reinforcing film 109 are in contact with each other By sandwiching the semiconductor film 106 with the reinforcing film 103 and the reinforcing film 109 formed of a material having a higher Young's modulus than that of the semiconductor film 106, in the thickness direction of the semiconductor device it is possible to set the position of the neutral plane to a position where stress generation in the semiconductor film 106 can be suppressed

[0085] Thus, even when an external force such as bending is applied to the semiconductor device, stress generation in the semiconductor film 106 can be suppressed. Further, a material having a higher Young's modulus than that of the semiconductor film In FIG. 37, the position of the neutral plane can be set to a position where stress generation in the semiconductor film 106 can be suppressed Therefore, even when an external force such as bending is applied to the semiconductor device, stress generation in the semiconductor film 106 can be suppressed. Also, a material having a higher Young's modulus than that of the semiconductor film By providing a reinforcing film formed thereby in the vicinity of the upper and lower sides of the semiconductor film, the properties of the semiconductor film can be changed without, and the mechanical strength of the semiconductor film can be increased. Further, by providing the reinforcing film 103 and the reinforcing film 109 so as to be in contact with each other, the semiconductor film 106 can be prevented from being exposed to impurities and moisture . Therefore, damage to elements such as transistors can be reduced, and the yield and reliability of the semiconductor device can be improved.

[0086] In this way, by adopting the structure shown in FIGS. 7 to 9, even when an external force such as bending is applied to the semiconductor device during the manufacturing process or in use after completion, the stress generated in elements such as transistors can be suppressed. Therefore, damage to elements such as transistors can be reduced, and the yield and reliability of the semiconductor device can be improved.

[0087] In addition, the configuration of the semiconductor device or the method of manufacturing the same shown in the present embodiment can be implemented in combination with the configuration or the method of manufacturing the semiconductor device shown in other embodiments .

[0088] (Embodiment 4) In the present embodiment, a semiconductor device different from the above-described embodiment will be described with reference to the drawings . In Embodiments 1 to 3, an example in which the reinforcing film 103 is provided so as to overlap the entire surface of the semiconductor film 106 has been shown. However, the semiconductor device of the present embodiment is not limited to this structure, and the reinforcing film 103 and the semiconductor film 106 may have a structure in which at least a part thereof overlaps. An example thereof will be described with reference to FIG. 10. In FIG. 10, FIG. 10(A) shows a top view, and FIG. 10(B) shows a cross-sectional view taken along line A-B in FIG. 10(A).

[0089] In the semiconductor device shown in FIG. 10, the reinforcing film 103 is provided in an island shape so as to overlap a part of the island-shaped semiconductor film 106 constituting the thin film transistors 100a and 100 b with the insulating film 104 interposed therebetween. Also, when provided in this way, it is preferable that the reinforcing film 103 overlaps the entire surface of the channel formation region 106a of the semiconductor film 106 and a part of the impurity region 106b. Since a step is generated because the conductive film 108 that functions as a gate electrode at the end of the channel formation region 106a straddles the semiconductor film 106, and further, if the reinforcing film 103 is provided so as to overlap a part of the channel formation region 106a, the conductive film 108 and the semiconductor film 106 may be short-circuited. At the end of the channel formation region 106a, a conductive film 108 that functions as a gate electrode straddles the semiconductor film 106, creating a step. Additionally, if the reinforcing film 103 is provided to overlap a part of the channel formation region 106a, there is a risk of short-circuiting between the conductive film 108 and the semiconductor film 106 for this reason.

[0090] Also, when the reinforcing film 103 is provided so as to overlap a part of the semiconductor film 106, it is preferable to provide the reinforcing film 10 3 and the second conductive film 111 so as to overlap. In FIG. 10, an example is shown in which the ends of the reinforcing film 10 3 and the second conductive film 111 overlap. By providing the reinforcing films 103 and 109 so as to overlap the second conductive film 111, in the thickness direction of the semiconductor device, the position of the neutral plane where no strain of tensile stress or compressive stress occurs against deformation such as bending can be set to a position where stress generation in the semiconductor film can be suppressed. Therefore, even when an external force such as bending is applied to the semiconductor device during the manufacturing process or during use after completion, the stress generated in elements such as transistors can be suppressed. Thus, damage to elements such as transistors can be reduced, and the yield and reliability of the semiconductor device can be improved. Therefore, even when an external force such as bending is applied to the semiconductor device during the manufacturing process or during use after completion, the stress generated in elements such as transistors can be suppressed. Thus, damage to elements such as transistors can be reduced, and the yield and reliability of the semiconductor device can be improved.

[0091] (Embodiment 5) In this embodiment, a semiconductor device different from the above embodiment will be described with reference to the drawings. Specifically, a semiconductor device provided with a film serving as a reinforcing film for elements such as transistors above the thin film transistor will be described.

[0092] An example of the semiconductor device shown in this embodiment will be described with reference to FIG. 11.

[0093] In the semiconductor device shown in FIG. 11, a reinforcing film 133 is provided above the thin film transistors 100a and 100b via an insulating film (here, the insulating film 110). The reinforcing film 133 is provided in an island shape so as to overlap with the island-shaped semiconductor film 106 constituting the thin film transistors 100a and 100b via the insulating film and the like, and is provided so as to have a larger area than the semiconductor film 106. Of course, the reinforcing film 133 does not necessarily have a structure that overlaps the entire surface of the semiconductor film 106, and may be provided so that at least the reinforcing film 133 overlaps a part of the semiconductor film 106.

[0094] In this way, by providing the reinforcing film 103 and the reinforcing film 109 formed of a material having a higher Young's modulus than that of the semiconductor film 106 so as to sandwich the semiconductor film 106, in the thickness direction of the semiconductor device, the position of the neutral plane can be set to a position where stress generation in the semiconductor film 106 is suppressed. Therefore, even when an external force such as bending is applied to the semiconductor device, stress generation in the semiconductor film 106 can be suppressed. Further, by providing a reinforcing film formed of a material having a higher Young's modulus than that of the semiconductor film in the vicinity of the upper and lower sides of the semiconductor film, the mechanical strength of the semiconductor film can be increased without changing the properties of the semiconductor film. Therefore, damage to elements such as transistors can be reduced, and the yield and reliability of the semiconductor device can be improved. ​​​​​​​​​​​​​

[0095] Note that the configuration of the semiconductor device shown in this embodiment can be implemented in combination with the configuration of the semiconductor device shown in other embodiments.

[0096] (Embodiment 6) In this embodiment, an example of the usage form of the semiconductor device shown in the above embodiment will be described. Specifically, with reference to the drawings, an application example of a semiconductor device capable of non-contact data input / output will be described below. A semiconductor device capable of non-contact data input / output is also called an RFID tag, ID tag, IC tag, IC chip, RF tag, wireless tag, electronic tag, or wireless chip depending on its usage state.

[0097] An example of the upper surface structure of the semiconductor device shown in this embodiment will be described with reference to FIG. 12(A). The semiconductor device 140 shown in FIG. 12(A) includes an integrated circuit 141 (also referred to as an element formation layer) provided with elements such as a plurality of thin film transistors that constitute a memory portion and a logic portion, and a conductive layer 142 that functions as an antenna. The conductive layer 142 that functions as an antenna is electrically connected to the integrated circuit 141. Elements such as the transistors according to Embodiments 1 to 5 can be applied to the integrated circuit 141.

[0098] Also, FIGS. 12(B) and (C) show schematic cross-sectional views of FIG. 12(A). The conductive layer 142 that functions as an antenna may be provided above the elements that constitute the memory portion and the logic portion. For example, a conductive layer 142 that functions as an antenna can be provided via an insulating film 143 above the structure shown in Embodiment 3 (see FIG. 12(B)). The insulating film 143 is an implementation It can be formed of the same material as the insulating film 112 shown in Form 1. Additionally, after separately providing a conductive layer 142 that functions as an antenna on a substrate 144, the substrate 144 and the integrated circuit 1 41 can be provided by bonding them together such that the conductive layer 142 is positioned therebetween (see Fig. 12( C)). Here, the conductive layer 147 provided on the insulating film 143 and the conductive layer 142 that functions as an antenna are electrically connected via the conductive particles 145 contained in the resin 146 having adhesiveness.

[0099] In this embodiment, an example is shown in which the conductive layer 142 that functions as an antenna is provided in a coil shape and the electromagnetic induction method or the electromagnetic coupling method is applied. However, the semiconductor device of this embodiment is not limited to this and the microwave method can also be applied. In the case of the microwave method, the shape of the conductive layer 142 that functions as an antenna may be appropriately determined according to the wavelength of the electromagnetic wave used. For example, when applying the microwave method (e.g., the U HF band (860 MHz band to 960 MHz band), 2.45 GHz band, etc.) as the signal transmission method in the semiconductor device 140, the shape such as the length of the conductive layer that functions as an antenna may be appropriately set in consideration of the wavelength of the electromagnetic wave used for signal transmission. For example, the conductive layer that functions as an antenna can be formed in a linear shape (e.g.,

[0100] a dipole antenna (see Fig. 13(A)), a flat shape (e.g., a patch antenna (see Fig. 1 3(B)), or a ribbon-type shape (see Figs. 13(C) and (D)), etc.). Further, the shape of the conductive layer 142 that functions as an antenna is not limited to a linear shape and may be provided in a curved shape, a meandering shape, or a combination of these in consideration of the wavelength of the electromagnetic wave.

[0101] ​​​​​​​​​​The conductive layer 142 that functions as an antenna is formed of a conductive material using a method such as a CVD method, a sputtering method, a printing method such as screen printing, via printing, a droplet discharge method, a dispenser method, or a plating method. The conductive material is formed of aluminum (Al), titanium (Ti), silver (Ag), copper (Cu), gold (Au), platinum (Pt), nickel (Ni), palladium (Pd), tantalum (Ta), molybdenum (Mo), or other metal elements, or an alloy material or compound material containing the metal element, and is formed in a single-layer structure or a laminated structure.

[0102] For example, when forming the conductive layer 142 that functions as an antenna using the screen printing method, it can be provided by selectively printing a conductive paste in which conductive particles having a particle size of several nm to several tens of μm are dissolved or dispersed in an organic resin. As the conductive particles 145, any one or more of metal particles such as silver (Ag), gold (Au), copper (Cu), nickel (Ni), platinum (Pt), palladium (Pd), tantalum (Ta), molybdenum (Mo), and titanium (Ti), fine particles of silver halide, or dispersible nanoparticles can be used. In addition, as the organic resin contained in the conductive paste, one or more selected from organic resins that function as a binder, solvent, dispersant, and coating material for the metal particles can be used. Typically, organic resins such as epoxy resins and silicone resins can be mentioned. Further, when forming the conductive layer, it is preferable to bake the conductive paste after extruding it. For example, when using fine particles having silver as a main component (for example, fine particles having a particle size of 1 nm or more and 100 nm or less) as the material of the conductive paste, baking in a temperature range of 150°C to 300°C can be performed. It can be cured to form a conductive layer. It is also made of solder or lead-free solder. In this case, it is preferable to use fine particles having a particle size of 20 μm or less. Solder and lead-free solder have the advantage of being low cost.

[0103] In this way, by applying the present invention to a semiconductor device capable of inputting and outputting data without contact, This is particularly effective when used in small semiconductor devices, as it allows for low power consumption. be.

[0104] Next, an example of the operation of the semiconductor device according to the present embodiment will be described.

[0105] The semiconductor device 80 has a function of contactlessly exchanging data, and includes a high-frequency circuit 81, a power supply circuit 8 2, reset circuit 83, clock generation circuit 84, data demodulation circuit 85, data modulation circuit 8 6, a control circuit 87 for controlling other circuits, a memory circuit 88, and an antenna 89 (See FIG. 14(A)). The high-frequency circuit 81 receives a signal from an antenna 89 and modulates the data. The power supply circuit 82 is a circuit that outputs a signal received from the circuit 86 through an antenna 89. The reset circuit 83 is a circuit that generates a power supply potential from a reset signal. The clock generating circuit 84 generates various clocks based on the received signal input from the antenna 89. The data demodulation circuit 85 demodulates the received signal and outputs it to the control circuit 87. The data modulation circuit 86 modulates the signal received from the control circuit 87. The control circuit 87 includes, for example, a chord extraction circuit 91, a chord determination circuit 92, a CRC determination circuit 93 and an output unit circuit 94 are provided. The extraction circuit 91 extracts each of a plurality of codes included in the instruction sent to the control circuit 87. The code determination circuit 92 is a circuit that determines the content of the instruction by comparing the extracted code with a code corresponding to a reference. The CRC determination circuit 93 is a circuit that detects the presence or absence of a transmission error or the like based on the determined code. In FIG. 14(A), in addition to the control circuit 87, it includes a high-frequency circuit 81, which is an analog circuit, and a power supply circuit 82.

[0106] Next, an example of the operation of the semiconductor device described above will be described. First, a radio signal is received by the antenna 89. The radio signal is sent to the power supply circuit 82 via the high-frequency circuit 81, and a high power supply potential (hereinafter referred to as VDD) is generated. VDD is supplied to each circuit included in the semiconductor device 80. Also, the signal sent to the data demodulation circuit 85 via the high-frequency circuit 81 is demodulated (hereinafter referred to as a demodulated signal). Furthermore, the signal that has passed through the reset circuit 83 and the demodulated signal that has passed through the clock generation circuit 84 via the high-frequency circuit 81 are sent to the control circuit 87. The signal sent to the control circuit 87 is analyzed by the code extraction circuit 91, the code determination circuit 92, the CRC determination circuit 93, and the like. Then, according to the analyzed signal, the information of the semiconductor device stored in the memory circuit 88 is output. The output information of the semiconductor device is encoded through the output unit circuit 94. Furthermore, the encoded information of the semiconductor device 80 is sent through the data modulation circuit 86 and loaded onto a radio signal by the antenna 89 for transmission. Note that in a plurality of circuits constituting the semiconductor device 80, a low power supply potential (hereinafter referred to as VSS) is common, and VSS can be set to GND.

[0107] In this way, by sending a signal from the reader / writer to the semiconductor device 80 and receiving the signal sent from the semiconductor device 80 by the reader / writer, it becomes possible to read the data of the semiconductor device.

[0108] Also, the semiconductor device 80 may be of a type that supplies the power voltage to each circuit by electromagnetic waves without mounting a power source (battery), or may be of a type that mounts a power source (battery) and supplies the power voltage to each circuit by electromagnetic waves and the power source (battery).

[0109] Next, an example of the usage form of a semiconductor device capable of non-contact data input / output will be described. On the side surface of the mobile terminal including the display unit 3210, a reader / writer 3200 is provided, and on the side surface of the item 3220, a semiconductor device 3230 is provided (see Fig. 14(B)). When the reader / writer 3200 is held over the semiconductor device 3230 included in the item 322 0, information about the item, such as the raw materials and origin of the item, inspection results for each production process, history of the distribution process, and further product descriptions, etc., is displayed on the display unit 3210. Also, when the product 3260 is conveyed by a belt conveyor, the product 3260 can be inspected using the reader / writer 3240 and the semiconductor device 3250 provided in the product 3260 (see Fig. 14(C)). As the semiconductor device 3230 and the semiconductor device 3250, the above-described semiconductor device 80 can be applied. In this way, by utilizing the semiconductor device according to the present embodiment in the system, information acquisition can be easily performed, and high functionality and high added value can be realized. Also, since the semiconductor device according to the present embodiment can achieve low power consumption, it is possible to miniaturize the semiconductor device provided in the item.

[0110] ​​​​​​​​​ In addition to the above, the semiconductor device according to this embodiment has a wide range of applications. As long as it is a product that can clarify information such as the history of an object without contact and is useful for production, management, etc., it can be applied to any product. The semiconductor device according to this embodiment can reduce damage to elements such as transistors even when an external force such as bending is applied. Therefore, it can be provided and used for any article (including living things).

[0111] (Embodiment 7) In this embodiment, an example of the usage form of the semiconductor device of the above embodiment will be described. The semiconductor device can be used, for example, as a so-called IC label, IC tag, or IC card provided on articles such as banknotes, coins, securities, bearer bonds, certificates (driver's licenses, resident cards, etc.), packaging containers (wrapping paper, bottles, etc.), recording media (DVD software, video tapes, etc.), vehicles (bicycles, etc.), personal belongings (bags, glasses, etc.), foods, plants, animals, the human body, clothes, daily necessities, electronic devices, and tags attached to goods or luggage.

[0112] Note that in this specification, an IC card is a card in which an integrated circuit (for example, an IC chip) thinned into a plastic card is embedded so that information can be recorded. Depending on the method of reading and writing data, it is divided into "contact type" and "non-contact type". The non-contact card has a built-in antenna and can communicate with a terminal using a weak radio wave. An IC tag is a minute IC chip used for identifying an object (an IC chip for this purpose is also referred to as an "ID chip"). Information such as its own identification code is recorded on the IC tag. It refers to something that has the ability to transmit and receive information with a management system using radio waves. A few dozen millimeters in size, it can communicate with a reader using radio waves or electromagnetic waves. There are various forms of IC tags used in semiconductor devices that communicate data through wireless communication, such as card-type ones, labels (referred to as IC labels), and certificates.

[0113] In this embodiment, with reference to FIG. 15, an application example of the semiconductor device of the above embodiment, and an example of a product with such a semiconductor device attached will be described.

[0114] FIG. 15(A) shows an example of the state of a finished semiconductor device. A plurality of IC labels 3003 incorporating a semiconductor device 3002 are formed on a label backing paper 3001 (separator paper). The IC labels 3003 are housed in a box 3004. Also, information regarding the product or service (product name, brand, trademark, trademark owner, seller, manufacturer, etc.) is written on the IC label 3003. On the other hand, the semiconductor device incorporated therein is assigned a unique ID number for that product (or type of product), and it is possible to easily detect illegal acts such as forgery, infringement of intellectual property rights such as trademark rights and patent rights, and unfair competition. Also, within the semiconductor device a great deal of information that cannot be fully described on the product's container or label can be input, such as the origin of the product, sales location, quality, raw materials, efficacy, usage, quantity, shape, price, production method, usage method, production date, usage date, shelf life, handling instructions, intellectual property information regarding the product, etc. Traders and consumers can access this information using a simple reader device. Also, although it can be easily rewritten or erased from the producer side, it is configured so that traders and consumers cannot rewrite or erase it. ​

[0115] FIG. 15(B) shows a label-shaped IC tag 3011 incorporating a semiconductor device 3012. By attaching the IC tag 3011 to a product, product management becomes easier. For example, when a product is stolen, the culprit can be quickly identified by tracing the route of the product. In this way, by providing an IC tag, a product with so-called excellent traceability can be distributed.

[0116] FIG. 15(C) is an example of the completed state of an IC card 3021 containing a semiconductor device 3022. Examples of the above IC card 3021 include all kinds of cards such as cash cards, credit cards, prepaid cards, electronic train tickets, electronic money, telephone cards, membership cards, etc.

[0117] In the IC card shown in FIG. 15(C), by using a thin film transistor as the transistor constituting the semiconductor device, it can be used even if it is deformed into a bent shape as shown in FIG. 15(D).

[0118] FIG. 15(E) shows the completed state of a bearer bond 3031. A semiconductor device 3032 is embedded in the bearer bond 3031, and the periphery thereof is molded with resin to protect the semiconductor device. Here, the resin is filled with a filler. The bearer bond 3031 can be created in the same manner as an IC label, IC tag, or IC card. Incidentally, the above bearer bonds include stamps, tickets, tickets, admission tickets, gift certificates, book coupons, stationery coupons, beer coupons, rice coupons, various gift coupons, various service coupons, etc., but of course this It is not limited to these. Also, by providing the semiconductor device 3032 in banknotes, coins, securities, bearer bonds, certificates, etc., an authentication function can be provided, and forgery can be prevented by utilizing this authentication function.

[0119]

[0120]

[0120]

[0121] , can be reused.

[0122] Also, although not shown here, by providing a semiconductor device in books, packaging containers, recording media, personal items, food products, clothes, daily necessities, electronic devices, etc., the efficiency of systems such as inspection systems can be improved. Also, by providing a semiconductor device in vehicles, forgery and theft can be prevented. Further, by embedding it in living things such as animals, the identification of individual living things can be easily performed. For example, by embedding a wireless tag in a living thing such as livestock, it becomes possible to easily identify the year of birth, gender, or species, etc.

[0123] As described above, the semiconductor device of the above embodiment can reduce damage to elements such as transistors even when an external force such as bending is applied. Therefore, it can be provided and used for any article (including living things).

[0124] (Embodiment 8) In this embodiment, an example of the usage form of the semiconductor device of the above embodiment will be described. The semiconductor device of the above embodiment can be made flexible by peeling it from the fabricated substrate. Hereinafter, a specific example of an electronic device having the semiconductor device of the above embodiment will be described with reference to FIG. 16. The electronic device refers to a liquid crystal display device, an EL display device, a television device (also simply called a television, a television receiver, or a television set), and a mobile phone, etc.

[0125] FIG. 16(A) is a display 4101, including a support base 4102 and a display unit 4103. The display unit 4103 is formed using a flexible substrate and is a lightweight and thin display. A ray can be realized. Also, the display unit 4103 can be curved, and it is also possible to remove it from the support base 410 2 and attach the display along the curved wall. The semiconductor device shown in the above embodiment is used for integrated circuits such as the display unit 4103 and peripheral drive circuits, etc. By doing so, a flexible display, which is one of the usage forms of the semiconductor device, can be fabricated. In this way, the flexible display can be installed not only on a flat surface but also on a curved part, so it can be used for various applications.

[0126] FIG. 16(B) shows a rollable display 4202, which includes a display unit 4201. The semiconductor device shown in the above embodiment is used for integrated circuits such as the display unit 4201 and drive circuits. By doing so, a large-sized, thin, and rollable display, which is one of the usage forms of the semiconductor device, can be fabricated. The rollable display 4202 is formed using a flexible substrate. Therefore, it can be folded or rolled together with the display unit 4201 and carried around. Therefore, even if the rollable display 4202 is large, it can be folded or rolled and put into a bag and carried around.

[0127] FIG. 16(C) shows a sheet-type computer 4301, which includes a display unit 4302, a keyboard 4303, a touch pad 4304, an external connection port 4305, a power plug 4306, etc. The semiconductor device shown in the above embodiment is used for integrated circuits such as the display unit 4302, drive circuits, and information processing circuits. By doing so, a thin or sheet-type computer, which is one of the usage forms of the semiconductor device, can be fabricated. The display unit 4302 has a flexible substrate. ​​It is formed using a board and can realize a lightweight and thin computer. Also, by providing a storage space in the main body part of the sheet-type computer 4301, the display unit 4302 can be wound around the main body and stored. Also, the keyboard 4303 is also provided to have flexibility, so that, like the display unit 4302, it can be wound around and stored in the storage space of the sheet-type computer 4301, making it convenient to carry. Also, when not in use, it can be folded and stored without taking up much space.

[0128] Figure 16(D) shows a display device 4400 having a large display unit of 20 to 80 inches, including a keyboard 4402 which is an operation unit, a display unit 4401, a speaker 4403, etc. Also, the display unit 4401 is formed using a flexible substrate, and it is possible to remove the keyboard 4402 and fold or wind up the display device 4400 for easy carrying. Also, the connection between the keyboard 4402 and the display unit 4401 can be performed wirelessly. For example, while attaching the display device 4400 along a curved wall, it can be operated wirelessly with the keyboard 4402.

[0129] In the example shown in Figure 16(D), the semiconductor device shown in the above embodiment is used in integrated circuits such as the display unit 4401, the drive circuit of the display unit, and the wireless communication circuit that controls the communication between the display unit and the keyboard. As a result, it is possible to fabricate a thin and large display device, which is one of the usage forms of the semiconductor device.

[0130] Figure 16(E) shows an e-book 4501, including a display unit 4502, operation keys 4503, etc. The modem may be built in the electronic book 4501. The display portion 4502 is made of a flexible substrate. It is made of a plate and can be folded and rolled up. The child book can be carried around without taking up much space. It is possible to display not only still images such as these but also videos.

[0131] In the example shown in FIG. 16E, the semiconductor device described in the above embodiment mode is used for the display portion 4502, the drive These are used in integrated circuits such as driving circuits and control circuits. It is possible to create a thin e-book, which is one of the features of the electronic book.

[0132] FIG. 16(F) shows an IC card 4601, which includes a display portion 4602, a connection terminal 4603, etc. The display unit 4602 is made of a flexible substrate and is a lightweight, thin sheet. The IC card can be attached to the surface of the device. When possible, information acquired from an external source can be displayed on the display unit 4602. .

[0133] In the example shown in FIG. 16F, the semiconductor device described in the above embodiment mode is used in the display portion 4602 and the infrared ray tube. This is one of the uses of semiconductor devices. This makes it possible to create thin IC cards.

[0134] In this way, by using the semiconductor device according to the above-mentioned embodiment in an electronic device, It is possible to manufacture electronic devices that can withstand external forces such as bending. In addition, the position of the neutral plane in the thickness direction of the electronic device is determined by the stress generated in the semiconductor film 106. It can be placed at a position where it can be suppressed. Therefore, even when an external force such as bending is applied to the electronic device, it is possible to suppress the generation of stress in the semiconductor film 106. Therefore, damage to the semiconductor film 106 can be reduced, and the yield and reliability of the electronic device can be improved.

[0135] As described above, the application range of the present invention is extremely wide, and it can be used for electronic devices and information display means in all fields.

Example

[0136] In this example, when an external force such as bending is applied to the semiconductor device according to Embodiment 1, the stress distribution generated in the semiconductor film was verified (simulated) by calculation. Then, from the obtained stress distribution, the optimal film thicknesses of the first reinforcing film and the second reinforcing film that can suppress the stress generated in the semiconductor film are shown below as the results of verification by calculation.

[0137] To obtain the optimal film thicknesses of the first reinforcing film and the second reinforcing film, the combination of the film thickness of the first reinforcing film and the second reinforcing film was variously changed, and a finite element method analysis simulating a four-point bending test was performed to obtain the stress distribution generated in the semiconductor device. From the obtained stress distribution, the maximum value of the von Mises equivalent stress generated in the semiconductor film (particularly, the channel formation region) was obtained. The von Mises equivalent stress defined in this specification is a value that can be obtained by converting the stresses in each direction obtained from a generally used computer simulation into a scalar quantity.

[0138] The stress distribution generated in the semiconductor device can be obtained by a generally used computer simulation such as stress analysis software. An analysis model is created from the components constituting the semiconductor device ​​​​ Input the size, shape, Young's modulus , Poisson's ratio, load, and other parameters into the computer stress analysis software, and analyze what kind of stress distribution will occur in each component due to the influence of bending. The components mentioned here include, in addition to the above-mentioned ones such as the insulating film, reinforcing film, semiconductor film, gate insulating film, and gate electrode, all elements constituting the semiconductor device. In this embodiment, as the stress analysis software, the product name "ANSYS" (manufactured by Cybernet Systems) was used for the analysis.

[0139] Figure 17 shows the analysis model used in the calculation.

[0140] Assume silicon oxynitride (film thickness 200 nm) as the insulating film 202 that functions as a buffer layer. On the insulating film 202, the first reinforcing film 203 is made of silicon nitride (film thickness 0 nm, 50 n m, 100 nm, 150 nm, 200 nm, 400 nm with conditional variation). Also, the insulating film 204 is made of silicon oxynitride (film thickness 100 nm) and is laminated to cover the insulating film 202 and the reinforcing film 203 . The island-shaped semiconductor film 206 is made of silicon (film thickness 66 nm), the gate insulating film 207 is made of silicon oxide (film thickness 20 nm), and the conductive film 208 that functions as a gate electrode is made of tungsten (film thickness 100 nm). Also, the second reinforcing film 209 is made of silicon nitride ( film thickness 0 nm, 100 nm, 150 nm, 200 nm, 400 nm with conditional variation), the interlayer insulating film 210 is made of silicon oxynitride (film thickness 1.5 μm), the conductive film 211 that functions as a source electrode or a drain electrode is made of aluminum (film thickness 700 nm), and the insulating film 212 is made of polyimide ( film thickness 1.5 μm). The outer dimensions of the semiconductor device are 50 μm × 3.32 μm. Note that the total Calculations were performed by omitting the sheet (or substrate) for simplicity of calculation.

[0141] Table 1 shows the Young's modulus and Poisson's ratio of the components used in the calculations.

[0142]

Table 1

[0143] Also, the fulcrum 213 in FIG. 17 was provided 8 μm from both ends of the simulation model, and a four-point bending was assumed in which a load of 0.05 N was applied to the simulation model as shown by the arrow 214.

[0144] In FIGS. 18 and 19, finite element method analysis was performed using analysis software, and the stress distribution generated in the semiconductor device is shown. FIG. 18(A) shows the case where the first reinforcing film and the second reinforcing film are not provided, and FIG. 18(B) shows the case where the first reinforcing film and the second reinforcing film are provided. Also, FIG. 19(A) shows the case where only the first reinforcing film is provided, and FIG. 19(B) shows the case where only the second reinforcing film is provided. Also, the stress distribution indicates a higher stress value at the darker-colored locations.

[0145] The stress obtained by the finite element method depends on the structure of the model and includes stresses of various properties. Therefore, in this embodiment, the stress of the calculation result by the finite element method was evaluated by the von Mises equivalent stress. Also, regarding the stress generated in the thin film transistor, paying attention to the ease of occurrence of damage, it was regarded as the stress in the channel formation region 206a, and evaluated by the maximum value of the von Mises equivalent stress in the channel formation region 206a.

[0146] Table 2 shows the stress generated in the channel formation region 206a by the maximum value of the von Mises equivalent stress.

[0147]

Table 2

[0148] Figures 20 and 21 show the stress distribution in the channel formation region obtained using the finite element method. Fig ures 20 and 21 show an enlarged view of the channel formation region, and the stress distribution indicates higher stress values in the darker areas. Note that the stress distribution outside the semiconductor film 206 is not shown.

[0149] Figure 20(A) shows the stress distribution that occurs in the channel formation region when the first reinforcing film 203 and the second reinforcing film 209 are not provided (the film thickness of the first reinforcing film is 0 nm, and the film thickness of the second reinforcing film is 0 nm). It can be seen that high stress occurs at the lower center of the channel formation region in the channel formation region. This indicates that the position of the neutral plane of the semiconductor device exists on the gate electrode side. The maximum value of the von Mises equivalent stress at this time was 44 MPa.

[0150] Figure 20(B) shows the stress distribution that occurs in the channel formation region when the first reinforcing film and the second reinforcing film are provided (the film thickness of the first reinforcing film is 100 nm, and the film thickness of the second reinforcing film is 300 nm). When the first reinforcing film and the second reinforcing film are provided, it can be seen that no stress of 30 MPa or more occurs in the channel formation region. This is because the position of the neutral plane of the semiconductor device has moved to the side of the first reinforcing film 203 compared to the case of Fig. 20(A). The maximum value of the von Mises equivalent stress at this time is 27 MPa, and the stress can be reduced by about 40% compared to Fig. 20(A).

[0151] Also, Figure 21(A) shows the case where only the first reinforcing film is provided (the film thickness of the first reinforcing film is 100 nm). It shows the stress distribution occurring in the channel formation region. When only the first reinforcing film 203 is provided, the position of the neutral plane of the semiconductor device moves further toward the first reinforcing film 203 side than in the case of Fig. 20(B), resulting in high stress at the upper end of the channel formation region. The maximum value of the equivalent stress of von Mises at this time was 56 MPa.

[0152] Also, Fig. 21(B) shows the stress distribution occurring in the channel formation region in the case where only the second reinforcing film is provided (the film thickness of the second reinforcing film is 300 nm). When only the second reinforcing film is provided, since the position of the neutral plane of the semiconductor device moves toward the gate electrode side than in the case of Fig. 20(A), high stress occurs at the lower center of the channel formation region. The maximum value of the equivalent stress of von Mises at this time was 49 MPa.

[0153] Comparing the stress distribution occurring in the channel formation region between the case where neither the first reinforcing film nor the second reinforcing film shown in Fig. 20(A) is provided and the case where the first reinforcing film and the second reinforcing film shown in Fig. 20( B) are provided, it was possible to reduce the equivalent stress of von Mises by 40%. This is because by providing reinforcing films above and below the semiconductor film, the position of the neutral plane in the semiconductor device was changed, and the stress occurring in the channel formation region could be suppressed.

[0154] Also, as shown in Figs. 21(A) and (B), when only the first reinforcing film or only the second reinforcing film is provided, the stress occurring in the channel formation region may increase compared to the case where no reinforcing film is provided, and it was found that the stress occurring in the channel formation region cannot always be suppressed.

[0155] ​​​From the analysis results, the von Mises equivalent stress that occurs when the first and second reinforcing membranes are not provided is The maximum stress was 44 MPa, so the thickness of the first reinforcing film was 50 nm to 200 nm. The thickness of the second reinforcing film may be selected in the range of 100 nm to 400 nm. In addition, when the thickness of the second reinforcing film is thicker than that of the first reinforcing film, It was found that the maximum equivalent stress of the pores can be reduced by adjusting the thickness of the first reinforcing film and The ratio of the thickness of the second reinforcing film (thickness of the first reinforcing film / thickness of the second reinforcing film) is 1 / 2 or less. It was found that the maximum value of the von Mises equivalent stress can be reduced even in this case.

[0156] In this way, the semiconductor film is sandwiched between reinforcing films made of a material with a higher Young's modulus than the semiconductor film. By providing the semiconductor device in this manner, the position of the neutral plane in the thickness direction of the semiconductor device can be adjusted according to the stress applied to the semiconductor film. In other words, the neutral plane of the semiconductor device can be moved to a position where the occurrence of the Therefore, the position of the semiconductor device can be moved to a position suitable for the semiconductor device. Even if an external force such as bending is applied to the semiconductor film, the generation of stress in the semiconductor film can be suppressed. Therefore, damage to elements such as transistors can be reduced, and the yield of semiconductor devices can be improved. Improved reliability can be achieved. [Explanation of symbols]

[0157] 80 Semiconductor Devices 81 High Frequency Circuits 82 Power supply circuit 83 Reset Circuit 84 Clock Generation Circuit 85 Data demodulation circuit 86 Data Modulation Circuit 87 Control circuit 88 Memory circuit 89 Antenna 91 Code extraction circuit 92 Code determination circuit 93 CRC determination circuit 94 Output unit circuit 100a Thin film transistor 100b Thin film transistor 101 Substrate 102 Insulating film 103 Reinforcing film 104 Insulating film 106 Semiconductor film 106a Channel formation region 106b Impurity region 106c Impurity region 107 Gate insulating film 108 Conductive film 109 Reinforcing film 110 Insulating film 111 Conductive film 112 Insulating film 114 Reinforcing film 116 Insulating film 118 Conductive film 120 Substrate 121 Release layer 122 Conductive film 123 Conductive film 124 Opening 125 Reinforcing film 126 Sheet 127 Sheet 128 Impurity region 129 Insulating film 130 Insulating film 131 Reinforcing film 132 Region 133 Reinforcing film 134 Element formation layer 140 Semiconductor device 141 Integrated circuit 142 Conductive layer 143 Insulating film 144 Substrate 145 Conductive particles 146 Resin 147 Conductive layer 150 Reader / writer 151 Display unit 152 Item 153 Semiconductor device 154 Reader / writer 155 Semiconductor device 156 Commodity 202 Insulating film 203 Reinforcing film 204 Insulating film 206 Semiconductor film 206a Channel formation region 207 Gate insulating film 208 Conductive film 209 Reinforcing film 210 Interlayer insulating film 211 Conductive film 212 Insulating film 213 Fulcrum 214 Arrow 3001 Label backing paper 3002 Semiconductor device 3003 IC label 3004 Box 3011 IC tag 3012 Semiconductor device 3021 IC card 3022 Semiconductor device 3031 Bearer bond 3032 Semiconductor device 3200 Reader / writer 3210 Display unit 3220 Item 3230 Semiconductor device 3240 Reader / writer 3250 Semiconductor device 3260 Commodity 3300 Semiconductor device 3310 Poster 3320 Reader / writer 3330 Mobile terminal 3340 Semiconductor device 3350 Business card 3360 Semiconductor device 3370 Ticket 4101 Display 4102 Support stand 4103 Display section 4201 Display section 4202 Display 4301 Computer 4302 Display section 4303 Keyboard 4304 Touchpad 4305 External connection port 4306 Power plug 4400 Display device 4401 Display section 4402 Keyboard 4403 Speaker 4501 E-book 4502 Display section 4503 Operation key 4601 IC card 4602 Display section 4603 Connection terminal

Claims

[Claim 1] A first island-shaped reinforcing film provided on a flexible substrate; a semiconductor film having a channel formation region and an impurity region on the first island-shaped reinforcing film; a first conductive film provided above the channel formation region via a gate insulating film; a second island-shaped reinforcing film provided to cover the first conductive film and the gate insulating film; an interlayer insulating film provided to cover the second island-shaped reinforcing film and the gate insulating film; a second conductive film provided on the interlayer insulating film so as to be electrically connected to the impurity region through an opening; the entire area of ​​the channel formation region is provided between the first island-shaped reinforcement film and the second island-shaped reinforcement film, the first island-shaped reinforcing film is formed of a material having a higher Young's modulus than the semiconductor film; the second island-shaped reinforcing film is formed of the same material as the first island-shaped reinforcing film; the first island-shaped reinforcing film is formed of silicon nitride, silicon oxynitride, metal oxide, or metal nitride; 13. A semiconductor device comprising: a first island-shaped reinforcing film having a thickness of 50 nm to 200 nm; and a second island-shaped reinforcing film having a thickness of 100 nm to 400 nm.

Images