Digital control of plasma processing

Digital process control using an actuator plate with independently addressable plasma elements addresses the challenges of uniformity and flexibility in plasma processing, enhancing accuracy and reducing costs by enabling precise time-dependent exposure control.

JP2025097995AInactive Publication Date: 2025-07-01APPLIED MATERIALS INC
View PDF 5 Cites 0 Cited by

Patent Information

Application Number
JP2025027813
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2021-01-29
Filing Date
2025-02-25
Publication Date
2025-07-01
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

Existing plasma processing systems face challenges in achieving uniformity and flexibility in process control due to the interference of multiple factors, leading to large chamber sizes and costly countermeasures, and lack of flexibility in executing diverse processes.

Method used

Implementing digital process control through an actuator plate with independently addressable plasma elements, allowing for time-dependent activation and deactivation to expose substrates to plasma-related fluxes, enabling precise control of plasma exposure durations and fluxes.

Benefits of technology

Enhances process accuracy, flexibility, and reduces equipment costs by allowing adjustments to process parameters without hardware overhaul, achieving improved uniformity and adaptability across various plasma processes.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025097995000001_ABST
    Figure 2025097995000001_ABST
Patent Text Reader

Abstract

To achieve more flexible system control by using a digital process control.SOLUTION: There is provided a system including a control plate disposed within a processing chamber. The control plate includes a set of plasma elements designed to independently expose a substrate disposed within the processing chamber to plasma-related fluxes. The control plate is designed to independently activate the set of plasma elements. When activated, the associated plasma elements expose the substrate to the plasma-related fluxes, and when not activated, the associated plasma elements do not expose the substrate to the plasma-related fluxes. The control plate is designed to perform individual time-dependent activation of the set of plasma elements to selectively expose the substrate to the plasma-related fluxes.SELECTED DRAWING: Figure 2A
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001]

[0001] Some embodiments of the present disclosure generally relate to digital control of plasma processing. Some embodiments further relate to systems, devices, and methods for plasma supply and / or plasma processing.

Background Art

[0002]

[0002] Plasma processing is widely used in the semiconductor industry. Plasma can change the chemistry of the process gas (e.g., generate ions, radicals, etc.) without restrictions on process temperature, generate new nuclides, and generate a flux of ions with energies ranging from just a few electron volts (eV) to thousands of eV onto the wafer. There are many types of plasma sources (e.g., capacitively coupled plasma (CCP), inductively coupled plasma (ICP), microwave oscillating plasma, electron cyclotron resonance (ECR), etc.) that cover a wide operating process range from a few mTorr to several Torr.

[0003]

[0003] Today, the specifications of a typical plasma process are high uniformity of the process results (e.g., uniformity up to the edge across the wafer). Achieving this criterion is often very difficult. This is because it involves many factors, and many of them interfere with each other. Plasma uniformity, chamber design, wafer temperature distribution, bias electrode design, etc. are just some of those factors. To meet these criteria, both the RF antenna and the processing chamber are designed to achieve the highest level of process uniformity. For this reason, often the dimensions of the chamber and the generator (e.g., antenna, coil, electrode, etc.) become large, the overall plasma volume becomes large, and other expensive countermeasures such as complex temperature control, coil splitting, magnetic field screening, etc. are required. With a typical tool design, the basic process uniformity can be adjusted within a few percent, but as the uniformity criteria become more stringent, even these countermeasures are often insufficient. Then, the chamber must be equipped with elements that allow the chamber to be individually tuned for a specific process. In addition, a large plasma volume would itself be a challenge for processes that require rapid chemical changes.

[0004]

[0004] Plasma processing can be seen as similar to a television. Originally, a television was based on the technology of a cathode ray tube (CRT), where an electron beam scans horizontally and vertically within a vacuum tube, exciting phosphor dots on the front panel of the tube to create approximately 25 frames per second. Each phosphor dot blinks for a short time (a fixed time), and the brightness of this blinking is controlled by the electron beam current. Then, a receptor (e.g., the eye) integrates (accumulates) and averages the brightness of the light from all the phosphor dots over a short time. The color of the dot is determined by the ratio of the average luminance of adjacent colored dots, and the luminance (brightness) is determined by the overall intensity of the light from these dots. The analog nature of CRT image control lies in either the control of the intensity of the electron beam or the peak luminance of the blinking of all the lights. In CRTs and other analog systems, due to the strict specification requirements for executing the process, the problem has become apparent that it is difficult to maintain specific process specifications (e.g., power requirements, chamber size, component specification limitations, etc.). Similar to CRTs, analog systems generally lack the flexibility required by modern technological innovations in various fields of process control. For this reason, analog systems are often manufactured with dedicated specifications to perform a specific narrow range of processes.

[0005]

[0005] The increasing problems of CRT technology have been solved by switching to digital technology. Of course, this required changes in both hardware and signal control. Clearly, in order to switch from analog technology to digital technology in plasma processing, it will be necessary to change both the hardware and the control.

Summary of the Invention

[0006]

[0006] In an exemplary embodiment, the method includes receiving, by a processing device, data including a first set of plasma exposure values. The first set of plasma exposure values are each associated with a respective plasma element of a plurality of plasma elements designed to generate a plasma-related flux. The processing device causes the plasma controller to activate a set of plasma elements based on the data to expose a substrate to the plasma-related flux generated by the set of plasma elements during a plasma process. Each plasma element of the set of plasma elements is activated for a certain duration based on the respective plasma exposure value from the first plurality of plasma exposure values associated with the respective plasma element.

[0007]

[0007] In an exemplary embodiment, the method includes receiving, by a processing device, first data including a first set of plasma exposure durations. The first set of plasma exposure durations are each associated with a respective plasma element of a set of plasma elements designed to generate a plasma-related flux. The processing device receives a first thickness profile of a substrate. The first thickness profile includes a first set of thickness values of the first substrate measured after exposing the first substrate to the plasma-related flux for the respective plasma exposure durations defined in the first data. The processing device determines that the first thickness values include a first thickness value deviating from a reference thickness value for a first position on the first substrate associated with a first plasma element of the plurality of plasma elements. In response to determining that the first thickness profile includes a first thickness value deviating from the reference thickness value, the processing device modifies the first data by changing a first plasma exposure duration of the plurality of plasma exposure durations associated with the first plasma element.

[0008]

[0008] In an exemplary embodiment, a plasma processing system includes a processing chamber and an actuator plate disposed within the processing chamber. The actuator plate includes a set of plasma cells. The plasma processing system further includes a control unit coupled to the actuator plate. The control unit is configured to control the actuator plate by independently activating or deactivating a plurality of plasma cells. In response to being activated, a plasma cell is configured to independently expose a local area of a substrate disposed within the process chamber to plasma-related flux.

[0009]

[0009] In an exemplary embodiment, a system includes a processing chamber and an actuator plate disposed within the processing chamber. The actuator plate includes a set of plasma elements for independently exposing a substrate disposed within the processing chamber to plasma-related flux. The actuator plate independently activates a plurality of plasma elements. In response to being activated, a plasma element is configured to independently expose a local area of the substrate to plasma-related flux. The actuator plate is configured to perform an individual time-dependent activation of a plurality of plasma elements to selectively expose the substrate to plasma-related flux. In an exemplary embodiment, a plasma processing device includes a plasma source for generating plasma. The plasma processing device further includes an actuator plate disposed within a path of the plasma. The actuator plate includes a plurality of plasma elements that are independently activated and deactivated. In response to being activated, the plurality of plasma elements expose the substrate to plasma-related flux. The plasma processing device further includes a control unit. The control unit controls the actuator plate. The control unit performs an individual time-dependent activation of a plurality of plasma elements to selectively expose the substrate to plasma-related flux.

[0010]

[0010] This disclosure is shown by way of example and not limitation, and like reference numerals in the accompanying drawings indicate like elements. Note that different references to "an" or "one" embodiment in this disclosure are not necessarily to the same embodiment, and such references mean at least one.

Brief Description of the Drawings

[0011]

Figure 1A

[0012] FIGS. 1A - 1C show digital imaging used within a digital process control system, according to aspects of the present disclosure.

Figure 1B

Figure 1C

Figure 2A

[0013] FIGS. 2A - 2C show embodiments of a plasma processing system, according to aspects of the present disclosure.

Figure 2B

Figure 2C

Figure 3A

[0014] FIGS. 3A - 3B show digitally controlled plasma elements, according to aspects of the present disclosure.

Figure 3B

Figure 4A

[0015] FIGS. 4A - 4B show addressable plasma elements, according to aspects of the present disclosure.

Figure 4B

Figure 5

[0016] A digital process control system according to an aspect of the present disclosure is shown.

Figure 6A

[0017] Figures 6A - 6E show various processing images according to an aspect of the present disclosure.

Figure 6B

Figure 6C

Figure 6D

Figure 6E

Figure 7A

[0018] Figures 7A - 7C show a digitally controlled plasma processing device according to an aspect of the present disclosure.

Figure 7B

Figure 7C

Figure 8

[0019] A flowchart of a method for plasma supply according to an aspect of the present disclosure.

Figure 9

[0020] A flowchart of a method for tuning a plasma process according to an aspect of the present disclosure.

Figure 10

[0021] A flowchart of a method for tuning a plasma process according to an aspect of the present disclosure.

Figure 11

[0022] An exemplary diagram of a training stage of a machine learning model according to an aspect of the present disclosure.

Figure 12

[0023] A flowchart of a method for using a machine learning model to modify a plasma exposure process according to an aspect of the present disclosure.

Figure 13

[0024] Draw a block diagram of an exemplary computing device capable of plasma supply and / or processing, operating in accordance with one or more aspects of the present disclosure.

DETAILED DESCRIPTION

[0012]

[0025] Today, typical plasma process parameters are high uniformity of process results (e.g., uniformity up to the edge across the wafer). Achieving this parameter is often very difficult because it involves many factors, many of which interfere with each other. Plasma uniformity, chamber design, wafer temperature distribution, bias electrode design, etc. are just some of those factors. High-frequency (RF) antennas and processing chambers are manufactured and assembled to achieve the highest level of process uniformity. For this reason, often the dimensions of the chamber and generator (e.g., antennas, coils, electrodes, etc.) increase, the overall plasma volume increases, and other costly countermeasures such as complex temperature control, coil splitting, magnetic field screening, etc. are required. Basic process uniformity can be adjusted within a few percent by typical tool design, but for more stringent uniformity criteria, even these countermeasures are insufficient. Then, the chamber must be equipped with elements that allow the chamber to be individually tuned for a specific process. Additionally, the large plasma volume would itself be an issue for processes that require rapid chemical changes.

[0013]

[0026] In addition, the development of processes has the difficulty of satisfying both local process results (e.g., film characteristics, etc.) and uniformity criteria. When process tools are manufactured, conventionally, only tests and optimizations for several types of processes have been performed. As more processes are developed, conventional tools have limited means to control process results. For example, by controlling the output of the antenna, gas pressure, gas flow rate, distribution of gas flow rate, temperature of the wafer, chamber walls, etc. Many of these control knobs affect multiple plasma parameters. This is often difficult to predict because they have an overall impact. For example, changing the power of one coil may affect the plasma density everywhere or the ion energy. Due to these difficulties and the lack of a clear (non-ambiguous) method for using these knobs, the development of processes becomes very expensive. This may sometimes require hardware modification or re-verification of the tool.

[0014]

[0027] These problems can be mitigated and, in some cases, eliminated by replacing analog process control with digital process control. As described above, replacing analog process control with digital process control may require different hardware. The main differences in hardware for analog and digital systems are as follows. That is, analog systems often have very few elements (such as 1 - 2 coils, ESC for 1 - 2 zones, etc.) each for overall parameter control, while digital systems are often configured for local control of small areas of the wafer and thus typically should have a large number of identical controlled elements / cells (such as ESC for 200 - 1000 zones, etc.) and an appropriate number of controlling elements. In contrast to analog systems where those few elements operate over the same time and are energized at carefully adjusted / controlled levels, in a digitally controlled system, all cells (such as pixels) are energized / activated (such as power - supplied) at the same level, but the exposure time of each cell can be controlled. Since the dependency between process parameters (such as thickness) and input parameters (such as cell exposure duration) is rationalized, the user or process recipe can change or modify parameters without equipment overhaul or large - scale reconstruction. Digital control also enables consistent power input across the exposure source and often results in a simpler electronic configuration and equipment setup that can execute multiple processes.

[0015]

[0028] To better understand how digital process control can be achieved, a comparison is made between analog and digital systems. In fact, in plasma processing, the process result (removal, deposition, or treatment) on the film is largely determined by the time and flux from the plasma species to the substrate. That is, if it is necessary to increase the process result globally or locally, it is necessary to increase the flux or time. Ultimately, it is the fluence (the integral of the flux density over time) that affects the resulting process image. For example, in a TV image, the brightness and color of each pixel seen by the eye depend on the average luminance of that pixel over about 0.1 seconds, that is, the fluence of photons within that time. In a CRT, since each pixel emits light for the same time, the brightness across the screen could be changed by varying the flux density (the electron beam current illuminating the pixel). In digital processing (regardless of the technology), each pixel emits light at a constant intensity, and the average luminance (fluence over the frame) of an individual pixel in one frame can be controlled by the ratio of the time frame during which that pixel is lit. Typically, the typical grayscale of any color pixel in a digital TV can be 256 or 512 gray levels, which enables millions of colors. This grayscale and its consistency can be achieved by dividing all frames (images) into a set of sub-frames. Each sub-frame shows a different image over the time (sustain period) assigned to this sub-frame, and within all sub-frames, the illuminated pixels can emit light of the same constant intensity. However, in one sub-frame, some pixels are lit, and other pixels are lit in other sub-frames. Combinations of different pixels may be lit between any number of sub-frames. The human eye is not fast enough to recognize each sub-frame. The human eye is looking at the integrated image of several frames, that is, the image of the fluence of light from all pixels. For example, when realizing 256 levels of intensity with 8 sub-frames, the time of each sub-frame is 2 m-1Since it can depend on the number m of the sub - frame as described above, the contribution of each sub - frame to the full fluence of the entire frame increases along with the number of the sub - frame, and the average luminance (full fluence) of each pixel may have a difference of 256 steps from 0 to 255.

[0016]

[0029] The following example is an example of dividing a 3×3 image (where the numbers indicate the level of brightness) into images of several sub - frames. Assuming that each sub - frame is twice as long as the previous sub - frame, its contribution increases as 2 m-1 as described above. TIFF2025097995000002.tif36170

[0017]

[0030] Since each sub - frame has a different image, each sub - frame can include an address period preceding the sustain period. The address period may also include erasing the previous image and placing a new image on the screen. This address update may include an address - assignable memory element assigned to each pixel, and this memory element can be addressed to an on or off state. The on or off state may affect the pixel operation (e.g., emitting light or not) during the sustain period. Addressing may include a circuit for selecting pixels and supplying an addressing signal for executing the addressing process to those pixels.

[0018]

[0031] In some embodiments, the methodology includes dividing the process time into several sub - fields and controlling the fluence of the plasma flux to the elements of the substrate by time rather than by flux density as conventionally used in plasma processing. In some embodiments, the methodology is used for the selection and rapid addressing of thousands of plasma cells, whereby the number of elements to be controlled is significantly reduced compared to the number of elements being controlled.

[0019]

[0032] Multiple embodiments of the present disclosure provide plasma processing devices, methods, and systems that use digital process control. Specifically, the multiple embodiments disclosed herein are directed to devices, systems, and processes for controlling plasma processes through individual time-dependent exposures of plasma-related fluxes by plasma elements. The multiple embodiments are directed to performing plasma processes (e.g., semiconductor processing) by digitally controlling the local exposure of elements of a substrate to plasma-related fluxes. The multiple embodiments are directed to generating and processing exposure data (e.g., an exposure map or exposure recipe) across a set of plasma elements to individually control the exposure durations corresponding to individual plasma elements. Various embodiments may include or employ methods for tuning and / or improving exposure data (e.g., an exposure map or recipe). Some embodiments incorporate the use of machine learning models and algorithms to generate, modify, and / or process exposure maps and / or recipes and plasma process corrections to achieve a target process output (e.g., meet target specifications such as thickness and / or process uniformity).

[0020]

[0033] In an exemplary embodiment, the method includes receiving, by a processing device, data including a first set of plasma exposure values. The first set of plasma exposure values are each associated with a respective one of a plurality of plasma elements designed to generate plasma-related fluxes. The processing device causes a plasma controller to activate a set of plasma elements based on the data to expose a substrate to plasma-related fluxes generated by the set of plasma elements during a plasma process. Each plasma element of the set of plasma elements is activated for a duration based on a respective plasma exposure value from a first plurality of plasma exposure values associated with the respective plasma element.

[0021]

[0034] In an exemplary embodiment, the method includes receiving, by a processing device, first data including a first set of plasma exposure durations. The first set of plasma exposure durations are each associated with a respective plasma element of a set of plasma elements designed to generate a plasma-related flux. The processing device receives a first film thickness (process result) profile of a substrate. The first thickness profile includes a first set of thickness values of the first substrate measured after exposing the first substrate to the plasma-related flux over respective plasma exposure durations defined in the first data. The processing device determines that the first thickness values include a first thickness value that deviates from a reference thickness value for a first position on the first substrate associated with a first plasma element of a plurality of plasma elements. In response to determining that the first thickness profile includes a first thickness value that deviates from the reference thickness value, the processing device modifies the first data by changing the first plasma exposure duration of the first set of plasma exposure durations associated with the first plasma element.

[0022]

[0035] In an exemplary embodiment, a plasma processing system includes a processing chamber and an actuator plate disposed within the processing chamber. The actuator plate includes a set of plasma cells. The plasma processing system further includes a control unit coupled to the actuator plate. The control unit is configured to control the actuator plate by independently activating or deactivating a plurality of plasma cells. In response to being activated, a plasma cell is configured to independently expose a local area of a substrate disposed within the process chamber to a plasma-related flux.

[0023]

[0036] In an exemplary embodiment, the system includes a processing chamber and an actuator plate disposed within the processing chamber. The actuator plate includes a set of plasma elements for exposing a substrate disposed within the processing chamber to plasma-related fluxes independently. The actuator plate activates a plurality of plasma elements independently. In response to being activated, the plasma elements are configured to expose a local area of the substrate to plasma-related fluxes independently. The actuator plate is configured to perform individual time-dependent activation of the plurality of plasma elements to selectively expose the substrate to plasma-related fluxes. In an exemplary embodiment, the plasma processing device includes a plasma source for generating plasma. The plasma processing device further includes an actuator plate disposed within the path of the plasma. The actuator plate includes a plurality of plasma elements that are independently activated and deactivated. In response to being activated, the plasma elements expose the substrate to plasma-related fluxes. The plasma processing device further includes a control unit. The control unit controls the actuator plate. The control unit is configured to perform individual time-dependent activation of the plurality of plasma elements to selectively expose the substrate to plasma-related fluxes.

[0024]

[0038] These and similar embodiments provide several advantages and improvements in the fields of plasma processing and semiconductor processing. These advantages include, for example, improved process accuracy, improved process resolution, improved flexibility in equipment specifications, and improved flexibility in process applications. As previously described, conventional overall process control using analog systems has difficulty meeting the requirements of uniformity. By using a digital local process control system, i.e., time-dependent local exposure control, it becomes much easier to adjust control parameters for different processes or target results. Furthermore, by adjusting the exposure instruction commands for the digital process control system, the levels of accuracy and resolution can be adjusted. For example, process distortions, process artifacts, and limitations in the size and shape of equipment are overcome when the process control is time-dependent rather than power-dependent as in most analog process control systems. The resolution can be controlled by the number of process sources without significant changes to peripheral equipment or relative process uniformity.

[0025]

[0039] As previously described, using digital process control enables more flexible system control. Since the dependency between process parameters (e.g., changes in film thickness) and input parameters (e.g., exposure duration of the cell) is rationalized, the operator can adjust the process recipe (multiple exposure times) without the need for equipment overhaul or reconstruction. Digital control also enables consistent power input across exposure sources, often resulting in a simpler, less expensive, and broader use of electronic configurations and equipment settings that can execute multiple processes.

[0026]

[0040] Figures 1A - 1C illustrate digital imaging used within digital process control system 100A according to multiple aspects of the present disclosure. In particular, FIG. 1A shows the principle of generating an image (e.g., a set of image frames 102) using sub - frames 104A - H and a scanning technique for addressing controlled elements 106 of digital process control system 100A. Plasma processing can operate using a number of controlled elements 106 (e.g., pixels, cells, electrodes, etc.) that emit light or plasma and control the plasma flux. For example, a plasma processing system may operate using hundreds or thousands of plasma cells. In any case, a number of controlled elements 106 may require sophisticated control to execute a digital process so as to meet desired output criteria (e.g., process uniformity requirements). For example, as shown in FIG. 1A, all frames 102 (e.g., 16.7 milliseconds for a television) can be divided into a series of sub - frames 104A - G (e.g., eight sub - frames as seen in FIG. 1A). Each sub - frame can represent the activation (maintenance) period of the controlled elements 106, and those periods increase with the sub - field number as m =T12 m-1 shown.

[0027]

[0041] An address period can be placed before each sustain period. The address period includes erasing (e.g., to an off state) the previous state of all controlled elements 106 and addressing (e.g., to an on state) the newly selected controlled elements 106. During the next sustain period, all elements selected to be on are activated at a certain intensity (e.g., emitting light or plasma). Different levels of fluence are produced depending on the emission duration by the pixels. Different exposure images can be generated using different combinations of the addressed controlled elements 106 in different sub-fields 104A - G of the frame 102. For example, a controlled element 106 having a light-emitting pixel can result in a fluence (e.g., brightness) having various levels of gray (e.g., 256 levels of gray associated with eight sub-fields). This is partly because the human eye integrates (i.e., summarizes) the light from all pixels received during the selection of a frame (e.g., integrates over the sub-fields). For example, if a pixel with coordinates (y, z) equal to (6, 2) emits a relative luminance level of 3, pixel (9, 5) is at level 162, and pixel (9, 9) is at level 104, these pixels should be addressed to be on for the appropriate sub-frame that, when summarized (e.g., integrated over the duration), results in the associated luminance levels (i.e., 3, 162, and 104) as shown in FIG. 1A.

[0028]

[0042] In some embodiments, through address scanning, an improvement in the efficiency of address designation (for example, shortening of the time for designating a pixel) can be realized. Except for one from the power supply sources (for example, the Y scanning electrode 110), all the lines along the first axis (for example, the horizontal line 108) are disconnected (for example, connected to the ground), and scanning is performed during the address designation period. The first line is addressed, but the disconnected lines cannot be addressed (for example, store or change charges) from the address designation signal. The address designation process is performed for each line. In that case, the lines of the controlled elements 106 (for example, pixels or cells) connected to the power supply source are addressed. After the current line is addressed, the current line is disconnected from the power supply source (for example, the Y scanning electrode 110), and the next line is connected to the power supply source. After all the lines are scanned, the address period ends and the sustain period starts. For example, FIG. 1A shows the address designation of number 9 of the line 108 for the sub-frame SF6104F. As shown in FIG. 1A, the selected electrodes 3, 5, 6, 7, 9, and 10 are connected to the address electrode Z112. These selected electrodes on line 9 are addressed during the processing of the sub-frame 104F of SF6 and will finally light up.

[0029]

[0043] Using the previous example (repeated below), an image can be represented by a 3×3 matrix. In that case, each number indicates the emission duration of the controlled element. An exemplary division of the 3×3 image into some sub-frame images can include the following. That is, TIFF2025097995000003.tif36170 In this embodiment, the scanning in SF1 can be processed in the following manner. That is, 1) when Y1 is closed (for example, connected to a power supply), the address specifying signal (1, 0, 1) connects the first and third columns to the address driver, 2) when Y2 is closed, the address specifying signal (0, 0, 1) connects the third column (for example, Z3) to the address driver, and 3) when Y3 is closed, none of the Z electrodes are connected to the Z driver. A similar process occurs during the address specifying period of each subfield. In some embodiments, some subfields may have no active elements (for example, all elements are in the off state). Returning to the above-described embodiment, starting from SF4, none of the Z electrodes are connected to the Z driver, and thus, no cells are addressed and no controlled elements are activated (for example, no light or plasma is generated during these subfields).

[0030]

[0044] During the sustain period, all the scanning (line) electrodes (Y) can be connected together and connected to a power supply. The column electrodes (Z or X) are connected together and connected to the sustain driver of the power supply. In some embodiments, Z and X use the same electrode within the cell, while in other embodiments, X is a separate electrode common to all cells. During the sustain period, all cells are connected to the same sustain driver, but only the cells selected to be on during the address period are activated (for example, emit light or plasma).

[0031]

[0045] The difference between digital television and digital plasma processing is that digital television may require a maximum frame duration limit to meet image quality standards. For example, the frames of a television are limited to less than 0.1 seconds so that even a still image does not flicker and is not obstructed to view, and are limited to about one-sixth (16.7 milliseconds) at most to avoid video artifacts. As a result, television images are often displayed through many 16.7-millisecond frames, as shown, for example, in FIG. 1B. For this reason, a large number of address specifications are required, which occupy a significant proportion of 16.7 milliseconds and reduce the light efficiency of television images.

[0032]

[0046] In some embodiments, as shown in FIG. 1C, the overall process time or process step time may be executed as a single frame 100C (e.g., addressing a single frame). Using a single frame becomes possible as a result of there being no maximum frame duration limit, as described above in relation to the television display. For example, the addressing time for each frame can be about 1 millisecond within the duration, and the process time can be measured in seconds or even minutes. If the process time is long, the number of addressing steps can be reduced, and the efficiency of the entire process can be improved.

[0033]

[0047] In some embodiments, as shown in FIG. 1C, changes in the frame duration may be associated with the complexity of the image. For example, since the image of a television can be relatively complex, pixels may have the full range of brightness from 0 to 255. However, in plasma processing, the main image has a constant brightness (e.g., no contrast), and the resulting process result only needs to meet a quality threshold (e.g., 5% non-uniformity) that is not as accurate as the image of a television. As a result of such a reduction in the requirements for image complexity, one large sub-frame may be used for the bulk of the time (e.g., 90% of the total process time), and several small sub-fields (e.g., six sub-fields as shown in FIG. 1C) may be used for the remaining process time (e.g., 10% of the total process time).

[0034]

[0048] In some embodiments, sub-fields can be changed by a shared adjustment factor (e.g., all sub-fields are reduced by half). In some embodiments, by using longer sub-fields, the number of required sub-fields can be reduced to improve precise control. For example, when having eight sub-fields, the brightness can be controlled up to 0.4% (1 / 255) of the full brightness. However, by using longer sub-fields, with only seven sub-fields, the brightness can be controlled up to 0.15% (1 / 663) of the full brightness.

[0035]

[0049] In some embodiments, the plasma cell used for plasma processing can control the plasma flux under a plurality of conditions (e.g., different process gases, different pressures, etc.) and can control the emitted energy (e.g., ion energy, bias voltage). This may require different drive voltages for different process steps. The uniformity control of all processes can be performed using the digital control described herein.

[0036]

[0050] In some embodiments, the number of sub - fields, the relative lengths of the sub - fields, the number of frame processes, and / or the length of the processes can be adjusted to meet the requirements of the plasma process (e.g., the manufacturing recipe). For example, the sustain and address voltages / signals can be modified, a new mixture gas can be introduced, providing flexibility in the process recipe.

[0037]

[0051] Figures 2A - 2C illustrate embodiments of a plasma processing system 200 according to various aspects of the present disclosure. The plasma processing system may include a processing chamber 220 and a plasma source 210. The plasma source may include a wall 202 (e.g., to maintain atmospheric pressure), a gas inlet 212, a gas supply space restricted by the wall, a plasma generation plate 204 including a plurality of controlled plasma cells 206, and a power supply 208 controlled by a control unit 205. In some embodiments, the control unit 205 is also responsible for selecting the plasma elements 206 that generate plasma when the same voltage V(t) is applied to all cells of the panel 204. The processing chamber 220 may be one or more of an etching chamber, a deposition chamber (including chambers for atomic layer etching / deposition, chemical vapor deposition, physical vapor deposition, or their plasma - enhanced versions), an annealing chamber, a photoresist strip chamber, etc. The processing chamber 220 includes a wall 211 that maintains an inner reduced pressure and provides support for the plasma source 210, a substrate support 216, and a gas outlet 214, and may include a plurality of features described in connection with processing chambers in other embodiments. The gas inlet 212 and the gas outlet 214 may provide a flow of supply gas through the processing system under the processing gas pressure. The supply gas may include any of air, O2, N2, Ar, NH3, He, and / or other suitable processing gases. The plasma source 210 may include a gas expansion space of a gas injector (e.g., without plasma). It provides a uniform gas flow through the plasma generation plate 204. A uniform gas flow across the surface of the control plate may result in a common gas composition flowing through each of the gas supply lines associated with the discharge cells 206.

[0038]

[0052] In some embodiments, as shown in FIG. 2A, the plasma generation plate 204 may include a set of plasma elements having memory. The plasma element 206 includes individually addressable plasma sources or discharge cells that can emit plasma-related fluxes. For example, the discharge cell may use dielectric barrier discharge (DBD) technology for both the generation of the discharge and the provision of the memory function.

[0039]

[0053] In some embodiments, the discharge cell may be disposed within the plasma generation plate 204. The discharge cell may be designed to be individually switchable between an on state and an off state. While in the on state, the discharge cell emits a plasma-related flux in response to receiving a voltage (e.g., a sustaining voltage).

[0040]

[0054] In some embodiments, the plasma generation plate 204 is designed to adjust the individual time-dependent transitions between the on state and the off state for each discharge cell in order to selectively generate and emit a plasma-related flux across the plasma generation plate 204. For example, the plasma-related flux may be generated and emitted to contact the substrate 230 disposed within the processing chamber 220.

[0041]

[0055] In some embodiments, the plasma source 210 may include an RF (e.g., low frequency less than 100 kHz) generator 208, or alternatively an alternating current (AC) generator. It is designed to activate (e.g., supply power to) the discharge cell 206. The plasma source 210 may further include a control unit that selects a cell to receive power from the generator. For example, the discharge cell may include an addressable switch. The switch connects both cell electrodes to the RF bus electrode only when it is closed, and disconnects the cell from the RF bus electrode when the switch is open. Applying an RF voltage to the associated discharge cell turns the associated discharge cell on and emits a plasma-related flux. In a further example, the RF generator may be configured to apply an RF voltage to a first set of discharge cells for a first duration and to apply the same RF voltage to a second set of discharge cells for a different duration. In another embodiment, the RF generator may be designed to increase or decrease power to maintain a predetermined voltage regardless of the number of discharge cells that are activated, i.e., on, and / or the number of discharge cells that are not currently activated, i.e., off.

[0042]

[0056] In some embodiments that utilize DBD technology, the plasma source may include a control unit that selects / addresses a cell to receive a memory charge prior to plasma maintenance, and an AC (1 - 200 kHz) generator 208 having a constant voltage amplitude that is designed to initiate and maintain a discharge in a plasma element (e.g., plasma cell) 206. When the same continuous waveform V(t) is applied to all cells, only the selected plasma cells having a memory charge will discharge. The activated cells can generate plasma and emit a plasma-related flux in a local area within the area of this cell.

[0043]

[0057] In some embodiments, as shown in FIG. 2B, the plasma generation plate 204 is an actuator plate and is designed to perform individual time-dependent opening and closing of a plurality of plasma shutters to selectively expose regions of the substrate 230 to the flux of ions and electrons flowing through the individual elements 206 of the actuator plate. This embodiment, of course, includes a plasma source (an ICP source is shown) that generates plasma above the actuator plate.

[0044]

[0058] In some embodiments, the plasma element 206 includes a plurality of electrode layers that perform opening and closing to allow or prevent a portion of the plasma-related flux from flowing through the actuator plate. The plasma shutter 206 may include a first layer of electrodes (e.g., a grid facing the plasma) disposed proximate to and / or on the side of the plasma source 210. The first layer of electrodes may be maintained at a floating potential. The plasma shutter 206 may include a second layer of electrodes including a first ring of electrodes. The first ring of electrodes is maintained at a floating potential when the associated plasma shutter is open and is maintained at a negative potential (reflecting electrons) when the associated one of the plurality of plasma shutters is closed. The plasma shutter 206 may include a third layer of electrodes including a ring electrode. The ring electrode is maintained at a floating potential when the associated plasma shutter is open and is maintained at a positive potential (e.g., reflecting ions) when the associated plasma shutter is closed.

[0045]

[0059] In some embodiments, as shown in FIG. 2C, the plasma generation plate 204 is an actuator plate embedded within the pedestal and activates the plasma element 206. The plasma element 206 may include a plurality of bias electrodes for controlling the fluence of high energy ions. The plasma is generated by a plasma source 210 (ICP is shown), and the electrodes are maintained by an RF power source capable of supplying an RF signal of a constant amplitude. The voltage controller 205 may transmit a signal to the bias RF generator during the address period to modify the power for any subframe according to the number (area) of activated electrodes so as to provide the same bias voltage to all subframes regardless of the number of selected elements.

[0046]

[0060] In some embodiments, there are a large number of plasma elements 206, for example, addressed (e.g., scanned) line by line by a control plate using (x i , y k ) or i, k coordinates. The plasma elements 206 may be individually addressed or addressed as a group or region, as will be described in further embodiments.

[0047]

[0061] Figures 3A - 3B show a set of digitally controlled plasma elements 300A - B according to various aspects of the present disclosure. The set of controlled plasma elements 300A - B may be associated with or used as part of a plasma generation plate (e.g., plate 204 of FIGS. 2A - 2C). For example, control may be applied for local plasma generation above adjacent elements of a substrate. In another example, a set of controlled plasma elements may be used in combination with a common plasma source (e.g., ICP), and digital control of the plasma elements is used to control the local fluence (integral of the flux over time) of high - energy ions to the substrate. For example, a set of plasma elements may include partial bias electrodes 302A - C. In analog regime, the fluence can be controlled by changing the voltage for each of these electrodes (e.g., changing the flux or ion energy). In digital regime, the voltage remains substantially constant, but different times of bias are applied to each section to vary the fluence. For example, instead of having a few zones, the bias electrodes can be pixelated into many (hundreds) of small electrodes. The electrodes can be associated (e.g., connected) with a few zones as in the previous embodiments 304A - C to achieve the same result, or each of these small electrodes can be controlled to achieve improved process flexibility and control.

[0048]

[0062] The time for which an RF voltage (e.g., RF bias voltage) is applied to each electrode or each section of an electrode can be controlled. Note that the applied voltage to each electrode can be independent of the number of active (e.g., on - state) electrodes. In some embodiments, the RF generator 208 may operate in a constant output voltage mode to achieve independent applied voltages. When the generator operates in a power control mode, a signal from the control unit can be supplied to the RF generator to adjust the power according to the number of active electrodes.

[0049]

[0063] The time required to drive each of the plurality of discharge elements may be calculated and stored in an exposure duration map file (e.g., an "image" file). For example, in the case shown in FIGS. 3A - 3B having only three zones, the exposure file may include (t(a), t(b), t(c)) representing the exposure duration of each zone. As introduced previously, an exemplary method for implementing an exposure file for a system having three zones is shown below. Assume that t(a) < t(b) < t(c). The entire panel (all three zones) operates for a duration of t(a), then zone A is turned off and only zones B and C operate for a duration of t(b) - t(a), then zone B is turned off and only zone C operates for the remaining time t(c) - t(b). Through the process control of the three zones, a process profile with good radial uniformity can be achieved. The radial profiles with a low center, a high center, or an M - shape or W - shape on the substrate can be mitigated by the three sections 302A - C or zones. When the requirements for the process results are more stringent (no local highs / lows, azimuthally uniform), the number of controlled elements required increases and this simple operation becomes inefficient. In this case, the digital control methodology as presented in this specification can provide a way to implement it. In some embodiments, all elements may operate in the same way (e.g., the same emission rate of plasma - related flux), but for an appropriate time (e.g., the exposure duration of plasma - related flux).

[0050]

[0064] In some embodiments, active (on) discharge cells are connected to an RF source and non - active (off) cells may be grounded or floating (i.e., not connected to anything). The plasma - related flux to the wafer of all nuclides (e.g., ions, electrons, radicals, etc.) is independent of the state of the discharge cells, except for high - energy ions. In some embodiments, high - energy ions may be present only above the active (on) electrodes.

[0051]

[0065] Alternatively, element 304 may represent a number of plasma shutters (as in FIG. 2B). A plasma source that generates a plasma that emits a plasma-related flux may be disposed proximate to the plasma shutter. Each plasma shutter may be designed to switch between an open position and a closed position. While in the open position, the plasma shutter may allow a flux of ions and electrons of the plasma to pass through the control plate, and while in the closed position, the plasma shutter may block the plasma-related flux from passing through the control plate. For example, the plasma shutters may be individually addressed and controlled to selectively open and close to selectively expose the substrate to the plasma-related flux flowing through the plasma shutter.

[0052]

[0066] In some embodiments, the plasma shutter includes a plurality of electrode layers. The plurality of electrode layers effect an opening and closing that allows or blocks ions and electrons from flowing through the plasma shutter (e.g., through the control plate). The plasma shutter may include a first layer of electrodes (e.g., a grid facing the plasma) disposed proximate to and / or on a side of the plasma source. The first layer of electrodes may be maintained at a floating potential. The plasma shutter may include a second layer of electrodes including a first ring of electrodes. The first ring of electrodes is maintained at a floating potential when the associated plasma shutter is open and at a negative potential (reflecting electrons) when the associated one of the plurality of plasma shutters is closed. The shutter may include a third layer of electrodes including a ring electrode. The ring electrode is maintained at a floating potential when the associated plasma shutter is open and at a positive potential (reflecting ions) when the associated plasma shutter is closed.

[0053]

[0067] Figures 4A - 4B show a set of addressable plasma elements 400A - B according to multiple aspects of the present disclosure. The addressable plasma element may use dielectric barrier discharge (DBD) technology. It uses the selection ability (addressing) of cells 402A - B (e.g., DBD cells) to enable independent operation of each individual cell 402A - B (e.g., mini - source). Alternatively, the addressable plasma element may include individually addressable shutters as described above. The advantage of dielectric barrier discharge is that a common voltage waveform from a single power source can be applied to all cells 402A - B simultaneously, but the discharge will occur only in the previously selected (addressed) cells. Those cells may have natural memory capabilities without the need for additional memory - holding elements. The remaining cells 402A - B will be in an idle state (no discharge). An alternating voltage (±V s ) at a frequency f from a power source (e.g., the AC generator 208 of FIG. 2) can generate a series of identical discharge pulses at a frequency of 2f in those selected cells. Discharge pulses can be generated each time the polarity changes, and the total amount of plasma - related particles (ions, electrons, radicals) generated in any cell is proportional to the number of pulses generated in that cell.

[0054]

[0068] Combinations of several sub - images / sub - fields of different durations can be used to generate an exposure image (the sum of the sub - images). In some embodiments, the exposure image includes data having a set of exposure durations mapped to individual plasma elements. The plasma elements may be oriented in a grid pattern having individual activation instruction commands stored in an exposure image file. As will be further described in later embodiments, the exposure image may include exposure duration values (e.g., amount of time, number of plasma pulses, etc.) in different formats that can be mapped to cells 402A - B. Thereby, each of cells 402A - B enables the passage or generation of plasma - related components over the associated exposure duration. In some embodiments, for each sub - field, a control unit (e.g., control unit 205 of FIG. 2) applies an appropriate sub - image to a control plate (e.g., control plate 204) to address a selected cell. The selected cell then becomes active over the duration of that sub - field.

[0055]

[0069] As shown in FIGS. 4A - 4B, the cells may be arranged in an organized structure (e.g., grid, shape, etc.). Each of cells 402A - B may be given an address in a two - dimensional space (X, Y) or (Z, Y). The former uses a two - electrode structure, so both electrodes are used for both addressing and sustaining. The latter uses three electrodes. In that case, an additional electrode is used with the Y (scanning) electrode only for addressing, and the X electrode and the Y electrode are used to sustain the discharge. Either addressing and sustaining scheme can be used to address the electrodes. For example, a cell may be assigned an address having an X address 404 (or Z address 408) and a Y address 406. In some embodiments, the exposure image (also known as an exposure map) may include a large array t ik or N ik where N is the number of pulses, and (i, k) is such that the address specified within the exposure image corresponds to the address of a cell of the set of plasma elements 400A - B for (i, k) of (xi , y k ), which is a node of an array having coordinates. For example, the address in the image file may include data indicating the duration or exposure duration for which an associated addressable node (or cell) is activated during the plasma process.

[0056]

[0070] In some embodiments, to convert the exposure image t ik to an addressable image, the following can be used: normalization to process time t pr , color, or gray scale. That is, t pr = max(t ik ) (Equation 1) τ ik = t ik / t pr (Equation 2)

[0057]

[0071] τ ik is multiplied by the number of gray levels N G , and the integer part (mod 1) of the result is taken to obtain the gray level (GL). GL ik = (N G · τ ik ) mod 1 (Equation 3)

[0058]

[0072] GL ik is the addressable image of the exposure image τ ik . To use this for addressing, the GL ik value can be converted to N sf bits. Here, each bit indicates whether the cell is addressed on or off for a particular subfield. For example, in 8 - subfield addressing (N sf = 8), each subfield starts from 1 and goes to 2 k-1is proportional up to, the number 01010101 means level 170 (out of 255), and the cells are addressed on between 2, 4, 6, 8 sub - field numbers and addressed off between the remaining sub - fields.

[0059]

[0073] FIG. 5 shows a digital process control system 500 according to various aspects of the present disclosure. The digital process control system 500 may be associated with or used as part of a plasma control plate (e.g., control plate 304 of FIG. 3). The digital process control system may control the power and / or voltage supply to digital process elements 508 (e.g., bias electrodes of FIG. 3). The digital process control system 500 may be designed to selectively turn on and off individual digital process elements 508. The digital process control system 500 may include an electrostatic chuck (ESC) 502, a switch controller 504 including a set of switches 510, and an RF generator (RFG) 506 having a matching circuit (also known as a match). The digital process control system 500 may control the turn - on time of the digital process elements 508. The turn - on time of the digital process elements 508 is a specific time t k over which any digital process element k (or i, k in the case of a two - dimensional (2D) array) is energized.

[0060]

[0074] For example, any time t k (or t ik ) in the case of a 2D array, is made the total t k =t min +Δt k (or t ik =t min +Δt ik ). Here, t min is the shortest of all t k (or t ik ), and 0≦Δt k ≦Δt max . Here, Δt max =t max -t minThis division may enable precise control independent of the total time. The time resolution is applied to a relatively short time Δt max Δt max is much smaller than the normal t max It is convenient to choose the precision δt of this time control such that the difference between any actual t k is greater than δt. In this case, the potential number of gray-scale levels defining the time control accuracy is N G = Δt max / δt. Note that δt can be used even for short durations (e.g., milliseconds or even shorter times). This can be achieved by the following multiple embodiments.

[0061]

[0075] In a system having a bias electrode (e.g., electrodes 302A - C and 304A - C in FIGS. 3A - C) driven by an RF generator 506 with a single constant bias voltage, a switch controller 504 may store time values t1, t2,..., t N with a resolution δt, and when the time arrives, the contact (switch 510) between the RF generator 506 and the digital process element 508 may be turned off. If necessary, the switch controller 504 may send a signal to the RF generator indicating that only a specific value related to the number of digital process elements that are on or off at that time must have their power reduced. Note that if the number of digital process elements is large and the time required to turn off switch 510 or a group of switches is very short, all switches 510 may control relatively small power / current.

[0062]

[0076] In another embodiment, in a system having a dielectric barrier discharge (DBD)-based plasma source similar to the discharge cell described in relation to FIG. 2, all DBD cells can be driven with exactly the same serpentine continuous voltage waveform, but the discharge occurs only in the previously selected (addressed) cells. The time is Δt max = t max - t minand can be divided into several sub - fields. For example, if the time length of each sub - field is Δt max / 2 m then m ∈ (1, M) is the number of sub - fields, and by combining the times of sub - fields, any time t can be made with an accuracy of δt = Δt max / 2 M . Erase all cells (for example, turn them all off), and then by addressing cells between sub - fields, an image for any specific sub - field can be generated. The full discharge includes an "all - on" image for time t min and the subsequent M corrected images. The overall image represents an array t max -t min ) / 2 M for generating discharge at the array source with an accuracy of (t ik . For example, if the total process time is 100 seconds, the maximum correction required for the process is 10 seconds (10%), and there are only 6 sub - fields in total (M = 5), the accuracy of process control is 0.3 seconds, that is, 0.3%.

[0063]

[0077] In some embodiments, the exposure distribution image may be associated with or correspond to the process result image h(k). In that case, colors are assigned based on the relative change in film thickness, as will be described in connection with FIG. 6B.

[0064]

[0078] Figures 6A - 6E show various images depicting process flows according to multiple aspects of the present disclosure. For example, Figure 6A shows an initial selection of a uniform exposure image for achieving a uniform target process image. This image has a number of elements equal to the number of elements to be controlled. Since this is expected to be large, it will be referred to as a high - resolution (HR) exposure image. Figure 6B shows an example of a non - uniform low - resolution (LR) process image obtained as a result of the exposure image of 6A and obtained using metrology tools after the process is completed. The typical number of elements within this LR image is 49, and the values between these measurement points are the result of interpolation. Figure 6C shows the same LR process image (e.g., having 49 elements) converted to a high - resolution process image (e.g., 1000 elements). In that case, each element has the coordinates of the element to be controlled. Figure 6D shows a modified exposure image obtained using the simple procedure described in the present invention. Figure 6E shows the resulting uniform HR process result image.

[0065]

[0079] As shown in Figure 6B, a typical process result shows a variation in measured parameters (e.g., film thickness of a substrate) as a result of the process. The parameter can be measured over a plurality of points (e.g., 49 points). Alternatively, more or fewer points can be used to measure the parameter. The measured points and their positions may not be related to the positions and number of the addressed elements to be controlled as shown in Figures 6A, 6C, and 6D. As seen in Figure 6B, the raw process result image h raw (x, y)=h raw (k:k = 1~49) can be converted to a process image (e.g., Figure 6C) having source coordinates h ik =h(x i , y k ). To perform this conversion, the control unit interpolates h raw (x, y) of the area of the process result image including the outside of the wafer, and from this interpolation, the source coordinates (x i , yk Extract the data h related to ik This array h ik = h(x i , y k ) is the process result image (e.g., FIG. 6C or the modified exposure image FIG. 6D). The processing unit (e.g., the processing unit 207 in FIG. 2) uses the process result image to generate the exposure image t ik = h(x i , y k )(e.g., FIG. 6E). In some embodiments, the exposure image may include a 2D array image. In that case, any one of them can be represented as the product of the maximum value (brightness) and the relative value. The relative value is the ratio of the local value to the maximum value ("color" or "shade"). h ik = h max ·h ik / h max , …, t ik = t max ·t ik / t max (Equation 4) For example, by arranging the appropriate color at the position (x i , y k ), the data can be illustrated or "painted".

[0066]

[0080] In some embodiments, the exposure image can be tuned and improved via image processing. For example, the process can start with a process image obtained from any initial exposure distribution image (e.g., FIG. 6C), and then use standard procedures with simple numerical algorithms to correct the elements of the exposure image array associated with the process image array. The corrected image (FIG. 6D) can be applied to obtain a process image (e.g., FIG. 6E) that is closer to the desired process result (image) (DPI) than the initial image (e.g., FIG. 6B). This can be repeated until the difference between the desired process image (DPI) and the actual process image (PI) is satisfactory (e.g., until a threshold or target thickness profile is met).

[0067]

[0081] FIG. 7 shows a digitally controlled plasma processing device according to the present disclosure. FIG. 7A shows an actuator plate 700A, FIG. 7B depicts a selected plasma cell 700B, and FIG. 7C depicts a control unit 700C of the digitally controlled plasma processing device. In one embodiment, the plasma processing device depicted in FIGS. 7A - 7C may include any of the plasma processing systems disclosed in any of FIGS. 1 - 6. Alternatively, the plasma processing device may be other plasma processing devices as described herein.

[0068]

[0082] As seen in FIG. 7A, the actuator plate 700A includes a plurality of interfaces 702A - C. For example, three interfaces (e.g., X interface 702A, Y interface 702B, and Z interface 702C) may be used. Each interface may include a series of lead wires (e.g., wires) coupled to a set of plasma cells 706 disposed across the actuator plate 700A. The relative orientation of each interface is exemplary, and it should be noted that the role played by each interface 702A - C is interchangeable with other interfaces. In some embodiments, a first interface (e.g., Z interface) carries an addressing signal for addressing (e.g., digitally flagging, electronically storing data) selected plasma cells 706 that are activated during a subsequent maintenance period of the plasma process during an addressing period of the plasma process. The second and third interfaces (e.g., X interface 702A and Y interface 702B) carry maintenance signals to each of the plasma cells 706 during the maintenance period of the plasma process. The addressing signal may be targeted at selected cells. In some embodiments, the maintenance signal is carried to each plasma cell 706 regardless of whether the plasma cell was previously addressed. However, in other embodiments, only selected cells (e.g., addressed cells, "on" cells only) receive the maintenance signal.

[0069]

[0083] As shown in FIG. 7B, the plasma cell 706 may include an addressable switch (i.e., an addressable actuator) 710, a memory element 712, and an emitter 714. In some embodiments, the memory element 712, which may correspond to any combination of volatile and / or non-volatile storage mechanisms, receives an address signal (e.g., from the Z interface 702C and the Y interface 702B) and stores in the memory an indication that the cell has been addressed (e.g., during the address period of the plasma process). The plasma cell 706 may receive a sustain signal (e.g., from the X interface 702A and the Y interface 702B). If the plasma cell 706 has been previously addressed by an address signal, the indication in the memory element 712 causes the addressable switch to close. Closing the addressable switch enables the sustain signal to activate the emitter 714. The emitter may include a light emitter, a plasma generator (e.g., an ion or electron flux), or a plasma shutter. For example, when activated, the emitter 714 may generate and emit a plasma-related flux.

[0070]

[0084] As shown in FIG. 7C, the process of addressing and sustaining a plasma cell can be performed by a control unit 700C. The control unit 700C can include one or more processors, (one or more) analyzers, and / or circuits for addressing and sustaining the plasma cell 706. As seen in FIG. 7C, the control unit 700C includes a process step analyzer 720. The process step analyzer 720 receives configuration and / or parameter data for process steps in the plasma process. For example, the process step analyzer can receive gas information (e.g., gas type, gas flow rate, gas pressure, etc.), the pressure of the processing chamber, the total process time of the process step, and energy requirements (e.g., ion energy for the bias electrode). The control unit also includes a generator 722. The generator 722 can include a DC generator and / or an RF generator. The generator 722, in cooperation with the process step analyzer 720, generates a required base signal having the required amplitude (e.g., an auxiliary signal (e.g., a control signal) required for control or addressing, and the magnitude and process time of other voltages for performing the process step). For example, the process analyzer 720 can determine an addressing voltage, a sustaining voltage, a scanning voltage, and a method of dividing the total process time into an addressing duration, a scanning duration, and a sustaining duration. In some embodiments, as described in detail in other embodiments, the process step can be performed using a plurality of sub-fields. The duration of each sub-field can be determined by the process step analyzer 720 and can be performed by the generator 722.

[0071]

[0085] As shown in FIG. 7C, control unit 700C includes processing elements (e.g., processors) for executing image processing function 724 and process tuning function 726, as will be described in a plurality of subsequent embodiments (e.g., methods 800-1000 of FIGS. 8-10). In some embodiments, image processing function 724 may include generating and addressing an image and dividing the addressed image into a series of subfield images for executing process steps. In some embodiments, process tuning function 726 converts actual measured image data (e.g., 49 measured points across a substrate) into a process image having coordinates of plasma elements. The process tuning function may further compare a desired process image with the process image and generate a new addressed image having a new processing time and new subfield information (e.g., length of each subfield). This new addressed image and associated data may then be used for the next iteration of the process step.

[0072]

[0086] As shown in FIG. 7C, the control unit includes drivers 728, 730 and synchronizer 732. Driver 728 is associated with powering the plasma cell during both the addressing period and the sustain period. Driver 730 is associated with powering selected plasma cells addressed based on the addressed image. Synchronizer 732 adjusts signals generated from each of the drivers to perform addressing, scanning, and sustaining of plasma cell 206. As described above, a plurality of interfaces 702A-C are used to transmit signals to plasma cell 206 of actuator plate 700A. Note that the on state may be a first voltage level and the off state may be a second voltage level. For example, the first voltage level may be greater than the second voltage level. In another example, the second voltage level may be grounded.

[0073]

[0087] Figures 8-12 depict flow diagrams showing exemplary methods 800-1200 related to digital plasma process control according to some embodiments of the present disclosure. For simplicity of explanation, methods 800-1200 are depicted and described as a series of operations. However, the operations according to the present disclosure may be performed in various orders and / or simultaneously, and may be performed with other operations not presented or described herein. Further, not all of the illustrated operations may be executed to implement methods 800-1200 in accordance with the subject matter of the present disclosure. Additionally, those skilled in the art will understand and appreciate that methods 800-1200 may alternatively be represented as a series of correlated states via a state diagram or events. Methods 800-1200 may be executed, for example, by the plasma processing system 100 or 200 of FIGS. 1-2. At least some of the operations of methods 800-1200 are controlled and / or implemented by a controller of the process chamber, such as by the control unit 700C of FIG. 7C.

[0074]

[0088] FIG. 8 is a flowchart of a method 800 for plasma processing according to multiple aspects of the present disclosure. Referring to FIG. 8, at block 801, processing logic receives exposure data associated with performing a plasma process using digital process control. The exposure data may be transmitted as an exposure map (e.g., an image file, or an exposure map as described in connection with FIGS. 6A-6B). Alternatively or additionally, the exposure data may include plasma process parameters such as, among other things, a sustain voltage, an addressed voltage, a total process time, and a subfield structure (e.g., the number of subfields and relative processing times).

[0075]

[0089] In block 802, the processing logic generates a set of sub-fields associated with the exposure data. The sub-fields can include a plurality of plasma exposure values. Each plasma exposure value is associated with a respective plasma element of a set of plasma elements configured to generate a plasma-related flux. For example, using sub-fields as described in connection with FIGS. 1A-1C, the total process time can be divided into a plurality of frames and / or sub-frames.

[0076]

[0090] In block 803, the processing logic addresses selected plasma elements associated with a first sub-field of the set of sub-fields. In some embodiments, an addressing technique as described in connection with FIGS. 7A-7C can be used to address the selected plasma elements. For example, as described in connection with FIGS. 7A-7C, the plasma elements can include memory elements (e.g., memory element 712 in FIG. 7B) that can store data that can close a switch to activate an emitter in response to receiving a sustain voltage.

[0077]

[0091] In block 804, the processing logic applies power to the plasma elements over a sustain period corresponding to the first sub-field. The sustain period can include the duration during which a constant voltage (e.g., a sustain voltage) is applied to each of the plasma elements. For example, as described in connection with FIG. 7B, during the sustain period, all of the plasma elements are supplied with the same sustain voltage, and those cells that were previously addressed (e.g., data was stored in the memory elements) drive and activate elements (e.g., light emitters, plasma emitters, plasma shutters, etc.). For example, the process image resulting from the selected plasma emitter increases in "brightness" (e.g., change in thickness) as the sustain duration increases.

[0078]

[0092] In block 805, the processing logic removes (e.g., erases) the addressing associated with the first sub-field. All of the previously addressed plasma elements can clear any addressable data (e.g., clear any charges and / or data stored in the memory element 712).

[0079]

[0093] In block 806, the processing logic addresses another selected plasma element associated with the next sub-field. As described above, the addressing technique can be used to address this next selected plasma element in the same manner as one embodiment of the processing logic in block 803, as described in connection with FIGS. 7A-7C.

[0080]

[0094] In block 807, the processing logic applies power to the plasma element over a sustain period corresponding to the sub-field associated with the previously addressed plasma element. As described above, the sustain period can include the duration during which a constant voltage (e.g., a sustain voltage) is applied to each of the plasma elements. For example, as described in connection with FIG. 7B, during the sustain period, all of the plasma elements are supplied with the sustain voltage, and those cells that were previously addressed (e.g., data is stored in the memory element) drive and activate elements (e.g., light emitters, plasma emitters, plasma shutters, etc.). For example, the process image resulting from the selected plasma emitter increases in "brightness" (e.g., thickness) as the sustain duration increases.

[0081]

[0095] In block 808, the processing logic removes the addressing associated with the previously addressed selected plasma element. Similar to what was done in block 805, all of the previously addressed plasma elements can clear any addressable data (e.g., clear any charges and / or data stored in the memory element 712).

[0082]

[0096] In block 809, the processing logic determines whether all sub - fields within a set of sub - fields have been processed. In response to determining that all sub - fields have been processed, the processing logic proceeds to block 810 along the yes path. In response to determining that not all sub - fields within a set of sub - fields have been processed, the processing logic proceeds to block 806 along the no path and continues by addressing the selected cell associated with the next sub - field.

[0083]

[0097] In block 810, the processing logic determines whether all frames have been processed. In response to determining that all frames have been processed, the processing logic proceeds along the yes path and ends. In response to determining that not all frames have been processed, the processing logic proceeds to block 803 along the no path and continues by processing the next frame. In some embodiments, this process is repeated until all sub - fields are processed, while in other embodiments, the process continues until the end condition of the plasma process is met (e.g., the process result meets a threshold criterion).

[0084]

[0098] In some embodiments, method 800 is repeated several times (M) using frames, gradually making the image (both the exposure image and the process image) "brighter". Each frame uses the same image (t1, τ ik ) and results in the same normalized process image as H ik , but the "brightness" h ik increases with the number of frames until it reaches H ik . The process time is the total T = Mt1 for displaying a single frame t1. For example, for a uniform desired process image (DPI), H ik =H = constant, and the process image h ik of a single frame is also uniform, and the time increases the "brightness" / thickness of the same image.

[0085]

[0099] In another embodiment, the exposure image is displayed only once, but the overall process time is divided based on an appropriate number of subfields, and each subfield is substantially M times longer than the appropriate subfield in the previous embodiment. In this embodiment, some areas reach H ik earlier and then stop, while other areas are still processed until the entire image reaches the desired brightness / thickness value. For example, with a uniform DPI of H ik =H=constant, as each area stops one by one and their brightness is changed until the last one reaches the same value, the image will not be uniform until the very end.

[0086]

[0100] FIG. 9 is a flowchart of a method 900 for tuning a plasma process according to various aspects of the present disclosure. Referring to FIG. 9, at block 901, processing logic receives data including a set of plasma exposure durations associated with a set of plasma elements. In some embodiments, the data is received in the form of an exposure image that includes "brightness" values corresponding to the exposure duration for each of the plasma elements. For example, the plasma elements may be represented as nodes (i, k) indicating their relative positions to each other. The exposure image may be mapped to individual plasma elements and include values (e.g., depicted as colors or varying degrees of brightness) corresponding to the total exposure duration of each plasma element.

[0087]

[0101] At block 902, the processing logic uses a set of plasma elements to perform a process on a substrate using the set of plasma exposure durations. The plasma elements may be configured to generate a plasma-related flux. In some embodiments, the set of plasma exposure durations is the amount of time t that the first substrate is exposed to the plasma-related flux generated by the associated plasma elements associated with the associated plasma elements. ikIt includes. In other embodiments, the first data further includes a process duration indicating the total amount of time for performing substrate process operations on the first substrate. Any one of a set of plasma exposure durations may include a percentage value of the process duration. In some embodiments, a set of plasma exposure durations is the amount N of plasma pulses in which the associated plasma elements (i, k) expose the first substrate during the plasma process ik It includes. In some embodiments, as described in detail in connection with other drawings (e.g., FIG. 9), substrate processing may be performed within a single frame or multiple frames having various numbers of subfields

[0088]

[0102] As described above, in some embodiments, the first data may be stored as an image file (e.g., h · ik ≡δh ik / δt). A set of plasma exposure durations may be stored as an array or map having at least one of a brightness value or a color value indicating the exposure duration. Processing the data may include converting the image file into an addressed image. For example, a color map may indicate a general exposure mapped to an addressed image or data that indicates the individual exposure durations of a set of plasma elements. This data may be stored as an overall frame or may be divided into subfields, addressed, maintained, and erased (e.g., as described in method 800 of FIG. 8).

[0089]

[0103] In some embodiments, the received data takes the form of an exposure image t(x, y) on the substrate via an image file or an exposure map. For example, in a plurality of digitally controlled source / plasma elements, the thickness of the process result (grown film, etching depth, etc.) is a function h(x i , y k , t)≡h ik (t). Here, t = t(i, k) = t ikis the on-time of the source located at the (i, k) node. File h · ik ≡ dh k / dt and using (δ|h|) / δt > 0, the exposure time t ik can be adjusted at all nodes (i, k) to achieve the process profile h0(x, y). This time t ik is an exposure image that can constitute the data received in block 901.

[0090]

[0104] In block 903, the processing logic receives data including a set of plasma exposure durations and an associated thickness profile of the substrate generated using the set of plasma exposure durations with a set of plasma elements. In some embodiments, the thickness profile may include the thickness of the film taken at several points measured across the substrate (e.g., 49 locations across the substrate). The thickness profile may then be extrapolated to represent the thickness across the surface of the substrate in an area not located away from the measured locations. The thickness profile or the on-wafer result image is the coordinate r ik interpolated to the position of the plasma element (e.g., plasma mini-source) as a function h(r): h(r ik ) = h(x i , y k ) ≡ h ik and may include process results (e.g., thickness of the grown film, etch depth, etc.) as h. Regardless of the position and number of the measured points, the dimensions and coordinates of the process image array are the same as those of the exposure image array t(r ik ) = t ik .

[0091]

[0105] The thickness h ik (t) around the plasma element (also known as a node) grows with the on-time (or the number of pulses in the DBD) at that node (i, k) to achieve the desired process image (DPI) H(x, y). The time t ik is the on-wafer image h ik = H ikIt is the address - specified image being searched for to obtain.

[0092]

[0106] In block 904, the processing logic determines an update of a set of plasma exposure durations based on a comparison between the associated thickness profile and the target thickness profile. For example, the comparison can be made between the thickness profile h ik =k(t ik ) and the target thickness profile or H of the DPI ik . Updates of various durations t ik or the amount N of plasma pulses ik can be updated for individual plasma elements (i, k).

[0093]

[0107] In block 905, the processing logic uses a set of plasma elements to execute a process on a new substrate using the updated set of plasma exposure durations. In some embodiments, the process may be executed using the same equipment (e.g., plasma elements) where only the exposure duration has changed.

[0094]

[0108] In block 906, the processing logic receives data including the associated thickness profile of the new substrate generated using the updated set of exposure durations with a set of plasma elements. The thickness profile received in block 906 may include the same features as the thickness profile received in block 903.

[0095]

[0109] In block 907, the processing logic determines whether the associated thickness profile of the new substrate meets a criterion. In response to determining that the associated thickness profile of the new substrate profile meets the criterion, the processing logic proceeds to block 908 along the yes path. In response to determining that the associated thickness profile of the new substrate profile does not meet the criterion, the processing logic proceeds to block 904 along the no path. In some embodiments, the thickness profile h ik and the desired process image (DPI) (H ikWhen the difference from ik may meet the threshold criteria. For example, each thickness value of the profile may be within a predetermined difference limit, a process control limit, and / or a statistical boundary.

[0096]

[0110] In block 908, the processing logic saves the new image file (e.g., saves it locally) and ends the process.

[0097]

[0111] In some embodiments, tuning is used to update the total time (e.g., brightness) of the same image. In some embodiments, tuning is used to update the image while maintaining the same total time. In some embodiments, both the total time and the image may be updated. For example, tuning the total time or updating the image may be used to update a partially developed or stable process. For example, updating a part of the data (e.g., brightness or image file) may apply fine-tuning such as considering the drift of a slow process during normal manufacturing operations. In this embodiment, a test wafer may be used.

[0098]

[0112] In some embodiments, the measurement of the substrate (e.g., identifying the thickness profile received in blocks 903 and 905) may be performed after the processing step is completed. For example, the process result (e.g., change in the thickness profile) may be confirmed outside a position close to the processing chamber or the plasma source. However, in a plurality of other embodiments, on-demand adjustment of the manufacturing process can be performed using techniques for in-situ processes. For example, a specific position on the substrate may be live monitored, and any process update can be dynamically determined to meet the desired result (e.g., process image) at the monitored location of the substrate.

[0099]

[0113] In some embodiments, the initial address-specified image is unknown, and thus, the total process time t pris unknown. A uniform addressing image (t(i, k) = t pr ) can be used as a starting point (e.g., at blocks 901 and 902).

[0100]

[0114] FIG. 10 is a flowchart of a method 1000 for tuning a plasma process according to various aspects of the present disclosure. The method 1000 generally includes processing a plurality of wafers (e.g., two wafers at a time) using various durations, making a comparison between the resulting thicknesses, and based on that comparison, determining a rate of change of thickness values at one or more processing locations on a first substrate and a second substrate. Modifications to the processing instruction commands (e.g., image files) can be determined based on the rate of change of the thickness values. For example, the modification of the first data may be in response to determining that the rate of change of the thickness values at one or more processing locations meets a predetermined value.

[0101]

[0115] The following embodiments are exemplary processes that use the method 1000 to tune the plasma exposure duration (e.g., exposure image). At block 1001, the processing logic receives an arbitrary initial image file t ik = t ik 0 . Block 1002 is where the processing logic processes two substrates (e.g., wafers). One is at time t ik and the other is at time t ik + δt. In some embodiments, the initial image t ik 0 can be a simple and uniform image (e.g., a uniform gray image). In that case, all elements are the same. Alternatively, the initial image t ik 0 is one previously generated for a similar process. δt (e.g., an update to a set of plasma exposure durations) can be the same for all nodes or a few percent of the process t pr .

[0102]

[0116] In block 1003, the processing logic compares a first thickness profile associated with a first substrate with a second thickness profile associated with a second substrate. In some embodiments, the thickness profile can generally be represented as a process image (e.g., a mapping of thickness across each substrate). For example, the process images on these wafers can be represented as follows. That is, h ik =h ik (t ik ) (Equation 5) and h ik (t ik +δt)=h ik +δh ik (Equation 6)

[0103]

[0117] In block 1004, the processing logic determines a film growth rate (e.g., more generally, a rate of change of a thickness value). The film growth rate can be associated with a plasma element (e.g., properties of the element, type of element, parameters of the processing chamber, etc.). For example, using Equation 5 and Equation 6, the following growth rate file (array) can be obtained using the following equation. That is, h ik =δh ik / δt (Equation 7)

[0104]

[0118] The thickness profile h ik =h(t ik ) can be compared with a target thickness profile or H of DPI ik (e.g., block 1003).

[0105]

[0119] In block 1005, the processing logic determines whether the first thickness profile of the associated substrate meets the criteria. In response to determining that the associated thickness profile of the new substrate profile meets the criteria, the processing logic proceeds to block 1007 along the yes path. In response to determining that the associated thickness profile of the new substrate profile does not meet the criteria, the processing logic proceeds to block 1006 along the no path. In some embodiments, h ik may meet the threshold criteria when the difference between it and the desired process image (DPI) (H ik ) is within the threshold criteria. For example, each thickness value of the profile may be within a predetermined difference limit, a process control limit, and / or a statistical boundary. ik

[0106]

[0120] In block 1006, the processing logic updates the image file based on the film growth rate. Updating the image file may include updating a set of plasma exposure durations. Updating a set of plasma exposure durations may include modifying the initial process image using the following formula. That is, t ik →t ik +(H ik -h ik ) / h ik =t ik +(H ik -h ik ) / (δh ik )·δt (Equation 8)

[0107]

[0121] Repeat the image processing procedure (e.g., blocks 1002, 1003, 1004). That is, t ik →h ik 、h ik →check→δt(i, k)→t(i, k) h ik and DPI (H ik ) until the difference between them is within the threshold criteria (e.g., in block 1005). ​

[0108]

[0122] In block 1007, the processing logic saves the image file and / or the growth rate file and ends the process.

[0109]

[0123] FIG. 11 is an exemplary diagram of a training phase of a machine learning model according to multiple aspects of the present disclosure. A system, such as a machine learning system, may use method 1000 to train, validate, or test at least one of a machine learning model according to multiple embodiments of the present disclosure. In some embodiments, one or more operations of method 1000 may be performed by a dataset generator of a computing device (e.g., computing device 730 of FIG. 7). Note that the multiple components described with respect to FIGS. 1-7 may be used to illustrate the multiple aspects of FIG. 11. In some embodiments, machine learning is performed to identify interactions between plasma elements of a digital plasma system. Changes in the time that a particular plasma element is active (or open) affect both the area of the substrate associated with that particular plasma element and the areas of the substrate proximate to the area associated with the particular plasma element. For example, the on-time of a plasma element may most strongly affect the area of the substrate directly beneath that plasma element. However, the on-time of that plasma element may also affect areas around, but not directly beneath, the area directly beneath the plasma element. As a result, an increase or decrease in the on-time of a particular plasma element has an impact on multiple areas of the substrate. Thus, when the on-time of a first plasma element decreases the amount of plasma flux reaching a particular area, this may also reduce the amount of plasma flux reaching surrounding areas, and thus it may be appropriate to increase the on-time of one or more other plasma elements associated with the surrounding areas. However, such changes to those plasma elements may increase the flux on yet other areas, which may justify changing the on-time of yet other plasma elements associated with those areas. Thus, in multiple embodiments, a model is generated that can be used to determine what adjustments to make to a recipe executed in a particular processing chamber based on the thickness profile of a substrate being processed in the processing chamber.

[0110]

[0124] Referring to FIG. 11, in some embodiments, at block 1101, processing logic implements method 1100 and initializes training set T to an empty set.

[0111]

[0125] At block 1102, the processing logic identifies a first data input (e.g., a first training input, a first validation input) that includes a thickness profile of the substrate. The first data input may include a thickness profile that includes one or more thickness values of a film on the substrate measured at various locations across the surface of the substrate.

[0112]

[0126] At block 1103, the processing logic identifies a first target output for one or more of the data inputs (e.g., the first data input). The first target output includes an exposure map (e.g., an image file or exposure duration data) that results in a thickness profile that is used as a first target input when processed by a plasma supply system.

[0113]

[0127] At block 1104, the processing logic optionally generates mapping data that indicates an input / output mapping. The input / output mapping (or mapping data) may refer to a data input (e.g., one or more of the data inputs described herein), a target output for the data input (e.g., one or more of the data inputs described herein), a target output for the data (e.g., where the target output identifies an exposure map and / or an image), and the relationship between the (one or more) data inputs and the target output.

[0114]

[0128] At block 1105, the processing logic adds the mapping data generated at block 1104 to data set T.

[0115]

[0129] In block 1106, the processing logic branches based on whether dataset T is sufficient for at least one of training, validating, or testing a machine learning model. If so (the "yes" branch), execution proceeds to block 1107; otherwise (the "no" branch), execution returns to block 1102 and continues. In some embodiments, whether dataset T is sufficient may be determined simply based on the number of input / output mappings and / or the number of labeled exposure maps within the dataset, while in some other embodiments, it should be noted that whether dataset T is sufficient may be determined based on one or more other criteria (e.g., a measure of the diversity of data examples, accuracy, etc.) in addition to or instead of the number of input / output mappings.

[0116]

[0130] In block 1107, the processing logic provides a dataset T for training, validating, or testing a machine learning model. In some embodiments, the dataset T is a training set and is provided to a training engine for performing training. In some embodiments, the dataset T is a validation set and is provided to a validation engine for performing validation. In some embodiments, the dataset T is a test set and is provided to a test engine for performing testing. In the case of a neural network, for example, the input values of a given input / output mapping (e.g., numerical values associated with data inputs) are input into the neural network, and the output values of the input / output mapping (e.g., numerical values associated with target outputs) are stored at the output nodes of the neural network. The connection weights within the neural network are then adjusted according to a learning algorithm (e.g., error backpropagation, etc.), and the procedure is repeated for other input / output mappings within the dataset T. After block 1107, the machine learning model can be at least one of trained using a training engine, validated using a validation engine, or tested using a test engine. The trained machine learning model may be implemented by a control plate (e.g., control plates 106, 204) and / or a computing device (e.g., computing device 730 of FIG. 7) to identify the exposure map of the target thickness profile of the substrate.

[0117]

[0131] In multiple embodiments, a machine learning model and / or a physical model is trained using a training data set generated (e.g., as generated according to method 1100). The model may be trained to receive, as input, a thickness profile or thickness map as measured from a substrate processed by a process chamber using a plasma process, and / or an exposure map of exposure settings of plasma elements of the process chamber used during the process that resulted in the generated thickness profile or thickness map. The model may output an exposure map (e.g., an updated exposure map) indicating exposure settings for each plasma element for future iterations of the process in the process chamber. In multiple embodiments, the model may be agnostic to the process chamber and / or the process recipe. Thus, the model may be generated based on training data items generated based on a process performed in a first process chamber or a first set of process chambers, and then may be used in a second process chamber without performing any transfer learning to tune the model for the second process chamber. Once the model is generated, any thickness profile and / or exposure map may be input into the model regardless of which particular process chamber was used to perform the process that resulted in the thickness profile. The model may output an exposure map indicating which plasma element settings to use to achieve uniform plasma etching and / or uniform plasma enhanced deposition. The exposure map may be input into the process chamber along with the process recipe. The process chamber may execute a process recipe adjusted based on the exposure map. For example, the exposure map may indicate, for each plasma element of a digital plasma source, what percentage of the time defined in the recipe the plasma element should be turned on or opened during the process.

[0118]

[0132] In one embodiment, the trained machine learning model is a regression model trained using regression. Multiple examples of regression models are regression models trained using linear regression or Gaussian regression. The regression model predicts the value of Y when a known value of the X variable is given. The regression model may be trained using regression analysis that may include interpolation and / or extrapolation. In one embodiment, the parameters of the regression model are estimated using the least squares method. Alternatively, Bayesian linear regression, percentage regression, least absolute deviation, nonparametric regression, scenario optimization, and / or distance metric learning may be performed to train the regression model.

[0119]

[0133] In one embodiment, the trained machine learning model is a decision tree, a random forest model, a support vector machine, or another type of machine learning model.

[0120]

[0134] In one embodiment, the trained machine learning model is an artificial neural network (also simply referred to as a neural network). The artificial neural network may be, for example, a convolutional neural network (CNN) or a deep neural network. In one embodiment, the processing logic performs supervised machine learning to train the neural network.

[0121]

[0135] An artificial neural network generally includes a feature representation component having a classifier or a regression layer that maps features to a target output space. For example, a convolutional neural network (CNN) hosts multiple layers of convolutional filters. Pooling may be performed, non-linearity may be addressed in the lower layers, and generally a multi-layer perceptron is added thereon to map the top-layer features extracted by the convolutional layer to a determination (e.g., classification output). The neural network may be a deep network having multiple hidden layers or a shallow network having zero or a small number (e.g., 1 - 2) of hidden layers. Deep learning is a class of machine learning algorithms that uses a cascade of multiple layers of non-linear processing units for feature extraction and transformation. Each successive layer uses the output from the previous layer as input. The neural network may learn in a supervised (e.g., classification) and / or unsupervised (e.g., pattern analysis) manner. Some neural networks (e.g., deep neural networks, etc.) include a hierarchical structure of layers, and different layers learn different levels of representation corresponding to different levels of abstraction. In deep learning, each level learns to transform the input data into a slightly more abstract and complex representation.

[0122]

[0136] Training of the neural network may be realized in a supervised learning manner. This involves feeding a training data set consisting of labeled inputs through the network, observing its output, defining an error (by measuring the difference between the output and the label value), and tuning the weights of the network across all its layers and nodes using techniques such as deep gradient descent and error backpropagation so that the error is minimized. In many applications, this process is repeated over a large number of labeled inputs in the training data set to obtain a network that can generate correct outputs even when presented with inputs different from those present in the training data set. This generalization is realized when a sufficiently large and diverse training data set is available in a high-dimensional setting such as that of large images.

[0123]

[0137] A trained machine learning model may be retrained periodically or continuously to enable continuous learning and improvement of the trained machine learning model. The model may generate an output based on an input, an operation may be executed based on the output, and the result of the operation may be measured. In some cases, the result of the operation is measured within a range of seconds or minutes, and in some cases, a longer time is required to measure the result of the operation. For example, one or more additional processes may be executed before the result of the operation can be measured. The operation and the result of the operation may indicate whether the output was the correct output and / or the difference between what the output should have been and what it was. Thus, the operation and the result of the operation can be used to determine a target output that can be used as a label for sensor measurements. Once the result of the operation is determined, new training data items can be generated using the input (e.g., thickness profile), the output of the trained machine learning model (e.g., exposure map), and the target result (e.g., target thickness profile) and the actual measurement result (e.g., measured thickness profile). The new training data items can then be used to further train the trained machine learning model. This retraining process may be performed on-tool at a controller of the process chamber in multiple embodiments.

[0124]

[0138] In some embodiments, training the machine learning model may result in a database for prediction processing. For example, uniform addressing (t ik =t m →h ik (t m )) and addressing of a single (one cell) or several local profiles t ik =t+δt ik →δh ik (t)(around (i,k) on the background of a certain level h ik (t) where δt ik is localized), and t m is the training set.

[0125]

[0139] In some embodiments, a first set of uniform input images t1, t2, … for certain conditions are used to generate a set of appropriate outputs and a set of appropriate local growth rates δh ik / δt. These outputs can be tested to generate a selected target process image. If the addressed image is close enough to the target process image (e.g., block 1106) for the determined process range, the processing logic may continue by generating other process conditions (e.g., other gases). Method 1100 may be repeated for multiple process conditions. If the generated process images are not close (e.g., the process is non - linear and h ik is h · ik depends on h), additional training time may be added between the elements of the original set.

[0126]

[0140] In another embodiment, a previously measured thickness level h ik (t) creates a local addressing δt ik .

[0127]

[0141] FIG. 12 is a flowchart of a method 1200 for using a machine - learning model to modify a plasma exposure process according to various aspects of the present disclosure. Referring to FIG. 12, at block 1201, the processing logic executes a plasma process using an exposure image (e.g., an exposure map) to generate a substrate having a first thickness profile. The exposure image may include brightness values or color values indicating the exposure durations of a set of plasma elements for exposing the substrate to a plasma - related flux.

[0128]

[0142] In some embodiments, the exposure image is displayed (repeated) M times using a frame and gradually becomes “brighter”. Each frame uses the same image (t1, τ ik ) and results in the same normalized process image H ik , but the “brightness” h ik is such that it is H ikincreases with the number of frames until it reaches. The process time is the total T = Mt1 for displaying a single frame t1. For example, at a uniform desired process image (DPI), H ik = H = is constant, and the process image h of a single frame ik also becomes uniform, increasing the "brightness" / thickness of the image over time.

[0129]

[0143] In another embodiment, the exposure image is displayed only once, but the overall processing time is divided based on the appropriate number of sub - fields, and each sub - field is substantially M times longer than the appropriate sub - field in the previous embodiment. In this embodiment, some areas reach H ik earlier and then stop, while other areas continue to be processed until the entire image reaches the desired brightness / thickness value. For example, at a uniform DPI where H ik = H = is constant, as each area stops one by one and their brightness is changed until the last one reaches the same value, the image will not be uniform until the very end.

[0130]

[0144] In another embodiment, all steps of the plasma process may be characterized by a fixed time. The time may be replaced by a link to the exposure image. This controls the process time for each cell or plasma element, which may have thousands of elements. The exposure image may be stored in a file such as a uniform matrix (all components being the same). This may be easily generated manually when no other files exist or when a very complex algorithm can be utilized for the purpose of obtaining a specific process image.

[0131]

[0145] In block 1202, the processing logic provides a thickness profile as an input to a trained machine learning model associated with a target thickness profile. A first thickness associated with the process is an exposure image. The machine learning model may be configured to reach a desired target thickness profile. The target thickness profile may be associated with the specifications or characteristics of the substrate.

[0132]

[0146] In block 1203, the processing logic obtains an output (one or more) from the machine learning model that includes a modification to the first exposure map. The machine learning model may receive a first exposure map in various forms. For example, the exposure map may be received by the machine learning model as a map, array, matrix, series of values, etc. that indicate plasma processing exposure instructions.

[0133]

[0147] In block 1204, the processing logic applies one or more of the modifications to the exposure map to generate a modified exposure map. In some embodiments, the modification to the exposure map includes changing one or more exposure duration values of the exposure map.

[0134]

[0148] In block 1205, the substrate is processed using the modified exposure map to generate a substrate having a target thickness profile. In some embodiments, processing the first substrate using the modified exposure image generates a substrate having a target thickness profile. In other embodiments, processing a second substrate prior to the process using the first exposure map results in a second substrate having a target thickness profile.

[0135]

[0149] FIG. 13 depicts a block diagram of an exemplary computing device 1300 capable of plasma supply and / or processing, operating in accordance with one or more aspects of the present disclosure. In various exemplary embodiments, various components of computing device 1300 may represent various components of a control plate (e.g., control plates 106, 204, 702 of FIGS. 1, 2, and 7), a computing device (e.g., computing device 730 of FIG. 7), a training engine, a verification engine, and / or a test engine described in connection with FIG. 11.

[0136]

[0150] Exemplary computing device 1300 may be connected to other computing devices in a LAN, intranet, extranet, and / or the Internet. Computing device 1300 may operate to function as a server in a client-server network environment. Computing device 1300 may be a personal computer (PC), a set-top box (STB), a server, a network router, switch or bridge, or any device capable of executing a set of (sequential or otherwise) instruction commands that specify the actions to be taken by the device. Further, although only a single computing device is shown, the term "computer" should also be understood to include any collection of computers that individually or jointly execute a set of (or multiple sets of) instruction commands to perform any one or more of the methods described herein.

[0137]

[0151] Exemplary computing device 1300 may include a processing device 1302 (also referred to as a processor or CPU), a main memory 1304 (e.g., dynamic random access memory (DRAM) such as read-only memory (ROM), flash memory, synchronous DRAM, etc.), a static memory 1306 (e.g., flash memory, static random access memory (SRAM), etc.), and a secondary memory (e.g., data storage device 1318), which may communicate with each other via bus 1330.

[0138]

[0152] Processing device 1302 represents one or more general-purpose processing devices such as a microprocessor or a central processing unit. More specifically, processing device 1302 may be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIM) microprocessor, a processor implementing other instruction sets, or a processor implementing a combination of instruction sets. Processing device 1302 may also be one or more dedicated processing devices such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), a network processor, etc. According to one or more aspects of the present disclosure, processing device 1302 may be configured to execute instruction instructions for implementing methods 800-1200 shown in FIGS. 8-12.

[0139]

[0153] Exemplary computing device 1300 may further include a network interface device 1308. It may be communicatively coupled to network 1320. Exemplary computing device 1300 may further include a video display 1310 (e.g., a liquid crystal display (LCD), a touch screen, or a cathode ray tube (CRT)), an alphanumeric input device 1312 (e.g., a keyboard), a cursor control device 1314 (e.g., a mouse), and an acoustic signal generating device 1316 (e.g., a speaker).

[0140]

[0154] Data storage device 1318 may include a machine-readable storage medium (or more specifically, a non-transitory machine-readable storage medium) 1328. One or more sets of executable instruction instructions 1322 are stored therein. According to one or more aspects of the present disclosure, executable instruction instructions 1322 may include executable instruction instructions associated with executing methods 800-1200 shown in FIGS. 8-12.

[0141]

[0155] Executable instruction 1322 may also be fully or at least partially present in main memory 1304 and / or in processing device 1302 during its execution by exemplary computing device 1300, and main memory 1304 and processing device 1302 also constitute a computer-readable storage medium. Executable instruction 1322 may be further transmitted and received across a network via network interface device 1308.

[0142]

[0156] Computer-readable storage medium 1328 is shown in FIG. 13 as a single medium, but the term "computer-readable storage medium" is to be understood to include a single medium or a plurality of media (e.g., a centralized or distributed database, and / or associated caches and servers) that store one or more sets of operational instructions. The term "computer-readable storage medium" is also to be understood to include any medium that can store or encode a set of instructions executable by a machine to cause the machine to perform any one or more of the methods described herein. Thus, the term "computer-readable storage medium" should be interpreted to include, but not be limited to, solid state memory, optical media, and magnetic media.

[0143]

[0157] Some portions of the detailed description above are presented from the perspective of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the means used by those skilled in the data processing art to most effectively convey the substance of the present invention to others skilled in the art. An algorithm herein, and in general, is conceived of as a self-consistent sequence of steps leading to a desired result. These steps are those requiring physical manipulation of physical quantities. Usually, though not necessarily, these physical quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, or otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, etc.

[0144]

[0158] However, it should be noted that all of these terms and similar terms should be associated with appropriate physical quantities and are merely convenient labels applied to such physical quantities. Unless otherwise specified in the following description, throughout the description of this specification, descriptions using terms such as "identifying", "determining", "storing", "adjusting", "causing", "returning", "comparing", "creating", "stopping", "loading", "copying", "throwing", "replacing", "performing", etc. are to be understood as referring to the operations and processes of a computer system or similar electronic computing device. These operate on data represented as physical quantities (electrical quantities) in the registers and memories of a computer system and convert them into other data similarly represented as physical quantities in the memory or registers of the computer system, or other storage devices, transmission devices, or display devices for such information.

[0145]

[0159] Multiple embodiments of the present disclosure also relate to an apparatus for performing the methods described herein. This apparatus may be specifically constructed for the required purpose, or it may be a general-purpose computer system selectively programmed by a computer program stored in the computer system. Such a computer program may be stored in a computer-readable storage medium, such as, but not limited to, any type of disk including optical disks, compact disk read-only memory (CD-ROM), and magneto-optical disks, read-only memory (ROM), random access memory (RAM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic disk storage media, optical storage media, flash memory devices, other types of machine-accessible storage media, or any type of media suitable for storing electronic instruction commands. Each of them is coupled to the computer system bus.

[0146]

[0160] The methods and displays presented herein are not inherently related to any particular computer or other device. Various general-purpose systems may be used in conjunction with a program in accordance with the teachings herein, or it may be found expedient to construct more specialized devices to perform the required method steps. The required structures for these various systems will become apparent as described in the following description. Additionally, the scope of the present disclosure is not limited to any particular programming language. It should be understood that various programming languages may be used to implement the teachings of the present disclosure.

[0147]

[0161] The foregoing description sets forth numerous specific details, such as multiple examples of specific systems, components, methods, etc., in order to provide a good understanding of several embodiments of the present disclosure. However, it will be apparent to those skilled in the art that at least some embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known components or methods are not described in detail or are presented in a simple block diagram format in order to avoid unnecessarily obscuring the present disclosure. Accordingly, the specific details described are merely exemplary. Certain embodiments may still be considered to be within the scope of the present disclosure, even if they differ from these exemplary details.

[0148]

[0162] Throughout this specification, references to "one embodiment" or "an embodiment" mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Additionally, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". When the terms "about" or "substantially" are used in this specification, it is intended to mean that the recited nominal value is accurate within ±10%.

[0149]

[0163] The operations of the methods described herein are illustrated and described in a particular order, but the order of operations of each method may be changed such that certain operations are performed in the reverse order and certain operations are at least partially performed simultaneously with other operations. In another embodiment, the instructions or sub-operations of the separate operations may be intermittent and / or alternating.

[0150]

[0164] It should be understood that the above description is for illustrative purposes only and not for purposes of limitation. Many other embodiments will be apparent to those of ordinary skill in the art upon reading and understanding the above description. Accordingly, the scope of the disclosure should be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.

Claims

1. A processing chamber, an actuator plate disposed within the processing chamber, the actuator plate comprising a plurality of plasma cells; and 1. A plasma processing system comprising: a control unit coupled to the actuator plate, the control unit configured to control the actuator plate by independent activation or deactivation of the plurality of plasma cells, A plasma processing system, wherein a plasma cell, in response to being activated, independently exposes a localized area of ​​a substrate disposed within the processing chamber to a plasma-associated flux.

2. 2. The plasma processing system of claim 1, wherein each of the plurality of plasma cells comprises an addressable actuator configured to change a state of a corresponding plasma cell between a first state (on) and a second state (off).

3. 3. The plasma processing system of claim 2, wherein each addressable actuator is configured to maintain the state of the corresponding plasma cell in either the first state (on) or the second state (off) until receiving an addressing signal from the control unit.

4. 3. The plasma processing system of claim 2, wherein the control unit controls the duration for which a sustain signal is applied to the actuator plate, the sustain signal, when applied, actuating selected plasma cells to the first state (ON).

5. a power supply coupled to the actuator plate and to the control unit, the power supply providing to the actuator plate: a first addressing signal for changing the state of selected plasma cells; and configured to provide a sustain signal for a duration to activate the selected plasma cells for the duration; The plasma processing system of claim 2 , wherein the selection of the plasma cell is performed by the control unit and the duration is determined by the control unit.

6. 6. The plasma processing system of claim 5, wherein the control unit is further configured to divide a total process time into a number of subfields for selecting the plasma cells and determining the duration, each subfield including an addressing period and a sustain period.

7. 10. The plasma processing system of claim 1, wherein the processing chamber comprises a gas inlet and a gas outlet for controlling a flow of a supply gas into and out of the processing chamber.

8. 10. The plasma processing system of claim 1, further comprising a plasma source disposed within said processing chamber, said plasma source generating said plasma-related flux.

9. 10. The plasma processing system of claim 8, wherein the plurality of plasma cells comprises a plurality of plasma shutters, the plurality of plasma shutters switchable between an open position and a closed position, the plasma shutters allowing the plasma-related flux of the plasma source to pass through an associated plasma cell while in the open position, and the plasma shutters preventing selected of the plasma-related flux from passing through the associated plasma cell while in the closed position.

10. 10. The plasma processing system of claim 8, further comprising an RF power supply, the plurality of plasma cells further comprising an RF bias electrode, the plurality of plasma cells responsive to being activated to expose the substrate to ions at a first energy level, and the plurality of plasma cells responsive to being deactivated to expose the substrate to ions at a second energy level lower than the first energy level.

11. A processing chamber, and 1. A system comprising: an actuator plate disposed within the processing chamber, the actuator plate comprising a plurality of plasma elements configured to independently expose a substrate disposed within the processing chamber to a plasma-related flux, the actuator plate configured to independently activate the plurality of plasma elements, The system further comprises: a plasma element that, in response to being activated, independently exposes a localized area of ​​the substrate to the plasma-related flux; and the actuator plate performs individual, time-dependent activation of the plurality of plasma elements to selectively expose the substrate to the plasma-related flux.

12. 12. The system of claim 11, further comprising a control unit coupled to the actuator plate, the control unit sending a signal to the actuator plate, the signal activating a selected number of plasma elements for a selected duration.

13. The system of claim 11 , further comprising a plasma source disposed within the processing chamber, the plasma source generating the plasma-related flux.

14. 14. The system of claim 13, wherein the plurality of plasma elements comprises a plurality of plasma shutters configured to independently switch between an open position and a closed position, wherein a plasma shutter allows the plasma-related flux of the plasma source to pass through an associated plasma element while in the open position, and wherein the plasma shutter prevents the plasma-related flux from passing through the associated plasma element while in the closed position.

15. 14. The system of claim 13, further comprising an RF power supply, the plurality of plasma elements further comprising RF bias electrodes, the plurality of plasma elements responsive to being activated to expose the substrate to ions at a first energy level, and the plurality of plasma elements responsive to being deactivated to expose the substrate to ions at a second energy level lower than the first energy level.

16. a plasma source for generating a plasma, said plasma generating a plasma-related flux; an actuator plate disposed in the path of the plasma, the actuator plate comprising a plurality of plasma elements configured to be independently activated and deactivated, the plasma elements exposing a substrate to the plasma-associated flux in response to being activated; and a control unit configured to control the actuator plate, the control unit performing individual time-dependent activation of the plurality of plasma elements to selectively expose the substrate to the plasma-related flux.

17. a power supply, the power supply providing to the actuator plate: a first addressing signal configured to change a state of a selected plasma element; and configured to provide a sustain signal for a duration, the sustain signal being configured to activate the selected plasma element for the duration; The plasma processing device of claim 16 , wherein the selection of the plasma elements is performed by the control unit and the duration is determined by the control unit.

18. 20. The plasma processing device of claim 17, wherein the control unit is further configured to divide a total process time into a number of subfields for selecting the plasma elements and determining the duration, each subfield including an addressing period and a sustain period.

19. 17. The plasma processing device of claim 16, wherein the plurality of plasma elements comprises a plurality of plasma shutters that switch between an open position and a closed position, the plasma shutters allowing the plasma-related flux to pass through an associated plasma element of the actuator plate while in the open position, and the plasma shutters preventing selected of the plasma-related flux from passing through the associated plasma element while in the closed position.

20. 17. The plasma processing device of claim 16, further comprising an RF power supply, the plurality of plasma elements further comprising RF bias electrodes, the plurality of plasma elements responsive to being activated to expose the substrate to ions at a first energy level, and the plurality of plasma elements responsive to being deactivated to expose the substrate to ions at a second energy level lower than the first energy level.

Citation Information

Patent Citations

  • Film deposition device and film deposition method

    JP2014152348A

  • Method and apparatus for generating a reflection reduction layer on a substrate

    JP2014530297A

  • Plasma reactor for processing workpiece with array of plasma point sources

    JP2017069540A

  • Plasma uniformity control by arrays of unit cell plasmas

    US20160053376A1

  • Plasma Processing Apparatus and Method of Manufacturing Semiconductor Device Using the Same

    US20190122866A1