Method for manufacturing heteroepitaxial wafer

Abstract

To provide a method for manufacturing a heteroepitaxial wafer by epitaxially growing a 3C-SiC monocrystalline film of high quality on a monocrystalline silicon substrate with high efficiency.SOLUTION: A method for manufacturing a heteroepitaxial wafer comprises: a step of preparing a monocrystalline silicon substrate having a plane orientation of (111); a step of removing a native oxide film on the surface of the monocrystalline silicon substrate by hydrogen baking using a flash lamp device; and a step of supplying a source gas containing carbon and silicon into the flash lamp device and growing a SiC monocrystal on the surface of the monocrystalline silicon substrate, wherein the step of removing the native oxide film comprises performing hydrogen baking at 900°C or more and 1350°C or less after preliminary heating at 300°C or more and 600°C or less, and the step of growing the SiC monocrystal comprises performing SiC nucleation at 900°C or more and 1350°C or less after preliminary heating at 300°C or more and 600°C or less.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a heteroepitaxial wafer.

Background Art

[0002] Since SiC has a wide bandgap of 2.2 to 3.3 eV, it has a high breakdown strength and also has a high thermal conductivity. Therefore, it is a material expected to be used as a semiconductor material for various semiconductor devices such as power devices and high-frequency devices.

[0003] In addition, although the use as a platform for growing gallium nitride (GaN) (for example, Patent Document 1 and Non-Patent Document 1) is also being promoted, on the other hand, SiC wafers are mainly small in diameter, and there is a demand for larger diameters for power devices and high-frequency devices. If a high-quality 3C-SiC single crystal film can be formed on a large-diameter substrate, in addition to the use of the 3C-SiC single crystal film itself, it becomes possible to produce a heteroepitaxial wafer having a high-quality GaN layer with a large diameter.

[0004] Therefore, as a method for increasing the diameter, epitaxial growth on a silicon (hereinafter also referred to as Si) substrate with good compatibility with the device process has been studied (for example, Patent Documents 1 and 2). These patent documents disclose that a 3C-SiC single crystal film can be grown on a silicon substrate, and that a 3C-SiC single crystal film can be grown on a large-diameter substrate such as a 300 mm diameter substrate by selecting the type of reactor. The formation of the 3C-SiC single crystal film in these patent documents is characterized in that two types of source gases, a gas containing a carbon source precursor and a gas containing a silicon source precursor, are introduced into the reactor together with a carrier gas, and these source gases are decomposed and grown by high-temperature treatment (~1200 °C) or a combination of high-temperature treatment and plasma treatment.

[0005] In addition, as an example of the growth of a 3C-SiC single crystal film on a silicon substrate, Patent Document 3 discloses using a single crystal silicon substrate with a plane orientation of (110) as a single crystal silicon substrate in order to make the lattice mismatch between silicon and SiC smaller. Although this is advantageous from the perspective of lattice mismatch, it is not desirable to limit the plane orientation to (110) when considering the manufacture of heteroepitaxial wafers. At the same time, it is also disclosed that a 3C-SiC single crystal layer containing hydrogen is formed, but it is imagined that hydrogen will easily escape during the temperature increase process in the epitaxial growth sequence, and it is desired that the conditions are not dependent on the amount of hydrogen.

[0006] In addition, Patent Document 4 mentions the off-angle of a single crystal silicon substrate, but it is carbonization with propane followed by growth with propane + silane gas, which increases the types of source gases and is disadvantageous for epitaxial growth.

[0007] In addition, Patent Document 5 discloses a method for growing a 3C-SiC single crystal layer on a single crystal silicon substrate with a plane orientation of (111) and a diameter of less than 8 inches using monomethylsilane as a source gas. At this time, the film formation conditions are that after the temperature of the single crystal silicon substrate reaches the film formation conditions of 1050 to 1100 °C, the pressure in the chamber is maintained at 2×10 -4 ~3×10 -4 Torr (0.02 to 0.03 Pa) for 5 to 12 hours. Since the formation of the 3C-SiC single crystal layer is carried out under extremely low pressure conditions, there is a problem of slow formation speed.

[0008] Thus, various formation methods have been developed and proposed. Considering the lattice constants of silicon and SiC, it is preferable to use an Si(111) substrate (the lattice constant of Si(111) is 3.84 Å, which is close to the lattice constant of 3C-SiC of 4.36 Å). However, even if Si(111) is used as in the past considering the lattice constant and the growth conditions are further improved, there are still problems in improving the crystallinity of the 3C-SiC single crystal film.

Prior Art Documents

Patent Documents

[0009] [Patent Document 1] Japanese Patent Publication No. 2018-522412 [Patent Document 2] Japanese Unexamined Patent Application Publication No. 2021-20819 [Patent Document 3] Japanese Unexamined Patent Application Publication No. 2006-253617 [Patent Document 4] Japanese Unexamined Patent Application Publication No. 2008-184361 [Patent Document 5] Japanese Unexamined Patent Application Publication No. 2017-39622 [Non-Patent Document]

[0010] [Non-Patent Document 1] Japanese Journal of Applied Physics 53, 05FL09 (2014) [Non-Patent Document 2] Journal of the Japan Society of Crystal Growth Vol. 43, No. 4, 213 (2016) [Summary of the Invention] [Problems to be Solved by the Invention]

[0011] As a result of more detailed examination of the Si substrate surface structure, which has not been considered conventionally, it is known that the Si(111) substrate surface undergoes a phase transition in a narrow temperature range around 860 °C (Non-Patent Document 2). Across this temperature range, the structure changes from a 7×7 structure on the low-temperature side to a 1×1 structure on the high-temperature side. Therefore, it has been difficult to form a clean 3C-SiC / Si interface due to the surface structure transition as the temperature increases. Of course, it is also conceivable to grow at a low temperature until the phase transition occurs, but due to the low surface energy, island growth has occurred. In this way, the problems specific to the Si(111) surface have been hindering the growth of 3C-SiC single crystal films.

[0012] In addition, Si(110) has a lower temperature than Si(111) and various surface structures are likely to appear, making it difficult to use as a substrate. Furthermore, although Si(100) does not have such a phase transition (precisely, a 4×4 structure etc. has been reported, but the behavior in a high-vacuum state), it is disadvantageous in terms of the lattice constant (5.4 Å, far from the lattice constant of 3C-SiC of 4.36 Å).

[0013] The present invention has been made to solve the above problems, and an object thereof is to provide a method for manufacturing a heteroepitaxial wafer in which a high-quality 3C-SiC single-crystal film is efficiently epitaxially grown on a single-crystal silicon substrate.

Means for Solving the Problems

[0014] In order to solve the above problems, the method for manufacturing a heteroepitaxial wafer of the present invention is a method for manufacturing a heteroepitaxial wafer in which a 3C-SiC single-crystal film is epitaxially grown on a single-crystal silicon substrate, the method comprising: preparing a single-crystal silicon substrate having a plane orientation of (111); removing a natural oxide film on the surface of the single-crystal silicon substrate by hydrogen baking using a flash lamp device; and supplying a source gas containing carbon and silicon into the flash lamp device to grow a SiC single-crystal on the surface of the single-crystal silicon substrate. In the step of removing the natural oxide film, after preliminary heating at 300°C or higher and 600°C or lower, hydrogen baking is performed at 900°C or higher and 1350°C or lower. In the step of growing the SiC single-crystal, after preliminary heating at 300°C or higher and 600°C or lower, SiC nucleation is performed at 900°C or higher and 1350°C or lower.

[0015] In such a method for manufacturing a heteroepitaxial wafer, by removing the native oxide film on the surface of the single-crystalline silicon substrate and then growing a SiC single crystal, it is possible to surely form a 3C-SiC single crystal film. Further, since a flash lamp apparatus is used, the rise is fast, the temperature can be controlled in a short time, and it can also handle large-diameter substrates. Further, in the step of removing the native oxide film, hydrogen baking is performed at 900°C or higher and 1350°C or lower after preheating at 300°C or higher and 600°C or lower, and in the step of growing the SiC single crystal, SiC nucleation is performed at 900°C or higher and 1350°C or lower after preheating at 300°C or higher and 600°C or lower. Therefore, in any step, preheating is performed at a temperature of 300°C or higher and 600°C or lower, that is, a temperature sufficiently lower than 860°C, which is the phase transition temperature of Si(111), so that a phase transition can be prevented from occurring during preheating. Furthermore, since the transition from a temperature range of 300°C or higher and 600°C or lower to a temperature range of 900°C or higher and 1350°C or lower can be achieved in a short time by the flash lamp apparatus, the phase transition temperature can be passed through in a very short time, and it can be controlled so that almost no phase transition occurs during the movement of the temperature range.

[0016] As described above, by a simple manufacturing process, it is possible to efficiently manufacture a heteroepitaxial wafer in which the phase transition of the single-crystalline silicon substrate is suppressed and a high-quality 3C-SiC single crystal film is epitaxially grown.

[0017] Further, it is preferable that the time of hydrogen baking at 900°C or higher and 1350°C or lower is 10 msec or more and 100 msec or less, and the time of SiC nucleation at 900°C or higher and 1350°C or lower is 1 msec or more and 20 msec or less.

[0018] If the time is set like this, while ensuring the necessary time for the hydrogen bake to remove the natural oxide film and the nucleation time for growing the SiC single crystal respectively, it is possible to make the time as short as possible. By shortening the residence time in the temperature range higher than 860 °C, which is the phase transition temperature of Si(111), the phase transition during residence can be suppressed as much as possible. Also, since the temperature drop after heating becomes faster as the residence time is shorter, it is possible to control so that almost no phase transition occurs during the temperature drop. Furthermore, since both the residence time and the time of temperature change become shorter, the time required for manufacturing can be shortened, and a heteroepitaxial wafer having a 3C-SiC single crystal film can be efficiently manufactured.

[0019] Moreover, it is preferable that the source gas is at least one of monomethylsilane and trimethylsilane.

[0020] If it is such a source gas, it is a gas containing both Si and C which are raw materials for SiC, and it is possible to supply both Si and C with a single gas. As a result, the step of nucleation by attaching carbon atoms to the surface of the single crystal silicon substrate with a gas containing a carbon source precursor, which has been called carbonization treatment before growing a 3C-SiC single crystal film and has been conventionally used, becomes unnecessary, and a 3C-SiC single crystal film can be formed in a very simple process.

Advantages of the Invention

[0021] Regarding the method for manufacturing a heteroepitaxial wafer of the present invention, by removing the native oxide film on the surface of a single-crystalline silicon substrate and then growing a single-crystalline SiC, it is possible to surely form a 3C-SiC single-crystalline film. Further, since a flash lamp apparatus is used, the temperature can be controlled in a short time with a fast rise, and it can also handle large-diameter substrates. Also, in the step of removing the native oxide film, after preheating at 300°C or higher and 600°C or lower, hydrogen baking is performed at 900°C or higher and 1350°C or lower. In the step of growing a single-crystalline SiC, after preheating at 300°C or higher and 600°C or lower, SiC nucleation is performed at 900°C or higher and 1350°C or lower. Therefore, in any step, preheating is performed at a temperature of 300°C or higher and 600°C or lower, that is, a temperature sufficiently lower than 860°C, which is the phase transition temperature of Si(111). Thus, it is possible to prevent a phase transition from occurring during preheating. Furthermore, since the transition from a temperature range of 300°C or higher and 600°C or lower to a temperature range of 900°C or higher and 1350°C or lower can be achieved in a short time by the flash lamp apparatus, the phase transition temperature can be passed through in a very short time, and it can be controlled so that almost no phase transition occurs during the temperature range transition.

[0022] As described above, by a simple manufacturing process, it is possible to suppress the phase transition of a single-crystalline silicon substrate and efficiently manufacture a heteroepitaxial wafer in which a high-quality 3C-SiC single-crystalline film is epitaxially grown.

Brief Description of the Drawings

[0023]

Figure 1

Figure 2

Figure 3

Embodiments for Carrying Out the Invention

[0024] Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

[0025] As described above, there has been a demand for a method for manufacturing a heteroepitaxial wafer that efficiently epitaxially grows a high-quality 3C-SiC single crystal film on a single crystal silicon substrate.

[0026] As a result of intensive studies on the above problems, the present inventors have found that since the surface of the Si(111) substrate undergoes a phase transition in a narrow temperature range around 860°C, it changes to a 7×7 structure on the low-temperature side and a 1×1 structure on the high-temperature side across this temperature range, and this contributes to the generation of defects. That is, the conventional method of performing initial seed formation during 3C-SiC growth using a Si(111) substrate while flowing a carbonization gas from a low temperature makes good use of this phase transition. It uses the unstable (high surface energy) portion of the adjacent structure of the low-temperature 7×7 domain as the starting point (seed) of crystal growth, and then grows 3C-SiC by raising the temperature. However, it was difficult to form a clean 3C-SiC / Si interface because the surface structure transitions as the temperature rises. Of course, it is also conceivable to grow at a low temperature until the phase transition occurs, but due to the low surface energy, island growth has occurred. In order to solve such problems peculiar to the Si(111) surface, the present inventors have studied a method for rapidly passing through the phase transition temperature range in particular, and as a result, have found a method that can control to hardly cause a phase transition by passing through these temperature ranges in a short time, and can grow a high-quality 3C-SiC single crystal with few defects, thus completing the present invention.

[0027] That is, the method for manufacturing a heteroepitaxial wafer of the present invention is a method for manufacturing a heteroepitaxial wafer in which a 3C-SiC single crystal film is epitaxially grown on a single crystal silicon substrate, the method including: a step of preparing a single crystal silicon substrate having a plane orientation of (111); a step of removing a native oxide film on the surface of the single crystal silicon substrate by hydrogen baking using a flash lamp device; and a step of supplying a source gas containing carbon and silicon into the flash lamp device to grow a SiC single crystal on the surface of the single crystal silicon substrate. In the step of removing the native oxide film, after preheating at 300°C or higher and 600°C or lower, hydrogen baking is performed at 900°C or higher and 1350°C or lower. In the step of growing the SiC single crystal, after preheating at 300°C or higher and 600°C or lower, SiC nucleation is performed at 900°C or higher and 1350°C or lower.

[0028] Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a flowchart showing an example of the method for manufacturing a heteroepitaxial wafer of the present invention. Each step of the manufacturing method will be described with reference to steps S1 to S3 in FIG. 1.

[0029] (Step S1) First, step S1 is a step of preparing a single crystal silicon substrate having a plane orientation of (111). The single crystal silicon substrate is placed in the flash lamp device.

[0030] (Step S2) Next, step S2 is a step of removing the native oxide film on the surface of the single crystal silicon substrate by hydrogen baking using the flash lamp device.

[0031] The natural oxide film on the surface is removed by hydrogen baking (H2 annealing). If the oxide film remains, SiC nucleation cannot occur on the single-crystalline silicon substrate, so this is to avoid that. At this time, for the H2 annealing, the substrate is preheated under the condition of 300°C or higher and 600°C or lower, which is sufficiently lower than the phase transition temperature of 860°C, and then the temperature for removing the natural oxide film on the surface of the single-crystalline silicon substrate is set to 900°C or higher and 1350°C or lower. When performing hydrogen baking at 900°C or higher and 1350°C or lower with a flash lamp device, if the preheating at 300°C or higher and 600°C or lower is not performed, it is to suppress the breakage of the wafer due to thermal stress caused by rapid temperature rise.

[0032] Here, although not particularly limited, more preferably, the temperature range can be 1000°C or higher and 1200°C or lower. When the temperature is low, it is necessary to make the treatment time longer to prevent the remaining of the natural oxide film, and it is more preferable to set the temperature to 1000°C or higher. Conversely, when the temperature is high, the concern about the occurrence of slip increases accordingly, so it is more preferable to set the temperature to 1200°C or lower. The pressure and time of the H2 annealing at this time only need to be able to remove the natural oxide film, and there are no particular restrictions.

[0033] Furthermore, it is preferable that the time of hydrogen baking at 900°C or higher and 1350°C or lower is 10 msec or longer and 100 msec or shorter. With such a combination of temperature range and time, while ensuring the time required to remove the natural oxide film, the residence time in the temperature range higher than the phase transition temperature of 860°C of Si(111) can be made as short as possible.

[0034] In addition, when the temperature range is 1000°C or higher and 1200°C or lower, although not particularly limited, the time range can also be, for example, 20 msec or longer and 60 msec or shorter.

[0035] (Step S3) Next, step S3 is a step of supplying a source gas containing carbon and silicon into the flash lamp device and growing a SiC single crystal on the surface of the single-crystalline silicon substrate. First, preheat the substrate under the condition that the temperature is 300°C or higher and 600°C or lower, which is sufficiently lower than the phase transition temperature of Si(111), i.e., 860°C. Then, perform SiC nucleation at 900°C or higher and 1350°C or lower. When performing nucleation at 900°C or higher and 1350°C or lower using a flash lamp apparatus, if the preheating at 300°C or higher and 600°C or lower is not performed, it is to suppress the breakage of the wafer due to thermal stress caused by a rapid temperature increase.

[0036] Here, the source gas is preferably at least one of monomethylsilane and trimethylsilane. Since C atoms are smaller and more likely to vaporize compared to Si, although it is not particularly limited, considering the raw material efficiency, trimethylsilane is more preferable, and it is also easier to set the conditions for trimethylsilane.

[0037] The nucleation time of SiC at 900°C or higher and 1350°C or lower is preferably 1 msec or longer and 20 msec or shorter. With such a combination of temperature range and time, while ensuring the time required to grow a SiC single crystal, the residence time in the temperature range higher than the phase transition temperature of Si(111), i.e., 860°C, can be made as short as possible.

[0038] Here, although not particularly limited, it can be more preferably in the temperature range of 1100°C or higher and 1300°C or lower. Also, when the temperature range is 1100°C or higher and 1300°C or lower, although not particularly limited, the time can be more preferably 5 msec or longer and 10 msec or shorter.

[0039] As described above, by the simple manufacturing process of steps S1 to S3, the phase transition of the single crystal silicon substrate can be suppressed, and a heteroepitaxial wafer with a high-quality 3C-SiC single crystal film epitaxially grown can be efficiently manufactured.

[0040] In addition, although not particularly limited, in the process of growing the SiC single crystal in step S3, it is more preferable to perform the manufacturing while controlling the pressure, such as using a flash lamp apparatus having a reduced pressure (RP) mechanism.

[0041] Specifically, when preheating at 300°C or higher and 600°C or lower, it is more preferable to set the pressure to 100 Torr or lower, and then when performing SiC nucleation at 900°C or higher and 1350°C or lower, set the pressure to 10 Torr or lower. By nucleating SiC under pressure and temperature conditions where SiC nucleation is easy, it becomes possible to more efficiently manufacture a heteroepitaxial wafer having a target 3C-SiC single crystal film thickness.

[0042] First, by setting the pressure to 100 Torr or lower during preheating, secondary or higher-order reactions such as the reaction of reactive species with the source gas in the gas phase can be prevented, so that the SiC nucleation process can be made reliable.

[0043] Next, by setting the pressure to 10 Torr or lower during SiC nucleation, while growing a 3C-SiC single crystal film, vacancies can be formed in the silicon layer directly under this 3C-SiC single crystal film. The presence of these vacancies can not only relax the lattice mismatch between 3C-SiC and silicon, but also relax the stress of the entire epitaxial layer. Therefore, even when growing a thick 3C-SiC single crystal film subsequently, it is also possible to form a 3C-SiC single crystal film without crystal defects.

[0044] Regarding the source gas, compared with the two-step method of nucleating by attaching carbon atoms to the surface of a single crystal silicon substrate with a gas containing a conventional carbon source precursor and then forming a 3C-SiC single crystal film with a gas containing a carbon source precursor and a gas containing a silicon source precursor, it is easier to control the reactive species in the gas phase, the growth can be made reliable, and it is possible to form a single crystal film without the growth of the 3C-SiC single crystal stopping.

[0045] In the above case, a thin film of 3C-SiC with a thickness of about 2 nm can be formed. Further, by using the 3C-SiC single crystal film grown as described above as a seed layer that also serves as a nucleation of SiC, it becomes possible to grow a high-quality thick 3C-SiC crystal by an RP-CVD apparatus or the like.

Example

[0046] Hereinafter, the present invention will be described more specifically by showing examples and comparative examples of the present invention, but the present invention is not limited to these examples.

[0047] [Example 1] This will be described with reference to FIG. 2. FIG. 2 is a schematic diagram (a) of the processing sequence of Example 1 and a graph (b) showing the XRD spectrum.

[0048] A single crystal silicon substrate with a diameter of 300 mm (111), boron-doped, and a resistance of 10 Ω·cm is prepared, and the single crystal silicon substrate is placed in a flash lamp apparatus, and the natural oxide film on the surface is removed by hydrogen bake (H2 annealing). At this time, for the H2 annealing, the substrate was preheated at 500 °C, which is sufficiently lower than the phase transition temperature of 860 °C of Si(111), and then annealed at 1150 °C for 40 msec.

[0049] Next, trimethylsilane gas, which is a source gas containing carbon and silicon, was set to 100 sccm, the inside of the chamber was set to 10 Torr, and the substrate was preheated at 500 °C, which is sufficiently lower than the phase transition temperature of 860 °C of Si(111), and then SiC was grown on the single crystal silicon substrate at 1300 °C for 10 msec. Here, the image of introducing the gas for 10 msec is a narrow pulse-shaped image as shown in the schematic diagram of the processing sequence in FIG. 2(a).

[0050] In this way, the crystallinity of the 3C-SiC single crystal film formed on the Si(111) substrate was evaluated by X-ray diffraction (XRD) with an In Plane configuration. The In Plane configuration is a method that can obtain strong diffraction intensity even for thin films. Here, with the Si(220) plane of the substrate as a reference, by confirming the type of the orientation plane of 3C-SiC parallel to it, it is possible to discriminate whether 3C-SiC is single crystal or polycrystal, and information on crystallinity can be obtained from the full width at half maximum of the 3C-SiC peak. In Example 1, as shown in Fig. 2(b), the peak derived from 3C-SiC was only of the (220) orientation. That is, no peaks derived from other plane indices indicating polycrystallinity were confirmed, and it was confirmed that a single crystal 3C-SiC film was grown.

[0051] [Comparative Example 1] This will be described with reference to Fig. 3. Fig. 3 is a schematic diagram (a) of the processing sequence of Comparative Example 1 and a graph (b) showing the XRD spectrum.

[0052] A single crystal silicon substrate with a diameter of 300 mm, (111) boron-doped and a resistance of 10 Ω·cm was prepared, and hydrogen baking was performed at 1130 °C in an epi furnace.

[0053] Next, while flowing trimethylsilane gas at 100 sccm, the temperature was raised from 300 °C to 1100 °C at a rate of 10 °C / min. The pressure at this time was 100 Torr. Here, the image of gas injection is a wide image as shown in the schematic diagram of the processing sequence in Fig. 3(a). The time exposed to a temperature higher than the phase transition temperature of 860 °C is much longer at high temperature in Comparative Example 1 compared to Example 1 (Fig. 2(a)).

[0054] Thereafter, the crystallinity of the grown 3C-SiC film was measured by XRD in the In Plane. As a result, as shown in Fig. 3(b), although only the peak of 3C-SiC(220) parallel to Si(220) appears, the peak is lower and the width is wider than that in Example 1 (Fig. 2(b)), and thus the full width at half maximum is larger. That is, it can be seen that the crystallinity in Comparative Example 1 is worse than that in Example 1.

[0055] From the above, it can be seen that in Example 1 of the present invention, compared with Comparative Example 1, the crystallinity of 3C-SiC is good and the phase transition is suppressed.

[0056] It should be noted that the present invention is not limited to the above embodiments. The above embodiments are illustrative, and any structure that has substantially the same structure as the technical idea described in the claims of the present invention and exhibits the same effects is included in the technical scope of the present invention.

Explanation of Reference Numerals

[0057] Steps S1, S2, S3...

Claims

1. A method for manufacturing a heteroepitaxial wafer in which a 3C-SiC single crystal film is epitaxially grown on a single crystal silicon substrate, comprising: preparing a single crystal silicon substrate having a plane orientation of (111); removing a native oxide film on the surface of the single crystal silicon substrate by hydrogen baking using a flash lamp apparatus; supplying a source gas containing carbon and silicon into the flash lamp apparatus and growing a SiC single crystal on the surface of the single crystal silicon substrate; The method having: In the step of removing the native oxide film, after preheating at 300°C or higher and 600°C or lower, hydrogen baking is performed at 900°C or higher and 1350°C or lower. In the step of growing the SiC single crystal, after preheating at 300°C or higher and 600°C or lower, SiC nucleation is performed at 900°C or higher and 1350°C or lower. A method for manufacturing a heteroepitaxial wafer, characterized in that.

2. The time of hydrogen baking at 900°C or higher and 1350°C or lower is 10 msec or more and 100 msec or less, The time of SiC nucleation at 900°C or higher and 1350°C or lower is 1 msec or more and 20 msec or less. The method for manufacturing a heteroepitaxial wafer according to Claim 1, characterized in that.

3. The method for manufacturing a heteroepitaxial wafer according to Claim 1 or 2, characterized in that the source gas is at least one of monomethylsilane and trimethylsilane.

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