Signal processing design method and processor

Abstract

To provide a signal processing design method capable of variously designing a function for an execution and a timing when the function is executed.SOLUTION: A signal processing design method contains steps of: designing a content of a predetermined sound processing to be executed in a processor for executing the sound processing to a sound signal by combining a plurality of audio components in an audio layer; and designing a control flow of a parameter by combining a plurality of control components in a control layer. The control layer is configured to generate an optional control component, and the control component contains: a first component that emits a trigger signal by using a specific date and time as an original point; and a second component that adds a change to a corresponding parameter when receiving the trigger signal.SELECTED DRAWING: Figure 4

Description

Technical Field

[0001] One embodiment of the present invention relates to a signal processing design method and a processor.

Background Art

[0002] Non-Patent Document 1 describes a signal processing design method in which an operation triggered by time can be set by calling up a scheduler setting screen from a system menu and setting a specific date and time and an operation.

[0003] Non-Patent Document 2 discloses functions such as preset recall as function examples of a scheduler.

Prior Art Documents

Non-Patent Documents

[0004]

Non-Patent Document 1

Non-Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0005] Conventional schedulers could only be set to execute only one function for a specific purpose.

[0006] One embodiment of the present invention aims to provide a signal processing design method that can diversely design the functions to be executed and the timing of executing the functions.

Means for Solving the Problem

[0007] The signal processing design method includes, in an audio layer, designing the content of the audio processing executed by a processor that performs predetermined audio processing on an audio signal by combining a plurality of audio components; and in a control layer, designing a control flow of parameters by combining a plurality of control components. The control layer is configured to be able to generate any control component, and the control component includes a first component that transmits a trigger signal starting from a specific date and time, and a second component that changes a corresponding parameter when receiving the trigger signal.

Effect of the Invention

[0008] One embodiment of this invention can diversely design the functions to be executed and the timing of executing the functions.

Brief Description of the Drawings

[0009]

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Mode for Carrying Out the Invention

[0010] FIG. 1 is a block diagram showing the configuration of the signal processing design system 1. The signal processing design system 1 includes a processor 11, an information processing device 12, a network 13, a speaker 14, and a microphone 15.

[0011] The processor 11 and the information processing device 12 are connected via the network 13. The network 13 includes a LAN (Local Area Network) or the Internet. The processor 11 is connected to the speaker 14 and the microphone 15 via an audio cable.

[0012] However, in the present invention, the connection between devices is not limited to this example. For example, the processor 11, the speaker 14, and the microphone 15 may be connected via a network. Also, the processor 11 and the information processing device 12 may be connected by a communication line such as a USB cable.

[0013] Processor 11 is an example of a signal processing device. In the audio industry, a processor is called an audio processor or a digital audio processor, etc., and it is a signal processing device for the purpose of improving sound quality. Processor 11 receives an audio signal from microphone 15. Also, processor 11 outputs an audio signal to speaker 14. In this embodiment, speaker 14 and microphone 15 are shown as examples of audio devices connected to processor 11. However, the audio device that inputs an audio signal to processor 11 is not limited to microphone 15, and the audio device that outputs an audio signal from processor 11 is not limited to speaker 14. Also, a larger number of audio devices may be connected to processor 11.

[0014] Figure 2 is a block diagram showing the configuration of processor 11. Processor 11 includes a display 201, a user I / F 202, an audio I / O (Input / Output) 203, a CPU 204, a network I / F 205, a flash memory 206, and a RAM 207. However, processor 11 is not limited to this configuration. Processor 11 may only have a signal processing configuration. For example, processor 11 may not include a display 201 or a user I / F 202, etc. Also, even if audio I / O 203 is not present, processor 11 may receive an audio signal via an external I / O device.

[0015] Display 201 is composed of an LED or an LCD, etc., and displays various information (for example, the power ON / OFF state, etc.). User I / F 202 is an operator such as a switch or a button. User I / F 202 receives user operations such as power ON / OFF.

[0016] CPU 204 functions as a signal processing unit for performing signal processing. CPU 204 reads a predetermined program stored in flash memory 206, which is a storage medium, into RAM 207 and executes it to perform the operation of the signal processing unit. Signal processing includes a predetermined audio process for an audio signal and a control flow of parameters related to the audio process.

[0017] The CPU 204 performs predetermined audio processing such as filtering on an audio signal input from an audio device such as a microphone 15 via, for example, the audio I / O 203 or the network I / F 205. The CPU 204 outputs the audio signal after the audio processing to an audio device such as a speaker 14 via the audio I / O 203 or the network I / F 205.

[0018] The content of the audio processing is designed by a combination of a plurality of audio components. The designed content of the audio processing is held in the flash memory 206. Note that the design of the content of the audio processing in the present embodiment means determining the content of the audio processing of the processor 11 so that the input audio signal is processed and output according to the flow intended by the user.

[0019] The control flow of the parameters is designed by a combination of a plurality of control components. The designed control flow of the parameters is held in the flash memory 206. The design of the control flow of the parameters in the present embodiment means determining the control content of the processor 11 so that the parameters of the audio processing are changed according to the flow intended by the user.

[0020] Note that the program read by the CPU 204 does not need to be stored in the flash memory 206 within the device itself. For example, the program may be stored in a storage medium of an external device such as a server. In this case, the CPU 204 may read the program from the server into the RAM 207 and execute it each time.

[0021] Next, FIG. 3 is a block diagram showing the configuration of the information processing apparatus 12. The information processing apparatus 12 is an example of a signal processing design apparatus and is an information processing apparatus such as a personal computer or a dedicated embedded system. The information processing apparatus 12 may be a cloud server connected to the processor 11 via the Internet.

[0022] The information processing apparatus 12 includes a display 301, a user I / F 302, a CPU 303, a RAM 304, a network I / F 305, and a flash memory 306.

[0023] The CPU 303 reads out a program stored in the flash memory 306, which is a storage medium, to the RAM 304 to realize a predetermined function. Note that the program read out by the CPU 303 does not necessarily have to be stored in the flash memory 306 within the own device. For example, the program may be stored in a storage medium of an external device such as a server. In this case, the CPU 303 may read out the program to the RAM 304 from the server and execute it each time.

[0024] Similar to the flash memory 206 of the processor 11, the flash memory 306 holds the designed sound processing content and the control flow of the designed parameters. Further, the flash memory 306 stores application programs (editors) for designing the sound processing content and the control flow, respectively. Information on the sound processing content and the control flow of the designed parameters designed using the editor is transmitted to the processor 11 and synchronized with the flash memory 206 of the processor 11. Therefore, the sound processing content and the control flow information designed in the information processing apparatus 12 are reflected in the processor 11 at any time. The processor 11 performs various processes including sound processing (for example, an operation triggered by a scheduler described later) according to the received sound processing content and control flow information. Note that even when the information processing apparatus 12 and the processor 11 are offline, the user can design the sound processing content and the control flow using the information processing apparatus 12. When the information processing apparatus 12 and the processor 11 go online, the sound processing content and the control flow designed offline are reflected in the processor 11.

[0025] FIG. 4 is a diagram showing an example of a GUI (audio layer) for designing the content of audio processing in an editor. FIG. 5 is a diagram showing an example of a GUI (control layer) for designing a control flow in an editor. FIG. 6 is a flowchart showing the operation of the audio layer of the CPU 303, and FIG. 7 is a flowchart showing the operation of the control layer of the CPU 303.

[0026] The CPU 303 switches and displays an audio layer and a control layer in the editor. The CPU 303 displays an audio layer designation icon 500 and a control layer designation icon 700 for each of the audio layer and the control layer, and accepts a switching operation.

[0027] In the audio layer, the CPU 303 accepts the arrangement of arbitrary audio components (S11). An audio component means a functional configuration that inputs an audio signal, performs predetermined audio processing on the input audio signal, and outputs an audio signal. The audio components include, for example, an oscillator 501, an input component 502, a fader 503, a mixing component 504, an amplifier 505, and an output component 506 as shown in FIG. 4. The user can generate an audio component to be used by arranging the icon image of the audio component at an arbitrary position on the GUI screen as shown in FIG. 4.

[0028] The oscillator 501 outputs an arbitrary audio signal. The input component 502 corresponds to a plurality of input ports (for example, an analog input port or a digital input port) in the audio I / O 203. The input component 502 assigns at least one of the plurality of input ports to at least one of the plurality of input channels.

[0029] The fader 503 performs a process of adjusting the level of the input audio signal. The mixing component 504 performs signal processing of mixing the audio signals of each input channel to an arbitrary output channel. The amplifier 505 performs signal processing of amplifying the audio signals of each output channel. The output component 506 assigns each output channel to any one of a plurality of output ports.

[0030] Then, the CPU 303 determines a combination of a plurality of arranged audio components (S12). For example, the user determines a combination of a plurality of arranged audio components by performing an operation of connecting the plurality of audio components arranged on a GUI screen as shown in FIG. 4 to each other. More specifically, the user connects them by visually connecting each audio component with a visual line along the flow of the audio signal on a GUI screen as shown in FIG. 4. By using such a GUI, the user can design a complex flow in an easy-to-understand visual manner.

[0031] As described above, the user designs the content of the audio processing executed by the processor that performs predetermined audio processing on the audio signal by a combination of a plurality of audio components in the audio layer.

[0032] On the other hand, in the control layer, the CPU 303 accepts the arrangement of an arbitrary control component (S21). The control component means a functional configuration that receives a signal and changes a corresponding parameter according to the received signal. The signal received by the control component includes a trigger signal output starting from a specific date and time. The corresponding parameter may be a parameter related to audio processing or a parameter related to a specific process of the processor 11 (for example, power on, off, etc.).

[0033] The control component includes a first component that transmits a trigger signal starting from a specific date and time, and a second component that changes the corresponding parameter when receiving the trigger signal.

[0034] As shown in FIG. 5 for example, the control component includes a scheduler 701, a preset recall 702, a fader 703, a logic processing unit 704, an oscillator 705, etc.

[0035] The scheduler 701 is an example of the first component. The preset recall 702, the fader 703, the logic processing unit 704, and the oscillator 705 are examples of the second component. The user can generate the control component to be used by arranging the icon image of any control component at any position on the GUI screen as shown in FIG. 5.

[0036] The scheduler 701 transmits a trigger signal starting from a specific date and time. The scheduler 701 has a transmitting unit that transmits the trigger signal.

[0037] The preset recall 702 has a receiving unit that receives the trigger signal. The preset recall 702 has a processing unit that changes the corresponding parameter when receiving the trigger signal. When the processing unit of the preset recall 702 receives the trigger signal, it reads out the specified preset (Preset 001) and changes the parameter (Param.set) of the sound processing flow designed in the audio layer to the read preset.

[0038] The fader 703 corresponds to the fader 503 of the audio layer shown in FIG. 4. The fader 703 has an output unit that outputs a signal corresponding to the changed parameter. The fader 703 in the control flow outputs a trigger signal as a control signal when the parameter of the fader 503 of the audio layer becomes a certain value (for example, -3dB) as an example.

[0039] The logic processing unit 704 is a logic circuit such as AND, OR, NOT, NAND, NOR, XOR, or XNOR. The logic processing unit 704 shown in FIG. 5 has two receiving units, a processing unit, and one output unit. For example, when the user sets an AND circuit as the processing unit of the logic processing unit 704, the logic processing unit 704 outputs a trigger signal as a control signal when it receives trigger signals from all the receiving units.

[0040] The oscillator 705 corresponds to the oscillator 501 shown in FIG. 4. The oscillator 501 has a receiving unit that receives a trigger signal. Further, the oscillator 705 has a processing unit that changes a corresponding parameter when it receives a trigger signal from the logic processing unit 704. The oscillator 705 in the control flow outputs an audio signal to the oscillator 501 of the audio layer when it receives a trigger signal, as an example.

[0041] In the control layer, the CPU 303 determines a combination of a plurality of arranged control components (S22). For example, the user determines a combination of a plurality of arranged control components by performing an operation of connecting the plurality of control components arranged on a GUI screen as shown in FIG. 5 to each other. More specifically, the user designs a control flow of parameters by connecting a plurality of control components with visual lines on a GUI screen as shown in FIG. 5. By using the GUI, the user can visually and easily design even a complex control flow.

[0042] In the example of FIG. 5, the scheduler 701 has two transmitting units. The preset recall 702 has one receiving unit. The fader 703 has one output unit. The logic processing unit 704 has two receiving units and one output unit. The oscillator 705 has one receiving unit.

[0043] The first transmitting section of the scheduler 701 is connected to the receiving section of the preset recall 702. The second transmitting section of the scheduler 701 is connected to the first receiving section of the logic processing section 704. The output section of the fader 703 is connected to the second receiving section of the logic processing section 704 of the logic processing section 704. The output section of the logic processing section 704 is connected to the receiving section of the oscillator 705.

[0044] Note that the number of transmitting sections of the scheduler 701 (the first component) may be one or more. Also, the number of transmitting sections of the scheduler 701 can be set to any number. Further, the number of receiving sections, processing sections, and output sections in other control components (the second component) may also be one or more. Also, the number of receiving sections, processing sections, and output sections in other control components can be set to any number. The user can, in the GUI of FIG. 5, for example, set two receiving sections for the preset recall 702, set two transmitting sections for the logic processing section 704, and connect the first transmitting section of the logic processing section 704 and the second receiving section of the preset recall 702.

[0045] In this way, the user can design the control flow in the control layer so that the parameters of the sound processing are changed according to the intended flow of the user by combining a plurality of control components. In particular, the signal processing design method of the present embodiment can combine various logics by arranging the scheduler function as a control component, and can obtain a new customer experience in which the functions to be executed and the timings at which the functions are executed can be designed in various ways. For example, in the design of the control layer of FIG. 5, when a specific date and time is reached, the parameters (Param.set) of the sound processing flow designed in the audio layer can be changed to a specified preset (Preset 001). Also, in the design of the control layer of FIG. 5, when a specific date and time is reached and the value of the fader reaches a specific value, the oscillator 501 (oscillator 705) can be activated to output a specific sound signal.

[0046] Next, FIGS. 8 and 9 are diagrams showing an example of a scheduler setting screen. When the CPU 303 receives a selection operation (e.g., double click) of the scheduler 701 shown in FIG. 5, it shifts to the scheduler setting screen shown in FIG. 8.

[0047] On the scheduler setting screen, the CPU 303 switches and displays a monthly display screen, a daily display screen, and a list display screen. On the scheduler setting screen, the CPU 303 displays a specified icon for the monthly display screen, a specified icon for the daily display screen, and a specified icon for the list display screen, and accepts a switching operation. The scheduler setting screen in FIG. 8 is a monthly display screen. The user can arrange an arbitrary scheduler for each date of a specific month on the monthly display screen.

[0048] On the scheduler setting screen, the CPU 303 displays an Add icon, an EDIT icon, a CLEAR icon, and an ALL CLEAR icon. When the CPU 303 receives a selection operation of the Add icon, it displays a new scheduler setting screen as shown in FIG. 9. The user can set the date and time for transmitting a trigger signal on the scheduler setting screen shown in FIG. 9.

[0049] On the setting screen of FIG. 8, when the CPU 303 receives a selection operation of an added scheduler and further receives a selection operation of the EDIT icon, it may display the setting screen shown in FIG. 9. The user can change the date and time for transmitting the trigger signal of the existing scheduler on the setting screen of FIG. 9.

[0050] On the setting screen of FIG. 8, when the CPU 303 receives a selection operation of an added scheduler and further receives a selection operation of the CLEAR icon, it deletes the corresponding scheduler.

[0051] When the CPU 303 receives a selection operation of the ALL CLEAR icon on the setting screen in FIG. 8, it deletes all the schedulers.

[0052] FIG. 10 is a diagram showing an example of a list display screen. The list display screen displays the set schedulers in a row. The list shows an enable switch for determining whether to send a trigger signal when a specific date and time is reached. That is, the first component in the example shown in FIG. 10 includes an enable switch for determining whether to send a trigger signal when a specific date and time is reached. The user can turn on or off the enable switch for each scheduler on the list display screen shown in FIG. 10. Note that the interface for turning on / off the enable switch is not limited to the example shown in FIG. 10. A scheduler with the enable switch set to off does not send a trigger signal even when a specific date and time is reached. Thus, the user can change the on / off state of the scheduler function according to the situation.

[0053] In addition, the user can specify the type of each scheduler on the list display screen shown in FIG. 10. For example, the type of "Event001" of the scheduler shown in FIG. 10 is set to "Once", and the type of "Event002" is set to "Roop". A scheduler set to the type "Once" sends a trigger signal only once at a specific date and time.

[0054] The specific date and time of a scheduler set to the type "Roop" is configured to loop based on a specific period. The specific period is, for example, every hour, every day, every week, every month, or every year. "Event002" in FIG. 10 is configured to send a trigger signal at a specific date and time every week. Therefore, the scheduler of "Event002" sends a trigger signal every time one week has passed since the set specific date and time.

[0055] As a result, the user can execute a specific function in accordance with an event (such as a weekly morning ceremony) that is executed every time a specific period elapses.

[0056] FIG. 11 is a diagram showing another example of the list display screen. The scheduler (first component) may include a plurality of transmission units as described above. In this case, as shown in FIG. 11, the enable switch may be configured to determine whether to transmit a trigger signal from each of the plurality of transmission units.

[0057] As a result, the user can enable or disable only some functions at a specific date and time.

[0058] The description of this embodiment is illustrative in all respects and not restrictive. The scope of the present invention is shown not by the above-described embodiments but by the claims. Furthermore, the scope of the present invention is intended to include all modifications within the meaning and scope equivalent to the claims.

[0059] For example, the signal processing device includes not only a processor but also, for example, a power amplifier, a mixer, or an audio amplifier. The information processing device can also design signal processing executed by a power amplifier, a mixer, or an audio amplifier, etc., not only a processor.

Description of Reference Numerals

[0060] 1: Signal Processing Design System, 11: Processor, 12: Information Processing Device, 13: Network, 14: Speaker, 15: Microphone, 201: Display, 202: User I / F, 203: Audio I / O, 204: CPU, 205: Network I / F, 206: Flash Memory, 207: RAM, 301: Display, 302: User I / F, 303: CPU, 304: RAM, 305: Network I / F, 306: Flash Memory, 500: Audio Layer Designation Icon, 501: Oscillator, 502: Input Component, 503: Fader, 504: Mixing Component, 505: Amplifier, 506: Output Component, 700: Control Layer Designation Icon, 701: Scheduler, 702: Preset Recall, 703: Fader, 704: Logic Processing Unit, 705: Oscillator

Claims

1. In an audio layer, designing the content of the sound processing executed by a processor that performs predetermined sound processing on a sound signal by combining a plurality of audio components; In a control layer, designing a control flow of parameters by combining a plurality of control components; comprising: The control layer is configured to be able to generate any control component; The control component includes a first component that transmits a trigger signal starting from a specific date and time; and a second component that, when receiving the trigger signal, changes the corresponding parameter, A signal processing design method.

2. The second component includes a receiving unit that receives the trigger signal; a processing unit that changes the corresponding parameter according to the trigger signal; and an output unit that outputs a signal corresponding to the changed parameter, comprising: The signal processing design method according to claim 1.

3. The second component has a plurality of the receiving unit, the processing unit, and the output unit respectively; The signal processing design method according to claim 2.

4. The first component includes a transmitting unit that transmits the trigger signal when the specific date and time arrives; configured to be connectable by connecting the transmitting unit and the receiving unit with a visual line; The signal processing design method according to claim 2 or claim 3.

5. The first component includes a plurality of the transmitting units; The signal processing design method according to claim 4.

6. In an audio layer, designing the sound processing by connecting the plurality of audio components with a visual line; In a control layer, designing a control flow of parameters by connecting a plurality of control components with a visual line; The signal processing design method according to any one of claims 1 to 3.

7. The first component includes an enable switch that determines whether to transmit the trigger signal when the specific date and time arrives; The signal processing design method according to any one of claims 1 to 3.

8. The first component includes a plurality of transmitting units that transmit the trigger signal when the specific date and time arrives; A plurality of enable switches that determine whether to transmit the trigger signal from each of the plurality of transmitting units when the specific date and time is reached, including, configured such that the plurality of transmitting units and the receiving unit can be connected by connecting them with visual lines respectively, The signal processing design method according to claim 2 or claim 3.

9. The specific date and time is configured to be set so as to loop based on a specific period, The signal processing design method according to any one of claims 1 to 3.

10. In an audio layer, a processor that performs predetermined audio processing on an audio signal by combining a plurality of audio components, The processor receives information on the content of the audio processing and the control flow of parameters from a signal processing design device and performs the audio processing, The signal processing design device, designing the content of the audio processing executed by the processor, In a control layer, designing the control flow of the parameters by combining a plurality of control components, performing, The control layer is configured to be able to generate any control component, The control component, a first component that transmits a trigger signal starting from a specific date and time, including a second component that changes the corresponding parameter when receiving the trigger signal, processor.

11. The second component, a receiving unit that receives the trigger signal, a processing unit that changes the corresponding parameter according to the trigger signal, an output unit that outputs a signal corresponding to the changed parameter, including, The processor according to claim 10.

12. The second component has a plurality of the receiving unit, the processing unit, and the output unit respectively, The processor according to claim 11.

13. The first component includes a transmitting unit that transmits the trigger signal when the specific date and time is reached, configured such that the transmitting unit and the receiving unit can be connected by connecting them with a visual line, The processor according to claim 11 or claim 12.

14. The first component includes a plurality of the transmitting units, The processor according to claim 13.

15. In the audio layer, design the sound processing by connecting the plurality of audio components with visual lines. In the control layer, design the control flow of the parameters by connecting the plurality of control components with visual lines. The processor according to any one of claims 10 to 12.

16. The first component includes an enable switch for determining whether to transmit the trigger signal when the specific date and time is reached. The processor according to any one of claims 10 to 12.

17. The first component includes a plurality of transmitting units for transmitting the trigger signal when the specific date and time is reached, and a plurality of enable switches for determining whether to transmit the trigger signal from each of the plurality of transmitting units when the specific date and time is reached. It includes and is configured to be able to connect the plurality of transmitting units and the receiving unit with visual lines respectively. The processor according to claim 11 or claim 12.

18. The specific date and time is configured to be set to loop based on a specific period. The processor according to any one of claims 10 to 12.

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