Head velocity derating for data storage device including disk media

Abstract

To provide a data storage device (DSD) and a method for operating the DSD.SOLUTION: A DSD includes at least one head and a voice coil motor (VCM). As a precaution against damaging at least one head during an emergency power off (EPO) state, the upper velocity limit for moving at least one head to execute a command to read or write data at a target location on a disk is reduced in response to a target location being in an outer diameter (OD) region of the disk, a direction required to move at least one head is from an inner diameter (ID) to the OD, and a starting position is at least as radially far from a position of the OD region as a predetermined threshold value.SELECTED DRAWING: Figure 3B

Description

Technical Field

[0001] A data storage device (DSD) can include one or more disks used to magnetically store data. In such a DSD, while the disk is rotating to magnetically read data from the disk and magnetically write data onto the disk using a head, the head operates on the surface of the disk. The head is supported by a slider assembly that floats approximately 5 nanometers above the disk surface due to an air bearing or the lift force of air caused by the high-speed rotation of the disk. During power-up, power-down, or a low-power state of the DSD, when the head is not moving or floating on the rotating disk surface, the head is parked or unloaded onto a ramp near the outer diameter of the disk to prevent damage to the disk and the head.

[0002] If there is an unexpected power loss (i.e., an Emergency Power Off (EPO) event) while the head is floating on the disk, the head uses the power that may remain in the DSD, such as by using a capacitor or the continuous rotation of the disk, to quickly move to the ramp to help prevent the head from colliding with the disk surface due to the reduction in lift force caused by the deceleration of the rotating disk. In such an EPO event, there is also a risk of damaging the head if the head hits the ramp at too high a speed, which can cause the head slider assembly to bounce back from the ramp (i.e., "head slider flapping").

[0003] As the DSD physically shrinks and the amount of data stored on the disk increases, the risk of head damage during an EPO event increases. For example, by increasing the number of disks that overlap and align circumferentially within the disk pack of the DSD, the amount of space between the stacked disks can be reduced, which can make the ramp steeper and more likely to cause head slider flapping when the head hits during an EPO event. However, reducing the maximum speed of the head during normal operation to prevent damage during a possible EPO event can potentially reduce performance due to the slower movement of the head, increase the size of the unused outer diameter region of the disk that the ramp can overlap, or function as protection against possible data loss if the head collides with the disk due to the lower maximum speed.

Brief Description of the Drawings

[0004] The features and advantages of embodiments of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings. The drawings and the associated descriptions are provided to illustrate embodiments of the present disclosure and not to limit the scope of the claims.

Figure 1

Figure 2A

Figure 2B

Figure 3A

Figure 3B

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Figure 7

[0005] In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to those skilled in the art that the disclosed embodiments may be practiced without some of these specific details. In other instances, well-known structures and techniques have not been shown in detail to avoid unnecessarily obscuring the various embodiments.

[0006] Exemplary System Environment FIG. 1 shows an example of a data storage device (DSD) 106 that receives data from a host 101 according to one or more embodiments. As shown in the example of FIG. 1, DSD 106 includes a non-volatile memory (NVM) in the form of a magnetic disk 150. In this regard, since DSD 106 includes a rotating magnetic disk, it can be regarded as a hard disk drive (HDD). In other embodiments, DSD 106 may include other NVM media such as flash memory or other non-volatile solid-state memory in addition to disk 150.

[0007] As will be understood by those skilled in the art with reference to the present disclosure, the disk 150 may form part of a disk pack that includes a plurality of disks circumferentially aligned with the disk 150. In such an implementation, the head 136 may form part of a Head Stack Assembly (HSA) that includes heads configured to read data from and write data to corresponding disk surfaces within the disk pack. In this regard, the head 136 may move with another head below the disk 150 to read and write data on the bottom surface of the disk 150. As used herein, "at least one head" may refer to a single head such as the head 136, or a plurality of heads that move together such as the head 136 and the head on the opposite side of the disk 150, or the heads that form the HSA.

[0008] As shown in FIG. 1, the disk 150 includes an Outer Diameter (OD) region 152 defined by an outer boundary 154 and an inner boundary 156, which may correspond to the data writing limit of the OD region 152. The disk 150 is rotated by a Spindle Motor (SM) 134, and the head 136 is positioned to read and write data on the surface of the disk 150. More specifically, the head 136 is connected to the distal end of an actuator 130 that rotates by a Voice Coil Motor (VCM) 132, and positions the head 136 on the disk 150 to read data from or write data to an annular track on the disk 150. The servo system of the circuit 120 controls the rotation of the disk 150 using an SM control signal 31 and controls the position of the head 136 using a VCM control signal 30.

[0009] In the example of FIG. 1, DSD106 includes circuit 120, which may include one or more processors for executing instructions, such as a microcontroller, a Digital Signal Processor (DSP), an Application-Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), hardwired logic, analog circuits, and / or combinations thereof. In one implementation, circuit 120 may include a System on a Chip (SoC), and the SoC may also include memory 140 or other local memory.

[0010] Interface 126 is configured to enable DSD106 to communicate with host 101 and may use, for example, Serial Advanced Technology Attachment (SATA), Peripheral Component Interconnect express (PCIe), Small Computer System Interface (SCSI), Serial Attached SCSI (SAS), Ethernet, or WiFi, and / or one or more other standards. As will be understood by those skilled in the art, interface 126 may be included as part of circuit 120. Although FIG. 1 shows a co-location of host 101 and DSD106, in other implementations, these two need not be physically co-located. In such implementations, DSD106 may be located remotely from host 101 and connected to host 101 via a network interface.

[0011] Memory 140 may include, for example, Dynamic Random Access Memory (DRAM), or other types of solid-state memory such as Static Random Access Memory (SRAM) or flash memory. Although the description herein generally refers to solid-state memory, solid-state memory may include flash integrated circuits, Chalcogenide RAM (C-RAM), Phase Change Memory (PC-RAM), Programmable Metallization Cell RAM (PMC-RAM), Ovonic Unified Memory (OUM), Resistive RAM (RRAM), NAND memory (e.g., Single-Level Cell (SLC) memory, Multi-Level Cell (MLC) memory, Triple-Level Cell (TLC) memory, or any combination thereof), NOR memory, EEPROM, Ferroelectric Memory (FeRAM), Magnetoresistive RAM (MRAM), 3D XPoint memory, other discrete NVM chips, or any combination of one or more of these various types of memory devices.

[0012] The data stored in the memory 140 may include data read from the disk 150, data to be stored on the disk 150, instructions loaded from the firmware 10 for execution by the circuit 120, and / or data used when executing the firmware 10. In the example of FIG. 1, the memory 140 also stores a command queue 12, an operation state 14, a performance factor 16, and an emergency power off (EPO) history 18. The command queue 12 may include commands waiting to be executed on the disk 150, such as write commands or read commands. In some implementations, the command queue 12 is used as part of a Rotational Position Optimization (RPO) algorithm to schedule and order the execution of commands so as to reduce the overall amount of seek time and latency until the target data sector reaches the head 136 and / or other heads that may be attached to the actuator 130. The RPO algorithm may also consider a Quality of Service (QoS) or timeout value for executing the commands, and may also consider speed throttling settings as described in more detail below to reduce the speed of the head 136 under certain conditions.

[0013] In this regard, the circuit 120 can reduce or lower the speed limit of the head 136 as a preventive measure against damaging the head and / or the disk surface during the EPO state in which the head 136 moves to the ramp 138 as the rotation of the disk 150 slows down due to an unexpected power loss. Conventional DSDs may limit the speed at which the head moves as a preventive measure against the head hitting the ramp at too high a speed. However, unlike conventional DSDs, in the present disclosure, the preventive reduction of speed is controlled according to or based on multiple factors in order to reduce the impact on performance regarding the average number of Input / Output Operations Per Second (IOPS) being executed on the disk.

[0014] For example, the speed limit can be reduced only for commands executed in the OD region 152 (e.g., at the target location 158) and when the direction required to move the head 136 is in the direction from the inner diameter (ID) shown by the arrow from the head 136 to the lamp 138 in FIG. 1 to the OD. Additionally, the speed limit can be reduced only in response to or based on the start position of the head 136 being at least as radially distant from the OD region position as a predetermined threshold. In such an example, the OD region position can correspond to a boundary of the OD region 152 such as the outer boundary 154 or the inner boundary 156, an annular track of the target location 158 (i.e., the dashed track shown in the OD region 152 of FIG. 1), or a predetermined position within the OD region 152 such as the radial midpoint of the OD region 152. This condition can ensure that the speed limit is reduced only for relatively long seeks to the OD region when the head 136 reaches a higher speed with more momentum and has a greater risk of contacting the lamp 138 with excessive force in the case of the EPO when the head 136 is moving at its maximum speed.

[0015] The power management 122 of the DSD 106 can detect power loss and notify the circuit 120, and then execute a part of the firmware 10 to move the head 136 onto the lamp 138 via the VCM 132. The power management 122 can include, for example, a Power Large Scale Integrated Circuit (PLSI) or other Power Management Integrated Circuit (PMIC).

[0016] In some implementations, the speed limit may also be determined by circuit 120 and reduced at least in part based on the operating states included in operating state 14 stored in memory 140. Operating state 14 may include, for example, temperature conditions such as the junction temperature of power management 122 and / or circuit 120, or other temperatures measured for another component within DSD 106, and the temperature conditions may be measured or estimated by circuit 120 during a manufacturing test process or during real-time operation in the field. Operating state 14 may additionally or alternatively include one or more characteristics of SM 134 (e.g., torque constant (Kt), coil resistance, and / or inductance), and / or one or more characteristics of VCM 132 (e.g., torque constant, coil resistance, and / or inductance). The aforementioned operating states of DSD 106 may provide an adjustable reduction of the speed limit that can be adjusted according to specific conditions or characteristics of DSD 106, and these conditions or characteristics may differ from those of another DSD even for DSDs of the same model. Additionally, the operating state may be updated in the field to account for aging of the VCM and / or spindle motor that may affect the speed of head 136 during a seek or during an EPO state, such as by affecting the relationship between acceleration or deceleration of head 136, the amount of current required by VCM 132 for head 136 to reach a particular speed, or the amount of rotation of disk 150 before reaching a target location.

[0017] For example, a lower torque constant for the VCM 132 can be translated to requiring more speed ceiling reduction because it makes it more difficult for the head to decelerate from a high speed to a lower safe speed during an EPO event. As another example, a higher temperature measured at the DSD 106 (e.g., higher than a threshold temperature) can correspond to reducing the speed ceiling because the higher temperature can make it more difficult for the VCM 132 to decelerate from a high speed to a lower safe speed during an EPO event due to a decrease in the torque constant caused by the elevated temperature. As yet another example, a larger coil resistance of the VCM 132 can correspond to a less efficient motor that may require a higher current to decelerate from a high speed to a lower safe speed during an EPO event, which can affect the speed derating setting used to reduce the speed ceiling. As another example, a lower measured inductance of the VCM 132 by the circuit 120 can correspond to a faster speed for the actuator 130 that may require an increased speed derating for the head 136 compared to different heads in different DSDs having a VCM with a larger measured inductance. Additionally, inductance can be used to measure motor degradation or aging, thereby allowing the speed derating setting to be changed over time to compensate for an increase in motor inefficiency.

[0018] In some implementations, the speed ceiling can also be determined by the circuit 120 and reduced at least in part based on performance factors included in the performance factors 16 stored in the memory 140. The performance factors 16 can include, for example, the data size of a command, execution on the disk 150 It may include the number of commands pending execution (e.g., the size of command queue 12), and / or the distance between the starting position of head 136 and the target location 158 (i.e., the seek distance). When the reduction of the speed limit has a small impact on performance (e.g., has a small impact on IOPS), the speed limit can be further reduced to better protect head 136 from damage during potential EPO states. For example, the data size of the data read or written for commands larger than the threshold data size, the number of commands pending execution greater than the threshold number of commands, and / or the seek distance shorter than the threshold seek distance, at least one of them may be beneficial for further reducing the speed limit, because the reduced speed seek has a smaller overall impact on performance in these cases.

[0019] On the other hand, the speed limit can be reduced less when the overall impact on performance is greater due to performance factors. In this regard, the overall performance of the commands regarding IOPS is more affected by a smaller data size of the command(s), fewer commands pending execution in the command queue, and / or a longer seek distance, because a relatively long amount of the total time for seeking and executing the command(s) is spent moving to the target location as compared with the case where the data size is larger, the command queue is shorter, and / or the seek distance is shorter.

[0020] In some implementations, the speed limit may also be determined by circuit 120 and reduced at least in part based on the EPO history included in the EPO history 18 stored in memory 140. The EPO history 18 may include, for example, a count of EPO events for DSD106 and / or an indication of the time from the last EPO event for DSD106. In such implementations, the speed limit may be further reduced if the count of previous EPO events is higher to protect the head 136 of the ramp 138 from the cumulative effects of collisions during EPO events. The speed limit may be further decreased, for example, after a threshold number of EPO events.

[0021] Similarly, the speed limit may be reduced at least in part based on an indication of the time from the last EPO event. A shorter indication of the time from the previous EPO event (e.g., less than a predetermined period) may increase the likelihood of another EPO event, such as during a factory test of DSD106 where a series of EPO events may exist. The speed limit may be further reduced for seeks to the OD region to protect the head 136 from damage during additional EPO events.

[0022] Those skilled in the art will understand, with reference to this disclosure, that other implementations may include a different number or different arrangement of components than those shown in FIG. 1. For example, other implementations may include a plurality of hosts communicating with DSD106, or a pool of disks or disk packs for storing data. As another exemplary variation, one or more of the operating state 14, performance factor 16, or EPO history 18 may not be included in implementations where such factors are not considered when determining the speed derating setting or reduced speed limit. Additionally, one or more of the operating state 14, performance factor 16, or EPO history 18 may be combined into a single data structure.

[0023] Figure 2A is a graph of the head trajectory of DSD according to the prior art. As shown in Figure 2A, the head moves from different locations on the disk (measured in track units along the x-axis) to the OD target location on the disk in the ID to OD direction. About 3.4×10 5 Each of the four head trajectories starting from outside the 5 track (i.e., the track with a small number along the x-axis) reaches a speed limit or maximum speed of about 3.0 meters per second (m / s). The worst-case EPO position 20 indicates the position along the head trajectory where the EPO event can cause the greatest damage to the head because the speed is relatively close to the ramp at its highest point. The dashed line 22 represents the worst-case deceleration curve before the head contacts the ramp. As shown in Figure 2A, the speed at the time of collision with the ramp for the worst deceleration during the EPO event (i.e., the EPO event occurring at the EPO position 20) is about 2.1 m / s at the position 24 where the deceleration curve 22 intersects the ramp position.

[0024] In particular, the three trajectories starting closest to the OD do not reach or come close to the speed limit or maximum speed of 3.0 m / s before decelerating to reach the farthest or most extreme target location near the outer boundary of the OD. Therefore, the peak speed for these trajectories or the deceleration curve for the EPO event occurring near it results in a lower speed when the head contacts the ramp than for the trajectories starting from farther away from the OD.

[0025] Figure 2B is a graph of the dilated head track of the DSD according to one or more embodiments. As shown in Figure 2B, the speed when hitting the lamp can be reduced from position 24 to position 28 with a lower speed of about 1.8 m / s for the worst-case deceleration curve. This is approximately the same as the worst-case speed resulting from limiting the speed ceiling of all seeks to 2.5 m / s. However, unlike other solutions that may impose a fixed speed ceiling for all seeks to the OD region, the present disclosure does not require all seeks or tracks to be limited in order to significantly reduce the worst-case lamp touch speed. Instead, it considers whether the starting position of the head for a seek is radially separated from the OD region position by at least a predetermined threshold (i.e., a long seek).

[0026] In the example of Figure 2B, the OD region position can be the outer boundary of the OD region 152 such that seeks from an outer position of the threshold position 160 towards the target location within the OD region 152 in the ID to OD direction are reduced because such seeks reach the maximum speed above the deceleration curve 23. In some implementations, the OD region 152 can represent the outer 8% of the writable surface of the disk, and the threshold position 160 can represent the position of about 22% of the writable surface of the disk, or the position of 22% of all seeks across the disk surface starting from the OD.

[0027] In other implementations, the threshold position 160 can represent a predetermined distance or threshold from the OD region position, different from when the OD region position is the outer boundary of the OD region 152. For example, the threshold position 160 can represent a predetermined threshold from the OD region position that is the track of the target location within the OD region 152 for a particular seek. In other examples, the threshold position 160 can represent a predetermined threshold from the ID boundary of the OD region 152, or another predetermined position within the OD region 152 such as an annular midpoint within the OD region 152 that can also be represented by the dashed track on the disk 152 in the example of Figure 1.

[0028] By restricting only certain seeks, the maximum speed or speed limit is reduced only for longer seeks (i.e., a greater distance between the OD region position and the start position), so the performance of the DSD can be improved. This effectively pushes the worst-case EPO position from position 20 to position 26 towards the ID, resulting in a lower worst-case lamp contact speed at position 28 when the head contacts the lamp.

[0029] In addition, the degree of dilation of the maximum speed or the amount of reduction of the speed limit may depend on the relative position of the target location within the OD region 152, as shown in Figure 2B. Tracks with target locations closer to the outer boundary of the OD region 152 have a more reduced speed limit, while tracks with target locations closer to the inner boundary of the OD region 152 have a less reduced speed limit. This variable decrease in the speed limit can conform to the new worst-case EPO deceleration curve 23. The variation in the speed limit allows for an additional performance gain by enabling the head to move faster to a specific target location closer to the inner boundary of the OD region 152 than to a target location closer to the outer boundary of the OD region 152, even with the same track start position.

[0030] As described above, target locations not in the OD region 152 do not cause the worst-case EPO lamp touch speed, so there is no need to even lower the speed limit. The dilation of the maximum speed can be limited to cases where the target location is within the OD region 152, the start head position of the seek is at least a predetermined threshold away from the OD region position, and the direction of the seek is from the ID to the OD. By restricting the speed limit dilation to these conditions and further adjusting different levels of speed limit dilation according to the proximity of the target location to the OD boundary, the worst-case lamp touch speed can be reduced to the same extent as when the maximum seek speed is reduced from 3.0 m / s to 2.5 m / s for all seeks to the OD region, and still, many other seeks to the OD region can reach higher speeds and improve performance.

[0031] Figure 3A is a graph of the delayed head tracks for different target locations within the OD region according to one or more embodiments. As shown in the example of Figure 3A, the speed limit for the seek can be dilated or reduced according to the relative position of the target location within the OD region 152. When the target location is at position D, the speed limit is most reduced because the target location D is closest to the OD boundary. When the target location is at position A, the speed limit is minimally reduced or not reduced at all because the target location A is farthest from the OD boundary.

[0032] The dashed curve in the upper right portion of Figure 3A shows how the tracks for target locations B, C, and D would be without dilating or reducing the speed limit for these seeks. EPO events that occur in these dashed regions of the undilated tracks can result in the worst-case ramp touch speed and can cause the most damage to the head. By determining the speed dilation setting, various speed limits can be reduced for the solid lines tracks for target locations B, C, and D. In some implementations, the speed dilation setting can be associated with the amount of disk rotation before reaching the target location. In some cases, this can be referred to as Just-In-Time (JIT) seek delay or JIT clip, which can be used as part of an RPO algorithm to schedule commands based on the location of the commands on one or more disk surfaces in order to reduce actuator movement and / or improve QoS for executing commands in other ways. In such cases, different speed limits (i.e., the flat horizontal portions of the tracks in Figure 3A) can correspond to different amounts of deceleration with respect to disk rotation. In other implementations, the speed dilation setting can include, for example, the speed limit itself, the current limit supplied to the VCM during a seek to move the actuator, or the time to reach the target location.

[0033] This is shown in FIG. 3B for the target position C from FIG. 3A. The solid line represents a trajectory resulting from a speed dilation setting selected or determined at least in part based on the relative position of the target location C within the OD region 152. The dashed line in FIG. 3B represents other possible trajectories for JIT seeks corresponding to other speed dilation settings that have not been selected or determined for the target location C. As shown in the example of FIG. 3B, different possible speed dilation settings range from the deceleration of the head over the time for 0 rotations of the disk 150 to the time for a full rotation of the disk 150 at the operating angular velocity for executing commands on the disk 150.

[0034] As will be understood by those skilled in the art with reference to the present disclosure, more possible fractions of the disk rotation time between the time for 0 rotations and the time for 1 rotation are available for reducing the speed ceiling than shown in the example of FIG. 3B. For example, some implementations may utilize 255 different speed dilation settings between the time for 0 rotations and the time for 1 rotation using different JIT seeks used in the RPO algorithm. Advantageously, the RPO algorithm can perform command scheduling to improve input / output (IO) performance even when some seek speeds are reduced.

[0035] Exemplary Process FIG. 4 is a flowchart of a speed ceiling reduction process according to one or more embodiments. The process of FIG. 4 can be executed, for example, by the circuit 120 of the DSD 106 that executes the firmware 10 of FIG. 1. In this regard, the circuit 120 may comprise means for performing the functions of the speed ceiling reduction process of FIG. 4 in some implementations. The speed ceiling reduction process of FIG. 4 can be executed as a preventive measure against damaging at least one head of the DSD (e.g., the head 136 of FIG. 1 and additional heads that can be moved by the actuator 130 and the VCM 132) during the EPO state of the DSD in order to avoid the worst-case ramp touch speed.

[0036] In block 402, a command to read or write data at a target location within the OD region of the disk (e.g., OD region 152 of FIG. 1) is received. The command can be received from a host such as host 101 of FIG. 1. In other examples, the command may come from the DSD itself, for maintenance operations such as reading and rewriting data on the disk. In some cases, the OD region represents a specific percentage or outer region of the disk surface (e.g., the outer annular 8% of the writable region of the disk surface) that presents the maximum risk of damage to at least one head of the DSD if an EPO event or unexpected power loss occurs while at least one head is moving towards such an OD region at high speed (e.g., 3 m / s).

[0037] In block 404, it is determined whether at least one head needs to move in the direction from ID to OD (e.g., the direction shown for head 136 towards lamp 138 in FIG. 1) to execute the command. The seek direction can be determined by considering, for example, the current position of at least one head indicated by servo information provided on the disk and comparing it with the target location for executing the command.

[0038] As described above, the present disclosure attempts to reduce the number of seeks or movements of at least one head with a reduced speed limit to reduce performance penalties (e.g., with respect to IOPS) while helping to protect at least one head from damage due to unexpected power loss. If the seek direction in block 404 is not in the direction from ID to OD, the process of FIG. 4 proceeds to block 412 and ends the speed limit derating.

[0039] On the other hand, when it is determined that the seek direction is from ID to OD, in block 406, it is determined whether the current position or start position of at least one head for the seek is at least as far from the OD region position as a predetermined threshold such as the number of tracks on the disk or another measure of the travel distance for at least one head to reach the OD region position. The OD region position may include a predetermined position within the OD region such as the boundary of the OD region (e.g., the inner boundary 156 or the outer boundary 154 in FIG. 1), the track for the target location for executing the command (e.g., the track for the target location 158 in FIG. 1), or the midpoint between the boundaries of the OD region. If the start position of at least one head is not at least as far from the OD region position as the predetermined threshold, or at least not further away therefrom, the process of FIG. 4 proceeds to block 412 and terminates the speed limit dilation.

[0040] On the other hand, in block 406, if it is determined that the start position of at least one head is at least as far from the OD region position at the start of the seek as the predetermined threshold, or will be, then in block 408, the speed limit for moving at least one head to the target location is reduced as a preventive measure against damaging at least one head when contacting the ramp to park at least one head during the EPO state. In this regard, the condition that the target location is in the OD region, the condition that the seek direction required to execute the command is from ID to OD, and the condition that the start seek position is radially at least as far from the target location as the predetermined threshold can be regarded as criteria that need to be satisfied to reduce the speed limit.

[0041] In some implementations, this is performed using a function that is computed or evaluated by a circuit to determine, if necessary, a speed dilation setting that slows the movement of the head, such as a JIT clip, current limit of the VCM, speed limit, or time to reach a target location. In some cases, if one of the inputs has a value indicating that the target location is outside the OD region, the seek direction is instead from OD to ID, or if the start position is not at least as far away as a predetermined threshold from the OD region position, the evaluated function may have a value of 0 indicating no dilation of the speed limit (e.g., a JIT clip with 0 rotational time delay).

[0042] In block 410, at least one head moves to a target location using a reduced speed limit to execute a command. As described above, in some implementations, the speed limit dilation may be scaled or vary according to the relative position of the target location within the OD region such that the speed limit is more dilated or reduced for a target location closer to the outer boundary of the OD region than for another target location closer to the inner boundary of the OD region. This may further function to reduce the performance penalty of the safety measure that dilates the speed limit. Additionally, this may enable a larger outer portion of the OD region to be reserved or not used for data storage to prevent at least one head from causing thermal dissipation or scratches if at least one head cannot reach the ramp at a further reduced speed, making more of the OD portion of the disk available for reading and writing data than would be possible if the speed limit for seeking to the OD region were only dilated regardless of the relative position of the target location within the OD region.

[0043] Those skilled in the art will understand, with reference to the present disclosure, that other implementations of the speed limit reduction process of FIG. 4 may vary. For example, in some implementations, the reduction of the speed limit at block 408 may occur or overlap with the start of the movement of the head to the target location at block 410 before reaching the speed limit determined at block 408. As another variation, the process of FIG. 4 may separately consider whether the target location is in the OD region since the reception of the command, or alternatively, the determination of the three criteria described above (i.e., the target location in the OD region, the seek direction from the ID to the OD, and the radial distance of the starting position from the annular OD region position) may occur or overlap simultaneously as described above by evaluating or calculating a function that considers the three criteria for reducing the speed limit. In this regard, the speed dilation setting determination process of FIG. 5 described below can act as a sub-process of the speed limit reduction process of FIG. 4, or can effectively implement the function of FIG. 4 by determining a speed dilation setting that considers the three criteria of the speed limit reduction process of FIG. 4.

[0044] FIG. 5 is a flowchart of a speed dilation setting determination process according to one or more embodiments. The process of FIG. 5 can be executed, for example, by the circuit 120 of the DSD106 that executes the firmware 10 of FIG. 1. In this regard, the circuit 120 may include means for executing the functions of the speed dilation setting determination process of FIG. 5 in some implementations.

[0045] At block 502, a command is received from a host 101 such as that of FIG. 1 to read or write data on the disk of the DSD. In other examples, the command may come from the DSD itself, for maintenance operations such as reading data from the disk and rewriting that data to the same or a different location on the disk.

[0046] In block 504, the circuit determines a speed dilation setting for moving at least one head of the DSD to a target location within the OD region of the disk in the direction from ID to OD. The speed dilation setting is determined at least in part based on the starting position of at least one head for the seek operation to the target location being at least as radially distant from the OD region position as a predetermined threshold. In some implementations, the predetermined threshold can be a predetermined number of tracks on the disk that need to be traversed from the starting position to reach the target location. In other implementations, the predetermined threshold can be a specific distance, such as a displacement value of at least one head to reach the target location, or the number of tracks between the starting location and another position within the OD region, such as the inner boundary of the OD region, the outer boundary of the OD region, or the midpoint of the OD region.

[0047] When determining the speed dilation setting, the circuit can consider additional factors such as the relative position of the target location within the OD region as described above with reference to FIG. 3A, the operating state and / or performance factors of the DSD as described below with reference to FIG. 6, and / or the EPO history of the DSD as described below with reference to FIG. 7. In some implementations, the speed dilation setting can be determined using a function that weights different factors to yield the speed dilation setting. In such implementations, the direction of the seek and the target location within the OD region can each have a value of 1 for the direction from ID to OD and the target location within the OD region, but the direction of the seek in the direction from OD to ID or a target location outside the OD region (i.e., within the intermediate diameter region or ID region of the disk) can have a value of 0 that does not result in speed dilation.

[0048] The speed derating setting may, in some implementations, correspond to the rotational deceleration of the movement of at least one head. The rotational speed reduction may include, for example, a JIT clip where the speed reduction is introduced into the seek with respect to a fraction of the total disk rotation time. In other implementations, the determined speed derating setting may be the reduced speed limit, as in the case of the speed limit reduction process of FIG. 4 described above, or the determined speed derating setting may specify the maximum current supplied to the VCM so as not to exceed the derated speed limit. In still other implementations, the determined speed derating setting may include the time to reach the target location, as opposed to the amount of disk rotation.

[0049] In block 506, at least one head moves to the target location based on the determined speed derating setting. The derated speed setting functions as a preventive measure against damage to at least one head or unexpected power loss of the DSD during the EPO state. As shown in the example of FIG. 2B, using a speed derating setting (e.g., JIT clip) to reduce the speed of at least one head for a particular type of seek can reduce the ramp touch speed for the worst-case EPO scenario, while allowing a higher speed limit for most other seeks to the OD region, thereby improving the overall performance of the DSD with respect to IOPS compared to conventional preventive measures that reduce the speed limit for all seeks to the OD region.

[0050] Those skilled in the art will understand, with reference to the present disclosure, that other implementations of the speed derating setting determination process of FIG. 5 may vary. For example, the circuit may first perform a series of checks to determine whether the speed limit should be reduced, similar to the exemplary process of FIG. 4 discussed above. As another variant, the performance of blocks 504 and 506 may overlap, such as when the movement of at least one head may start before reaching the reduced speed limit.

[0051] FIG. 6 is a flowchart for a speed limit reduction process based on at least one of the determined operating states and performance factors according to one or more embodiments. The process of FIG. 6 can be performed, for example, by circuit 120 of DSD106 that executes firmware 10 of FIG. 1. In this regard, circuit 120 may include means for performing the functions of the speed limit reduction process of FIG. 6 in some implementations. The process of FIG. 6 can be performed, in some implementations, in addition to or as part of the speed limit reduction process of FIG. 4 or the speed dilation setting determination process of FIG. 5 described above.

[0052] At block 602, one or more operating states and / or performance factors are determined for the DSD. The operating state may include, for example, temperature conditions such as the temperature of one or more components of the DSD (e.g., the junction temperature of power management 122 and / or circuit 120 of FIG. 1), one or more characteristics of the spindle motor that rotates the disk (e.g., torque constant (Kt), coil resistance, and / or inductance), and / or one or more characteristics of the VCM that moves at least one head (e.g., torque constant, coil resistance, and / or inductance). The operating state can be measured by the circuitry of the DSD or estimated based on indirect measurements. By considering the operating state of the DSD when reducing the speed limit, an adjustable reduction of the speed limit can be provided that is tailored to the specific conditions or characteristics of the DSD, which can differ from one DSD of the same model to another.

[0053] In some implementations, the operating state of the DSD may change over time, for example, as the VCM or spindle motor ages or deteriorates. The operating state can affect the speed of at least one head during a seek or in an EPO state, for example, by affecting the relationship between the acceleration or deceleration of at least one head, the maximum speed achievable by at least one head or disk, the amount of current required for at least one head to reach a particular speed, or the amount of disk rotation before reaching a target location.

[0054] The performance factors determined by block 602 may include, for example, the data size of the command, the number of outstanding commands being executed by the DSD, and / or the seek distance for the head to reach the target location to execute the command. If the reduction of the speed limit has a small impact on performance (e.g., a small impact on IOPS), the speed limit may be further reduced to better protect at least one head from damage during a potential EPO state.

[0055] For example, at least one of the data size of the data to be read or written for a command larger than the threshold data size, the number of outstanding commands to be executed larger than the threshold number of commands, and / or the seek distance shorter than the threshold seek distance may be advantageous in further reducing the speed limit, because a lower speed seek has a smaller overall impact on performance in these cases.

[0056] On the other hand, the speed limit may be reduced less if the overall impact on performance is greater due to performance factors. In this regard, the overall performance of the command(s) regarding IOPS is more affected by a smaller data size of the command, fewer outstanding commands in the command queue, and / or a longer seek distance, because a larger proportion of the overall time for seeking and executing the command(s) is consumed by the seek time when there is a larger data size, more outstanding commands, and / or a shorter seek distance.

[0057] In block 604, the speed limit is reduced based at least in part on one or more operating states and / or performance factors determined in block 602. Operating states or performance factors in some implementations may be included as inputs for a function used to calculate the speed limit or a speed throttling setting used to reduce the speed limit. In some cases, the measured or determined operating state or performance factor can scale the reduction of the speed limit or speed throttling setting to increase or decrease the value of the speed limit or speed throttling setting.

[0058] Those skilled in the art will understand, with reference to the present disclosure, that other implementations of the speed limit reduction process of FIG. 6 may vary. For example, the process of FIG. 6 may be incorporated into the speed limit reduction process of FIG. 4 or the speed throttling setting determination process of FIG. 5, such as by including block 604 as part of block 408 of FIG. 4 or part of block 504 of FIG. 5.

[0059] In some implementations, the determination in block 602 may be performed less frequently than the reduction of the speed limit in block 604. For example, one or more operating states and / or performance factors of the DSD may be determined periodically after a certain number of operation times or after the implementation of a certain number of commands, and then used for a large set of subsequent commands when determining the speed limit to search for the target location of the command. In some cases, such as certain operating states that may not change frequently, such as the characteristics of the VCM or spindle motor, the operating state may be determined once during factory testing and then used for the DSD throughout its useful life to reduce a specific speed limit.

[0060] FIG. 7 is a flowchart of a speed limit reduction process based on at least one of a determined EPO count and an indication of time from the last EPO event according to one or more embodiments. The process of FIG. 7 may be performed, for example, by circuit 120 of DSD106 that executes firmware 10 of FIG. 1. In this regard, circuit 120 may comprise means for performing the functions of the speed limit reduction process of FIG. 7 in some implementations. The process of FIG. 7 may be performed, in some implementations, in addition to or as part of the speed limit reduction process of FIG. 4 or the speed dilation setting determination process of FIG. 5 described above.

[0061] In block 702, a count of EPO events and / or an indication of time from the last EPO event is determined. The count of EPO events may be the total count of EPO events for the DSD or may indicate the number of unexpected power losses that occurred within a recent time frame, such as within some operating time. The indication of time from the last EPO event can, in some implementations, indicate whether an EPO event occurred within a predetermined time frame (e.g., within the last hour) or can indicate the time of the last EPO event. As described above, the use of the EPO history (e.g., EPO count and / or time from the last EPO event) can facilitate adjustment of the speed limit or speed dilation setting based on the cumulative effect of high-speed ramp contacts and / or the likelihood of a future EPO event where at least one head hits the ramp faster and more often than in the case of a typical head unload during a controlled shutdown.

[0062] In block 704, the speed limit is reduced at least in part based on the EPO count and / or an indication of the time from the last EPO event determined in block 702. In some implementations, an EPO count below a threshold may allow the speed limit to be reduced more than would otherwise be the case when there are more EPO counts to improve performance. As the EPO count increases, the speed limit may be reduced more (e.g., a slight increase in disk rotation before reaching the target location) to counteract the potential cumulative damage effect on at least one head during the EPO state.

[0063] As another example, the time from the last EPO event within a given period may further reduce the speed limit compared to the case where there is no recent EPO event to protect against the cumulative effect of ramp touches during the EPO state. The EPO count or the time from the last EPO event in some implementations may be used as an input in a function used to calculate the speed limit or a speed derating setting for reducing the speed limit. In some cases, the EPO count or the time from the last EPO event may scale the reduction of the speed limit or the speed derating setting to increase or decrease the value of the speed limit or the speed derating setting.

[0064] Those skilled in the art will understand, with reference to the present disclosure, that other implementations of the speed limit reduction process of FIG. 7 may vary. For example, the process of FIG. 7 may be incorporated into the speed limit reduction process of FIG. 4 or the speed derating setting determination process of FIG. 5, such as by including block 704 as part of block 408 of FIG. 4 or part of block 504 of FIG. 5.

[0065] In some implementations, the determination at block 702 can be performed less often than the reduction of the speed limit at block 704. For example, the count of EPO events or the time since the last EPO event can be updated at each EPO event and then used for a large set of subsequent commands when determining the speed limit to find the target location for the command.

[0066] The aforementioned selective dilating of the head speed limit can improve the overall performance of the DSD by protecting against the worst - case scenario or timing of EPO events while not necessarily slowing down all seeks to the OD region. Additionally, the aforementioned dilating of the speed limit can allow for fine - tuning of the speed limit based on the relative position of the target location within the OD region, the operating state of the DSD, the performance factors of the DSD, and / or the EPO history of the DSD to further reduce the performance penalty for protecting at least one head during potential EPO events.

[0067] Other embodiments One of ordinary skill in the art will appreciate that the various illustrative logical blocks, modules, and processes described in connection with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or combinations of both. Further, the foregoing processes can be embodied on a computer - readable medium that causes a processor or controller circuit to implement or perform a particular function.

[0068] To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, and modules are generally described in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. One of ordinary skill in the art may implement the functionality described in various ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.

[0069] The various illustrative logical blocks, units, modules, processing circuits, and control circuits described in connection with the examples disclosed herein may be implemented or executed by a general-purpose processor, GPU, DSP, ASIC, FPGA, or other programmable logic device, discrete gates or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. The general-purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor or controller circuit may also be implemented as a computing device, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, an SoC, one or more microprocessors in conjunction with a DSP core, or any other such combination of configurations.

[0070] The acts of a method or process described in connection with the examples disclosed herein may be embodied directly in hardware, in a software module executed by a processor or controller circuit, or in a combination of the two. The steps of a method or algorithm may also be executed in an alternative order to that provided for the examples. The software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, a removable medium, an optical medium, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor or controller circuit such that the processor or controller circuit can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor or controller circuit. The processor or controller circuit and the storage medium may reside in an ASIC or an SoC.

[0071] The foregoing description of the disclosed exemplary embodiments is provided to enable a person skilled in the art to make or use the embodiments of the present disclosure. Various modifications to these examples will be readily apparent to those skilled in the art, and the principles disclosed herein may be applied to other examples without departing from the spirit and scope of the present disclosure. The described embodiments should be considered illustrative in every respect and not restrictive. Additionally, the use of the language in the form of "at least one of A and B" in the following claims should be understood to mean "only A, only B, or both A and B".

Claims

Claim 1 A data storage device (DSD), comprising: a disk configured to store data; a spindle motor configured to rotate the disk; at least one head configured to read and write data on the disk; a voice coil motor (VCM) configured to move the at least one head on the disk; a circuit, receiving a command to read or write data at a target location within an outer diameter (OD) region of the disk, being a speed limit for moving the at least one head to the target location, wherein a direction required to move the at least one head to the target location is from an inner diameter (ID) across the disk to the OD direction, reducing the speed limit in response to that a starting position for moving the at least one head is radially separated from the OD region position by at least a predetermined threshold, and being configured to move the at least one head to the target location using the reduced speed limit to execute the command. The DSD includes the circuit. Claim 2 The DSD according to claim 1, wherein the OD region position corresponds to a boundary of the OD region, an annular track on the disk for the target location, or a predetermined position within the OD region. Claim 3 The DSD according to claim 1, wherein the circuit is further configured to reduce the speed limit at least partially based on a relative position of the target location within the OD region such that a target location closer to an outer boundary of the OD region corresponds to a greater reduction in the speed limit compared to another target location within the OD region farther from the outer boundary. Claim 4 The DSD according to claim 1, wherein the circuit is further configured to reduce the speed limit by adjusting a setting for moving the at least one head to the target location, the setting being associated with an amount of rotation of the disk before reaching the target location. Claim 5 The DSD according to claim 4, wherein the circuit is further configured to use the adjusted setting as part of a rotational position optimization (RPO) algorithm for scheduling commands executed by the DSD.

6. The circuit is configured to determine one or more operating states of the DSD, including at least one of the temperature condition of the DSD, the characteristics of the spindle motor, and the characteristics of the VCM, and further configured to reduce the speed limit based at least in part on the one or more determined operating states of the DSD, the DSD according to claim 1.

7. The circuit is configured to determine one or more performance factors of the DSD, including at least one of the data size for the command, the number of pending commands to be executed on the disk, and the radial distance for moving the at least one head to the target location, and further configured to reduce the speed limit based at least in part on the one or more determined performance factors of the DSD, the DSD according to claim 1.

8. The circuit is configured to determine a count of emergency power off (EPO) events for the DSD, and further configured to reduce the speed limit based at least in part on the determined count of EPO events, the DSD according to claim 1.

9. The circuit is configured to determine an indication of the time from the last emergency power off (EPO) event for the DSD, and further configured to reduce the speed limit based at least in part on the determined indication of the time from the last EPO event, the DSD according to claim 1.

10. A method of operating a data storage device (DSD), the method comprising: receiving a command to read or write data on a disk of the DSD, A speed dilation setting for moving at least one head of the DSD to a target location within the OD region of the disk in a direction from an inner diameter (ID) to an outer diameter (OD) across the disk to execute the command, the speed dilation setting being determined based at least in part on the start position for moving the at least one head being radially separated from the OD region position by at least about a predetermined threshold, and moving the at least one head to the target location based on the determined speed dilation setting to execute the command, wherein the speed dilation setting functions as a preventive measure against damaging the at least one head during an emergency power off (EPO) state of the DSD. A method. **Claim 11** The method according to claim 10, wherein the OD region position corresponds to a boundary of the OD region of the disk, the target location, or a predetermined position within the OD region. **Claim 12** The method according to claim 10, further comprising determining the speed dilation setting based at least in part on a relative position of the target location within the OD region such that a target location closer to an outer boundary of the OD region corresponds to a greater speed limit dilation than another target location within the OD region farther from the outer boundary. **Claim 13** The method according to claim 10, wherein the speed dilation setting is associated with an amount of rotation of the disk before reaching the target location. **Claim 14** The method according to claim 10, further comprising using the speed dilation setting as part of a rotational position optimization (RPO) algorithm for scheduling commands to be executed by the DSD. **Claim 15** determining one or more operating states of the DSD, including at least one of a temperature condition of the DSD, characteristics of a spindle motor configured to rotate the disk, and characteristics of a voice coil motor (VCM) configured to move the at least one head across the disk The method according to claim 10, further comprising determining the speed derating setting based at least in part on the one or more determined operating states of the DSD.

16. Determining one or more performance factors of the DSD, including at least one of the data size for the command, the number of pending commands to be executed on the disk, and the radial distance for moving the at least one head to the target location on the disk to execute the command; The method according to claim 10, further comprising determining the speed derating setting based at least in part on the one or more determined performance factors of the DSD.

17. Determining a count of EPO events for the DSD; The method according to claim 10, further comprising determining the speed derating setting based at least in part on the determined count of EPO events.

18. Determining an indication of the time from the last EPO event for the DSD; The method according to claim 10, further comprising determining the speed derating setting based at least in part on the determined indication of the time from the last EPO event.

19. A data storage device (DSD), comprising: A disk configured to store data; A spindle motor configured to rotate the disk; At least one head configured to read and write data on the disk; A voice coil motor (VCM) configured to move the at least one head on the disk; Means for reducing a speed limit for moving the at least one head to read or write data at a target location on the disk to execute a command, the reduction of the speed limit functioning as a preventive measure against damaging the at least one head during an emergency power off (EPO) state of the DSD; The speed limit is reduced, for a DSD, according to the target location being in the outer diameter (OD) region of the disk, the direction required to move the at least one head to execute the command being from the inner diameter (ID) to the OD across the disk, and the starting position for moving the at least one head being radially separated from the OD region position by at least about a predetermined threshold. Claim 20 The DSD according to claim 19, further configured to reduce the speed limit by adjusting settings for moving the at least one head to the target location, the means being associated with the amount of rotation of the disk before reaching the target location.

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