Image sensor

Abstract

To provide an image sensor that can suppress increases in power consumption and heat generation in a resistive gate.SOLUTION: An image sensor 1 includes a plurality of pixels 11 which are one-dimensionally arranged. Each of the pixels 11 includes: a photoelectric conversion region that converts incident light into electric charges; and a resistive gate 31 that is provided on the photoelectric conversion region and applies an electric field having a strength gradient to the photoelectric conversion region to form a potential gradient that promotes the movement of electric charges, in the photoelectric conversion region. The resistive gate 31 of each pixel 11 is provided partially with respect to the photoelectric conversion region of each pixel 11 in a plane perpendicular to the direction of charge movement.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to an image sensor.

Background Art

[0002] Patent Document 1 discloses a solid-state imaging device. This solid-state imaging device includes a photoelectric conversion unit and a potential gradient forming unit. The photoelectric conversion unit has a plurality of photosensitive regions. Each photosensitive region generates charges in response to light incidence and has a substantially rectangular shape, and is juxtaposed in a first direction intersecting the long side. The potential gradient forming unit has a conductive member disposed opposite to the plurality of photosensitive regions. The potential gradient forming unit forms a potential gradient that increases along a second direction from one short side of the photosensitive region toward the other short side. The conductive member has a first region and a second region. The first region extends in the second direction between both ends in the second direction and has a first electrical resistivity. The second region extends in the second direction between both ends and has a second electrical resistivity smaller than the first electrical resistivity.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In an image sensor such as a CCD, a resistive gate may be used. The resistive gate is an electrode provided on the photoelectric conversion region and having a certain resistivity. By applying a potential difference across both ends of the resistive gate in the charge transfer direction, a potential gradient is formed, thereby forming a potential gradient within the photoelectric conversion region. Since the potential gradient promotes the movement of charges, the charges remaining in the photoelectric conversion region are reduced and the image quality is improved. However, when a potential difference is applied across both ends of the resistive gate, a current flows through the resistive gate, causing problems such as an increase in power consumption and heat generation.

[0005] The present disclosure has been made in view of such problems, and an object thereof is to provide an image sensor capable of suppressing an increase in power consumption and heat generation in a resistive gate to a low level.

Means for Solving the Problems

[0006] [1] In order to solve the above-described problems, an image sensor according to the present disclosure includes a plurality of pixels arranged in a one-dimensional or two-dimensional manner. Each of the plurality of pixels includes a photoelectric conversion region that converts incident light into charges, and a resistive gate provided on the photoelectric conversion region and applying an electric field having a gradient of intensity to the photoelectric conversion region to form a potential gradient that promotes the movement of charges within the photoelectric conversion region. The resistive gate of each of the plurality of pixels is partially provided with respect to the photoelectric conversion region of each of the plurality of pixels in at least one plane orthogonal to the charge movement direction.

[0007] In the image sensor of [1] above, the resistive gate is partially provided with respect to the photoelectric conversion region in at least one plane orthogonal to the charge movement direction. As a result, compared with the case where the resistive gate is provided so as to cover the entire photoelectric conversion region, the cross-sectional area of the resistive gate in the cross-section orthogonal to the charge movement direction becomes smaller, and the resistance value of the resistive gate in the charge movement direction becomes higher. Therefore, the amount of current flowing through the resistive gate is reduced, and an increase in power consumption and heat generation in the resistive gate can be suppressed low. Note that even in a configuration where the resistive gate is partially provided with respect to the photoelectric conversion region in a plane orthogonal to the charge movement direction as described above, the charges in the photoelectric conversion region gather near the potential gradient portion formed by the resistive gate and are promoted to move. Therefore, the charges in the photoelectric conversion region move without problems, and the charges remaining in the photoelectric conversion region can be reduced.

[0008] [2] In the image sensor of [1] above, the photoelectric conversion regions of the plurality of pixels each may have a first impurity concentration and a first region extending along the charge movement direction, and a second impurity concentration smaller than the first impurity concentration, and a second region sandwiching the first region when viewed from the thickness direction of the photoelectric conversion region. One or both of the width and depth of the first region in a plane orthogonal to the charge movement direction may expand along the charge movement direction. In this case, since the first region further promotes the movement of charges, the charges remaining in the photoelectric conversion region can be further reduced.

[0009] [3] In the image sensor of [1] above, the impurity concentration of the photoelectric conversion region may increase stepwise along the charge movement direction. In this case, since the change in the impurity concentration of the photoelectric conversion region further promotes the movement of charges, the charges remaining in the photoelectric conversion region can be further reduced.

[0010] [4] In any one of the image sensors of [1] to [3] above, a plurality of pixels are arranged in a one-dimensional manner. Each of the plurality of pixels presents a rectangle with the longitudinal direction being the direction intersecting the arrangement direction of the plurality of pixels, and the longitudinal direction coincides with the charge movement direction. The resistive gate may extend along the longitudinal direction. In this case, in the one-dimensional image sensor (linear image sensor), the charge remaining in the photoelectric conversion region can be reduced and the image quality can be improved.

[0011] [5] In the image sensor of [4] above, at least a part of the resistive gate in the charge movement direction, the width of the resistive gate in the direction orthogonal to the charge movement direction may be smaller than the width of the photoelectric conversion region in the orthogonal direction. In that case, a configuration in which the resistive gate is partially provided with respect to the photoelectric conversion region in the plane orthogonal to the charge movement direction can be realized with a simple structure.

[0012] [6] In any one of the image sensors of [1] to [3] above, a plurality of pixels are arranged in a two-dimensional manner, and the charge may move toward the center or the corner of the photoelectric conversion region of each of the plurality of pixels. In this case, in the two-dimensional image sensor, the charge remaining in the photoelectric conversion region can be reduced and the image quality can be improved.

[0013] [7] In the image sensor of [6] above, the resistive gate may extend radially around the charge movement destination. In that case, the movement of the charges dispersed and distributed in the photoelectric conversion region can be promoted evenly, and the charge remaining in the photoelectric conversion region can be further reduced.

[0014] [8] In the image sensor of [7] above, the resistive gate may branch off during the radial extension. In that case, the gap of the resistive gate can be made smaller, and the charge remaining in the photoelectric conversion region can be further reduced.

Advantages of the Invention

[0015] According to the present disclosure, it is possible to provide an image sensor that can suppress a low increase in power consumption and heat generation in a resistive gate.

Brief Description of the Drawings

[0016]

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[0017] Hereinafter, embodiments of an image sensor according to the present disclosure will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same reference numerals are assigned to the same elements, and duplicate descriptions are omitted.

[0018] [Embodiment] FIG. 1 is a plan view schematically showing an image sensor 1 according to an embodiment of the present disclosure. As shown in FIG. 1, the image sensor 1 of the present embodiment is a linear image sensor in which a plurality of pixels 11 are arranged linearly, and includes a photosensitive portion 10, a horizontal register 70, and an amplifier 80. The photosensitive portion 10 has a plurality of pixels 11 arranged along the first direction D1. Each of the plurality of pixels 11 generates an amount of charge corresponding to the intensity of incident light. The horizontal register 70 has a plurality of charge holding portions 71 electrically connected to the plurality of pixels 11. Each of the plurality of charge holding portions 71 receives charge from the corresponding pixel 11 and holds the charge. The horizontal register 70 transfers and outputs the charge held in the plurality of charge holding portions 71 in order. The amplifier 80 is electrically connected to the horizontal register 70, amplifies the charge transferred from the horizontal register 70 for each pixel 11, converts it into a voltage signal, and outputs the voltage signal.

[0019] Each pixel 11 has a rectangular shape with the second direction D2 intersecting (e.g., orthogonal to) the first direction D1 as the longitudinal direction. The (a) part of FIG. 2 is a diagram schematically showing a cross section along the longitudinal direction of each pixel 11. As shown in the (a) part of FIG. 2, each pixel 11 has a semiconductor region 21, a resistive gate 31, a holding electrode 32, and transfer electrodes 33, 34. The semiconductor region 21 has a main surface 21a and a back surface 21b facing the opposite side of the main surface 21a. The back surface 21b is parallel to the main surface 21a. The semiconductor region 21 mainly contains a semiconductor such as silicon (Si). The semiconductor region 21 may be a semiconductor film formed on a semiconductor substrate or a dielectric substrate. The semiconductor region 21 of each pixel 11 is electrically separated from the semiconductor region 21 of an adjacent pixel 11 by an insulating region (e.g., LOCOS: Local Oxidation of Silicon). + type semiconductor region 23, an n-type semiconductor region 24, and an n - type semiconductor region 25, and an n-type semiconductor region 26. The semiconductor region 21 mainly contains a semiconductor such as silicon (Si). The semiconductor region 21 may be a semiconductor film formed on a semiconductor substrate or a dielectric substrate. The semiconductor region 21 of each pixel 11 is electrically separated from the semiconductor region 21 of an adjacent pixel 11 by an insulating region (e.g., LOCOS: Local Oxidation of Silicon).

[0020] The p-type semiconductor region 22 is located closer to the back surface 21b in the semiconductor region 21. The p-type semiconductor region 22 and the p + type semiconductor region 23 are doped with p-type impurities. The impurity concentration of the p + type semiconductor region 23 is higher than the impurity concentration of the p-type semiconductor region 22. The n-type semiconductor regions 24, n - type semiconductor region 25, and the n-type semiconductor region 26 are doped with n-type impurities. The impurity concentrations of the n-type semiconductor regions 24, 26 are higher than the impurity concentration of the n - type semiconductor region 25. The p + type semiconductor region 23, the n-type semiconductor region 24, n -The p-type semiconductor region 25 and the n-type semiconductor region 26 are located on the main surface 21a side with respect to the p-type semiconductor region 22, are in contact with the p-type semiconductor region 22, and are arranged in this order along the second direction D2 on the p-type semiconductor region 22. Light is incident from the back surface 21b of the semiconductor region 21 into the interior of the semiconductor region 21. The light incident into the interior of the semiconductor region 21 is converted into charges at the pn junction surface at the boundary between the p-type semiconductor region 22 and the n-type semiconductor region 24. Therefore, the n-type semiconductor region 24 corresponds to the photoelectric conversion region of the present disclosure.

[0021] The resistive gate 31 is provided on the n-type semiconductor region 24 and faces the n-type semiconductor region 24 via an insulating film (not shown). The resistive gate 31 is composed of a conductive resistive material such as polysilicon, for example. The resistive gate 31 extends along the second direction D2 over the region on the n-type semiconductor region 24. A wiring 61 is connected to a point P1 near one end of the resistive gate 31 in the second direction D2. The potential of the region 31a (see FIG. 1) near the point P1 is defined by the potential of the wiring 61. A wiring 62 is connected to a point P2 near the other end of the resistive gate 31 in the second direction D2. The potential of the region 31b (see FIG. 1) near the point P2 is defined by the potential of the wiring 62. The potential of the region 31b is different from the potential of the region 31a, whereby a potential gradient is formed between the region 31a (point P1) and the region 31b (point P2) of the resistive gate 31. Note that the resistive gate 31 may be composed of a transparent resistive material such as ITO (Indium-Tin Oxide) or thinly formed SiCr, for example. In that case, light can also be incident from the main surface 21a into the interior of the semiconductor region 21.

[0022] The holding electrode 32 is provided on the n-type semiconductor region 24 and faces the n-type semiconductor region 24 via an insulating film (not shown). The holding electrode 32 is arranged side by side with the resistive gate 31 in the second direction D2 on the n-type semiconductor region 24. That is, the holding electrode 32 is arranged near the end of the n-type semiconductor region 24 in the charge transfer direction. The transfer electrode 33 is n -It is provided on the p-type semiconductor region 25 and faces the n-type semiconductor region 25 through an insulating film (not shown). The transfer electrode 34 is provided on the n-type semiconductor region 26 and faces the n-type semiconductor region 26 through an insulating film (not shown). The transfer electrode 33 and the transfer electrode 34 are set to the same potential as each other, for example. - It is provided on the p-type semiconductor region 25 and faces the n-type semiconductor region 25 through an insulating film (not shown). The transfer electrode 34 is provided on the n-type semiconductor region 26 and faces the n-type semiconductor region 26 through an insulating film (not shown). The transfer electrode 33 and the transfer electrode 34 are set to the same potential as each other, for example.

[0023] The (b) part of FIG. 2 is a diagram showing the change in potential energy along the second direction D2 in the semiconductor region 21 of each pixel 11. As shown in the (b) part of FIG. 2, the potential energy E1 of the p-type semiconductor region 23 is the highest, and the potential energies E2 and E3 of the n-type semiconductor regions 24 are lower than that. Also, the potential energy E3 of the region of the n-type semiconductor region 24 facing the holding electrode 32 is lower than the potential energy E2 of the region of the n-type semiconductor region 24 facing the resistive gate 31. The potential energy E5 of the n-type semiconductor region 26 is lower than the potential energy E4 of the n-type semiconductor region 25. + The potential energy E1 of the p-type semiconductor region 23 is the highest, and the potential energies E2 and E3 of the n-type semiconductor regions 24 are lower than that. Also, the potential energy E3 of the region of the n-type semiconductor region 24 facing the holding electrode 32 is lower than the potential energy E2 of the region of the n-type semiconductor region 24 facing the resistive gate 31. The potential energy E5 of the n-type semiconductor region 26 is lower than the potential energy E4 of the n-type semiconductor region 25. - The potential energy E5 of the n-type semiconductor region 26 is lower than the potential energy E4 of the n-type semiconductor region 25.

[0024] Due to the potential gradient between point P1 and point P2 of the resistive gate 31, an electric field having a strength gradient is applied to the n-type semiconductor region 24. Thereby, a potential gradient that promotes the movement of charges is formed in the potential energy E2 of the n-type semiconductor region 24. That is, as approaching from point P1 to point P2, the potential energy E2 gradually becomes smaller.

[0025] During a certain period of imaging, by controlling the potential of the transfer electrode 33, the potential energy E4 is set higher than the potential energy E3. At this time, the region of the potential energy E3 acts as a potential well for holding the charge Q. Also, at this time, the potential gradient of the potential energy E2 promotes the movement of the charge Q into the potential well within the n-type semiconductor region 24. The moving direction of the charge Q at this time coincides with the second direction D2. Then, in a subsequent period, by controlling the potential of the transfer electrode 33, the potential energy E4 is set lower than the potential energy E3. As a result, the charge Q held in the potential well is transferred through the n - -type semiconductor region 25 and the n-type semiconductor region 26 to the charge holding section 71 of the horizontal register 70 shown in FIG. 1.

[0026] FIG. 3 is a cross-sectional view taken along line III-III of FIG. 1, showing a cross-section of the pixel 11 perpendicular to the moving direction (second direction D2) of the charge Q. As shown in FIGS. 1 and 3, the resistive gate 31 of the present embodiment is partially provided with respect to the semiconductor region 21 in a plane orthogonal to the moving direction (second direction D2) of the charge Q. By "partially" here, it means the same as that a part of the semiconductor region 21 is exposed from the resistive gate 31 when viewed from the thickness direction of the semiconductor region 21. In other words, the semiconductor region 21 has a region facing the resistive gate 31 and a region not facing the resistive gate 31. In the present embodiment, the width W1 of the resistive gate 31 in the direction (first direction D1) orthogonal to the moving direction of the charge Q is smaller than the width W2 of the semiconductor region 21 in the same direction over the entire resistive gate 31 in the second direction D2. The width W1 of the resistive gate 31 may be constant over the entire resistive gate 31 in the second direction D2. The above-described potential gradient is formed in the region 241 of the n-type semiconductor region 24 that faces the resistive gate 31. In this example, the resistive gate 31 is provided to face the central portion of the semiconductor region 21 in the first direction D1, and the region 241 is formed at the center of the n-type semiconductor region 24 in the first direction D1.

[0027] The effects obtained by the image sensor 1 of the present embodiment having the above configuration will be described together with the problems of the image sensor according to the comparative example. FIG. 4 is a plan view schematically showing the image sensor 100 according to the comparative example. The image sensor 100 includes a plurality of pixels 18 arranged along the first direction D1, and each pixel 18 has a resistive gate 38. The potential of the region 38a at one end of the resistive gate 38 in the second direction D2 is defined by the potential of the wiring 61, and the potential of the region 38b at the other end of the resistive gate 38 in the same direction is defined by the potential of the wiring 62. The difference between the image sensor 1 of the present embodiment and the image sensor 100 in this regard is that the width W3 of the resistive gate 38 of each pixel 18 is larger than the width W2 of the semiconductor region 21 (see FIG. 3). In other words, in each pixel 18, the resistive gate 38 is provided so as to cover the entire semiconductor region 21 in a plane orthogonal to the moving direction (second direction D2) of the charge Q.

[0028] Parts (a) and (b) of FIG. 5 are diagrams for explaining the problems of the image sensor 100 according to the comparative example. In parts (a) and (b) of FIG. 5, the current A2 flowing through the resistive gate 38 is schematically shown. When a potential difference is applied across both ends of the resistive gate 38, a current A2 flows through the resistive gate 38, causing problems such as an increase in power consumption and heat generation. As shown in part (a) of FIG. 5, when the number of pixels 18 is small, it is not so much of a problem. However, as shown in part (b) of FIG. 5, as the number of pixels 18 increases, the power consumption and heat generation increase significantly.

[0029] In response to the above problems, in the image sensor 1 of the present embodiment, the resistive gate 31 is partially provided with respect to the semiconductor region 21 in a plane orthogonal to the moving direction of the charge Q. As a result, compared with the case where the resistive gate is provided so as to cover the entire semiconductor region 21, the cross-sectional area of the resistive gate 31 in the cross-section orthogonal to the moving direction of the charge Q becomes smaller, and the resistance value of the resistive gate 31 in the moving direction of the charge Q becomes higher. Therefore, the amount of current flowing through the resistive gate 31 is reduced, and an increase in power consumption and heat generation in the resistive gate 31 can be suppressed to a low level. Even in a configuration where the resistive gate 31 is partially provided with respect to the semiconductor region 21 in a plane orthogonal to the moving direction of the charge Q in this way, the charge Q in the semiconductor region 21 gathers near the potential gradient portion formed by the resistive gate 31 and is promoted to move. Therefore, the charge Q in the semiconductor region 21 moves without problems, and the charge Q remaining in the semiconductor region 21 can be reduced.

[0030] In addition, in order to solve the above problems, it is also conceivable to increase the resistance of the resistive gate 38 shown in FIG. 4. For that purpose, it is conceivable to make the resistive gate 38 thinner or to lower the impurity concentration of the resistive gate 38. However, the thinner the resistive gate 38, the more likely the thickness of the resistive gate 38 is to vary between pixels, and the lower the impurity concentration, the more likely the impurity concentration of the resistive gate 38 is to vary between pixels, so the manufacturing difficulty increases. Also, it is conceivable to reduce the magnitude of the voltage applied to the resistive gate 38, but the potential gradient becomes smaller and there is concern about the remaining charge Q. According to the image sensor 1 of the present embodiment, it can be easily manufactured and a sufficient potential gradient can be obtained.

[0031] As in this embodiment, the plurality of pixels 11 are arranged linearly, and each of the plurality of pixels 11 has a rectangle with the longitudinal direction in the direction (second direction D2) intersecting the arrangement direction (first direction D1) of the plurality of pixels 11, and the longitudinal direction coincides with the moving direction of the charge Q, and the resistive gate 31 may extend along the longitudinal direction. In this case, in a one-dimensional image sensor (linear image sensor), the charge Q remaining in the semiconductor region 21 can be reduced and the image quality can be improved.

[0032] As in this embodiment, at least a part of the resistive gate 31 in the moving direction of the charge Q, the width W1 of the resistive gate 31 in the direction orthogonal to the moving direction of the charge Q may be smaller than the width W2 of the semiconductor region 21 in the orthogonal direction. In that case, the configuration in which the resistive gate 31 is partially provided with respect to the semiconductor region 21 in the plane orthogonal to the moving direction of the charge Q can be realized with a simple structure.

[0033] [First Modification Example] FIG. 6 is a plan view schematically showing the configuration of the image sensor 1A according to the first modification example. As shown in FIG. 6, the image sensor 1A of this modification includes a photosensitive portion 10A instead of the photosensitive portion 10 of the above embodiment. The configurations of the horizontal register 70 and the amplifier 80 are the same as those of the above embodiment.

[0034] The photosensitive portion 10A has a plurality of pixels 19 instead of the plurality of pixels 11 of the above embodiment. The plurality of pixels 19 are arranged linearly along the first direction D1. Each pixel 19 is different from the pixel 11 of the above embodiment in that it has a resistive gate 31A instead of the resistive gate 31 of the above embodiment. Note that the other configurations of each pixel 19 except the resistive gate 31A are the same as those of the resistive gate 31 of the above embodiment. In FIG. 6, the resistive gate 31A is indicated by dot patterns.

[0035] The resistive gate 31A of this modification is partially provided for the semiconductor region 21 (the n-type semiconductor region 24 is shown in the figure) in a plurality of planes F1 orthogonal to the moving direction (second direction D2) of the charge Q. In addition, in another plurality of planes F2 orthogonal to the moving direction (second direction D2) of the charge Q, the resistive gate 31A is provided so as to cover the entire semiconductor region 21. In this modification, the planes F1 and F2 are alternately repeated along the moving direction (second direction D2) of the charge Q. That is, in the resistive gate 31A, the portion that partially covers the semiconductor region 21 and the portion that entirely covers the semiconductor region 21 are alternately repeated along the moving direction (second direction D2) of the charge Q. In this modification, the width of the resistive gate 31A in the direction (first direction D1) orthogonal to the moving direction of the charge Q is smaller than the width of the semiconductor region 21 in the same direction in a plurality of portions of the resistive gate 31 in the second direction D2.

[0036] Specifically, in the example shown in FIG. 6, a semi-circular notch 311 is formed in the resistive gate 31A of each pixel 19, and the semi-circular notches 311 of the resistive gates 31A adjacent to each other are combined to form a circular opening. Thereby, the above-described form of the resistive gate 31A is realized. The shape of the notch 311 of the resistive gate 31A is not limited to a semi-circular shape, and may be a rectangular shape as shown in FIG. 7, for example.

[0037] In this modification, at least in a plurality of planes F1, the cross-sectional area of the resistive gate 31A becomes small, and the resistance value of the resistive gate 31A in the moving direction of the charge Q becomes high. Therefore, the amount of current flowing through the resistive gate 31A decreases, and an increase in power consumption and heat generation in the resistive gate 31A can be suppressed low.

[0038] [Second Modification] FIG. 8 is a plan view schematically showing the configuration of the image sensor 1B according to the second modification. As shown in FIG. 8, the image sensor 1B of this modification includes a photosensitive portion 10B instead of the photosensitive portion 10 of the above embodiment. The configurations of the horizontal register 70 and the amplifier 80 are the same as those of the above embodiment.

[0039] The photosensitive portion 10B has a plurality of pixels 20 instead of the plurality of pixels 11 of the above embodiment. The plurality of pixels 20 are arranged one-dimensionally along the first direction D1. Each pixel 20 is different from the pixel 11 of the above embodiment in that it has a resistive gate 31B instead of the resistive gate 31 of the above embodiment. Note that the other configurations of each pixel 20 except for the resistive gate 31B are the same as those of the resistive gate 31 of the above embodiment. In FIG. 8, the resistive gate 31B is indicated by halftones.

[0040] The resistive gate 31B of this modification is also partially provided with respect to the semiconductor region 21 (an n-type semiconductor region 24 is shown in the figure) in a plane F1 orthogonal to the moving direction (second direction D2) of the charge Q. Further, in another plane F2 orthogonal to the moving direction (second direction D2) of the charge Q, the resistive gate 31B is provided so as to cover the entire semiconductor region 21.

[0041] Specifically, the resistive gate 31B of this modification has an opening 312. FIG. 8 shows a rectangular opening 312 having the moving direction (second direction D2) of the charge Q as the longitudinal direction, but the shape of the opening 312 is not limited to this. Further, FIG. 8 illustrates a form in which each resistive gate 31B has a single opening 312, but each resistive gate 31B may have a plurality of openings. In that case, the plurality of openings may be arranged along the moving direction (second direction D2) of the charge Q, or may be arranged along a direction (first direction D1) orthogonal to the moving direction of the charge Q.

[0042] In this modified example, at least on surface F1, the cross-sectional area of the resistive gate 31B becomes smaller, and the resistance value of the resistive gate 31B in the moving direction of the charge Q becomes higher. Therefore, the amount of current flowing through the resistive gate 31B decreases, and an increase in the power consumption and the amount of heat generation in the resistive gate 31B can be suppressed to a low level. [Third Modified Example]

[0043] FIG. 9 is a plan view schematically showing the configuration of the image sensor 2 according to the third modified example. As shown in FIG. 9, the image sensor 2 of this modified example includes a photosensitive portion 10C instead of the photosensitive portion 10 of the above-described embodiment. The configurations of the horizontal register 70 and the amplifier 80 are the same as those of the above-described embodiment.

[0044] The photosensitive portion 10C has a plurality of pixels 12 instead of the plurality of pixels 11 of the above-described embodiment. The plurality of pixels 12 are arranged linearly along the first direction D1. Each pixel 12 is different from the pixel 11 of the above-described embodiment in that it has an n-type semiconductor region 24A instead of the n-type semiconductor region 24 of the above-described embodiment. Note that the shape of each pixel 12 and the configuration of the resistive gate 31 are the same as those of the above-described embodiment.

[0045] The n-type semiconductor region 24A has a first region 24a and a pair of second regions 24b. The first region 24a has a first impurity concentration and extends along the moving direction (second direction D2) of the charge Q. The pair of second regions 24b have a second impurity concentration smaller than the first impurity concentration. When the n-type semiconductor region 24A is made of silicon (Si) and the impurity is phosphorus (P), the first impurity concentration is, for example, 1×10 16 cm -3 or more and 1×10 18 cm -3 or less, and the second impurity concentration is, for example, 1×10 14 cm -3 or more and 1×10 16 cm -3The following applies. A pair of second regions 24b sandwich the first region 24a when viewed in the thickness direction of the n-type semiconductor region 24A. In other words, in the first direction D1, the first region 24a is located between the pair of second regions 24b. As shown in the illustrated example, when viewed in the thickness direction of the n-type semiconductor region 24A, the first region 24a may overlap with the resistive gate 31. Also, the center line of the first region 24a along the second direction D2 may coincide with the center line of the resistive gate 31 along the second direction D2.

[0046] One or both of the width W4 and the depth of the first region 24a in a plane orthogonal to the moving direction (second direction D2) of the charge Q expands along the moving direction (second direction D2) of the charge Q. In other words, the cross-sectional area of the first region 24a in a cross-section orthogonal to the moving direction of the charge Q gradually increases along the moving direction of the charge Q. FIG. 9 shows an example in which the width W4 of the first region 24a expands in a cusped shape along the moving direction of the charge Q.

[0047] In this modified example, one or both of the width W4 and the depth of the first region 24a expand along the moving direction (second direction D2) of the charge Q as described above. Thereby, a potential gradient is formed due to the change in the impurity concentration, and the first region 24a further promotes the movement of the charge Q, so that the charge Q remaining in the semiconductor region 21 can be further reduced.

[0048] [Second Embodiment] FIG. 10 is a plan view schematically showing the configuration of the image sensor 3 according to the second embodiment of the present disclosure. The image sensor 3 of this embodiment is an image sensor in which a plurality of pixels 13 are two-dimensionally arranged in the row direction and the column direction, and includes a photosensitive portion 10D. The photosensitive portion 10D has a plurality of pixels 13. Each of the plurality of pixels 13 generates an amount of charge corresponding to the intensity of the incident light and converts the charge into a voltage signal. The image sensor 3 includes a register for reading out the voltage signal for each of the plurality of pixels 13, but the description thereof is omitted.

[0049] Each pixel 13 has a square shape with sides along the row direction and the column direction. FIG. 11 is a plan view schematically showing each pixel 13. Each pixel 13 includes a semiconductor region 21, a pair of resistive gates 35, a holding electrode 72, an amplifier 73, and an amplifier 74. The configuration of the semiconductor region 21 is the same as that of the first embodiment. However, the holding electrode 72 is disposed at the center of the pixel 13, and the charge Q in the semiconductor region 21 moves toward the center of the semiconductor region 21 in the pixel 13.

[0050] The pair of resistive gates 35 are disposed on both sides with the holding electrode 72 disposed at the center of the pixel 13 interposed therebetween. Each resistive gate 35 includes a plurality (three in the illustrated example) of regions 35a disposed near the peripheral portion of the pixel 13 and one region 35b adjacent to the holding electrode 72. Further, each resistive gate 35 includes a plurality of connection portions 35c that connect the plurality of regions 35a to the region 35b, respectively. The connection portion 35c extends linearly from the corresponding region 35a toward the region 35b. As a result, the pair of resistive gates 35 extend radially about the center of the pixel 13, which is the destination of the movement of the charge Q. Therefore, also in the present embodiment, the resistive gates 35 of the respective plurality of pixels 13 are partially provided with respect to the semiconductor region 21 within the curved surface F3 orthogonal to the movement direction of the charge Q.

[0051] FIG. 12 is a diagram schematically showing wirings connected to a plurality of pixels 13. The image sensor 3 of the present embodiment further includes a plurality of wirings 63 and a plurality of wirings 64. One end of each wiring 63 is connected to a corresponding bonding pad 65, and the other end of each wiring 63 is connected to a corresponding bonding pad 67. Also, one end of each wiring 64 is connected to a corresponding bonding pad 66, and the other end of each wiring 64 is connected to a corresponding bonding pad 68. The wirings 63 and 64 are provided for each row. The wiring 63 is connected to a plurality of regions 35a of the resistive gate 35, and the potential of each region 35a is defined by the potential of the wiring 63. The wiring 64 is connected to the region 35b of the resistive gate 35, and the potential of the region 35b is defined by the potential of the wiring 64. The potential of the region 35b is different from the potential of the region 35a, whereby a potential gradient is formed at the connection portion 35c between the region 35a and the region 35b. Due to this potential gradient, an electric field having a gradient of strength is applied to the n-type semiconductor region 24. Thereby, a potential gradient that promotes the movement of the charge Q is formed in the n-type semiconductor region 24.

[0052] The amplifiers 73 and 74 amplify the charge Q transferred from the region of the n-type semiconductor region 24 facing the holding electrode 72 for each pixel 13, convert it into a voltage signal, and output the voltage signal via the bonding pad 69. However, as shown in FIG. 12, the amplifier 73 of each row is a part of the amplifier of the pixel 13 in the previous row, and the charge Q of the pixel 13 in each row is amplified by the amplifier 74 of the pixel 13 and the amplifier 73 of the pixel 13 in the next row, and converted into a voltage signal.

[0053] The effects obtained by the image sensor 3 of the present embodiment having the above configuration will be described together with the problems of the image sensor according to the comparative example. FIG. 13 is a plan view schematically showing a pixel 17 of the image sensor according to the comparative example. The pixel 17 has a resistive gate 39. The resistive gate 39 covers the entire semiconductor region 21, and forms a potential gradient due to the potential difference between a region 39a provided at its peripheral portion and a region 39b provided adjacent to the holding electrode 72 at the center of the pixel. Thereby, a potential gradient that promotes the movement of the charge Q is formed in the n-type semiconductor region 24.

[0054] However, when a potential difference is applied between the region 39a and the region 39b of the resistive gate 39, a current flows in the resistive gate 39, causing problems such as an increase in power consumption and heat generation. In response to this problem, in the image sensor 3 of the present embodiment, the resistive gate 35 is partially provided with respect to the semiconductor region 21 within a curved surface F3 orthogonal to the moving direction of the charge Q. As a result, compared with the configuration of FIG. 13 in which the resistive gate 39 is provided so as to cover the entire semiconductor region 21, the cross-sectional area of the resistive gate 35 in a cross-section orthogonal to the moving direction of the charge Q becomes smaller, and the resistance value of the resistive gate 35 in the moving direction of the charge Q becomes higher. Therefore, the amount of current flowing through the resistive gate 35 decreases, and an increase in power consumption and heat generation in the resistive gate 35 can be suppressed to a low level. Even in the configuration where the resistive gate 35 is partially provided with respect to the semiconductor region 21 within a plane orthogonal to the moving direction of the charge Q in this way, the charge Q in the semiconductor region 21 gathers near the potential gradient portion formed by the resistive gate 35 and is promoted to move. Therefore, the charge Q in the semiconductor region 21 moves without problems, and the charge Q remaining in the semiconductor region 21 can be reduced. Therefore, the image quality can be improved.

[0055] As in the present embodiment, the resistive gate 35 may extend radially around the destination of the movement of the charge Q (the center of the pixel 13). In that case, the movement of the charge Q distributed dispersedly in the semiconductor region 21 can be promoted evenly, and the charge Q remaining in the semiconductor region 21 can be further reduced.

[0056] [Fourth Modified Example] FIG. 14 is a plan view schematically showing the configuration of a pixel 14 included in an image sensor according to the fourth modified example. The image sensor of this modified example includes a resistive gate 35A for each pixel 14 instead of the resistive gate 35 of the second embodiment. The resistive gate 35A further includes a plurality of regions 36a and a plurality of connection portions 36c in addition to the configuration of the resistive gate 35 of the second embodiment. The connection portions 36c branch and extend from both sides of each connection portion 35c while each connection portion 35c extends radially. Each region 36a is located at the tip of each connection portion 36c. The potential of each region 36a is set to be the same as the potential of each region 35a. Alternatively, each region 36a may not be connected to a wiring for defining a potential.

[0057] As in this modified example, the resistive gate 35A may branch while extending radially. In that case, the gap of the resistive gate 35A can be made smaller, and the charge Q remaining in the semiconductor region 21 can be further reduced.

[0058] [Fifth Modified Example] FIG. 15 is a plan view schematically showing the configuration of pixel 15 included in the image sensor according to the fifth modification. In pixel 15 of the image sensor of this modification, the impurity concentration of the n-type semiconductor region 24 increases stepwise along the moving direction of charge Q toward the destination of charge Q (the center of pixel 15). In the figure, the boundary 242 of the impurity concentration is indicated by a broken line. Note that in this example, the impurity concentration of the n-type semiconductor region 24 increases stepwise, but the impurity concentration of the n-type semiconductor region 24 may increase continuously. According to this modification, a potential gradient due to the change in the impurity concentration is formed in the semiconductor region 21, further promoting the movement of charge Q, so that the charge Q remaining in the semiconductor region 21 can be further reduced. The configuration of this modification (a configuration in which the impurity concentration of the n-type semiconductor region 24 increases stepwise or continuously) may be further applied to the image sensor 1 of the first embodiment.

[0059] [Sixth Modification] FIG. 16 is a plan view schematically showing the configuration of pixel 16 included in the image sensor according to the sixth modification. In pixel 16 of this modification, the holding electrode 72 is disposed not at the center of pixel 16 but at one of the four corners, and charge Q moves toward one corner of the semiconductor region 21. Further, this image sensor includes a resistive gate 37 for each pixel 16. The resistive gate 37 has a region 37a, a region 37b, a connection portion 37c, and one or a plurality of slits 37d. The region 37a is provided at the peripheral portion of pixel 16, and the region 37b is provided adjacent to the holding electrode 72. By applying a potential difference between the region 37a and the region 37b, a potential gradient is generated in the connection portion 37c, thereby generating a potential gradient in the n-type semiconductor region 24. The slit 37d extends straight from the region 37b toward the region 37a. That is, the resistive gate 37 extends radially around the destination of charge Q (one corner of pixel 16). Therefore, also in this modification, the resistive gates 37 of the plurality of pixels 16 are partially provided with respect to the semiconductor region 21 within the curved surface F4 orthogonal to the moving direction of charge Q.

[0060] Even when the charge Q moves toward a corner of the semiconductor region 21, the resistive gate 37 can be partially provided for the semiconductor region 21 within the curved surface F4 orthogonal to the moving direction of the charge Q as in this modified example. Thereby, compared with the case where the resistive gate 37A covering the whole of the semiconductor region 21 as shown in FIG. 17 is provided, the amount of current flowing through the resistive gate 37 is reduced, and an increase in power consumption and heat generation in the resistive gate 37 can be suppressed low.

Explanation of Signs

[0061] 1, 1A, 1B, 2, 3… image sensor, 10, 10A, 10B, 10C, 10D… photosensitive part, 11 to 20… pixel, 21… semiconductor region, 22… p-type semiconductor region, 23… p + -type semiconductor region, 24, 24A… n-type semiconductor region, 24a… first region, 24b… second region, 25… n - -type semiconductor region, 26… n-type semiconductor region, 31, 31A, 31B, 35, 35A, 37, 37A, 38, 39… resistive gate, 31a, 31b, 35a, 35b, 36a, 37a, 37b, 38a, 38b, 39a, 39b… region, 32… holding electrode, 33, 34… transfer electrode, 35c, 36c, 37c… connection part, 37d… slit, 61 to 64… wiring, 65 to 69… bonding pad, 70… horizontal register, 71… charge holding part, 72… holding electrode, 73, 74, 80… amplifier, 100… image sensor, 311… notch, 312… opening, A2… current, F1, F2… plane, F3, F4… curved surface, D1… first direction, D2… second direction, E1 to E5… potential energy, P1, P2… point, Q… charge.

Claims

1. Comprising a plurality of pixels arranged in a one-dimensional or two-dimensional manner, Each of the plurality of pixels, A photoelectric conversion region that converts incident light into electric charges, and A resistive gate provided on the photoelectric conversion region, applying an electric field having a strength gradient to the photoelectric conversion region to form a potential gradient that promotes the movement of the electric charges within the photoelectric conversion region, Comprising, The resistive gates of each of the plurality of pixels are partially provided with respect to the photoelectric conversion regions of each of the plurality of pixels in at least one plane orthogonal to the moving direction of the electric charges, an image sensor.

2. The photoelectric conversion regions of each of the plurality of pixels, A first region having a first impurity concentration and extending along the moving direction of the electric charges, and A second region having a second impurity concentration smaller than the first impurity concentration and sandwiching the first region when viewed from the thickness direction of the photoelectric conversion region, having, One or both of the width and depth of the first region in a plane orthogonal to the moving direction of the electric charges expand along the moving direction of the electric charges, the image sensor according to claim 1.

3. The impurity concentration of the photoelectric conversion region increases stepwise along the moving direction of the electric charges, the image sensor according to claim 1.

4. The plurality of pixels are arranged in a one-dimensional manner, Each of the plurality of pixels presents a rectangle having a longitudinal direction in a direction intersecting the arrangement direction of the plurality of pixels, The longitudinal direction coincides with the moving direction of the electric charges, The resistive gate extends along the longitudinal direction, the image sensor according to any one of claims 1 to 3.

5. In at least a part of the resistive gate in the moving direction of the electric charges, the width of the resistive gate in a direction orthogonal to the moving direction of the electric charges is smaller than the width of the photoelectric conversion region in the orthogonal direction, the image sensor according to claim 4.

6. The plurality of pixels are arranged in a two-dimensional manner, The electric charges move toward the center or corners of the photoelectric conversion regions of each of the plurality of pixels, the image sensor according to any one of claims 1 to 3.

7. The resistive gate extends radially around the destination of the movement of the electric charges, the image sensor according to claim 6.

8. The resistive gate is branched while extending radially, the image sensor according to claim 7.

Images