Method and device for simplified successive cancellation list decoding of polarization-adjusted convolutional (PAC) code

Abstract

To provide a method and an electric device that receive a channel encoded with a polarization-adjusted convolutional (PAC) code.SOLUTION: An execution method of an electronic device includes the steps of: receiving a channel encoded with a polarization-adjusted convolutional (PAC) code by the electronic device; and generating a decoded codeword, wherein the decoded codeword is generated by the electronic device based at least in part on simplified successive cancellation list (SSCL) decoding performed on the channel via a decoding tree, the decoding tree includes a node that generates candidate codeword output based on predefined processing using convolutional code (CC) state input and channel vector input, and a sub-tree of the node remains unprocessed.SELECTED DRAWING: Figure 5

Description

Technical Field

[0001] The present invention relates to a wireless communication system, and more particularly, to an improvement in a channel coding method in a wireless communication system.

Background Art

[0002] The fifth-generation (5G) communication system adopts a polar code as a channel coding method for a control channel because the complexity of its encoding and decoding is appropriate. The polarization-adjusted convolutional (PAC) code has been recently proposed as a new polar coding method. The PAC code encodes data using a rate-1 convolutional code (CC) before applying a polar transform as compared with the polar code. The input to the CC encoder includes an information carrier vector, the state of the encoder, and a generating polynomial. The output from the CC encoder includes a CC codeword and an updated state vector.

[0003] Successive cancellation (SC) is one of the most common decoding algorithms for polar codes. SC decoding operates on a decoding tree, where each node corresponds to a component code having a specific information set. SC list (SCL) decoding includes several parallel SC decoders that interact with each other in terms of information bits. Different from SC decoding, two candidates are considered in SCL decoding. Further, in SCL decoding, the list size or the number of parallel SC decoders is expanded or trimmed. PAC SCL decoding is similar to polar SCL decoding, but is different from polar SCL decoding in that two lists are maintained and the CC state and the encoder state are stored for each list member.

[0004] In the simplified SC / SCL (SSC: simplified SC / SSCL; simplified SCL) decoding of polar codes, at the special nodes of the decoding tree, the decoding result can be obtained without processing the subtree of the special node. As a result, the decoding latency is reduced according to the type of node. The special nodes include rate-0 nodes, repetition nodes, rate-1 nodes, and single parity check (SPC) nodes. A rate-0 node is defined as a node having all frozen bits or leaf nodes of 0-value bits. A repetition node is defined as a node having frozen leaf nodes except for the last leaf node containing information or 1-value bits. A rate-1 node is defined as a node where all leaf nodes contain information or 1-value bits. An SPC node is defined as a node having leaf nodes containing information except for the first leaf node that is a frozen bit or 0-value bit.

[0005] One of the problems with the above approach is that for CC encoding, special node decoding cannot be applied to PAC codes. For example, when special node decoding is applied to a PAC code, the output of a rate-0 node will not all be 0, the output of a repetition node will not all be 0 or all be 1, the rate-1 node will become a non-linear code that requires special processing, and the output of an SPC node will not be from the SPC codebook.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0007] The present invention has been made in view of the above-described conventional problems, and an object of the present invention is to provide a simplified successive cancellation list (SSCL) decoding method for polarization adjustment convolutional (PAC) codes and an electronic device that executes the same.

Means for Solving the Problems

[0008] Specifically, a method for processing special nodes at the node level is provided in consideration of the influence of CC coding. The output of a rate-0 node is a constant codeword for each list member. The output of a repetition node is one of two constant codewords for each list member. The output of a rate-1 node is decoded by a technique available for polar codes. A minimum likelihood ratio (LLR) scrambling method for decoding an SPC node is provided. Also, a method for implementing inverse CC coding with low complexity for the entire special node length is provided.

[0009] An execution method of an electronic device according to one aspect of the present invention made to achieve the above object includes, in the electronic device, receiving a channel encoded with a polarization adjustment convolutional (PAC) code, and generating a decoded codeword, wherein the decoded codeword is generated based at least in part on a simplified successive cancellation list (SSCL) decoding executed on the channel via a decoding tree by the electronic device, the decoding tree includes nodes that generate candidate codeword outputs based on predetermined processing using a convolutional code (CC) state input and a channel vector input, and subtrees of the nodes remain unprocessed.

[0010] An electronic device according to one aspect of the present invention made to achieve the above object includes a receiver configured to receive a channel encoded with a polarization - adjusted convolutional (PAC) code, and a decoder configured to generate a decoded codeword. The decoded codeword is generated based at least in part on a simplified successive cancellation list (SSCL) decoding performed on the channel via a decoding tree. The decoding tree includes nodes that generate candidate codeword outputs based on a predetermined process using a convolutional code (CC) state input and a channel vector input, and sub - trees of the nodes remain unprocessed.

[0011] An electronic device according to another aspect of the present invention made to achieve the above object includes a processor and a non - transitory computer - readable storage medium storing instructions. When the instructions are executed, the processor is configured to receive a channel encoded with a polarization - adjusted convolutional (PAC) code and generate a decoded codeword. The decoded codeword is generated based at least in part on a simplified successive cancellation list (SSCL) decoding performed on the channel via a decoding tree. The decoding tree includes nodes that generate candidate codeword outputs based on a predetermined process using a convolutional code (CC) state input and a channel vector input, and sub - trees of the nodes remain unprocessed.

Advantages of the Invention

[0012] According to the present invention, it is possible to provide a simplified successive cancellation list (SSCL) decoding method for a polarization - adjusted convolutional (PAC) code considering four special node types and an electronic device for executing the same.

Brief Description of the Drawings

[0013]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

DETAILED DESCRIPTION OF THE INVENTION

[0014] Hereinafter, specific examples of embodiments for carrying out the present invention will be described in detail with reference to the drawings.

[0015] In the following detailed description, in order to provide a complete understanding of the present invention, many specific details are set forth. However, it will be understood by those skilled in the art that the disclosed aspects can be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits are not described in detail so as not to obscure the subject matter disclosed herein.

[0016] Throughout this specification, the phrase "one embodiment" or "an embodiment" means that the particular features, structures, or characteristics described in connection with that embodiment are included in at least one embodiment disclosed herein. Thus, the expressions "in one embodiment", "in an embodiment", or "according to one embodiment" (or other expressions of similar import) appear in various places throughout this specification, but not necessarily all refer to the same embodiment. Further, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In this regard, the term "exemplary" as used herein means "serving as an example, instance, or illustration". Embodiments described herein as "exemplary" are not necessarily to be construed as preferred or advantageous over other embodiments. Further, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. Also, depending on the context of the discussion herein, singular terms may include the corresponding plural forms and plural terms may include the corresponding singular forms. Similarly, hyphenated terms (e.g., "two-dimensional", "pre-determined", "pixel-specific", etc.) may be used interchangeably with the corresponding non-hyphenated terms (e.g., "two dimensional", "predetermined", "pixel specific", etc.), and descriptions using capital letters (e.g., "Counter Clock", "Row Select", "PIXOUT", etc.) may be used interchangeably with the corresponding non-capitalized descriptions (e.g., "counter clock", "row select", "pixout", etc.).Such occasionally occurring alternative usages are not considered to be contradictory to each other.

[0017] Also, depending on the context of the discussion herein, singular terms may include the corresponding plurals, and plural terms may include the corresponding singulars. Further, it should be noted that the various figures (including component diagrams) shown and discussed herein are for illustrative purposes only and are not drawn to scale. For example, the dimensions of some elements may be exaggerated relative to other elements for clarity. Further, where appropriate, reference numerals are repeated between figures to indicate corresponding elements and / or similar elements.

[0018] The terms used herein are for the purpose of describing only some exemplary embodiments and are not intended to limit the subject matter of the claims. As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The terms "comprises" and / or "comprising", when used herein, specify the presence of the features, integers, steps, operations, elements, and / or components described, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0019] When an element or layer is said to be "on" another element or layer, or "connected to" or "coupled to" another element or layer, it will be understood that the element or layer can be directly on the other element or layer, or directly connected to or coupled to the other element or layer, or there may be intervening elements or layers. In contrast, when an element is said to be "directly on", "directly connected to", or "directly coupled to" another element or layer, there are no intervening elements or layers. The same reference numerals refer to the same elements throughout. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0020] As used herein, terms such as "first", "second", etc. are used as labels for the nouns preceding them and do not imply any type of order (e.g., spatial, temporal, logical, etc.) unless explicitly defined as such. Further, the same reference numerals may be used throughout two or more figures to refer to parts, components, blocks, circuits, units, or modules having the same or similar functionality. However, such usage is for the sole purpose of simplifying the description and facilitating discussion, and does not mean that the structure or architecture of such components or units is the same throughout all embodiments, or that such generally referred to parts / modules are the only way to implement some of the exemplary embodiments disclosed herein.

[0021] Unless otherwise defined, all terms (including technical and scientific terms) used herein shall have the same meaning as commonly understood by one of ordinary skill in the art to which this subject matter belongs. Further, terms as defined in commonly used dictionaries shall be interpreted to have a meaning that coincides with the meaning in the context of the relevant art and shall not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0022] As used herein, the term "module" refers to any combination of software, firmware, and / or hardware configured to provide the functions described herein in relation to the module. For example, software may be a software package, code and / or instruction set, or instructions embodied as such, and the term "hardware" used herein, as described in any implementation herein, includes, for example, alone or in any combination, an assembly, a hardwired circuit, a programmable circuit, a state machine circuit, and / or firmware that stores instructions executed by a programmable circuit. A module may be embodied, collectively or individually, as a circuit that forms part of a larger system, such as, but not limited to, an integrated circuit (IC), a system on chip (SoC), an assembly, etc.

[0023] FIG. 1 is a diagram illustrating a communication system according to an embodiment.

[0024] In the architecture shown in FIG. 1, the transmitting device 102 includes a first processor 106 that communicates with an encoder 108. The transmitting device 102 communicates with a receiving device 104 that includes a second processor 110 and a decoder 112. The encoder 108 encodes a message (or message word) transmitted from the transmitting device 102 to the receiving device 104 into a codeword. The decoder 112 decodes the received codeword into a message (or message word) at the receiving device 104.

[0025] FIG. 2 is a diagram showing a PAC encoder according to an embodiment.

[0026] Message word TIFF2025105546000002.tif6128, in the first block 202, has a length N = 2 n word TIFF2025105546000003.tif8146 is rate profiled. Rate profiling is to determine the K indexes of the vector v and place K message bits at those indexes of the vector v. Specifically, the vector v includes K message bits and N - K frozen bits with a value of 0. The indexes of the information bits are an information set with a radix K TIFF2025105546000004.tif8146 is provided by. The frozen set is shown as TIFF2025105546000005.tif7146. The generating polynomial The rate-1 convolutional encoder having TIFF2025105546000006.tif7128 is applied to the vector v in the second block (convolution 204), thereby outputting a vector TIFF2025105546000007.tif7128 of length N. Regarding the generating polynomial, TIFF2025105546000008.tif7128. The parameter m is the number of memory units of the convolutional code, and m + 1 is the constraint length. As a result, the following Equation 1 is derived.

[0027]

Equation

[0028] Equivalently, TIFF2025105546000010.tif7128, and the following Equation 2 is obtained.

[0029]

Equation

[0030] Other equivalent descriptions are provided through the state vector and input bits at a given time. The state vector is a vector of length m that includes the input bits to the convolutional encoder. At time i, when the input to the encoder is v i in the case of, the state vector is State i =(v i ,…,v i-m ). The output bit u i is determined from the input bit v i , the current state vector, and the generating polynomial of the code TIFF2025105546000012.tif9134. This function is referred to as ConvTrans(·) and returns the next state as shown in Equation 3 below.

[0031]

Equation

[0032] The generating matrix of the polar code of length N (N = 2 n ) is TIFF2025105546000014.tif9147, where TIFF2025105546000015.tif13145. The vector u is encoded using the polar code of length N to obtain the final codeword c = (c1,…,c N ) = uG N . The word received at the output of the channel is represented as y = (y1,…,y N ).

[0033] The SC decoding of the PAC code is similar to the SC decoding of the polar code. Regarding the SC decoding of the polar code, a polar code of length N and message word length K has an information set with a radix of K and including the indices of the information bits TIFF2025105546000016.tif9131 is associated with it, and thus N-K indices of frozen bits that are always set to zero are determined. The SC polar decoder receives as input the channel LLR vector (λ1,…,λ N ) and the information set, and outputs a decoded message word that contains K decoded message bits at the indices specified by the information set and N-K zero-valued bits at the indices specified by the frozen set. TIFF2025105546000017.tif9131. The SC decoder is defined recursively as follows.

[0034] To obtain TIFF2025105546000018.tif7145, the upper polar code of length N / 2 is decoded using the input to the SC decoder as shown in Equations 4 and 5 below.

[0035]

Equation

Equation

[0036] Operator TIFF2025105546000021.tif7145 is the box-plus operator, also called the check node operator, defined by TIFF2025105546000022.tif12145. The check node operator is defined as an approximation to Equation 6 below.

[0037]

Equation

[0038] Set TIFF2025105546000024.tif11146 is It is defined as TIFF2025105546000025.tif14146.

[0039] The upper symbol is decoded, and the decoded message word After TIFF2025105546000026.tif12146 is obtained, it is encoded with G N / 2 to obtain The corresponding codeword as TIFF2025105546000027.tif12146. Next, as shown in the following equations 7 and 8, a short-length -N / 2 polar code is decoded using the input to the SC decoder.

[0040]

Number

Number

[0041] Set TIFF2025105546000030.tif13146 is defined as TIFF2025105546000031.tif14146.

[0042] This decoder provides the decoded message word as TIFF2025105546000032.tif8146. And the final decoded output of the polar code of length N is obtained as shown in the following equation 9.

[0043]

Number

[0044] The above recursive decoder stops at length N = 1 and performs decoding using the rule of the following equation 10.

[0045]

Number

[0046] FIG. 3 is a diagram showing a decoding tree of a polar code according to an embodiment.

[0047] The above-described SC decoding is regarded as operating on a decoding tree. The decoding tree in FIG. 3 is a decoding tree of length 8 or a part of a larger decoding tree. In the decoding tree of length 8, the polar code of length 8 corresponds to the first node 302. The second node 304 and the third node 306 immediately to the left of the first node 302 each correspond to a polar code of length 4. The fourth node 308, the fifth node 310, the sixth node 312, and the seventh node 314 each correspond to a polar code of length 2. The eighth node 316, the ninth node 318, the tenth node 320, the eleventh node 322, the twelfth node 324, the thirteenth node 326, the fourteenth node 328, and the fifteenth node 330 at the left end of the decoding tree each correspond to a polar code of length 1 and are called leaf nodes. SC decoding is regarded as processing all the nodes in the decoding tree in a specific order from the rightmost node 302 of length N. The polar code of length N = 2 n has a decoding tree having n + 1 columns, with one node of length - N in the rightmost column and two nodes of length N / 2 in the second rightmost column. In the leftmost column, there are N nodes corresponding to polar codes of length - 1. The channel LLR λ (i) is provided downstream through the nodes, and the decoded candidate codeword β (i) is provided upstream through the nodes.

[0048] The SC decoding of the PAC code is basically the same as the SC decoding of the polar code, but includes additional steps considering the CC encoder. Further, the CC encoder is executed in the SC decoder. The CC encoder is realized by sequentially calling the above formula 3.

[0049] The SC decoder initializes the state of the CC encoder to all zeros. The decoding proceeds in the same procedure as the polar code. The LLR λ(i) When calculated with a bit index, i, v i , u i is determined according to any of the following cases.

[0050] In the first case, is TIFF2025105546000035.tif13135. Next, set current_State to next_State.

[0051] In the second case, when it is TIFF2025105546000036.tif10146, v i has two candidates for v = 0, and for each, v i and u i are calculated as shown in the following equations 11 and 12.

[0052]

Number

Number

Number

[0053] For SSC decoding of polar codes, by utilizing the characteristics of the codes corresponding to the nodes of the decoding tree, traversing to the leaf nodes is avoided and the need to calculate LLRs with information bits is also avoided. In the case of special nodes, until the special decoding result is passed to the SC decoder, SC decoding is temporarily taken over by the decoder of the special node, and at that point, the SC decoder resumes.

[0054] For example, a polar code of length 16 contains four polar codes of length 4, each with its corresponding rate. The complete decoding tree of this code is composed of five columns of nodes, and there are 16 nodes in the leftmost column.

[0055] Normally, at node i, the SC decoder proceeds to the leaf nodes (each node #i has two further levels of branches, resulting in eight leaf nodes in Figure 3). However, if the code corresponding to that node is considered special, the traversal to the leaf nodes is avoided.

[0056] For example, referring to Figure 3, the fourth node 308 is regarded as a special node with rate 0 (or all - zero) because the information / frozen patterns of the corresponding leaf nodes 318 and 320 are frozen bits or 0 - valued bits respectively. The second node 304 is repeatedly regarded as a special node because the information / frozen patterns of the corresponding leaf nodes (318, 320, 322, 324) are frozen bits or 0 - valued bits except for the last leaf node 326 which has information or 1 - valued bits. The seventh node 314 is regarded as a special node with rate 1 because the information / frozen patterns of the corresponding leaf nodes 328 and 330 are information or 1 - valued bits respectively. The third node 306 is regarded as an SPC special node because the information / frozen patterns of the corresponding leaf nodes (324, 326, 328, and 330) are information or 1 - valued bits except for the first leaf node 324 which has frozen bits or 0 - valued bits.

[0057] Since the code of the second node 304 is a repeating code of length 4, it is possible to decode two candidate codewords at the node level by simply calculating the machine - learning (ML: machine - learning) metrics for the codewords (0,0,0,0) and (1,1,1,1). The path metrics are calculated at the node level. The output of the special decoder is passed to the SC decoder, and the SC decoder proceeds to the third code corresponding to the third node 306.

[0058] The successive cancellation list (SCL) decoding of polar codes is based on the idea of not making a final decision at each information bit index, but considering a list of candidates based on two values of the bit. In particular, in SCL decoding with a list size of L, after decoding the bit index i, a list of size L is retained. The list contains L path members, each of whose length includes the values of the bits u1,…,u i decoded at i. For frozen bits, the current list is padded with 0s to expand the list and make it one unit longer. The path metrics are updated for each member of the new list. For information bits, the current list is expanded, and 0s and 1s are added to each path in the list to generate a list of 2L paths. The path metrics are calculated for each of the 2L new paths. The L paths with the smallest metrics are retained in the list, and the L paths with the largest metrics are removed from the expanded list. As a result, a new list of size L containing members that are one bit longer than the previous list is generated. This process is repeated until the length of the paths in the list reaches N. In this step, the path with the smallest metric is selected as the final candidate (i.e., the decoder output).

[0059] The SCL decoding of polar codes is improved by adding a cyclic redundancy check (CRC) to the message word u. The resulting decoding scheme is called CRC-aided SCL (CA-SCL) decoding. Compared with SCL decoding, CA-SCL decoding selects the final decoded word as the path with the smallest path metric that satisfies the CRC from the final list given at the bit index N.

[0060] The SCL decoding of PAC codes is basically the same as that of polar codes, but with the modification that the decoder holds L running CC encoders. Two lists are stored for v and u. The list extension at the frozen bits in the SCL decoding of PAC codes is performed in the same way as the SC decoding of PAC codes. Similarly, for the information bits, the lists are extended by considering two candidates, 0 and 1, for each of the v lists and obtaining the corresponding extended u lists. The path metrics are calculated based on the calculated LLRs and the u lists. The remaining procedures are the same as those of the SCL decoding of polar codes. The CA-SCL decoding of PAC codes modifies the SCL decoding, and this modification is performed based on the added CRC as explained in the CA-SCL decoding of polar codes.

[0061] According to one embodiment, an SSCL decoding algorithm for PAC codes is proposed, which defines a method for processing the special nodes of PAC codes in SCL decoding. After processing bit number i, the SCL decoder has L (list size) path members belonging to v (referred to as the v list), L path members of u (referred to as the u list), the corresponding path metric (PM), the intermediate LLR, and the coded message bits corresponding to each path member in the decoding graph. The decoder processes a special node of length M = 2 with a starting index i for the first bit of the decoding tree. For each path member of size i - 1 bits, a simplified processing of the next node is performed. For each path member before processing the special node, the decoder has information including the current state vector Curr_State, the LLR vectors λ0,…,λ m at the output of the node, and the path metric value PM. M-1

[0062] FIG. 4 is a diagram showing a decoding tree of PAC codes according to one embodiment.

[0063] Different from the decoding tree of the polar codes shown in FIG. 3, the input CC state (cState in) and the output CC state (cState out ) is provided to a node of the PAC code decoding tree and output from the node. The decoding tree of FIG. 4 is a decoding tree of length 4 or a part of a larger decoding tree. In the decoding tree of length 4, the PAC code of length 4 corresponds to the first node 402. The second node 404 and the third node 406 located immediately to the left of the first node 402 each correspond to a PAC code of length 2. The fourth node 408, the fifth node 410, the sixth node 412, and the seventh node 414 located at the leftmost end of the decoding tree each correspond to a PAC code of length 1 and are called leaf nodes. An individual node (e.g., the second node 404) receives the channel LLR vector λ (i) and the current CC state cState in . The node outputs a candidate codeword β (i) and the next CC state cState out (and the vectors u and v) to (e.g., the first node 402).

[0064] The input to the CC encoder is v = [v0,..., v M-1 , and the output of the CC is u = [u0,..., u M-1 . The codeword at the output of the special node is represented by TIFF2025105546000041.tif10130.

[0065] If the information / frozen pattern of the node is an all-zero vector of length M, the node is regarded as an all-zero special node. The input to the CC is a word v = 0 of length M.

[0066] The list is extended by adding the polar codeword corresponding to the output of the CC to the list members. The output v of the CC is calculated based on Equation 14 below.

[0067]

Equation

[0068] After that, u is encoded and c = u.G_M is obtained. The extended path is determined by concatenating v, u to the v-list and the u-list, respectively.

[0069] The new path index PM0 is calculated as shown in Equation 15 below.

Equation

[0070] If all are 0 at the first M - 1 indices and 1 at the last index for the node's information / frozen pattern, then that node is regarded as an iterative special node. The input to CC is the word v of length M, and as a result, v = [0 1×M-1 , v M-1 occurs.

[0071] v M-1 For the two candidates of v = 0, 1, the v-list is extended by concatenating TIFF2025105546000044.tif11138 to the current v-list, and two child paths are generated. To obtain the u-list, the output of CC for the two candidates is calculated based on Equation 16 below.

Equation

[0072] As another method, u (0) is calculated according to the above procedure. u (1) is the same as u (0) except for the last element, and for the last element, since it is TIFF2025105546000046.tif8138, it becomes TIFF2025105546000047.tif11153 (GF field or modulo 2 operation).

[0073] The u-list is extended by concatenating u (0) and u (1) to the current u-list.

[0074] The path metrics of the two child paths indicated by PM0 and PM1 are calculated as shown in Equation 17 below.

[0075]

Number

[0076] Also, after performing polar encoding only once to obtain c (0) it is also possible to calculate c (0) from c (1) as follows. u (0) and u (1) match except for the last element, and for the last element since it is TIFF2025105546000050.tif11153, it is shown that c (1) = c (0) + 1. Here, 1 is a vector with all elements of length M being 1.

[0077] If all the node information / frozen patterns are 1, that node is regarded as a rate-1 special node. The input to CC is a word v of length M, and as a result, v = [v0,..., v M-1 is generated. Here, all v i are message bits from the message word TIFF2025105546000051.tif11153.

[0078] The codeword c at the output of the special node after polar transformation takes any vector within {0, 1} M That is, even if the CC code exists, a rate-1 code is provided. u i is a linear combination of v j , j ≦ i, and the coefficient of v i is TIFF2025105546000052.tif11153 is equal to 1. Therefore, u is represented by Equation 18 below.

[0079] [Number] Here, η = [η0,…,η M-1 is a constant vector, and its elements are determined as a linear combination of the elements of the current path member. Also, G cc is the generator matrix of the CC code, which is invertible and upper triangular. Therefore, u is an arbitrary vector in {0,1} M . Since c = uG M , a similar description holds for c. The members of the child path are the words c (0) , c (1) ,…, c (Z-1) generated by.

[0080] The generation of the child path at the output of the special node after applying the polar transform is performed according to the classical polar code as shown in Equation 19 below.

[0081] [Number]

[0082] Routine Classical_polar_Rate1 receives M channel LLRs and outputs the most likely codeword of the rate 1 code. For example, the most likely codeword is the result of a hard decision on the LLR. The second most likely codeword is obtained by performing a hard decision after inverting the sign of the LLR with the smallest absolute value. The third most likely codeword is obtained by inverting the sign of the LLR with the second smallest absolute value. The fourth most likely codeword is obtained by inverting the sign of the LLR with the third smallest absolute value or by inverting the signs of both the LLR with the smallest absolute value and the LLR with the second smallest absolute value.

[0083] c (l) The path metrics PM corresponding to each of them l is calculated as shown in Equation 20 below.

[0084]

Equation

[0085] To expand the u list and the v list, c (l) the corresponding u mapped to it (l) vector and v (l) vector are calculated in three steps.

[0086] In the first step, u (l) is calculated. As a property of the polar code generation matrix, since it is TIFF2025105546000056.tif11131, the following Equation 21 is implemented by polar coding of length M.

[0087]

Equation

[0088] In the second step, the scramble word η is calculated. The word η is called a scramble word because it scrambles the output of the CC encoder obtained when the encoder starts in the all-zero state. Since CC is a linear operator for calculating η, η is equal to the output of the CC encoder when the all-zero input word of length M and the initial encoder state are given by Curr_State. This is shown in Equation 22 below.

[0089]

Equation

[0090] In the third step, v (l) is calculated. Equation 23 and Equation 24 are shown below.

[0091]

Number

Number

[0092] G cc According to the first solution using the inverse matrix of G cc Since G (l) is of size M×M and full rank, it is invertible. The inverse matrix is calculated offline and stored for each special node with length M. Then v is calculated as TIFF2025105546000063.tif9133.

[0093] According to the second solution using a shift register, the numerical result shows that TIFF2025105546000064.tif10132 has the same structure as G cc In particular, both are Toeplitz matrices. That is, they are described by the generating polynomial of the convolutional code. Examples for TIFF2025105546000065.tif10132 and the case of M = 8 are shown in the following equations 25 and 26.

[0094]

Number

Number

[0095] This is the generating polynomial It corresponds to the CC having TIFF2025105546000068.tif9128. If this always holds, as will be described in detail below, the inverse generating polynomial is obtained offline and used to encode TIFF2025105546000069.tif9128 to obtain v (l) .

[0096] For l = 0, …, Z - 1, when v (l) and u (l) are calculated, z child path members are obtained by adding them to the current path member.

[0097] If the information / frozen pattern at a node is all 1 except that the first index is 0, that node is regarded as an SPC special node. The input to the CC is a word v of length M, and the result is v = [v0, …, v M-1 . At this time, all v i (except v0 = 0) are message bits from the message word TIFF2025105546000070.tif9128.

[0098] Similar to the analysis of the rate - 1 node, Equation 27 is shown below.

Equation

[0099] When u is encoded with the polar code corresponding to the special node, the codeword shown in the following Equation 28 is obtained.

[0100]

Equation

[0101] vector v cc = vG cc The first element of is frozen (i.e., always takes a value of 0). The first element is equal to TIFF2025105546000073.tif9141.

[0102] Defining TIFF2025105546000074.tif10128, TIFF2025105546000075.tif6128 is obtained, which is the codeword of the SPC code. Next, the members of the sub-path are calculated using the method of the classical polar code with additional LLR scrambling using the binary sequence η c The steps for generating the sub-path members are shown below.

[0103] In the first step, the encoded scrambled vector η c is calculated. η is calculated by the method described above. η c =(η c,0 ,…,η c,M-1 ) is calculated by polar encoding as η c = ηG M as described above.

[0104] In the second step, the LLRs are scrambled. Scrambling the LLR vector TIFF2025105546000076.tif8128 with η c results in the scrambled codeword TIFF2025105546000077.tif6128 corresponding to the scrambled TIFF2025105546000078.tif9134. The scrambling is performed as TIFF2025105546000079.tif9134. The method for generating the children members of the SPC code of the classical polar code is used to obtain the Z children members as shown in Equation 29 below.

[0105]

Number

[0106] The corresponding path index PM l is a function of PM and the scrambled TIFF2025105546000082.tif10128. The path index PM corresponding to each of TIFF2025105546000083.tif7140 l is calculated as shown in Equation 30 below.

[0107]

Number

[0108] In the third step, v cc is calculated as TIFF2025105546000085.tif10138.

[0109] In the fourth step, the v list is calculated. Based on v cc = vG cc Equation 31 is calculated as shown below.

Number

[0110] As described above, without performing matrix multiplication, by using a shift register, calculations can be performed with low complexity. By applying TIFF2025105546000087.tif11140, the first element of TIFF2025105546000088.tif10138, and further the first element of v (l) are guaranteed to be zero for all l.

[0111] The extended path v list is obtained for l = 0, …, Z-1 by concatenating v to the current v list. (l)

[0112] In the fifth step, the U list is calculated. To calculate the extended path u list, first calculate u (l) according to Equation 32 below.

[0113]

Equation

[0114] Alternatively, u(l) is calculated as TIFF2025105546000090.tif10128.

[0115] The extended path u list is obtained for l = 0, …, Z-1 by concatenating u to the current u list. (l)

[0116] Regarding the inverse operation of the CC encoder, the operation of obtaining the input vector to the rate-1 CC encoder from the encoded output vector is performed using another CC encoder (i.e., a shift register and linear time). In particular, the inverse operation of Equation 33 takes the form of Equation 34 as shown below.

Equation

Equation

[0117] This inverse operation is proven by induction. Note that since N G is full rank, TIFF2025105546000093.tif10128 and α0 = 1.

[0118] This result holds for N = 2. For example, ​​Using TIFF2025105546000094.tif12136, Equation 35 is obtained.

Number

[0119] Assume this result holds for N. Also, as shown in the following Equations 36 and 37, prove that this result also holds for N + 1.

[0120]

Number

Number

[0121] G N+1 The inverse operation of is represented by the following Equation 38.

[0122]

Number

[0123] The goal is to obtain B N , and d. Since it is TIFF2025105546000099.tif9128, this result is represented by the following Equation 39.

[0124]

Number

[0125] This is Based on the premise that it is TIFF2025105546000101.tif9142, it becomes the following Equations 40, 41, and 42.

Number

Number

Number

[0126] Based on the above equations 40 to 42, this result is represented by the following equation 43.

[0127]

Number

[0128]

Number

[0129] For any α N in the range of 2 ≤ j ≤ N, c j = α N-j+1 can be obtained, and as a result, the following equation 45 is obtained.

[0130]

Number

[0131] From TIFF2025105546000108.tif9141 (considering the first N - 1 lines), the following equation 46 becomes the following equation 47.

[0132]

Number

Number

[0133] Alternatively, this result is represented by the following equation 48.

Number

[0134] The inverse CC generating polynomials for different special node lengths can be nested. Equation 49 is shown below for rate 1 special nodes of lengths 2, 4, 8, and 16.

[0135]

Number

[0136] Length N = 2 n The CC generating matrix and the inverse generating matrix for the special node are in the forms shown by the following equations 50 and 51.

Number

Number

[0137] The generating polynomial and the inverse generating polynomial can be TIFF2025105546000115.tif11128 respectively. TIFF2025105546000116.tif11128 can be calculated, and the first N elements of the first row are, as shown in the following equation 52, equal to the first row of TIFF2025105546000117.tif9128.

Number

[0138] TIFF2025105546000119.tif9133 is in the form shown by the following equation 53.

Number

[0139] Calculate B, and compare it with TIFF2025105546000121.tif9133. I n with size 2 n ×2 nis set to the identity matrix, and as a result, the following Equation 54 or Equation 55 is obtained.

[0140] [Number] [Number]

[0141] As a result, the following Equation 56 is derived. [Number]

[0142] This is shown in another form as TIFF2025105546000125.tif7128. This equation means that the first row of B is the first row of TIFF2025105546000126.tif9128, i.e., equal to (α0,…,α N-1 ). Therefore, the first N elements of the first row of TIFF2025105546000127.tif9138 are equal to the first row of TIFF2025105546000128.tif9138, thereby proving the nesting property of the inverse CC generation polynomial.

[0143] Due to the above characteristics, for the inverse CC operation of the PAC decoder, one inverse shift register with a length N = 2 n is sufficient. When operating on a given special node with a length M, only the first M memory elements of the shift register are used (for example, if the position where the last "1" appears in the inverse polynomial is L, only the first L ≤ the following leading elements are used).

[0144] FIG. 5 is a flowchart showing the SSCL decoding method of the PAC code according to one embodiment.

[0145] In step 502, the receiver of the electronic device receives the channel encoded with the PAC code. In step 504, the decoder of the electronic device performs SSCL decoding on the channel via the decoding tree and generates a decoded codeword. The decoding tree includes a special node that generates a candidate codeword output without processing the subtree based on a predetermined process using the CC state input and the channel vector input. The special nodes are a rate 0 node, a repetition node, a rate 1 node, and an SPC node, and the defined processes were detailed above.

[0146] FIG. 6 is a block diagram of an electronic device in a network environment 600 according to an embodiment.

[0147] As shown in FIG. 6, the electronic device 601 in the network environment 600 communicates with the electronic device 602 via a first network 698 (e.g., a short-range wireless communication network) or communicates with the electronic device 604 or the server 608 via a second network 699 (e.g., a long-range wireless communication network). The electronic device 601 communicates with the electronic device 604 via the server 608. The electronic device 601 includes a processor 620, a memory 630, an input device 650, an acoustic output device 655, a display device 660, an audio module 670, a sensor module 676, an interface 677, a haptic module 679, a camera module 680, a power management module 688, a battery 689, a communication module 690, a subscriber identification module (SIM card) 696, and an antenna module 697. As an embodiment, at least one of the components (e.g., the display device 660 or the camera module 680) may be omitted from the electronic device 601, or one or more other components may be added to the electronic device 601. Some of the components are implemented as a single integrated circuit (IC). For example, the sensor module 676 (e.g., a fingerprint sensor, an iris sensor, or an illuminance sensor) is incorporated into the display device 660 (e.g., a display).

[0148] The processor 620 executes software (e.g., program 640) to control at least one other component (e.g., a hardware component or a software component) of the electronic device 601 coupled to the processor 620, and executes various data processing or calculations.

[0149] As at least part of the data processing or calculation, the processor 620 loads commands or data received from other components (e.g., the sensor module 676 or the communication module 690) into the volatile memory 632, processes the commands or the data stored in the volatile memory 632, and stores the resulting data in the non-volatile memory 634. The processor 620 includes a main processor 621 (e.g., a central processing unit (CPU) or an application processor (AP)) and an auxiliary processor 623 (e.g., a graphics processing unit (GPU), an image signal processor (ISP), a sensor hub processor, or a communication processor (CP)) that can operate independently of the main processor 621 or in cooperation with the main processor 621. Further or alternatively, the auxiliary processor 623 is adapted to consume less power than the main processor 621 or to execute a specific function. The auxiliary processor 623 is implemented as a separate entity from the main processor 621 or as part of the main processor 621.

[0150] The auxiliary processor 623 controls at least a part of the functions or states related to at least one component among the components of the electronic device 601 (for example, the display device 660, the sensor module 676, or the communication module 690), instead of the main processor 621 while the main processor 621 is in an inactive (for example, sleep mode) state, or together with the main processor 621 while the main processor 621 is in an active state (for example, during the execution of an application). The auxiliary processor 623 (for example, an image signal processor or a communication processor) may be implemented as a part of another component (for example, the camera module 680 or the communication module 690) that is functionally related to the auxiliary processor 623.

[0151] The memory 630 stores various data used by at least one component of the electronic device 601 (for example, the processor 620 or the sensor module 676). The various data includes, for example, software (for example, the program 640) and input data or output data of commands related to the software. The memory 630 includes a volatile memory 632 or a non-volatile memory 634. The non-volatile memory 634 includes an internal memory 636 and / or an external memory 638.

[0152] The program 640 is stored in the memory 630 as software and includes, for example, an operating system (OS) 642, middleware 644, and an application 646.

[0153] The input device 650 receives commands or data used by another component of the electronic device 601 (for example, the processor 620) from outside the electronic device 601 (for example, a user). The input device 650 includes, for example, a microphone, a mouse, a keyboard, and the like.

[0154] The audio output device 655 outputs an audio signal to the outside of the electronic device 601. The audio output device 655 includes, for example, a speaker or a receiver. The speaker is used for general purposes such as multimedia or playing recordings and videos, and the receiver is used for incoming calls. The receiver is implemented as a separate unit from the speaker or as part of the speaker.

[0155] The display device 660 visually provides information to the outside (e.g., the user) of the electronic device 601. The display device 660 includes, for example, a display, a hologram device, or a projector, and a control circuit that controls the corresponding one of the display, the hologram device, and the projector. The display device 660 includes a touch circuit adapted to detect a touch or a sensor circuit (e.g., a pressure sensor) adapted to measure the intensity of the force generated by the touch.

[0156] The audio module 670 converts sound into an electrical signal and vice versa. The audio module 670 acquires sound through the input device 650 or outputs sound through headphones of an external electronic device 602 directly (e.g., wired) or wirelessly coupled to the audio output device 655 or the electronic device 601.

[0157] The sensor module 676 detects the operating state of the electronic device 601 (e.g., power or temperature) or the environmental state outside the electronic device 601 (e.g., the user's state) and generates an electrical signal or a data value corresponding to the detected state. The sensor module 676 includes, for example, a gesture sensor, a gyro sensor, an atmospheric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an infrared (IR) sensor, a biometric authentication sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0158] Interface 677 supports one or more specified protocols used for the electronic device 601 to be directly (e.g., wired) or wirelessly coupled to an external electronic device 602. Interface 677 includes, for example, a High-Definition Multimedia Interface (HDMI (registered trademark)), a Universal Serial Bus (USB) interface, a Secure Digital (SD) card interface, or an audio interface.

[0159] Connection terminal 678 includes a connector for physically connecting the electronic device 601 to an external electronic device 602. Connection terminal 678 includes, for example, an HDMI (registered trademark) connector, a USB connector, an SD card (registered trademark) connector, or an audio connector (e.g., a headphone connector).

[0160] The tactile module 679 converts an electrical signal into a mechanical stimulus (e.g., vibration or movement), or an electrical stimulus recognized by a user via a tactile or kinesthetic sense. The tactile module 679 includes, for example, a motor, a piezoelectric element, or an electrical stimulation device.

[0161] The camera module 680 captures a still image or a moving image. The camera module 680 includes one or more lenses, an image sensor, an image signal processor, or a flash. The power management module 688 manages the power supplied to the electronic device 601. The power management module 688 is implemented, for example, as at least a part of a power management integrated circuit (PMIC).

[0162] The battery 689 supplies power to at least one component of the electronic device 601. The battery 689 includes, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0163] The communication module 690 supports establishing a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device 601 and an external electronic device (e.g., the electronic device 602, the electronic device 604, or the server 608), and performing communication via the established communication channel. The communication module 690 is operable independently of the processor 620 (e.g., the AP), and includes one or more communication processors that support direct (e.g., wired) communication or wireless communication. The communication module 690 includes a wireless communication module 692 (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module 694 (e.g., a local area network (LAN) communication module or a power line communication (PLC) module). One of the corresponding communication modules communicates with the external electronic device via a first network 698 (e.g., a short-range communication network such as the BLUETOOTH (registered trademark), Wi-Fi Direct, or Infrared Data Association (IrDA) standard) or a second network 699 (e.g., a long-range communication network such as a cellular network, the Internet, or a computer network (e.g., a LAN or a wide area network (WAN))). These various types of communication modules are implemented as a single component (e.g., a single IC) or as a plurality of components separated from each other (e.g., a plurality of ICs). The wireless communication module 692 uses the subscriber information (e.g., the international mobile subscriber identity (IMSI)) stored in the subscriber identification module 696 to identify and authenticate the electronic device 601 in a communication network such as the first network 698 or the second network 699.

[0164] The antenna module 697 transmits or receives signals or power to / from an external device (e.g., an external electronic device) of the electronic device 601. The antenna module 697 includes one or more antennas, and at least one antenna suitable for a communication method used in a communication network such as the first network 698 or the second network 699 is selected therefrom, for example, by the communication module 690 (e.g., the wireless communication module 692). Thereafter, the signal or power is transmitted or received between the communication module 690 and the external electronic device via the selected at least one antenna.

[0165] Commands or data are transmitted or received between the electronic device 601 and the external electronic device 604 via the server 608 coupled to the second network 699. Each of the electronic devices 602 and 604 is a device of the same type as or a different type from the electronic device 601. All or part of the operations executed by the electronic device 601 are executed by one or more of the external electronic devices (602, 604, 608). For example, when the electronic device 601 is to execute a function or service automatically or in response to a request from a user or another device, the electronic device 601 requests one or more external electronic devices to execute at least part of the function or service instead of or in addition to executing the function or service itself. The one or more external electronic devices that receive the request execute at least part of the requested function or service or additional functions or services related to the request, and transfer the result of the execution to the electronic device 601. The electronic device 601 provides the result as at least part of the response to the request, whether or not it further processes the result. For this purpose, for example, cloud computing, distributed computing, and client-server computing technologies are used.

[0166] Embodiments and operations of the subject matter described in this specification may be implemented in digital electronic circuitry, or in computer software, firmware, hardware (including the structures disclosed herein and their structural equivalents), or in combinations of one or more of them. Embodiments of the subject matter described in this specification may be implemented as one or more computer programs, i.e., as one or more modules of computer program instructions encoded on a computer storage medium for execution by, or to control the operation of, a data processing apparatus. Further or alternatively, the program instructions may be encoded in an artificially generated propagated signal, e.g., a mechanically generated electrical, optical, or electromagnetic signal, that is generated to encode information for transmission to a suitable receiver apparatus for execution by a data processing apparatus. The computer storage medium may be or include a computer-readable storage device, a computer-readable storage substrate, a random access or serial access memory array or device, or a combination of one or more of them. Further, the computer storage medium is not a propagated signal, but the computer storage medium may be a source or destination for computer program instructions encoded in an artificially generated propagated signal. The computer storage medium may also be or include one or more separate physical components or media (e.g., multiple CDs, disks, or other storage devices). Further, the operations described herein are implemented as operations performed by a data processing apparatus on data stored in one or more computer-readable storage devices or received from other sources of data.

[0167] Although this specification may be said to include many specific implementation details, the implementation details should not be construed as limitations on the claims, but rather as descriptions of features specific to a particular embodiment. Certain features described herein in the context of separate embodiments may also be implemented in combination in a single embodiment. Conversely, the various features described in the context of a single embodiment may also be implemented separately in multiple embodiments or in any suitable sub-combination. Furthermore, features have been described above as acting in certain combinations and may even initially be claimed as such, but one or more features from the claimed combination may in some cases be deleted from the combination, and the claimed combination may relate to a sub-combination or variation of sub-combinations.

[0168] Similarly, operations are depicted in the drawings in a particular order, but this should not be understood as requiring that such operations be performed in the particular order shown or in a sequential order to achieve a favorable result, or that all of the operations shown be performed. Depending on the circumstances, multitasking or parallel processing may be advantageous. Furthermore, the separation of various system components in the embodiments described above should not be understood as necessary in all embodiments, and the described program components and systems are generally understood to be integrated in a single software product or packaged in multiple software products.

[0169] Thus, particular embodiments have been described herein. Other embodiments are within the scope of the claims. In some cases, even if the operations recited in the claims are performed in a different order, favorable results may still be obtained. Furthermore, the steps depicted in the drawings do not necessarily require the particular or sequential order shown to achieve a favorable result. In certain implementations, multitasking or parallel processing may work advantageously.

[0170] As described above, the embodiments of the present invention have been described in detail with reference to the drawings. However, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the technical idea of the present invention.

Explanation of Reference Numerals

[0171] 102 Transmitter 104 Receiver 106, 110 First, second processors 108 Encoder 112 Decoder 202 Rate profiling 204 Convolution 302, 304, 306, 308, 310, 312, 314, 316, 318, 320, 322, 324, 326, 328, 330 First to fifteenth nodes 402, 404, 406, 408, 410, 412, 414 First to seventh nodes 600 Network environment 601, 602, 604 Electronic devices 608 Server 620 Processor 621 Main processor 623 Auxiliary processor 630 Memory 632 Volatile memory 634 Non-volatile memory 636 Internal memory 638 External memory 640 Program 642 Operating system (OS) 644 Middleware 650 Input device 655 Acoustic output device 660 Display device 670 Audio module 676 Sensor module 677 Interface 678 Connection terminal 679 Haptic module 680 Camera Module 688 Power Management Module 689 Battery 690 Communication Module 692 Wireless Communication Module 694 Wired Communication Module 696 Subscriber Identification Module 697 Antenna Module 698 First Network 699 Second Network

Claims

1. A method for operating an electronic device, comprising: receiving, by the electronic device, a channel encoded with a polarization adjustment convolution (PAC) code; generating a decoded codeword; wherein the decoded codeword is generated at least in part based on a simplified successive cancellation list (SSCL) decoding performed on the channel by the electronic device via a decoding tree; the decoding tree includes nodes that generate candidate codeword outputs based on a predetermined process using a convolutional code (CC) state input and a channel vector input; wherein a subtree of the nodes remains unprocessed.

2. The node consists of a rate 0 node; each leaf node of the subtree consists of a 0-valued bit; The method according to claim 1, wherein the candidate codeword output consists of a constant codeword for each member of the list in the SSCL decoding.

3. The node consists of an iterative node; the last leaf node of the subtree consists of a 1-valued bit; the remaining leaf nodes of the subtree consist of 0-valued bits; The method according to claim 1, wherein the candidate codeword output consists of one of two constant codewords for each member of the list in the SSCL decoding.

4. The node consists of a rate 1 node; each leaf node of the subtree consists of a 1-valued bit; The method according to claim 1, wherein the candidate codeword output is generated based on a determination of an information carrier vector from a CC codeword.

5. The method according to claim 1, wherein the candidate codeword output is based on a non-linear code.

6. The node consists of a single parity check (SPC) node; the first leaf node of the subtree consists of a 0-valued bit; the remaining leaf nodes of the subtree consist of 1-valued bits; The method according to claim 1, wherein the candidate codeword output is generated based on a minimum likelihood ratio (LLR) scramble and a determination of an information carrier vector from a CC codeword.

7. The method according to claim 6, wherein the candidate codeword output is generated based on an SPC codebook.

8. The method according to claim 1, further comprising the step of applying inverse CC coding to different lengths of the nodes.

9. The method according to claim 1, wherein the node further generates a CC state output, an information carrier vector, and a CC codeword corresponding to the information carrier vector.

10. The SSSL decoding is performed by a parallel successive cancellation (SC) decoder, The method according to claim 1, wherein a first list is maintained for the information carrier vector and a second list is maintained for the CC codeword.

11. The method according to claim 1, wherein the channel vector input consists of an LLR vector.

12. An electronic device, A receiver configured to receive a channel encoded with a polarization adjustment convolutional (PAC) code and A decoder configured to generate a decoded codeword, comprising: The decoded codeword is generated based at least in part on a simplified successive cancellation list (SSCL) decoding performed on the channel via a decoding tree, The decoding tree includes a node that generates a candidate codeword output based on a predetermined process using a convolutional code (CC) state input and a channel vector input, An electronic device, wherein a subtree of the node remains unprocessed.

13. The node consists of a rate 0 node, Each leaf node of the subtree consists of a 0-valued bit, The electronic device according to claim 12, wherein the candidate codeword output consists of a constant codeword for each member of the list in the SSCL decoding.

14. The node consists of an iterative node, The last leaf node of the subtree consists of a 1-valued bit, The remaining leaf nodes of the subtree consist of 0-valued bits, The electronic device according to claim 12, wherein the candidate codeword output consists of one of two constant codewords for each member of the list in the SSCL decoding.

15. The node consists of a rate 1 node, Each leaf node of the subtree consists of a 1-valued bit The electronic device according to claim 12, wherein the candidate codeword output is generated based on a determination of an information carrier vector from a CC codeword.

16. The electronic device according to claim 15, wherein the candidate codeword output is based on a non-linear code.

17. The node consists of a single parity check (SPC) node, The first leaf node of the subtree consists of 0-valued bits, The remaining leaf nodes of the subtree consist of 1-valued bits, The electronic device according to claim 12, wherein the candidate codeword output is generated based on a minimum likelihood ratio (LLR) scramble and determination of an information carrier vector from a CC codeword.

18. The electronic device according to claim 12, wherein the decoder is further configured to apply inverse CC coding for different lengths of the nodes.

19. The electronic device according to claim 12, wherein the node further generates a CC state output, an information carrier vector, and a CC codeword corresponding to the information carrier vector.

20. An electronic device, A processor, A non-transitory computer-readable storage medium storing instructions, and comprising, When the instructions are executed, the processor Receives a channel encoded with a polarization adjustment convolution (PAC) code, Is configured to generate a decoded codeword, The decoded codeword is generated based at least in part on a simplified successive cancellation list (SSCL) decoding performed on the channel via a decoding tree, The decoding tree includes a node that generates a candidate codeword output based on a predetermined process using a convolutional code (CC) state input and a channel vector input, The electronic device, wherein the subtree of the node remains unprocessed.

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