Control device and image processing apparatus

Abstract

To provide a control device and an image processing apparatus which hardly cause malfunction of a device.SOLUTION: A control device 17 includes a signal generation unit 41, a signal output unit 42, and a correction circuit 43. The signal generation unit 41 outputs a first signal Si1 from an output terminal 410. The signal output unit 42 includes an input terminal 420 to which the first signal Si1 is inputted, and outputs a control signal corresponding to the first signal Si1. The correction circuit 43 is inserted between the output terminal 410 of the signal generation unit 41 and the input terminal 420 of the signal output unit 42, and sets voltage V1 of the input terminal 420 to a specific value according to the second signal Si2 from the outside.SELECTED DRAWING: Figure 4

Description

Technical Field

[0001] The present invention relates to a control device and an image processing device.

Background Art

[0002] As related art, a control device (data transfer processing device) that performs data communication between input / output buffers driven by power supplies respectively supplied from different power sources via a predetermined communication medium and used in a copying machine or the like is known (see, for example, Patent Document 1).

[0003] The control device according to the related art transfers data between an output buffer driven by a first power supply voltage supplied from a first power supply and an input buffer driven by a second power supply voltage supplied from a second power supply. This control device includes first buffer control means. The first buffer control means detects a change state of the second power supply voltage supplied from the second power supply and controls a change in the output level of the output buffer. In this control device, when transferring data, by capturing a change in the power supply voltage and controlling the digital output of the output buffer, it is possible to prevent an overcurrent from flowing into the input / output buffer due to a change in one of the power supply voltages.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In the configuration of the above related art, for example, at the time of power-on or the like, the transmission source (output buffer) of a signal (data) may be reset. At that time, the input terminal of the signal destination (input buffer) becomes high impedance, which may lead to malfunction of the device after the input buffer.

[0006] An object of the present invention is to provide a control device and an image processing device that are less likely to cause malfunction of a device. **Means for Solving the Problems**

[0007] A control device according to one aspect of the present invention includes a signal generation unit, a signal output unit, and a correction circuit. The signal generation unit outputs a first signal from an output terminal. The signal output unit has an input terminal to which the first signal is input, and outputs a control signal according to the first signal. The correction circuit is inserted between the output terminal of the signal generation unit and the input terminal of the signal output unit, and sets the voltage of the input terminal to a specific value according to a second signal from the outside.

[0008] An image processing device according to another aspect of the present invention includes the control device and a main body having an image processing function. **Advantages of the Invention**

[0009] According to the present invention, it is possible to provide a control device and an image processing device that are less likely to cause malfunction of a device. **Brief Description of the Drawings**

[0010]

Figure 1

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Figure 7

Figure 8

[0011] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. The following embodiments are examples that embody the present invention and are not intended to limit the technical scope of the present invention.

[0012] (Embodiment 1) [1] Overall Configuration of Image Processing Apparatus First, with reference to FIGS. 1 and 2, the overall configuration of the image processing apparatus 10 according to the present embodiment will be described.

[0013] The image processing apparatus 10 according to the present embodiment is, as an example, a multifunction device having a plurality of functions such as a scan function for acquiring image data from a document, a print function for forming an image based on the image data, a facsimile function, and a copy function. The image processing apparatus 10 only needs to have an image processing function including at least one of a function of forming an image and a function of acquiring image data, and may be a printer, a scanner, a facsimile apparatus, a copy machine, or the like.

[0014] As shown in FIG. 1, the image processing apparatus 10 includes an automatic document feeder 11, an image reading unit 12, an image forming unit 13, a paper feeding unit 14, a display unit 15, an operation unit 16, a control device 17, and a power supply unit 18. Since the automatic document feeder 11 is an ADF (Auto Document Feeder), it is denoted as "ADF" in FIG. 1 and is also referred to as "ADF11" in the following description. In the present embodiment, as shown in FIG. 2, the image processing apparatus 10 includes a main body 101. The ADF11, the image reading unit 12, the image forming unit 13, the paper feeding unit 14, the display unit 15, the operation unit 16, the control device 17, and the power supply unit 18 are provided in the main body 101.

[0015] The ADF11 conveys the document on which an image is read by the image reading unit 12. The ADF11 has a document set unit, a plurality of conveyance rollers, a document holder, a paper discharge unit, and the like.

[0016] The image reading unit 12 reads an image from the document and outputs image data corresponding to the read image. The image reading unit 12 has a document table, a light source, a plurality of mirrors, an optical lens, a CCD (Charge Coupled Device), and the like.

[0017] The image forming unit 13 forms an image on a sheet by an electrophotographic method based on the image data output from the image reading unit 12. Further, the image forming unit 13 forms an image on a sheet based on image data input from an information processing device outside the image processing apparatus 10, such as a personal computer. The image forming unit 13 has four image forming units corresponding to four colors of C (cyan), M (magenta), Y (yellow), and K (black), an optical scanning device, an intermediate transfer belt, a secondary transfer roller, a fixing device, and the like. The image forming unit 13 may be configured to form an image on a sheet by an image forming method other than the electrophotographic method, such as an inkjet method.

[0018] The image forming unit 13 forms an image on a sheet using toner as a developer. When the image forming unit 13 forms an image by an inkjet method, ink (another example of a developer) is supplied instead of toner. Examples of the toner supplied to the image forming unit 13 include toners of a plurality of colors of C (cyan), M (magenta), Y (yellow), and K (black). The sheet after image formation in the image forming unit 13 is discharged (supplied) to an expansion device or the like for post-processing.

[0019] The paper feeding unit 14 supplies sheets to the image forming unit 13. The paper feeding unit 14 includes a paper feed cassette, a manual feed tray, a sheet conveyance path, a plurality of conveyance rollers, and the like. In the present embodiment, the paper feeding unit 14 has a plurality of paper feeding sources (including two or more paper feed cassettes and a manual feed tray). The image forming unit 13 forms an image on the sheet supplied from the paper feeding unit 14. The sheet supplied to the image forming unit 13 is, for example, paper, but is not limited to paper, and may be, for example, a resin film or the like.

[0020] The display unit 15 is a user interface for presenting (displaying) information to the user in the image processing apparatus 10. The display unit 15 displays various information in response to a control instruction from the control device 17. In the present embodiment, as an example, the display unit 15 includes a liquid crystal display, and displays a display screen including various information on the liquid crystal display.

[0021] The operation unit 16 is a user interface for receiving user operation inputs for the display screen displayed on the display unit 15, for example. The operation unit 16 receives various operations by the user, for example, by outputting an electrical signal corresponding to the user's operation. In the present embodiment, as an example, the operation unit 16 has a switch or a touch panel or the like.

[0022] Further, the image processing apparatus 10 may include, in addition to or instead of the display unit 15 and the operation unit 16, for example, an audio output unit and an audio input unit as user interfaces.

[0023] The control device 17 mainly includes a computer system having one or more processors and one or more memories, and comprehensively controls the image processing apparatus 10. In the image processing apparatus 10, the functions of the control device 17 are realized by one or more processors executing a program. In the present embodiment, as an example, the control device 17 includes a CPU (Central Processing Unit).

[0024] The program may be pre-recorded in one or more memories, may be provided through a telecommunication line such as the Internet, or may be provided by being recorded on a non-transitory recording medium readable by a computer system, such as a memory card or an optical disk. The one or more processors are composed of one or more electronic circuits including semiconductor integrated circuits. Further, the computer system referred to herein includes a microcontroller having one or more processors and one or more memories. The control device 17 may be a control unit provided separately from the main control unit that comprehensively controls the image processing device 10.

[0025] Specifically, the control device 17 controls each device by transmitting (outputting) a control signal to each device such as the ADF 11, the image reading unit 12, the image forming unit 13, the paper feeding unit 14, and the display unit 15. For example, the control device 17 outputs a PF (Paper Feeder) selection signal and a clock signal as control signals to the paper feeding unit 14. The PF selection signal is a control signal for selecting a paper feeding source, and the clock signal is a control signal for specifying the timing for supplying a sheet to the paper feeding unit 14. Thereby, the control device 17 can feed paper from an arbitrary paper feeding source at an arbitrary timing among a plurality of paper feeding sources (including two or more paper cassettes and a manual feed tray) in the paper feeding unit 14.

[0026] The power supply unit 18 is a device that generates (outputs) electric power for the operation of the image processing device 10. The power supply unit 18 is electrically connected to one or more electrical loads and supplies electric power to the one or more electrical loads. In the present embodiment, the main body 101 of the image processing device 10 serves as an "electrical load", and the power supply unit 18 supplies electric power to each part of the main body 101 as an electrical load. That is, the one or more electrical loads supplied with electric power from the power supply unit 18 include the ADF 11, the image reading unit 12, the image forming unit 13, the paper feeding unit 14, the display unit 15, the operation unit 16, and the control device 17.

[0027] In this embodiment, the power supply unit 18 is electrically connected to an AC plug, and converts an AC voltage of 100V (or 200V) applied to the AC plug into, for example, a DC voltage of 24V and a DC voltage of 3.3V (or 5V). That is, when the AC plug is connected to an outlet (socket), AC power is applied to the power supply unit 18 from an AC power source such as a mains power supply, so the power supply unit 18 generates DC power from this AC power.

[0028] Further, the image processing apparatus 10 further includes a storage unit, a communication unit, etc. The storage unit includes one or more non-volatile memories, and information such as a control program for causing the control device 17 to execute various processes is stored in advance. The communication unit is an interface that executes data communication between the image processing apparatus 10 and an external device connected via a communication network such as the Internet or a LAN (Local Area Network).

[0029] [2] Configuration related to transmission of control signals Next, the configuration related to the transmission of control signals will be described in more detail with reference to FIGS. 3 to 8.

[0030] As described above, the image processing apparatus 10 according to this embodiment controls a device such as the paper feeding unit 14 by transmitting (outputting) control signals such as a PF selection signal and a clock signal from the control device 17 to the device. That is, the paper feeding unit 14 is an example of a device controlled by a control signal, and the PF selection signal and the clock signal are examples of control signals.

[0031] Hereinafter, it is assumed that the control signals are the first PF selection signal Si11 and the second PF selection signal Si12. The first PF selection signal Si11 and the second PF selection signal Si12 are voltage signals whose voltage values change between H (High) level and L (Low) level, respectively. And the device (paper feeding unit 14) does not select any paper feeding source when both the first PF selection signal Si11 and the second PF selection signal Si12 are at the H level. The device (paper feeding unit 14) selects the first paper feeding source when the first PF selection signal Si11 is at the H level and the second PF selection signal Si12 is at the L level, and selects the second paper feeding source when the first PF selection signal Si11 is at the L level and the second PF selection signal Si12 is at the H level.

[0032] As shown in FIG. 3, the image processing apparatus 10 according to the present embodiment includes a first substrate (Engine substrate) 21 that is a transmission source of a control signal, and a second substrate (PF substrate) 22 that is a transmission destination of the control signal. A control device 17 is mounted on the first substrate 21, and a device control unit 141 included in devices such as the paper feeding unit 14 is mounted on the second substrate 22. Further, a signal transmission circuit 3 is mounted on the second substrate 22. The first substrate 21 and the second substrate 22 are electrically connected by a signal line 23 that serves as a transmission path for control signals (here, the first PF selection signal Si11 and the second PF selection signal Si12).

[0033] Thus, the control device 17 according to the present embodiment constitutes the image processing apparatus 10 together with the main body 101 having an image processing function. In other words, the image processing apparatus 10 includes the control device 17 and the main body 101 having an image processing function.

[0034] According to this configuration, the control signals (here, the first PF selection signal Si11 and the second PF selection signal Si12) output by the control device 17 on the first substrate 21 are transmitted through the signal line 23 to the signal transmission circuit 3 on the second substrate 22. The signal transmission circuit 3 transmits the input control signal to the device control unit 141. Thereby, the device control unit 141 operates devices such as the paper feeding unit 14 according to the control signals.

[0035] Here, the control device 17 includes a signal generation unit 41 and a signal output unit 42. The signal generation unit 41 generates a first signal Si1 (see FIG. 4). The signal output unit 42 outputs control signals (here, a first PF selection signal Si11 and a second PF selection signal Si12) corresponding to the first signal Si1.

[0036] In this embodiment, the signal generation unit 41 is constituted by a CPU. That is, in this embodiment, as an example, the first signal Si1 is a "PF_CS signal", and an output terminal 410 (see FIG. 4) for outputting the first signal Si1 in the signal generation unit 41 is a "PF_CS terminal" of the CPU.

[0037] The signal output unit 42 includes an input terminal 420 (see FIG. 4) and transistors Tr1, Tr2, Tr3 (see FIG. 7), etc. According to whether the first signal Si1 input to the input terminal 420 from the signal generation unit 41 is at a high level or a low level, the first PF selection signal Si11 and the second PF selection signal Si12 are output. In this embodiment, as an example, if the first signal Si1 is at a high level, the first PF selection signal Si11 is at a high level and the second PF selection signal Si12 is at a low level, and if the first signal Si1 is at a low level, the first PF selection signal Si11 is at a low level and the second PF selection signal Si12 is at a high level (see FIG. 5).

[0038] However, in this configuration, for example, when the image processing apparatus 10 is powered on, the signal generation unit 41 composed of the CPU is reset, and during this reset operation, the input terminal 420 of the signal output unit 42 may become high impedance. When the input terminal 420 of the signal output unit 42 becomes high impedance, both the first PF selection signal Si11 and the second PF selection signal Si12 become low levels. In this case, it is not assumed that both the first PF selection signal Si11 and the second PF selection signal Si12 become low levels, which may lead to malfunction of the device (paper feeding unit 14).

[0039] By the way, as a related art, there is known a control device (data transfer processing device) that performs data communication between input / output buffers that are used in a copying machine or the like and are driven by power supplies respectively supplied from different power sources via a predetermined communication medium.

[0040] The control device according to the related art transfers data between an output buffer driven by a first power supply voltage supplied from a first power supply and an input buffer driven by a second power supply voltage supplied from a second power supply. This control device includes first buffer control means. The first buffer control means detects a change state of the second power supply voltage supplied from the second power supply and controls a change in the output level of the output buffer. In this control device, when transferring data, by capturing a change in the power supply voltage and controlling the digital output of the output buffer, it is possible to prevent an overcurrent from flowing into the input / output buffer due to a change in one of the power supply voltages.

[0041] In the configuration of the above related art, for example, at the time of power-on or the like, the transmission source (output buffer) of a signal (data) may be reset. At this time, the input terminal of the signal destination (input buffer) becomes high impedance, which may lead to malfunction of the device after the input buffer.

[0042] On the other hand, in the present embodiment, a control device 17 and an image processing device 10 that are less likely to cause malfunction of the device are realized by the configuration described below.

[0043] That is, as shown in FIG. 4, the control device 17 according to the present embodiment includes a signal generation unit 41, a signal output unit 42, and a correction circuit 43. The signal generation unit 41 outputs a first signal Si1 from an output terminal 410. The signal output unit 42 has an input terminal 420 to which the first signal Si1 is input, and outputs control signals (a first PF selection signal Si11 and a second PF selection signal Si12) corresponding to the first signal Si1. The correction circuit 43 is inserted between the output terminal 410 of the signal generation unit 41 and the input terminal 420 of the signal output unit 42, and sets the voltage V1 of the input terminal 420 to a specific value according to a second signal Si2 from the outside.

[0044] According to this configuration, the control device 17 can forcibly set the voltage V1 at the input terminal 420 to a specific value according to the second signal Si2 from the outside (of the correction circuit 43). For example, even when the signal generation unit 41 (CPU), which is the transmission source of the first signal Si1, is reset when the image processing apparatus 10 is powered on, the correction circuit 43 can set the voltage V1 at the input terminal 420 at this time to a specific value. Thereby, it is possible to avoid the input terminal 420 of the signal output unit 42 from becoming high impedance. Therefore, according to this control device 17, there is an advantage that it is difficult for a malfunction of the device (paper feed unit 14) to occur due to the input terminal 420 of the signal output unit 42 becoming high impedance.

[0045] In short, as shown in the upper part of FIG. 5, when the input terminal 420 (INPUT) of the signal output unit 42 becomes high impedance (Hi-Z), both the first PF selection signal Si11 and the second PF selection signal Si12 are in an unexpected state of being at the L level. Therefore, the control device 17 according to the present embodiment deletes the state in which the input terminal 420 (INPUT) of the signal output unit 42 becomes high impedance (Hi-Z) by forcibly setting the voltage V1 at the input terminal 420 to a specific value by the correction circuit 43. As a result, it becomes difficult for a malfunction of the device (paper feed unit 14) to occur.

[0046] More specifically, the second signal Si2 is a reset signal that is input to the signal generation unit 41 to reset the signal generation unit 41. That is, the signal generation unit 41 has a reset (RESET) terminal 411 for inputting a reset signal as the second signal Si2. Therefore, for example, when the image processing apparatus 10 is powered on, the signal generation unit 41 is reset when the second signal Si2, which is a reset signal, becomes the L level. At this time, the correction circuit 43 sets the voltage V1 at the input terminal 420 of the signal output unit 42 to a specific value according to the second signal Si2, which is a reset signal.

[0047] According to this configuration, during the reset operation of the signal generation unit 41 (CPU), which is the source of the first signal Si1, the voltage V1 at the input terminal 420 can be set to a specific value. As a result, even during the reset operation of the signal generation unit 41 (CPU), it is possible to avoid the input terminal 420 of the signal output unit 42 from becoming high impedance, thereby making it less likely for the device (paper feeding unit 14) to malfunction.

[0048] Further, the correction circuit 43 includes a logical product circuit 431 (see FIG. 7). The logical product circuit 431 outputs the logical product of the first signal Si1 and the second signal Si2 to the input terminal 420. As a result, the relationship among the first signal Si1, the second signal Si2, and the voltage V1 at the input terminal 420 is as shown in the table in FIG. 6. That is, the voltage V1 at the input terminal 420 becomes the H level only when both the first signal Si1 and the second signal Si2 are at the H level. If at least one of the first signal Si1 and the second signal Si2 is at the L level, the voltage V1 at the input terminal 420 becomes the L level.

[0049] According to this configuration, when the second signal Si2 is at the L level, the correction circuit 43 can set the voltage V1 at the input terminal 420 to the L level regardless of the state of the first signal Si1. That is, in this embodiment, the correction circuit 43 sets the voltage V1 at the input terminal 420 to a specific value according to the second signal Si2, and the specific value is, for example, the L level. As a result, there is an advantage that it is less likely for the device (paper feeding unit 14) to malfunction due to the input terminal 420 of the signal output unit 42 becoming high impedance.

[0050] FIG. 7 shows a specific example of the control device 17 and the signal transmission circuit 3 according to this embodiment.

[0051] That is, the CPU as the signal generation unit 41 has a "PF_CS terminal" as the output terminal 410 for outputting the first signal Si1 (PF_CS signal) and a reset terminal 411 for inputting the second signal Si2 (reset signal). The CPU as the signal generation unit 41 operates with a power supply voltage (3.3V as an example) applied from the constant voltage source Vcc1.

[0052] The signal output unit 42 includes resistors R1 to R6, transistors Tr1, Tr2, Tr3, a first output terminal 421 that outputs a first PF selection signal Si11, and a second output terminal 422 that outputs a second PF selection signal Si12. The transistor Tr1 is a pnp bipolar transistor. The transistors Tr2 and Tr3 are npn bipolar transistors.

[0053] The resistors R1, R2, R3, and R4 are electrically connected in series between the constant voltage source Vcc2 and the circuit ground. The emitter of the transistor Tr1 is connected to the constant voltage source Vcc2, and the emitter of the transistor Tr2 is connected to the circuit ground. The resistor R1 is electrically connected between the base and emitter of the transistor Tr1. The resistor R4 is electrically connected between the base and emitter of the transistor Tr2. The connection point between the resistor R2 and the resistor R3 constitutes the input terminal 420. In other words, the resistor R2 is electrically connected between the base of the transistor Tr1 and the input terminal 420, and the resistor R3 is electrically connected between the base of the transistor Tr2 and the input terminal 420.

[0054] The resistors R5 and R6 are electrically connected in series between the collector of the transistor Tr1 and the circuit ground. The emitter of the transistor Tr3 is connected to the circuit ground. The resistor R6 is electrically connected between the base and emitter of the transistor Tr3. The resistor R5 is electrically connected between the collector of the transistor Tr1 and the base of the transistor Tr3.

[0055] The first output terminal 421 is electrically connected to the collector of the transistor Tr3. The second output terminal 422 is electrically connected to the collector of the transistor Tr2. Further, the first output terminal 421 and the second output terminal 422 are electrically connected to the constant voltage source Vcc4 of the signal transmission circuit 3.

[0056] The signal transmission circuit 3 includes a buffer 31. The buffer 31 is electrically connected to a first output terminal 421 and a second output terminal 422. As a result, a first PF selection signal Si11 and a second PF selection signal Si12 are input to the buffer 31 from the first output terminal 421 and the second output terminal 422.

[0057] With such a configuration, as shown in FIG. 5, when the input terminal 420 (INPUT) is at the H level, the signal output unit 42 sets the first PF selection signal Si11 to the H level and the second PF selection signal Si12 to the L level. Also, when the input terminal 420 is at the L level, the signal output unit 42 sets the first PF selection signal Si11 to the L level and the second PF selection signal Si12 to the H level.

[0058] On the other hand, when the input terminal 420 becomes high impedance (Hi-Z), a current flows through the series circuit of resistors R1, R2, R3, R4, and transistors Tr1 and Tr2 are turned on by the voltage (across resistors R1 and R4) divided by the resistors R1, R2, R3, R4. At this time, a current also flows through the series circuit of resistors R5 and R6, and transistor Tr3 is turned on by the voltage (across resistor R6) divided by the resistors R5 and R6. Therefore, when the input terminal 420 becomes high impedance, both the first PF selection signal Si11 and the second PF selection signal Si12 become the L level, which may lead to malfunction of the device (paper feeding unit 14).

[0059] As shown in FIG. 7, the correction circuit 43 includes a constant voltage source Vcc3, a resistor R7, and a logical product circuit 431. The constant voltage source Vcc3 is electrically connected to the input terminal 420 via the resistor R7. In this embodiment, it is assumed that the constant voltage sources Vcc1, Vcc2, Vcc3, and Vcc4 are power supplies with a constant voltage (for example, 3.3V) supplied from a single power supply circuit.

[0060] The logical product circuit 431 includes a pair of diodes D1 and D2. Therefore, the correction circuit 43 can be implemented with a relatively simple configuration.

[0061] Specifically, the anodes of a pair of diodes D1 and D2 are electrically connected to the input terminal 420 of the signal output unit 42. The cathode of diode D1 is electrically connected to the output terminal 410 of the signal generation unit 41. The cathode of diode D2 is electrically connected to the reset terminal 411 of the signal generation unit 41.

[0062] As a result, the correction circuit 43 outputs a high-level voltage V1 to the input terminal 420 only when both the first signal Si1 and the second signal Si2 are at the high level, and outputs a low-level voltage V1 to the input terminal 420 if at least one of the first signal Si1 and the second signal Si2 is at the low level.

[0063] FIG. 8 is a timing chart showing an operation example of the control device 17 having the configuration described above. In FIG. 8, the horizontal axis is the time axis, and in order from the top, the power supply voltage (Vcc1) of the signal generation unit 41, the second signal Si2 (reset signal), the first signal Si1, the voltage V1 at the input terminal 420, the first PF selection signal Si11, and the second PF selection signal Si12 are schematically shown.

[0064] As shown in FIG. 8, during the reset period from the time point t1 when the power is turned on to the time point t2, the second signal Si2 (reset signal) becomes low level, so that the signal generation unit 41 performs a reset operation. Therefore, during this reset period, the output terminal 410 of the signal generation unit 41 becomes high impedance, and the first signal Si1 output from the output terminal 410 becomes an unstable state (shown by a two-dot chain line in FIG. 8).

[0065] However, during the reset period, since the second signal Si2 (reset signal) becomes low level, the correction circuit 43 sets the voltage V1 at the input terminal 420 to a specific value (low level). Therefore, during the reset period (t1 - t2), the first PF selection signal Si11 becomes low level, and the second PF selection signal Si12 becomes high level.

[0066] After time t2 when the reset operation is completed, the signal generation unit 41 can cause the signal output unit 42 to output arbitrary control signals (first PF selection signal Si11 and second PF selection signal Si12) by the first signal Si1.

[0067] [3] Comparative Example Even in a configuration (comparative example) where the power supplies (constant voltage sources Vcc1, Vcc4) of the signal generation unit 41 and the second substrate 22 and the power supply (constant voltage source Vcc2) of the signal output unit 42 are separated instead of the correction circuit 43 described above, malfunction of the device (paper feeding unit 14) can be made less likely to occur.

[0068] That is, during the reset operation (reset period) of the signal generation unit 41, by stopping the power supply from the constant voltage source Vcc2 to the signal output unit 42, even if the input terminal 420 becomes high impedance, both the first PF selection signal Si11 and the second PF selection signal Si12 can be set to the H level. This can make it less likely for the device (paper feeding unit 14) to malfunction due to the input terminal 420 becoming high impedance.

[0069] On the other hand, the image processing apparatus 10 according to the present embodiment includes the correction circuit 43, so that the input terminal 420 is prevented from becoming high impedance in the first place. Therefore, even when the power supplies (constant voltage sources Vcc1, Vcc4) of the signal generation unit 41 and the second substrate 22 and the power supply (constant voltage source Vcc2) of the signal output unit 42 are combined, malfunction of the device (paper feeding unit 14) can be made less likely to occur. Therefore, the image processing apparatus 10 according to the present embodiment has the advantage that the number of terminals of the signal generation unit 41 can be reduced and the power supply control circuit can also be omitted (or simplified) compared to the comparative example.

[0070] [4] Modification Example A plurality of components included in the image processing apparatus 10 may be provided distributed in a plurality of housings.

[0071] Also, the control signals output by the control device 17 are not limited to the PF selection signal and the clock signal.

[0072] Further, the device controlled by the control signal is not limited to the paper feeding unit 14.

[0073] Further, it is not essential for the image forming apparatus 10 to include the first substrate 21 as the transmission source of the control signal and the second substrate 22 as the transmission destination of the control signal. For example, the transmission source and the transmission destination of the control signal may be configured on the same substrate.

[0074] Further, the specific configuration of the signal transmission circuit 3 is not limited to the configuration shown in FIG. 7, and can be appropriately changed as long as the same function can be realized.

[0075] 〔Supplementary Note of the Invention〕 Hereinafter, a summary of the invention extracted from the above-described embodiments will be appended. Note that each configuration and each processing function described in the following supplementary notes can be arbitrarily combined by selection.

[0076] <Supplementary Note 1> A signal generation unit that outputs a first signal from an output terminal; A signal output unit that has an input terminal to which the first signal is input and outputs a control signal corresponding to the first signal; A correction circuit that is inserted between the output terminal of the signal generation unit and the input terminal of the signal output unit and sets the voltage of the input terminal to a specific value according to a second signal from the outside. A control device.

[0077] <Supplementary Note 2> The second signal is a reset signal that is input to the signal generation unit to reset the signal generation unit. The control device according to Supplementary Note 1.

[0078] <Supplementary Note 3> The correction circuit has a logical product circuit that outputs a logical product of the first signal and the second signal to the input terminal. The control device according to Supplementary Note 1 or 2.

[0079] <Supplementary Note 4> The logical product circuit includes a pair of diodes. The control device described in Supplementary Note 3.

[0080] <Supplementary Note 5> The control device according to any one of Supplementary Notes 1 to 4, and a main body having an image processing function. An image processing apparatus.

Explanation of Signs

[0081] 10 Image processing apparatus 17 Control device 41 Signal generation unit 42 Signal output unit 43 Correction circuit 101 Main body 410 Output terminal 420 Input terminal 431 AND circuit D1, D2 Diodes Si1 First signal Si2 Second signal Si11 First PF selection signal (control signal) Si12 Second PF selection signal (control signal) V1 Voltage (at the input terminal)

Claims

1. A signal generation unit that outputs a first signal from an output terminal; A signal output unit having an input terminal to which the first signal is input and outputting a control signal according to the first signal; A correction circuit inserted between the output terminal of the signal generation unit and the input terminal of the signal output unit, and setting the voltage of the input terminal to a specific value according to a second signal from the outside. A control device comprising: A control device.

2. The second signal is a reset signal that is input to the signal generation unit to reset the signal generation unit. The control device according to Claim 1. The control device according to Claim 1.

3. The correction circuit has a logical product circuit that outputs a logical product of the first signal and the second signal to the input terminal. The control device according to Claim 1 or 2. The control device according to Claim 1 or 2.

4. The logical product circuit includes a pair of diodes. The control device according to Claim 3. The control device according to Claim 3.

5. The control device according to Claim 1 or 2; A main body having an image processing function. An image processing apparatus comprising: An image processing apparatus.

Images