Quantum device and control method thereof

Abstract

To provide a quantum device capable of manipulating Majorana particles and a control method for the quantum device.SOLUTION: A quantum device includes a high-order topological insulator layer, a superconductor layer, and a plurality of piezoelectric elements, and the high-order topological insulator layer has a first surface and a second surface that are parallel to each other, a third surface that intersects with the second surface and is located closer to the first surface than the second surface, and a fourth surface that intersects with the third surface and is parallel to the first and second surfaces, the superconductor layer is formed on an intersection line between a plane including the third surface and the first surface, and the plurality of piezoelectric elements is arranged to apply stress to the high-order topological insulator layer that includes a component in a direction perpendicular to the intersection line. The quantum device can be used, for example, for quantum computing.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present disclosure relates to a quantum device and a method for controlling a quantum device.

Background Art

[0002] Research has been conducted on a quantum computing device using Majorana particles. As a structure for generating Majorana particles, a structure combining a two-dimensional topological insulator and an s-wave superconductor has been proposed. In addition, for controlling a quantum device including a two-dimensional topological insulator and an s-wave superconductor, a method of operating Majorana particles using a magnetic field has been proposed.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 3

Patent Document 4

Patent Document 5

Patent Document 6

Non-Patent Documents

[0004]

Non-Patent Document 1

Non-Patent Document 2

Non-Patent Document 3

Summary of the Invention

Problems to be Solved by the Invention

[0005] When a magnetic field is used during the operation of Majorana particles, the superconducting state of an s-wave superconductor can change. Also, the magnetic field may affect resonators and the like used for reading the state of Majorana particles.

[0006] An object of the present disclosure is to provide a quantum device capable of operating Majorana particles and a method for controlling the quantum device.

Means for Solving the Problems

[0007] According to one aspect of the present disclosure, there is provided a quantum device having a higher-order topological insulator layer, a superconductor layer, and a plurality of piezoelectric elements, wherein the higher-order topological insulator layer has a first surface and a second surface parallel to each other, a third surface intersecting the second surface and located on the first surface side of the second surface, and a fourth surface intersecting the third surface and parallel to the first surface and the second surface, the superconductor layer is formed on the intersection line between the plane including the third surface and the first surface, and the plurality of piezoelectric elements are arranged to apply a stress including a component in a direction orthogonal to the intersection line to the higher-order topological insulator layer.

Effects of the Invention

[0008] According to the present disclosure, Majorana particles can be operated using piezoelectric elements.

Brief Description of the Drawings

[0009]

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DETAILED DESCRIPTION OF THE INVENTION

[0010] Hereinafter, embodiments of the present disclosure will be specifically described with reference to the accompanying drawings. In this specification and the drawings, components having substantially the same functional configuration may be denoted by the same reference numerals, and redundant descriptions may be omitted. In the present disclosure, the X1-X2 direction, the Y1-Y2 direction, and the Z1-Z2 direction are orthogonal to each other. A plane including the X1-X2 direction and the Y1-Y2 direction is referred to as an XY plane, a plane including the Y1-Y2 direction and the Z1-Z2 direction is referred to as a YZ plane, and a plane including the Z1-Z2 direction and the X1-X2 direction is referred to as a ZX plane. For convenience, the Z1-Z2 direction is defined as the vertical direction, the Z1 side is the upper side, and the Z2 side is the lower side. In addition, a plan view means viewing an object from the Z1 side, and a planar shape means the shape of an object viewed from the Z1 side.

[0011] (First Embodiment) The first embodiment will be described. The first embodiment relates to a quantum device. FIG. 1 is a perspective view showing a quantum device according to the first embodiment. FIG. 2 is a perspective view showing a higher-order topological insulator layer in the first embodiment.

[0012] The quantum device 1 according to the first embodiment includes a higher-order topological insulator layer 100, a superconductor layer 200, piezoelectric elements 310, 320, and 330, and power supplies 410, 420, and 430. The quantum device 1 further includes electrodes 411, 412, 421, 422, 431, and 432.

[0013] The higher-order topological insulator layer 100 has a first surface 111, a second surface 112, and a fourth surface 114 parallel to the XY plane, a third surface 113, a fifth surface 115, and a sixth surface 116 parallel to the YZ plane, and a seventh surface 117 and an eighth surface 118 parallel to the ZX plane. The higher-order topological insulator layer 100 is a multilayer WTe2 (tungsten ditelluride) layer. The a-axis of WTe2 is parallel to the Y1-Y2 direction, the b-axis is parallel to the X1-X2 direction, and the c-axis is parallel to the Z1-Z2 direction. Here, the a-axis, b-axis, and c-axis are defined as shown in FIG. 1(a) of Non-Patent Document 2.

[0014] The shapes of the first surface 111, the second surface 112, and the fourth surface 114 are rectangles having two sides parallel to the X1-X2 direction and two sides parallel to the Y1-Y2 direction. The side on the X2 side of the first surface 111 and the side on the X2 side of the second surface 112 are at the same position in the X1-X2 direction. The side on the Y1 side of the first surface 111 and the side on the Y1 side of the second surface 112 are at the same position in the Y1-Y2 direction, and the side on the Y2 side of the first surface 111 and the side on the Y2 side of the second surface 112 are at the same position in the Y1-Y2 direction. The side on the X1 side of the first surface 111 and the side on the X1 side of the fourth surface 114 are at the same position in the X1-X2 direction. The side on the Y1 side of the first surface 111 and the side on the Y1 side of the fourth surface 114 are at the same position in the Y1-Y2 direction, and the side on the Y2 side of the first surface 111 and the side on the Y2 side of the fourth surface 114 are at the same position in the Y1-Y2 direction. The side on the X1 side of the second surface 112 and the side on the X2 side of the fourth surface 114 are at the same position in the X1-X2 direction. In the Z1-Z2 direction, the fourth surface 114 is closer to the first surface 111 than to the second surface 112, and closer to the second surface 112 than to the first surface 111. That is, the fourth surface 114 is located closer to the first surface 111 side than the second surface 112.

[0015] The shapes of the third surface 113, the fifth surface 115, and the sixth surface 116 are rectangles having two sides parallel to the Y1-Y2 direction and two sides parallel to the Z1-Z2 direction. The third surface 113 intersects the second surface 112 and the fourth surface 114. The third surface 113 intersects the second surface 112 and the fourth surface 114, for example, at right angles. The fifth surface 115 intersects the first surface 111 and the second surface 112. The fifth surface 115 intersects the first surface 111 and the second surface 112, for example, at right angles. The sixth surface 116 intersects the first surface 111 and the fourth surface 114. The sixth surface 116 intersects the first surface 111 and the fourth surface 114, for example, at right angles.

[0016] The shapes of the seventh surface 117 and the eighth surface 118 are hexagons each having three sides parallel to the Z1-Z2 direction and three sides parallel to the X1-X2 direction. Both the seventh surface 117 and the eighth surface 118 intersect with the first surface 111, the second surface 112, the third surface 113, the fourth surface 114, the fifth surface 115, and the sixth surface 116. Both the seventh surface 117 and the eighth surface 118 intersect with the first surface 111, the second surface 112, the third surface 113, the fourth surface 114, the fifth surface 115, and the sixth surface 116, for example, at right angles. The seventh surface 117 is on the Y1 side of the eighth surface 118.

[0017] Thus, the higher-order topological insulator layer 100 has a three-dimensional shape in which steps are formed in a rectangular parallelepiped. In the higher-order topological insulator layer 100, one-dimensional conduction channels are generated in the sides 121, 122, and 123 shown in FIG. 2. That is, one-dimensional conduction channels are generated in the side 121 corresponding to the intersection line between the first surface 111 and the fifth surface 115, the side 122 corresponding to the intersection line between the fourth surface 114 and the sixth surface 116, and the side 123 corresponding to the intersection line between the second surface 112 and the third surface 113. Furthermore, in the higher-order topological insulator layer 100, a one-dimensional conduction channel is also generated in the intersection line 124 between the plane including the third surface 113 and the first surface 111.

[0018] Note that it has been confirmed by the inventor of the present application that the one-dimensional conduction channel appearing in the intersection line 124 disappears depending on the state of the higher-order topological insulator layer 100, and instead, a one-dimensional conduction channel is generated in the side 125 corresponding to the intersection line between the third surface 113 and the fourth surface 114 (Non-Patent Document 3). According to Non-Patent Document 3, by increasing the ease of electron movement (Hopping Strength) in the X1-X2 direction of the higher-order topological insulator layer 100, the one-dimensional conduction channel appearing in the intersection line 124 can be eliminated, and a one-dimensional conduction channel can be generated in the side 125.

[0019] The inventor of the present application considered applying the principle disclosed in Non-Patent Document 3 to an electronic device, and came up with the idea of shifting the inter-lattice distance by applying stress in the X1-X2 direction of the higher-order topological insulator layer 100, and thereby controlling the ease of electron movement to eliminate the one-dimensional conductive channel that appeared at the intersection line 124. More specifically, when compressive stress is applied in the X1-X2 direction of the higher-order topological insulator layer 100, the inter-lattice distance in the X1-X2 direction becomes shorter, and the ease of electron movement increases. As a result, the one-dimensional conductive channel in the portion where the compressive stress is applied can be eliminated, and as will be described later, the control of Majorana particles generated at the one-dimensional conductive channel ends can be performed.

[0020] The superconductor layer 200 is provided so as to be in contact with the first surface 111. The shape of the superconductor layer 200 is, for example, a rectangular parallelepiped having two planes parallel to the XY plane, two planes parallel to the YZ plane, and two planes parallel to the ZX plane, with the Y1-Y2 direction as the longitudinal direction and the X1-X2 direction as the short-side direction. In plan view, the plane parallel to the YZ plane on the X1 side of the superconductor layer 200 may be on the X2 side of the sixth surface 116 of the higher-order topological insulator layer 100, and the plane parallel to the YZ plane on the X2 side of the superconductor layer 200 may be on the X1 side of the fifth surface 115 of the higher-order topological insulator layer 100. Also, in plan view, the plane parallel to the ZX plane on the Y1 side of the superconductor layer 200 and the seventh surface 117 of the higher-order topological insulator layer 100 may be at the same position in the Y1-Y2 direction, and the plane parallel to the ZX plane on the Y2 side of the superconductor layer 200 and the eighth surface 118 of the higher-order topological insulator layer 100 may be at the same position in the Y1-Y2 direction. The superconductor layer 200 is close to the intersection line 124. That is, the intersection line 124 is within the range affected by the proximity effect of the superconductor layer 200. In other words, the superconductor layer 200 is formed on the intersection line 124 between the plane including the third surface 113 and the first surface 111. The superconductor layer 200 is, for example, an aluminum (Al) layer or a niobium (Nb) layer.

[0021] The piezoelectric elements 310, 320, and 330 are arranged in the Y1 - Y2 direction. The piezoelectric element 320 is on the Y1 side of the piezoelectric element 310, and the piezoelectric element 330 is on the Y1 side of the piezoelectric element 320. The piezoelectric elements 310, 320, and 330 are all in contact with the second surface 112, the third surface 113, and the fourth surface 114 of the higher-order topological insulator layer 100. The piezoelectric elements 310, 320, and 330 are all bonded to the second surface 112, the third surface 113, and the fourth surface 114 of the higher-order topological insulator layer 100. When the piezoelectric elements 310, 320, and 330 are deformed in the X1 - X2 direction, a stress in the X1 - X2 direction acts on the higher-order topological insulator layer 100. For example, when the piezoelectric elements 310, 320, and 330 contract in the X1 - X2 direction, a compressive stress in the X1 - X2 direction acts on the higher-order topological insulator layer 100. That is, the piezoelectric elements 310, 320, and 330 are arranged so as to apply a stress including a component in a direction orthogonal to the intersection line 124 to the higher-order topological insulator layer 100. The piezoelectric elements 310, 320, and 330 contain Pb(Mg 1 / 3 Nb 2 / 3 )O3 - PbTiO3. The piezoelectric elements 310, 320, and 330 may be composed of Pb(Mg 1 / 3 Nb 2 / 3 )O3 - PbTiO3.

[0022] The electrodes 411 and 412 are attached to the piezoelectric element 310. The electrode 411 is on the X1 side of the electrode 412. In a plan view, the electrode 411 is on the X1 side of the sixth surface 116 of the higher-order topological insulator layer 100, and the electrode 412 is on the X2 side of the seventh surface 117 of the higher-order topological insulator layer 100.

[0023] The electrodes 421 and 422 are attached to the piezoelectric element 320. The electrode 421 is on the X1 side of the electrode 422. In a plan view, the electrode 421 is on the X1 side of the sixth surface 116 of the higher-order topological insulator layer 100, and the electrode 422 is on the X2 side of the seventh surface 117 of the higher-order topological insulator layer 100.

[0024] The electrodes 431 and 432 are attached to the piezoelectric element 330. The electrode 431 is on the X1 side of the electrode 432. In a plan view, the electrode 431 is on the X1 side of the sixth surface 116 of the higher-order topological insulator layer 100, and the electrode 432 is on the X2 side of the seventh surface 117 of the higher-order topological insulator layer 100.

[0025] The power supplies 410, 420, and 430 are all, for example, DC power supplies. The power supply 410 is connected between the electrodes 411 and 412, the power supply 420 is connected between the electrodes 421 and 422, and the power supply 430 is connected between the electrodes 431 and 432. A voltage is applied to the piezoelectric element 310 through the electrodes 411 and 412 by the power supply 410, a voltage is applied to the piezoelectric element 320 through the electrodes 421 and 422 by the power supply 420, and a voltage is applied to the piezoelectric element 330 through the electrodes 431 and 432 by the power supply 430. The application of voltage to the piezoelectric element 310 by the power supply 410, the application of voltage to the piezoelectric element 320 by the power supply 420, and the application of voltage to the piezoelectric element 330 by the power supply 430 can be performed independently of each other.

[0026] Next, three states (the first state, the second state, and the third state) of the quantum device 1 according to the first embodiment will be described. The first state is a state in which no voltage is applied by the power supplies 410, 420, and 430. The second state is a state in which voltage is applied by the power supplies 410, 420, and 430. The third state is a state in which voltage is applied by the power supplies 410 and 430, and no voltage is applied by the power supply 420. FIGS. 3 to 5 are diagrams showing the distribution of compressive stress in the X1-X2 direction acting on the higher-order topological insulator layer 100. FIG. 3 shows the distribution of compressive stress in the first state, FIG. 4 shows the distribution of compressive stress in the second state, and FIG. 5 shows the distribution of compressive stress in the third state.

[0027] Figures 6 to 8 are cross-sectional views showing the positions of the one-dimensional conduction channels in the first state. Figure 6 shows the position of the one-dimensional conduction channel in a cross-section including the piezoelectric element 310, Figure 7 shows the position of the one-dimensional conduction channel in a cross-section including the piezoelectric element 320, and Figure 8 shows the position of the one-dimensional conduction channel in a cross-section including the piezoelectric element 330. Figure 9 is a view showing the one-dimensional conduction channel on the intersection line 124 in the first state.

[0028] Figures 10 to 12 are cross-sectional views showing the positions of the one-dimensional conduction channels in the second state. Figure 10 shows the position of the one-dimensional conduction channel in a cross-section including the piezoelectric element 310, Figure 11 shows the position of the one-dimensional conduction channel in a cross-section including the piezoelectric element 320, and Figure 12 shows the position of the one-dimensional conduction channel in a cross-section including the piezoelectric element 330. Figure 13 is a view showing the one-dimensional conduction channel on the intersection line 124 in the second state.

[0029] Figures 14 to 16 are cross-sectional views showing the positions of the one-dimensional conduction channels in the third state. Figure 14 shows the position of the one-dimensional conduction channel in a cross-section including the piezoelectric element 310, Figure 15 shows the position of the one-dimensional conduction channel in a cross-section including the piezoelectric element 320, and Figure 16 shows the position of the one-dimensional conduction channel in a cross-section including the piezoelectric element 330. Figure 17 is a view showing the one-dimensional conduction channel on the intersection line 124 in the third state.

[0030] In the first state, since the voltages are not applied by the power supplies 410, 420, and 430, as shown in Figure 3, no compressive stress from the piezoelectric elements 310, 320, or 330 acts on the higher-order topological insulator layer 100. Therefore, as shown in Figures 6 to 8, the one-dimensional conduction channel 141 is generated on the side 121, the one-dimensional conduction channel 142 is generated on the side 122, the one-dimensional conduction channel 143 is generated on the side 123, and the one-dimensional conduction channel 144 is generated on the intersection line 124. As a result, as shown in Figure 9, the Majorana particles 11 are manifested on the intersection line 124. For example, the Majorana particles 11 are manifested on both sides of the portion overlapping the piezoelectric element 320 in the plan view of the intersection line 124.

[0031] In the second state, since voltages are applied by power supplies 410, 420, and 430, as shown in FIG. 4, compressive stresses from piezoelectric elements 310, 320, and 330 act on the higher-order topological insulator layer 100. Here, let the magnitude of the compressive stress be F0. When the compressive stress acts, as shown in FIGS. 10 to 12, the one-dimensional conduction channel 144 is generated not at the intersection line 124 but at the side 125 corresponding to the intersection line between the third surface 113 and the fourth surface 114. As a result, as shown in FIG. 13, Majorana particles are not manifested on the first surface 111.

[0032] In the third state, since voltages are applied by power supplies 410 and 430 and no voltage is applied by power supply 420, as shown in FIG. 5, compressive stresses from piezoelectric elements 310 and 330 act on the higher-order topological insulator layer 100, and no compressive stress from piezoelectric element 320 acts on the higher-order topological insulator layer 100. Since no compressive stress from piezoelectric element 320 acts, as shown in FIG. 15, in the portion overlapping piezoelectric element 320 in plan view, the one-dimensional conduction channel 144 is generated at the intersection line 124. Further, since compressive stresses from piezoelectric elements 310 and 330 act, as shown in FIGS. 14 and 16, in the portions overlapping piezoelectric element 310 and piezoelectric element 330 in plan view, the one-dimensional conduction channel 144 is generated at the side 125. As a result, as shown in FIG. 17, Majorana particles 11 are manifested at the intersection line 124. For example, Majorana particles 11 are manifested on both sides of the portion overlapping piezoelectric element 320 in plan view of the intersection line 124.

[0033] One-dimensional conduction channels are also generated at sides 121, 122, and 123, but the atomic arrangement at sides 121, 122, and 123 is likely to be disordered. On the other hand, since the intersection line 124 is inside the first surface 111, the atomic arrangement on the intersection line 124 is stable. Therefore, according to the first embodiment, stable Majorana particles can be obtained.

[0034] And in the present embodiment, as described above, depending on the magnitudes of the stresses applied from the piezoelectric elements 310, 320, and 330 to the higher-order topological insulator layer 100, the position and length of the one-dimensional conduction channel 144 on the intersection line 124 change. Therefore, by controlling the voltages applied to the piezoelectric elements 310, 320, and 330, operations such as generation, annihilation, and movement of Majorana particles 11 can be performed.

[0035] Note that if the appearance and disappearance of the one-dimensional conduction channel 144 on the intersection line 124 can be controlled, the magnitudes of the stresses applied from the piezoelectric elements 310, 320, and 330 to the higher-order topological insulator layer 100 are not limited. For example, the magnitude F0 of the stress for obtaining a state where the one-dimensional conduction channel 144 has disappeared may be 0.

[0036] Here, the calculation of the one-dimensional conduction channel of WTe2 performed by the inventor of the present application will be described. In this calculation, the Hamiltonian H(k) of Equation (1) is used (see Non-Patent Documents 1 and 2). Here, m1, m2, m3, ν a , ν b , ν c , λ b , λ c , γ x , γ z and β a are parameters specific to the substance, and μi, τi, and σi are 2×2 Pauli matrices.

[0037]

Equation

[0038] Then, as shown in FIG. 18, the Hamiltonian H(k) is made finite-sized to a size where the number of sites in the direction parallel to the b-axis of WTe2 is N b , and the number of sites in the direction parallel to the c-axis is N c by the tight-binding approximation (see Equation 2).

[0039]

Equation

[0040] Next, the matrix H in Equation (2) lattice (k a ) was diagonalized. At this time, the parameters specific to WTe2 are substituted into m1, m2, m3, ν a , ν b , ν c , λ b , λ c , γ x , γ z and β a . In this way, 8×N a ×N b ×N c eigenvalues E n (k a ) and eigenvectors Ψ n (k a ) are obtained for the wave number k

[0041] After that, when the eigenenergy (eigenvalue E n (k a )) is plotted as a function of the wave number k a , the energy dispersion of the entire system is obtained. Also, when the absolute value squared (|Ψ n (k a )∝k a ) of the eigenvector corresponding to the state n where the energy dispersion is linear with respect to the wave number (E n (k a )) is plotted as a contour plot, it becomes clear where the electrons exist in WTe2. 2 The calculation results for the higher-order topological insulator layer 100 are shown in FIGS. 19 and 20. In FIGS. 19 and 20, the brighter the part, the easier it is for electrons to exist. FIG. 19 shows the calculation results in the first state where the energy dispersion is linear with respect to the wave number, and FIG. 20 shows the calculation results in the second state different from the first state where the energy dispersion is linear with respect to the wave number. In this calculation, as shown in FIG. 21, the number of sites N

[0042] corresponding to the distance between the third plane 113 and the fifth plane 115 is 50, and the number of sites N b1 corresponding to the distance between the third plane 113 and the sixth plane 116 is N b2is 50, the number of sites N corresponding to the distance between the first surface 111 and the second surface 112 c1 is 5, the number of sites N corresponding to the distance between the first surface 111 and the fourth surface 114 c2 is set to 2. As shown in FIG. 19, it is clear that electrons tend to exist not only in the portion corresponding to the side 121 and the portion corresponding to the side 122, but also in the portion corresponding to the side 123 and the portion corresponding to the intersection line 124 as shown in FIG. 20. From this calculation result, it can be seen that a one-dimensional conduction channel is generated in the intersection line 124.

[0043] Next, a method for integrating the higher-order topological insulator layer 100 with the piezoelectric elements 310, 320, and 330 will be described.

[0044] First, the higher-order topological insulator layer 100 is fabricated, and the higher-order topological insulator layer 100 is cleaned. In the cleaning of the higher-order topological insulator layer 100, the higher-order topological insulator layer 100 is immersed in an aqueous solution of NaOH (2M) at a temperature of 100° C. for 30 minutes, and then the higher-order topological insulator layer 100 is immersed in pure water.

[0045] Separately, the piezoelectric elements 310, 320, and 330 are fabricated, and the piezoelectric elements 310, 320, and 330 are exposed to O2 plasma for 25 minutes. Then, the piezoelectric elements 310, 320, and 330 are brought close to the higher-order topological insulator layer 100 in pure water, and the piezoelectric elements 310, 320, and 330 are used to lift the higher-order topological insulator layer 100 out of the pure water. Thereafter, the integrated piezoelectric elements 310, 320, and 330 and the higher-order topological insulator layer 100 are dried at 100° C. for 10 minutes.

[0046] In this way, the higher-order topological insulator layer 100 and the piezoelectric elements 310, 320, and 330 are integrated, and the piezoelectric elements 310, 320, and 330 can apply stress to the higher-order topological insulator layer 100.

[0047] (Second Embodiment) The second embodiment will be described. The second embodiment is mainly different from the first embodiment in terms of the number of piezoelectric elements. FIG. 22 is a perspective view showing a quantum device according to the second embodiment.

[0048] The quantum device 2 according to the second embodiment includes a higher-order topological insulator layer 100, a superconductor layer 200, piezoelectric elements 310, 320, 330, 340, 350, 360, 370, 380, and 390, and power supplies 410, 420, 430, 440, 450, 460, 470, 480, and 490. The quantum device 2 further includes electrodes 411, 412, 421, 422, 431, 432, 441, 442, 451, 452, 461, 462, 471, 472, 481, 482, 491, and 492.

[0049] The higher-order topological insulator layer 100 and the superconductor layer 200 have the same configuration as in the first embodiment.

[0050] Piezoelectric elements 310, 320, 330, 340, 350, 360, 370, 380, and 390 are arranged in the Y1 - Y2 direction. The piezoelectric element 320 is on the Y1 side of the piezoelectric element 310, the piezoelectric element 330 is on the Y1 side of the piezoelectric element 320, and the piezoelectric element 340 is on the Y1 side of the piezoelectric element 330. The piezoelectric element 350 is on the Y1 side of the piezoelectric element 340, the piezoelectric element 360 is on the Y1 side of the piezoelectric element 350, and the piezoelectric element 370 is on the Y1 side of the piezoelectric element 360. The piezoelectric element 380 is on the Y1 side of the piezoelectric element 370, and the piezoelectric element 390 is on the Y1 side of the piezoelectric element 380. All of the piezoelectric elements 310, 320, 330, 340, 350, 360, 370, 380, and 390 are in contact with the second surface 112, the third surface 113, and the fourth surface 114 of the higher-order topological insulator layer 100. All of the piezoelectric elements 310, 320, 330, 340, 350, 360, 370, 380, and 390 are bonded to the second surface 112, the third surface 113, and the fourth surface 114 of the higher-order topological insulator layer 100. When the piezoelectric elements 310, 320, 330, 340, 350, 360, 370, 380, and 390 deform in the X1 - X2 direction, a stress in the X1 - X2 direction acts on the higher-order topological insulator layer 100. For example, when the piezoelectric elements 310, 320, 330, 340, 350, 360, 370, 380, and 390 contract in the X1 - X2 direction, a compressive stress in the X1 - X2 direction acts on the higher-order topological insulator layer 100. That is, the piezoelectric elements 310, 320, 330, 340, 350, 360, 370, 380, and 390 are arranged so as to apply a stress including a component in a direction orthogonal to the intersection line 124 to the higher-order topological insulator layer 100. The piezoelectric elements 310, 320, 330, 340, 350, 360, 370, 380, and 390 contain Pb(Mg 1 / 3 Nb 2 / 3 )O3 - PbTiO3. The piezoelectric elements 310, 320, 330, 340, 350, 360, 370, 380, and 390 may be composed of Pb(Mg 1 / 3 Nb 2 / 3 )O3 - PbTiO3.

[0051] Similar to the first embodiment, electrodes 411 and 412 are attached to piezoelectric element 310, electrodes 421 and 422 are attached to piezoelectric element 320, and electrodes 431 and 432 are attached to piezoelectric element 310.

[0052] Electrodes 441 and 442 are attached to piezoelectric element 340. Electrode 441 is on the X1 side of electrode 442. In plan view, electrode 441 is on the X1 side of the sixth surface 116 of the higher-order topological insulator layer 100, and electrode 442 is on the X2 side of the seventh surface 117 of the higher-order topological insulator layer 100.

[0053] Electrodes 451 and 452 are attached to piezoelectric element 350. Electrode 451 is on the X1 side of electrode 452. In plan view, electrode 451 is on the X1 side of the sixth surface 116 of the higher-order topological insulator layer 100, and electrode 452 is on the X2 side of the seventh surface 117 of the higher-order topological insulator layer 100.

[0054] Electrodes 461 and 462 are attached to piezoelectric element 360. Electrode 461 is on the X1 side of electrode 462. In plan view, electrode 461 is on the X1 side of the sixth surface 116 of the higher-order topological insulator layer 100, and electrode 462 is on the X2 side of the seventh surface 117 of the higher-order topological insulator layer 100.

[0055] Electrodes 471 and 472 are attached to piezoelectric element 370. Electrode 471 is on the X1 side of electrode 472. In plan view, electrode 471 is on the X1 side of the sixth surface 116 of the higher-order topological insulator layer 100, and electrode 472 is on the X2 side of the seventh surface 117 of the higher-order topological insulator layer 100.

[0056] Electrodes 481 and 482 are attached to piezoelectric element 380. Electrode 481 is on the X1 side of electrode 482. In plan view, electrode 481 is on the X1 side of the sixth surface 116 of the higher-order topological insulator layer 100, and electrode 482 is on the X2 side of the seventh surface 117 of the higher-order topological insulator layer 100.

[0057] The electrodes 491 and 492 are attached to the piezoelectric element 390. The electrode 491 is on the X1 side of the electrode 492. In plan view, the electrode 491 is on the X1 side of the sixth surface 116 of the higher-order topological insulator layer 100, and the electrode 492 is on the X2 side of the seventh surface 117 of the higher-order topological insulator layer 100.

[0058] The power supplies 410, 420, 430, 440, 450, 460, 470, 480 and 490 are all, for example, DC power supplies. Similar to the first embodiment, the power supply 410 is connected between the electrode 411 and the electrode 412, the power supply 420 is connected between the electrode 421 and the electrode 422, and the power supply 430 is connected between the electrode 431 and the electrode 432. The power supply 440 is connected between the electrode 441 and the electrode 442, the power supply 450 is connected between the electrode 451 and the electrode 452, and the power supply 460 is connected between the electrode 461 and the electrode 462. A voltage is applied to the piezoelectric element 340 through the electrodes 441 and 442 by the power supply 440, a voltage is applied to the piezoelectric element 350 through the electrodes 451 and 452 by the power supply 450, and a voltage is applied to the piezoelectric element 360 through the electrodes 461 and 462 by the power supply 460. The power supply 470 is connected between the electrode 471 and the electrode 472, the power supply 480 is connected between the electrode 481 and the electrode 482, and the power supply 490 is connected between the electrode 491 and the electrode 492. A voltage is applied to the piezoelectric element 370 through the electrodes 471 and 472 by the power supply 470, a voltage is applied to the piezoelectric element 380 through the electrodes 481 and 482 by the power supply 480, and a voltage is applied to the piezoelectric element 390 through the electrodes 491 and 492 by the power supply 490. The application of voltage to the piezoelectric element 310 by the power supply 410, the application of voltage to the piezoelectric element 320 by the power supply 420, the application of voltage to the piezoelectric element 330 by the power supply 430, the application of voltage to the piezoelectric element 340 by the power supply 440, the application of voltage to the piezoelectric element 350 by the power supply 450, the application of voltage to the piezoelectric element 360 by the power supply 460, the application of voltage to the piezoelectric element 370 by the power supply 470, the application of voltage to the piezoelectric element 380 by the power supply 480, and the application of voltage to the piezoelectric element 390 by the power supply 490 can be performed independently of each other.

[0059] In the second embodiment, the position and length of the one-dimensional conduction channel on the intersection line 124 change according to the magnitude of the compressive stress applied from the piezoelectric elements 310, 320, 330, 340, 350, 360, 370, 380, and 390 to the higher-order topological insulator layer 100. Therefore, by controlling the voltage applied to the piezoelectric elements 310, 320, 330, 340, 350, 360, 370, 380, and 390, operations such as generation, annihilation, and movement of Majorana particles can be performed.

[0060] Here, as an example of the control method of the quantum device 2 according to the second embodiment, an example of the operation of Majorana particles in the second embodiment will be described.

[0061] In this example, a quantum operation (braiding) corresponding to the route of a NOT gate through the movement and swapping of Majorana particles is performed. FIG. 23 is a schematic diagram showing an overview of an example of a quantum operation. FIGS. 24 to 26 are diagrams showing an example of the transition of the position of Majorana particles.

[0062] In the initial state, no voltage is applied to the piezoelectric elements 320, 330, 370, and 380, and a voltage is applied to the piezoelectric elements 310, 340, 350, 360, and 390. Therefore, as shown in FIG. 24, a compressive stress of magnitude F0 acts on the higher-order topological insulator layer 100 from the piezoelectric elements 310, 340, 350, 360, and 390. Accordingly, on the intersection line 124, one-dimensional conduction channels are generated in portions that overlap the piezoelectric elements 320, 330, 370, and 380 in plan view. For this reason, Majorana particles are manifested at both ends of the portion that overlaps the piezoelectric elements 320 and 330 in plan view, and Majorana particles are manifested at both ends of the portion that overlaps the piezoelectric elements 370 and 380 in plan view. Hereinafter, the Majorana particles manifested on the piezoelectric element 310 side of the portion that overlaps the piezoelectric elements 320 and 330 in plan view are referred to as Majorana particles γ1, and the Majorana particles manifested on the piezoelectric element 340 side are referred to as Majorana particles γ2. Also, the Majorana particles manifested on the piezoelectric element 360 side of the portion that overlaps the piezoelectric elements 370 and 380 in plan view are referred to as Majorana particles γ3, and the Majorana particles manifested on the piezoelectric element 390 side are referred to as Majorana particles γ4. In this example, as shown in FIG. 23, the positions are exchanged between Majorana particle γ2 and Majorana particle γ3.

[0063] After the initial state, no voltage is applied to the piezoelectric elements 320, 330, 340, 360, 370, and 380, and a voltage is applied to the piezoelectric elements 310, 350, and 390. As a result, as shown in FIG. 25, a compressive stress of magnitude F0 acts on the higher-order topological insulator layer 100 from the piezoelectric elements 310, 350, and 390, the distance between Majorana particle γ2 and Majorana particle γ3 becomes smaller, and their positions are interchanged.

[0064] Thereafter, no voltage is applied to the piezoelectric elements 320, 330, 370, and 380, and a voltage is applied to the piezoelectric elements 310, 340, 350, 360, and 390. As a result, as shown in FIG. 26, a compressive stress of magnitude F0 acts on the higher-order topological insulator layer 100 from the piezoelectric elements 310, 340, 350, 360, and 390, and the distance between Majorana particle γ2 and Majorana particle γ3 becomes larger.

[0065] In this way, the positions of Majorana particles γ2 and γ3 can be exchanged. That is, a quantum operation (braiding) corresponding to the route of the NOT gate is performed.

[0066] By using a larger number of piezoelectric elements, Majorana particles can be manipulated more finely, and other quantum operations can also be performed. For example, it is also possible to perform a quantum operation (braiding) corresponding to an Hadamard gate through the movement and swapping of Majorana particles. FIG. 27 is a schematic diagram showing an overview of the quantum operation corresponding to the Hadamard gate. FIGS. 28 to 32 are diagrams showing another example of the transition of the positions of Majorana particles.

[0067] In the initial state, by controlling the voltages applied to the plurality of piezoelectric elements, as shown in FIG. 28, similar to the above example, Majorana particles γ1 and γ2 are expressed at both ends of one one-dimensional conduction channel, and Majorana particles γ3 and γ4 are expressed at both ends of another one-dimensional conduction channel. In the quantum operation corresponding to the Hadamard gate, as shown in FIG. 27, the positions of Majorana particles γ1 and γ3 are exchanged.

[0068] After the initial state, by controlling the voltages applied to the plurality of piezoelectric elements, as shown in FIG. 29, the distance between Majorana particles γ2 and γ3 is reduced to such an extent that the positions of Majorana particles γ2 and γ3 are not swapped.

[0069] Next, by controlling the voltages applied to the plurality of piezoelectric elements, as shown in FIG. 30, the distance between Majorana particles γ1 and γ2 is reduced and the distance between Majorana particles γ2 and γ3 is increased. As a result, the positions of Majorana particles γ1 and γ3 are swapped.

[0070] Thereafter, by controlling the voltages applied to the plurality of piezoelectric elements, as shown in FIG. 31, the distance between Majorana particles γ3 and γ2 is increased.

[0071] Subsequently, by controlling the voltage applied to the plurality of piezoelectric elements, as shown in FIG. 32, the distance between the Majorana particle γ2 and the Majorana particle γ1 is increased.

[0072] In this way, the positions of the Majorana particle γ1 and the Majorana particle γ3 can be exchanged. That is, a quantum operation (braiding) corresponding to a Hadamard gate is performed.

[0073] (Third Embodiment) The third embodiment will be described. The third embodiment relates to a quantum computing device including the quantum device 1 according to the first embodiment. FIG. 33 is a diagram showing the quantum computing device according to the third embodiment.

[0074] As shown in FIG. 23, the quantum computing device 3 according to the third embodiment includes a qubit chip 810, a signal generator 820, a signal demodulator 830, and a cryogenic dilution refrigerator 840. The qubit chip 810 includes the quantum device 1 according to the first embodiment. The quantum device 1 is housed in the cryogenic dilution refrigerator 840 and cooled to a temperature of 10 mK or lower. The signal generator 820 generates a microwave pulse signal, and the microwave pulse signal is input to the qubit chip 810. The qubit chip 810 outputs a signal corresponding to the microwave pulse signal, and the signal demodulator 830 demodulates the signal output from the qubit chip 810. The signal generator 820 and the signal demodulator 830 are used at a temperature of about room temperature, for example.

[0075] Since the quantum computing device 3 according to the third embodiment includes the quantum device 1 according to the first embodiment, Majorana particles can be stably expressed, and stable operations can be performed. In addition, Majorana particles can be manipulated without using a magnetic field.

[0076] In the third embodiment, the quantum device 2 according to the second embodiment may be used instead of the quantum device 1 according to the first embodiment.

[0077] The material of the higher-order topological insulator layer 100 is not limited to WTe2. For example, the material of the higher-order topological insulator layer 100 may be MoTe2 or Bi. When the higher-order topological insulator layer 100 is a multi-layer MoTe2 layer, it is preferable that the intersection line 124 is parallel to the a-axis of MoTe2. Also, when the higher-order topological insulator layer 100 is a multi-layer Bi layer, it is preferable that the intersection line 124 is parallel to the

[0111] axis of Bi.

[0078] Also, the materials of the piezoelectric elements 310, 320, 330, 340, 350, 360, 370, 380, and 390 are not limited to Pb(Mg 1 / 3 Nb 2 / 3 )O3-PbTiO3.

[0079] The quantum device according to the present disclosure can be used, for example, in quantum computing.

[0080] As described in detail above regarding the preferred embodiments and the like, the present disclosure is not limited to the above-described embodiments and the like, and various modifications and substitutions can be made to the above-described embodiments and the like without departing from the scope described in the claims.

[0081] Hereinafter, aspects of the present disclosure will be summarized and described as appendices.

[0082] (Appendix 1) A higher-order topological insulator layer, A superconductor layer, A plurality of piezoelectric elements, Having, The higher-order topological insulator layer, A first surface and a second surface parallel to each other, A third surface that intersects the second surface and is located on the first surface side of the second surface, A fourth surface that intersects the third surface and is parallel to the first surface and the second surface, Having, The superconductor layer is formed on the intersection line between the plane including the third surface and the first surface, The plurality of piezoelectric elements are arranged to apply stress including a component in a direction orthogonal to the intersection line to the high-order topological insulator layer, and the quantum device is characterized by this. (Appendix 2) The quantum device according to Appendix 1, characterized in that a pair of electrodes is provided for each piezoelectric element. (Appendix 3) The quantum device according to Appendix 1 or 2, characterized in that the third surface intersects the second surface at a right angle. (Appendix 4) The quantum device according to any one of Appendices 1 to 3, characterized in that the fourth surface intersects the third surface at a right angle. (Appendix 5) The quantum device according to any one of Appendices 1 to 4, characterized in that the high-order topological insulator layer includes a multi-layer WTe2 layer or a multi-layer MoTe2 layer. (Appendix 6) The quantum device according to Appendix 5, characterized in that the intersection line between the second surface and the third surface is parallel to the a-axis of WTe2 or MoTe2. (Appendix 7) The quantum device according to any one of Appendices 1 to 4, characterized in that the high-order topological insulator layer includes a multi-layer Bi layer. (Appendix 8) The quantum device according to Appendix 7, characterized in that the intersection line between the second surface and the third surface is parallel to the

[0111] axis of Bi. (Appendix 9) A method for controlling a quantum device having a high-order topological insulator layer, a superconductor layer, and a plurality of piezoelectric elements, wherein the high-order topological insulator layer has a first surface and a second surface parallel to each other, a third surface that intersects the second surface and is located on the first surface side of the second surface, and a fourth surface that intersects the third surface and is parallel to the first surface and the second surface, and has The superconducting layer is formed on the intersection line between the plane including the third surface and the first surface. The plurality of piezoelectric elements are arranged to apply stress including a component in a direction orthogonal to the intersection line to the higher-order topological insulator layer. A method for controlling a quantum device, comprising a step of controlling the length of a one-dimensional conduction channel developed on the intersection line by controlling the stress applied to the higher-order topological insulator layer for the plurality of piezoelectric elements.

Explanation of reference numerals

[0083] 1, 2: Quantum device 3: Quantum computing device 11: Majorana particle 100: Higher-order topological insulator layer 121, 122, 123, 125: Side 124: Intersection line 141, 142, 143, 144: One-dimensional conduction channel 200: Superconducting layer 310, 320, 330, 340, 350, 360, 370, 380, 390: Piezoelectric element 410, 420, 430, 440, 450, 460, 470, 480, 490: Power supply 411, 412, 421, 422, 431, 432, 441, 442, 451, 452, 461, 462, 471, 472, 481, 482, 491, 492: Electrode

Claims

1. A higher-order topological insulator layer, a superconductor layer, and a plurality of piezoelectric elements, wherein the higher-order topological insulator layer has a first surface and a second surface parallel to each other, a third surface intersecting with the second surface and located on the first surface side of the second surface, and a fourth surface intersecting with the third surface and parallel to the first surface and the second surface, wherein the superconductor layer is formed on the intersection line between the plane including the third surface and the first surface, and the plurality of piezoelectric elements are arranged to apply a stress including a component in a direction orthogonal to the intersection line to the higher-order topological insulator layer, and a quantum device characterized in that.

2. The quantum device according to claim 1, wherein a pair of electrodes is provided for each piezoelectric element.

3. The quantum device according to claim 1 or 2, wherein the third surface intersects the second surface at a right angle.

4. The quantum device according to claim 1 or 2, wherein the fourth surface intersects the third surface at a right angle.

5. The high-order topological insulator layer is a multi-layer WTe ２ layer or a multi-layer MoTe ２ layer, and the quantum device according to claim 1 or 2 is characterized by including the same.

6. The intersection line between the second surface and the third surface is WTe ２ or MoTe ２ The quantum device according to claim 5, characterized in that it is parallel to the a-axis of

7. The quantum device according to claim 1 or 2, wherein the higher-order topological insulator layer includes a multilayer Bi layer.

8. The quantum device according to claim 7, wherein the intersection line between the second surface and the third surface is parallel to the [111] axis of Bi.

9. A method for controlling a quantum device having a higher-order topological insulator layer, a superconductor layer, and a plurality of piezoelectric elements, wherein the higher-order topological insulator layer has a first surface and a second surface parallel to each other, a third surface intersecting with the second surface and located on the first surface side of the second surface, and a fourth surface intersecting with the third surface and parallel to the first surface and the second surface, wherein the superconductor layer is formed on the intersection line between the plane including the third surface and the first surface, the plurality of piezoelectric elements are arranged to apply a stress including a component in a direction orthogonal to the intersection line to the higher-order topological insulator layer, and the method for controlling a quantum device is characterized by having a step of controlling the length of a one-dimensional conduction channel developed on the intersection line by controlling the stress applied to the higher-order topological insulator layer for the plurality of piezoelectric elements.

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