Information processing device, system, parameter optimization method, and program thereof

Abstract

To provide an information processing device capable of easily setting more optimized parameters.SOLUTION: A server comprises first control means. The first control means is configured to: perform processing for the initial setting of parameter values related to PCIe, which is an extended bandwidth bus, and causes a parameter optimization method to conduct various tests with the set parameter values; perform processing for setting different parameter values and cause the parameter optimization method to conduct the various tests after the tests with the initially set parameter values; repeatedly change the parameter value settings and conduct the various tests for all the different parameter values; notify a service processor of the results of the various tests with each set parameter value; and hold the received optimum parameters in a non-volatile memory and perform processing for setting the optimum parameters when receiving a parameter value setting instruction from the service processor.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present disclosure relates to an information processing apparatus, a system, a parameter optimization method, and a program therefor.

Background Art

[0002] Performance requirements for I / O (Input / Output) have been improving year by year, and arithmetic units (Processors) for processing I / O and various devices connected via PCIe have also become more high-performance and complex with the formulation of new generations. Here, PCIe (Peripheral Component Interconnect Express) is a wide-bandwidth expansion bus for connecting peripheral devices such as graphics cards, capture cards, and wireless cards, and is a serial interface that enables high-speed data transfer. Usually, connections are made between a Processor and various PCIe devices using parameters automatically adjusted by Link Training, and further by link equalization in the PCIe 3.0 generation and later. Here, link Training and link equalization are processes in which the transmission and reception units are automatically adjusted so that stable data transmission and reception can be performed in a communicable state.

[0003] Regarding the determination of the optimal parameter values of PCIe devices, Cited Document 1 discloses a technique for determining the optimal parameter values of PCIe devices based on the number of bit errors.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In the technology described in Patent Document 1, the optimal values of the parameters of the PCIe device are determined only by the number of bit errors. Therefore, aspects such as performance and heat dissipation are not considered, and there are cases where the optimal Link state cannot be reached. Also, as described above, since the automatic parameter adjustment by link equalization has been performed since the 3.0 generation of PCIe, the number of link equalization phases increases as the generation increases, and it takes time to adjust the optimal Link state and the parameter adjustment is not easy. Therefore, there are cases where problems occur in which the operation is performed in a state where the optimal parameter adjustment has not been achieved.

[0006] An object of the present disclosure is to provide an information processing apparatus, a system, a parameter optimization method, and a program therefor that solve the above-described problems.

Means for Solving the Problems

[0007] An information processing apparatus according to an aspect of the present disclosure performs processing for initial setting of parameter values related to PCIe, which is a high-bandwidth expansion bus, causes various tests to be performed with the set parameter values, and after the various tests with the initially set parameter values, performs processing for setting different parameter values to cause the various tests to be performed, and repeats performing the setting change of the parameter values and the various tests for all different parameter values, notifies the service processor of the results of the various tests with each set parameter value, and when receiving a parameter value setting instruction from the service processor, holds the received optimal parameters in a non-volatile memory and performs processing for setting the optimal parameters, and includes first control means.

[0008] The parameter optimization method according to one aspect of the present disclosure performs processing for initial setting of parameter values related to PCIe, which is a high-bandwidth expansion bus, causes various tests to be performed with the set parameter values, and after the various tests with the initially set parameter values, performs processing for setting different parameter values to cause the various tests to be performed, and repeats performing the setting change of the parameter values and the various tests for all different parameter values, notifies the service processor of the results of the various tests with each set parameter value, and when receiving a parameter value setting instruction from the service processor, holds the received optimal parameters in a non-volatile memory and performs processing for setting the optimal parameters, which is performed by a computer.

[0009] The program for parameter optimization according to one aspect of the present disclosure performs processing for initial setting of parameter values related to PCIe, which is a high-bandwidth expansion bus, causes various tests to be performed with the set parameter values, and after the various tests with the initially set parameter values, performs processing for setting different parameter values to cause the various tests to be performed, and repeats performing the setting change of the parameter values and the various tests for all different parameter values, notifies the service processor of the results of the various tests with each set parameter value, and when receiving a parameter value setting instruction from the service processor, holds the received optimal parameters in a non-volatile memory and performs processing for setting the optimal parameters, which is executed by a computer.

Advantages of the Invention

[0010] According to the above aspect, it becomes easier to set more optimized parameters.

Brief Description of the Drawings

[0011]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Embodiments for Carrying Out the Invention

[0012] Hereinafter, each embodiment will be described with reference to the drawings. In all the drawings, the same or corresponding components are denoted by the same reference numerals, and common descriptions will be omitted. FIG. 1 is a diagram showing the configuration of a server that hosts a PCIe device in an embodiment of the present disclosure. The server (1) includes a CPU (Central Processing Unit) (11), a PCIe Switch (12), one or more PCIe Slots (13), and a non-volatile memory (14). The CPU (11) is a general-purpose processor that executes various processes in the server (1). The PCIe Switch (12) is a switching device that complies with the PCIe standard and transmits data from the CPU (11) to the PCIe device. The PCIe Slot (13) is a slot for connecting a PCIe-connectable peripheral device. The non-volatile memory (14) is a memory for holding parameter values and the like, which will be described later. Note that the server (1) of the present disclosure is a type of information processing device, includes a PCIe Switch (12) and PCIe Slots (13), and will be described as an example of a device that can use a PCIe device. Note that the PCIe device is inserted into the PCIe Slot (13) and used.

[0013] Figure 2 is a diagram showing an example of a system configuration for parameter optimization. The system shown in Figure 2 is configured by a plurality of servers (1) and a service processor (2) used for optimizing parameters for them. The system provides an environment for determining optimal parameter values related to PCIe for a plurality of servers (1) that serve as hosts for PCIe devices. More specifically, the service processor (2) functions as a device that performs processing for optimizing parameter values on the server (1) during the shipping inspection and on-site inspection of the server (1). Also, the service processor (2) has remote management functions such as logging and power control, and a management function for multiple devices.

[0014] Figure 3 is a diagram showing the functions of the server (1) and the service processor (2) shown in Figure 2. The server (1) includes a CPU (11), a PCIe Switch (12), and a PCIe Slot (13), and includes control units (11a, 12a, 13a) for controlling the CPU (11), the PCIe Switch (12), and the PCIe Slot (13). Also, the server (1) includes a non-volatile memory (14). In the storage unit of the non-volatile memory (14), parameter values related to PCIe for the CPU (11), the PCIe Switch (12), and the PCIe device are held. Note that the control units (11a, 12a) are each realized by software for controlling the CPU (11) and the PCIe Switch (12). Also, the control unit (13a) is realized by software for controlling the PCIe device inserted into the PCIe Slot (13).

[0015] The control unit (11a) of the CPU (11) includes a data reception unit and a data transmission unit for communication with the service processor (2), and a data reception unit and a data transmission unit for communication with the PCIe Switch (12) side.

[0016] The data receiving unit for communication with the service processor (2) in the control unit (11a) of the CPU (11) includes an OS control unit and a parameter adjustment unit, and the data transmitting unit for communication with the service processor (2) includes a result notification unit. The OS control unit controls the test OS provided by the server (1) under the instruction from the service processor (2). The parameter adjustment unit performs setting processing of the optimal parameter values sent from the service processor (2). The result notification unit notifies the service processor (2) of the results of various tests for each parameter value composed of a plurality of sets. Note that the control unit (11a) of the CPU (11) is realized as a part of the functions of the test OS.

[0017] The data transmission unit for communication with the PCIe Switch (12) side in the control unit (11a) of the CPU (11) includes a PCIe generation confirmation instruction unit, a parameter designation unit, and a test instruction unit. The data reception unit for communication with the PCIe Switch (12) side includes a PCIe generation reception unit, a performance measurement unit, a sensor confirmation unit, a bit error Link state measurement unit, and a determination unit. Here, the PCIe generation confirmation instruction unit issues an instruction for confirming the generation of the PCIe Switch (12) and the PCIe device. The parameter instruction unit sets the parameter values for the test on the server (1) and designates the parameter values to be set in the PCIe Switch (12) and the PCIe device. The test instruction unit instructs the execution of a predetermined test with the parameter values set for the PCIe Switch (12) and the PCIe device. The PCIe generation reception unit receives information regarding the generation of the PCIe Switch (12) and the PCIe device. The performance measurement unit obtains information regarding the performance measurement of the transfer speed between devices from the test results with the parameter values set on the CPU (11) side and the notification of the test results with the parameter values set received from the PCIe Switch (12). The sensor confirmation unit confirms the test results regarding the temperature and voltage of the PCIe Switch (12) and the PCIe device from the test results with the parameter values set on the CPU (11) side and the notification of the test results with the parameter values set received from the PCIe Switch (12). The bit error Link state measurement unit confirms the bit error rate and the Link state of the PCIe device in the data transmission and reception with the PCIe device from the test results with the parameter values set on the CPU (11) and the notification of the test results with the parameter values set received from the PCIe Switch (12). The determination unit determines the state with the parameter values set based on the measurement results of the performance measurement unit, the sensor confirmation unit, and the bit error Link state measurement unit, that is, the transfer speed between devices, temperature and voltage, bit error rate, and the Link state of the PCIe device.

[0018] Furthermore, the control unit (11a) of the CPU (11) includes a test execution unit. This causes various tests to be performed with parameter values set on the CPU (11) side, and instructs the execution of various tests with parameter values set in the PCIe Switch (12) and the PCIe device.

[0019] The control unit (12a) of the PCIe Switch (12) includes a data reception unit and a data transmission unit for communication with the CPU (11) side, and a data transmission unit and a data reception unit for communication with the PCIe Slot (13) side.

[0020] The PCIe generation detection unit included in the data reception unit for communication with the CPU (11) side in the control unit (12a) of the PCIe Switch (12) performs generation detection of the PCIe Switch (12). The PCIe generation transmission unit of the data transmission unit for communication with the CPU (11) side transmits information regarding the generation detected by the PCIe Switch (12) and information regarding the generation of the PCIe device to the CPU (11) side. Other functions are substantially the same functions except that the communication functions are provided in the control unit (11a) of the CPU (11) and the communication destinations are different.

[0021] The control unit (13a) of the PCIe Slot (13) includes a data reception unit and a data transmission unit for notification to the PCIe Switch (12) side. The data reception unit includes a PCIe generation detection unit, a parameter adjustment unit, and a test execution unit. These functions receive an instruction from the PCIe Switch (12) and cause the PCIe device connected to the PCIe Slot (13) to perform generation detection, parameter adjustment, and test execution. The PCIe generation transmission unit and the result notification unit of the data transmission unit notify the PCIe Switch (12) of the generation information and test results obtained from the PCIe device connected to the PCIe Slot (13).

[0022] The control unit (2a) of the service processor (2) includes a data transmission unit and a data reception unit that communicate with the server (1) side. The data transmission unit includes an OS control unit and a parameter specifying unit. The OS control unit issues an instruction to start the test OS provided in the server (1). The parameter specifying unit notifies the control unit (11a) of the server (1) of the optimal parameter values obtained based on the results of various tests with various parameter values in the server (1). The data reception unit includes a result confirmation unit. The data confirmation unit receives the results of various tests for the various parameter values set in the CPU (11), the PCIe Switch (12), and the PCIe device, and determines the optimal parameter values for the server (1).

[0023] Figure 4 is a diagram showing the operations of the server (1) and the service processor (2) in the system shown in Figure 2. Hereinafter, the operations of the server (1) and the service processor (2) will be described with reference to the figure. In the present disclosure, for setting the optimal parameter values, a test OS for performing various tests and changing parameter values is prepared in the storage unit of the server (1). In recent years, a device driver for controlling a device is often incorporated into the OS. Therefore, in consideration of accessing the PCIe device connected to obtain the optimal parameter values, the test OS is provided with the function of identifying the PCIe device and adjusting the parameters.

[0024] In the following description of the operations, when referring to "xx of the CPU (11)", it means "xx of the functions included in the control unit (11a) for the CPU (11)". Similarly, "xx of the PCIe Switch (12)" and "xx of the PCIe Slot (13)" respectively mean "xx of the functions included in the control unit (12a) for the PCIe Switch (12)" and "xx of the functions included in the control unit (13a) for the PCIe Slot (13)". Also, when referring to "xx of the service processor (2)", it means "xx of the functions included in the control unit (2a) for the service processor (2)".

[0025] The OS control unit of the service processor (2) instructs to start the test OS of the server (1) (S11). The server (1) starts the test OS according to the instruction of the service processor (2) (S21). When the test OS is started, the PCIe generation confirmation instruction unit of the CPU (11) of the server (1) performs PCIe generation confirmation on the PCIe devices connected via the PCIe Switch (12) and the PCIe Slot (13) (S22). When the generation confirmation is completed, the PCIe generation reception unit of the CPU (11) identifies the number of phases of link equalization and the adjustable parameters. As a result of this identification, the parameter adjustment unit, test execution unit, parameter specification unit, and test instruction unit of the CPU (11) cooperate to set the parameter values to be changed so as to perform a plurality of tests while changing the parameters in the link equalization phase for each generation of the PCIe device.

[0026] The parameter specification unit of the CPU (11) instructs to set and change the initial parameter values for the CPU (11) side, the PCIe Switch (12), and the PCIe Slot (13) (S23, S24, S31, S32, S41). At this time, the parameter specification unit of the CPU (11) not only adjusts the PCIe parameter values on the CPU (11) side but also instructs to change the parameter values for the PCIe devices connected to the PCIe Switch (12) and the PCIe Slot (13). Each PCIe device that receives an instruction from the parameter adjustment unit of the PCIe Slot (13) changes the parameter values of its own device.

[0027] When parameter values for the test are set, the test instruction unit of the CPU (11) gives instructions to the test execution unit of the PCIe Switch (12) to execute various tests (S26). This test instruction is also given from the test instruction unit of the CPU (11) to the test execution unit of the PCIe Switch (12) and the test execution unit of the PCIe Slot (13), and through these, the PCIe device is also instructed to execute the test (S26, S34), and various tests are executed by the CPU (11), the PCIe Switch (12), and the PCIe device (S25, S33, S42). Specific test contents include tests that repeatedly reset the PCIe device to confirm the Link state and bit error rate, tests that measure the transmission speed between PCIe devices, and temperature / voltage tests by sensor reading.

[0028] After all the tests are completed, the test results for the set parameters are collected by the result notification units of the PCIe Switch (12) and the PCIe Slot (13), and data discrimination is performed by the discrimination units of the CPU (11) and the PCIe Slot (13) based on the confirmation of the Link state and bit error rate, the measurement of the transmission speed, and the results of the temperature / voltage test. Furthermore, the result notification unit of the CPU (11) notifies those results from the result notification unit of the CPU (11) to the service processor (2) (S27).

[0029] After that, the CPU (11) sets the next parameter values, repeats the process of test execution and result reporting, and repeats until all parameter value changes and various tests for those parameter values are completed (S23~S27, S31~S34, S41~S42).

[0030] When various tests with all parameter values are completed, the result confirmation section of the service processor (2) determines the optimal value of the parameter (S12, S13). At this time, a threshold value for each parameter is established for each PCIe device, and only when all parameters exceed the threshold value is it considered a candidate for the optimal value. When the optimal value is determined, the parameter specifying section of the service processor (2) issues an instruction to set the parameter value to the parameter adjustment section of the server (1) (S14). Upon receiving the parameter value setting instruction, the server (1) retains the parameter value in the storage section on the non-volatile memory (14) (S29). Also, the CPU (11) similarly issues an instruction to set the optimal parameter value to the PCIe Switch (12) and the PCIe device (S29, S36), and the parameters of various devices are retained on the storage section of the non-volatile memory of the PCIe Switch (12) and the PCIe device (S35, S43).

[0031] After that, the service processor (2) issues an instruction to start the normal OS to the server (1) (S15). Also, the instructed server (1) starts the normal OS (S30). After the normal OS is started, when the server (1) starts up, since the parameter values retained on the non-volatile memories of the CPU (11), the PCIe Switch (12), and the PCIe device are read, it can start up automatically with the optimal values.

[0032] Note that in the present disclosure, the server (1) retains on the storage section of the non-volatile memory (14) two data patterns of the parameter values that can be started, namely, the data pattern of the parameter values before adjustment and the data pattern of the parameter values during adjustment, and switches the data pattern for the server (1) to start up according to the instruction of the service processor (2). Thereby, even when the server (1) cannot start up due to a change in the set value of the parameter value, it is possible to switch to the data pattern of the parameter value that can be immediately started up, enabling the server (1) to resume operation.

[0033] As described above, by conducting tests that consider not only the number of bit errors but also performance and heat dissipation from multiple test results, it is possible to perform optimal parameter adjustment and avoid operating in a state where the optimal Link state cannot be achieved. In addition, since the optimal values of the parameters can be determined in advance, link equalization at the time of system startup of the server (1) becomes unnecessary, and the time required for adjusting the optimal Link state is eliminated.

[0034] In addition, a test OS is prepared, and by conducting tests while changing the parameter values of various PCIe devices according to each generation, the optimal values are searched for. The test contents include tests that repeatedly reset PCIe devices to confirm the Link state and bit error rate, tests that measure the transmission speed between PCIe devices, and temperature and voltage tests by sensor reading. The results for each parameter value are determined based on the test results, and the optimal parameters can be searched for from multiple results. Also, since it is possible to obtain the optimal value for each link equalization phase for the parameter values, it is possible to correspond to each generation of PCIe devices.

[0035] FIG. 5 is a diagram showing a configuration example of the server (1) according to an embodiment of the present disclosure. The server (1) includes a first control means (11a). The first control means (11a) performs processing for initial setting of parameter values related to PCIe, which is a bandwidth expansion bus, conducts various tests with the set parameter values, and after the various tests with the initially set parameter values, performs processing for setting different parameter values and conducts the various tests, repeating the above for all different parameter values, notifies the service processor of the results of the various tests with each set parameter value, and when receiving a parameter value setting instruction from the service processor, holds the received optimal parameters in a non-volatile memory and performs processing for setting the optimal parameters.

[0036] FIG. 6 is a block diagram showing an example of the hardware configuration of the server (1) illustrated in FIG. 1. Here, the server (1) includes a CPU (11), a PCIe Switch (12), a PCIe Slot (13), a non-volatile memory (14), and also includes a recording device (15), a RAM (Random Access Memory) (16), and the like. Programs for realizing the functions of the server (1) are recorded in the non-volatile memory (14) and the recording device (15), in addition to the test OS and the normal OS of the server (1). Also, parameter values related to PCIe are held in the non-volatile memory (14). The RAM (16) is used as a working area for temporarily storing data and the like used when the CPU (10) and the like are operating. Further, the server (1) may include an input / output port (16) for connecting input / output devices such as a keyboard, a mouse, and a display device. Note that the non-volatile memory (14) is composed of an EEPROM (Electrically Erasable Programmable Read-Only Memory) or the like, and the recording device (15) is composed of a hard disk, an SSD, or the like, and a computer program for realizing the functions of the server (1) may be updated by these devices. Since the hardware configuration of the service processor (2) is substantially the same as that of the server (1), the description thereof is omitted, but it may not include the PCIe Switch (12) and the PCIe Slot (13).

[0037] As described above, the present disclosure has been described with reference to the embodiments, but the present disclosure is not limited to the above-described embodiments. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present disclosure within the scope of the present disclosure. And each embodiment can be combined with other embodiments as appropriate.

[0038] Some or all of the above embodiments can also be described as follows, but are not limited thereto.

[0039] (Supplementary Note 1) Perform processing for initial setting of parameter values related to PCIe, which is an extended bus with high bandwidth, and cause various tests to be performed with the set parameter values. After each of the various tests with the initially set parameter values, perform processing for setting different parameter values and cause the various tests to be performed. Repeatedly perform the setting change of the parameter values and the various tests for all different parameter values. Notify the service processor of the results of the various tests with each set parameter value. When receiving a parameter value setting instruction from the service processor, hold the received optimal parameter in the non-volatile memory and perform processing for setting the optimal parameter. First control means An information processing apparatus comprising the same.

[0040] (Appendix 2) The first control means holds the parameter value being adjusted in the non-volatile memory while leaving the parameter value before adjustment related to the PCIe. The information processing apparatus according to Appendix 1.

[0041] (Appendix 3) The first control means performs a generation check of the PCIe switch and the PCIe device connected to the PCIe slot to identify adjustable parameters. The information processing apparatus according to Appendix 1 or 2.

[0042] (Appendix 4) The first control means performs processing for changing the parameter values by changing the PCIe parameter values on the CPU side and issuing change instructions for the parameter values for the PCIe switch and the device connected to the PCIe slot. The information processing apparatus according to Appendix 3.

[0043] (Appendix 5) The first control means performs, as the various tests, a test that repeatedly resets a PCIe device for checking the Link state and bit error rate, a test that measures the transmission speed between PCIe devices, and a temperature / voltage test by sensor reading. The information processing apparatus according to any one of Appendices 1 to 4.

[0044] (Appendix 6) An information processing apparatus according to any one of Appendices 1 to 5, instruct the information processing apparatus to start a test OS including the functions of the first control means, determine the optimal parameter value from the results of the various tests with all the different parameter values received from the information processing apparatus, give an instruction to the information processing apparatus to set the determined optimal parameter value, a service processor having second control means, and a system configured to include the above. (Appendix 7) The second control means of the service processor sets, as a candidate for the optimal parameter value, when all the parameter values exceed the threshold value for each parameter value threshold established for each PCIe device. The system according to Appendix 6.

[0045] (Appendix 8) After the second control means of the service processor gives an instruction to the information processing apparatus to set the optimal parameter value, the second control means gives an instruction to the information processing apparatus to start the normal OS. The system according to Appendix 6 or 7.

[0046] (Appendix 11) Perform processing for initial setting of parameter values related to PCIe, which is an extended bus with high bandwidth, and cause various tests to be performed with the set parameter values. After the various tests with the initially set parameter values, perform processing for setting different parameter values and cause the various tests to be performed. Repeating the setting change of the parameter values and performing the various tests for all different parameter values, notifying the service processor of the results of the various tests with each set parameter value, when receiving a parameter value setting instruction from the service processor, retaining the received optimal parameters in a non-volatile memory and performing processing for setting the optimal parameters, A parameter optimization method performed by a computer by executing the above.

[0047] (Appendix 12) Retaining the parameter values during adjustment in the non-volatile memory while leaving the parameter values before adjustment related to the PCIe. The parameter optimization method described in Appendix 11.

[0048] (Appendix 13) Performing generation confirmation of the PCIe switch and the PCIe device connected to the PCIe slot and identifying adjustable parameters. The parameter optimization method described in Appendix 11 or 12.

[0049] (Appendix 14) Performing processing for changing the parameter values by changing the PCIe parameter values on the CPU side and issuing change instructions for the parameter values for the PCIe switch and the device connected to the PCIe slot. The parameter optimization method described in Appendix 13.

[0050] (Appendix 15) As the various tests, repeating tests for resetting the PCIe device for checking the Link state and bit error rate, tests for measuring the transmission speed between PCIe devices, and temperature / voltage tests by sensor reading are performed. The parameter optimization method described in any one of Appendices 11 to 14.

[0051] (Appendix 16) For the information processing apparatus according to any one of Supplementary Notes 1 to 5, instruct the information processing apparatus to start the test OS, judge the optimal parameter value from the results of the various tests with all the different parameter values received from the information processing apparatus, and issue an instruction to set the judged optimal parameter value to the information processing apparatus, A parameter optimization method performed by a computer by executing the above. (Supplementary Note 17) When all the parameter values exceed the threshold value for each parameter value established for each PCIe device, the second control means of the service processor sets it as a candidate for the optimal parameter value. The parameter optimization method according to Supplementary Note 16.

[0052] (Supplementary Note 18) After the second control means of the service processor issues an instruction to set the optimal parameter value to the information processing apparatus, it issues an instruction to start the normal OS to the information processing apparatus. The parameter optimization method according to Supplementary Note 16 or 17.

[0053] (Supplementary Note 21) Perform processing for initial setting of parameter values related to PCIe, which is a high-bandwidth expansion bus, and conduct various tests with the set parameter values. After the various tests with the initially set parameter values, perform processing for setting different parameter values and conduct the various tests. Repeat the setting change of the parameter values and the conduct of the various tests for all different parameter values. Notify the service processor of the results of the various tests with each set parameter value. When receiving a parameter value setting instruction from the service processor, hold the received optimal parameter in the non-volatile memory and perform processing for setting the optimal parameter. A program for parameter optimization that causes a computer to execute.

[0054] (Appendix 22) The non-volatile memory holds the parameter values being adjusted while leaving the parameter values before adjustment related to the PCIe. The program described in Appendix 21.

[0055] (Appendix 23) Perform generation confirmation of the PCIe switch and the PCIe devices connected to the PCIe slots, and identify adjustable parameters. The program described in Appendix 21 or 22.

[0056] (Appendix 24) Perform processing for changing the parameter values by changing the PCIe parameter values on the CPU side and issuing instructions to change the parameter values for the PCIe switch and the devices connected to the PCIe slots. The program described in Appendix 23.

[0057] (Appendix 25) As the various tests, perform tests that repeatedly reset the PCIe devices for checking the Link state and bit error rate, tests for measuring the transmission speed between PCIe devices, and temperature / voltage tests by sensor reading. The program described in any one of Appendices 21 to 24.

[0058] (Appendix 26) For the information processing apparatus described in any one of Claims 1 to 5, Instruct the information processing apparatus to start the test OS, Determine the optimal parameter values from the results of the various tests with all the different parameter values received from the information processing apparatus, Issue an instruction to set the determined optimal parameter values to the information processing apparatus. A program for parameter optimization that causes a computer to execute. (Appendix 27) The second control means of the service processor sets, for each threshold value of each parameter value formulated for each PCIe device, a candidate for the optimal parameter value when all the parameter values exceed the threshold value. The program according to Appendix 26.

[0059] (Appendix 28) After the second control means of the service processor issues an instruction to set the optimal parameter value to the information processing apparatus, the second control means issues an instruction to start the normal OS to the information processing apparatus. The program according to Appendix 26 or 27.

Explanation of Signs

[0060] 1 Server 2 Service Processor 2a, 11a, 12a, 13a Control Unit 11 CPU 12 PCIe Switch 13 PCIe Slot 14 Non-Volatile Memory

Claims

1. Perform processing for initial setting of parameter values related to PCIe, which is a high-bandwidth expansion bus, and conduct various tests with the set parameter values. After the various tests with the initially set parameter values, perform processing for setting different parameter values and conduct the various tests. Repeat the setting change of the parameter values and the various tests for all different parameter values. Notify the service processor of the results of the various tests with each set parameter value. When receiving a parameter value setting instruction from the service processor, hold the received optimal parameter in the non-volatile memory and perform processing for setting the optimal parameter. First control means An information processing apparatus comprising the same.

2. The first control means holds the parameter value being adjusted in the non-volatile memory while leaving the parameter value before adjustment related to the PCIe. The information processing apparatus according to Claim 1.

3. The first control means performs generation confirmation of the PCIe switch and the PCIe device connected to the PCIe slot, and identifies adjustable parameters. The information processing apparatus according to Claim 1.

4. The first control means performs processing for changing the parameter value by changing the PCIe parameter value on the CPU side and issuing change instructions for the parameter value for the PCIe switch and the parameter value for the device connected to the PCIe slot. The information processing apparatus according to Claim 3.

5. As the various tests, the first control means causes to perform tests that repeatedly reset the PCIe device for checking the Link state and bit error rate, tests for measuring the transmission speed between PCIe devices, and temperature / voltage tests by sensor reading. The information processing apparatus according to Claim 1.

6. An information processing apparatus according to any one of Claims 1 to 5, instruct the information processing apparatus to start a test OS including the function of the first control means, judge the optimal parameter value from the results of the various tests with all the different parameter values received from the information processing apparatus, and issue a setting instruction for the judged optimal parameter value to the information processing apparatus. A service processor provided with second control means, A system configured by the above.

7. The second control means of the service processor sets, as candidates for the optimal parameter values, all parameter values that exceed the threshold value of each parameter value determined for each PCIe device. The system according to claim 6.

8. After the second control means of the service processor gives an instruction to set the optimal parameter values to the information processing apparatus, the second control means gives an instruction to start the normal OS to the information processing apparatus. The system according to claim 6.

9. Perform processing for initial setting of parameter values related to PCIe, which is an extended bus with high bandwidth, and conduct various tests with the set parameter values. After the various tests with the initially set parameter values, perform processing for setting different parameter values and conduct the various tests. Repeatedly perform the setting change of the parameter values and the various tests for all different parameter values. Notify the service processor of the results of the various tests with each set parameter value. When receiving a parameter value setting instruction from the service processor, hold the received optimal parameters in a non-volatile memory and perform processing for setting the optimal parameters. A parameter optimization method performed by a computer by executing the above.

10. Perform processing for initial setting of parameter values related to PCIe, which is an extended bus with high bandwidth, and conduct various tests with the set parameter values. After the various tests with the initially set parameter values, perform processing for setting different parameter values and conduct the various tests. Repeatedly perform the setting change of the parameter values and the various tests for all different parameter values. Notify the service processor of the results of the various tests with each set parameter value. When receiving a parameter value setting instruction from the service processor, hold the received optimal parameters in a non-volatile memory and perform processing for setting the optimal parameters. A program for parameter optimization that causes a computer to execute the above.

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