Semiconductor device

Abstract

To provide a semiconductor device capable of obtaining stable characteristics.SOLUTION: According to one embodiment, a semiconductor device includes first to third electrodes, first and second semiconductor regions, and a first member. The first semiconductor region includes Alx1Ga1-x1 N (0≤x1<1). The second semiconductor region includes Alx2Ga1-x2 N (x1<x2≤1). The first member includes first and second regions. The second region is between the first region and a first electrode region of the second electrode. A part of the second region is between a second semiconductor portion of the second semiconductor region and a part of the second electrode. The second region includes at least one first element selected from a group consisting of Ti, Al, Ga, Ni, Nb, Mo, Ta, Hf, V, and Au. The first region does not include the first element, or concentration of the first element in the first region is lower than concentration of the first element in the second region.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] Embodiments of the present invention relate to a semiconductor device.

Background Art

[0002] For example, in a semiconductor device such as a transistor, stable characteristics are desired.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] Embodiments of the present invention provide a semiconductor device capable of obtaining stable characteristics.

Means for Solving the Problems

[0005] According to an embodiment of the present invention, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor region, a second semiconductor region, and a first member. The direction from the first electrode to the second electrode is along a first direction. The second electrode includes a first electrode region and a second electrode region. The position of the third electrode in the first direction is between the position of the first electrode in the first direction and the position of the second electrode in the first direction. The first semiconductor region is Al x1 Ga 1-x1It includes N(0≦x1<1). The first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. The direction from the first partial region to the first electrode is along a second direction intersecting the first direction. The direction from the second partial region to the second electrode is along the second direction. The direction from the third partial region to the third electrode is along the second direction. The fourth partial region is between the first partial region and the third partial region in the first direction. The fifth partial region is between the third partial region and the second partial region in the first direction. The second semiconductor region contains Al x2 Ga 1-x2 It includes N(x1<x2≦1). The second semiconductor region includes a first semiconductor part and a second semiconductor part. The direction from the fourth partial region to the first semiconductor part is along the second direction. The direction from the fifth partial region to the second semiconductor part is along the second direction. The first member includes a first region and a second region. The second semiconductor part is between the fifth partial region and the first region in the second direction. At least a part of the second region is between at least a part of the first region and the first electrode region in the first direction. The at least a part of the second region is between the second semiconductor part and the second electrode region in the second direction. The second region contains at least one first element selected from the group consisting of Ti, Al, Ga, Ni, Nb, Mo, Ta, Hf, V, and Au. The first region does not contain the first element. Or, the concentration of the first element in the first region is lower than the concentration of the first element in the second region.

Brief Description of the Drawings

[0006]

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Embodiments for Carrying Out the Invention

[0007] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationships between the thicknesses and widths of the respective parts, the size ratios between the parts, etc. are not necessarily the same as those in reality. Even when representing the same part, there are cases where the dimensions and ratios are shown differently in the drawings. In this specification and each drawing, the same reference numerals are assigned to elements similar to those described above with respect to the previously presented drawings, and detailed descriptions thereof are omitted as appropriate.

[0008] (First Embodiment) FIG. 1 is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment. As shown in FIG. 1, the semiconductor device 110 according to the embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, a first semiconductor region 10, a second semiconductor region 20, and a first member 40.

[0009] The direction from the first electrode 51 to the second electrode 52 is along the first direction D1. The first direction D1 is the X-axis direction. One direction perpendicular to the X-axis direction is the Z-axis direction. A direction perpendicular to the X-axis direction and the Z-axis direction is the Y-axis direction.

[0010] The second electrode 52 includes a first electrode region 52a and a second electrode region 52b.

[0011] The position of the third electrode 53 in the first direction D1 is between the position of the first electrode 51 in the first direction D1 and the position of the second electrode 52 in the first direction D1. For example, the third electrode 53 is between the first electrode 51 and the second electrode 52 in the first direction D1.

[0012] The first semiconductor region 10 is Al x1 Ga 1-x1 N (0 ≦ x1 < 1). In one example, the composition ratio x1 is 0 or more and 0.1 or less. The first semiconductor region 10 is, for example, a GaN layer.

[0013] The first semiconductor region 10 includes a first partial region 11, a second partial region 12, a third partial region 13, a fourth partial region 14, and a fifth partial region 15. The direction from the first partial region 11 to the first electrode 51 is along the second direction D2. The second direction D2 intersects the first direction D1. The second direction D2 is, for example, the Z-axis direction.

[0014] The direction from the second partial region 12 to the second electrode 52 is along the second direction D2. The direction from at least a part of the second partial region 12 to the second electrode 52 is along the second direction D2. The direction from the third partial region 13 to the third electrode 53 is along the second direction D2. The fourth partial region 14 is between the first partial region 11 and the third partial region 13 in the first direction D1. The fifth partial region 15 is between the third partial region 13 and the second partial region 12 in the first direction D1.

[0015] The first partial region 11 is, for example, a region that overlaps with the first electrode 51 in the Z-axis direction. The second partial region 12 is, for example, a region that overlaps with the second electrode 52 in the Z-axis direction. The third partial region 13 is, for example, a region that overlaps with the third electrode 53 in the Z-axis direction.

[0016] The second semiconductor region 20 contains Al x2 Ga 1-x2 N (x1 < x2 ≤ 1). In one example, the composition ratio x2 is 0.05 or more and 0.35 or less. The second semiconductor region 20 is, for example, an AlGaN layer.

[0017] The second semiconductor region 20 includes a first semiconductor part 21 and a second semiconductor part 22. The direction from the fourth partial region 14 to the first semiconductor part 21 is along the second direction D2. The direction from the fifth partial region 15 to the second semiconductor part 22 is along the second direction D2.

[0018] For example, the first electrode 51 is electrically connected to the first semiconductor part 21. The second electrode 52 is electrically connected to the second semiconductor part 22.

[0019] The current flowing between the first electrode 51 and the second electrode 52 can be controlled by the potential of the third electrode 53. The potential of the third electrode 53 may be, for example, a potential based on the potential of the first electrode 51. For example, the distance between the first electrode 51 and the third electrode 53 is shorter than the distance between the second electrode 52 and the third electrode 53. The first electrode 51 functions as, for example, a source electrode. The second electrode 52 functions as, for example, a drain electrode. The third electrode 53 functions as, for example, a gate electrode. The semiconductor device 110 is, for example, a transistor.

[0020] The first semiconductor region 10 and the second semiconductor region 20 are included in the semiconductor member 10M. The first semiconductor region 10 includes a portion facing the second semiconductor region 20. A carrier region 10c is formed in this facing portion. The carrier region 10c is, for example, a two-dimensional electron gas. The semiconductor device 110 is, for example, a HEMT (high electron mobility transistor).

[0021] In the second electrode 52, the first electrode region 52a is in contact with, for example, the second semiconductor portion 22. The second electrode region 52b protrudes toward the third electrode 53 with respect to the first electrode region 52a. The second electrode region 52b is a protruding portion or a shielding portion.

[0022] As shown in FIG. 1, the first electrode 51 may include a third electrode region 51c and a fourth electrode region 51d. The third electrode region 51c is in contact with, for example, the first semiconductor portion 21. The fourth electrode region 51d protrudes toward the third electrode 53 with respect to the third electrode region 51c. The fourth electrode region 51d is a protruding portion or a shielding portion. By providing these protruding portions, a stable electrode shape can be easily obtained. For example, the margin in the manufacturing process is expanded, and a practical semiconductor device can be obtained.

[0023] As shown in FIG. 1, the semiconductor device 110 may include a substrate 18s and a buffer layer 18b. The substrate 18s may include, for example, a silicon substrate or a sapphire substrate. The buffer layer 18b is between the substrate 18s and the semiconductor member 10M. The buffer layer 18b is provided on the substrate 18s. A first semiconductor region 10 is provided on the buffer layer 18b. A second semiconductor region 20 is provided on the first semiconductor region 10. First to third electrodes 51 to 53 are provided on the second semiconductor region 20.

[0024] The first member 40 includes a first region 41 and a second region 42. The second semiconductor portion 22 is between the fifth partial region 15 and the first region 41 in the second direction D2. At least a part of the second region 42 is between at least a part of the first region 41 and the first electrode region 52a in the first direction D1. At least a part of the second region 42 is between the second semiconductor portion 22 and the second electrode region 52b in the second direction D2.

[0025] The first semiconductor portion 21 is between the fourth partial region 14 and a part of the first region 41. For example, the first semiconductor portion 21 is protected by a part of the first region 41. More stable characteristics are easily obtained. In this example, another part of the first region 41 is between the third partial region 13 and the third electrode 53. Another part of the first region 41 functions as a gate insulating film.

[0026] In the first configuration according to the embodiment, the second region 42 includes at least one first element selected from the group consisting of Ti, Al, Ga, Ni, Nb, Mo, Ta, Hf, V, and Au. On the other hand, the first region 41 does not include the first element. Or, the concentration of the first element in the first region 41 is lower than the concentration of the first element in the second region 42. As will be described later, the second configuration or the third configuration may be applied. In the semiconductor device having the first configuration as described above, stable characteristics can be obtained.

[0027] For example, in the semiconductor device 110, when the second electrode region 52b (protrusion) is provided in the second electrode 52, the on-resistance may increase. For example, current collapse may occur. This is presumably because there are traps in the insulating film between the second electrode region 52b and the semiconductor member 10M. It is considered that the on-resistance increases due to the charges trapped in the traps in the insulating film.

[0028] In the embodiment, the above-described first element is introduced into the second region 42 located under the second electrode region 52b. By introducing the first element, it is considered that the traps in the second region 42 substantially disappear. Thereby, an increase in the on-resistance is suppressed.

[0029] Hereinafter, an example of the experimental results regarding the semiconductor device will be described. First, the method for manufacturing the experimental sample will be described.

[0030] Figs. 2(a) to 2(c) are schematic cross-sectional views illustrating a method for manufacturing a semiconductor device according to the first embodiment. In these figures, the substrate 18s and the buffer layer 18b are omitted. As shown in Fig. 2(a), a second semiconductor region 20 is provided on the first semiconductor region 10. On the second semiconductor region 20, a first member film 40f serving as the first member 40 is provided. The first member film 40f is, for example, a silicon nitride film. In this example, a third electrode 53 is provided on the first member film 40f.

[0031] As shown in Fig. 2(b), a part of the first member film 40f is removed. The first electrode 51 and the second electrode 52 are formed in the removed region. In this example, the first electrode 51 and the second electrode 52 contain the first element. Thereafter, heat treatment is performed at a high temperature.

[0032] As a result, as shown in FIG. 2(c), a part of the first element contained in the second electrode 52 moves (diffuses) into the first member film 40f. Thereby, a second region 42 containing the first element is formed. In this example, a part of the first element contained in the first electrode 51 moves (diffuses) into the first member film 40f. Thereby, a region 42r containing the first element is also formed in the vicinity of the first electrode 51. In this example, the first element is Al.

[0033] By the above method, the first sample SP1 is formed. On the other hand, a second sample is formed in the same manner. In the second sample, the temperature of the above heat treatment is lower than the temperature in the first sample SP1. In the second sample, the second region 42 does not contain the first element.

[0034] FIG. 3 is a graph illustrating the characteristics of the semiconductor device. FIG. 3 illustrates the on-resistance during the stress test for the first sample SP1 and the second sample SP2. In the stress test, the measurement ambient temperature is 150° C. and the drain stress voltage is 900 V. The horizontal axis in FIG. 3 is the stress time tm0. The vertical axis in FIG. 3 is the increase rate ΔR of the on-resistance. The increase rate ΔR is the ratio of the on-resistance at the stress time tm0 to the on-resistance in the initial state when the stress time tm0 is 0. The increase rate ΔR is preferably close to 1.

[0035] As shown in FIG. 3, in the second sample SP2, as the stress time tm0 becomes longer, the increase rate ΔR becomes significantly larger. On the other hand, in the first sample SP1, even when the stress time tm0 becomes longer, the increase in the increase rate ΔR is suppressed. Thus, by providing the second region 42 containing the first element, stable characteristics can be obtained.

[0036] FIGS. 4(a) to 4(f) are analysis images of the semiconductor device according to the embodiment. Figures 4(a) to 4(c) correspond to the first sample SP1. Figures 4(d) to 4(f) correspond to the second sample SP2. In these samples, the second electrode region 52b of the second electrode 52 contains Al. In these samples, an insulating member 48 (see FIG. 10) described later is provided. Figures 4(a) and 4(d) correspond to transmission electron microscope (TEM) images. Figures 4(b) and 4(e) are EDX images regarding Al. In Figures 4(b) and 4(e), the concentration of Al is high in the bright regions. Figures 4(c) and 4(f) are EDX images regarding nitrogen. In Figures 4(c) and 4(f), the concentration of nitrogen is high in the bright regions.

[0037] As shown in FIGS. 4(a) and 4(d), there is a second region 42 under the second electrode region 52b of the second electrode 52. In FIGS. 4(a) to 4(f), the position of the interface IF1 between the second region 42 and the second electrode region 52b is shown.

[0038] As shown in FIG. 4(b), in the first sample SP1, the second region 42 contains the first element (Al). As shown in FIG. 4(e), in the second sample SP2, the second region 42 does not contain the first element (Al).

[0039] Figures 5(a) and 5(b) are optical microscope photographs of the semiconductor device according to the embodiment. As shown in FIG. 5(a), in the first sample SP1, the second region 42 containing the first element is observed. The second region 42 includes a portion not covered by the second electrode 52. As shown in FIG. 5(b), in the second sample SP2, the second region 42 containing the first element is not observed.

[0040] Thus, it is considered that the increase in the on-resistance is suppressed as exemplified in FIG. 3 because the second region 42 between the second electrode region 52b and the second semiconductor portion 22 contains the first element.

[0041] FIG. 6 is a graph illustrating the characteristics of the semiconductor device according to the embodiment. FIG. 6 illustrates the leakage current density IL1 in a first film sample SF1 corresponding to a first sample SP1 and a second film sample SF2 corresponding to a second sample SP2. The first film sample SF1 is a silicon nitride film containing a first element (Al). The second film sample SF2 is a silicon nitride film substantially free of the first element. The horizontal axis in FIG. 6 is the voltage V1 applied to these film samples. The vertical axis is the leakage current density IL1 flowing through these film samples.

[0042] As shown in FIG. 6, in the second film sample SF2, the leakage current density IL1 is low. In contrast, in the first film sample SF1, the leakage current density IL1 is high. In the first film sample SF1, it is considered that when the leakage current density IL1 is high, the voltage applied between the second electrode region 52b and the semiconductor member 10M substantially decreases. For example, it is considered that the second electrode region 52b is substantially in ohmic contact with the second semiconductor portion 22 via the second region 42. Thereby, as illustrated in FIG. 3, it is considered that an increase in the on-resistance is suppressed.

[0043] As described above, the second electrode 52 may contain the first element. The first element contained in the second region 42 may be introduced from the second electrode 52. For example, the first region 41 and the second region 42 may contain at least one second element selected from the group consisting of nitrogen and oxygen and silicon. The first region 41 includes, for example, silicon nitride substantially free of the first element. The second region 42 is, for example, silicon nitride containing the first element.

[0044] In the first configuration, the concentration of the first element in the second region 42 is, for example, 5 atm% or more. Thereby, an increase in the on-resistance can be effectively suppressed.

[0045] In the first configuration, the concentration of the first element in the first region 41 is, for example, 0.5 atm% or less. Thereby, for example, the gate leakage current can be suppressed.

[0046] As shown in FIG. 1, the second region 42 includes a first end 42e and a second end 42f. These ends correspond to two ends in the first direction D1. The second end 42f is located between the first end 42e and the first electrode region 52a in the first direction D1. The second end 42f faces the first electrode region 52a. The position of the first end 42e in the first direction D1 is between the position of the third electrode 53 in the first direction D1 and the position of the second electrode region 52b in the first direction D1. The first end 42e protrudes toward the third electrode with reference to the end of the second electrode region 52b in the first direction D1. Thereby, an increase in on-resistance can be more stably suppressed.

[0047] As shown in FIG. 1, let the length along the first direction D1 of the second region 42 be length L1. The length L1 corresponds to the distance between the first end 42e and the second end 42f. The length L1 is preferably, for example, 2 μm or less. Even if there are variations in the manufacturing process, an increase in on-resistance can be stably suppressed.

[0048] As shown in FIG. 1, the second region 42 includes a portion overlapping with the second electrode region 52b in the second direction D2. Let the length along the first direction D1 of this overlapping portion be length L2. The length L2 corresponds to, for example, the protruding amount of the second electrode region 52b. In the embodiment, the length L2 is preferably 0.8 μm or less. Since the length L2 is not excessively long, for example, the distance between the third electrode 53 and the second electrode 52 can be maintained long. For example, high breakdown voltage can be maintained. Current collapse can be suppressed.

[0049] In the embodiment, the second region 42 may be formed by a method different from the method described with respect to FIGS. 2(a) to 2(c). Hereinafter, an example of another method for forming the second region 42 will be described.

[0050] FIGS. 7(a) to 7(e) are schematic cross-sectional views illustrating a method for manufacturing a semiconductor device according to the first embodiment. In these figures, the substrate 18s and the buffer layer 18b are omitted. As shown in FIG. 7(a), a second semiconductor region 20 is provided on the first semiconductor region 10. On the second semiconductor region 20, a first member film 40f serving as a first member 40 is provided. The first member film 40f is, for example, a silicon nitride film. In this example, a third electrode 53 is provided on the first member film 40f.

[0051] As shown in FIG. 7(b), a mask member 40M is formed on the first member film 40f. The mask member 40M has an opening 40o. An element i1 is introduced into a part of the first member film 40f through the opening 40o. The element i1 contains a first element. The introduction of the element i1 is performed, for example, by ion implantation. The region where the element i1 is not introduced becomes a first region 41. The region where the element i1 is introduced becomes a second region 42.

[0052] As shown in FIG. 7(c), after removing the mask member 40M, a part of the first region 41 is removed to form an opening 51o. A part of the second region 42 is removed to form an opening 52o.

[0053] As shown in FIG. 7(d), a conductive part 51m serving as a first electrode 51 is formed on the opening 51o and the first region 41. A conductive part 52m serving as a second electrode 52 is formed on the opening 52o and the second region 42.

[0054] As shown in FIG. 7(e), by performing heat treatment, the first electrode 51 is obtained from the conductive part 51m. The second electrode 52 is obtained from the conductive part 52m. Also by such a method, a second region 42 containing the first element can be formed.

[0055] In an embodiment, the first member 40 may have the following second configuration. In the second configuration, the first region 41 contains at least one second element selected from the group consisting of nitrogen and oxygen, and silicon. The second region 42 contains silicon, and the concentration of silicon in the second region is higher than the concentration of silicon in the first region 41. In the second configuration, the first region 41 includes, for example, at least one selected from the group consisting of silicon nitride, silicon oxide, and silicon oxynitride. In the second configuration, the second region 42 includes, for example, polysilicon or the like.

[0056] In the second configuration, the second region 42 is less likely to contain traps than the first region 41. For example, the electrical resistance of the second region 42 is lower than the electrical resistance of the first region 41. For example, the voltage applied to the second region 42 between the second electrode region 52b and the second semiconductor portion 22 is low. Even in the second configuration including such a second region 42, an increase in the on-resistance can be suppressed.

[0057] In an embodiment, the first member 40 may have the following third configuration. In the third configuration, the first region 41 contains at least one second element selected from the group consisting of nitrogen and oxygen, and silicon. In the third configuration, the first region 41 includes, for example, at least one selected from the group consisting of silicon nitride, silicon oxide, and silicon oxynitride. The second region 42 contains Al z1 Ga 1-z1 N (0 ≦ z1 ≦ 1). The second region 42 includes, for example, GaN, AlGaN, or AlN. The second region 42 may contain polycrystals. By the second region 42 containing polycrystals, for example, the resistance can be lowered and the traps can be substantially reduced. An increase in the on-resistance can be suppressed. In the third configuration, the second region 42 may contain at least one of a third element and a fourth element. The third element includes at least one selected from the group consisting of Si, Ge, and Sn. The fourth element includes at least one selected from the group consisting of Mg and Zn. The third element is, for example, an n-type impurity. The fourth element is, for example, a p-type impurity.

[0058] In the third configuration, the second region 42 is less likely to contain traps than the first region 41. For example, the electrical resistance of the second region 42 is lower than that of the first region 41. For example, the voltage applied to the second region 42 between the second electrode region 52b and the second semiconductor portion 22 is low. Even in the third configuration including such a second region 42, an increase in the on-resistance can be suppressed.

[0059] In an example of the semiconductor device according to the embodiment described below, the first member 40 may have any one of the above-described first to third configurations.

[0060] FIG. 8 is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment. As shown in FIG. 8, in the semiconductor device 111 according to the embodiment, a part of the first region 41 is on the second region 42. The configuration of the semiconductor device 111 except this may be the same as the configuration of the semiconductor device 110.

[0061] In the semiconductor device 111, a part of the second region 42 is between the second semiconductor portion 22 and a part of the first region 41. For example, the second region 42 is protected by the first region 41. More stable characteristics are easily obtained.

[0062] FIGS. 9(a) to 9(e) are schematic cross-sectional views illustrating a method of manufacturing a semiconductor device according to the first embodiment. In these figures, the substrate 18s and the buffer layer 18b are omitted. As shown in FIG. 9(a), a second semiconductor region 20 is provided on the first semiconductor region 10. On the second semiconductor region 20, a second region film 42F that becomes the second region 42 is provided. For example, the material of the second region 42 related to the above-described first to third configurations is applied to the second region film 42F. In one example, the second region film 42F is a silicon film (second configuration). In another example, the second region film 42F is a GaN film, an AlGaN film, or an AlN film (third configuration). In another example, the second region film 42F is a silicon nitride film containing a first element (first configuration).

[0063] As shown in FIG. 9(b), a first region film 41F serving as a first region 41 is formed on the second semiconductor region 20 and the second region film 42F. The first region film 41F is, for example, a silicon nitride film.

[0064] As shown in FIG. 9(c), a part of the first region film 41F is removed to form an opening 51o. A part of the second region film 42F is removed to form an opening 52o. Thereby, the first region 41 and the second region 42 are formed.

[0065] As shown in FIG. 9(d), a conductive portion 51m serving as a first electrode 51 is formed on the opening 51o and the first region 41. A conductive portion 52m serving as a second electrode 52 is formed on the opening 52o and the second region 42.

[0066] As shown in FIG. 9(e), by performing heat treatment, the first electrode 51 is obtained from the conductive portion 51m. The second electrode 52 is obtained from the conductive portion 52m. Also by such a method, a first member 40 including any of the first to third configurations can be formed. Thereby, the semiconductor device 111 is obtained.

[0067] FIG. 10 is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment. As shown in FIG. 10, the semiconductor device 112 according to the embodiment includes an insulating member 48. The configuration of the semiconductor device 112 excluding this may be the same as the configuration of the semiconductor device 110.

[0068] In the semiconductor device 112, the first region 41 is between the second semiconductor portion 22 and the insulating member 48 in the second direction D2. For example, the insulating member 48 protects the first region 41. More stable characteristics are easily obtained. The insulating member 48 includes, for example, at least one selected from the group consisting of oxygen and nitrogen, and silicon. The insulating member 48 includes, for example, silicon oxide. The insulating member 48 includes, for example, silicon nitride.

[0069] In the semiconductor device 112, the second region 42 is between at least a part of the insulating member 48 and the first electrode region 52a in the first direction D1.

[0070] FIG. 11 is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment. As shown in FIG. 11, the semiconductor device 113 according to the embodiment also includes an insulating member 48. The configurations of the insulating member 48 and the second region 42 in the semiconductor device 113 are different from those in the semiconductor device 112. The configuration of the semiconductor device 113 except for this may be the same as that of the semiconductor device 112.

[0071] In the semiconductor device 113, the first region 41 is between the second semiconductor portion 22 and the insulating member 48 in the second direction D2. A part of the insulating member 48 is between a part of the first region 41 and a part of the second region 42 in the second direction D2.

[0072] FIG. 12 is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment. As shown in FIG. 12, the semiconductor device 114 according to the embodiment also includes an insulating member 48. The configurations of the insulating member 48 and the second region 42 in the semiconductor device 114 are different from those in the semiconductor device 112. The configuration of the semiconductor device 114 except for this may be the same as that of the semiconductor device 112.

[0073] In the semiconductor device 114, a part of the insulating member 48 is between the second region 42 and the second electrode region 52b in the second direction D2.

[0074] Regarding the semiconductor devices 112 to 114 described above, any one of the first to third configurations described above may be applied to the first member 40. Stable characteristics can be obtained.

[0075] FIG. 13 is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment. As shown in FIG. 13, in the semiconductor device 120 according to the embodiment, the first region 41 includes a stacked film. The configuration of the semiconductor device 120 except for this may be the same as that of the semiconductor device 110, for example.

[0076] In the semiconductor device 120, the first region 41 includes first to third compound films 41a to 41c. The first compound film 41a contains silicon and oxygen. The second compound film 41b contains Al y2 Ga 1-y2 N (0 < y2 ≤ 1). The third compound film 41c contains silicon and nitrogen. The first compound film is, for example, a silicon oxide film. The second compound film 41b is, for example, an AlN film. The third compound film 41c is, for example, a silicon nitride film. The second compound film 41b is between the second semiconductor portion 22 and the first compound film 41a. The third compound film 41c is between the second semiconductor portion 22 and the second compound film 41b. Such a stacked structure may also be applied to the insulating film provided between the first electrode 51 and the third electrode 53.

[0077] As shown in FIG. 13, in the semiconductor device 120, at least a part (part 53p) of the third electrode 53 is between the first semiconductor portion 21 and the second semiconductor portion 22 in the first direction D1. The third electrode 53 is, for example, a recessed gate electrode. With such a configuration, for example, a high threshold voltage can be obtained. For example, a normally-off operation is performed.

[0078] The first member 40 further includes a third region 43, a fourth region 44, and a fifth region 45. The third region 43 is between the third partial region 13 and at least a part (part 53p) of the third electrode 53 in the second direction D2. The fourth region 44 is between the first semiconductor portion 21 and at least a part (part 53p) of the third electrode 53 in the first direction D1. The fifth region 45 is between at least a part (part 53p) of the third electrode 53 and the second semiconductor portion 22 in the first direction D1.

[0079] The third region 43, the fourth region 44, and the fifth region 45 function as, for example, a gate insulating film. The third region 43, the fourth region 44, and the fifth region 45 may include a stacked film.

[0080] For example, the first member 40 includes a first compound film 41a containing silicon and oxygen, and Al y2 Ga 1-y2It includes a second compound film 41b containing N(0 < y2 ≤ 1) and a third compound film 41c containing silicon and nitrogen.

[0081] The first compound film 41a is located between at least a part (part 53p) of the third partial region 13 and the third electrode 53 in the third region 43. The first compound film 41a is located between at least a part (part 53p) of the first semiconductor part 21 and the third electrode 53 in the fourth region 44. The first compound film 41a is located between at least a part (part 53p) of the third electrode 53 and the second semiconductor part 22 in the fifth region 45.

[0082] The second compound film 41b is located between the third partial region 13 and the first compound film 41a in the third region 43. The second compound film 41b is located between the first semiconductor part 21 and the first compound film 41a in the fourth region 44. The second compound film 41b is located between the first compound film 41a and the second semiconductor part 22 in the fifth region 45. The second compound film 41b is located between the second semiconductor part 22 and the first compound film 41a in the first region 41.

[0083] For example, the second compound film 41b is in contact with the third partial region 13 in the third region 43. For example, the second compound film 41b is in contact with the first semiconductor part 21 in the fourth region 44. For example, the second compound film 41b is in contact with the second semiconductor part 22 in the fifth region 45.

[0084] The third compound film 41c is located between the second semiconductor part 22 and the second compound film 41b in the first region 41. For example, the third compound film 41c is not provided in the third region 43, the fourth region 44, and the fifth region 45. By not providing the third compound film 41c in the third region 43, the fourth region 44, and the fifth region 45, for example, the variation of the threshold voltage can be reduced.

[0085] By providing the second compound film 41b in the third region 43, the fourth region 44, and the fifth region 45, the electron mobility can be increased. The on-resistance of the device can be reduced.

[0086] By providing the first compound film 41a in the third region 43, the fourth region 44, and the fifth region 45, a stable threshold voltage can be easily obtained. The leakage current can be reduced.

[0087] By providing the third compound film 41c in the first region 41, the second semiconductor portion 22 is protected. More stable characteristics can be obtained. Current collapse can be suppressed. By providing the third compound film 41c in the region between the first electrode 51 and the third electrode 53, the first semiconductor portion 21 is protected. More stable characteristics can be obtained.

[0088] FIG. 14 is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment. As shown in FIG. 14, in the semiconductor device 121 according to the embodiment, an insulating member 48 is provided. The configuration of the semiconductor device 121 excluding this may be the same as the configuration of the semiconductor device 120, for example. In the semiconductor device 121, a part of the second region 42 is between the insulating member 48 and the first electrode region 52a in the second direction D2.

[0089] FIG. 15 is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment. As shown in FIG. 15, in the semiconductor device 122 according to the embodiment, the configurations of the insulating member 48 and the second region 42 are different from those of the semiconductor device 121. The configuration of the semiconductor device 122 excluding this may be the same as the configuration of the semiconductor device 121, for example. In the semiconductor device 122, a part of the insulating member 48 is between a part of the second region 42 and the second electrode region 52b in the second direction D2.

[0090] FIG. 16 is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment. As shown in FIG. 16, in the semiconductor device 123 according to the embodiment, the configurations of the insulating member 48 and the second region 42 are different from those of the semiconductor device 121. The configuration of the semiconductor device 123 excluding this may be the same as the configuration of the semiconductor device 121, for example. In the semiconductor device 123, a part of the insulating member 48 is between a part of the first region 41 and a part of the second region 42 in the second direction D2.

[0091] (Second Embodiment) FIG. 17 is a schematic plan view illustrating a semiconductor device according to the second embodiment. As shown in FIG. 17, the semiconductor device 130 according to the embodiment includes a plurality of second electrodes 52. Each of the plurality of second electrodes 52 includes a first electrode region 52a and a second electrode region 52b (see FIG. 1 etc.). In this example, a plurality of first electrodes 51 and a plurality of third electrodes 53 are provided. These electrodes extend along a third direction D3. The third direction D3 intersects a plane including the first direction D1 and the second direction D2. The third direction D3 is, for example, the Y-axis direction. These electrodes are arranged along the first direction D1.

[0092] The position of the first electrode 51 (one of the plurality of first electrodes 51) in the first direction D1 is between the position of one of the plurality of second electrodes 52 in the first direction D1 and the position of another one of the plurality of second electrodes 52 in the first direction D1. The position of the third electrode 53 (one of the plurality of third electrodes 53) in the first direction D1 is between the position of the first electrode 51 in the first direction D1 and the position of another one of the plurality of second electrodes 52 in the first direction D1.

[0093] At least a part of the first to third electrodes 51 to 53 passes through the element region 10A (for example, an active region). A peripheral region 10P is provided around the element region 10A. An electrode pad region is provided in the peripheral region 10P. The plurality of first electrodes 51 are electrically connected to the first electrode pads 51P. The plurality of second electrodes 52 are electrically connected to the second electrode pads 52P. The plurality of third electrodes 53 are electrically connected to the third electrode pads 53P.

[0094] As shown in FIG. 17, the second region 42 includes a region that does not overlap with the second electrode 52 in the second direction D2. In the semiconductor device 130, any one of the first to third configurations is applied. By providing the second region 42, for example, an increase in on-resistance is suppressed. A semiconductor device capable of obtaining stable characteristics can be provided.

[0095] For example, the material of the first electrode 51 may be the same as that of the second electrode 52. For example, the first electrode 51 may contain at least one first element selected from the group consisting of Ti, Al, Ga, Ni, Nb, Mo, Ta, Hf, V, and Au.

[0096] The third electrode 53 contains, for example, at least one selected from the group consisting of TiN, WN, Ni, Au, Pt, and Ti. The third electrode 53 may contain, for example, conductive silicon, polysilicon, or the like.

[0097] Information regarding length and thickness can be obtained by electron microscope observation or the like. Information regarding the composition of the material can be obtained by SIMS (Secondary Ion Mass Spectrometry) or EDX (Energy dispersive X-ray spectroscopy) or the like.

[0098] According to the embodiment, a semiconductor device capable of obtaining stable characteristics can be provided.

[0099] As described above, the embodiments of the present invention have been described with reference to specific examples. However, the present invention is not limited to these specific examples. For example, regarding the specific configurations of each element such as semiconductor members, semiconductor regions, electrodes, members, and insulating members included in the semiconductor device, the present invention can be similarly implemented by appropriately selecting from the range known to those skilled in the art, and as long as the same effects can be obtained, it is included in the scope of the present invention.

[0100] Also, combinations of any two or more elements of each specific example within a technically possible range are included in the scope of the present invention as long as they include the gist of the present invention.

[0101] In addition, based on the semiconductor device described above as an embodiment of the present invention, all semiconductor devices that can be appropriately designed and modified by those skilled in the art are also within the scope of the present invention as long as they include the gist of the present invention.

[0102] In addition, within the scope of the idea of the present invention, those skilled in the art can conceive of various modifications and variations, and it is understood that these modifications and variations also belong to the scope of the present invention.

[0103] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are also included in the invention described in the claims and its equivalent scope.

Explanation of Reference Numerals

[0104] 10…First semiconductor region, 10A…Element region, 10M…Semiconductor member, 10P…Peripheral region, 10c…Carrier region, 11~15…First to fifth partial regions, 18b…Buffer layer, 18s…Substrate, 20…Second semiconductor region, 21, 22…First and second semiconductor parts, 40…First member, 40M…Mask member, 40f…First member film, 40o…Opening, 41~45…First to fifth regions, 41F, 42F…First and second region films, 41a~41c…First to third compound films, 42e, 42f…First and second ends, 42r…Region, 48…Insulating member, 51~53…First to third electrodes, 51P~53P…First to third electrode pads, 51c, 51d…Third and fourth electrode regions, 51m, 52m…Conductive parts, 51o, 52o…Openings, 52a, 52b…First and second electrode regions, 53p…Part, ΔR…Increase rate, 110~114, 120~123, 130…Semiconductor devices, D1~D3…First to third directions, IF1…Interface, IL1…Leakage current density, L1, L2…Lengths, SF1, SF2…First and second film samples, SP1, SP2…First and second samples, V1…Voltage, i1…Element, tm0…Stress time

Claims

1. a first electrode, a second electrode, wherein a direction from the first electrode to the second electrode is along a first direction, the second electrode includes a first electrode region and a second electrode region, the second electrode, a third electrode, wherein a position of the third electrode in the first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction, the third electrode, Al ｘ１ Ga １－ｘ１ A first semiconductor region containing N (0 ≦ x1 < 1), wherein the first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region, and a direction from the first partial region to the first electrode is along a second direction intersecting the first direction, a direction from the second partial region to the second electrode is along the second direction, a direction from the third partial region to the third electrode is along the second direction, the fourth partial region is between the first partial region and the third partial region in the first direction, and the fifth partial region is between the third partial region and the second partial region in the first direction, the first semiconductor region, Al ｘ２ Ga １－ｘ２ A second semiconductor region containing N (x1 < x2 ≤ 1), wherein the second semiconductor region includes a first semiconductor portion and a second semiconductor portion, the direction from the fourth partial region to the first semiconductor portion is along the second direction, the direction from the fifth partial region to the second semiconductor portion is along the second direction, the second semiconductor region, and a first member, the first member includes a first region and a second region, the second semiconductor portion is between the fifth partial region and the first region in the second direction, at least a part of the second region is between at least a part of the first region and the first electrode region in the first direction, at least a part of the second region is between the second semiconductor portion and the second electrode region in the second direction, the first region includes at least one second element selected from the group consisting of nitrogen and oxygen and silicon, the second region includes silicon, and a concentration of silicon in the second region is higher than a concentration of silicon in the first region, the first member, a semiconductor device comprising the same.

2. The semiconductor device according to claim 1, wherein the second region includes polysilicon.

3. a first electrode, a second electrode, wherein a direction from the first electrode to the second electrode is along a first direction, the second electrode includes a first electrode region and a second electrode region, the second electrode, a third electrode, wherein a position of the third electrode in the first direction is between a position of the first electrode in the first direction and a position of the second electrode in the first direction, the third electrode, Al ｘ１ Ga １－ｘ１ A first semiconductor region containing N (0 ≦ x1 < 1), wherein the first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region, the direction from the first partial region to the first electrode is along a second direction intersecting the first direction, the direction from the second partial region to the second electrode is along the second direction, the direction from the third partial region to the third electrode is along the second direction, the fourth partial region is between the first partial region and the third partial region in the first direction, and the fifth partial region is between the third partial region and the second partial region in the first direction, the first semiconductor region, and Al ｘ２ Ga １－ｘ２ A second semiconductor region containing N (x1 < x2 ≦ 1), wherein the second semiconductor region includes a first semiconductor portion and a second semiconductor portion, the direction from the fourth partial region to the first semiconductor portion is along the second direction, the direction from the fifth partial region to the second semiconductor portion is along the second direction, the second semiconductor region, and The first member, the first member includes a first region and a second region, the second semiconductor portion is between the fifth partial region and the first region in the second direction, at least a part of the second region is between at least a part of the first region and the first electrode region in the first direction, at least a part of the second region is between the second semiconductor portion and the second electrode region in the second direction, the first region includes at least one second element selected from the group consisting of nitrogen and oxygen and silicon, and the second region is Al ｚ１ Ga １－ｚ１ The first member containing N (0 ≦ z1 ≦ 1), a semiconductor device comprising the same.

4. The semiconductor device according to claim 3, wherein the second region includes polycrystal.

5. The second region includes at least one of a third element and a fourth element, the third element includes at least one selected from the group consisting of Si, Ge, and Sn, the semiconductor device according to claim 2 or 4, wherein the fourth element includes at least one selected from the group consisting of Mg and Zn.

6. The first region, a first compound film including silicon and oxygen, Al ｙ２ Ga １－ｙ２ a second compound film containing N (0 < y2 ≤ 1), a third compound film including silicon and nitrogen, includes, the second compound film is between the second semiconductor portion and the first compound film, The semiconductor device according to any one of claims 1 to 5, wherein the third compound film is between the second semiconductor portion and the second compound film.

7. At least a part of the third electrode is between the first semiconductor portion and the second semiconductor portion in the first direction, The first member further includes a third region, a fourth region, and a fifth region. The third region is between the third partial region and the at least a part of the third electrode in the second direction. The fourth region is between the first semiconductor portion and the at least a part of the third electrode in the first direction. The fifth region is between the at least a part of the third electrode and the second semiconductor portion in the first direction. The first member includes a first compound film containing silicon and oxygen, Al ｙ２ Ga １－ｙ２ a second compound film containing N (0 < y2 ≤ 1), and a third compound film containing silicon and nitrogen. The first compound film is between the third partial region and the at least a part of the third electrode in the third region, between the first semiconductor portion and the at least a part of the third electrode in the fourth region, and between the at least a part of the third electrode and the second semiconductor portion in the fifth region. The second compound film is between the third partial region and the first compound film in the third region, between the first semiconductor portion and the first compound film in the fourth region, between the first compound film and the second semiconductor portion in the fifth region, and between the second semiconductor portion and the first compound film in the first region. The semiconductor device according to any one of claims 1 to 5, wherein the third compound film is between the second semiconductor portion and the second compound film in the first region.

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