Power conversion device

Abstract

To provide a power conversion device which can level thermal interference between power semiconductor modules in charge and discharge, the power conversion device constituted by closely arranging a plurality of power semiconductor modules.SOLUTION: A power conversion device comprises: a power conversion unit having a first semiconductor module and a fourth semiconductor module through which approximately equivalent current passes during operation, and a second semiconductor module and a third semiconductor module through which approximately equivalent current passes during operation; and a cooling body in which the first to fourth semiconductor modules are arranged, wherein third thermal interference between the second semiconductor module and the third semiconductor module is smaller than first thermal interference between the first semiconductor module and the second semiconductor module and second thermal interference between the third semiconductor module and the fourth semiconductor module.SELECTED DRAWING: Figure 7

Description

Technical Field

[0001] The present invention relates to the configuration of a power conversion device, and particularly relates to a technique effective when applied to a power conversion device configured by arranging a plurality of power semiconductor modules in proximity to each other.

Background Art

[0002] A three-level inverter, which is a type of power conversion device, is widely used in power conditioners and the like as a device for converting AC power and DC power. In power conversion by a three-level inverter, the operation of the power semiconductor module used in the circuit for performing power conversion is controlled to perform desired power conversion.

[0003] For example, it is possible to control the switching operation such that a storage battery is connected to the DC side of a three-level inverter and the power stored in the storage battery is discharged to the AC side. Conversely, it is also possible to connect the AC side to a power grid, receive AC power from the power grid, convert it to DC by a three-level inverter, and charge the storage battery.

[0004] In such a power conversion process, power loss, that is, heat generation, occurs in the power semiconductor module. If the heat generation continues, the temperature of the power semiconductor module rises, and if it exceeds a predetermined temperature, the power semiconductor module is damaged. In order to prevent damage, it is necessary to maintain the temperature below a predetermined temperature. Therefore, a cooling device such as a heat sink is connected to the power semiconductor module to maintain the power semiconductor module below a predetermined temperature. Generally, as the amount of heat generation increases, the heat sink tends to become larger, so it is necessary to design an appropriate heat sink according to the amount of heat generation.

[0005] As background art in this technical field, for example, there is a technique such as Patent Document 1. In Patent Document 1, paying attention to the fact that the timings (phases) of heat generation of the U-phase, V-phase, and W-phase of a two-level inverter are shifted by 120 degrees each, means for arranging the power semiconductor modules of the U-phase, V-phase, and W-phase at equal distances and increasing the cooling efficiency of the heat sink have been proposed.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0007] By the way, in a three-level inverter, in order to output the voltage of the DC side high side, the voltage of the low side, and the intermediate voltage, a circuit is configured by combining four power semiconductor modules. Among these, the power semiconductor module that turns on when outputting the high-side voltage and the low-side voltage is called the outer arm, and the power semiconductor module that turns on when outputting the intermediate voltage is called the inner arm.

[0008] During discharge of the three-level inverter, since the effective current flowing through the outer arm increases, the loss of the outer arm tends to be larger than that of the inner arm. On the other hand, during charging, since the effective current of the inner arm increases, the magnitude relationship of the losses is reversed during charge and discharge. In an inverter device that operates in this way, it is common for the heat sink to be designed according to the loss during discharge for the outer arm and according to the loss during charging for the inner arm.

[0009] However, during charging, the performance of the heat sink is excessive in the outer arm, and during discharging, the performance of the heat sink is excessive in the inner arm, that is, it is oversized unnecessarily.

[0010] Therefore, an object of the present invention is to provide a power conversion device configured by arranging a plurality of power semiconductor modules in close proximity, which can equalize the thermal interference between the power semiconductor modules during charge and discharge.

Means for Solving the Problems

[0011] In order to solve the above problems, the present invention provides a power conversion unit having a first semiconductor module and a fourth semiconductor module through which substantially equal currents pass during operation, and a second semiconductor module and a third semiconductor module through which substantially equal currents pass during operation, and a cooling body on which the first semiconductor module, the second semiconductor module, the third semiconductor module, and the fourth semiconductor module are arranged. The third thermal interference between the second semiconductor module and the third semiconductor module is smaller than the first thermal interference between the first semiconductor module and the second semiconductor module and the second thermal interference between the third semiconductor module and the fourth semiconductor module.

Advantages of the Invention

[0012] According to the present invention, in a power conversion device configured by arranging a plurality of power semiconductor modules in proximity, it is possible to realize a power conversion device capable of equalizing thermal interference between power semiconductor modules during charging and discharging.

[0013] Thereby, it is possible to suppress the maximum temperature rise associated with power conversion, contributing to miniaturization of a cooling device such as a heat sink and miniaturization of a power conversion device including the cooling device.

[0014] Problems, configurations, and effects other than those described above will be clarified by the description of the following embodiments.

Brief Description of the Drawings

[0015]

Figure 1

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Figure 10

Embodiments for Carrying Out the Invention

[0016] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In each drawing, the same components are denoted by the same reference numerals, and detailed descriptions of overlapping parts are omitted.

Examples

[0017] With reference to FIGS. 1 to 8, the power conversion device according to Example 1 of the present invention will be described.

[0018] FIG. 1 is a circuit diagram showing a schematic configuration of the power conversion device 100 of the present embodiment.

[0019] As shown in FIG. 1, in the power conversion device 100 of the present embodiment, the DC side is connected to the storage battery 104, and the AC side is connected to the power grid 103. DC power supplied from the storage battery 104 on the DC side is received from the DC side of the power conversion device 100. The power conversion device 100 converts the DC power from the storage battery 104 into three-phase AC power and supplies it to the power grid 103.

[0020] Also, as shown in FIG. 1, the power conversion device 100 is configured to output power at three levels of potential: a high-level potential, an intermediate potential, and a low-level potential. Specifically, based on the input of the DC voltage from the positive electrode of the storage battery 104 on the positive electrode side and the input on the opposite negative electrode side, it has a three-level inverter circuit that performs a power conversion operation and outputs three levels of potential.

[0021] In this configuration, the inner arm has a structure in which IGBT101c and diode 102d connected in series with each other and IGBT101d and diode 102c connected in series with each other are connected in antiparallel. When outputting a high level or a low level, current flows through one element of IGBT101a or IGBT101b. Such a configuration is generally called a T-type three-level.

[0022] In the example of FIG. 1, one IGBT101 (101a to 101d) and one diode 102 (102a to 102d) form a pair and constitute one power semiconductor module 106. In FIG. 1, only the power semiconductor module of the combination of IGBT101d and diode 102d is shown with the reference numeral 106.

[0023] IGBT101a and diode 102a constitute the first semiconductor module (reference numeral 106a in FIG. 7 described later). Also, IGBT101c and diode 102c constitute the second semiconductor module (reference numeral 106c in FIG. 7 described later). Also, IGBT101d and diode 102d constitute the third semiconductor module (reference numeral 106d in FIG. 7 described later). Also, IGBT101b and diode 102b constitute the fourth semiconductor module (reference numeral 106b in FIG. 7 described later).

[0024] The power conversion section of the power conversion device 100 is constituted by a first semiconductor module (IGBT 101a and diode 102a), a second semiconductor module (IGBT 101c and diode 102c), a third semiconductor module (IGBT 101d and diode 102d), and a fourth semiconductor module (IGBT 101b and diode 102b).

[0025] The first semiconductor module (IGBT 101a and diode 102a) and the fourth semiconductor module (IGBT 101b and diode 102b) have substantially equal amounts of current passing therethrough during operation of the power conversion device 100. Also, the second semiconductor module (IGBT 101c and diode 102c) and the third semiconductor module (IGBT 101d and diode 102d) have substantially equal amounts of current passing therethrough during operation of the power conversion device 100.

[0026] Each power semiconductor module 106 constituting the power conversion device 100 is turned on and off respectively by a gate drive signal 113 output from the gate drive circuit 112.

[0027] FIG. 2 is a diagram showing an example of the power semiconductor module 106 constituting the power conversion device 100 of FIG. 1.

[0028] As shown in the left diagram of FIG. 2, the power semiconductor module 106 includes a set of IGBT 101 and diode 102 constituting the power conversion device 100. Inside the power semiconductor module 106, the IGBT 101 and the diode 102 are connected semi-parallelly, and the collector 107, emitter 108, and gate 109 of the IGBT 101 are configured to be electrically connectable to the outside of the power semiconductor module 106 via their respective terminals.

[0029] As shown in the right diagram of FIG. 2, a heat dissipation surface 111 is provided on the back surface of the power semiconductor module 106. The heat dissipation surface 111 is thermally connected to the IGBT 101 and the diode 102, and the heat generated by the IGBT 101 and the diode 102 is dissipated to the outside through the heat dissipation surface 111.

[0030] As shown in the middle and right figures of FIG. 2, the power semiconductor module 106 is provided with mounting holes 110, and can be mounted and fixed to a cooling device such as a heat sink using the mounting holes 110 and fixtures such as screws. By such fixing, the heat dissipation surface 111 can be brought into contact with the heat sink, so the heat generated by the IGBT 101 and the diode 102 is transmitted to the heat sink through the heat dissipation surface 111 and dissipated to the outside.

[0031] In this embodiment, an example is shown in which one power semiconductor module 106 is used per arm. However, for the purpose of increasing the output capacity of the power conversion device, it is also possible to connect two or more power semiconductor modules 106 in parallel per arm.

[0032] Using FIGS. 3 and 4, the instantaneous current and effective current during discharge of the power conversion device 100 will be described.

[0033] FIG. 3 shows an example of the instantaneous current waveform 201 and the effective current waveform 202 of the outer arm during discharge of the power conversion device 100, and FIG. 4 shows an example of the instantaneous current waveform 203 and the effective current waveform 204 of the inner arm during discharge of the power conversion device 100.

[0034] FIG. 3 shows the current flowing through the IGBT 101a during operation in the discharge mode. It can be seen that the on-time of the IGBT 101a is long in the region where the instantaneous current value 201 is relatively large. Therefore, the effective current value 202, which is represented by the product of the on-duty of the IGBT 101a (the on-time per carrier cycle) and the instantaneous current value 201, increases in the range of the region where the instantaneous current value is large.

[0035] On the other hand, FIG. 4 shows the current flowing through the IGBT 101d that switches in pairs with the IGBT 101a (turns off when the IGBT 101a turns on and turns on when the IGBT 101a turns off). The on-time of the IGBT 101d is long in the region where the instantaneous current value 203 is relatively small, and the effective current value 204 becomes small overall.

[0036] Therefore, the effective current value for one cycle of alternating current is larger for the former (IGBT101a) than for the latter (IGBT101d).

[0037] Similar biases also exist in the effective current values of IGBT101b and IGBT101c that switch in pairs with IGBT101b.

[0038] As a result of such a bias in the effective current value, in the discharge mode of the T-type three-level power conversion device, the loss of the inner arm becomes smaller than the loss of the outer arm. On the other hand, in the case of the charging mode in which power is sent from the AC side to the DC side, the effective current value and the loss of the inner arm become larger than those of the outer arm. In the charging mode and the discharge mode, the magnitude relationship between the loss of the outer arm and the loss of the inner arm is reversed.

[0039] That is, the power conversion device 100 has an operation method in which the amount of current flowing through the outer arm is larger than the amount of current flowing through the inner arm, and an operation method in which the amount of current flowing through the outer arm is smaller than the amount of current flowing through the inner arm.

[0040] Fig. 5 shows a calculation example of the losses of the outer arm and the inner arm in the discharge mode of the T-type three-level power conversion device. As shown in Fig. 5, the outer arm has a larger loss than the inner arm, and in this calculation example, the difference is about 1.5 times the result.

[0041] Fig. 6 shows a calculation example of the losses of the outer arm and the inner arm in the charging mode of the T-type three-level power conversion device. As shown in Fig. 6, the inner arm has a larger loss than the outer arm, and in this calculation example, the difference is about 1.5 times the result.

[0042] To cope with such losses, the inner arm needs to be attached with a heat sink assuming the losses during charging when the maximum loss occurs. On the other hand, the outer arm needs to be attached with a heat sink assuming the losses during discharging. However, in the operation mode with small losses, since the heat sink has excessive performance, there is a problem that the power conversion device becomes large-sized.

[0043] Therefore, in this embodiment, the power conversion device 100 is implemented with the configuration as shown in FIG. 7.

[0044] FIG. 7 is a diagram showing an example of mounting the power semiconductor module 106 and the heat sink 115 in the power conversion device 100.

[0045] As shown in FIG. 7, a device block 114a is configured by arranging the power semiconductor module 106a which is one outer arm and the power semiconductor module 106c which is one inner arm in proximity to form one set. Further, a device block 114b is configured by arranging the power semiconductor module 106b which is another outer arm and the power semiconductor module 106d which is another inner arm in proximity to form one set.

[0046] Within the device block 114a, let the distance between the power semiconductor module 106a constituting the outer arm and the power semiconductor module 106c constituting the inner arm be α. Also, within the device block 114b, let the distance between the power semiconductor module 106b constituting the outer arm and the power semiconductor module 106d constituting the inner arm be α. Further, when the distance between the device blocks 114a and 114b is β, it is configured such that the distance β is larger than the distance α (β > α).

[0047] In the example of FIG. 7, a total of four power semiconductor modules 106a to 106d are arranged in a row on the printed circuit board 105, and the distances α and β are linearly arranged. The four power semiconductor modules 106a to 106d are connected to a single heat sink 115 for heat dissipation. Cooling air 116 passes parallel to the heat sink 115 to dissipate the heat of the heat sink 115 to the outside. The power semiconductor modules 106a to 106d are arranged substantially linearly with respect to the heat sink 115 in the order of the semiconductor module 106a, the semiconductor module 106c, the semiconductor module 106d, and the semiconductor module 106b.

[0048] Since each of the device blocks 114a and 114b is composed of a set with the outer arm and the inner arm arranged in proximity, the total loss in each device block is smaller than when the outer arm and the inner arm are individual in terms of the bias between the loss during charging and the loss during discharging.

[0049] Also, since the distance β between the device blocks 114a and 114b is set larger than the distance α within each device block, the thermal interference is smaller between the device blocks than within each device block (between the outer arm and the inner arm). For example, during charging, the fin thermal resistance of the inner arm is reduced compared to the case where α = β or α > β, so the temperature rise can be suppressed. On the other hand, for the outer arm, the thermal interference from the inner arm increases compared to the case where α = β or α > β, so the fin thermal resistance appears to increase.

[0050] FIG. 8 shows an example of the calculation results of the temperature rise using a thermal fluid simulation during charging where the loss of the inner arm is larger than the loss of the outer arm for the case of α > β and the case of α < β (the configuration of FIG. 7).

[0051] The temperature rise of the inner arms (power semiconductor modules 106c and 106d) was smaller when α < β than when α > β. On the other hand, the temperature rise of the outer arms (power semiconductor modules 106a and 106b) was larger when α < β than when α > β.

[0052] Therefore, by setting α < β (the configuration of FIG. 7), the difference in the temperature rise between the outer arm and the inner arm is reduced, and the maximum temperature rise can be suppressed. Thus, it can be seen that the utilization efficiency of the heat sink is improved.

[0053] As described above, the power conversion device 100 of the present embodiment includes a power conversion unit having a first semiconductor module 106a and a fourth semiconductor module 106b through which substantially equal currents pass during operation, and a second semiconductor module 106c and a third semiconductor module 106d through which substantially equal currents pass during operation, and a cooling body (heat sink 115) in which the first semiconductor module 106a, the second semiconductor module 106c, the third semiconductor module 106d, and the fourth semiconductor module 106b are arranged. The third thermal interference between the second semiconductor module 106c and the third semiconductor module 106d is configured to be smaller than the first thermal interference between the first semiconductor module 106a and the second semiconductor module 106c and the second thermal interference between the third semiconductor module 106d and the fourth semiconductor module 106b.

[0054] Thereby, the thermal interference between the power semiconductor modules 106 during charging and discharging of the power conversion device 100 can be equalized. As a result, the maximum temperature rise associated with power conversion can be suppressed, contributing to the miniaturization of the cooling device such as the heat sink 115 and the miniaturization of the power conversion device 100 including the cooling device.

Embodiment

[0055] With reference to FIG. 9, a power conversion device according to Embodiment 2 of the present invention will be described.

[0056] FIG. 9 is a diagram showing an example of mounting of the power semiconductor module 106 and the heat sink 115 in the power conversion device 100 of this embodiment.

[0057] As shown in FIG. 9, in the power conversion device 100 of this embodiment, the power semiconductor modules 106a to 106d are arranged at equal distances (equal intervals) in the order of the outer arm, the inner arm, the inner arm, and the outer arm. Further, in the heat sink 115, there are provided a high cooling performance region 301 in which cooling fins are densely arranged to enhance the cooling capacity, and a low cooling performance region 302 in which the cooling fins are arranged more sparsely than in the region 301.

[0058] The high cooling performance region 301 is arranged between the device block 114a and the other device block 114b. The low cooling performance region 302 is arranged in each of the device blocks 114a and 114b.

[0059] That is, the number of cooling fins arranged between the semiconductor module 106a and the semiconductor module 106c (two in FIG. 9) and the number of cooling fins arranged between the semiconductor module 106d and the semiconductor module 106b (two in FIG. 9) of the heat sink 115 are less than the number of cooling fins arranged between the semiconductor module 106c and the semiconductor module 106d (five in FIG. 9).

[0060] By adopting such an arrangement, the heat interference between the device blocks 114a and 114b can be suppressed more than the heat interference within each of the device blocks 114a and 114b. Therefore, as in the first embodiment, the difference between the temperature rise of the outer arm and the temperature rise of the inner arm is reduced, and the maximum temperature rise can be suppressed.

Embodiment

[0061] With reference to FIG. 10, a power conversion device according to Embodiment 3 of the present invention will be described.

[0062] FIG. 10 is a diagram showing an example of mounting of the power semiconductor module 106 and the heat sink 115 in the power conversion device 100 of this embodiment.

[0063] As shown in FIG. 10, in the power conversion device 100 of this embodiment, a heat sink 115 configured to sandwich heat radiation fins 402 with two heat radiation bases 401 is provided. A device block 114a is arranged on one heat radiation base 401, and a device block 114b is arranged on the other heat radiation base 401.

[0064] Since the cooling air 116 flows through the heat sink 115 between the device blocks 114a and 114b, heat interference between the device blocks 114a and 114b can be suppressed.

[0065] Note that the present invention is not limited to the above-described embodiments, and various modifications are included. For example, the above-described embodiments have been described in detail for easy understanding of the present invention, and are not necessarily limited to those having all the configurations described. Also, a part of the configuration of one embodiment can be replaced with the configuration of another embodiment, and the configuration of another embodiment can also be added to the configuration of one embodiment. Further, for a part of the configuration of each embodiment, addition, deletion, or replacement with other configurations is possible.

Explanation of Reference Numerals

[0066] 100... Power conversion device 101, 101a, 101b, 101c, 101d... IGBT 102, 102a, 102b, 102c, 102d... Diode 103... Power system 104... Storage battery 105... Printed circuit board 106, 106a, 106b, 106c, 106d... Power semiconductor module 107... Collector (terminal) 108... Emitter (terminal) 109... Gate (terminal) 110... Mounting hole 111... Heat radiation surface 112... Gate drive circuit 113... Gate drive signal 114, 114a, 114b... device block 115... heat sink 116... cooling air 201, 203... instantaneous current value (waveform) 202, 204... effective current value (waveform) 301... high cooling performance region 302... low cooling performance region 401... heat dissipation base 402... heat dissipation fin.

Claims

1. A power conversion unit having a first semiconductor module and a fourth semiconductor module through which substantially equal currents flow during operation, and a second semiconductor module and a third semiconductor module through which substantially equal currents flow during operation, and a cooling body on which the first semiconductor module, the second semiconductor module, the third semiconductor module, and the fourth semiconductor module are arranged, wherein a third thermal interference between the second semiconductor module and the third semiconductor module is smaller than a first thermal interference between the first semiconductor module and the second semiconductor module and a second thermal interference between the third semiconductor module and the fourth semiconductor module. A power conversion device characterized by that.

2. The power conversion device according to claim 1, wherein the first semiconductor module, the second semiconductor module, the third semiconductor module, and the fourth semiconductor module are arranged substantially linearly in this order on the cooling body. A power conversion device characterized by that.

3. The power conversion device according to claim 1, wherein the first semiconductor module and the fourth semiconductor module function as outer arms of the power conversion device, and the second semiconductor module and the third semiconductor module function as inner arms of the power conversion device. A power conversion device characterized by that.

4. The power conversion device according to claim 1, wherein a third distance between the second semiconductor module and the third semiconductor module is larger than a first distance between the first semiconductor module and the second semiconductor module and a second distance between the third semiconductor module and the fourth semiconductor module. A power conversion device characterized by that.

5. The power conversion device according to claim 1, a first operation method in which the current flowing through the first semiconductor module and the fourth semiconductor module is larger than the current flowing through the second semiconductor module and the third semiconductor module; a second operation method in which the current flowing through the first semiconductor module and the fourth semiconductor module is smaller than the current flowing through the second semiconductor module and the third semiconductor module; A power conversion device characterized by having.

6. The power conversion device according to claim 1, The cooling body is characterized in that the cooling performance between the second semiconductor module and the third semiconductor module is higher than the cooling performance between the first semiconductor module and the second semiconductor module and the cooling performance between the third semiconductor module and the fourth semiconductor module. A power conversion device.

7. The power conversion device according to claim 6, wherein the number of heat dissipation fins disposed between the second semiconductor module and the third semiconductor module is larger than the number of heat dissipation fins disposed between the first semiconductor module and the second semiconductor module and the number of heat dissipation fins disposed between the third semiconductor module and the fourth semiconductor module. A power conversion device characterized by this.

8. The power conversion device according to claim 1, wherein the cooling body includes a first heat dissipation base on which the first semiconductor module and the second semiconductor module are disposed, a second heat dissipation base on which the third semiconductor module and the fourth semiconductor module are disposed, and heat dissipation fins disposed between the first heat dissipation base and the second heat dissipation base. A power conversion device characterized by comprising the above.

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