Light-emitting display device

Abstract

To provide a light-emitting display device in which each of multiple display areas of a display panel can selectively limit a viewing angle.SOLUTION: A light-emitting display device includes a display panel in which multiple display areas including a first display area and a second display area are defined, multiple sub-pixels disposed in each of the multiple display areas, and a gate driver implemented on the multiple display areas. Each of the multiple sub-pixels includes a first light-emitting element that emits light in response to a driving current, a first lens that refracts the light emitted from the first light-emitting element, a second light-emitting element that emits light in response to the driving current, and a second lens that refracts the light emitted from the second light-emitting element and has a shape different from the first lens. Accordingly, the device can operate the light-emitting display device in any one of a narrow view mode and a wide view by using the first lens and the second lens.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a light-emitting display device, and more particularly, to a light-emitting display device capable of controlling a viewing angle.

Background Art

[0002] An organic light-emitting diode (OLED), which is a self-luminous element, includes an anode electrode, a cathode electrode, and an organic compound layer formed therebetween. The organic compound layer consists of a hole transport layer (HTL), an emission layer (EML), and an electron transport layer (ETL). When a driving voltage is applied to the anode electrode and the cathode electrode, holes that have passed through the hole transport layer (HTL) and electrons that have passed through the electron transport layer (ETL) move to the emission layer (EML) to form excitons, and as a result, the emission layer (EML) generates visible light. An active matrix type light-emitting display device includes organic light-emitting diodes (OLEDs) that emit light by themselves, and is widely used due to its advantages of fast response speed, high luminous efficiency, high luminance, and large viewing angle.

[0003] A light-emitting display device arranges pixels each including an organic light-emitting diode in a matrix form, and adjusts the luminance of the pixels according to the gradation of video data.

Summary of the Invention

Problems to be Solved by the Invention

[0004] Generally, although the viewing angle of a light-emitting display device is not restricted, it is beneficial to restrict the viewing angle for reasons such as privacy protection and information protection.

[0005] Furthermore, when the light-emitting display device is used to provide vehicle driving information, the image displayed by the light-emitting display device may be reflected from the window of the vehicle, blocking the driver's field of vision. Such image reflection in a vehicle is particularly severe during night driving and may have an adverse effect on the safe driving of the driver. Therefore, it is required that the viewing angle of the light-emitting display device applied to a vehicle be restricted.

[0006] Such a viewing angle restriction varies depending on whether the vehicle is running and whether the driver and passengers are watching. Therefore, it is necessary to selectively switch the viewing angle.

[0007] Also, in some countries, it may be prohibited to show the driver the multimedia reproduced in front of the passenger seat. Therefore, it is necessary to selectively switch the viewing angle.

[0008] According to one or more embodiments of the present invention, there is provided a light-emitting display device capable of selectively restricting the viewing angle in each of a plurality of display areas of a display panel.

[0009] According to one or more embodiments of the present invention, there is provided a light-emitting display device capable of independently driving a narrow viewing angle mode and a wide viewing angle mode in each of a plurality of display areas.

[0010] According to another embodiment of the present invention, there is provided a light-emitting display device with a reduced bezel.

[0011] According to another embodiment of the present invention, there is provided a light-emitting display device that reduces the delay generated in the process of transmitting the signal output from the gate driving unit to the signal line.

[0012] The technical effects of the present invention are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the following description.

Means for Solving the Problems

[0013] The light-emitting display device according to an embodiment of the present invention includes a display panel in which a plurality of display areas including a first display area and a second display area are defined, a plurality of sub-pixels arranged in each of the plurality of display areas, and a gate driving unit mounted on the plurality of display areas. Each of the plurality of sub-pixels includes a first light-emitting element that emits light by a driving current, a first lens that refracts light from the first light-emitting element, a second light-emitting element that emits light by a driving current, and a second lens that refracts light from the second light-emitting element and has a shape different from that of the first lens. Therefore, the present invention can drive the light-emitting display device in either a narrow viewing angle mode or a wide viewing angle mode using the first lens and the second lens.

[0014] The light-emitting display device according to another embodiment of the present invention includes a display panel in which a display area including a first display area and a second display area is defined, a plurality of sub-pixels arranged in each of the first display area and the second display area, and a gate driving unit mounted on the first display area and the second display area. Each of the plurality of sub-pixels includes a first light-emitting element that emits light by a driving current in a narrow viewing angle mode, a hemispherical lens configured to refract light from the first light-emitting element so as to limit a viewing angle with respect to a first direction and a second direction, a second light-emitting element that emits light by a driving current in a wide viewing angle mode, and a semi-cylindrical lens configured to refract light from the second light-emitting element so as to limit a viewing angle only with respect to the first direction. Therefore, the present invention can independently drive each of the first display area and the second display area in either a narrow viewing angle mode or a wide viewing angle mode.

[0015] Specific matters of other embodiments are included in the detailed description and the drawings.

Effect of the Invention

[0016] The present invention can independently drive a narrow viewing angle mode and a wide viewing angle mode in each of a plurality of display areas.

[0017] The present invention can selectively limit the viewing angle in each of a plurality of display areas.

[0018] The present invention can reduce the delay generated in the process of the signal output from the gate driving unit being transmitted to the signal line.

[0019] The present invention can minimize the bezel by mounting the gate driving unit in the display area.

[0020] The effects according to the present invention are not limited by the contents exemplified above, and more various effects are included in the present invention.

Brief Description of Drawings

[0021]

Figure 1

Figure 2

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Figure 4A

Figure 4B

Figure 5A

Figure 5B

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Figure 7

Figure 8A

Figure 8B

Figure 9A

Figure 9B

Figure 9C

Figure 9D

Figure 10

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Figure 12

Embodiments for Carrying Out the Invention

[0022] The advantages and features of the present invention, and the methods for achieving them, will become clear by referring to the embodiments described in detail below together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, and is configured in various different shapes. Merely, these embodiments are provided so that the disclosure of the present invention is complete, and to fully inform those with ordinary knowledge in the technical field to which the present invention pertains of the scope of the invention. The present invention is defined only by the claims.

[0023] The shapes, areas, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are illustrative, and thus the present invention is not limited to the illustrated matters. Throughout the specification, the same reference numerals refer to the same components. Further, in explaining the present invention, when it is determined that a detailed description of related known technologies may obscure the gist of the present invention, the detailed description thereof is omitted. When terms such as "including", "having", and "being made" mentioned in the present invention are used, other parts may be added as long as "only" is not used. When a component is expressed in the singular, it includes a plurality unless otherwise explicitly stated.

[0024] When interpreting a component, it is interpreted to include an error range even without a separate explicit description.

[0025] When explaining the positional relationship, for example, when the positional relationship between two parts is described such as "on", "above", "below", "next to", etc., one or more other parts may be located between the two parts as long as "immediately" or "directly" is not used.

[0026] An element or layer referred to as "on" another element or layer includes both the case where it is immediately above the other element and the case where another layer or another element is interposed in the middle.

[0027] Also, the first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are merely used to distinguish one component from another. Therefore, the first component referred to below may be the second component within the technical idea of the present invention.

[0028] Throughout the specification, the same reference numerals refer to the same components.

[0029] The area and thickness of each configuration shown in the drawings are shown for convenience of explanation, and the present invention is not necessarily limited to the area and thickness of the shown configuration.

[0030] Each feature of various embodiments of the present invention can be partially or wholly combined or combined with each other, enabling various technical linkages and drives, and each embodiment may be implemented independently of each other or may be implemented together in a related relationship.

[0031] In the following, the present invention will be described with reference to the drawings.

[0032] FIG. 1 is a schematic plan view of a light-emitting display device according to an embodiment of the present invention. In FIG. 1, for convenience of explanation, only the display panel PN, a plurality of flexible films COF, and a plurality of printed circuit boards PCB among various components of the light-emitting display device 100 are shown.

[0033] Referring to FIG. 1, a light-emitting display device 100 according to an embodiment of the present invention includes a display panel PN, a plurality of flexible films COF, and a plurality of printed circuit boards PCB.

[0034] The display panel PN is a configuration for displaying an image to a user, and a light-emitting element for displaying an image, a pixel circuit for driving the light-emitting element, signal lines for transmitting various signals to the light-emitting element and the pixel circuit, etc. may be arranged.

[0035] The display panel PN includes a display area AA and a non-display area NA.

[0036] The display area AA is an area where an image is displayed on the display panel PN. In the display area AA, a plurality of sub-pixels SP constituting a plurality of pixels and a circuit for driving the plurality of sub-pixels SP may be arranged. The plurality of sub-pixels SP are the minimum units constituting the display area AA, a plurality of scan signal lines and a plurality of data lines intersect each other, and each of the plurality of sub-pixels SP may be connected to the scan signal lines and the data lines.

[0037] The display area AA includes a first display area AA1 and a second display area AA2. The first display area AA1 and the second display area AA2 are independently driven areas, and each of the first display area AA1 and the second display area AA2 can be driven in either a wide viewing angle (shared) mode or a narrow viewing angle (private) mode in the left-right direction. The first display area AA1 and the second display area AA2 may be driven in the same mode or in different modes from each other. In the narrow viewing angle mode, only some of the viewers among a plurality of viewers having a narrow viewing angle in the left-right direction can view the video, and in the wide viewing angle mode, more viewers can view the video with a wide viewing angle in the left-right direction. A more detailed description of the narrow viewing angle mode and the wide viewing angle mode will be described later with reference to FIGS. 4A to 6.

[0038] The non-display area NA is an area where no video is displayed. In the non-display area NA, various signal lines and circuits for driving the light-emitting elements of the display area AA are arranged. For example, in the non-display area NA, link wirings for transmitting signals to a plurality of sub-pixels SP and circuits of the display area AA may be arranged, but it is not limited thereto.

[0039] On the other hand, although not shown, a gate driving unit is arranged on the display panel PN. For example, the gate driving unit can be implemented in each of the first display area AA1 and the second display area AA2 of the display panel PN in a GIA (Gate In Active area) method. In the light-emitting display device 100 according to an embodiment of the present invention, the gate driving unit is implemented in the display area AA to reduce the area of the non-display area NA, and the wide viewing angle mode and the narrow viewing angle mode of the first display area AA1 and the second display area AA2 can be independently driven. A more detailed description of the gate driving unit will be described later with reference to FIGS. 10 and 11.

[0040] One or more flexible films COF are arranged at one end of the display panel PN. The plurality of flexible films COF can be electrically connected to the non-display area NA of the display panel PN. The plurality of flexible films COF are films on which various components are arranged on a ductile base film and supply signals to a plurality of sub-pixels SP and a driving circuit in the display area AA, and can be electrically connected to the display panel PN. For example, the plurality of flexible films COF can supply a power supply voltage, a data voltage, etc. to a plurality of sub-pixels SP and a driving circuit in the display area AA.

[0041] On the other hand, a driving IC such as a data driver IC can be arranged on the plurality of flexible films COF. The driving IC is a component that processes data for displaying an image and a driving signal for processing the same. The driving IC can be arranged in a method such as Chip On Glass (COG), Chip On Film (COF), Tape Carrier Package (TCP), etc. depending on the mounting method. However, for the sake of convenience of explanation, it has been described that the driving IC is in the Chip On Film method mounted on the plurality of flexible films COF, but it is not limited thereto. Further, the driving IC may be integrated with a timing controller and arranged as a single chip.

[0042] Each of the plurality of printed circuit boards PCB is electrically connected to the plurality of flexible films COF. The plurality of printed circuit boards PCB are components that supply signals to the driving IC. The plurality of printed circuit boards PCB can have various components arranged thereon for supplying various signals such as a driving signal, a data signal, etc. to the driving IC.

[0043] Hereinafter, the display panel of the light-emitting display device 100 according to an embodiment of the present invention will be described with reference to FIGS. 2 to 3.

[0044] FIG. 2 is a schematic cross-sectional view of a light-emitting display device according to an embodiment of the present invention. FIG. 3 is a schematic cross-sectional view of the display panel of the light-emitting display device according to an embodiment of the present invention.

[0045] Referring to FIG. 2, a light-emitting display device 100 according to an embodiment of the present invention includes a display panel PN, a light-shielding pattern 210, an optical gap layer 220, a lens layer 230, a planarization film 240, and a polarizing layer 250.

[0046] Referring to FIGS. 2 and 3 together, the display panel PN includes a substrate 110, a plurality of first light-emitting elements De1, a plurality of second light-emitting elements De2, and a sealing layer 190.

[0047] On the substrate 110, a plurality of sub-pixels SP including first to third sub-pixels SP1, SP2, and SP3 are defined. And each of the first to third sub-pixels SP1, SP2, and SP3 has a first light-emitting part (light-emitting region) EA1 and a second light-emitting part (light-emitting region) EA2.

[0048] The first light-emitting part EA1 is provided with a first light-emitting element De1, and the second light-emitting part EA2 is provided with a second light-emitting element De2.

[0049] The first to third sub-pixels SP1, SP2, and SP3 may be a red sub-pixel, a green sub-pixel, and a blue sub-pixel, respectively. Accordingly, the first light-emitting element De1 and the second light-emitting element De2 of the first sub-pixel SP1 emit red light, the first light-emitting element De1 and the second light-emitting element De2 of the second sub-pixel SP2 emit green light, and the first light-emitting element De1 and the second light-emitting element De2 of the third sub-pixel SP3 may emit blue light.

[0050] Referring to FIGS. 2 and 3, the display panel PN of a light-emitting display device 100 according to an embodiment of the present invention includes a substrate 110, a plurality of thin-film transistors Tr1, Tr2, a plurality of light-emitting elements De1, De2, and a sealing layer 190.

[0051] Specifically, on the substrate 110, each sub-pixel SP includes a first light-emitting part EA1 and a second light-emitting part EA2. The substrate 110 may be a glass substrate or a plastic substrate.

[0052] As an example, polyimide (PI) can be used as the plastic substrate, but it is not limited thereto.

[0053] A buffer layer 120 is formed on the upper part of the substrate 110. The buffer layer 120 is located substantially on the entire surface of the substrate 110. The buffer layer 120 can be formed of an inorganic substance such as silicon oxide (SiO2) or silicon nitride (SiNx), and can be a single layer or a multilayer.

[0054] Patterned first semiconductor layers 122 and second semiconductor layers 124 are respectively formed on the first light-emitting part EA1 and the second light-emitting part EA2 above the buffer layer 120.

[0055] Each of the first semiconductor layer 122 and the second semiconductor layer 124 can be made of an oxide semiconductor material. In this case, a shield pattern can be further formed under the first semiconductor layer 122 and the second semiconductor layer 124. The shield pattern blocks light incident on the first semiconductor layer 122 and the second semiconductor layer 124 to prevent the first semiconductor layer 122 and the second semiconductor layer 124 from being deteriorated by light.

[0056] In contrast, each of the first semiconductor layer 122 and the second semiconductor layer 124 may be made of polycrystalline silicon. In this case, impurities may be doped at both edges of each of the first semiconductor layer 122 and the second semiconductor layer 124.

[0057] A gate insulating film 130 made of an insulating substance is formed substantially on the entire surface of the substrate 110 above the first semiconductor layer 122 and the second semiconductor layer 124. The gate insulating film 130 can be formed of an inorganic insulating substance such as silicon oxide (SiO2) or silicon nitride (SiNx).

[0058] At this time, when the first semiconductor layer 122 and the second semiconductor layer 124 are made of an oxide semiconductor material, the gate insulating film 130 can be formed of silicon oxide (SiO2). In contrast, when the first semiconductor layer 122 and the second semiconductor layer 124 are made of polycrystalline silicon, the gate insulating film 130 can be formed of silicon oxide (SiO2) or silicon nitride (SiNx).

[0059] On top of the gate insulating film 130, a first gate electrode 132 and a second gate electrode 134 made of a conductive material such as metal are formed corresponding to the first semiconductor layer 122 and the second semiconductor layer 124, respectively. Also, a scan signal line (not shown) can be formed on top of the gate insulating film 130. The scan signal line can extend along one direction.

[0060] On the other hand, in one embodiment of the present invention, although the gate insulating film 130 is formed on the entire surface of the substrate 110, the gate insulating film 130 may be patterned in the same pattern as the first gate electrode 132 and the second gate electrode 134 and disposed only under the first gate electrode 132 and the second gate electrode 134.

[0061] On top of the first gate electrode 132 and the second gate electrode 134, an interlayer insulating film 140 made of an insulating material is formed substantially on the entire surface of the substrate 110. The interlayer insulating film 140 can be formed of an inorganic insulating material such as silicon oxide (SiO2) or silicon nitride (SiNx), or an organic insulating material such as photo acryl or benzocyclobutene.

[0062] The interlayer insulating film 140 has contact holes that expose the upper surfaces on both sides of the first semiconductor layer 122 and the second semiconductor layer 124, respectively. The contact holes may also be formed within the gate insulating film 130. On the first light-emitting portion EA1 and the second light-emitting portion EA2 above the interlayer insulating film 140, a first source electrode 142, a first drain electrode 144, a second source electrode 146, and a second drain electrode 148 are respectively formed of a conductive material such as metal. Also, on the upper portion of the interlayer insulating film 140, a data line (not shown) and a power supply line (not shown) extending along a direction perpendicular to a certain direction may be formed.

[0063] The first source electrode 142 and the first drain electrode 144 are in contact with both sides of the first semiconductor layer 122 through the contact holes of the interlayer insulating film 140, and the second source electrode 146 and the second drain electrode 148 are in contact with both sides of the second semiconductor layer 124 through the contact holes of the interlayer insulating film 140. Although not shown, the data line extends along a direction perpendicular to a certain direction, intersects the scan signal line to define a pixel region corresponding to each sub-pixel SP, and the power supply line that supplies a high-potential voltage is located at a distance from the data line.

[0064] On the other hand, the first semiconductor layer 122, the first gate electrode 132, the first source electrode 142, and the first drain electrode 144 form the first thin-film transistor Tr1, and the second semiconductor layer 124, the second gate electrode 134, the second source electrode 146, and the second drain electrode 148 form the second thin-film transistor Tr2.

[0065] One or more thin-film transistors having the same structure as the first thin-film transistor Tr1 and the second thin-film transistor Tr2 may be further formed on the substrate 110 of each sub-pixel SP, but are not limited thereto.

[0066] On top of the first source electrode 142, the first drain electrode 144, the second source electrode 146, and the second drain electrode 148, a protective film 150 made of an insulating material is substantially formed over the entire surface of the substrate 110. The protective film 150 can be formed of an organic insulating material such as photoacrylic or benzocyclobutene. Such a protective film 150 has a flat upper surface.

[0067] On the other hand, an insulating film made of an inorganic insulating material such as silicon oxide (SiO2) or silicon nitride (SiNx) may be further formed between the lower part of the protective film 150, that is, between the first thin film transistor Tr1 and the second thin film transistor Tr2 and the protective film 150.

[0068] The protective film 150 has a first drain contact hole 150a and a second drain contact hole 150b that expose the first drain electrode 144 and the second drain electrode 148, respectively.

[0069] On the upper part of the protective film 150, a first anode electrode 162 and a second anode electrode 164 are formed of a conductive material having a relatively high work function. The first anode electrode 162 is located in the first light emitting part EA1 and is in contact with the first drain electrode 144 through the first drain contact hole 150a. And the second anode electrode 164 is located in the second light emitting part EA2 and is in contact with the second drain electrode 148 through the second drain contact hole 150b.

[0070] As an example, each of the first anode electrode 162 and the second anode electrode 164 can be formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), but is not limited thereto.

[0071] On the one hand, the display panel PN of the light-emitting display device 100 according to an embodiment of the present invention may be a top emission type in which light of a plurality of light-emitting elements is output upward from the substrate 110. Accordingly, each of the first anode electrode 162 and the second anode electrode 164 may further include a reflective electrode or a reflective layer formed of a metal material having a high reflectivity under a transparent conductive material. For example, the reflective electrode or the reflective layer may be made of an aluminum-palladium-copper (APC) alloy, silver (Ag), or aluminum (Al). At this time, each of the first anode electrode 162 and the second anode electrode 164 may have a triple-layer structure of ITO / APC / ITO, ITO / Ag / ITO, or ITO / Al / ITO, but is not limited thereto.

[0072] On top of the first anode electrode 162 and the second anode electrode 164, a bank 165 is formed of an insulating material. The bank 165 overlaps with the edges of the first anode electrode 162 and the second anode electrode 164 and covers the edges of the first anode electrode 162 and the second anode electrode 164. The bank 165 has a first opening 165a and a second opening 165b that expose the first anode electrode 162 and the second anode electrode 164.

[0073] At least the upper surface of the bank 165 is hydrophobic, and the side surface of the bank 165 may be hydrophobic or hydrophilic. Such a bank 165 may be formed of an organic insulating material having hydrophobic properties. Alternatively, the bank 165 may be formed of an organic insulating material having hydrophilic properties and may be subjected to a hydrophobic treatment.

[0074] In the present invention, the bank 165 has a single-layer structure, but the bank 165 may have a double-layer structure. That is, the bank 165 may have a double-layer structure including a lower hydrophilic bank 165 and an upper hydrophobic bank 165.

[0075] Next, a light-emitting layer 170 is formed on top of the first anode electrode 162 and the second anode electrode 164 exposed through the first opening 165a and the second opening 165b of the bank 165. The light-emitting layer 170 on top of the first anode electrode 162 and the light-emitting layer 170 on top of the second anode electrode 164 are connected and integrated. However, the present invention is not limited thereto, and the light-emitting layer 170 on top of the first anode electrode 162 and the light-emitting layer 170 on top of the second anode electrode 164 may be separated from each other.

[0076] Although not shown, the light-emitting layer 170 may include a first charge assisting layer, a light-emitting material layer, and a second charge assisting layer that are sequentially positioned from above the first anode electrode 162 and the second anode electrode 164. The light-emitting material layer may be made of any one of red, green, and blue light-emitting materials and is not limited thereto. Such a light-emitting material may be an organic light-emitting material such as a phosphorescent compound or a fluorescent compound. However, the present invention is not limited thereto, and an inorganic light-emitting material such as a quantum dot may be used.

[0077] The first charge assisting layer may be a hole auxiliary layer, and the hole auxiliary layer may include at least one of a hole injection layer (HIL) and a hole transport layer (HTL). Also, the second charge assisting layer may be an electron auxiliary layer, and the electron auxiliary layer may include at least one of an electron injection layer (EIL) and an electron transport layer (ETL).

[0078] The light-emitting layer 170 may be formed through an evaporation process. At this time, a fine metal mask (FMM) may be used to pattern the light-emitting layer 170 for each sub-pixel SP. Alternatively, the light-emitting layer 170 may be formed through a solution process. In this case, the light-emitting layer 170 may be provided only in the first opening 165a and the second opening 165b, and the height of the light-emitting layer 170 may increase as it approaches the bank 165.

[0079] A cathode electrode 180 made of a conductive material with a relatively low work function is formed on the light emitting layer 170 substantially over the entire surface of the substrate 110. The cathode electrode 180 may be made of aluminum, magnesium, silver, or an alloy thereof. The cathode electrode 180 has a relatively thin thickness so that light from the light emitting layer 170 can be transmitted through it.

[0080] Alternatively, the cathode electrode 180 may be formed of a transparent conductive material such as, but not limited to, indium-gallium-oxide (IGO).

[0081] The first anode electrode 162, the light emitting layer 170, and the cathode electrode 180 of the first light emitting unit EA1 form a first light emitting element De1, and the second anode electrode 164, the light emitting layer 170, and the cathode electrode 180 of the second light emitting unit EA2 form a second light emitting element De2.

[0082] As mentioned above, the display panel PN according to one embodiment of the present invention may be a top emission type in which light from the light emitting layer 170 of the first light emitting element De1 and the second light emitting element De2 is output to the outside in the opposite direction to the substrate 110, for example, through the cathode electrode 180. Such a top emission type can have a wider light emitting area compared to a bottom emission type of the same area, thereby improving brightness and reducing power consumption.

[0083] Substantially over the entire surface of the substrate 110 above the cathode electrode 180, a sealing layer 190 having a flat upper surface is formed. The sealing layer 190 prevents moisture and oxygen from flowing into the first light-emitting element De1 and the second light-emitting element De2 from the outside. Therefore, the sealing layer 190 may also be referred to as an encapsulation layer.

[0084] Such a sealing layer 190 may have a laminated structure of a first inorganic film 192, an organic film 194, and a second inorganic film 196. Here, the organic film 194 may be a film that covers foreign substances generated during the manufacturing process.

[0085] Referring also to FIG. 2, above the display panel PN, specifically, above the sealing layer 190, a light-shielding pattern 210 is provided. The light-shielding pattern 210 is formed corresponding to between adjacent first to third sub-pixels SP1, SP2, SP3, or is formed corresponding to between the first light-emitting part EA1 and the second light-emitting part EA2.

[0086] Such a light-shielding pattern 210 may be a black matrix and may be made of a black resin, chromium oxide, or the like. Differently, the light-shielding pattern 210 may be a touch electrode and may be made of metal. At this time, the touch electrode includes a plurality of intersecting transmission electrodes and a plurality of reception electrodes, and touch can be sensed from the amount of change in capacitance between the plurality of transmission electrodes and the plurality of reception electrodes.

[0087] Above the light-shielding pattern 210, an optical gap layer 220 is provided. The optical gap layer 220 secures an optical gap between the first light-emitting element De1 and the second light-emitting element De2 and the lenses 232, 234 of the lens layer 230 so that the light from the first light-emitting element De1 and the second light-emitting element De2 is refracted in a specific direction by the lenses 232, 234, thereby improving the efficiency of the lenses 232, 234. Such an optical gap layer 220 may have a thickness of several to several tens of μm and may be made of an organic insulating material.

[0088] As an example, the optical gap layer 220 can be made of, but is not limited to, photo acryl, benzocyclobutene (BCB), polyimide (PI), or polyamide (PA).

[0089] On top of the optical gap layer 220, a lens layer 230 is provided. The lens layer 230 includes a first lens 232 and a second lens 234. The first lens 232 is disposed in the first light emitting portion EA1 and refracts the light from the first light emitting element De1 in a specific direction. And the second lens 234 is disposed in the second light emitting portion EA2 and refracts the light from the second light emitting element De2 in a specific direction. A part of each of the first lens 232 and the second lens 234 can overlap with the light shielding pattern 210.

[0090] The first lens 232 is a Half-Spherical Lens, and the second lens 234 is a Half-Cylindrical Lens. Thereby, the first light L1 emitted from the first light emitting element De1 of each sub-pixel SP is refracted at a specific angle by the first lens 232 and output. And the second light L2 emitted from the second light emitting element De2 of each sub-pixel SP is refracted at a specific angle by the second lens 234 and output. Thereby, the viewing angle of each sub-pixel SP can be restricted.

[0091] As shown in FIG. 2, in one embodiment, the first lens 232 at least partially overlaps with the first light emitting portion EA1, and the second lens 234 at least partially overlaps with the second light emitting portion EA2.

[0092] On top of the lens layer 230, a planarization film 240 is provided to protect the first lens 232 and the second lens 234. The planarization film 240 is made of an organic insulating material and has a flat upper surface. And the refractive index of the planarization film 240 is smaller than the refractive indices of the first lens 232 and the second lens 234.

[0093] As an example, the planarization film 240 can be made of, but not limited to, photo acryl, benzocyclobutene (BCB), polyimide (PI), or polyamide (PA).

[0094] On the upper part of the planarization film 240, a polarization layer 250 is provided. The polarization layer 250 can include a linear polarization layer and a retardation layer, and by converting the polarization state of external light incident on the display panel PN, it plays a role in preventing the external light from being reflected by the display panel PN and then emitted to the outside again.

[0095] On the other hand, the light-emitting display device 100 according to an embodiment of the present invention has each sub-pixel SP having a first light-emitting part EA1 and a second light-emitting part EA2, and a hemispherical first lens 232 is provided on the upper part of the first light-emitting part EA1, and a semi-cylindrical second lens 234 is provided on the upper part of the second light-emitting part EA2. By restricting the viewing angle, a wide viewing angle mode and a narrow viewing angle mode can be realized.

[0096] FIG. 4A is a diagram schematically showing the first lens of the light-emitting display device according to an embodiment of the present invention. FIG. 4B is a diagram schematically showing the second lens of the light-emitting display device according to an embodiment of the present invention.

[0097] As shown in FIG. 4A, the first lens 232 is a hemispherical lens and has a semi-circular cross-section in the X direction and the Y direction. Therefore, the first lens 232 restricts the viewing angles in the X direction and the Y direction.

[0098] In contrast, as shown in FIG. 4B, the second lens 234 is a semi-cylindrical lens, has a rectangular cross-section in the X direction, and has a semi-circular cross-section in the Y direction. Therefore, the second lens 234 restricts the viewing angle in the Y direction, and the viewing angle in the longitudinal direction of the second lens 234, for example, the X direction, is not restricted.

[0099] The angular field characteristics of the first lens 232 and the second lens 234 will be described with reference to FIGS. 5A and 5B.

[0100] FIG. 5A is a diagram showing the light profile with respect to the angular field of the first lens of the light-emitting display device according to an embodiment of the present invention. FIG. 5B is a diagram showing the light profile with respect to the angular field of the second lens of the light-emitting display device according to an embodiment of the present invention.

[0101] As shown in FIGS. 5A and 5B, the first light-emitting unit EA1 provided with the hemispherical first lens 232 has a narrow angular field of 30 degrees or less in any of the up, down, left, and right directions, while the second light-emitting unit EA2 provided with the semi-cylindrical second lens 234 has a narrow angular field of 30 degrees or less in the up and down directions and a wide angular field of 60 degrees or more in the left and right directions.

[0102] Therefore, by driving the first light-emitting unit EA1, the up and down narrow angular field modes and the left and right narrow angular field modes can be realized, and by driving the second light-emitting unit EA2, the up and down narrow angular field modes and the left and right wide angular field modes can be realized.

[0103] In the light-emitting display device 100 according to an embodiment of the present invention, the first and second lenses 232 and 234 can always realize a narrow angular field in the up and down directions. Also, the wide angular field mode and the narrow angular field mode can be selectively realized in the left and right directions.

[0104] The wide angular field mode and the narrow angular field mode in the left and right directions will be described with reference to FIG. 6.

[0105] FIG. 6 is a diagram schematically showing the operations of the wide angular field mode and the narrow angular field mode of the light-emitting display device according to an embodiment of the present invention.

[0106] As shown in FIG. 6, one pixel of the angular field conversion light-emitting display device 100 according to an embodiment of the present invention includes a plurality of sub-pixels SP, for example, the first to third sub-pixels SP1, SP2, and SP3, and each of the first to third sub-pixels SP1, SP2, and SP3 has the first light-emitting unit EA1 and the second light-emitting unit EA2.

[0107] A hemispherical first lens 232 is provided corresponding to the first light emitting part EA1, and a semi-cylindrical second lens 234 is provided corresponding to the second light emitting part EA2.

[0108] When operating in the wide viewing angle mode, the first light emitting element De1 of the first light emitting part EA1 is in the turn-off state, the second light emitting element De2 of the second light emitting part EA2 is in the turn-on state, and the light emitted from the second light emitting element De2 has its viewing angle restricted in the Y direction, for example, the up and down direction, by the second lens 234 and is output without restriction of the viewing angle in the X direction, for example, the left and right direction. That is, the viewing angle of the second lens 234 is different from that of the first lens 232 and is, in most cases, larger than the viewing angle of the first lens 232.

[0109] In contrast, when operating in the narrow viewing angle mode, the first light emitting element De1 of the first light emitting part EA1 is in the turn-on state, the second light emitting element De2 of the second light emitting part EA2 is in the turn-off state, and the light emitted from the first light emitting element De1 has its viewing angle restricted in the up and down direction and the left and right direction by the first lens 232 and is output.

[0110] Thus, the light emitting display device 100 according to an embodiment of the present invention can always have a narrow viewing angle in the up and down direction. And if the light emitting display device 100 according to an embodiment of the present invention having a narrow viewing angle in the up and down direction (for example, the vertical direction) is applied to a vehicle, it is possible to prevent the image from being reflected on the front glass of the vehicle and disturbing the driving view.

[0111] In addition, it is possible to display an image having a wide viewing angle in the left-right direction in the wide viewing mode and an image having a narrow viewing angle in the left-right direction (for example, the horizontal direction) in the narrow viewing mode. In the wide viewing mode, users in both the driver's seat and the passenger seat can view the image. In the narrow viewing mode, only one of the users in the driver's seat and the passenger seat can view the image. For example, according to one embodiment of the narrow viewing mode, the display device can display an image such that only the user sitting in either the driver's seat or the passenger seat can view the image, and they cannot view it simultaneously. That is, in one embodiment, during the narrow viewing mode, the degree of the viewing angle restricted to the left direction is made different from the degree of the viewing angle restricted to the right direction, so that only the user sitting in either the driver's seat or the passenger seat can view the image from the display device. For example, the viewing angle can be limited to the left direction (for example, the direction of the driver's seat) so that only the user sitting in the passenger seat can view the image from the display device, and not limited to the right direction (for example, the direction of the passenger seat). Therefore, the values of the viewing angles are different, and the wide viewing mode is larger than the narrow viewing mode. Furthermore, the wide viewing mode and the narrow viewing mode can be selectively realized in the left-right direction.

[0112] In the following, the configuration and driving method of a plurality of sub-pixels SP will be specifically described.

[0113] FIG. 7 is a circuit diagram of a sub-pixel of a light-emitting display device according to an embodiment of the present invention. In FIG. 7, for the sake of convenience of explanation, a circuit diagram of the sub-pixel SP arranged in the N-th row among a plurality of sub-pixels SP is shown.

[0114] Referring to FIG. 7, the sub-pixel SP includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, a ninth transistor T9, a tenth transistor T10, an eleventh transistor T11, a twelfth transistor T12, a storage capacitor Cst, a first light-emitting element De1, and a second light-emitting element De2.

[0115] First, the switching elements that make up each of the plurality of sub-pixels SP can be configured as transistors with an n-type or p-type MOSFET structure. In the following embodiments, p-type transistors are exemplified, but the present invention is not limited thereto.

[0116] Additionally, the transistor is a three-electrode element including a gate electrode, a source electrode, and a drain electrode. The source electrode is the electrode that supplies carriers to the transistor. Carriers start flowing from the source electrode within the transistor. The drain electrode is the electrode through which carriers exit the transistor. That is, in a MOSFET, the flow of carriers is from the source electrode to the drain electrode. In the case of an n-type MOSFET (NMOS), since the carriers are electrons, the voltage of the source electrode is lower than the voltage of the drain electrode so that electrons can flow from the source electrode to the drain electrode. Since electrons flow from the source electrode to the drain electrode in an n-type MOSFET, the direction of the current is from the drain electrode to the source electrode. In the case of a p-type MOSFET (PMOS), since the carriers are holes, the voltage of the source electrode is higher than the voltage of the drain electrode so that holes can flow from the source electrode to the drain electrode. Since holes flow from the source electrode to the drain electrode in a p-type MOSFET, the current flows from the source electrode to the drain electrode. It should be noted that the source and drain electrodes of a MOSFET are not fixed. For example, the source and drain electrodes of a MOSFET can be changed by an applied voltage. Therefore, in the following embodiments, the present invention should not be limited by the source and drain electrodes of the transistor.

[0117] Referring to FIG. 7, the first transistor T1 controls the drive current applied to the plurality of light-emitting elements by the source-gate voltage (Vsg). The first transistor T1 includes a source electrode connected to the first node N1, a gate electrode connected to the second node N2, and a drain electrode connected to the third node N3. The first transistor T1 that controls the drive current applied to the light-emitting elements De1 and De2 may also be referred to as a drive transistor.

[0118] The second transistor T2 applies the data voltage Vdata from the data line to the first node N1. The second transistor T2 includes a source electrode connected to the data line, a drain electrode connected to the first node N1, and a gate electrode connected to the N-th scan signal line that transmits the N-th scan signal Scan(N). The second transistor T2 can transmit the data voltage Vdata from the data line to the first node N1 in response to the N-th scan signal Scan(N) which is at the turn-on level and is a low level.

[0119] The third transistor T3 diode-connects the gate electrode and the drain electrode of the first transistor T1 which is a drive transistor. The third transistor T3 includes a drain electrode connected to the second node N2, a source electrode connected to the third node N3, and a gate electrode connected to the N-th scan signal line that transmits the N-th scan signal Scan(N). Therefore, the third transistor T3 diode-connects the gate electrode and the drain electrode of the first transistor T1 in response to the N-th scan signal Scan(N) which is at the turn-on level and is a low level.

[0120] The fourth transistor T4 applies an initialization voltage Vini to the second node N2. The fourth transistor T4 includes a source electrode connected to an initialization line that transmits the initialization voltage Vini, a drain electrode connected to the second node N2, and a gate electrode connected to an (N-1)-th scan signal line that transmits the (N-1)-th scan signal Scan(N-1). The fourth transistor T4 applies the initialization voltage Vini to the second node N2 in response to the low-level (N-1)-th scan signal Scan(N-1).

[0121] The fifth transistor T5 applies a high-potential drive voltage VDD supplied from a high-potential drive voltage line to the first node N1. The fifth transistor T5 includes a source electrode connected to the high-potential drive voltage line, a drain electrode connected to the first node N1, and a gate electrode connected to a first emission signal line that transmits a first emission signal EM1(N). Thus, the second transistor T2 applies the high-potential drive voltage VDD supplied from the high-potential drive voltage line to the first node N1 in response to the low-level first emission signal EM1(N) that is at the turn-on level.

[0122] The sixth transistor T6 forms a current path between the first transistor T1 and the first light-emitting element De1. The sixth transistor T6 includes a source electrode connected to the third node N3, a drain electrode connected to the anode electrode of the first light-emitting element De1, and a gate electrode connected to a second emission signal line EML2 that transmits a second emission signal EM2(N). The sixth transistor T6 forms a current path between the third node N3, which is the source electrode of the sixth transistor T6, and the first light-emitting element De1 in response to the second emission signal EM2(N). Thus, the sixth transistor T6 forms a current path between the first transistor T1, which is a drive transistor, and the first light-emitting element De1 in response to the low-level second emission signal EM2(N) that is at the turn-on level. Thus, the sixth transistor T6 may also be referred to as a first light emission control transistor that controls the light emission of the first light-emitting element De1.

[0123] The seventh transistor T7 applies the initialization voltage Vini to the anode electrode of the first light-emitting element De1. The seventh transistor T7 includes a source electrode connected to an initialization line that transmits the initialization voltage Vini, a drain electrode connected to the anode electrode of the first light-emitting element De1, and a gate electrode connected to an Nth scan signal Scan(N) line that transmits the Nth scan signal Scan(N). Therefore, the seventh transistor T7 applies the initialization voltage Vini to the anode electrode of the first light-emitting element De1 in response to the Nth scan signal Scan(N) at a turn-on level, which is a low level.

[0124] The eighth transistor T8 forms a current path between the first transistor T1 and the second light-emitting element De2. The eighth transistor T8 includes a source electrode connected to the third node N3, a drain electrode connected to the anode electrode of the second light-emitting element De2, and a gate electrode connected to a third light-emitting signal line that transmits the third light-emitting signal EM3(N). The eighth transistor T8 forms a current path between the third node N3, which is the source electrode of the eighth transistor T8, and the second light-emitting element De2 in response to the third light-emitting signal EM3(N). Therefore, the eighth transistor T8 forms a current path between the first transistor T1, which is a driving transistor, and the second light-emitting element De2 in response to the third light-emitting signal EM3(N) at a turn-on level, which is a low level. Therefore, the eighth transistor T8 may also be referred to as a second light-emitting control transistor that controls the light emission of the second light-emitting element De2.

[0125] The ninth transistor T9 applies the initialization voltage Vini to the anode electrode of the second light-emitting element De2. The ninth transistor T9 includes a source electrode connected to an initialization line that transmits the initialization voltage Vini, a drain electrode connected to the anode electrode of the second light-emitting element De2, and a gate electrode connected to an Nth scan signal Scan(N) line that transmits the Nth scan signal Scan(N). Therefore, the ninth transistor T9 applies the initialization voltage Vini to the anode electrode of the second light-emitting element De2 in response to the Nth scan signal Scan(N) at a turn-on level, which is a low level.

[0126] The tenth transistor T10 applies a reference voltage Vref to the fourth node N4. The tenth transistor T10 includes a source electrode connected to a reference line that transmits the reference voltage Vref, a drain electrode connected to the fourth node N4, and a gate electrode connected to an (N - 1)th scan signal Scan(N - 1) line that transmits the (N - 1)th scan signal Scan(N - 1). Therefore, the tenth transistor T10 applies the reference voltage Vref to the fourth node N4 in response to the (N - 1)th scan signal Scan(N - 1) at a turn-on level, which is a low level.

[0127] The eleventh transistor T11 applies a reference voltage Vref to the fourth node N4. The eleventh transistor T11 includes a source electrode connected to a reference line that transmits the reference voltage Vref, a drain electrode connected to the fourth node N4, and a gate electrode connected to an Nth scan signal Scan(N) line that transmits the Nth scan signal Scan(N). Therefore, the eleventh transistor T11 applies the reference voltage Vref to the fourth node N4 in response to the Nth scan signal Scan(N) at a turn-on level, which is a low level.

[0128] The twelfth transistor T12 applies a high-potential drive voltage VDD received from a high-potential drive voltage line to the fourth node N4. The twelfth transistor T12 includes a source electrode connected to the high-potential drive voltage line, a drain electrode connected to the fourth node N4, and a gate electrode connected to a first emission signal line EML1 that transmits a first emission signal EM1(N). Therefore, the twelfth transistor T12 applies the high-potential drive voltage VDD received from the high-potential drive voltage line to the fourth node N4 in response to the first emission signal EM1(N) at a turn-on level, which is a low level.

[0129] The capacitor Cst includes a first electrode connected to the second node N2 and a second electrode connected to the second node N2. That is, one electrode of the capacitor Cst is connected to the gate electrode of the first transistor T1, which is a drive transistor, and the other electrode of the capacitor Cst is connected to the twelfth transistor T12.

[0130] FIG. 8A and FIG. 8B are waveform diagrams showing a light emission signal and a scan signal in a wide viewing angle mode and a narrow viewing angle mode of a light emitting display device according to an embodiment of the present invention. FIG. 9A is a circuit diagram of a sub-pixel of a light emitting display device according to an embodiment of the present invention during an initial period in each of the wide viewing angle mode and the narrow viewing angle mode. FIG. 9B is a circuit diagram of a sub-pixel of a light emitting display device according to an embodiment of the present invention during a sampling period in each of the wide viewing angle mode and the narrow viewing angle mode. FIG. 9C is a circuit diagram of a sub-pixel of a light emitting display device according to an embodiment of the present invention during an emission period in the wide viewing angle mode. FIG. 9D is a circuit diagram of a sub-pixel of a light emitting display device according to an embodiment of the present invention during an emission period in the narrow viewing angle mode.

[0131] Referring to both FIG. 7 and FIGS. 8A and 8B, when considering the driving of the light emitting display device 100 according to an embodiment of the present invention in each of the wide viewing angle mode and the narrow viewing angle mode, it is as follows.

[0132] Specifically, during the initial period Ti in each of the wide viewing angle mode and the narrow viewing angle mode, the (N - 1)th scan signal Scan(N - 1) is at a low level which is a turn-on level, the Nth scan signal Scan(N) is at a high level which is a turn-off level, the first light emission signal EM1(N) is at a high level which is a turn-off level, the second light emission signal EM2(N) is at a high level which is a turn-off level, and the third light emission signal EM3(N) is at a high level which is a turn-off level.

[0133] Therefore, referring to FIG. 9A, during the initial period Ti in each of the wide viewing angle mode and the narrow viewing angle mode, the fourth transistor T4 is turned on, and an initialization voltage Vini is applied to the second node N2 which is the gate electrode of the first transistor T1. As a result, the gate electrode of the first transistor T1 is initialized to the initialization voltage Vini.

[0134] The initialization voltage Vini can be selected within a voltage range sufficiently lower than the threshold voltage of the first transistor T1, and can be set to be the same as or lower than the low potential driving voltage VSS.

[0135] Then, during the initial period Ti in each of the wide viewing angle mode and the narrow viewing angle mode, the 10th transistor T10 is turned on, and a reference voltage Vref is applied to the 4th node N4. Therefore, an initialization voltage Vini is applied to the first electrode of the capacitor Cst, and a reference voltage Vref is applied to the second electrode.

[0136] The reference voltage Vref can be selected within a voltage range sufficiently lower than the threshold voltage of the first transistor T1, and can be set to be the same as the low potential drive voltage VSS or a lower voltage.

[0137] Then, referring to FIG. 9B, during the sampling period Ts in each of the wide viewing angle mode and the narrow viewing angle mode, the (N - 1)th scan signal Scan(N - 1) is at a high level which is the turn-off level, the Nth scan signal Scan(N) is at a low level which is the turn-on level, the first light emission signal EM1(N) is at a high level which is the turn-off level, the second light emission signal EM2(N) is at a high level which is the turn-off level, and the third light emission signal EM3(N) is at a high level which is the turn-off level.

[0138] Therefore, during the sampling period Ts in each of the wide viewing angle mode and the narrow viewing angle mode, the second transistor T2 is turned on, and a data voltage Vdata is applied to the first node N1. Then, when the third transistor T3 is also turned on, the first transistor T1 is diode-connected, and by short-circuiting the gate electrode and the drain electrode of the first transistor T1, the first transistor T1 operates like a diode.

[0139] During the sampling period Ts in both the wide viewing angle mode and the narrow viewing angle mode, a current Ids flows between the source and drain of the first transistor T1. Since the gate electrode and the drain electrode of the first transistor T1 are diode-connected, the voltage of the second node N2 rises due to the current flowing from the source electrode to the drain electrode until the gate-source voltage Vgs of the first transistor T1 reaches Vth. During the sampling period Ts, the voltage of the second node N2 is charged to a voltage (Vdata + Vth) corresponding to the sum of the data voltage Vdata and the threshold voltage Vth of the first transistor T1.

[0140] Then, during the sampling period Ts in both the wide viewing angle mode and the narrow viewing angle mode, the eleventh transistor T11 is turned on, and a reference voltage Vref is applied to the fourth node N4. Therefore, a voltage (Vdata + Vth) corresponding to the sum of the threshold voltage Vth of the first transistor T1 is applied to the first electrode of the capacitor Cst, and the reference voltage Vref is applied to the second electrode.

[0141] On the other hand, the seventh transistor T7 and the ninth transistor T9 are turned on, and an initialization voltage Vini is applied to the anode electrode of the first light-emitting element De1, and an initialization voltage Vini is applied to the anode electrode of the second light-emitting element De2. As a result, the anode electrodes of both the first light-emitting element De1 and the second light-emitting element De2 are initialized to the initialization voltage Vini. The initialization voltage Vini can be selected within a voltage range sufficiently lower than the operating voltages of the light-emitting elements De1 and De2, and can be set to the same as or lower than the low potential drive voltage VSS.

[0142] Referring to FIG. 9C, during the emission period Te in the wide viewing angle mode, the (N - 1)-th scan signal Scan(N - 1) is at a high level which is the turn-off level, the N-th scan signal Scan(N) is at a high level which is the turn-off level, the first emission signal EM1(N) is at a low level which is the turn-on level, the second emission signal EM2(N) is at a high level which is the turn-off level, and the third emission signal EM3(N) is at a low level which is the turn-on level.

[0143] Therefore, during the emission period Te in the wide viewing angle mode, the fifth transistor T5 is turned on, and a high potential driving voltage VDD is applied to the first node N1. Then, the twelfth transistor T12 is turned on, and a high potential driving voltage VDD is applied to the fourth node N4. That is, the voltage of the fourth node N4 rises from the reference voltage Vref to the high potential driving voltage VDD. And since the second node N2 is coupled to the fourth node N4 through the capacitor Cst, the voltage change amount (VDD - Vref) of the fourth node N4 is reflected in the second node N2. Therefore, the voltage of the second node N2, which is the gate electrode of the first transistor T1, changes to Vdata + Vth + (VDD - Vref). Therefore, the gate-source voltage Vgs of the first transistor T1 can become Vdata + Vth - Vref. Then, the eighth transistor T8 is also turned on, forming a current path between the third node N3 and the second light emitting element De2. Eventually, the driving current passing through the source electrode and the drain electrode of the first transistor T1 is applied to the second light emitting element De2.

[0144] During the emission period Te in the wide viewing angle mode, the relational expression for the driving current Ioled flowing through the second light emitting element De2 is as shown in the following Equation 1.

[0145] Ioled = k(Vgs - Vth) 2 = k(Vdata + Vth - Vref - Vth) 2 = k(Vdata - Vref) 2 ···(Equation 1)

[0146] In Equation 1, k represents a proportionality constant determined by the electron mobility, parasitic capacitance, channel capacitance, etc. of the first transistor T1.

[0147] As can be seen from Equation 1, in the relational expression of the drive current Ioled, the threshold voltage Vth component and the high potential drive voltage VDD component of the first transistor T1 are all eliminated. This means that in the light-emitting display device 100 according to the present invention, the drive current Ioled does not change even if the threshold voltage Vth and the high potential drive voltage VDD change. That is, the light-emitting display device 100 according to an embodiment of the present invention can program the data voltage Vdata regardless of the change amounts of the threshold voltage Vth and the high potential drive voltage VDD.

[0148] Then, referring to FIG. 9D, during the emission period Te in the narrow viewing angle mode, the (N - 1)th scan signal Scan(N - 1) is at a high level which is the turn-off level, the Nth scan signal Scan(N) is at a high level which is the turn-off level, the first emission signal EM1(N) is at a low level which is the turn-on level, the second emission signal EM2(N) is at a low level which is the turn-on level, and the third emission signal EM3(N) is at a high level which is the turn-off level.

[0149] Therefore, during the emission period Te in the narrow viewing angle mode, the fifth transistor T5 is turned on, and the high potential drive voltage VDD is applied to the first node N1. Then, the twelfth transistor T12 is turned on, and the high potential drive voltage VDD is applied to the fourth node N4. That is, the voltage of the fourth node N4 rises from the reference voltage Vref to the high potential drive voltage VDD. Then, due to the coupling of the capacitor Cst described above, the voltage of the second node N2 changes to Vdata + Vth + (VDD - Vref). Therefore, the gate-source voltage Vgs of the first transistor T1 can be Vdata + Vth - Vref. Then, the sixth transistor T6 is also turned on to form a current path between the third node N3 and the first light-emitting element De1. Eventually, the drive current passing through the source electrode and the drain electrode of the first transistor T1 is applied to the first light-emitting element De1.

[0150] During the emission period Te in the narrow field of view mode, the relational expression for the drive current Ioled flowing through the first light-emitting element De1 is as shown in Equation 1 described above. Therefore, the light-emitting display device 100 according to an embodiment of the present invention can program the data voltage Vdata regardless of the change amounts of the threshold voltage Vth and the high potential drive voltage VDD.

[0151] Hereinafter, with reference to FIGS. 10 and 11, the drive operations of the first display region AA1 and the second display region AA2 will be described.

[0152] FIG. 10 is a schematic enlarged plan view of a display panel of a light-emitting display device according to an embodiment of the present invention. FIG. 11 is a schematic enlarged plan view of a display panel operated in a wide field of view mode and a narrow field of view mode. In FIGS. 10 and 11, for convenience of explanation, only a part of the display panel is enlarged and shown.

[0153] Referring to FIG. 10, a gate driving unit GD is mounted in the display region AA of the display panel PN. The gate driving unit GD includes a plurality of scan signal generation units GIAS, a plurality of light-emitting signal generation units GIAE1, GIAE2, and GIAE3 respectively mounted in the first display region AA1 and the second display region AA2. The plurality of light-emitting signal generation units GIAE1, GIAE2, and GIAE3 include a plurality of first light-emitting signal generation units GIAE1, a plurality of second light-emitting signal generation units GIAE2, and a plurality of third light-emitting signal generation units GIAE3. The gate driving unit GD can be arranged between a plurality of sub-pixels SP in the display region AA. A plurality of sub-pixels SP can be arranged between the plurality of scan signal generation units GIAS and the plurality of light-emitting signal generation units GIAE1, GIAE2, and GIAE3 respectively.

[0154] For example, in the first display region AA1, a plurality of scan signal generation units GIAS connected to a plurality of scan signal lines SL, a plurality of first light-emitting signal generation units GIAE1 connected to a plurality of first light-emitting signal lines EML1, a plurality of second light-emitting signal generation units GIAE2 connected to a plurality of second light-emitting signal lines EML2, and a plurality of third light-emitting signal generation units GIAE3 connected to a plurality of third light-emitting signal lines EML3 are arranged.

[0155] In addition, in the second display area AA2, a plurality of scan signal generation units GIAS connected to a plurality of scan signal lines SL, a plurality of first light emission signal generation units GIAE1 connected to a plurality of first light emission signal lines EML1, a plurality of second light emission signal generation units GIAE2 connected to a plurality of second light emission signal lines EML2, and a plurality of third light emission signal generation units GIAE3 connected to a plurality of third light emission signal lines EML3 are arranged.

[0156] In this case, a scan signal Scan can be multi-output from a plurality of scan signal generation units GIAS to each of the plurality of scan signal lines SL. One scan signal line SL is connected to a plurality of scan signal generation units GIAS, and the scan signals Scan generated by each of the plurality of scan signal generation units GIAS can be simultaneously applied to the scan signal line SL. For example, one scan signal line SL can receive scan signals Scan simultaneously from the plurality of scan signal generation units GIAS in the first display area AA1 and the plurality of scan signal generation units GIAS in the second display area AA2. In this case, since the scan signal Scan is simultaneously input to the scan signal line SL from a plurality of points on the scan signal line SL, the delay of the scan signal Scan transmitted through the scan signal line SL can be reduced, and the variation of the scan signal Scan transmitted to the plurality of sub-pixels SP connected to one scan signal line SL can be reduced.

[0157] If the scan signal Scan is applied only at one end of both ends of the scan signal line SL, a delay may occur in the process of transmitting the scan signal Scan to the other end of the scan signal line SL. Therefore, a delay variation of the scan signal Scan between the plurality of scan signal lines SL may occur, which may lead to a decrease in display quality.

[0158] On the other hand, like the light-emitting display device 100 according to an embodiment of the present invention, by forming a plurality of scan signal generation units GIAS in the display area AA and applying the scan signal Scan to the scan signal line SL from a plurality of points, the delay of the scan signal Scan can be minimized.

[0159] Next, each of the plurality of first light emission signal lines EML1 is connected to a plurality of first light emission signal generation units GIAE1, and a first light emission signal EM1(N) can be multi-output from the plurality of first light emission signal generation units GIAE1 to each of the plurality of first light emission signal lines EML1. One first light emission signal line EML1 is connected to a plurality of first light emission signal generation units GIAE1, and the first light emission signals EM1(N) generated by each of the plurality of first light emission signal generation units GIAE1 can be simultaneously applied to the first light emission signal line EML1. For example, one first light emission signal line EML1 can receive the first light emission signal EM1(N) simultaneously from the plurality of first light emission signal generation units GIAE1 in the first display area AA1 and the plurality of first light emission signal generation units GIAE1 in the second display area AA2. In this case, since the first light emission signal EM1(N) is simultaneously input to the first light emission signal line EML1 from a plurality of points on the first light emission signal line EML1, the delay of the first light emission signal EM1(N) transmitted through the first light emission signal line EML1 can be reduced. Also, by adjusting the positions of the first light emission signal generation units GIAE1 connected to the first light emission signal line EML1, the delay variation of the first light emission signal EM1(N) transmitted from the first display area AA1 and the second display area AA2 to the first light emission signal line EML1 can also be reduced.

[0160] And each of the plurality of second light emission signal lines EML2 is connected to a plurality of second light emission signal generation units GIAE2, and a second light emission signal EM2(N) can be multi-output from the plurality of second light emission signal generation units GIAE2 to each of the plurality of second light emission signal lines EML2. That is, the second light emission signal EM2(N) can be simultaneously input to a plurality of points on the second light emission signal line EML2. One second light emission signal line EML2 is connected to a plurality of second light emission signal generation units GIAE2, and the second light emission signals EM2(N) generated by each of the plurality of second light emission signal generation units GIAE2 can be simultaneously applied to the second light emission signal line EML2.

[0161] Each of the plurality of third light emission signal lines EML3 is connected to a plurality of third light emission signal generation units GIAE3, and a second light emission signal EM2(N) can be multi-output from the plurality of third light emission signal generation units GIAE3 to each of the plurality of third light emission signal lines EML3. That is, the third light emission signal EM3(N) can be input simultaneously at multiple points on the third light emission signal line EML3. One third light emission signal line EML3 is connected to a plurality of third light emission signal generation units GIAE3, and the third light emission signals EM3(N) generated by each of the plurality of third light emission signal generation units GIAE3 can be applied to the third light emission signal line EML3 simultaneously.

[0162] On the other hand, the plurality of scan signal lines SL and the plurality of first light emission signal lines EML1 extend continuously across the entire first display area AA1 and the second display area AA2, while the plurality of second light emission signal lines EML2 and the plurality of third light emission signal lines EML3 are separated at the boundary between the first display area AA1 and the second display area AA2. Therefore, the second light emission signal lines EML2 arranged in the first display area AA1 are separated from the second light emission signal lines EML2 arranged in the second display area AA2 and are spaced apart from each other, and the third light emission signal lines EML3 arranged in the first display area AA1 can also be separated from the third light emission signal lines EML3 arranged in the second display area AA2 and be spaced apart from each other.

[0163] For example, the plurality of second light emission signal lines EML2 include a plurality of second-1 light emission signal lines EML2-1 arranged in the first display area AA1 and transmitting the second light emission signal EM2(N) to the sub-pixels SP of the first display area AA1, and a plurality of second-2 light emission signal lines EML2-2 arranged in the second display area AA2 and transmitting the second light emission signal EM2(N) to the sub-pixels SP of the second display area AA2. The plurality of third light emission signal lines EML3 include a plurality of third-1 light emission signal lines EML3-1 arranged in the first display area AA1 and transmitting the third light emission signal EM3(N) to the sub-pixels SP of the first display area AA1, and a plurality of third-2 light emission signal lines EML3-2 arranged in the second display area AA2 and transmitting the third light emission signal EM3(N) to the sub-pixels SP of the second display area AA2.

[0164] In this case, the second light emission signals EM2(N) from the plurality of second light emission signal generation units GIAE2 arranged in the first display area AA1 are transferred to the plurality of second-1 light emission signal lines EML2-1, and the second light emission signals EM2(N) from the plurality of second light emission signal generation units GIAE2 arranged in the second display area AA2 may be transferred to the plurality of second-2 light emission signal lines EML2-2. Then, the third light emission signals EM3(N) from the plurality of third light emission signal generation units GIAE3 arranged in the first display area AA1 are transferred to the plurality of third-1 light emission signal lines EML3-1, and the third light emission signals EM3(N) from the plurality of third light emission signal generation units GIAE3 arranged in the second display area AA2 may be transferred to the plurality of third-2 light emission signal lines EML3-2.

[0165] In the light-emitting display device 100 according to an embodiment of the present invention, by separating the second light emission signal lines EML2 and the third light emission signal lines EML3 arranged in the first display area AA1 and the second display area AA2 respectively, the first display area AA1 and the second display area AA2 can be independently driven in either a wide viewing angle mode or a narrow viewing angle mode. For example, while driving the first display area AA1 in the wide viewing angle mode, the second display area AA2 can be driven in either the narrow viewing angle mode or the wide viewing angle mode, and while driving the second display area AA2 in the narrow viewing angle mode, the first display area AA1 can be driven in either the narrow viewing angle mode or the wide viewing angle mode.

[0166] For example, as shown in FIG. 11, when the first display area AA1 is driven in a wide viewing angle mode and the second display area AA2 is driven in a narrow viewing angle mode, only the third light emission signal generation unit GIAE3 among the second light emission signal generation unit GIAE2 and the third light emission signal generation unit GIAE3 of the first display area AA1 can output a low-level third light emission signal EM3(N) that is at the turn-on level. In this case, the sixth transistor T6 that forms the current path between the first light emitting element De1 and the first transistor T1 maintains the turned-off state, and the eighth transistor T8 that forms the current path between the second light emitting element De2 and the first transistor T1 is turned on and can transmit the drive current to the second light emitting element De2. That is, the plurality of sub-pixels SP arranged in the first display area AA1 can operate as shown in FIG. 9C during the emission period, whereby the first display area AA1 can operate in the wide viewing angle mode.

[0167] Then, when the first display area AA1 is driven in a wide viewing angle mode and the second display area AA2 is driven in a narrow viewing angle mode, only the second light emission signal generation unit GIAE2 among the second light emission signal generation unit GIAE2 and the third light emission signal generation unit GIAE3 of the second display area AA2 can output a low-level second light emission signal EM2(N) that is at the turn-on level. In this case, the sixth transistor T6 that forms the current path between the first light emitting element De1 and the first transistor T1 is turned on and can transmit the drive current to the first light emitting element De1, and the eighth transistor T8 that forms the current path between the second light emitting element De2 and the first transistor T1 can maintain the turned-off state. That is, the plurality of sub-pixels SP arranged in the second display area AA2 can operate as shown in FIG. 9C during the emission period, whereby the second display area AA2 can operate in the narrow viewing angle mode.

[0168] At this time, even if the third light emission signal generation unit GIAE3 in the first display area AA1 outputs a low-level third light emission signal EM3(N), since the third-1 light emission signal line EML3-1 in the first display area AA1 and the third-2 light emission signal line EML3-2 in the second display area AA2 are separated from each other, the low-level third light emission signal EM3(N) is not transmitted to the second display area AA2. Then, although the second light emission signal generation unit GIAE2 in the second display area AA2 outputs a low-level second light emission signal EM2(N), since the second-1 light emission signal line EML2-1 in the first display area AA1 and the second-2 light emission signal line EML2-2 in the second display area AA2 are separated from each other, the low-level second light emission signal EM2(N) is not transmitted to the first display area AA1. Therefore, by arranging a plurality of second light emission signal generation units GIAE2 and a plurality of third light emission signal generation units GIAE3 in each of the first display area AA1 and the second display area AA2, and separating the plurality of second light emission signal lines EML2 and the plurality of third light emission signal lines EML3 arranged in the first display area AA1 and the second display area AA2, the first display area AA1 and the second display area AA2 can be independently driven in a wide viewing angle mode and a narrow viewing angle mode.

[0169] Taking another example, when the first display area AA1 is driven in the narrow viewing angle mode and the second display area AA2 is driven in the wide viewing angle mode, the gate driving unit GD can output low-level light emission signals EM2(N) and EM3(N) at the turn-on level only to the second-1 light emission signal line EML2-1 in the first display area AA1 and the third-2 light emission signal line EML3-2 in the second display area AA2.

[0170] Taking still another example, when both the first display area AA1 and the second display area AA2 are driven in the wide viewing angle mode, the gate driving unit GD can output low-level light emission signals EM2(N) and EM3(N) at the turn-on level only to the second-2 light emission signal line EML2-2 in the first display area AA1 and the third-2 light emission signal line EML3-2 in the second display area AA2.

[0171] Taking another example, when both the first display area AA1 and the second display area AA2 are driven in the narrow viewing angle mode, the gate driving unit GD can output low-level light emission signals EM2(N) and EM3(N) at the turn-on level only to the second-1 light emission signal line EML2-1 of the first display area AA1 and the third-1 light emission signal line EML3-1 of the second display area AA2.

[0172] Therefore, in the light-emitting display device 100 according to an embodiment of the present invention, the second light emission signal lines EML2 and the third light emission signal lines EML3 arranged in the first display area AA1 and the second display area AA2 are separated, and separate second light emission signal generation units GIAE2 and third light emission signal generation units GIAE3 are formed for the separated second light emission signal lines EML2 and the third light emission signal lines EML3 respectively, so that the wide viewing angle mode and the narrow viewing angle mode of the first display area AA1 and the second display area AA2 can be independently controlled. Since the second light emission signal line EML2 of the first display area AA1 and the second light emission signal line EML2 of the second display area AA2 are separated from each other, the second display area AA2 can be driven in the narrow viewing angle mode regardless of the mode of the first display area AA1, and the first display area AA1 can also be driven in the narrow viewing angle mode without being limited by the mode of the second display area AA2. And since the third light emission signal line EML3 of the first display area AA1 and the third light emission signal line EML3 of the second display area AA2 are separated from each other, the second display area AA2 can be driven in the wide viewing angle mode regardless of the mode of the first display area AA1, and the first display area AA1 can also be driven in the wide viewing angle mode without being limited by the mode of the second display area AA2. Therefore, in the light-emitting display device 100 according to an embodiment of the present invention, only a specific area of the screen can be freely switched to either the wide viewing angle mode or the narrow viewing angle mode selectively.

[0173] In the light-emitting display device 100 according to an embodiment of the present invention, a plurality of scan signal generation units GIAS and a plurality of light-emitting signal generation units GIAE1, GIAE2, and GIAE3 are arranged in the display area AA, and the delay of signals transmitted to the respective plurality of wirings can be reduced. For example, scan signals Scan can be simultaneously applied from a plurality of scan signal generation units GIAS to one scan signal line SL. That is, the scan signal Scan can be multi-output to one scan signal line SL. Therefore, by applying the scan signal Scan to one scan signal line SL from a plurality of points, the delay of the scan signal Scan transmitted to the entire scan signal line SL can be reduced. Accordingly, in the light-emitting display device 100 according to an embodiment of the present invention, a plurality of scan signal generation units GIAS are connected to each of the plurality of scan signal lines SL, and a plurality of light-emitting signal generation units GIAE1, GIAE2, and GIAE3 are connected to each of the plurality of light-emitting signal lines EML1, EML2, and EML3, thereby reducing the delay and variation of the scan signal Scan and the light-emitting signal transmitted to the plurality of sub-pixels SP.

[0174] In the light-emitting display device 100 according to an embodiment of the present invention, the gate driving unit GD is mounted in the display area AA, and the area of the non-display area NA, for example, the size of the bezel can be reduced. Since the gate driving unit GD is arranged inside the display area AA, a part of the non-display area NA where the gate driving unit GD was previously arranged can be deleted, and the area of the non-display area NA can be reduced.

[0175] FIG. 12 is a schematic enlarged plan view of a display panel of a light-emitting display device according to another embodiment of the present invention. The light-emitting display device 1200 in FIG. 12 is different only in the display area AA, the gate driving unit GD, the second light-emitting signal line EML2, and the third light-emitting signal line EML3 compared to the light-emitting display device 100 in FIGS. 1 to 11, and the other configurations are substantially the same, so duplicate descriptions are omitted.

[0176] Referring to FIG. 12, the display area AA includes a first display area AA1, a second display area AA2, and a third display area AA3. The first display area AA1, the second display area AA2, and the third display area AA3 are arranged in sequence.

[0177] A gate driving unit GD is arranged in each of the first display area AA1, the second display area AA2, and the third display area AA3. One or more scan signal generation units GIAS and one or more light emission signal generation units GIAE1, GIAE2, GIAE3 are arranged in each of the first display area AA1, the second display area AA2, and the third display area AA3.

[0178] A scan signal line SL and a first light emission signal line EML1 extending across the entire display area AA are arranged. One scan signal line SL and the first light emission signal line EML1 can be connected to sub-pixels SP arranged in the first display area AA1, the second display area AA2, and the third display area AA3. That is, each of the first display area AA1, the second display area AA2, and the third display area AA3 shares the scan signal line SL and the first light emission signal line EML1.

[0179] A plurality of second light emission signal lines EML2 and a plurality of third light emission signal lines EML3 are arranged in each of the first display area AA1, the second display area AA2, and the third display area AA3. The plurality of second light emission signal lines EML2 and the plurality of third light emission signal lines EML3 corresponding to each of the first display area AA1, the second display area AA2, and the third display area AA3 are separated from each other. The plurality of second light emission signal lines EML2 and the plurality of third light emission signal lines EML3 can be separated at the boundary between the first display area AA1 and the second display area AA2 and at the boundary between the second display area AA2 and the third display area AA3.

[0180] Specifically, the plurality of second light emission signal lines EML2 includes a second-1 light emission signal line EML2-1 connected to the sub-pixel SP of the first display area AA1 and the second light emission signal generation unit GIAE2, a second-2 light emission signal line EML2-2 connected to the sub-pixel SP of the second display area AA2 and the second light emission signal generation unit GIAE2, and a second-3 light emission signal line EML2-3 connected to the sub-pixel SP of the third display area AA3 and the second light emission signal generation unit GIAE2. And the second-1 light emission signal line EML2-1, the second-2 light emission signal line EML2-2, and the second-3 light emission signal line EML2-3 are separated without being connected to each other.

[0181] The plurality of third light emission signal lines EML3 includes a third-1 light emission signal line EML3-1 connected to the sub-pixel SP of the first display area AA1 and the third light emission signal generation unit GIAE3, a third-2 light emission signal line EML3-2 connected to the sub-pixel SP of the second display area AA2 and the third light emission signal generation unit GIAE3, and a third-3 light emission signal line EML3-3 connected to the sub-pixel SP of the third display area AA3 and the third light emission signal generation unit GIAE3. And the third-1 light emission signal line EML3-1, the third-2 light emission signal line EML3-2, and the third-3 light emission signal line EML3-3 are separated without being connected to each other.

[0182] Therefore, second light emission signals EM2(N) and third light emission signals EM3(N) with different levels can be applied to the sub-pixels SP of the first display area AA1, the second display area AA2, and the third display area AA3 respectively. In this case, each of the first display area AA1, the second display area AA2, and the third display area AA3 can be driven by selecting either the wide viewing angle mode or the narrow viewing angle mode. For example, while applying a high-level second light emission signal EM2(N) and a low-level third light emission signal EM3(N) to the first display area AA1 to drive the first display area AA1 in the wide viewing angle mode, a low-level second light emission signal EM2(N) and a high-level third light emission signal EM3(N) can be applied to the second display area AA2 and the third display area AA3 to drive them in the narrow viewing angle mode.

[0183] Therefore, in the light-emitting display device 1200 according to another embodiment of the present invention, the display area AA can be separated into a plurality of areas, and the wide viewing angle mode and the narrow viewing angle mode can be selected and independently driven in each of the plurality of areas. At this time, the number of the separated display areas AA can be variously changed according to the design, and the designs of the gate driving unit GD, the second light-emitting signal line EML2, and the third light-emitting signal line EML3 can also be changed to correspond to the display area AA.

[0184] Embodiments of the present invention can also be described as follows.

[0185] According to an aspect of the present invention, a light-emitting display device according to an embodiment of the present invention includes a display panel in which a plurality of display areas including a first display area and a second display area are defined, a plurality of sub-pixels disposed in each of the plurality of display areas, and a gate driving unit mounted on the plurality of display areas. Each of the plurality of sub-pixels includes a first light-emitting element that emits light by a driving current, a first lens that refracts light from the first light-emitting element, a second light-emitting element that emits light by a driving current, and a second lens that refracts light from the second light-emitting element and has a shape different from that of the first lens.

[0186] According to another feature of the present invention, the first lens may be a half-spherical lens, and the second lens may be a half-cylindrical lens.

[0187] According to still another feature of the present invention, each of the plurality of display areas is independently driven in either a narrow viewing angle mode or a wide viewing angle mode. In the narrow viewing angle mode, the first light-emitting element emits light, and the light from the first light-emitting element is output with a viewing angle limited with respect to a first direction and a second direction by the first lens. In the wide viewing angle mode, the second light-emitting element emits light, and the light from the second light-emitting element can be output with a viewing angle limited only with respect to the first direction by the second lens. The viewing angle of the second lens is different from that of the first lens and is generally larger than the viewing angle of the first lens in most cases.

[0188] According to another feature of the present invention, each of the plurality of sub-pixels is driven separately during an initial period, a sampling period, and an emission period, and a drive current can be applied to the first light-emitting element or the second light-emitting element during the emission period.

[0189] According to another feature of the present invention, each of the plurality of sub-pixels further includes a drive transistor that controls a drive current, a first light-emission control transistor that is connected between the drive transistor and the first light-emitting element and transmits the drive current to the first light-emitting element, and a second light-emission control transistor that is connected between the drive transistor and the second light-emitting element and transmits the drive current to the second light-emitting element. In a narrow viewing angle mode, the first light-emission control transistor is turned on and the second light-emission control transistor is turned off. In a wide viewing angle mode, the first light-emission control transistor is turned off and the second light-emission control transistor can be turned on.

[0190] According to another feature of the present invention, it further includes a light-emission signal line that transmits a light-emission signal to the gate electrode of the first light-emission control transistor, and the light-emission signal line of the first display region can be separated from the light-emission signal line of the second display region.

[0191] According to another feature of the present invention, the gate driving unit is mounted on each of the first display region and the second display region, and includes a plurality of light-emission signal generating units that output light-emission signals to the light-emission signal lines of each of the first display region and the second display region. One light-emission signal line can receive the application of a plurality of light-emission signals output from the plurality of light-emission signal generating units.

[0192] According to another feature of the present invention, it further includes a light-emission signal line that transmits a light-emission signal to the gate electrode of the second light-emission control transistor, and the light-emission signal line of the first display region can be spaced apart from the light-emission signal line of the second display region.

[0193] According to another feature of the present invention, the gate driving unit is implemented in each of the first display area and the second display area, and includes a plurality of light emission signal generation units that output light emission signals to the light emission signal lines of the first display area and the second display area respectively. The light emission signals output by the plurality of light emission signal generation units implemented in the first display area are transmitted only to the light emission signal lines of the first display area, and the light emission signals output by the plurality of light emission signal generation units implemented in the second display area can be transmitted only to the light emission signal lines of the second display area.

[0194] According to another aspect of the present invention, a light-emitting display device according to another embodiment of the present invention includes a display panel in which a display area including a first display area and a second display area is defined, a plurality of sub-pixels arranged in each of the first display area and the second display area, and a gate driving unit implemented in the first display area and the second display area. Each of the plurality of sub-pixels includes a first light-emitting element that emits light by a driving current in a narrow viewing angle mode, a hemispherical lens configured to refract light from the first light-emitting element and limit the viewing angle with respect to the first direction and the second direction, a second light-emitting element that emits light by a driving current in a wide viewing angle mode, and a semi-cylindrical lens configured to refract light from the second light-emitting element and limit the viewing angle only with respect to the first direction.

[0195] According to another feature of the present invention, each of the plurality of sub-pixels includes a first transistor that controls a driving current and includes a source electrode connected to a first node, a gate electrode connected to a second node, and a drain electrode connected to a third node, a second transistor that applies a data voltage to the first node, a third transistor that diode-connects the gate electrode and the drain electrode of the first transistor, a fourth transistor that applies an initialization voltage to the gate electrode of the first transistor, a fifth transistor that applies a high-potential driving voltage to the first node, a sixth transistor that forms a current path between the first transistor and the first light-emitting element, a seventh transistor that applies an initialization voltage to the anode electrode of the first light-emitting element, an eighth transistor that forms a current path between the first transistor and the second light-emitting element, a ninth transistor that applies an initialization voltage to the anode electrode of the second light-emitting element, a capacitor having one end connected to the second node and the other end connected to the fourth node, a tenth transistor and an eleventh transistor that apply a reference voltage to the fourth node, and a twelfth transistor that applies a high-potential driving voltage to the fourth node.

[0196] According to still another feature of the present invention, the display panel may further include a first light-emitting signal line that applies a first light-emitting signal to the gate electrodes of the fifth transistors of the plurality of sub-pixels, a second light-emitting signal line that applies a second light-emitting signal to the gate electrodes of the sixth transistors of the plurality of sub-pixels, and a third light-emitting signal line that applies a third light-emitting signal to the gate electrodes of the eighth transistors of the plurality of sub-pixels.

[0197] According to still another feature of the present invention, the gate driving unit may include a plurality of first light-emitting signal generation units that output a first light-emitting signal to the first light-emitting signal line, a plurality of second light-emitting signal generation units that output a second light-emitting signal to the second light-emitting signal line, and a plurality of third light-emitting signal generation units that output a third light-emitting signal to the third light-emitting signal line.

[0198] According to another feature of the present invention, the second light emission signal line includes a second-1 light emission signal line connected to a plurality of sub-pixels in the first display area and a second-2 light emission signal line connected to a plurality of sub-pixels in the second display area. Among a plurality of second light emission signal generation units, a part outputs a second light emission signal to the second-1 light emission signal line, and another part among the plurality of second light emission signal generation units can output a second light emission signal to the second-2 light emission signal line.

[0199] According to another feature of the present invention, the third light emission signal line includes a third-1 light emission signal line connected to a plurality of sub-pixels in the first display area and a third-2 light emission signal line connected to a plurality of sub-pixels in the second display area. Among a plurality of third light emission signal generation units, a part outputs a third light emission signal to the third-1 light emission signal line, and another part among the plurality of third light emission signal generation units can output a third light emission signal to the third-2 light emission signal line.

[0200] According to another feature of the present invention, when driving the first display area in a wide viewing angle mode and driving the second display area in a narrow viewing angle mode, the gate driving unit can output a second light emission signal and a third light emission signal at a turn-on level to the second-2 light emission signal line and the third-1 light emission signal line.

[0201] According to another feature of the present invention, when driving the first display area in a narrow viewing angle mode and driving the second display area in a wide viewing angle mode, the gate driving unit can output a second light emission signal and a third light emission signal at a turn-on level to the second-1 light emission signal line and the third-2 light emission signal line.

[0202] According to another feature of the present invention, when driving the first display area and the second display area in a wide viewing angle mode, the gate driving unit outputs a second light emission signal and a third light emission signal at a turn-on level to the second-2 light emission signal line and the third-2 light emission signal line. When driving the first display area and the second display area in a narrow viewing angle mode, the gate driving unit can output a second light emission signal and a third light emission signal at a turn-on level to the second-1 light emission signal line and the third-1 light emission signal line.

[0203] According to another feature of the present invention, the display area further includes a third display area, the second light emission signal line further includes a second - 3 light emission signal line connected to a plurality of sub - pixels in the third display area, the third light emission signal line further includes a third - 3 light emission signal line connected to a plurality of sub - pixels in the third display area, and another part of the plurality of second light emission signal generation units can output a second light emission signal to the second - 3 light emission signal line, and another part of the plurality of third light emission signal generation units can output a third light emission signal to the third - 3 light emission signal line.

[0204] As described above, with reference to the accompanying drawings, the embodiments of the present invention have been described in more detail. However, the present invention is not necessarily limited to such embodiments, and can be variously modified and implemented within the scope not departing from the technical idea of the present invention. Therefore, the embodiments disclosed in the present invention are not for limiting the technical idea of the present invention, but for explanation, and the scope of the technical idea of the present invention is not limited by such embodiments. Therefore, it should be understood that the embodiments described above are exemplary in all aspects and not restrictive. The protection scope of the present invention should be interpreted by the following claims, and all technical ideas within the equivalent scope should be interpreted as being included in the scope of rights of the present invention.

[0205] These and other modifications can be added to the embodiments in light of the above - detailed description. Generally, in the following claims, the terms used should not be construed so as to limit the claims to the specific embodiments disclosed in the specification and claims, but should be construed to include all possible embodiments together with the full scope of equivalents to which such claims are entitled. Therefore, the claims are not limited by the present disclosure.

Explanation of Reference Numerals

[0206] 100 Light - emitting display device 210 Light - shielding pattern 220 Optical gap layer 230 Lens layer

Claims

1. A display panel in which a plurality of display areas including a first display area and a second display area are defined; A plurality of sub-pixels arranged in each of the plurality of display areas; A gate driving unit implemented in the plurality of display areas and supplying a gate signal to a gate line of the display panel, Each of the plurality of sub-pixels includes: A first light-emitting element that emits light by a driving current; A first lens that refracts light from the first light-emitting element; A second light-emitting element that emits light by the driving current; A second lens that refracts light from the second light-emitting element and has a shape different from that of the first lens, Each of the plurality of display areas is independently driven in either a narrow viewing angle mode or a wide viewing angle mode, In the narrow viewing angle mode, the first light-emitting element emits light, and the light from the first light-emitting element is output with a viewing angle limited with respect to a first direction and a second direction intersecting the first direction by the first lens, In the wide viewing angle mode, the second light-emitting element emits light, and the light from the second light-emitting element is output with the viewing angle limited only with respect to the first direction by the second lens. A light-emitting display device.

2. The first lens includes a half-spherical lens (Half-Spherical Lens), The second lens includes a half-cylindrical lens (Half-Cylindrical Lens). The light-emitting display device according to claim 1.

3. Each of the plurality of sub-pixels is driven separately in an initial period, a sampling period, and an emission period, During the emission period, the driving current is applied to the first light-emitting element or the second light-emitting element. The light-emitting display device according to claim 2.

4. Each of the plurality of sub-pixels further includes: A driving transistor that controls the driving current; A first light-emitting control transistor electrically connected between the driving transistor and the first light-emitting element and transmitting the driving current to the first light-emitting element; A second light-emitting control transistor electrically connected between the driving transistor and the second light-emitting element and transmitting the driving current to the second light-emitting element, In the narrow viewing angle mode, the first light-emitting control transistor is turned on and the second light-emitting control transistor is turned off, In the wide viewing angle mode, the first light-emitting control transistor is turned off and the second light-emitting control transistor is turned on. The light-emitting display device according to claim 3.

5. The light-emitting display device further includes a light-emitting signal line that transmits a light-emitting signal to a gate electrode of the first light-emitting control transistor. The light-emitting signal line in the first display region is separated from the light-emitting signal line in the second display region. The light-emitting display device according to claim 4. **Claim 6** The gate driving unit is mounted on each of the first display region and the second display region, and includes a plurality of light-emitting signal generation units that output the light-emitting signal to the light-emitting signal lines in the first display region and the second display region respectively. One of the light-emitting signal lines receives the application of a plurality of the light-emitting signals output from the plurality of light-emitting signal generation units. The light-emitting display device according to claim 5. **Claim 7** The light-emitting display device further includes a light-emitting signal line that transmits a light-emitting signal to a gate electrode of the second light-emitting control transistor. The light-emitting signal line in the first display region is separated from the light-emitting signal line in the second display region. The light-emitting display device according to claim 4. **Claim 8** The gate driving unit is mounted on each of the first display region and the second display region, and includes a plurality of light-emitting signal generation units that output the light-emitting signal to the light-emitting signal lines in the first display region and the second display region respectively. The light-emitting signals output by the plurality of light-emitting signal generation units mounted in the first display region are transmitted only to the light-emitting signal line in the first display region. The light-emitting signals output by the plurality of light-emitting signal generation units mounted in the second display region are transmitted only to the light-emitting signal line in the second display region. The light-emitting display device according to claim 7.

Images