Light-emitting component, light-emitting device, and measuring device

Abstract

To make it less likely to cause erroneous lighting up of a light emitting element lights as compared with a case where an absorption layer for absorbing light emitted from a thyristor is provided.SOLUTION: A light-emitting component includes a light-emitting element having a light-emitting layer for emitting light, a thyristor that is provided on the light-emitting element and causes light to be emitted from the light-emitting layer of the light-emitting element or increases the amount of light emitted from the light-emitting layer when turned on, and an absorption layer that is provided on the thyristor, transmits the light emitted from the light-emitting layer and absorbs the light emitted from the thyristor.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present invention relates to a light emitting component, a light emitting device, and a measuring device. [Background technology]

[0002] Patent Document 1 discloses a light-emitting component equipped with a light-emitting element having a laser diode and a thyristor connected in series to a radar diode. In this light-emitting component, the thyristor has an opening through which light from the laser diode is emitted, and the inner surface of the opening is covered with a light shield that suppresses light transmission. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2022-168786 Summary of the Invention [Problem to be solved by the invention]

[0004] There are light-emitting components that include light-emitting elements having light-emitting layers that emit light and thyristors disposed on each light-emitting element, and when the thyristors are turned on, light is emitted from the light-emitting layers of the light-emitting elements or the amount of light emitted from the light-emitting layers is increased. In such light-emitting components, the thyristors may be turned on by light emitted from other thyristors or by external light irradiated from outside the light-emitting component. In this case, the turned-on thyristor may cause light to be emitted from the light-emitting layers of light-emitting elements that are not intended to emit light, resulting in false lighting. An object of the present invention is to make it less likely for a light-emitting element to erroneously light up, compared to a case where no absorption layer for absorbing light emitted from a thyristor is provided. [Means for solving the problem]

[0005] The invention described in claim 1 is a light-emitting component comprising: a light-emitting element having a light-emitting layer that emits light; a thyristor provided on the light-emitting element that, when turned on, causes light to be emitted from the light-emitting layer of the light-emitting element or increases the amount of light emitted from the light-emitting layer; and an absorption layer provided on the thyristor that transmits the light emitted from the light-emitting layer and absorbs the light emitted from the thyristor. The invention described in claim 2 is the light-emitting component described in claim 1, wherein the light-emitting layer emits light from a light-emitting region which is a portion of the light-emitting layer, and the absorption layer is provided in an area that covers at least the light-emitting region when viewed in the stacking direction of the thyristor relative to the light-emitting layer. The invention described in claim 3 is a light-emitting component described in claim 2, further comprising an electrode provided on the thyristor for supplying power to the thyristor, the electrode being provided around the absorption layer when viewed from the stacking direction. A fourth aspect of the present invention is the light emitting component according to the third aspect, wherein the electrode is provided around the absorbing layer, straddling from the top surface of the thyristor to the side surface of the absorbing layer. The invention described in claim 5 is the light-emitting component described in claim 2, which includes an electrode provided on the thyristor for supplying power to the thyristor, the electrode being provided around the light-emitting region when viewed from the stacking direction, and the absorption layer being provided across the electrode and the thyristor exposed from the electrode. A sixth aspect of the present invention is the light-emitting component according to the first aspect, wherein the absorption layer absorbs light emitted from the thyristor and light having a shorter wavelength than the light emitted from the thyristor. The invention described in claim 7 is the light-emitting component described in claim 6, wherein the absorption layer includes a semiconductor layer having a band gap energy smaller than the band gap energy corresponding to the light emitted from the thyristor and larger than the band gap energy corresponding to the light emitted from the light-emitting layer. The invention described in claim 8 is the light-emitting component described in claim 1, further comprising a substrate on which a plurality of the light-emitting elements are provided, the thyristor being provided on each of the light-emitting elements, and the absorption layer being provided on each of the thyristors. The invention described in claim 9 is a light-emitting device comprising: a substrate; a plurality of light-emitting elements provided on the substrate, each having a light-emitting layer; a plurality of thyristors provided on each of the light-emitting elements, which, when turned on, cause light to be emitted from the light-emitting layer of the light-emitting element or increase the amount of light emitted from the light-emitting layer; an absorption layer provided on each of the thyristors, which transmits the light emitted from the light-emitting layer and absorbs the light emitted from the thyristor; and a drive unit that individually drives the plurality of thyristors to switch them to the on state. The invention described in claim 10 is a measuring device comprising the light emitting device described in claim 9 and an acquisition unit that receives reflected light from a measured object irradiated with light emitted from the light emitting device and acquires information about the measured object. [Effects of the Invention]

[0006] According to the inventions of claims 1, 9 and 10, it is possible to make it less likely for the light emitting element to light up erroneously, compared to a case where no absorption layer for absorbing light emitted from the thyristor is provided. According to the invention of claim 2, light from the light emitting region can be more easily transmitted through the absorption layer and emitted to the outside, compared to when the absorption layer is provided in an area narrower than the light emitting region. According to the invention of claim 3, current can be more easily supplied to the light emitting region than when no electrode is provided around the absorption layer. According to the invention of claim 4, the electrode and the absorption layer can be formed close to each other by a simple method, compared to when the electrode is not formed on the side surface of the absorption layer. According to the fifth aspect of the present invention, the absorption layer can be formed by a simpler method than when the absorption layer is not provided across the electrode and the thyristor. According to the invention of claim 6, the thyristor is prevented from being turned on by external light irradiated from outside the light-emitting element, compared to when the absorption layer does not absorb light with a shorter wavelength than the light emitted from the thyristor. According to the seventh aspect of the present invention, the absorption layer can more easily absorb light from the thyristor than when the band gap energy of the absorption layer is equal to or greater than the band gap energy corresponding to the light from the thyristor. According to the eighth aspect of the present invention, it is possible to make it less likely that the light emitting element will be erroneously turned on by the light emitted from other thyristors, compared to when no absorption layer is provided on each thyristor. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram illustrating an example of a measurement device to which the present embodiment is applied. [Figure 2] FIG. 1 is a diagram illustrating a light source device to which the present embodiment is applied, showing an equivalent circuit of the light source device. [Figure 3] 1 is an example of a planar layout diagram of a light-emitting chip to which the present embodiment is applied; [Figure 4] 1 is an example of a cross-sectional view of a light-emitting chip to which the present embodiment is applied. [Figure 5] 4 is an example of an enlarged cross-sectional view of an island in which a setting thyristor and a VCSEL are stacked, and is a cross-sectional view of the light-emitting chip taken along the VV portion in FIG. 3. [Figure 6] 10 is a timing chart illustrating an example of the operation of the light source device and the light-emitting chip. [Figure 7] 10 is a diagram illustrating an example of the configuration of the light-emitting chip of the second embodiment, and is an example of an enlarged cross-sectional view of an island in which a setting thyristor S and a VCSEL are stacked. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Here, a case will be described in which the light source device 1 including the light-emitting chip 10 is applied to a measurement device that measures the three-dimensional shape (hereinafter referred to as 3D shape) of an object to be measured, as an example. The light-emitting chip 10 is an example of a light-emitting component, and the light source device 1 is an example of a light-emitting device.

[0009] [Embodiment 1] (Measuring device 100) FIG. 1 is a diagram showing an example of a measurement device 100 to which this embodiment is applied. The measuring device 100 of this embodiment measures the three-dimensional shape of an object. The measuring device 100 is a device that measures the 3D shape based on the so-called ToF (Time of Flight) method, which uses the time of flight of light. The measuring device 100 includes a light source device 1 as an example of a light-emitting device including a light-emitting chip 10 and a control unit 110, and a three-dimensional sensor 5. Hereinafter, the three-dimensional sensor 5 will be referred to as the 3D sensor 5. In the ToF method, the time from when light is emitted from the light source device 1 to when the light is reflected by the object and received by the 3D sensor 5 is measured. Then, the distance to the object is calculated from the time acquired from the 3D sensor 5, and the 3D shape of the object is identified. Measuring the 3D shape may also be referred to as three-dimensional measurement, 3D measurement, or 3D sensing.

[0010] The light source device 1 emits light toward an object. The 3D sensor 5 acquires the reflected light that is reflected by the object and returns. The 3D sensor 5 outputs distance information regarding the distance to the object based on the time from when the emitted light is emitted until when the reflected light is received, measured using the ToF method. The measuring device 100 may also include a measurement control unit 200. The measurement control unit 200 is configured as a computer including a CPU (Central Processing Unit), ROM (Read Only Memory), RAM (Random Access Memory), etc., and identifies the 3D shape of the object based on the distance information acquired from the 3D sensor 5.

[0011] Furthermore, the measuring device 100 can be applied to recognizing an object from the identified 3D shape. For example, the measuring device 100 is installed in a portable information processing device and used to recognize the face of a user attempting to access the device. That is, the measuring device 100 acquires the 3D shape of the face of the accessing user, identifies whether or not the access is permitted, and permits use of the portable information processing device itself only if it is recognized that the user is authorized to access the device. The measuring device 100 can also be applied to cases where the 3D shape of an object is continuously measured, such as in augmented reality (AR).

[0012] (Light source device 1) Fig. 2 is a diagram for explaining a light source device 1 to which this embodiment is applied, and is a diagram showing an equivalent circuit of the light source device 1. Note that in the light source device 1 shown in Fig. 2, the positions of the φ1 terminal, φ2 terminal, Vga terminal, and φI terminal are not necessarily accurate. The light source device 1 shown in FIG.

[0013] (control unit 110) The control unit 110 includes a transfer signal generating unit 120 , a lighting signal generating unit 140 , a reference potential supplying unit 160 , and a power supply potential supplying unit 170 . The transfer signal generating unit 120 generates transfer signals φ1 and φ2 that sequentially transfer an ON state to a plurality of transfer thyristors T (described later). The light-up signal generating unit 140 generates a light-up signal φI that supplies a current that lights up a plurality of VCSELs (described later). The reference potential supplying unit 160 supplies a reference potential Vsub. The power supply potential supplying unit 170 supplies a power supply potential Vga.

[0014] (Light emitting chip 10) The light-emitting chip 10 includes a light-emitting unit 11 and a transfer unit 12. The light-emitting chip 10 also includes a φ1 terminal, a φ2 terminal, a Vga terminal, a φI terminal, and a Vsub terminal. The light-emitting unit 11 includes a vertical cavity surface-emitting laser (VCSEL). Hereinafter, the vertical cavity surface-emitting laser (VCSEL) will be referred to as VCSEL. In the example shown in FIG. 2, six VCSELs, VCSEL1 to VCSEL6, will be referred to as VCSELs when no distinction is made. The light-emitting unit 11 also includes six setting thyristors S1 to S6 (when no distinction is made, will be referred to as setting thyristor S). The anodes of the VCSELs and the cathodes of the setting thyristors S are connected. In other words, the setting thyristors S and VCSELs with the same number are connected in series. Additionally, as shown in FIG. 3, which will be described later, the setting thyristors S are stacked on the VCSELs formed on the substrate 80. Hereinafter, the setting thyristors S may be referred to as thyristors. In this embodiment, each VCSEL is an example of a light-emitting element, and each setting thyristor S is an example of a thyristor.

[0015] The transfer unit 12 includes six transfer thyristors T1 to T6 (referred to as transfer thyristors T when not distinguished), and six lower diodes UD1 to UD6 (referred to as lower diodes UD when not distinguished). The transfer thyristors T1 to T6 and the lower diodes UD1 to UD6 are connected in series with the transfer thyristor T and the lower diode UD of the same number. Additionally, as shown in FIG. 4, which will be described later, the transfer thyristor T is stacked on the lower diode UD formed on the substrate 80.

[0016] The transfer unit 12 also pairs the transfer thyristors T1 to T6 in numerical order, and includes coupling diodes D1 to D5 (referred to as coupling diode D when no distinction is needed) between each pair. Furthermore, the transfer section 20 includes power supply line resistors Rg1 to Rg6 (power supply line resistor Rg when no distinction is made).

[0017] The transfer unit 12 also includes one start diode SD. Furthermore, the transfer unit 12 includes current limiting resistors R1 and R2 that are provided to prevent excessive current from flowing through a first transfer signal line 72 to which a first transfer signal φ1 (described later) is supplied and a second transfer signal line 73 to which a second transfer signal φ2 (described later) is supplied.

[0018] The VCSEL1 to VCSEL6 and setting thyristors S1 to S6 of the light-emitting unit 11, the transfer thyristors T1 to T6 of the transfer unit 12, the lower diodes UD1 to UD6, the coupling diodes D1 to D5, and the power line resistors Rg1 to Rg6 are arranged in numerical order in the light-emitting chip 10 from one side (-x direction side, left side in Figure 2) to the other side (+x direction side, right side in Figure 2).

[0019] In this embodiment, the number of VCSELs and setting thyristors S in the light-emitting unit 11, and the number of transfer thyristors T, lower diodes UD, and power line resistances Rg in the transfer unit 12 are six each. The number of coupling diodes D is five, which is one less than the number of transfer thyristors T. The numbers of VCSELs, setting thyristors S, transfer thyristors T, lower diodes UD, power line resistances Rg, and coupling diodes D are not limited to the above and may be any predetermined number. The number of transfer thyristors T may also be greater than the number of VCSELs.

[0020] The above-mentioned VCSEL, lower diode UD, coupling diode D, and start diode SD are two-terminal semiconductor elements having an anode terminal (anode) and a cathode terminal (cathode). Also, the thyristors (setting thyristor S, transfer thyristor T) are three-terminal semiconductor elements having an anode terminal (anode), a gate terminal (gate), and a cathode terminal (cathode). Note that, below, terminals may be abbreviated and written in parentheses.

[0021] In the light-emitting chip 10 of this embodiment, the VCSEL, setting thyristor S, lower diode UD, transfer thyristor T, coupling diode D, power line resistance Rg, and start diode SD are configured as an integrated circuit using a semiconductor laminate epitaxially grown on a common semiconductor substrate (hereinafter referred to as substrate 80). Here, the semiconductor laminate is configured using, for example, a III-V group compound semiconductor such as GaAs, AlGaAs, or AlAs.

[0022] Next, the electrical connections of the elements in the light-emitting chip 10 will be described. The cathodes of the VCSEL and the lower diode UD are connected to the substrate 80 (common cathode). These cathodes are supplied with a reference potential Vsub via a back electrode 91 (see FIG. 4) which is a Vsub terminal provided on the back surface of the substrate 80. The anodes of the VCSELs are connected to the cathodes of the setting thyristors S. The anodes of the lower diodes UD are connected to the cathodes of the transfer thyristors T. This connection is a configuration when an n-type substrate 80 is used, and the polarity is reversed when a p-type substrate is used.

[0023] Along the arrangement of the transfer thyristors T, the anodes of the odd-numbered transfer thyristors T1, T3, and T5 are connected to a first transfer signal line 72. The first transfer signal line 72 is connected to a φ1 terminal via a current-limiting resistor R1. A first transfer signal φ1 is supplied to this φ1 terminal from the transfer signal generating unit 120 of the control unit 110. Meanwhile, along the arrangement of the transfer thyristors T, the anodes of the even-numbered transfer thyristors T2, T4, and T6 are connected to a second transfer signal line 73. The second transfer signal line 73 is connected to a φ2 terminal via a current-limiting resistor R2. A second transfer signal φ2 is supplied to this φ2 terminal from the transfer signal generating unit 120 of the control unit 110.

[0024] The anodes of the setting thyristors S are connected to a light-up signal line 75. The light-up signal line 75 is connected to a φI terminal. In the light-emitting chip 10, a light-up signal φI is supplied to the φI terminal from the light-up signal generating unit 140 of the control unit 110 via a current-limiting resistor RI provided outside the light-emitting chip 10. The light-up signal φI supplies a current for lighting the VCSEL.

[0025] The gates Gt1 to Gt6 (written as gate Gt when not distinguished) of the transfer thyristors T1 to T6 are connected one-to-one to the gates Gs1 to Gs6 (written as gate Gs when not distinguished) of the setting thyristors S1 to S6 having the same numbers. Therefore, the gates Gt1 to Gt6 and the gates Gs1 to Gs6 having the same numbers are electrically at the same potential. Therefore, for example, the gate is written as gate Gt1 (gate Gs1) to indicate that the potential is the same.

[0026] Coupling diodes D1 to D5 are connected between pairs of gates Gt1 to Gt6 of the transfer thyristors T1 to T6 in numerical order. That is, the coupling diodes D1 to D5 are directly connected so that they are sandwiched between the gates Gt1 to Gt6. The coupling diode D1 is connected in the direction in which current flows from the gate Gt1 to the gate Gt2. The same applies to the other coupling diodes D2 to D5.

[0027] The gates Gt (gates Gs) of the transfer thyristors T are connected to a power supply line 71 via power supply line resistors Rg provided corresponding to the respective transfer thyristors T. The power supply line 71 is connected to a Vga terminal. A power supply potential Vga is supplied to the Vga terminal from a power supply potential supply unit 170 of the control unit 110.

[0028] The gate Gt1 of the transfer thyristor T is connected to the cathode of the start diode SD. On the other hand, the anode of the start diode SD is connected to the second transfer signal line 73.

[0029] FIG. 3 is an example of a planar layout diagram of a light-emitting chip 10 to which this embodiment is applied. In FIG. 3, the rightward direction of the paper is the +x direction, the upward direction is the +y direction, and the obverse side of the paper is the +z direction, with the opposite directions being the -x, -y, and -z directions. FIG. 4 is an example of a cross-sectional view of the light-emitting chip 10 to which this embodiment is applied. FIG. 4 is a cross-sectional view of the light-emitting chip 10 at the IV-IV portion in FIG. 3. 3 and 4, a protective layer 90 (see FIG. 5) and a light-shielding layer 95 (see FIG. 5), which will be described later, are omitted. Also, in FIG. 4, the connection wirings shown in FIG. 3 are omitted.

[0030] First, the cross-sectional structure of the light-emitting chip 10 will be described with reference to FIG. The light emitting chip 10 includes an n-type cathode layer 81, a light emitting layer 82, and a p-type anode layer 83, which are sequentially provided on an n-type substrate 80 (substrate 80) and constitute a VCSEL and a lower diode UD. In the light emitting chip 10 of this embodiment, the n-type cathode layer 81 and the p-type anode layer 83 are configured by a distributed Bragg reflector (DBR) (hereinafter referred to as a DBR layer) in which multiple semiconductor layers having refractive index differences are stacked. Therefore, hereinafter, the n-type cathode layer 81 will be referred to as an n-cathode (DBR) layer 81. Similarly, the p-type anode layer 83 will be referred to as a p-anode (DBR) layer 83.

[0031] In the light emitting chip 10, a tunnel junction (tunnel diode) layer 84 (tunnel junction layer 84) is provided on the p anode (DBR) layer 83. Furthermore, the light-emitting chip 10 has an n-type cathode layer 85 (n-cathode layer 85), a p-type gate layer 86 (p-gate layer 86), an n-type gate layer 87 (n-gate layer 87), and a p-type anode layer 88 (p-anode layer 88) formed in this order on the tunnel junction layer 84, which constitute the setting thyristor S, the transfer thyristor T, the coupling diode D, and the power line resistance Rg. In the following, the notation in parentheses will be used. The same applies to other cases.

[0032] Elements such as the VCSEL, lower diode UD, setting thyristor S, transfer thyristor T, and coupling diode D are composed of multiple islands separated by removing portions of each of the above layers through etching. Note that an island is sometimes referred to as a mesa, and the etching that forms the island (mesa) is sometimes referred to as mesa etching. In the light-emitting chip 10, these islands are connected to wiring such as a power supply line 71, a first transfer signal line 72, a second transfer signal line 73, and a light-up signal line 75 via through-holes (indicated by circles in FIG. 3) provided in a protective layer 90 (see FIG. 5). In the following description, a description of the protective layer and the through-holes will be omitted.

[0033] As shown in FIG. 4, a back surface electrode 91 serving as a Vsub terminal is provided on the back surface of the substrate 80.

[0034] Here, the notation of the n-cathode (DBR) layer 81 and the p-anode (DBR) layer 83 corresponds to their functions when configuring a VCSEL and a lower diode UD. That is, the n-cathode (DBR) layer 81 functions as a cathode, and the p-anode (DBR) layer 83 functions as an anode. The notations of the n-cathode layer 85, p-gate layer 86, n-gate layer 87, and p-anode layer 88 correspond to the functions when configuring the setting thyristor S and the transfer thyristor T. That is, the n-cathode layer 85 functions as a cathode, the p-gate layer 86 and n-gate layer 87 function as gates, and the p-anode layer 88 functions as an anode. When the above layers constitute the coupling diode D and the power supply line resistance Rg, they have different functions as will be described later.

[0035] As will be described below, the multiple islands included in the light-emitting chip 10 include those that do not include some of the n-cathode (DBR) layer 81, the light-emitting layer 82, the p-anode (DBR) layer 83, the tunnel junction layer 84, the n-cathode layer 85, the p-gate layer 86, the n-gate layer 87, and the p-anode layer 88. For example, islands 301 and 302, which will be described later, do not include part of the p-anode layer 88.

[0036] Next, an example of a planar layout of the light-emitting chip 10 will be described with reference to FIG. The island 301 is provided with a VCSEL1 and a setting thyristor S1. The island 302 is provided with a lower diode UD1, a transfer thyristor T1, and a coupling diode D1. The island 303 is provided with a power line resistor Rg1. The island 304 is provided with a start diode SD. The island 305 is provided with a current limiting resistor R1, and the island 306 is provided with a current limiting resistor R2. The light-emitting chip 10 has a plurality of islands formed in parallel, each of which is similar to the islands 301, 302, and 303. These islands are provided with VCSEL2 to VCSEL6, setting thyristors S2 to S6, lower diodes UD2 to UD6, transfer thyristors T2 to T6, coupling diodes D2 to D5, and the like, similar to the islands 301, 302, and 303.

[0037] Here, the islands 301 to 306 will be described in detail with reference to FIGS. 4, the VCSEL1 provided on the island 301 is composed of an n-cathode (DBR) layer 81, a light-emitting layer 82, and a p-anode (DBR) layer 83. The setting thyristor S is composed of an n-cathode layer 85, a p-gate layer 86, an n-gate layer 87, and a p-anode layer 88 stacked via a tunnel junction layer 84 stacked on the p-anode (DBR) layer 83 of the VCSEL1. Furthermore, the island 301 is provided with an absorption layer 93 on the p anode layer 88 of the setting thyristor S, which transmits light emitted from the light emitting layer 82 and absorbs light emitted from the setting thyristor S. The absorption layer 93 will be described in more detail later.

[0038] As shown in FIG. 4, the p-anode (DBR) layer 83 of the VCSEL includes a current confinement layer 83a (see FIG. 5, described later) that confines current, as indicated by the black dots. The current confinement layer 83a is formed by oxidizing a portion of the semiconductor layer that constitutes the n-cathode (DBR) layer 81, exposed by mesa etching, from the periphery, forming a current blocking portion β (see FIG. 5), through which current does not easily flow. Meanwhile, the central portion of the semiconductor layer that constitutes the n-cathode (DBR) layer 81, where the portion is not oxidized, forms a current passing portion α, through which current easily flows. The area inside the dashed line shown in FIG. 3 for the VCSEL1 is the current passing portion α, and the area outside the dashed line is the current blocking portion β. Note that the current blocking portion β does not need to completely block the flow of current; it is sufficient if it can concentrate the current in the current passing portion α. In other words, it is sufficient if the current blocking portion β is more difficult to pass than the current passing portion α. By providing the current blocking portion β, the power consumed by non-radiative recombination is reduced. By providing the current blocking portion β, it is possible to reduce power consumption and improve the light extraction efficiency. The light extraction efficiency is the amount of light that can be extracted per unit of power.

[0039] In each VCSEL, multiple current passing portions α (four in this example) are formed in the y direction. In this example, each current passing portion α has a circular shape when viewed in the z direction. In a VCSEL, current is concentrated in the current passing portion α, causing light to be emitted mainly from a portion of the light-emitting layer 82 located below the current passing portion α. Hereinafter, in a VCSEL, the region of the light-emitting layer 82 from which light is emitted in response to the supply of current may be referred to as a light-emitting point 50. Additionally, in this embodiment, each VCSEL has multiple light-emitting points 50 aligned in the y direction. Furthermore, each light-emitting point 50 has a circular shape when viewed in the z direction, corresponding to the shape of the current passing portion α. The light-emitting point 50 is an example of a light-emitting region.

[0040] In the setting thyristor S1, a p-type ohmic electrode 321 (p ohmic electrode 321) provided on the region 311 of the p anode layer 88 serves as an anode terminal. Also, an n-type ohmic electrode 331 (n ohmic electrode 331) provided on the n gate layer 87 exposed by removing the p anode layer 88 serves as a terminal of the gate Gs1.

[0041] The lower diode UD1 provided in the island 302, like the VCSEL, is composed of an n-cathode (DBR) layer 81, a light-emitting layer 82, and a p-anode (DBR) layer 83. Like the setting thyristor S1, the transfer thyristor T1 is composed of an n-cathode layer 85, a p-gate layer 86, an n-gate layer 87, and a p-anode layer 88, which are stacked via a tunnel junction layer 84 stacked on the p-anode (DBR) layer 83 of the lower diode UD1. A p-ohmic electrode 323 provided on region 313 of p-anode layer 88 serves as an anode terminal. Furthermore, an n-ohmic electrode 332 provided on n-gate layer 87 exposed by removing p-anode layer 88 serves as a terminal of gate Gt1. Similarly, coupling diode D1 provided in island 302 is composed of an n-gate layer 87 and a p-anode layer 88. A p-ohmic electrode 324 provided on region 314 of p-anode layer 88 serves as the anode terminal. Furthermore, an n-ohmic electrode 332 provided on n-gate layer 87 exposed by removing p-anode layer 88 serves as the cathode terminal. Here, the cathode terminal of coupling diode D is the same as gate Gt1.

[0042] The power supply line resistance Rg1 provided in the island 303 is composed of the p anode layer 88. That is, the power supply line resistance Rg1 is provided with the p anode layer 88 between the p ohmic electrode 333 and the p ohmic electrode 334 provided on the p anode layer 88 as a resistor.

[0043] The start diode SD provided in the island 304 is composed of an n-gate layer 87 and a p-anode layer 88. That is, the start diode SD has, as its anode terminal, a p-ohmic electrode 325 provided on a region 315 of the p-anode layer 88. Furthermore, the start diode SD has, as its cathode terminal, an n-ohmic electrode 335 provided on the n-gate layer 87 exposed by removing the p-anode layer 88. The current limiting resistor R1 provided in island 305 and the current limiting resistor R2 provided in island 306 are provided in the same manner as the power line resistor Rg1 provided in island 303, and each uses the p anode layer 88 between two p ohmic electrodes (unnumbered) as a resistor.

[0044] Next, the connection relationships between the elements will be explained with reference to FIG. The light-on signal line 75 has a trunk 75a and multiple branch portions 75b. The trunk 75a is provided so as to extend in the column direction of the setting thyristors S / VCSEL. The branch portions 75b branch off from the trunk 75a and are connected to the p-ohmic electrode 321, which is the anode terminal of the setting thyristor S1 provided on the island 301. The anode terminals of the other setting thyristors S are connected in the same manner. The light-on signal line 75 is connected to the φI terminal provided on the setting thyristor S1 / VCSEL1 side.

[0045] The first transfer signal line 72 is connected to the p-ohmic electrode 323, which is the anode terminal of the transfer thyristor T1 provided in the island 302. The first transfer signal line 72 is connected to the anode terminals of other odd-numbered transfer thyristors T provided in islands similar to the island 302. The first transfer signal line 72 is connected to the φ1 terminal via a current limiting resistor R1 provided in the island 305. On the other hand, the second transfer signal line 73 is connected to a p-ohmic electrode (without reference numeral) which is the anode terminal of the even-numbered transfer thyristor T provided in the island without reference numeral. The second transfer signal line 73 is connected to the φ2 terminal via a current limiting resistor R2 provided in the island 306.

[0046] The power supply line 71 is connected to a p-ohmic electrode 334, which is one terminal of a power supply line resistor Rg1 provided on the island 303. One terminal of another power supply line resistor Rg is also connected to the power supply line 71. The power supply line 71 is connected to the Vga terminal.

[0047] The n-ohmic electrode 331 (gate terminal Gs1) of the setting thyristor S1 provided on the island 301 is connected to the n-ohmic electrode 332 (gate terminal Gt1) of the island 302 by a connection wire .

[0048] The n-ohmic electrode 332 (gate terminal Gt1) is connected to the p-ohmic electrode 333 (the other terminal of the power supply line resistance Rg1) of the island 303 by a connection wire 77. A p-ohmic electrode 324 (anode terminal of the coupling diode D1) provided on the island 302 is connected by a connection wiring 79 to an n-ohmic electrode (no reference numeral) which is the gate terminal Gt2 of the adjacent transfer thyristor T2. Although the explanation is omitted here, the same applies to other VCSELs, setting thyristors S, transfer thyristors T, coupling diodes D, etc.

[0049] The n-ohmic electrode 332 (gate terminal Gt1) of the island 302 is connected to the p-ohmic electrode 325 (cathode terminal of the start diode SD) provided on the island 304 by a connection wiring 78. The n-ohmic electrode 335 (anode terminal of the start diode SD) is connected to a second transfer signal line 73. The above connections and configurations are for when an n-type substrate 80 is used, and when a p-type substrate is used, the polarity is reversed.

[0050] (Stacked structure of setting thyristor S and VCSEL) Fig. 5 is an example of an enlarged cross-sectional view of an island in which a setting thyristor S and a VCSEL are stacked, and is a cross-sectional view of the light-emitting chip 10 at the VV portion in Fig. 3. Fig. 5 corresponds to a cross-section of the island in which a setting thyristor S and a VCSEL are stacked, viewed from the -y direction in Fig. 3. Fig. 5 also shows a partial region of an island 301 in which a VCSEL1 and a setting thyristor S1 are stacked. As described above, the setting thyristor S is stacked on the VCSEL via the tunnel junction layer 84. That is, the setting thyristor S and the VCSEL are connected in series. In addition, an absorption layer 93 that absorbs light emitted from the setting thyristor S is stacked on the setting thyristor S. Note that "on the VCSEL" does not only refer to a state in which the VCSEL is in direct contact with the VCSEL, but also includes a state in which the VCSEL is positioned above the VCSEL without being in direct contact with the VCSEL. The same applies to similar expressions such as "on the substrate."

[0051] As shown in FIG. 5, the VCSEL is composed of a semiconductor laminate in which an n-cathode (DBR) layer 81, a light-emitting layer 82, and a p-anode (DBR) layer 83 are epitaxially grown in this order on an n-type substrate 80. The n-cathode (DBR) layer 81 and the p-anode (DBR) layer 83 are DBR layers formed by alternately stacking multiple high-refractive-index layers and low-refractive-index layers, and are configured to reflect light emitted from the VCSEL.

[0052] The p anode (DBR) layer 83 also includes a current confinement layer 83a. In this example, the current confinement layer 83a is provided on the side of the p anode (DBR) layer 83 that faces the light-emitting layer 82. The current confinement layer 83a is made up of a current passing portion α and a current blocking portion β. As shown in FIG. 4, the current passing portion α is provided in the center of the light-emitting point 50, and the current blocking portion β is provided in the peripheral portion of the light-emitting point 50. In other words, the portion of the current confinement layer 83a is the current blocking portion β, and the portion where the current confinement layer 83a is not provided is the current passing portion α. The current confinement layer may be provided in the n-cathode (DBR) layer 81.

[0053] The light-emitting layer 82 has a quantum well structure in which well layers and barrier layers are alternately stacked. The light-emitting layer 82 may be an intrinsic (i) type layer (i layer) to which no impurities are added. The light-emitting layer 82 may also have a structure other than a quantum well structure, such as a quantum wire or a quantum dot.

[0054] The tunnel junction layer 84 is an n-type layer doped with a high concentration of n-type impurities (dopants). ++ layer and p-type impurity-doped p ++ The tunnel junction layer 84 is a junction between the p-anode (DBR) layer 83 of the VCSEL and the setting thyristor S, and current flows due to the tunnel effect even when reverse bias is applied. The tunnel junction layer 84 prevents the p-anode (DBR) layer 83 of the VCSEL and the setting thyristor S from becoming reverse biased and making it difficult for current to flow. Current flows due to the tunnel effect even when reverse bias is applied.

[0055] The setting thyristor S is composed of an n-cathode layer 85, a p-gate layer 86, an n-gate layer 87, and a p-anode layer 88, which are stacked on a tunnel junction layer 84. That is, it has a four-layer pnpn structure. The absorption layer 93 is made of a semiconductor layer laminated on the p anode layer 88 of the setting thyristor S.

[0056] These semiconductor layers are stacked by, for example, metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or the like to form a semiconductor stack. The structures of the substrate 80, the n-cathode (DBR) layer 81, the light-emitting layer 82, the p-anode (DBR) layer 83 that constitute the VCSEL, the n-cathode layer 85, the p-gate layer 86, the n-gate layer 87, the p-anode layer 88 that constitute the setting thyristor S, and the absorption layer 93 will be described in more detail later.

[0057] The p ohmic electrode 321 is made of Au containing Zn (AuZn), which can easily make ohmic contact with a p-type semiconductor layer such as the p anode layer 88, for example. The n-ohmic electrode 331 (see FIG. 4) is made of Au containing Ge (AuGe), which can easily make ohmic contact with an n-type semiconductor layer such as the n-gate layer 87, for example. The rear electrode 91 is made of, for example, AuGe, similar to the n-ohmic electrode 331 .

[0058] In the above, the ohmic electrode 331 is provided on the n-gate layer 87 to serve as the gate Gs of the setting thyristor S, but the p-gate layer 86 may be provided with a p-ohmic electrode to serve as the gate Gs of the setting thyristor S.

[0059] The light-emitting chip 10 (see FIG. 4) is also provided with a protective layer 90 made of a light-transmitting insulating material that covers the surface and side surfaces of the island. The protective layer 90 is made of, for example, SiO2, SiON, SiN, or the like. Furthermore, the light-emitting chip 10 is provided with a light-shielding layer 95 for preventing light emitted from the setting thyristor S from leaking out from between the islands onto the surface of the light-emitting chip 10. The light-shielding layer 95 may be the above-mentioned wiring.

[0060] (Operation of light source device 1) Next, the operation of the light source device 1 will be described with reference to FIGS. Fig. 6 is a timing chart illustrating an example of the operation of the light source device 1 and the light-emitting chip 10. Fig. 6 is a timing chart of a portion that controls the lighting / non-lighting of four VCSELs, VCSEL1 to VCSEL4, of the light-emitting chip 10. In Fig. 6, VCSEL1, VCSEL2, and VCSEL3 are turned on (emit light), and VCSEL4 is turned off (does not emit light).

[0061] 6, time passes in alphabetical order from time a to time k. At this time, VCSEL1 is controlled to be lit or not lit (referred to as "lighting control") in period T(1), VCSEL2 in period T(2), VCSEL3 in period T(3), and VCSEL4 in period T(4). Note that periods T(1), T(2), T(3), ... are all the same length, and when there is no need to distinguish between them, they are referred to as period T. In the following, "H" (0V) and "L" (-5V) may be abbreviated as "H" and "L".

[0062] The first transfer signal φ1 transmitted to the φ1 terminal and the second transfer signal φ2 transmitted to the φ2 terminal are signals having two potentials, "H" and "L." The waveforms of the first transfer signal φ1 and the second transfer signal φ2 are repeated every two consecutive periods T (for example, periods T(1) and T(2)).

[0063] The first transfer signal φ1 transitions from “H” to “L” at time b, which is the start of the period T(1), and transitions from “L” to “H” at time f. Then, at time i, which is the end of the period T(2), it transitions from “H” to “L.” The second transfer signal φ2 is “H” (0 V) at time b, which is the start time of the period T(1), and transitions from “H” to “L” at time e. Then, it transitions from “L” to “H” at time i, which is the end time of the period T(2). Comparing the first transfer signal φ1 and the second transfer signal φ2, the second transfer signal φ2 corresponds to the first transfer signal φ1 shifted back by a period T on the time axis. Meanwhile, the waveform of the second transfer signal φ2 shown by the dashed line in period T(1) and the waveform in period T(2) are repeated from period T(3) onwards. The waveform of the second transfer signal φ2 in period T(1) is different from that in period T(3) and later because period T(1) is the period when the light source device 1 starts operating.

[0064] As will be described later, a set of transfer signals, the first transfer signal φ1 and the second transfer signal φ2, propagates the on state of the transfer thyristors T in numerical order, thereby designating the VCSEL with the same number as the on-state transfer thyristor T as the target for lighting or non-lighting (lighting control).

[0065] Next, the light-up signal φI supplied to the φI terminal will be described. The light-up signal φI is a signal that has two potentials, "H" and "L". Here, we will explain the light-up signal φI during the period T(1) of light-up control for the VCSEL 1. The light-up signal φI is "H" at the start time b of the period T(1), and transitions from "H" to "L" at time c. It then transitions from "L" to "H" at time d, and remains at "H" at time e.

[0066] (1) Time a At time a, the reference potential supply unit 160 of the control unit 110 of the light source device 1 sets the reference potential Vsub to "H." The power supply potential supply unit 170 of the control unit 110 sets the power supply potential Vga to "L." The transfer signal generation unit 120 of the control unit 110 sets the first transfer signal φ1 and the second transfer signal φ2 to "H." As a result, the φ1 terminal and the φ2 terminal of the light-emitting chip 10 become "H." The potential of the first transfer signal line 72 connected to the φ1 terminal via the current limiting resistor R1 also becomes "H," and the potential of the second transfer signal line 73 connected to the φ2 terminal via the current limiting resistor R2 also becomes "H." Then, the lighting signal generating unit 140 of the control unit 110 sets the lighting signal φI to “H.” As a result, the φI terminal of the light-emitting chip 10 becomes “H” via the current limiting resistor RI, and the lighting signal line 75 connected to the φI terminal also becomes “H.”

[0067] The anode (p anode layer 85) of the setting thyristor S is connected to the cathode (n cathode (DBR) layer 83) of the VCSEL via the tunnel junction layer 84, and the anode (p anode (DBR) layer 81) of the VCSEL is connected to the Vsub terminal set to "H". The anode (p anode layer 85) of the transfer thyristor T is connected to the cathode (n cathode (DBR) layer 83) of the lower diode UD via the tunnel junction layer 84, and the anode (p anode (DBR) layer 81) of the lower diode UD is connected to the Vsub terminal set to “H”.

[0068] The cathodes of the odd-numbered transfer thyristors T1, T3, and T5 are connected to the first transfer signal line 72 and are set to "H." The cathodes of the even-numbered transfer thyristors T2, T4, and T6 are connected to the second transfer signal line 73 and are set to "H." Therefore, the anode and cathode of the transfer thyristor T are both "H," and the transfer thyristor T is in the off state. In addition, the anode and cathode of the lower diode UD are both "H," and the lower diode UD is also in the off state.

[0069] The cathode terminal of the setting thyristor S is connected to the "H" (0V) light-up signal line 75. Therefore, the anode and cathode of the setting thyristor S are both "H" and in the off state. The anode and cathode of the VCSEL are also both "H" and in the off state.

[0070] As described above, the gate Gt1 is connected to the cathode of the start diode SD. The gate Gt1 is connected to the power supply line 71 at a power supply potential Vga ("L") via a power supply line resistor Rg1. The anode terminal of the start diode SD is connected to the second transfer signal line 73 and to the "H" φ2 terminal via a current limiting resistor R2. Therefore, the start diode SD is forward biased, and the cathode (gate Gt1) of the start diode SD becomes -1.5V, which is the potential of the anode of the start diode SD ("H") minus the forward potential Vd (1.5V) of the pn junction. Furthermore, when the gate Gt1 becomes -1.5V, the coupling diode D1 becomes forward biased because its anode (gate Gt1) is -1.5V and its cathode is connected to the power supply line 71 ("L") via the power supply line resistor Rg2. Therefore, the potential of gate Gt2 becomes -3V, which is the potential of gate Gt1 (-1.5V) minus the forward potential Vd (1.5V) of the pn junction. Furthermore, the coupling diode D2 is forward biased because its anode (gate Gt1) is -3V and its cathode is connected to the power supply line 71 ("L") via the power supply line resistor Rg2. Therefore, the potential of gate Gt3 becomes -4.5V, which is the potential of gate Gt2 (-3V) minus the forward potential Vd (1.5V) of the pn junction. However, the gates Gt numbered 4 and above are not affected by the anode of the start diode SD being "H," and the potential of these gates Gt becomes "L," which is the potential of the power supply line 71.

[0071] Note that, since the gate Gt is the gate Gs, the potential of the gate Gs is the same as the potential of the gate Gt. Therefore, the threshold voltages of the transfer thyristor T and the setting thyristor S are the potentials of the gates Gt and Gs minus the forward potential Vd (1.5 V) of the pn junction. That is, the threshold voltages of the transfer thyristor T1 and the setting thyristor S1 are −3 V, the threshold voltages of the transfer thyristor T2 and the setting thyristor S2 are −4.5 V, the threshold voltages of the transfer thyristor T3 and the setting thyristor S3 are −6 V, and the threshold voltages of the transfer thyristors T and the setting thyristors S whose numbers are 4 or more are −6.5 V.

[0072] (2) Time b 6, the first transfer signal φ1 transitions from “H” to “L,” causing the light source device 1 to start operating. When the first transfer signal φ1 transitions from "H" to "L," the potential of the first transfer signal line 72 transitions from "H" to "L" via the φ1 terminal and the current-limiting resistor R1. Then, the voltage applied to the transfer thyristor T1 is −3.3 V, and the transfer thyristor T1, whose threshold voltage is −3 V, turns on. At this time, a current flows through the lower diode UD1, causing the transfer thyristor T1 to transition from an OFF state to an ON state. When the transfer thyristor T1 turns on, the potential of the first transfer signal line 72 becomes a potential close to −3.2 V (a negative potential with an absolute value greater than 3.2 V) obtained by subtracting the forward potential Vd (1.5 V) of the pn junction from the potential of the anode of the transfer thyristor T1 (−1.7 V, which is the potential applied to the lower diode UD1). The threshold voltage of the transfer thyristor T3 is −6 V, and the threshold voltage of the transfer thyristor T5 is −6.5 V. The voltage applied to the transfer thyristors T3 and T5 is −1.5 V, which is the sum of the voltage of 1.7 V applied to the VCSEL and −3.2 V, and therefore the transfer thyristors T3 and T5 do not turn on. On the other hand, the even-numbered transfer thyristors T cannot be turned on because the second transfer signal φ2 is “H” and the second transfer signal line 73 is “H”.

[0073] When the transfer thyristor T1 is turned on, the potential of the gates Gt1 / Gs1 becomes "H," which is the potential of the anode of the transfer thyristor T1. Then, the potential of the gate Gt2 (gate Gs2) becomes -1.5V, the potential of the gate Gt3 (gate Gs3) becomes -3V, the potential of the gate Gt4 (gate Gs4) becomes -4.5V, and the potential of the gates Gt (gate Gl) numbered 5 or greater becomes "L." As a result, the threshold voltage of the setting thyristor S1 becomes −1.5V, the threshold voltage of the transfer thyristor T2 and setting thyristor S2 becomes −3V, the threshold voltage of the transfer thyristor T3 and setting thyristor S3 becomes −4.5V, the threshold voltage of the transfer thyristor T4 and setting thyristor S4 becomes −6V, and the threshold voltage of the transfer thyristors T5, T6, and setting thyristors S5, S6 becomes −6.5V. However, because the first transfer signal line 72 is at −1.5 V due to the transfer thyristor T1 in the ON state, the odd-numbered transfer thyristors T in the OFF state do not turn on. Because the second transfer signal line 73 is “H,” the even-numbered transfer thyristors T do not turn on. In addition, because the light-on signal line 75 is “H,” none of the VCSELs light up.

[0074] Immediately after time b (here, this refers to the time when a steady state is reached after a change in the thyristors, etc. occurs due to a change in the signal potential at time b), the transfer thyristor T1 and the lower diode UD1 are in the ON state, and the other transfer thyristors T, the lower diode UD, the setting thyristor S, and the VCSEL are in the OFF state.

[0075] (3) Time c At time c, the light-up signal φI transitions from “H” to “L”. When the light-up signal φI transitions from "H" to "L," the light-up signal line 75 transitions from "H" to "L" via the current-limiting resistor RI and the φI terminal. Then, -3.3V, which is the sum of the voltage 1.7V applied to the VCSEL, is applied to the setting thyristor S1, and the setting thyristor S1, which has a threshold voltage of -1.5V, turns on and the VCSEL1 lights up (emits light). This causes the potential of the light-up signal line 75 to become close to -3.2V. Note that although the threshold voltage of the setting thyristor S2 is -3V, the voltage applied to the setting thyristor S2 is -1.5V, which is the sum of the voltage 1.7V applied to the VCSEL and -3.2V, so the setting thyristor S2 does not turn on. Immediately after time c, the transfer thyristor T1, the lower diode UD1, and the setting thyristor S1 are in the ON state, and the VCSEL1 is turned on (emitting light).

[0076] (4) Time d At time d, the light-up signal φI transitions from “L” to “H”. When the light-up signal φI transitions from "L" to "H," the potential of the light-up signal line 75 transitions from -3.2 V to "H" via the current limiting resistor RI and the φI terminal. Then, the cathode of the setting thyristor S1 and the anode of VCSEL1 both become "H," turning off the setting thyristor S1 and turning off VCSEL1 (becoming unlit). The light-up period of VCSEL1 is the period during which the light-up signal φI is "L," from time c when the light-up signal φI transitions from "H" to "L" to time d when the light-up signal φI transitions from "L" to "H." Immediately after time d, the transfer thyristor T1 is in the ON state.

[0077] (5) Time e At time e, the second transfer signal φ2 transitions from “H” to “L.” At this point, the period T(1) during which the VCSEL1 is controlled to be lit ends, and the period T(2) during which the VCSEL2 is controlled to be lit begins. When the second transfer signal φ2 transitions from "H" to "L," the potential of the second transfer signal line 73 transitions from "H" to "L" via the φ2 terminal. As described above, the transfer thyristor T2 turns on because its threshold voltage is −3 V. At this time, a current also flows through the lower diode UD2, transitioning it from an off state to an on state. As a result, the potential of gate Gt2 (gate Gs2) becomes "H" (0V), the potential of gate Gt3 (gate Gs3) becomes -1.5V, the potential of gate Gt4 (gate Gs4) becomes -3V, the potential of gate Gt5 (gate Gs5) becomes -4.5V, and the potential of gate Gt6 (gate Gs6) becomes -5V. Immediately after time e, the transfer thyristors T1 and T2 and the lower diodes UD1 and UD2 are in the ON state.

[0078] (6) Time f At time f, the first transfer signal φ1 transitions from “L” to “H”. When the first transfer signal φ1 transitions from "L" to "H," the potential of the first transfer signal line 72 transitions from "L" to "H" via the φ1 terminal. Then, the anode and cathode of the transfer thyristor T1, which is in the ON state, both become "H," turning it off. At this time, the anode and cathode of the lower diode UD1 also both become "H," transitioning it from the ON state to the OFF state. Then, the potential of the gate Gt1 (gate Gs1) changes toward the power supply potential Vga ("L") of the power supply line 71 via the power supply line resistance Rg1. As a result, the coupling diode D1 becomes reverse biased, in which a potential is applied in a direction that prevents current from flowing. Therefore, the influence of the gate Gt2 (gate Gs2) being "H" no longer extends to the gate Gt1 (gate Gs1). In other words, the threshold voltage of the transfer thyristor T having the gate Gt connected by the reverse-biased coupling diode D becomes -6.5 V, and the transfer thyristor T does not turn on even if the first transfer signal φ1 or the second transfer signal φ2 becomes "L". Immediately after time f, the transfer thyristor T2 and the lower diode UD2 are in the ON state.

[0079] (7) Other At time g, when the light-up signal φI transitions from “H” to “L”, the setting thyristor S2 turns on, and VCSEL2 lights up, similar to VCSEL1 and setting thyristor S1 at time c. Then, at time h, when the light-up signal φI transitions from “L” to “H”, the setting thyristor S2 turns off, similar to the VCSEL1 and setting thyristor S1 at time d, and the VCSEL2 goes out. Furthermore, at time i, when the first transfer signal φ1 transitions from “H” to “L”, the transfer thyristor T3, whose threshold voltage is −3 V, is turned on, similar to the transfer thyristor T1 at time b or the transfer thyristor T2 at time e. At time i, the period T(2) during which the lighting of VCSEL2 is controlled ends, and the period T(3) during which the lighting of VCSEL3 is controlled begins. What follows is a repetition of what has been explained so far.

[0080] When the VCSEL is not turned on but is to remain off (non-illuminated), the illumination signal φI can be kept at “H” as shown in the illumination signal φI from time j to time k in the period T(4) during which the illumination of VCSEL4 is controlled in Fig. 6. In this way, even if the threshold voltage of the setting thyristor S4 is −1.5 V, the setting thyristor S4 will not turn on and the VCSEL will remain off.

[0081] As described above, the gate terminals Gt of the transfer thyristors T are connected to each other by the coupling diode D. Therefore, when the potential of the gate Gt changes, the potential of the gate Gs connected to the gate Gt whose potential has changed via the forward-biased coupling diode D also changes. This changes the threshold voltage of the transfer thyristor T having the gate whose potential has changed. If the threshold voltage is higher than −3.3 V (a negative value with a small absolute value), the transfer thyristor T turns on at the timing when the first transfer signal φ1 or the second transfer signal φ2 transitions from “H” to “L.” The setting thyristor S, whose gate Gs is connected to the gate Gt of the transfer thyristor T in the ON state, has a threshold voltage of −1.5 V, so when the lighting signal φI transitions from “H” to “L”, it turns on, and the VCSEL connected in series to the setting thyristor S lights up.

[0082] That is, when the transfer thyristor T is turned on, it designates the VCSEL that is the target of lighting control, and the lighting signal φI of “L” turns on the setting thyristor S connected in series to the VCSEL that is the target of lighting control, and lights up the VCSEL. That is, in the light-emitting chip 10, the on state of the transfer thyristor T is transferred, and the VCSELs are sequentially lit up. The lighting signal φI at "H" maintains the setting thyristor S in the off state and also maintains the VCSEL in the non-lighting state. That is, the lighting signal φI sets the lighting / non-lighting state of the VCSEL.

[0083] The voltages used in the explanation are merely examples, and should be changed depending on the emission wavelength and light intensity of the VCSEL. In that case, the potential ("L") of the light-up signal φI should be adjusted.

[0084] In this way, the light source device 1 has a plurality of elements (transfer thyristors T1 to T6, setting thyristors S1 to S6, VCSEL1 to VCSEL6, etc.), and among the plurality of elements, the elements that are turned on are switched on one after another. As a result, in the light source device 1, the plurality of setting thyristors S are individually turned on by lighting control by the control unit 110. Then, when each setting thyristor S is turned on, the VCSEL corresponding to that setting thyristor S individually emits light. Furthermore, in the measuring device 100, the system control unit 30 controls the output of signals in the control unit 110, thereby emitting light for measurement.

[0085] As described above, in the light-emitting chip 10 of this embodiment, when the setting thyristor S is turned on, a current can be supplied to the corresponding VCSEL. Then, when a current of a magnitude necessary for the VCSEL to emit light is actually supplied to the VCSEL, the VCSEL emits light. Depending on the configuration of the light-emitting chip 10 and the control by the control unit 110, after the setting thyristor S is turned on and a current can be supplied to the corresponding VCSEL, the on signal to the setting thyristor S may be stopped before the VCSEL emits light, while maintaining the state in which the VCSEL can emit light by supplying a current. Even in such a case, the VCSEL can be made to emit light by supplying a current of a magnitude necessary for the VCSEL to emit light after the setting thyristor S is turned off. In addition, in this case, after the setting thyristor S is turned on to make the VCSEL emit light, the setting thyristor S is in the off state when the VCSEL actually emits light. In this embodiment, "a thyristor (setting thyristor S) turning on causes a light-emitting element (VCSEL) to emit light" means that turning on the setting thyristor S causes the corresponding VCSEL to be in a state in which it can emit light when a current is supplied to it. In addition, after turning on the VCSEL so that it can emit light when a current is supplied to it, the setting thyristor S may maintain the on state or may be in an off state when a current is supplied to the VCSEL and the VCSEL actually emits light.

[0086] (Regarding the light emitted from the setting thyristor S) Incidentally, since the setting thyristor S is made of a compound semiconductor as described above, when it is turned on, it may emit light from between the p-gate layer 86 and the n-gate layer 87. In addition, when the value of the current flowing between the n-cathode layer 85 and the p-anode layer 88 becomes large, the setting thyristor S may emit light from between the p-gate layer 86 and the n-gate layer 87.

[0087] Consider a case where, in a light source device 1 (light-emitting chip 10) in which a plurality of VCSELs and setting thyristors S are formed on the same substrate 80, lighting control of the VCSELs is performed so that one VCSEL (e.g., VCSEL1) selected from the plurality of VCSELs is turned on and the other VCSELs (e.g., VCSEL2 to VCSEL6) are turned off. In this case, the control unit 110 turns on the setting thyristor S1 connected to the VCSEL1 to be turned on, and the VCSEL1 is turned on accordingly. Meanwhile, when the setting thyristor S1 turns on, the other setting thyristors S2 to S6 connected to the other VCSELs 2 to VCSEL6 that are not to be turned on remain in the off state.

[0088] When the setting thyristor S1 is turned on, the current supplied to the setting thyristor S1 may cause light to be emitted from the setting thyristor S1. In the light-emitting chip 10 that does not include the absorption layer 93, the light emitted from the setting thyristor S1 may exit the setting thyristor S1 from the upper surface of the setting thyristor S1. In this case, the light emitted from the setting thyristor S1 may reach another setting thyristor (for example, the setting thyristor S2) located around the setting thyristor S1.

[0089] In the above example, the setting thyristor S2 is in the OFF state to turn off the VCSEL corresponding to the setting thyristor S2. However, when light emitted from the setting thyristor S1 reaches the setting thyristor S2 and is absorbed by the p-gate layer 86 and n-gate layer 87, which are the gate layers of the setting thyristor S2, generating an electromotive force, the setting thyristor S2 turns on. Then, as the setting thyristor S2 turns on, there is a possibility that the light-emitting layer 82 of the VCSEL2, which should not be turned on, will emit light, causing erroneous lighting.

[0090] Furthermore, in a light-emitting chip 10 that does not include an absorption layer 93, even when no light is emitted from the setting thyristor S, external light may be irradiated onto the setting thyristor S from the periphery of the light-emitting chip 10. Depending on the wavelength of this external light, the external light may be absorbed by the gate layer of the setting thyristor S, causing the setting thyristor S to turn on. In this case, as in the above example, the light-emitting layer 82 of the VCSEL, which is normally not lit, may emit light, resulting in erroneous lighting.

[0091] In contrast, the light-emitting chip 10 of this embodiment includes an absorption layer 93 on the p anode layer 88 of the setting thyristor S, which transmits light emitted from the light-emitting layer 82 and absorbs light emitted from the setting thyristor S. This makes it possible to suppress erroneous lighting of the light-emitting layer 82 compared to when the light-emitting chip 10 does not include the absorption layer 93.

[0092] (Layer configuration of setting thyristor S) As described above, the setting thyristor S is composed of an n-cathode layer 85, a p-gate layer 86, an n-gate layer 87, and a p-anode layer 88, which are stacked on the tunnel junction layer 84. As described above, the n-cathode layer 85, the p-gate layer 86, the n-gate layer 87, and the p-anode layer 88 are composed of III-V compound semiconductors. In this embodiment, the n cathode layer 85, the p gate layer 86, the n gate layer 87, and the p anode layer 88 are preferably made of, for example, an Al-containing III-V compound semiconductor. Examples of the Al-containing III-V compound semiconductor that makes up the n cathode layer 85, the p gate layer 86, the n gate layer 87, and the p anode layer 88 include AlGaAs, AlGaN, and AlAs, and it is preferable to use AlGaAs.

[0093] The n-cathode layer 85 of the setting thyristor S is, for example, a 1×10 18 / cm 3 The Al content in the n-cathode layer 85 may be changed between 0% and 100%. The p-gate layer 86 has an impurity concentration of, for example, 1×10 17 / cm 3 For example, p-type AlGaAs can be used. The n-gate layer 87 has an impurity concentration of, for example, 1×10 17 / cm 3 n-type AlGaAs can be used. The p-anode layer 88 has an impurity concentration of, for example, 1×10 18 / cm 3 The p-type AlGaAs can be used. The Al content in the p-anode layer 88 may be changed between 0% and 100%. In the setting thyristor S of this embodiment, when the p-gate layer 86 and the n-gate layer 87 are made of AlGaAs, the Al content in the p-gate layer 86 and the n-gate layer 87 is determined between 0% and 100% in accordance with the relationship with the absorption layer 93. In addition, in the setting thyristor S, the Al content in the p-gate layer 86 and the n-gate layer 87 is determined so that the band gap energy corresponding to the light emitted from the setting thyristor S is larger than the band gap energy of the absorption layer 93.

[0094] (VCSEL layer structure) As described above, a VCSEL is composed of an n-cathode (DBR) layer 81, a light-emitting layer 82, and a p-anode (DBR) layer 83 stacked on a substrate 80. The VCSEL oscillates as laser light by resonating light in the light-emitting layer 82 sandwiched between the n-cathode (DBR) 81 and the p-anode (DBR) layer 83. The VCSEL oscillates as laser light when the reflectance of the light from the n-cathode (DBR) layer 81 and the p-anode (DBR) layer 83 reaches, for example, 99% or higher.

[0095] As described above, the n-cathode (DBR) layer 81 and the p-anode (DBR) layer 83 are DBR layers in which a plurality of semiconductor layers having refractive index differences are stacked. Additionally, the n-cathode (DBR) layer 81 has a configuration in which high-refractive-index layers with a relatively high refractive index and low-refractive-index layers with a relatively low refractive index are alternately stacked. Note that the "relatively high refractive index" of the high-refractive-index layer means that it has a higher refractive index than the low-refractive-index layer. Similarly, the "relatively low refractive index" of the low-refractive-index layer means that it has a lower refractive index than the high-refractive-index layer. Similarly to the n-cathode (DBR) layer 81, the p-anode (DBR) layer 83 has a configuration in which high-refractive-index layers with a relatively high refractive index and low-refractive-index layers with a relatively low refractive index are alternately stacked.

[0096] The high refractive index layer of the n cathode (DBR) layer 81 is preferably made of an Al-containing III-V compound semiconductor doped with n-type impurities. Similarly, the high refractive index layer of the p anode (DBR) layer 83 is preferably made of an Al-containing III-V compound semiconductor doped with p-type impurities. The III-V compound semiconductors constituting the high refractive index layer of the n cathode (DBR) layer 81 and the high refractive index layer of the p anode (DBR) layer 83 include, for example, AlGaAs, AlGaN, AlAs, etc., as with the p gate layer 86 and n gate layer 87 of the setting thyristor S, and it is preferable to use AlGaAs.

[0097] The low refractive index layer of n cathode (DBR) layer 81 is not particularly limited as long as it has a lower refractive index than the high refractive index layer and is a compound semiconductor that can be stacked on the high refractive index layer, but is preferably made of a III-V compound semiconductor doped with n-type impurities and containing Al. Similarly, the high refractive index layer of p anode (DBR) layer 83 is not particularly limited as long as it has a lower refractive index than the high refractive index layer and is a compound semiconductor that can be stacked on the high refractive index layer, but is preferably made of a III-V compound semiconductor doped with p-type impurities and containing Al.

[0098] The n-cathode (DBR) layer 81 of the above-described VCSEL can be a semiconductor layer in which, for example, low-refractive index layers made of AlGaAs doped with n-type impurities and high-refractive index layers made of AlGaAs doped with n-type impurities and having a lower Al content than the low-refractive index layers are alternately stacked for 40 periods. The p anode (DBR) layer 83 can be a semiconductor layer in which, for example, low refractive index layers made of AlGaAs doped with p-type impurities and high refractive index layers made of AlGaAs doped with p-type impurities and having a lower Al content than the low refractive index layers are alternately stacked in 19 periods.

[0099] Furthermore, the light emitting layer 82 may be a semiconductor layer in which well layers made of, for example, GaN, InGaN, AlGaN, or the like and barrier layers made of, for example, AlGaN, GaN, or the like are alternately stacked.

[0100] (Configuration of absorption layer 93) The light emitting chip 10 includes an absorption layer 93 capable of absorbing the light emitted from the setting thyristor S. More specifically, the absorption layer 93 absorbs the light emitted from the setting thyristor S and light with a shorter wavelength than the light emitted from the setting thyristor S. The absorption layer 93 also transmits the light emitted from the light emitting layer 82.

[0101] Generally, a compound semiconductor absorbs light with a wavelength shorter than the wavelength corresponding to its own bandgap energy. In other words, a compound semiconductor absorbs light with a bandgap energy larger than its own bandgap energy. When a compound semiconductor absorbs light, it emits light with a bandgap energy corresponding to its own bandgap energy. Therefore, the light emitted from the setting thyristor S can be absorbed by a semiconductor with a bandgap energy smaller than the bandgap energy corresponding to the light emitted from the setting thyristor S. The absorption layer 93 of this embodiment is made of a semiconductor whose bandgap energy is larger than the bandgap energy corresponding to the light emitted from the VCSEL and smaller than the bandgap energy corresponding to the light emitted from the setting thyristor S.

[0102] More specifically, the absorption layer 93 of this embodiment is made of a III-V compound semiconductor having a bandgap energy larger than the bandgap energy corresponding to the light emitted from the VCSEL and smaller than the bandgap energy corresponding to the light emitted from the setting thyristor S. Of these III-V compounds, the absorption layer 93 is preferably made of a III-V compound semiconductor containing Al.

[0103] Here, in III-V compound semiconductors containing Al, the higher the Al content ratio, the larger the band gap energy tends to be, and the lower the Al content ratio, the smaller the band gap energy tends to be. When the p-gate layer 86 and n-gate layer 87 of the setting thyristor S are made of AlGaAs, the absorption layer 93 is preferably made of GaAs or AlGaAs having a lower Al content than the p-gate layer 86 and n-gate layer 87. In the description of this embodiment, the Al content in an Al-containing III-V compound semiconductor refers to the ratio of the number of Al atoms to the sum of the numbers of Group III atoms contained in the III-V compound semiconductor. For example, the Al content in AlGaAs refers to the ratio of the number of Al atoms to the sum of the numbers of Al and Ga atoms contained in AlGaAs.

[0104] (Shape of the absorption layer 93) Next, the shape of the absorbing layer 93 will be described. As shown in Figures 3 and 5, in the light-emitting chip 10 of this embodiment, the absorption layer 93 is provided in an area that covers the light-emitting point 50 of the VCSEL when viewed in the z direction, which is an example of the stacking direction of the setting thyristor S relative to the light-emitting layer 82. More specifically, as described above, the light-emitting point 50 of the VCSEL has a circular shape when viewed in the z direction. In contrast, the absorption layer 93 of this embodiment has a circular shape with a larger diameter than the light-emitting point 50 when viewed in the z direction. In addition, the absorption layer 93 has a cylindrical shape overall, including a circular top surface 931 and a side surface 932 extending in the z direction from the periphery of the top surface 931 toward the setting thyristor S. The absorption layer 93 is provided so as to overlap the entire area of the light-emitting point 50 when viewed in the z direction. Furthermore, the absorption layer 93 is provided in a range that covers the current passage portion α of the n-cathode layer 81 when viewed in the z direction.

[0105] As will be described later, the light emitting chip 10 is provided with a p-ohmic electrode 321 around the absorption layer 93. The p-ohmic electrode 321 is made of Au or the like, and almost no light from the light emitting point 50 passes through the p-ohmic electrode 321. In the light-emitting chip 10 of this embodiment, the absorption layer 93 is provided in an area that covers the light-emitting point 50 of the VCSEL, and therefore, light from the light-emitting point 50 is more likely to pass through the absorption layer 93 and be emitted to the outside of the light-emitting chip 10 than when the absorption layer 93 is provided in an area narrower than the light-emitting point 50. This prevents the light intensity of the light-emitting chip 10 from decreasing.

[0106] In the light-emitting chip 10 of this embodiment, when viewed in the z direction, a p-ohmic electrode 321, which is the anode terminal of the setting thyristor S, is provided around the absorption layer 93. In addition, in the light-emitting chip 10, when viewed in the z direction, the p-ohmic electrode 321 is provided around the current passing portion α. In this example, the p-ohmic electrode 321 is an example of an electrode that supplies power to the setting thyristor S. In this embodiment, the p ohmic electrode 321 is provided around the absorption layer 93, and therefore the distance from the p ohmic electrode 321 to the current passing portion α is shorter than when the p ohmic electrode 321 is provided at a position away from the absorption layer 93. This makes it easier for current to be supplied to the current passing portion α, thereby improving the light extraction efficiency.

[0107] 5 , in the light-emitting chip 10, the p ohmic electrode 321 is preferably provided across from the upper surface of the p anode layer 88 located around the absorption layer 93 to the side surface 932 of the absorption layer 93. In addition, in the light-emitting chip 10, the p ohmic electrode 321 is preferably provided not only on the upper surface of the p anode layer 88 but also on the side surface 932 of the absorption layer 93. As described above, from the viewpoint of facilitating the supply of current to the current passing portion α of the VCSEL and improving the light extraction efficiency, it is preferable to reduce the distance between the p ohmic electrode and the absorption layer 93. In this embodiment, the p ohmic electrode 321 is provided across from the upper surface of the p anode layer 88 located around the absorption layer 93 to the side surface 932 of the absorption layer 93, thereby reducing the distance between the p ohmic electrode 321 and the absorption layer 93, and thereby further improving the light extraction efficiency. Furthermore, as will be described in more detail later, by spanning from the upper surface of the p anode layer 88 located around the absorption layer 93 to the side surface 932 of the absorption layer 93, the distance between the p ohmic electrode 321 and the absorption layer 93 can be made closer in the manufacture of the light-emitting chip 10 in a simpler manner than, for example, when the p ohmic electrode 321 is not provided on the side surface 932 of the absorption layer 93.

[0108] (Action by the absorption layer 93) Next, a description will be given of the action of the absorption layer 93 in the light-emitting chip 10. Here, a case where the setting thyristor S1 provided on the VCSEL 1 is turned on will be described as an example. As described above, when the setting thyristor S1 is turned on, the current supplied to the setting thyristor S1 may cause light to be emitted from the setting thyristor S1. In the light-emitting chip 10 of this embodiment, the light emitted from the setting thyristor S1 is absorbed by the absorption layer 93 provided on the setting thyristor S1. This prevents the light from the setting thyristor S1 from escaping outside the light-emitting chip 10, even when light is emitted from the setting thyristor S1. This also prevents the light emitted from the setting thyristor S1 from reaching the setting thyristor S2 provided on another VCSEL (e.g., VCSEL2) different from the VCSEL1. As a result, in the light-emitting chip 10 of this embodiment, the setting thyristor S2 on the VCSEL2, which should not be illuminated, is prevented from being turned on by the light emitted from the setting thyristor S1, thereby preventing erroneous illumination of the VCSEL2.

[0109] Furthermore, in the light emitting chip 10 of this embodiment, the absorption layer 93 absorbs external light irradiated from the periphery of the light emitting chip 10, the external light having a wavelength equal to or shorter than the wavelength of the light emitted from the setting thyristor S. As a result, in the light-emitting chip 10 of this embodiment, the setting thyristor S is prevented from being turned on by external light from outside the light-emitting chip 10, and erroneous lighting of the VCSEL that is originally not lit is prevented. In the light-emitting chip 10, among external light irradiated from the periphery of the light-emitting chip 10, external light having a longer wavelength than the light emitted from the setting thyristor S may reach the setting thyristor S without being absorbed by the absorption layer 93. However, external light having a wavelength exceeding that of the light emitted from the setting thyristor S does not turn on the setting thyristor S, and therefore, erroneous lighting of the VCSEL is unlikely to occur.

[0110] As described above, the absorption layer 93 transmits light emitted from the light-emitting layer 82 of the VCSEL. Therefore, when the VCSEL is turned on, the light emitted from the light-emitting layer 82 passes through the absorption layer 93 and is emitted to the outside of the light-emitting chip 10. In addition, the absorption layer 93 does not block the light emitted by the light-emitting chip 10.

[0111] Incidentally, in the light-emitting chip 10, another method for suppressing the erroneous lighting of the VCSEL by suppressing the setting thyristor S from turning on can be, for example, by removing the setting thyristor S above the light-emitting point 50 of the VCSEL to form an opening, and covering the inner surface of the opening with a protective film that suppresses light transmission. When this method is adopted, false lighting of the VCSEL can be suppressed, but the resistance between the setting thyristor S and the VCSEL increases, and the rise time when lighting the VCSEL tends to be long. Furthermore, if the light-emitting chip 10 is small and the distance between the light-emitting points 50 is short, the process of removing the setting thyristor S to form an opening tends to be difficult in the manufacture of the light-emitting chip 10, which will be described later.

[0112] (Method of manufacturing the light emitting chip 10) Next, an example of a method for manufacturing the light emitting chip 10 to which this embodiment is applied will be described. The light emitting chip 10 is formed by a semiconductor layer stacking step, an absorption layer forming step, a p-ohmic electrode forming step, a semiconductor layer separation step, a current element forming step, an etching step, an n-ohmic electrode forming step, a protective layer forming step, and a wiring forming step.

[0113] In the semiconductor layer stacking step, semiconductor layers constituting an n-cathode (DBR) layer 81, a light-emitting layer 82, a p-anode (DBR) layer 83, a tunnel junction layer 84, an n-cathode layer 85, a p-gate layer 86, an n-gate layer 87, a p-anode layer 88, and an absorption layer 93 are epitaxially grown in this order on a substrate 80 to form a semiconductor stack. Each semiconductor layer is stacked by, for example, metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or the like.

[0114] Subsequently, in the absorption layer formation step, the semiconductor layer constituting the absorption layer 93 is etched to separate it into individual absorption layers 93 provided for each light-emitting point 50. This etching may be performed by wet etching using a sulfuric acid-based etching solution (sulfuric acid:hydrogen peroxide:water=1:10:300 in weight ratio) or the like, or may be performed by anisotropic dry etching (RIE) using, for example, boron chloride or the like.

[0115] Subsequently, in the p-ohmic electrode formation step, first, p-ohmic electrodes 321, 323, 324, etc. are formed on p-anode layer 88. The p ohmic electrodes 321, 323, and 324 are made of, for example, Au or AuZn, and are formed by, for example, a lift-off method.

[0116] In this embodiment, as described above, the p ohmic electrodes 321 are formed around each absorption layer 93 so as to extend from the upper surface of the p anode layer 88 to the side surface 932 of the absorption layer 93 . As described above, from the viewpoint of improving the light extraction efficiency of the light-emitting chip 10, it is preferable to form the p ohmic electrode 321 and the absorption layer 93 close to each other. Here, if the p ohmic electrode 321 is not formed on the side surface 932 of the absorption layer 93 in the p ohmic electrode formation step, in order to form the p ohmic electrode 321 and the absorption layer 93 close to each other, it is necessary to accurately align the position where the resist is formed with respect to the absorption layer 93 in the lift-off method, which tends to complicate the process. In contrast, in the p-ohmic electrode formation process of this embodiment, the p-ohmic electrode 321 is also formed on the side surface 932 of the absorption layer 93, which makes it possible to shorten the distance between the p-ohmic electrode 321 and the absorption layer 93 in a simpler manner.

[0117] Next, in a semiconductor layer separation step, p anode layer 88, n gate layer 87, p gate layer 86, n cathode layer 85, tunnel junction layer 84, p anode (DBR) layer 83, light emitting layer 82, and n cathode (DBR) layer 81 are etched in this order to separate them into islands such as islands 301 and 302. This etching may be performed by wet etching using a sulfuric acid-based etching solution (sulfuric acid:hydrogen peroxide:water=1:10:300 by weight), or may be performed by anisotropic dry etching (RIE) using, for example, boron chloride. The etching in this semiconductor layer separation step is sometimes called mesa etching or post-etching.

[0118] Next, in the current blocking portion forming step, the p anode (DBR) layer 83 whose side surfaces are exposed in the semiconductor layer separation step is oxidized from the side surfaces to form current blocking portions β that block current. The portion that remains unoxidized becomes the current passing portion α. The oxidation of the p anode (DBR) layer 83 is carried out by oxidizing Al in the p anode (DBR) layer 83, which is made of AlGaAs or the like, by steam oxidation at 300°C to 400°C. At this time, oxidation progresses from the exposed side surfaces, and current blocking portions β made of Al2O3, an oxide of Al, are formed around islands 301, 302, etc. The unoxidized portions of the current confinement layer 83a become current passing portions α.

[0119] Subsequently, in an etching step, the p-anode layer 88 is etched to expose the n-gate layer 87 . This etching may be performed by wet etching using a sulfuric acid-based etching solution (sulfuric acid:hydrogen peroxide:water=1:10:300 in weight ratio), or by anisotropic dry etching using, for example, boron chloride.

[0120] In the n-ohmic electrode formation step, n-ohmic electrodes 331, 332, etc. are formed on the n-gate layer 87. The n-ohmic electrodes 331 and 332 are made of, for example, Au or AuGe, etc. The n-ohmic electrodes 331 and 332 are formed by, for example, a lift-off method.

[0121] In the protective layer forming step, the protective layer 90 is formed from an insulating material such as SiO 2 , SiON, or SiN so as to cover the surfaces of the islands 301, 302, etc. Furthermore, in the protective layer forming step, through holes are provided in the protective layer 90 on the p ohmic electrodes 321, 323, 324, etc. and the n ohmic electrodes 331, 332, etc.

[0122] In the wiring formation process, the power supply line 71, the first transfer signal line 72, the second transfer signal line 73, the light-on signal line 75, the back electrode 91, and the light-shielding layer 95 are formed as wiring connecting the p ohmic electrodes 321, 323, 324, etc. and the n ohmic electrodes 331, 332, etc. through through holes provided on the protective layer 90. The wiring, the back electrode 91, and the light-shielding layer 95 are made of, for example, Au, Al, or the like.

[0123] Through the above steps, the light-emitting chip 10 of this embodiment is obtained. The light-emitting chip 10 of this embodiment has a stack of VCSELs and setting thyristors S. This makes the light-emitting chip 10 a self-scanning type in which the VCSELs are individually turned on by the transfer thyristors T and setting thyristors S. This reduces the number of terminals provided on the light-emitting chip 10, making the light-emitting chip 10 and the light source device 1 smaller in size.

[0124] [Embodiment 2] FIG. 7 is a diagram illustrating an example of the configuration of the light-emitting chip 10 of the second embodiment, and is an example of an enlarged cross-sectional view of an island 301 in which the setting thyristor S and the VCSEL are stacked. The light emitting chip 10 of embodiment 2 differs from the light emitting chip 10 of embodiment 1 in that it has an absorption layer 94 made of a dielectric capable of absorbing light emitted from the setting thyristor S, instead of the absorption layer 93 of embodiment 1 made of a semiconductor layer capable of absorbing light emitted from the setting thyristor S. In FIG. 7, the same components as those in the light-emitting chip 10 of the first embodiment are designated by the same reference numerals, and detailed description thereof will be omitted here.

[0125] 7, in the light-emitting chip 10 of the second embodiment, the absorption layer 94 is provided on the entire upper surface of the island 301. More specifically, in the island 301, the absorption layer 94 is provided across the p ohmic electrode 321 provided on the p anode layer 88 of the setting thyristor S and across the p anode layer 88 of the setting thyristor S exposed from the p ohmic electrode 321. Although not shown, the absorption layer 94 may be provided on the islands 302 to 306 and between the islands 301 to 306 in addition to the island 301 in the light-emitting chip 10.

[0126] The absorption layer 94 is made of a dielectric that transmits the light emitted from the light emitting layer 82 and absorbs the light emitted from the setting thyristor S. There are no particular limitations on such a dielectric, and any known material can be used. The absorption layer 94 may also have a DBR structure in which multiple high-refractive-index dielectric layers made of a dielectric with a relatively high refractive index and multiple low-refractive-index dielectric layers made of a dielectric with a relatively low refractive index are alternately stacked.

[0127] The light-emitting chip 10 of this embodiment is formed by performing the semiconductor layer stacking process, p-ohmic electrode formation process, semiconductor layer separation process, current element portion formation process, etching process, n-ohmic electrode formation process, protective layer formation process, wiring etc. formation process in the manufacturing method of the light-emitting chip 10 of the above-mentioned embodiment 1, followed by an absorption layer formation process of forming an absorption layer 94. In the absorption layer forming step, the absorption layer 94 is formed by applying a dielectric material that will be the basis of the absorption layer 94 onto the p anode layer 88 of the setting thyristor S and the p ohmic electrode 321 .

[0128] As described above, the absorption layer 93 in the first embodiment is formed by epitaxially growing a semiconductor layer constituting the absorption layer 93 on the p anode layer 88 of the setting thyristor S, and then etching the semiconductor layer to separate it into individual absorption layers 93 for each light-emitting point 50. In contrast, the absorption layer 94 of this embodiment can be formed by a process of applying a dielectric material without performing a process such as etching, and therefore the manufacturing method of the light emitting chip 10 can be simplified.

[0129] Although the embodiments of the present invention have been described above, the technical scope of the present invention is not limited to the above-described embodiments. Various modifications and alternative arrangements that do not depart from the scope of the technical concept of the present invention are encompassed by the present invention.

[0130] (Addendum) (((1))) a light-emitting element having a light-emitting layer that emits light; a thyristor provided on the light-emitting element, which, when turned on, causes light to be emitted from the light-emitting layer of the light-emitting element or increases the amount of light emitted from the light-emitting layer; an absorption layer provided on the thyristor, the absorption layer transmitting light emitted from the light emitting layer and absorbing light emitted from the thyristor; A light-emitting component comprising: (((2))) the light-emitting layer emits light from a light-emitting region that is a portion of the light-emitting layer; The absorption layer is provided in a range that covers at least the light-emitting region when viewed in the stacking direction of the thyristor with respect to the light-emitting layer. The light-emitting component according to (((1))). (((3))) an electrode provided on the thyristor for supplying power to the thyristor; The electrodes are provided around the absorption layer when viewed from the stacking direction. The light-emitting component according to (((2))). (((4))) The light emitting component according to (((3))), wherein the electrode is provided around the absorption layer, straddling from the top surface of the thyristor to the side surface of the absorption layer. (((5))) an electrode provided on the thyristor for supplying power to the thyristor; the electrode is provided around the light-emitting region when viewed from the stacking direction, The absorption layer is provided across the electrode and the thyristor exposed from the electrode. The light-emitting component according to (((2))). (((6))) The light emitting component according to any one of ((1))) to ((5))), wherein the absorption layer absorbs light emitted from the thyristor and light having a shorter wavelength than the light emitted from the thyristor. (((7))) The light-emitting component according to (((6))), wherein the absorption layer includes a semiconductor layer having a bandgap energy smaller than the bandgap energy corresponding to the light emitted from the thyristor and larger than the bandgap energy corresponding to the light emitted from the light-emitting layer. (((8))) Further comprising a substrate on which a plurality of the light emitting elements are provided, The thyristor is provided on each of the light-emitting elements, The absorption layer is provided on each of the thyristors. A light emitting component according to any one of (((1))) to (((7))). (((9))) A substrate; a plurality of light-emitting elements provided on the substrate, each having a light-emitting layer; a plurality of thyristors provided on the respective light emitting elements, the thyristors turning on to cause the light emitting layer of the light emitting element to emit light or increase the amount of light emitted from the light emitting layer; an absorption layer provided on each of the thyristors, the absorption layer transmitting the light emitted from the light emitting layer and absorbing the light emitted from the thyristor; a driving unit that drives the plurality of thyristors individually to transition them to an ON state; A light emitting device comprising: (((10))) The light-emitting device according to (((9))), an acquisition unit that receives reflected light from an object to be measured that is irradiated with light emitted from the light emitting device and acquires information about the object to be measured; A measuring device comprising:

[0131] According to the light emitting component of (((1))), the light emitting element can be made less likely to light up erroneously than when an absorption layer that absorbs light emitted from a thyristor is not provided. According to the light emitting component of (((2))), it is easier for light from the light emitting region to pass through the absorption layer and be emitted to the outside, compared to when the absorption layer is provided in an area narrower than the light emitting region. According to the light emitting component of (((3))), current is more easily supplied to the light emitting region than when the electrodes are not provided around the absorption layer. According to the light emitting component of (((4))), the electrode and the absorption layer can be formed close to each other in a simple manner compared to when the electrode is not formed on the side surface of the absorption layer. According to the light emitting component of (((5))), the absorption layer can be formed by a simpler method than when the absorption layer is not provided across the electrode and the thyristor. According to the light-emitting component of (((6))), the thyristor is prevented from being turned on by external light irradiated from outside the light-emitting element, compared to a case in which the absorption layer does not absorb light with a shorter wavelength than the light emitted from the thyristor. According to the light emitting component of (((7))), the absorption layer is more likely to absorb light from the thyristor than when the band gap energy of the absorption layer is equal to or greater than the band gap energy corresponding to the light from the thyristor. According to the light emitting component of (((8))), it is possible to make it less likely that the light emitting element will be erroneously turned on by light emitted from other thyristors, compared to when no absorption layer is provided on each thyristor. According to the light emitting device of (((9))), it is possible to make the light emitting element less likely to light up erroneously, compared to a case where no absorption layer for absorbing light emitted from the thyristor is provided. According to the measuring device of (((10))), it is possible to make the light emitting element less likely to light up erroneously, compared to a case where no absorption layer that absorbs light emitted from a thyristor is provided. [Explanation of symbols]

[0132] 1...light source device, 5...3D sensor, 10...light-emitting chip, 11...light-emitting section, 12...transfer section, 110...control section, 81...n-cathode (DBR) layer, 82...light-emitting layer, 83...p-anode (DBR) layer, 84...tunnel junction layer, 85...n-cathode layer, 86...p-gate layer, 87...n-gate layer, 88...p-anode layer, 90...protective layer, 93, 94...absorption layer, 100...measuring device, S...setting thyristor, T...transfer thyristor, VCSEL...vertical-cavity surface-emitting laser

Claims

1. a light-emitting element having a light-emitting layer that emits light; a thyristor provided on the light-emitting element, which, when turned on, causes light to be emitted from the light-emitting layer of the light-emitting element or increases the amount of light emitted from the light-emitting layer; an absorption layer provided on the thyristor, the absorption layer transmitting light emitted from the light emitting layer and absorbing light emitted from the thyristor; A light-emitting component comprising:

2. the light-emitting layer emits light from a light-emitting region that is a portion of the light-emitting layer; The absorption layer is provided in a range that covers at least the light-emitting region when viewed in the stacking direction of the thyristor with respect to the light-emitting layer. The light emitting component according to claim 1 .

3. an electrode provided on the thyristor for supplying power to the thyristor; The electrode is provided around the absorption layer when viewed from the stacking direction. The light emitting component according to claim 2 .

4. 4. The light emitting component according to claim 3, wherein the electrode is provided around the absorbing layer, straddling from the upper surface of the thyristor to a side surface of the absorbing layer.

5. an electrode provided on the thyristor for supplying power to the thyristor; the electrode is provided around the light-emitting region when viewed from the stacking direction, The absorption layer is provided across the electrode and the thyristor exposed from the electrode. The light emitting component according to claim 2 .

6. 2. The light emitting component according to claim 1, wherein the absorption layer absorbs light emitted from the thyristor and light having a shorter wavelength than the light emitted from the thyristor.

7. 7. The light-emitting component of claim 6, wherein the absorption layer includes a semiconductor layer having a bandgap energy smaller than the bandgap energy corresponding to the light emitted from the thyristor and larger than the bandgap energy corresponding to the light emitted from the light-emitting layer.

8. Further comprising a substrate on which a plurality of the light emitting elements are provided, The thyristor is provided on each of the light-emitting elements, The absorption layer is provided on each of the thyristors. The light emitting component according to claim 1 .

9. A substrate; a plurality of light-emitting elements provided on the substrate, each having a light-emitting layer; a plurality of thyristors provided on the respective light emitting elements, the thyristors turning on to cause the light emitting layer of the light emitting element to emit light or increase the amount of light emitted from the light emitting layer; an absorption layer provided on each of the thyristors, the absorption layer transmitting the light emitted from the light emitting layer and absorbing the light emitted from the thyristor; a driving unit that drives the plurality of thyristors individually to transition them to an ON state; A light emitting device comprising:

10. The light emitting device according to claim 9 ; an acquisition unit that receives reflected light from an object to be measured that is irradiated with light emitted from the light emitting device and acquires information about the object to be measured; A measuring device comprising:

Images