Method for processing substrate and substrate processor

Abstract

To provide a method for processing a substrate and a substrate processor for properly processing a substrate.SOLUTION: The present invention relates to a method for processing a substrate and a substrate processor. The method for processing a substrate is to process a substrate W. The substrate W includes a first layer 31. The first layer 31 is formed of oxide silicon, and the method for processing a substrate includes an etching step. The etching step supplies an etchant J to the substrate W and etches the first layer 31. The etchant Jn contains hydrofluoric acid and heavy water.SELECTED DRAWING: Figure 10

Description

[Technical Field]

[0001] The present invention relates to a substrate processing method and a substrate processing apparatus, for example, a semiconductor wafer, a liquid crystal display substrate, an organic electroluminescence (EL) substrate, an FPD (Flat Panel Display) substrate, an optical display substrate, a magnetic disk substrate, an optical disk substrate, a magneto-optical disk substrate, a photomask substrate, or a solar cell substrate. [Background technology]

[0002] Patent Document 1 discloses a substrate processing method. The substrate processing method includes a step of removing a part of an insulating film by etching. The insulating film is silicon oxide. The etching solution contains hydrofluoric acid. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 5-121317 Summary of the Invention [Problem to be solved by the invention]

[0004] Even with conventional substrate processing methods, it can be difficult to adequately process a substrate, for example, it can be difficult to adequately etch silicon oxide, for example, it can be difficult to efficiently etch silicon oxide.

[0005] The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a substrate processing method and a substrate processing apparatus that appropriately processes a substrate. [Means for solving the problem]

[0006] The present inventors have conducted extensive research to solve the above problems, and as a result have discovered the first point.

[0007] First, the etching rate of silicon oxide by an etching solution containing hydrofluoric acid and deionized water is higher than that of silicon oxide by an etching solution containing hydrofluoric acid and heavy water.

[0008] According to the first point, an etching solution containing hydrofluoric acid and deionized water is more useful for properly processing a substrate than an etching solution containing hydrofluoric acid and deuterium oxide. For example, an etching solution containing hydrofluoric acid and deuterium oxide is more useful for improving the etching rate of silicon oxide than an etching solution containing hydrofluoric acid and deuterium oxide.

[0009] The present inventors continued their intensive research to solve the above-mentioned problems. As a result, they discovered a new etching solution. The etching rate of silicon oxide using the new etching solution is higher than the etching rate of silicon oxide using an etching solution containing hydrofluoric acid and deionized water. Therefore, the new etching solution is more useful for properly processing substrates than an etching solution containing hydrofluoric acid and deionized water. The present inventors then created the present invention using the new etching solution.

[0010] The present invention is a substrate processing method for processing a substrate, the substrate including a first layer made of silicon oxide, the substrate processing method including an etching step of supplying an etching solution containing hydrofluoric acid, heavy water, and a base to the substrate to etch the first layer.

[0011] The substrate processing method is for processing a substrate. The substrate includes a first layer. The first layer is made of silicon oxide.

[0012] The substrate processing method includes an etching step in which an etching solution is supplied to the substrate, and the first layer is etched in the etching step.

[0013] The etching solution contains hydrofluoric acid, heavy water, and a base. Therefore, it is easy to efficiently etch the first layer with the etching solution. Therefore, it is easy to properly etch the first layer. Therefore, it is easy to properly process the substrate.

[0014] In summary, the substrate processing method allows the substrate to be properly processed.

[0015] In the substrate processing method, the base is preferably a weak base, which makes it easier to efficiently etch the first layer with the etching solution.

[0016] In the substrate processing method, the base preferably includes at least one of ammonia water, ammonium hydroxide, tetramethylammonium hydroxide, potassium hydroxide, and sodium hydroxide, which makes it easier to efficiently etch the first layer with the etching solution.

[0017] The substrate processing method preferably includes an adding step of adding a base to hydrofluoric acid and heavy water to generate the etching solution. The substrate processing method includes the adding step. In the adding step, a base is added to hydrofluoric acid and heavy water. In the adding step, the etching solution is generated. Therefore, it is easy to supply the etching solution to the substrate in the etching step.

[0018] In the substrate processing method, the adding step preferably includes adding the additive containing the base to the hydrofluoric acid and the heavy water, which makes it easy to add the base to the hydrofluoric acid and the heavy water in the adding step.

[0019] In the substrate processing method, the first layer preferably has a first exposed surface that is exposed to the etching solution in the etching step, which makes it easy to etch the first layer in the etching step.

[0020] In the substrate processing method, the first exposed surface preferably has a first exposed width of less than 100 nm. As described above, the etching solution contains hydrofluoric acid, heavy water, and a base. Therefore, even if the first exposed width is less than 100 nm, it is easy to efficiently etch the first layer with the etching solution.

[0021] In the substrate processing method, the first exposed width is preferably 50 nm or less. Even if the first exposed width is 50 nm or less, it is easy to efficiently etch the first layer with an etching solution.

[0022] In the substrate processing method, the first exposed width is preferably 40 nm or less. Even if the first exposed width is 40 nm or less, it is easy to efficiently etch the first layer with an etching solution.

[0023] In the substrate processing method, the first exposed width is preferably 30 nm or less. Even if the first exposed width is 30 nm or less, it is easy to efficiently etch the first layer with an etching solution.

[0024] In the substrate processing method, the first exposed width is preferably 20 nm or less. Even if the first exposed width is 20 nm or less, it is easy to efficiently etch the first layer with an etching solution.

[0025] In the substrate processing method, the first exposed width is preferably 10 nm or less. Even if the first exposed width is 10 nm or less, it is easy to efficiently etch the first layer with an etching solution.

[0026] In the substrate processing method, the first exposed surface preferably has a first exposed width of 100 nm or more. As described above, the etching solution contains hydrofluoric acid, heavy water, and a base. Therefore, even if the first exposed width is 100 nm or more, it is easy to efficiently etch the first layer with the etching solution.

[0027] In the substrate processing method, the first exposed width is preferably 1,000 nm or more. Even if the first exposed width is 1,000 nm or more, it is easy to efficiently etch the first layer with an etching solution.

[0028] In the substrate processing method, the first exposed width is preferably 10,000 nm or more. Even if the first exposed width is 10,000 nm or more, it is easy to efficiently etch the first layer with an etching solution.

[0029] In the substrate processing method, the substrate preferably includes a second layer that is etch-resistant to the etching solution. Therefore, it is easy to properly etch the first layer. Furthermore, it is easy to protect the second layer from etching. Therefore, it is easy to increase the etch selectivity. The etch selectivity is, for example, the ratio of the etch rate of the first layer to the etch rate of the second layer. Therefore, it is easy to properly process the substrate by the substrate processing method.

[0030] In the substrate processing method, the second layer is preferably made of silicon, which makes it easy for the second layer to have etching resistance to the etching solution.

[0031] In the substrate processing method, the second layer is preferably made of at least one of single crystal silicon, polycrystalline silicon, and amorphous silicon, which makes it easy for the second layer to have etching resistance to the etching solution.

[0032] In the substrate processing method, the first layer is preferably in contact with the second layer. Even when the first layer is in contact with the second layer, it is easy to efficiently etch the first layer with an etching solution.

[0033] The present invention is a substrate processing apparatus, wherein a substrate includes a first layer made of silicon oxide, and the substrate processing apparatus includes a supply unit that supplies an etching solution containing hydrofluoric acid, heavy water, and a base to the substrate to etch the first layer.

[0034] The substrate processing apparatus processes a substrate, the substrate including a first layer, the first layer being made of silicon oxide.

[0035] The substrate processing apparatus includes a supply unit that supplies an etching liquid to the substrate to etch the first layer.

[0036] The etching solution contains hydrofluoric acid, heavy water, and a base. Therefore, it is easy to efficiently etch the first layer with the etching solution. Therefore, it is easy to properly etch the first layer. Therefore, it is easy to properly process the substrate.

[0037] In summary, the substrate processing apparatus processes the substrate appropriately.

[0038] In the substrate processing apparatus, it is preferable that the substrate processing apparatus includes an addition unit that generates the etching solution by adding a base to hydrofluoric acid and heavy water, and the addition unit supplies the etching solution to the supply unit. The substrate processing apparatus includes the addition unit. The addition unit adds a base to hydrofluoric acid and heavy water. The addition unit generates the etching solution. The addition unit supplies the etching solution to the supply unit. Therefore, it is easy for the supply unit to supply the etching solution containing hydrofluoric acid, heavy water, and a base to the substrate.

[0039] In the substrate processing apparatus, the substrate preferably includes a second layer having etching resistance to the etching solution. Therefore, it is easy to properly etch the first layer. Furthermore, it is easy to protect the second layer from etching. Therefore, it is easy to increase the etching selectivity. Therefore, it is easy for the substrate processing apparatus to properly process the substrate. [Effects of the Invention]

[0040] According to the substrate processing method and substrate processing apparatus of the present invention, the substrate is processed appropriately. [Brief explanation of the drawings]

[0041] [Figure 1] FIG. 2 is a plan view showing the inside of the substrate processing apparatus according to the embodiment. [Figure 2] FIG. 2 is a control block diagram of the substrate processing apparatus. [Figure 3] Figure 3(a) is a side view of the substrate, and Figure 3(b) is a plan view of the substrate. [Figure 4] 4(a) and 4(b) are each detailed views of a portion of the substrate. [Figure 5] 5(a) and 5(b) are detailed views of a portion of the substrate W. FIG. [Figure 6] FIG. 2 is a diagram illustrating a configuration of a processing unit according to the embodiment. [Figure 7] 3 is a flowchart showing a procedure of a substrate processing method according to an embodiment. [Figure 8] 8(a) and 8(b) are diagrams each showing a schematic diagram of a test piece. [Figure 9] 9(a) and 9(b) are schematic diagrams showing other test pieces. [Figure 10] 1 is a table showing Example 1 and Comparative Examples 1-5. [Figure 11] 1 is a table showing Example 2 and Comparative Examples 6-10. [Figure 12] 12(a) and 12(b) are schematic diagrams showing other test pieces. [Figure 13] 1 is a table showing Example 3 and Comparative Example 11. [Figure 14] FIG. 10 is a diagram illustrating a configuration of a processing unit according to a modified embodiment. [Figure 15] 10 is a flowchart showing the procedure of a substrate processing method according to a modified embodiment. [Figure 16] FIG. 10 is a diagram illustrating a configuration of a processing unit according to another modified embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0042] A substrate processing method and a substrate processing apparatus according to the present invention will be described below with reference to the drawings.

[0043] 1. Overview of substrate processing equipment FIG. 1 is a plan view showing the inside of the substrate processing apparatus 1. As shown in FIG.

[0044] The substrate processing apparatus 1 performs processing on the substrate W. The processing in the substrate processing apparatus 1 includes an etching process. The etching process in the substrate processing apparatus 1 is a process in which the substrate W is etched with an etching liquid. That is, the etching process in the substrate processing apparatus 1 is a wet etching process.

[0045] The term "etching process" in this specification includes, for example, a removal process and a dissolution process. A removal process is a process of removing an object on the substrate W. A removal process includes, for example, a lift-off process. A dissolution process is a process of dissolving an object on the substrate W. An object on the substrate W is, for example, a part of the substrate W. An object on the substrate W is, for example, a layer on the substrate W or a film on the substrate W. An object on the substrate W is, for example, a foreign object for the substrate W. An object on the substrate W is, for example, a particle attached to the substrate W or a residue attached to the substrate W.

[0046] Even if the removal process is for cleaning the substrate W, the removal process is an example of the "etching process" in this specification. Even if the dissolution process is for cleaning the substrate W, the dissolution process is an example of the "etching process" in this specification.

[0047] The substrate processing apparatus 1 includes an indexer unit 3 and a processing block 7. The processing block 7 is connected to the indexer unit 3. The indexer unit 3 supplies substrates W to the processing block 7. The processing block 7 processes the substrates W. The indexer unit 3 retrieves the substrates W from the processing block 7.

[0048] For convenience, in this specification, the direction in which the indexer unit 3 and the processing block 7 are aligned is referred to as the "front-rear direction X." The front-rear direction X is horizontal. Within the front-rear direction X, the direction from the processing block 7 toward the indexer unit 3 is referred to as the "front." The direction opposite to the front is referred to as the "rear." The direction perpendicular to the front-rear direction X is referred to as the "width direction Y." The width direction Y is horizontal. One direction in the "width direction Y" is referred to as the "right" as appropriate. The direction opposite to the right is referred to as the "left." When the front-rear direction X and the width direction Y are not distinguished, they are referred to as the "horizontal direction." The direction perpendicular to the horizontal direction is referred to as the "vertical direction Z." In each figure, for reference, front, back, right, left, top, and bottom are indicated as appropriate.

[0049] The carrier C is used to transport substrates W outside the substrate processing apparatus 1. For example, the carrier C is transported between the substrate processing apparatus 1 and an external device of the substrate processing apparatus 1. The carrier C accommodates multiple substrates W. The carrier C is, for example, a FOUP (Front Opening Unified Pod), a SMIF (Standard Mechanical Interface), or an OC (Open Cassette).

[0050] The indexer unit 3 includes a plurality of (for example, four) carrier placement units 4. The carriers C are placed on the carrier placement units 4.

[0051] The indexer unit 3 includes a transport mechanism 5. The transport mechanism 5 transports the substrate W. The transport mechanism 5 transports the substrate W between the carriers C on the carrier platform 4 and the processing block .

[0052] The transport mechanism 5 includes a hand 5a and a hand driver 5b. The hand 5a supports the substrate W. The hand driver 5b is connected to the hand 5a. The hand driver 5b moves the hand 5a. The hand driver 5b moves the hand 5a, for example, in the front-rear direction X, the width direction Y, and the vertical direction Z. The hand driver 5b rotates the hand 5a, for example, in a horizontal plane.

[0053] The processing block 7 includes a plurality of processing units 11. Each processing unit 11 performs processing on a substrate W.

[0054] Each processing unit 11 includes a substrate holder 12. The substrate holder 12 holds a substrate W.

[0055] The processing block 7 includes a transport mechanism 8. The transport mechanism 8 transports the substrate W. The transport mechanism 8 transports the substrate W between the indexer unit 3 and the processing unit 11. The transport mechanism 8 transports the substrate W between the transport mechanism 5 and the substrate holder 12.

[0056] The transport mechanism 8 includes a hand 8a and a hand driver 8b. The hand 8a supports the substrate W. The hand driver 8b is connected to the hand 8a. The hand driver 8b moves the hand 8a. The hand driver 8b moves the hand 8a, for example, in the front-rear direction X, the width direction Y, and the vertical direction Z. The hand driver 8b rotates the hand 8a, for example, in a horizontal plane.

[0057] 2 is a control block diagram of the substrate processing apparatus 1. The substrate processing apparatus 1 includes a control unit 10. The control unit 10 controls the transfer mechanisms 5 and 8 and the processing unit 11. The control unit 10 is connected to the transfer mechanisms 5 and 8 and the processing unit 11 so as to be able to communicate with each other.

[0058] The control unit 10 is realized by, for example, a central processing unit (CPU), a random access memory (RAM), and a storage medium. The central processing unit executes arithmetic processing. The random access memory functions as a work area for the arithmetic processing. The storage medium is, for example, a fixed disk. The control unit 10 has various types of information pre-stored in the storage medium. The information held by the control unit 10 includes, for example, transport information and processing information. The transport information defines the operation procedures of the transport mechanisms 5 and 8. The processing information defines the operation procedures of the processing unit 11. The processing information is also called a processing recipe.

[0059] An example of the operation of the substrate processing apparatus 1 will now be briefly described.

[0060] The transport mechanism 5 carries out the substrate W from the carrier C on the carrier platform 4. The transport mechanism 5 hands over the substrate W to the transport mechanism 8.

[0061] The transport mechanism 8 delivers the substrate W to the processing unit 11. Specifically, the transport mechanism 8 places the substrate W on the substrate holder 12. The substrate holder 12 holds the substrate W.

[0062] Each processing unit 11 processes the substrate W held by the substrate holder 12. Each processing unit 11 performs an etching process on the substrate W.

[0063] After the processing unit 11 has processed the substrate W, the transport mechanism 8 takes the substrate W from the processing unit 11. Specifically, the transport mechanism 8 takes the substrate W from the substrate holder 12. The transport mechanism 8 hands the substrate W over to the transport mechanism 5.

[0064] The transport mechanism 5 loads the substrate W into the carrier C.

[0065] 2. Substrate W 3(a) is a side view of the substrate W. FIG. 3(b) is a plan view of the substrate W.

[0066] The substrate W is, for example, any one of a semiconductor wafer, a substrate for a liquid crystal display, a substrate for an organic EL (electroluminescence), a substrate for an FPD (flat panel display), a substrate for an optical display, a substrate for a magnetic disk, a substrate for an optical disk, a substrate for a magneto-optical disk, a substrate for a photomask, and a substrate for a solar cell.

[0067] The substrate W has a thin, flat plate shape and is substantially circular in plan view.

[0068] The substrate W has a surface W1, a surface W2, and a peripheral edge W3. The surface W2 is opposite the surface W1. The surfaces W1 and W2 each have a substantially circular shape in a plan view. The surfaces W1 and W2 each are substantially planar. The surfaces W1 and W2 each are substantially flat.

[0069] The substrate W includes a first layer. For example, the first layer is located on a surface W1.

[0070] The first layer is the layer to be etched.

[0071] The shape of the first layer is not limited, and the first layer may have any shape.

[0072] Two examples of the first layer are described below.

[0073] 4(a) and 4(b) are each a detailed view of a portion of the substrate W. Each of FIGS. 4(a) and 4(b) shows an example of a first layer. The first layer 31a is a portion of the substrate W. The first layer 31a is a structure. The first layer 31a is minute.

[0074] The first layer 31a has a first exposed surface 31aS. The first exposed surface 31aS is exposed.

[0075] The first exposed surface 31aS has a first exposed width D31a. For example, the first exposed width D31a is 100 nm or more. For example, the first exposed width D31a is 1,000 nm or more. For example, the first exposed width D31a is 10,000 nm or more.

[0076] For example, the first layer 31a is flat, i.e., the first layer 31a does not have any recesses.

[0077] The first layer 31a is formed, for example, by blanket chemical vapor deposition.

[0078] The first layer 31a is also called a "blanket," a "blanket layer," or a "blanket film." The first layer 31a is also called a "solid film."

[0079] For example, the first layer 31a has a plate shape. For example, the first layer 31a has a film shape. The first exposed surface 31aS corresponds to, for example, the upper surface of the first layer 31a.

[0080] Figure 4(a) shows the substrate W before it is etched, and Figure 4(b) shows the substrate W after it has been etched.

[0081] The first layer 31a is etched. The first exposed surface 31aS is etched.

[0082] The first layer 31a is etched in a direction F31a. The direction F31a is, for example, perpendicular to the first exposed surface 31aS. As the first layer 31a is etched, the length of the first layer 31a in the direction F31a decreases.

[0083] 4(b) shows the etching amount H31a of the first layer 31a. The etching amount H31a is, for example, the amount of reduction in the length of the first layer 31a in the direction F31a.

[0084] The "etching rate of the first layer 31a" can be obtained by, for example, dividing the etching amount H31a by the etching time of the first layer 31a.

[0085] 5(a) and 5(b) are each a detailed view of a portion of the substrate W. FIG. 5(a) and 5(b) each show another example of the first layer. The first layer 31b is a portion of the substrate W. The first layer 31b is a structure. The first layer 31b is minute.

[0086] The first layer 31b has a first exposed surface 31bS. The first exposed surface 31bS is exposed.

[0087] The first exposed surface 31bS has a first exposed width D31b. For example, the first exposed width D31b is less than 100 nm. For example, the first exposed width D31b is 50 nm or less. For example, the first exposed width D31b is 40 nm or less. For example, the first exposed width D31b is 30 nm or less. For example, the first exposed width D31b is 20 nm or less. For example, the first exposed width D31b is 10 nm or less.

[0088] For example, the first layer 31b has a plate shape. For example, the first layer 31b has a film shape. The first exposed surface 31bS corresponds to, for example, a side end surface of the first layer 31b.

[0089] Figure 5(a) shows the substrate W before it is etched, and Figure 5(b) shows the substrate W after it has been etched.

[0090] The first layer 31b is etched. The first exposed surface 31bS is etched.

[0091] The first layer 31b is etched in a direction F31b. The direction F31b is, for example, perpendicular to the first exposed surface 31bS. As the first layer 31b is etched, the length of the first layer 31b in the direction F31b decreases.

[0092] 5(b) shows the etching amount H31b of the first layer 31b. The etching amount H31b is, for example, the amount of reduction in the length of the first layer 31b in the direction F31b.

[0093] The "etching rate of the first layer 31b" can be obtained by, for example, dividing the etching amount H31b by the etching time of the first layer 31b.

[0094] The substrate W includes a second layer 32. The second layer 32 is located on the surface W1. The second layer 32 is a part of the substrate W. The second layer 32 is a structure.

[0095] The second layer 32 is not substantially etched, and is not an example of an etched layer.

[0096] For example, the second layer 32 is disposed on a first side of the first layer 31b.

[0097] The substrate W includes a third layer 33. The third layer 33 is located on the surface W1. The third layer 33 is a part of the substrate W. The third layer 33 is a structure.

[0098] The third layer 33 is not substantially etched, and is not an example of a layer to be etched.

[0099] For example, the third layer 33 is disposed on the second side of the first layer 31b.

[0100] The first layer 31b is disposed between the second layer 32 and the third layer 33.

[0101] For example, the first layer 31b contacts the second layer 32. For example, the first layer 31b contacts the third layer 33.

[0102] The first exposed width D31b is equal to the separation distance between the second layer 32 and the third layer 33, for example.

[0103] 5(b), the substrate W includes a recess A. The recess A is located on the surface W1. The recess A is a space.

[0104] The recess A is an unoccupied space. The first layer 31b is not present in the recess A. The second layer 32 is not present in the recess A. The third layer 33 is not present in the recess A. The substrate W is not present in the recess A.

[0105] The recess A has a groove shape and is recessed in the direction F31b.

[0106] The recess A is formed by the first layer 31b, the second layer 32, and the third layer 33. Specifically, the recess A is formed by the first exposed surface 31bS, the second layer 32, and the third layer 33.

[0107] The first layer 31b is in contact with the recess A. The first exposed surface 31bS is in contact with the recess A.

[0108] The recess A is formed by etching the first layer 31b. Specifically, the first exposed surface 31bS is etched, so that the first exposed surface 31bS is recessed relative to the second layer 32 and the third layer 33. The recess A is formed by the first exposed surface 31bS being recessed relative to the second layer 32 and the third layer 33.

[0109] The first exposed surface 31bS is located in the recess A. The first exposed surface 31bS is located at the bottom of the recess A.

[0110] Recess A is narrow.

[0111] The first exposed width D31b corresponds to the width of the recess A. As described above, the first exposed width D31b is small, and therefore the width of the recess A is small.

[0112] The first layer 31 includes at least one of a first layer 31a and a first layer 31b.

[0113] When the first layer 31a and the first layer 31b are not distinguished, they are referred to as "the first layer 31". When the first exposed surface 31aS and the first exposed surface 31bS are not distinguished, they are referred to as "the first exposed surface 31S". When the etching time of the first layer 31a and the etching time of the first layer 31b are not distinguished, they are referred to as "the etching time of the first layer 31". When the first exposed width D31a and the first exposed width D31b are not distinguished, they are referred to as "the first exposed width D31".

[0114] The first layer 31 is made of silicon oxide.

[0115] The silicon oxide includes, for example, silicon dioxide (SiO2). The silicon oxide may include, for example, silicon suboxide (SiOx, 0 < x < 2). The silicon suboxide includes, for example, silicon monoxide (SiO).

[0116] The first layer 31 is, for example, a thermal oxide film.

[0117] The second layer 32 has a composition different from that of the first layer 31. The second layer 32 is made of, for example, silicon. The second layer 32 is made of at least one of, for example, single crystal silicon, polycrystalline silicon, and amorphous silicon. Polycrystalline silicon is also called polysilicon.

[0118] The third layer 33 has a composition different from that of the first layer 31. The third layer 33 is made of, for example, silicon. The third layer 33 is made of at least one of, for example, single crystal silicon, polycrystalline silicon, and amorphous silicon.

[0119] The composition of the third layer 33 may be the same as that of the second layer 32. The composition of the third layer 33 may be different from that of the second layer 32.

[0120] 3. Configuration of the processing unit 11 FIG. 6 is a diagram showing the configuration of the processing unit 11 of the embodiment.

[0121] Each processing unit 11 has the same structure. The processing units 11 are classified as single-wafer processing units, i.e., each processing unit 11 processes only one substrate W at a time.

[0122] The substrate holder 12 holds only one substrate W at a time. The substrate holder 12 holds the substrate W in a substantially horizontal position. When the substrate W is held by the substrate holder 12, the surface W1 is horizontal.

[0123] When the substrate W is held by the substrate holder 12, the surface W1 faces upward. When the substrate W is held by the substrate holder 12, the surface W1 corresponds to the upper surface of the substrate W. When the substrate W is held by the substrate holder 12, the surface W2 corresponds to the lower surface of the substrate W. The lower surface of the substrate W is also called the backside of the substrate W.

[0124] The substrate holder 12 contacts at least one of the surface W2 and the peripheral edge W3, and does not contact the surface W1.

[0125] The substrate holder 12 is located below the substrate W that it holds.

[0126] The processing unit 11 includes a rotational drive unit 14. The rotational drive unit 14 is connected to the substrate holding unit 12. The rotational drive unit 14 rotates the substrate holding unit 12. The substrate W held by the substrate holding unit 12 rotates integrally with the substrate holding unit 12. The substrate W held by the substrate holding unit 12 rotates, for example, around a rotational axis B. The rotational axis B passes through the center of the substrate W, for example. The rotational axis B extends, for example, in the vertical direction Z.

[0127] The processing unit 11 includes a supply unit 15. The supply unit 15 supplies an etching liquid J to the substrate W to etch the first layer 31.

[0128] Specifically, the supply unit 15 supplies the etching liquid J to the substrate W held by the substrate holding unit 12. The supply unit 15 supplies the etching liquid J to a surface W1 of the substrate W held by the substrate holding unit 12.

[0129] The supply unit 15 includes a nozzle 16. The nozzle 16 is disposed above the substrate W held by the substrate holder 12. The nozzle 16 ejects the etching liquid J.

[0130] Etching solution J contains hydrofluoric acid, heavy water, and a base.

[0131] The etching solution J can be obtained by, for example, adding a base to a solution in which hydrofluoric acid is diluted with heavy water.

[0132] The volume of heavy water contained in etching solution J is larger than the volume of hydrofluoric acid contained in etching solution J. For example, the volume of heavy water contained in etching solution J is more than 10 times the volume of hydrofluoric acid contained in etching solution J. For example, the volume of heavy water contained in etching solution J is more than 20 times the volume of hydrofluoric acid contained in etching solution J.

[0133] Etching solution J does not substantially contain deionized water. For example, the volume of deionized water contained in etching solution J is smaller than the volume of heavy water contained in etching solution J. For example, the volume of deionized water contained in etching solution J is smaller than 10% of the volume of heavy water contained in etching solution J. For example, the volume of deionized water contained in etching solution J is smaller than 5% of the volume of heavy water contained in etching solution J.

[0134] The base is, for example, a weak base. The base is, for example, ammonia water. The base includes, for example, at least one of ammonia water, ammonium hydroxide, tetramethylammonium hydroxide, potassium hydroxide, and sodium hydroxide.

[0135] The etchant J etches the first layer 31 .

[0136] The second layer 32 has etching resistance to the etching solution J. More specifically, the etching resistance of the second layer 32 is higher than the etching resistance of the first layer 31.

[0137] The third layer 33 has etching resistance to the etching solution J. More specifically, the etching resistance of the third layer 33 is higher than the etching resistance of the first layer 31.

[0138] The substrate processing apparatus 1 includes a supply source 17. The supply source 17 is in communication with the supply unit 15. The supply source 17 stores an etching liquid J. The supply source 17 supplies the etching liquid J to the supply unit 15.

[0139] The substrate processing apparatus 1 includes a pipe 18 and a valve 19. The pipe 18 has a first end connected to a supply unit 15. The pipe 18 has a second end connected to a supply source 17. The valve 19 is provided on the pipe 18. The valve 19 controls the supply of the etching liquid J by the supply unit 15. Specifically, when the valve 19 is open, the supply source 17 supplies the etching liquid J to the supply unit 15, and the supply unit 15 supplies the etching liquid J to the substrate W. When the valve 19 is closed, the supply source 17 does not supply the etching liquid J to the supply unit 15, and the supply unit 15 does not supply the etching liquid J to the substrate W.

[0140] The processing unit 11 includes a supply part 20. The supply part 20 supplies a rinse liquid L to the substrate W.

[0141] Specifically, the supply unit 20 supplies the rinse liquid L to the substrate W held by the substrate holder 12. The supply unit 20 supplies the rinse liquid L to the surface W1 of the substrate W held by the substrate holder 12.

[0142] For example, the supply unit 20 includes a nozzle 21. The nozzle 21 is disposed above the substrate W held by the substrate holder 12. The nozzle 21 ejects the rinse liquid L.

[0143] The rinse liquid L is, for example, at least one of deionized water (DIW) and isopropyl alcohol. The rinse liquid L is also called a cleaning liquid.

[0144] The supply unit 20 communicates with a supply source 22. The supply source 22 stores the rinse liquid L. The supply source 22 sends the rinse liquid L to the supply unit 20.

[0145] The substrate processing apparatus includes a pipe 23 and a valve 24. The pipe 23 has a first end connected to a supply unit 20. The pipe 23 has a second end connected to a supply source 22. The valve 24 is provided on the pipe 23. The valve 24 controls the supply of the rinse liquid L by the supply unit 20.

[0146] The processing unit 11 includes a supply unit 25. The supply unit 25 supplies a drying gas to the substrate W.

[0147] Specifically, the supply unit 25 supplies a dry gas to the substrate W held by the substrate holder 12. The supply unit 25 supplies the dry gas to the surface W1 of the substrate W held by the substrate holder 12.

[0148] The supply unit 25 includes a nozzle 26. The nozzle 26 is disposed above the substrate W held by the substrate holder 12. The nozzle 26 ejects a drying gas.

[0149] The dry gas includes at least one of air and an inert gas, for example, compressed air, and nitrogen gas.

[0150] The supply unit 25 is connected to a supply source 27. The supply source 27 stores a dry gas. The supply source 27 delivers the dry gas to the supply unit 25.

[0151] The substrate processing apparatus 1 includes a pipe 28 and a valve 29. The pipe 28 has a first end connected to a supply unit 25. The pipe 28 has a second end connected to a supply source 27. The valve 29 is provided on the pipe 28. The valve 29 controls the supply of the drying gas by the supply unit 25.

[0152] The processing unit 11 may further include a cup (not shown). The cup is disposed to the side of the substrate holding part 12. The cup surrounds the substrate holding part 12. The cup catches liquid splashed from the substrate W held by the substrate holding part 12.

[0153] 2, the control unit 10 controls the rotary drive unit 14. The control unit 10 controls the valves 19, 24, and 29.

[0154] The supply unit 15 is an example of the supply unit defined in the present invention.

[0155] 4. Substrate processing method procedure Please refer to Figures 4(a), 4(b), 5(a), 5(b), 6 and 7. Figure 7 is a flowchart showing the procedure of the substrate processing method according to the embodiment.

[0156] The substrate processing method is performed in the substrate processing apparatus 1. The substrate processing method is mainly performed in the processing unit 11. The substrate processing method is for processing a substrate W. The substrate processing method is for processing a substrate W held by the substrate holder 12.

[0157] The substrate processing method includes an etching step, a rinsing step, and a drying step. The rinsing step is performed after the etching step. The drying step is performed after the rinsing step.

[0158] Each step of the substrate processing method will be described below. In the following description, each element of the processing unit 11 operates under the control of the control unit 10.

[0159] Step S1: Etching process In the etching step, an etching solution J is supplied to the substrate W. Specifically, the supply unit 15 supplies the etching solution J to the substrate W held by the substrate holder 12. As described above, the etching solution J contains hydrofluoric acid, heavy water, and a base.

[0160] In the etching step, the first exposed surface 31S is exposed to an etching solution J.

[0161] In the etching step, the first exposed surface 31S comes into contact with the etching solution J.

[0162] In the etching step, the first layer 31 is etched.

[0163] For example, the time for which the etching step is performed corresponds to the above-mentioned "etching time of the first layer 31."

[0164] The first layer 31 is selectively etched by the etching solution J.

[0165] The second layer 32 is not substantially etched by the etching solution J. The third layer 33 is not substantially etched by the etching solution J.

[0166] Step S2: Rinse process In the rinsing step, a rinsing liquid L is supplied to the substrate W. Specifically, the supply unit 20 supplies the rinsing liquid L to the substrate W held by the substrate holder 12. In the rinsing step, the rinsing liquid L removes the etching liquid J from the substrate W. Etching of the first layer 31 is stopped.

[0167] Step S3: Drying process In the drying step, the substrate W is dried. For example, the rotation drive unit 14 rotates the substrate W held by the substrate holder 12. For example, the supply unit 25 supplies a drying gas to the substrate W held by the substrate holder 12.

[0168] In the etching step, the rotation drive unit 14 may rotate the substrate W held by the substrate holder 12. In the rinsing step, the rotation drive unit 14 may rotate the substrate W held by the substrate holder 12.

[0169] 5. The first usefulness of Etchant J The first usefulness of Etching Solution J will be explained using Examples 1 and 2 and Comparative Examples 1 to 10.

[0170] 8(a) and 8(b) are schematic diagrams of test pieces. 9(a) and 9(b) are schematic diagrams of other test pieces. Test pieces 40, 50a, 50b, and 50c were prepared before Examples 1 and 2 and Comparative Examples 1 to 10 were performed.

[0171] The test pieces 40, 50a, 50b, and 50c each resemble the substrate W.

[0172] Please refer to Figures 8(a) and 8(b).

[0173] The test piece 40 includes a layer 41. The layer 41 mimics the first layer 31a.

[0174] The layer 41 is the layer to be etched and is made of silicon oxide.

[0175] The layer 41 has an exposed surface 41S. The exposed surface 41S is exposed. The exposed surface 41S has an exposed width D41. The exposed width D41 is 20 mm. The exposed surface 41S has an exposed length I41. The exposed length I41 is 20 mm.

[0176] 8(a) shows the test piece 40 before etching, and FIG. 8(b) shows the test piece 40 after etching. FIG. 8(b) shows the etching amount H41 of the layer 41.

[0177] Layer 41 is etched. Exposed surface 41S is etched.

[0178] The layer 41 is etched in a direction F41, which is perpendicular to the exposed surface 41S. As the layer 41 is etched, the length of the layer 41 in the direction F41 decreases.

[0179] The etching amount H41 is the amount of reduction in the length of the layer 41 in the direction F41.

[0180] The test piece 40 further includes a layer 42. The layer 42 is not a layer to be etched, and the composition of the layer 42 is single crystal silicon.

[0181] Layer 41 is formed on layer 42. Layer 41 is in contact with layer 41.

[0182] Please refer to Figures 9(a) and 9(b).

[0183] The test strips 50a, 50b, and 50c have a common structure. When there is no need to distinguish between the test strips 50a, 50b, and 50c, they will be referred to as "test strip 50."

[0184] Test piece 50a includes layer 51a. Test piece 50b includes layer 51b. Test piece 50c includes layer 51c. When layers 51a, 51b, and 51c are not distinguished from one another, they are referred to as "layer 51." Layer 51 resembles first layer 31b.

[0185] The layer 51 is the layer to be etched and is made of silicon oxide.

[0186] The layer 51a has an exposed surface 51aS. The layer 51b has an exposed surface 51bS. The layer 51c has an exposed surface 51cS. When the exposed surfaces 51aS, 51bS, and 51cS are not distinguished from one another, they are referred to as "exposed surface 51S." The exposed surface 51S is exposed. The exposed surface 51S is narrower than the exposed surface 41S.

[0187] The exposed surface 51aS has an exposed width D51a. The exposed surface 51bS has an exposed width D51b. The exposed surface 51cS has an exposed width D51c. When the exposed widths D51a, D51b, and D51c are not distinguished from one another, they are referred to as the "exposed width D51." The exposed width D51 is smaller than the exposed width D41.

[0188] The exposed width D51a is 10 nm, the exposed width D51b is 5 nm, and the exposed width D51c is 3 nm.

[0189] 9(a) shows the test piece 50 before etching, and FIG. 9(b) shows the test piece 50 after etching. FIG. 9(b) shows the etching amount H51 of the layer 51.

[0190] Layer 51 is etched. Exposed surface 51S is etched.

[0191] The layer 51 is etched in a direction F51, which is perpendicular to the exposed surface 51S. As the layer 51 is etched, the length of the layer 51 in the direction F51 decreases.

[0192] The etching amount H51 is the amount of reduction in the length of the layer 51 in the direction F51.

[0193] The test piece 50 further includes layers 52 and 53. The layer 52 is not a layer to be etched. The layer 52 is made of single crystal silicon. The layer 53 is not a layer to be etched. The layer 53 is made of polycrystalline silicon.

[0194] Layer 52 is disposed on a first side of layer 51. Layer 53 is disposed on a second side of layer 51. Layer 51 is disposed between layers 52 and 53.

[0195] Layer 52 is in contact with layer 53. Layer 52 is in contact with layer 54.

[0196] Fig. 10 is a table showing Example 1 and Comparative Examples 1 to 5. Fig. 11 is a table showing Example 2 and Comparative Examples 6 to 10.

[0197] Examples 1 and 2 and Comparative Examples 1-10 will be described. The etching solutions used in Examples 1 and 2 and Comparative Examples 1-10 are different. Therefore, the etching solution used in Example 1 is referred to as "etching solution J1." The etching solution used in Example 2 is referred to as "etching solution J2." The etching solution used in Comparative Example 1 is referred to as "etching solution K1." The etching solution used in Comparative Example 2 is referred to as "etching solution K2." Similarly, the etching solutions used in Comparative Examples 3-10 are referred to as "etching solutions K3-K10."

[0198] The conditions for Example 1 will be described. A series of processes was performed on the test piece 40. The series of processes consisted of an etching process, a rinsing process, and a drying process. Similarly, the series of processes was performed on the test pieces 50a, 50b, and 50c.

[0199] In the etching process, the etching solution J1 is supplied to the test pieces 40 and 50. In the etching process, the layers 41 and 51 are etched. In the etching process, the exposed surfaces 41S and 51S are etched. The etching solution J1 contains hydrofluoric acid, heavy water, and ammonia water. The hydrofluoric acid has a concentration of 50 wt%. The ammonia water has a concentration of 29 wt%. The volume ratios of hydrofluoric acid, heavy water, and ammonia water in the etching solution J1 are as follows: Hydrofluoric acid: heavy water: ammonia water = 1:28:1 (volume ratio)

[0200] In the rinsing step, a rinsing liquid L is supplied to the test pieces 40 and 50. The rinsing liquid L is deionized water.

[0201] In the drying step, a drying gas is supplied to the test pieces 40, 50. The drying gas is nitrogen gas.

[0202] The conditions of Example 2 will be described. In the etching process, an etching solution J2 is supplied to the test pieces 40 and 50. The etching solution J2 contains hydrofluoric acid, heavy water, and ammonia water. The volume ratio of hydrofluoric acid, heavy water, and ammonia water in the etching solution J2 is as follows: Hydrofluoric acid: heavy water: ammonia water = 3:297:3 (volume ratio) Other conditions in Example 2 are the same as those in Example 1.

[0203] The conditions of Comparative Example 1 will be described. In the etching process, an etching solution K1 is supplied to the test pieces 40 and 50. The etching solution K1 contains hydrofluoric acid and deionized water. The volume ratio of hydrofluoric acid to deionized water in the etching solution K1 is as follows: Hydrofluoric acid: deionized water = 1:29 (volume ratio) Other conditions in Comparative Example 1 are the same as those in Example 1.

[0204] The conditions of Comparative Example 2 will be described. In the etching process, an etching solution K2 is supplied to the test pieces 40 and 50. The etching solution K2 contains hydrofluoric acid, deionized water, and ammonia water. The volume ratio of hydrofluoric acid, deionized water, and ammonia water in the etching solution K2 is as follows: Hydrofluoric acid: deionized water: ammonia water = 1:28:1 (volume ratio) Other conditions in Comparative Example 2 are the same as those in Example 1.

[0205] The conditions of Comparative Example 3 will be described. In the etching process, etching solution K3 is supplied to the test pieces 40 and 50. The etching solution K3 contains hydrofluoric acid, deionized water, and hydrochloric acid. The hydrochloric acid has a concentration of 36 wt%. The volume ratio of hydrofluoric acid, deionized water, and hydrochloric acid in the etching solution K3 is as follows: Hydrofluoric acid: deionized water: hydrochloric acid = 1:28:1 (volume ratio) Other conditions in Comparative Example 3 are the same as those in Example 1.

[0206] The conditions of Comparative Example 4 will be described. In the etching process, an etching solution K4 is supplied to the test pieces 40 and 50. The etching solution K4 contains hydrofluoric acid and heavy water. The volume ratio of hydrofluoric acid to heavy water in the etching solution K4 is as follows: Hydrofluoric acid: heavy water = 1:29 (volume ratio) Other conditions in Comparative Example 4 are the same as those in Example 1.

[0207] The conditions of Comparative Example 5 will be described. In the etching process, etching solution K5 is supplied to the test pieces 40 and 50. The etching solution K5 contains hydrofluoric acid, heavy water, and hydrochloric acid. The hydrochloric acid has a concentration of 36 wt%. The volume ratio of hydrofluoric acid, heavy water, and hydrochloric acid in the etching solution K5 is as follows: Hydrofluoric acid: heavy water: hydrochloric acid = 1:28:1 (volume ratio) Other conditions in Comparative Example 5 are the same as those in Example 1.

[0208] The conditions of Comparative Example 6 will be described. In the etching process, an etching solution K6 is supplied to the test pieces 40 and 50. The etching solution K6 contains hydrofluoric acid and deionized water. The volume ratio of hydrofluoric acid to deionized water in the etching solution K6 is as follows: Hydrofluoric acid: deionized water = 1:100 (volume ratio) Other conditions in Comparative Example 6 are the same as those in Example 1.

[0209] The conditions of Comparative Example 7 will be described. In the etching process, an etching solution K7 is supplied to the test pieces 40 and 50. The etching solution K7 contains hydrofluoric acid, deionized water, and ammonia water. The volume ratio of hydrofluoric acid, deionized water, and ammonia water in the etching solution K7 is as follows: Hydrofluoric acid: deionized water: ammonia water = 3:297:3 (volume ratio) Other conditions in Comparative Example 7 were the same as those in Example 1.

[0210] The conditions of Comparative Example 8 will be described. In the etching process, etching solution K8 is supplied to the test pieces 40 and 50. The etching solution K8 contains hydrofluoric acid, deionized water, and hydrochloric acid. The hydrochloric acid has a concentration of 36 wt%. The volume ratio of hydrofluoric acid, deionized water, and hydrochloric acid in the etching solution K8 is as follows: Hydrofluoric acid: deionized water: hydrochloric acid = 3:290:10 (volume ratio) Other conditions in Comparative Example 8 were the same as those in Example 1.

[0211] The conditions of Comparative Example 9 will be described. In the etching process, an etching solution K9 is supplied to the test pieces 40 and 50. The etching solution K9 contains hydrofluoric acid and heavy water. The volume ratio of hydrofluoric acid to heavy water in the etching solution K9 is as follows: Hydrofluoric acid: heavy water = 1:100 (volume ratio) Other conditions in Comparative Example 9 are the same as those in Example 1.

[0212] The conditions for Comparative Example 10 will be described. In the etching process, etching solution K10 is supplied to the test pieces 40 and 50. The etching solution K10 contains hydrofluoric acid, heavy water, and hydrochloric acid. The hydrochloric acid has a concentration of 36 wt%. The volume ratio of hydrofluoric acid, heavy water, and hydrochloric acid in the etching solution K10 is as follows: Hydrofluoric acid: heavy water: hydrochloric acid = 3:290:10 (volume ratio) Other conditions in Comparative Example 10 are the same as those in Example 1.

[0213] After test specimen 40 was processed in Example 1, test specimen 40 was evaluated by its etching rate. Similarly, after test specimen 40 was processed in Example 2 and Comparative Examples 1-10, test specimen 40 was evaluated by its etching rate. After test specimens 50a, 50b, and 50c were processed in Examples 1 and 2 and Comparative Examples 1-10, test specimens 50a, 50b, and 50c were evaluated by their etching rate.

[0214] Fig. 10 shows the etching rates M41, M51a, M51b, and M51c in Example 1. Fig. 10 shows the etching rates M41, M51a, M51b, and M51c in Comparative Examples 1-5. Similarly, Fig. 11 shows the etching rates M41, M51a, M51b, and M51c in Example 2 and Comparative Examples 6-10. The etching rates M41, M51a, M51b, and M51c in Figs. 10 and 11 are measured values.

[0215] The etching rate M41 is the etching rate of the layer 41. The etching rate M41 is obtained by dividing the etching amount H41 of the layer 41 by the etching time of the layer 41. The etching time is the time during which the etching process is performed. The unit of the etching rate M41 is nm / min.

[0216] The etching rate M51a is the etching rate of the layer 51a. The etching rate M51b is the etching rate of the layer 51b. The etching rate M51c is the etching rate of the layer 51c. The etching rates M51a, M51b, and M51c are obtained based on the etching amount H52 of the layers 51a, 52b, and 52c and the etching time of the layers 51a, 51b, and 51c, respectively. The units of the etching rates M51a, M51b, and M51c are nm / min.

[0217] Referring to FIG. 10, the etching rate M41 of Example 1 is the highest among the etching rates M41 of Example 1 and Comparative Examples 1-5. The etching rate M51a of Example 1 is the highest among the etching rates M51a of Example 1 and Comparative Examples 1-5. The etching rate M51b of Example 1 is the highest among the etching rates M51b of Example 1 and Comparative Examples 1-5. The etching rate M51c of Example 1 is the highest among the etching rates M51c of Example 1 and Comparative Examples 1-5.

[0218] See FIG. 11. The etching rate M41 of Example 2 is the highest among the etching rates M41 of Example 2 and Comparative Examples 6-10. The etching rate M51a of Example 2 is the highest among the etching rates M51a of Example 2 and Comparative Examples 6-10. The etching rate M51b of Example 2 is the highest among the etching rates M51b of Example 2 and Comparative Examples 6-10. The etching rate M51c of Example 2 is the highest among the etching rates M51c of Example 2 and Comparative Examples 6-10.

[0219] The following can be said from Examples 1 and 2 and Comparative Examples 1 to 10: When etching rates M52a, M52b, and M52c are not distinguished from one another, they are referred to as "etching rate M52."

[0220] Among the etching solutions J1, K1, K2, K3, K4, and K5, the etching solution J1 has the highest etching rate M41. Among the etching solutions J1, K1, K2, K3, K4, and K5, the etching solution J1 etches the layer 41 at the highest etching rate M41. Among the etching solutions J1, K1, K2, K3, K4, and K5, the etching solution J1 has the highest etching rate M51. Among the etching solutions J1, K1, K2, K3, K4, and K5, the etching solution J1 etches the layer 51 at the highest etching rate M51. Here, the layer 41 in Example 1 and Comparative Examples 1-5 is an example of the first layer 31 of the embodiment. The layer 51 in Example 1 and Comparative Examples 1-5 is also another example of the first layer 31 of the embodiment. The etching solution J1 in Example 1 is an example of the etching solution J of the first embodiment. Therefore, the etching rate M41 of Example 1 is an example of the etching rate of the first layer 31 of the embodiment. The etching rate M52 of Example 1 is also an example of the etching rate of the first layer 31 of the embodiment. Therefore, by using the etching solution J, it is easy to improve the "etching rate of the first layer 31." For example, by using the etching solution J, it is easy to maximize the "etching rate of the first layer 31."

[0221] Among the etching solutions J2, K6, K7, K8, K9, and K10, the etching solution J2 has the highest etching rate M41. Among the etching solutions J2, K6, K7, K8, K9, and K10, the etching solution J2 etches the layer 41 at the highest etching rate M41. Among the etching solutions J2, K6, K7, K8, K9, and K10, the etching solution J2 has the highest etching rate M51. Among the etching solutions J2, K6, K7, K8, K9, and K10, the etching solution J2 etches the layer 51 at the highest etching rate M51. Here, the layer 41 in Example 2 and Comparative Examples 6-10 is an example of the first layer 31 of the embodiment. The layer 51 in Example 2 and Comparative Examples 6-10 is also another example of the first layer 31 of the embodiment. The etching solution J2 in Example 2 is another example of the etching solution J in the first embodiment. Therefore, the etching rate M41 of Example 2 is an example of the etching rate of the first layer 31 of the embodiment. The etching rate M52 of Example 2 is also another example of the etching rate of the first layer 31 of the embodiment. Therefore, by using the etching solution J, it is easy to improve the "etching rate of the first layer 31." For example, by using the etching solution J, it is easy to maximize the "etching rate of the first layer 31." 6. Secondary Use of Etchant J A second usefulness of Etching Solution J will be explained using Example 3 and Comparative Example 11.

[0222] 12(a) and 12(b) are diagrams each showing a schematic diagram of another test piece. Before Example 3 and Comparative Example 11 are carried out, test pieces 60a, 60b, and 60c are prepared.

[0223] The test pieces 60a, 60b, and 60c are modeled after the substrate W.

[0224] The test strips 60a, 60b, and 60c have a common structure. When there is no need to distinguish between the test strips 60a, 60b, and 60c, they will be referred to as "test strip 60."

[0225] Test strip 60a includes layer 61a. Test strip 60b includes layer 61b. Test strip 60c includes layer 61c. When layers 61a, 61b, and 61c are not distinguished from one another, they are referred to as "layer 61." Layer 61 mimics first layer 31. For example, layer 61 mimics first layer 31b.

[0226] The layer 61 is the layer to be etched and is made of silicon oxide.

[0227] The layer 61a has an exposed surface 61aS. The layer 61b has an exposed surface 61bS. The layer 61c has an exposed surface 61cS. When there is no need to distinguish between the exposed surfaces 61aS, 61bS, and 61cS, they will be referred to as the "exposed surface 61S." The exposed surface 61S is exposed.

[0228] The exposed surface 61aS has an exposed width D61a. The exposed surface 61bS has an exposed width D61b. The exposed surface 61cS has an exposed width D61c. When there is no need to distinguish between the exposed widths D61a, D61b, and D61c, they will be referred to as the "exposed width D61."

[0229] The exposed width D61a is 10 nm, the exposed width D61b is 5 nm, and the exposed width D61c is 3 nm.

[0230] Test strip 60a further comprises layer 62a. Test strip 60b further comprises layer 62b. Test strip 60c further comprises layer 62c. When layers 62a, 62b, and 62c are not distinguished, they will be referred to as "layer 62." Layer 62 mimics second layer 32.

[0231] Layer 62 is not a layer to be etched and is composed of amorphous silicon.

[0232] Layer 62 is disposed on a first side of layer 61. Layer 61 is in contact with layer 62.

[0233] The layer 62 has an exposed surface 62S. The exposed surface 62S is exposed.

[0234] The exposed surface 62S has an exposed width D62, which is 100 nm.

[0235] Figure 12(a) shows the test piece 60 before etching. Figure 12(b) shows the test piece 60 after etching. Figure 12(b) shows the etching amount H61 of the layer 61. Figure 12(b) shows the etching amount H62 of the layer 62.

[0236] Layer 61 is etched. Exposed surface 61S is etched.

[0237] The layer 61 is etched in a direction F61, which is perpendicular to the exposed surface 61S. As the layer 61 is etched, the length of the layer 61 in the direction F61 decreases.

[0238] The etching amount H61 is the amount of reduction in the length of the layer 52 in the direction F61.

[0239] Layer 62 is not substantially etched, although layer 62 may be slightly etched, and exposed surface 62S may be slightly etched.

[0240] Layer 62 may be etched in direction F62, which is perpendicular to exposed surface 62S. As layer 62 is etched, the length of layer 62 in direction F62 decreases.

[0241] The etching amount H62 is the amount of reduction in the length of the layer 62 in the direction F62.

[0242] The test piece 60 further includes a layer 63. The layer 63 is not a layer to be etched and is composed of single crystal silicon.

[0243] Layer 63 is disposed on a second side of layer 61. Layer 61 is disposed between layers 62 and 63.

[0244] Layer 61 is in contact with layer 63 .

[0245] The test piece 60 further includes a hard mask 64. The hard mask 64 is not a layer to be etched.

[0246] The hard mask 64 is disposed laterally of the layer 62. The layer 62 is disposed between the layer 61 and the hard mask 64.

[0247] A hard mask 64 is in contact with layer 62 .

[0248] FIG. 13 is a table showing Example 3 and Comparative Example 11.

[0249] Example 3 and Comparative Example 11 will be described. The etching solutions used in Example 3 and Comparative Example 11 are different. Therefore, the etching solution used in Example 3 will be referred to as "etching solution J3." The etching solution used in Comparative Example 11 will be referred to as "etching solution K11."

[0250] The conditions for Example 3 will be described. A series of processes was performed on the test piece 60a. The series of processes consisted of an etching process, a rinsing process, and a drying process. Similarly, the series of processes was performed on the test pieces 60b and 60c.

[0251] In the etching process, the etching solution J3 is supplied to the test piece 60. In the etching process, the exposed surfaces 61S and 62S are exposed to the etching solution J3. In the etching process, the exposed surfaces 61S and 62S are simultaneously exposed to the etching solution J3. In the etching process, the layer 61 is etched. In the etching process, the exposed surface 61S is etched. In the etching process, the layer 62 may be etched. In the etching process, the exposed surface 62S may be etched. The etching solution J3 contains hydrofluoric acid, heavy water, and ammonia water. The hydrofluoric acid has a concentration of 50 wt%. The ammonia water has a concentration of 29 wt%. The volume ratios of hydrofluoric acid, heavy water, and ammonia water in the etching solution J3 are as follows: Hydrofluoric acid: heavy water: ammonia water = 1:27:2 (volume ratio)

[0252] In the rinsing step, a rinsing liquid L is supplied to the test piece 60. The rinsing liquid L is deionized water.

[0253] In the drying step, a drying gas is supplied to the test piece 60. The drying gas is nitrogen gas.

[0254] The conditions of Comparative Example 11 will be described. In the etching step, an etching solution K11 is supplied to the test piece 60. In the etching step, the exposed surfaces 61S and 62S are exposed to the etching solution K11. In the etching step, the exposed surfaces 61S and 62S are simultaneously exposed to the etching solution K11. The etching solution K11 contains hydrofluoric acid, deionized water, and ammonia water. The volume ratio of hydrofluoric acid, deionized water, and ammonia water in the etching solution K11 is as follows: Hydrofluoric acid: deionized water: ammonia water = 1:27:2 (volume ratio) Other conditions in Comparative Example 11 are the same as those in Example 3.

[0255] After test specimen 60a was processed in Example 3, test specimen 60a was evaluated by its etching rate. Similarly, after test specimens 60b and 60c were processed in Example 3, test specimens 60b and 60c were evaluated by their etching rates. After test specimens 60a, 60b, and 60c were processed in Comparative Example 11, test specimens 60a, 60b, and 60c were evaluated by their etching rates. After test specimens 50a, 50b, and 50c were processed in Examples 1 and 2 and Comparative Examples 1-10, test specimens 50a, 50b, and 50c were evaluated by their etching rates.

[0256] FIG. 13 shows the etching rates M61a and M62a of the test piece 60a in Example 3. FIG. 13 shows the etching selectivity Ua of the test piece 60a in Example 3. FIG. 13 shows the etching rates M61b and M62b and the etching selectivity Ub of the test piece 60b in Example 3. FIG. 13 shows the etching rates M61b and M62c and the etching selectivity Uc of the test piece 60c in Example 3. FIG. 13 shows the etching rates M61a-61c, M62a-M62c and the etching selectivity Ua-Uc of the test pieces 60a, 60b, and 60c in Comparative Example 11. The etching rates M61a, M61b, and M61c in FIG. 13 are measured values. The etching rates M62a, M62b, and M62c in FIG. 13 are measured values.

[0257] The etching rate M61a is the etching rate of the layer 61a of the test piece 60a. The etching rate M61a is obtained by dividing the etching amount H61 of the layer 61a by the etching time of the layer 61. The etching time is the time during which the etching process is performed. The unit of the etching rate M61a is nm / min.

[0258] Similarly, etching rate M61b is the etching rate of layer 61b of test piece 60b. Etching rate M61c is the etching rate of layer 61c of test piece 60c. Etching rates M61b and M62c are obtained based on the etching amount H61 of layers 61b and 61c and the etching time of layers 61b and 61c, respectively. The units of etching rates M61b and M61c are nm / min.

[0259] The etching rate M62a is the etching rate of the layer 62 of the test piece 60a. The etching rate M62b is the etching rate of the layer 62 of the test piece 60b. The etching rate M62c is the etching rate of the layer 62 of the test piece 60c. The etching rates M62a-M62c are each obtained by dividing the etching amount H62 of the layer 62 by the etching time of the layer 62. The units of the etching rates M62a-M62c are nm / min.

[0260] The etching selectivity ratio Ua is calculated based on the etching rates M61a and M62a. The etching selectivity ratio Ua is the ratio of the etching rate M61a to the etching rate M62a. The etching selectivity ratio Ub is calculated based on the etching rates M61b and M62b. The etching selectivity ratio Ub is the ratio of the etching rate M61b to the etching rate M62b. The etching selectivity ratio Uc is calculated based on the etching rates M61c and M62c. The etching selectivity ratio Uc is the ratio of the etching rate M61c to the etching rate M62c. Specifically, the etching selectivity ratios Ua, Ub, and Uc are defined by the following formulas. Ua=M61a / M62a Ub=M61b / M62b Uc=M61c / M62c

[0261] The etching rate M61a of Example 3 is greater than the etching rate M61a of Comparative Example 11. The etching rate M61b of Example 3 is greater than the etching rate M61b of Comparative Example 11. The etching rate M61c of Example 3 is greater than the etching rate M61c of Comparative Example 11.

[0262] The etching rate M62a of Example 3 is smaller than the etching rate M62a of Comparative Example 11. The etching rate M62b of Example 3 is smaller than the etching rate M62b of Comparative Example 11. The etching rate M62c of Example 3 is smaller than the etching rate M62c of Comparative Example 11.

[0263] The etching selectivity ratio Ua of Example 3 is greater than the etching selectivity ratio Ua of Comparative Example 11. The etching selectivity ratio Ub of Example 3 is greater than the etching selectivity ratio Ub of Comparative Example 11. The etching selectivity ratio Uc of Example 3 is greater than the etching selectivity ratio Uc of Comparative Example 11.

[0264] The following can be said from Example 3 and Comparative Example 1. When etching rates M61a, M61b, and M61c are not distinguished from one another, they are called "etching rate M61." When etching rates M62a, M62b, and M62c are not distinguished from one another, they are called "etching rate M62." When etching selectivity ratios Ua, Ub, and Uc are not distinguished from one another, they are called "etching selectivity ratio U."

[0265] The etching rate M61 of the layer 61 by the etching solution J3 is higher than the etching rate M61 of the layer 61 by the etching solution K11. Here, the layer 61 of Example 3 is an example of the first layer 31 of the embodiment. The etching solution J3 of Example 3 is an example of the etching solution J of the embodiment. Therefore, the etching rate M61 of Example 3 is an example of the etching rate of the first layer 31 of the embodiment. Therefore, in the embodiment, it is easy to improve the etching rate of the first layer 31.

[0266] The etching rate M62 of the layer 62 by the etching solution J3 is lower than the etching rate M61 of the layer 62 by the etching solution K11. Here, the layer 62 of Example 3 is an example of the second layer 32 of the embodiment. The etching solution J3 of Example 3 is an example of the etching solution J of the embodiment. Therefore, the etching rate M62 of Example 3 is an example of the etching rate of the second layer 32 of the embodiment. Therefore, in the embodiment, it is easy to suppress etching of the second layer 32. In the embodiment, it is easy to protect the second layer 32 from the etching solution J.

[0267] The etching selectivity U of the etching solution J3 is higher than the etching selectivity U of the etching solution K11. Here, the layer 61 of Example 3 is an example of the first layer 31 of the embodiment. The layer 62 of Example 3 is an example of the second layer 32 of the embodiment. The etching solution J3 of Example 3 is an example of the etching solution J of the embodiment. Therefore, the etching selectivity U of Example 1 is an example of the "etching selectivity of the embodiment." The "etching selectivity of the embodiment" is the ratio of the etching rate of the first layer 31 to the etching rate of the second layer 32. Therefore, it is easy to increase the "etching selectivity of the embodiment."

[0268] 7. Effects of the embodiment The substrate processing method is for processing a substrate W. The substrate W includes a first layer 31. The first layer 31 is made of silicon oxide.

[0269] The substrate processing method includes an etching step in which an etchant J is supplied to the substrate W. In the etching step, the first layer 31 is etched.

[0270] The etching solution J contains hydrofluoric acid, heavy water, and a base. Therefore, it is easy to efficiently etch the first layer 31 with the etching solution J. Therefore, it is easy to properly etch the first layer 31. Therefore, it is easy to properly process the substrate W.

[0271] In summary, according to the substrate processing method, the substrate W is processed appropriately.

[0272] For example, the base is a weak base, which makes it easier to efficiently etch the first layer 31 with the etching solution J.

[0273] For example, the base includes at least one of ammonia water, ammonium hydroxide, tetramethylammonium hydroxide, potassium hydroxide, and sodium hydroxide, which makes it easier to efficiently etch the first layer 31 with the etching solution J.

[0274] The first layer 31 has a first exposed surface 31S. The first exposed surface 31S is exposed to the etchant J in the etching step. Therefore, it is easy to etch the first layer 31 in the etching step.

[0275] The first exposed surface 31S has a first exposed width D31. For example, the first exposed width D31 is less than 100 nm. As described above, the etching solution J contains hydrofluoric acid, heavy water, and a base. Therefore, even if the first exposed width D31 is less than 100 nm, it is easy to efficiently etch the first layer 31 with the etching solution J.

[0276] For example, the first exposed width D31 is 50 nm or less. Even if the first exposed width D31 is 50 nm or less, it is easy to etch the first layer 31 with the etching liquid J efficiently.

[0277] For example, the first exposed width D31 is 40 nm or less. Even if the first exposed width D31 is 40 nm or less, it is easy to etch the first layer 31 with the etching liquid J efficiently.

[0278] For example, the first exposed width D31 is 30 nm or less. Even if the first exposed width D31 is 30 nm or less, it is easy to etch the first layer 31 with the etching liquid J efficiently.

[0279] For example, the first exposed width D31 is 20 nm or less. Even if the first exposed width D31 is 20 nm or less, it is easy to etch the first layer 31 with the etching liquid J efficiently.

[0280] For example, the first exposed width D31 is 10 nm or less. Even if the first exposed width D31 is 10 nm or less, it is easy to etch the first layer 31 with the etching liquid J efficiently.

[0281] For example, the first exposed surface 31S is 100 nm or more. As described above, the etching solution J contains hydrofluoric acid, heavy water, and a base. Therefore, even if the first exposed width D31 is 100 nm or more, it is easy to efficiently etch the first layer 31 with the etching solution J.

[0282] For example, the first exposed width D31 is 1,000 nm or more. Even if the first exposed width D31 is 1,000 nm or more, it is easy to etch the first layer 31 with the etching liquid J efficiently.

[0283] For example, the first exposed width D31 is 10,000 nm or more. Even if the first exposed width D31 is 10,000 nm or more, it is easy to etch the first layer 31 with the etching liquid J efficiently.

[0284] For example, the substrate W includes a second layer 32. The second layer 32 has etching resistance to the etching solution J. Therefore, it is easy to properly etch the first layer 31. Furthermore, it is easy to protect the second layer 32 from etching. Specifically, it is easy to protect the second layer 32 from the etching solution J. Therefore, it is easy to increase the "etching selectivity of the embodiment." Therefore, it is easy to properly process the substrate W by the substrate processing method.

[0285] For example, the second layer 32 is made of silicon. Therefore, it is easy for the second layer 32 to have etching resistance to the etching solution J.

[0286] For example, the second layer 32 is made of at least one of single crystal silicon, polycrystalline silicon, and amorphous silicon. Therefore, it is easy for the second layer 32 to have etching resistance to the etching solution J.

[0287] For example, the first layer 31 is in contact with the second layer 32. Even when the first layer 31 is in contact with the second layer 32, it is easy to efficiently etch the first layer 31 with the etching solution J.

[0288] The substrate processing apparatus 1 processes a substrate W. The substrate W includes a first layer 31. The first layer 31 is made of silicon oxide.

[0289] The substrate processing apparatus 1 includes a supply unit 15. The supply unit 15 supplies an etching liquid J to the substrate W to etch the first layer 31.

[0290] The etching solution J contains hydrofluoric acid, heavy water, and a base. Therefore, it is easy to efficiently etch the first layer 31 with the etching solution J. Therefore, it is easy to properly etch the first layer 31. Therefore, it is easy to properly process the substrate W.

[0291] In summary, the substrate processing apparatus 1 processes the substrate W appropriately.

[0292] As described above, the substrate W includes the second layer 32. The second layer 32 has etching resistance to the etching solution J. Therefore, it is easy to properly etch the first layer 31. Furthermore, it is easy to protect the second layer 32 from etching. Therefore, it is easy to increase the "etching selectivity of the embodiment." Therefore, it is easy for the substrate processing apparatus 1 to properly process the substrate W.

[0293] The present invention is not limited to the embodiments, and can be modified as follows.

[0294] (1) The layout of the first layer 31b, the second layer 32, and the third layer 33 may be changed as appropriate.

[0295] For example, the first layer 31b may be separated from the second layer 32. The first layer 31b may not be in contact with the second layer 32.

[0296] For example, the first layer 31b may be separated from the third layer 33. The first layer 31b may not be in contact with the third layer 33.

[0297] (2) The substrate W does not have to include the second layer 32. The second layer 32 may be omitted. The substrate W does not have to include the third layer 33. The third layer 33 may be omitted.

[0298] (3) The substrate processing method may include a step of producing an etching solution J. The substrate processing apparatus 1 may produce the etching solution J.

[0299] 14 is a diagram showing the configuration of a processing unit 11 of the modified embodiment. Note that the same components as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0300] The substrate processing apparatus 1 includes an adding unit 70. The adding unit 70 adds a base R to hydrofluoric acid P and heavy water Q. In this way, the adding unit 70 generates an etching solution J. Then, the adding unit 70 supplies the etching solution J to the supply unit 15.

[0301] The adding section 70 includes a mixing valve 71 and supply sources 72a, 72b, and 77. The supply source 72a is in communication with the mixing valve 71. The supply source 72b is in communication with the mixing valve 71. The supply source 77 is in communication with the mixing valve 71. The supply source 72a supplies hydrofluoric acid P to the mixing valve 71. The supply source 72b supplies heavy water Q to the mixing valve 71. The supply source 77 supplies a base R to the mixing valve 71.

[0302] The base R is, for example, a weak base. The base R is, for example, ammonia water. The base R includes, for example, at least one of ammonia water, ammonium hydroxide, tetramethylammonium hydroxide, potassium hydroxide, and sodium hydroxide.

[0303] The base R may be included in the additive. The source 77 may use an additive containing the base R. The source 77 may supply the additive containing the base R to the mixing valve 71.

[0304] The adding unit 70 includes a pipe 73a and a valve 74a. The pipe 73a has a first end connected to the mixing valve 71. The pipe 73a has a second end connected to a supply source 72a. The valve 74a is provided on the pipe 73a. The valve 74a controls the supply of hydrofluoric acid P from the supply source 72a to the mixing valve 71.

[0305] The adding unit 70 includes a pipe 73b and a valve 74b. The pipe 73b has a first end connected to the mixing valve 71. The pipe 73b has a second end connected to a supply source 72b. The valve 74b is provided on the pipe 73b. The valve 74b controls the supply of heavy water Q from the supply source 72b to the mixing valve 71.

[0306] The addition unit 70 includes a pipe 78 and a valve 79. The pipe 78 has a first end connected to the mixing valve 71. The pipe 78 has a second end connected to a supply source 77. The valve 79 is provided on the pipe 78. The valve 79 controls the supply of base R from the supply source 77 to the mixing valve 71.

[0307] The addition unit 70 communicates with the supply unit 15. The mixing valve 71 communicates with the supply unit 15.

[0308] The substrate processing apparatus 1 includes a pipe 81. The pipe 81 has a first end connected to the adding unit 70. The first end of the pipe 81 is connected to the mixing valve 71. The pipe 81 has a second end connected to the supply unit 15.

[0309] Although not shown, the control unit 10 controls the adding unit 70. The control unit 10 controls the valves 74a, 74b, and 79.

[0310] 15 is a flowchart showing the procedure of a substrate processing method according to a modified embodiment. The substrate processing method includes an adding step, an etching step, a rinsing step, and a drying step. The adding step is performed before the etching step. The etching step is performed after the adding step.

[0311] The operations of the rinsing step and the drying step are substantially the same between the first embodiment and the modified embodiment, and therefore, a description of the rinsing step and the drying step will be omitted.

[0312] Step S4: Addition process In the addition step, a base R is added to hydrofluoric acid P and heavy water Q. In the addition step, an etching solution J is produced.

[0313] Specifically, the adding unit 70 adds a base R to hydrofluoric acid P and heavy water Q. For example, the adding unit 70 adds the base R to a solution obtained by diluting hydrofluoric acid P with heavy water Q. The adding unit 70 generates an etching solution J.

[0314] More specifically, valves 74a, 74b, and 79 are each opened. Supply source 72a supplies hydrofluoric acid P to mixing valve 71. Supply source 72b supplies heavy water Q to mixing valve 71. Supply source 77 supplies base R to mixing valve 71. Mixing valve 71 mixes hydrofluoric acid P, heavy water Q, and base R. As a result, mixing valve 71 produces etching solution J.

[0315] Here, the supply source 77 may supply an additive containing a base R to the mixing valve 71. In the adding step, the additive containing a base R may be added to hydrofluoric acid P and heavy water Q.

[0316] Then, the adding unit 70 supplies the etching liquid J to the supply unit 15.

[0317] Step S1: Etching process In the etching step, the etching liquid J is supplied to the substrate W. In the etching step, the etching liquid J generated in the adding step is supplied to the substrate W.

[0318] Specifically, the supply unit 15 supplies the etching liquid J to the substrate W held by the substrate holder 12.

[0319] The modified embodiment (3) above has the following advantages: The substrate processing method includes an adding step. In the adding step, a base R is added to hydrofluoric acid P and heavy water Q. In the adding step, an etching solution J is generated. Therefore, it is easy to supply the etching solution J to the substrate W in the etching step.

[0320] For example, in the adding step, an additive containing a base R is added to hydrofluoric acid P and heavy water Q. Therefore, it is easy to add the base R to hydrofluoric acid P and heavy water W in the adding step.

[0321] The substrate processing apparatus 1 includes an adding unit 70. The adding unit 70 adds a base R to hydrofluoric acid P and heavy water Q. The adding unit 70 generates an etching solution J. The adding unit 70 supplies the etching solution J to the supply unit 15. Therefore, it is easy for the supply unit 15 to supply the etching solution J containing hydrofluoric acid P, heavy water Q, and the base R to the substrate W.

[0322] (4) The processing unit 11 may be classified as a batch processing unit, i.e., the processing unit 11 may process a plurality of substrates W at one time.

[0323] 16 is a diagram showing the configuration of a processing unit 11 of the modified embodiment. Note that the same components as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0324] The processing unit 11 includes a tank 91. The tank 91 stores an etching solution J.

[0325] The processing unit 11 includes a substrate holder 92. The substrate holder 92 simultaneously holds a plurality of substrates W. The substrate holder 92 holds each substrate W in a substantially vertical position. When the substrate W is held by the substrate holder 92, the plane W1 is vertical.

[0326] The processing unit 11 includes a lifting / lowering drive unit 93. The lifting / lowering drive unit 93 is connected to the substrate holding unit 92. The lifting / lowering drive unit 93 moves the substrate holding unit 92 in the vertical direction Z. The substrate W held by the substrate holding unit 92 moves up and down integrally with the substrate holding unit 92. The lifting / lowering drive unit 93 moves the substrate holding unit 92 between an upper position and a lower position.

[0327] 16 shows the substrate holder 92 in the upper position by a dashed line. When the substrate holder 92 is in the upper position, the etching liquid J is not supplied to the substrate W. When the substrate holder 92 is in the upper position, the substrate W held by the substrate holder 92 is positioned above the etching liquid J in the tank 91.

[0328] 16 shows the substrate holder 92 in the lower position by a solid line. When the substrate holder 92 is in the lower position, the etching liquid J is supplied to the substrate W. When the substrate holder 92 is in the lower position, the substrate W held by the substrate holder 92 is immersed in the etching liquid J in the tank 91.

[0329] When the substrate holder 92 is in the down position, an etching process is performed.

[0330] The tank 91 is an example of a supply section in the present invention.

[0331] (5) The substrate processing method of the embodiment may be applied to the manufacture of various semiconductor products. The substrate processing apparatus 1 of the embodiment may be used to manufacture various semiconductor products.

[0332] For example, the substrate processing method of the embodiment may be applied to the manufacture of a Fin Field-Effect Transistor (FinFET). For example, the substrate processing method of the embodiment may be applied to the formation of a recess structure. For example, the first layer 31 may be disposed in a trench. For example, the first layer 31 may be an isolation film. For example, the first layer 31 may be an insulator layer.

[0333] For example, the substrate processing method of the embodiment may be applied to a gate removal process. In the gate removal process, the gate is etched while the channel is protected from etching. The gate may be a dummy gate. The gate may have a film shape or a layer shape. The gate may be composed of, for example, silicon oxide or titanium nitride. The channel may be composed of, for example, silicon or germanium.

[0334] The substrate processing apparatus 1 of the embodiment may perform the application examples of the substrate processing method described above.

[0335] (6) The embodiment and each of the modified embodiments described above in (1) to (5) may be further modified as appropriate by replacing or combining each configuration with the configuration of another modified embodiment. [Explanation of symbols]

[0336] 1... Substrate processing equipment 10...Control section 11... Processing unit 12... Board holding part 15 … Supply section 17 … Source 31, 31a, 31b … 1st layer 31S, 31aS, 31bS … 1st exposed surface 32…Second layer 33 … 3rd layer 70 … Additive part 71...Mixing valve 72a … source 72b … source 77 … source 91 … Tank (supply section) A... recess D31, D31a, D31b … 1st exposure width F31a, F31b … Direction H31a, H31b ... Etching amount of the first layer J...etchant M41, M51, M51a, M51b, M51c, M61, M61a, 61b, 61c ... Etching rate of the first layer M62, M62a, 62b, 62c ... Etching rate of the second layer Ua, Ub, Uc … Etching selectivity P... Hydrofluoric acid Q … Heavy water R... base W: Substrate W1 … surface W2...face W3: Peripheral edge

Claims

1. A substrate processing method for processing a substrate, comprising: The substrate is a first layer made of silicon oxide; Including, The substrate processing method includes: an etching step of supplying an etching solution containing hydrofluoric acid, heavy water, and a base to the substrate to etch the first layer; Equipped with Substrate processing method.

2. 2. The substrate processing method according to claim 1, The base is a weak base Substrate processing method.

3. 2. The substrate processing method according to claim 1, The base is Ammonia water, ammonium hydroxide, tetramethylammonium hydroxide, potassium hydroxide, and Sodium hydroxide Includes at least one of the following: Substrate processing method.

4. 2. The substrate processing method according to claim 1, The substrate processing method includes: adding a base to hydrofluoric acid and heavy water to form the etching solution; Equipped with Substrate processing method.

5. 2. The substrate processing method according to claim 1, The first layer has a first exposed surface that is exposed to the etching solution during the etching step. Substrate processing method.

6. 6. The substrate processing method according to claim 5, The first exposed surface has a first exposed width of less than 100 nm. Substrate processing method.

7. 6. The substrate processing method according to claim 5, The first exposed surface has a first exposed width of 100 nm or more. Substrate processing method.

8. 2. The substrate processing method according to claim 1, The substrate is a second layer having etching resistance to the etching solution; Contains Substrate processing method.

9. 9. The substrate processing method according to claim 8, The second layer is made of silicon. Substrate processing method.

10. A substrate processing apparatus, The substrate is a first layer made of silicon oxide; Including, The substrate processing apparatus includes: a supply unit that supplies an etching solution containing hydrofluoric acid, heavy water, and a base to the substrate to etch the first layer; Equipped with Substrate processing equipment.

11. 11. The substrate processing apparatus according to claim 10, The substrate processing apparatus includes: an adding unit that adds a base to hydrofluoric acid and heavy water to generate the etching solution; Equipped with The adding unit supplies the etching liquid to the supply unit. Substrate processing equipment.

12. 11. The substrate processing apparatus according to claim 10, The substrate is a second layer having etching resistance to the etching solution; Contains Substrate processing equipment.

Images