Semiconductor device

Abstract

To provide a semiconductor device in which inductance is reduced and screw fastening of a terminal can be performed.SOLUTION: A semiconductor device comprises: a semiconductor chip 10; a sealing resin 1 that seals the semiconductor chip 10; a first terminal 2 that projects from the sealing resin 1 to extend in a first direction, and has a first connection part 2a in an outside of the sealing resin 1; and a second terminal 3 that projects from the sealing resin 1 to extend in the first direction, and has a second connection part 3a in an outside of the sealing resin 1. The first terminal 2 and the second terminal 3 respectively have rectangular shape facing parts 21 and 31 that are facing each other with a space between the first connection part 2a and the second connection part 3a, and width W1 of the facing parts 21 and 31 in a second direction being orthogonal to the first direction is more than or equal to 1 mm, and is less than or equal to 13 mm.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device (power semiconductor module). [Background technology]

[0002] Patent Document 1 discloses that the overlapping portion of the P terminal and the N terminal is formed in a convex shape. Patent Document 2 discloses that the conductor surfaces of a DC positive plate conductor and a DC negative plate conductor are configured to face each other. Patent Document 3 discloses that two power supply terminals made of plate-shaped conductors and transmitting positive and negative power supply potentials, respectively, are provided in close contact with each other with an insulating sheet made of an insulating synthetic resin or the like sandwiched therebetween, and that the thickness of the insulating sheet is 0.5 mm to 1.5 mm.

[0003] Patent Document 4 discloses an electrode conversion device including a capacitor having a positive terminal, a negative terminal arranged opposite the positive terminal with a first gap therebetween, and a first insulating member arranged in the first gap, and a semiconductor module having a positive input terminal connected to be superimposed on the positive terminal, a negative input terminal connected to be superimposed on the negative terminal arranged opposite the positive input terminal with a second gap therebetween, and a second insulating member arranged between the positive input terminal and the negative input terminal and having a contact surface that contacts one of the front and back surfaces of the first insulating member, and having a second bus bar fitted with a first bus bar; and a method of fastening the positive and negative terminals to the first and second bus bars with one screw and washer.

[0004] Patent Document 5 discloses bending each terminal and fastening it with a bolt and nut. Patent Document 6 discloses a structure in which the terminals of the main circuit are arranged facing each other, parallel and close to each other in order to reduce wiring inductance. Patent Document 7 discloses a configuration in which first and second DC voltage terminal elements and first and second DC voltage connection elements sandwich an insulating device. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] International Publication No. 2014 / 002442 [Patent Document 2] Japanese Patent Application Laid-Open No. 2007-299781 [Patent Document 3] Japanese Patent Application Publication No. 6-21323 [Patent Document 4] Patent No. 7180812 specification [Patent Document 5] International Publication No. 2019 / 239771 [Patent Document 6] Japanese Patent Publication No. 2022-6780 [Patent Document 7] JP 2018-190965 A Summary of the Invention [Problem to be solved by the invention]

[0006] In conventional power semiconductor modules, arranging multiple terminals facing each other (laminating) has been considered to reduce inductance, but arranging multiple terminals facing each other can make it difficult to screw the terminals to external components such as capacitors.

[0007] In view of the above-mentioned problems, an object of the present disclosure is to provide a semiconductor device that reduces inductance and allows terminals to be fastened by screws. [Means for solving the problem]

[0008] One aspect of the present invention is a semiconductor device comprising: a semiconductor chip; an encapsulating resin for encapsulating the semiconductor chip; a first terminal that protrudes from the encapsulating resin and extends in a first direction and has a first connection portion outside the encapsulating resin; and a second terminal that protrudes from the encapsulating resin and extends in the first direction and has a second connection portion outside the encapsulating resin, wherein the first terminal and the second terminal each have rectangular opposing portions that are spaced apart and face each other between the first and second connection portions, and the width of the opposing portions in a second direction perpendicular to the first direction is 1 mm or more and 13 mm or less. [Effects of the Invention]

[0009] According to the present disclosure, it is possible to provide a semiconductor device that reduces inductance and allows terminals to be fastened by screws. [Brief explanation of the drawings]

[0010] [Figure 1] 1 is a plan view of a semiconductor device according to a first embodiment. [Figure 2] 1 is a perspective view of a semiconductor device according to a first embodiment. [Figure 3] FIG. 2 is a cross-sectional view taken along the line AA′ in FIG. [Figure 4] FIG. 2 is another cross-sectional view taken along the line AA′ in FIG. [Figure 5] 1 is a plan view of a semiconductor device according to a first embodiment. [Figure 6] FIG. 3 is another plan view of the semiconductor device according to the first embodiment. [Figure 7] FIG. 6 is a cross-sectional view taken along the line BB′ in FIG. 5. [Figure 8] FIG. 6 is a cross-sectional view taken along line CC′ in FIG. 5. [Figure 9] FIG. 6 is another cross-sectional view taken along the line CC′ in FIG. 5. [Figure 10] 1 is an equivalent circuit diagram of a semiconductor device according to a first embodiment. [Figure 11] FIG. 2 is a cross-sectional view of a semiconductor device according to a first comparative example. [Figure 12] FIG. 2 is a plan view of a semiconductor device according to a first comparative example. [Figure 13] FIG. 10 is a plan view of a semiconductor device according to a second comparative example. [Figure 14] 10 is a table showing the relationship between laminate width, fastening point distance, and inductance. [Figure 15] 10 is a table showing the relationship between laminate width, PN distance, and inductance. [Figure 16] FIG. 10 is a perspective view of a semiconductor device according to a second embodiment. [Figure 17] FIG. 10 is a cross-sectional view of a semiconductor device according to a second embodiment. [Figure 18] FIG. 10 is a cross-sectional view of a semiconductor device according to a third embodiment. [Figure 19] FIG. 10 is a cross-sectional view of a semiconductor device according to a fourth embodiment. [Figure 20] FIG. 10 is a cross-sectional view of a semiconductor device according to a fifth embodiment. [Figure 21] FIG. 10 is a cross-sectional view of a semiconductor device according to a sixth embodiment. [Figure 22] FIG. 13 is a cross-sectional view of a semiconductor device according to a seventh embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, first to seventh embodiments of the present disclosure will be described with reference to the drawings. In the drawings referred to in the following description, the same or similar parts are designated by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between thickness and planar dimensions, the thickness ratio of each layer, etc., may differ from the actual ones. Therefore, specific thicknesses and dimensions should be determined with reference to the following description. Furthermore, it goes without saying that the drawings may include parts with different dimensional relationships and ratios.

[0012] In addition, the definitions of directions such as "up," "down," "up and down," "left," "right," and "left and right" in the following description are merely for the convenience of explanation and do not limit the technical concept of the present disclosure. For example, if an object is rotated 90 degrees and observed, "up and down" is converted to "left and right" and read as such, and if it is rotated 180 degrees and observed, "up and down" is read inverted. Furthermore, "upper surface" and "lower surface" may be read as "front surface" and "rear surface," respectively. Furthermore, the "first main surface" and "second main surface" of each member are opposing main surfaces; for example, if the "first main surface" is the top surface, the "second main surface" is the bottom surface. Furthermore, the "first main surface" and "second main surface" may be read as "one main surface" and "the other main surface," respectively.

[0013] Furthermore, in this specification, a "first terminal" means either the positive terminal or the negative terminal of a power semiconductor module, and a "second terminal" means the other of the positive terminal and the negative terminal of a power semiconductor module, which is different from the "first terminal." That is, if the "first terminal" is the positive terminal of a power semiconductor module, the "second terminal" becomes the negative terminal of the power semiconductor module, and if the "first terminal" is the negative terminal of a power semiconductor module, the "second terminal" becomes the positive terminal of the power semiconductor module.

[0014] (First embodiment) <Structure of semiconductor device> As an example of a semiconductor device according to the first embodiment, a power semiconductor module called a "2-in-1" module having the functions of two power semiconductor elements will be shown. FIG. 1 is a plan view of the semiconductor device according to the first embodiment. As shown in FIG. 1, the semiconductor device according to the first embodiment includes a power semiconductor element (semiconductor chip) 10, a sealing resin 1 that seals the semiconductor chip 10, and a positive terminal (P terminal) 2 as a first terminal, a negative terminal (N terminal) 3 as a second terminal, and an output terminal (U terminal) 4 as a third terminal, each of which protrudes from the sealing resin 1 and extends outward. In FIG. 1, the semiconductor chip 10 sealed inside the sealing resin 1 is schematically shown by a dashed line.

[0015] The semiconductor chip 10 is configured using a semiconductor substrate such as silicon (Si), silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), or diamond (C). The semiconductor chip 10 may be a field effect transistor (FET) such as a MOSFET, an insulated gate bipolar transistor (IGBT), a static induction (SI) thyristor, or a gate turn-off (GTO) thyristor. The type, placement position, and number of the semiconductor chips 10 are not particularly limited.

[0016] The sealing resin 1 is made of a resin material such as epoxy or silicone. The sealing resin 1 may be formed by transfer molding without a case. The sealing resin 1 may include a resin case and resin filled inside the case by potting. The sealing resin 1 includes a main body 1a having an approximately rectangular parallelepiped outer shape and a protrusion 1b protruding from the main body 1a. Note that the outer shape of the main body 1a is not limited to an approximately rectangular parallelepiped shape and may be various three-dimensional shapes. The protrusion 1b protrudes from the side surface of the main body 1a from which the positive electrode terminal 2 and the negative electrode terminal 3 protrude and extends outward between the positive electrode terminal 2 and the negative electrode terminal 3. The protrusion 1b extends outward beyond the positive electrode terminal 2 and the negative electrode terminal 3. By providing the protrusion 1b between the positive electrode terminal 2 and the negative electrode terminal 3, a creepage distance d11 between the positive electrode terminal 2 and the negative electrode terminal 3 along the side surface of the protrusion 1b can be ensured. The creepage distance d11 is, for example, about 5 mm or more and 15 mm or less.

[0017] Here, the left-right direction in FIG. 1, which is the direction in which the positive electrode terminal 2, the negative electrode terminal 3, and the output terminal 4 protrude and extend from the sealing resin 1, is defined as the X-axis direction, and the rightward direction in FIG. 1 is defined as the positive X-axis direction. The up-down direction in FIG. 1, which is the direction perpendicular to the X-axis direction, is defined as the Y-axis direction, and the upward direction in FIG. 1 is defined as the positive Y-axis direction. The front and back directions in FIG. 1, which are directions perpendicular to the X-axis and Y-axis directions, are defined as the Z-axis direction, and the frontward direction in FIG. 1 is defined as the positive Z-axis direction. The definitions of directions in FIG. 2 and subsequent figures are the same as those in FIG. 1.

[0018] The positive electrode terminal 2 and the negative electrode terminal 3 protrude from a common side surface of the main body portion 1a of the sealing resin 1. The output terminal 4 protrudes from a side surface of the main body portion 1a opposite to the side surface from which the positive electrode terminal 2 and the negative electrode terminal 3 protrude. The positive electrode terminal 2, the negative electrode terminal 3, and the output terminal 4 are each made of a plate-shaped conductor and have a first main surface (upper surface) and a second main surface (lower surface) that face each other in the Z-axis direction. The thickness of the positive electrode terminal 2, the negative electrode terminal 3, and the output terminal 4 is, for example, approximately 1 mm or more and 3 mm or less. The positive electrode terminal 2, the negative electrode terminal 3, and the output terminal 4 are each made of a conductive material such as copper (Cu), a Cu alloy, aluminum (Al), or an Al alloy. The positive electrode terminal 2, the negative electrode terminal 3, and the output terminal 4 are each electrically connected to the semiconductor chip 10 and are external terminals that can be connected to external members.

[0019] The positive electrode terminal 2 has a connection portion 2a that can be connected to an external member such as a capacitor. The negative electrode terminal 3 has a connection portion 3a that can be connected to an external member such as a capacitor. FIG. 1 illustrates an example in which the connection portions 2a, 3a are fastening holes that can be screwed. Screw fastening makes it easy to connect to a bus bar, and by managing the torque, a stable fastening force can be obtained, making handling easy. The connection portions 2a, 3a may not have fastening holes, but may be areas that can be connected to an external member by laser welding. In other words, the positive electrode terminal 2 and the negative electrode terminal 3 can be connected to external members by either screw fastening or laser welding.

[0020] Fig. 2 is a perspective view of the semiconductor device according to the first embodiment. As shown in Fig. 2, the positive electrode terminal 2 and the negative electrode terminal 3 are provided at different heights and offset from each other in the Z-axis direction. Here, the positive electrode terminal 2 is provided relatively lower (negative side of the Z-axis) and the negative electrode terminal 3 is provided relatively upper (positive side of the Z-axis) in the Z-axis direction.

[0021] 3 shows a cross section parallel to the Y-axis direction along line AA′ which passes through the positive electrode terminal 2, the protruding portion 1b, and the negative electrode terminal 3 in FIG. 1. As shown in FIG. 3, parts of the positive electrode terminal 2 and the negative electrode terminal 3 on their adjacent sides are embedded inside the protruding portion 1b.

[0022] The positive electrode terminal 2 has a width W2 in the Y-axis direction. The negative electrode terminal 3 has a width W3 in the Y-axis direction. The widths W2 and W3 may be the same as or different from each other. The widths W2 and W3 are, for example, approximately 10 mm or more and 30 mm or less.

[0023] A portion (facing portion) 21 of the positive electrode terminal 2 and a portion (facing portion) 31 of the negative electrode terminal 3 are closely arranged (laminated) so as to face (overlap) each other at a distance in the Z-axis direction. In FIG. 3, the area (facing area) A1 where the facing portion 21 of the positive electrode terminal 2 and the facing portion 31 of the negative electrode terminal 3 face each other is schematically shown by a dashed line. Currents flow in the positive electrode terminal 2 and the negative electrode terminal 3 in opposite directions. In this case, the wiring inductance can be reduced due to the mutual inductance in the facing area A1.

[0024] The width W1 in the Y-axis direction of the facing portion 21 of the positive terminal 2, the facing portion 31 of the negative terminal 3, and the facing region A1 (hereinafter also referred to as the "laminate width") is, for example, approximately 1 mm or more and 13 mm or less, or may be approximately 1 mm or more and 9 mm or less, or may be approximately 1 mm or more and 5 mm or less. By setting the laminate width W1 to approximately 1 mm or more, an effective reduction in inductance can be obtained. The larger the laminate width W1, the greater the inductance reduction effect.

[0025] The protruding portion 1b of the sealing resin 1 covers the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3. The width W4 of the protruding portion 1b in the Y-axis direction is wider than the laminate width W1. The positive terminal 2 and the negative terminal 3 can ensure a creepage distance d12 along the side and top surfaces of the protruding portion 1b, as well as a creepage distance d13 along the side and bottom surfaces of the protruding portion 1b. The creepage distances d12 and d13 are, for example, approximately 5 mm or more and 15 mm or less.

[0026] A part of the protrusion 1b is interposed between the opposing portion 21 of the positive electrode terminal 2 and the opposing portion 31 of the negative electrode terminal 3. An insulating member such as an insulating sheet may be interposed between the opposing portion 21 of the positive electrode terminal 2 and the opposing portion 31 of the negative electrode terminal 3.

[0027] The distance (spacing) D1 in the Z-axis direction between the opposing portion 21 of the positive electrode terminal 2 and the opposing portion 31 of the negative electrode terminal 3 is, for example, approximately 0.1 mm or more and 4 mm or less, and may be approximately 0.2 mm or more and 4 mm or less. By setting the distance D1 to approximately 4 mm or less, an effective reduction in inductance can be obtained. The smaller the distance D1, the greater the reduction in inductance. By setting the distance D1 to approximately 0.1 mm or more, it becomes easier to fill the resin material that constitutes part of the protrusion 1b between the positive electrode terminal 2 and the negative electrode terminal 3, thereby preventing bubbles from forming between the positive electrode terminal 2 and the negative electrode terminal 3 and causing partial discharge in these bubble portions.

[0028] FIG. 4 shows the cross-sectional view of FIG. 3 with bus bars 5a and 5b screwed to the connection portions 2a and 3a of the positive terminal 2 and the negative terminal 3, respectively. The bus bars 5a and 5b are electrically connected to a capacitor (not shown). A screw 7a is fastened to the connection portion 2a of the positive terminal 2 via the bus bar 5a and a washer 6a. A screw 7b is fastened to the connection portion 3a of the negative terminal 3 via the bus bar 5b and a washer 6b. Note that FIG. 4 does not show the nuts fastened to the screws 7a and 7b.

[0029] Fig. 5 is a plan view of the periphery of the positive electrode terminal 2 and the negative electrode terminal 3. For convenience, Fig. 5 shows the main body 1a and protrusion 1b of the sealing resin 1 using dashed lines. Also, in Fig. 5, similar to Fig. 3, the opposing region A1 between the opposing portion 21 of the positive electrode terminal 2 and the opposing portion 31 of the negative electrode terminal 3 using dashed lines.

[0030] As shown in FIG. 5, the facing region A1, where the facing portion 21 of the positive electrode terminal 2 and the facing portion 31 of the negative electrode terminal 3 face each other, has a substantially rectangular shape. The facing region A1 extends in the X-axis direction from the inside of the main body 1a of the sealing resin 1 to between the connection portion 2a of the positive electrode terminal 2 and the connection portion 3a of the negative electrode terminal 3. The outer end of the facing region A1 in the X-axis direction coincides with the outer end of the positive electrode terminal 2 and the negative electrode terminal 3. The inner end of the facing region A1 may be located outside the main body 1a of the sealing resin 1. The length L1 (laminate length) of the facing region A1 in the X-axis direction is, for example, approximately 10 mm or more and 40 mm or less.

[0031] The center of gravity (center) P1 of the connection portion 2a of the positive terminal 2 is separated from the center of gravity (center) P2 of the connection portion 3a of the negative terminal 3 by a distance (fastening point distance) D2. The fastening point distance D2 is, for example, approximately 13.5 mm or more and 25.5 mm or less, or may be approximately 13.5 mm or more and 21.5 mm or less, or may be approximately 13.5 mm or more and 17.5 mm or less.

[0032] By setting the fastening point distance D2 to approximately 25.5 mm or less, an effective reduction in inductance can be achieved. The smaller the fastening point distance D2, the greater the inductance reduction effect. By setting the fastening point distance D2 to approximately 13.5 mm or more, an effective screw fastening area including the connection portions 2a, 3a of the positive terminal 2 and the negative terminal 3 can be secured.

[0033] The wider the laminate width W1, the greater the inductance reduction effect. Furthermore, the smaller the fastening point distance D2, the greater the inductance reduction effect. Here, when the laminate width W1 is widened, the fastening point distance D2 increases to ensure an effective screw fastening area, including the connection portions 2a and 3a of the positive and negative terminals 2 and 3. Therefore, the relationship between the laminate width W1 and the fastening point distance D2 becomes important. When the laminate width W1 is approximately 9 mm or more and 13 mm or less, an effective inductance reduction effect can be achieved by setting the fastening point distance D2 to approximately 21.5 mm or more and 25.5 mm or less. When the laminate width W1 is approximately 5 mm or more and 9 mm or less, an effective inductance reduction effect can be achieved by setting the fastening point distance D2 to approximately 17.5 mm or more and 21.5 mm or less. When the laminate width W1 is approximately 1 mm or more and 5 mm or less, an effective reduction in inductance can be achieved by setting the fastening point distance D2 to approximately 13.5 mm or more and 17.5 mm or less.

[0034] The fastening point distance D2 is the sum of the distance D3 between the center of gravity P1 of the connection portion 2a and the facing region A1, the distance D4 between the center of gravity P2 of the connection portion 3a and the facing region A1, and the laminate width W1 of the facing region A1 (D2 = D3 + D4 + W1). The distances D3 and D4 may be the same or different. The distances D3 and D4 are, for example, approximately 5 mm or more and 12 mm or less.

[0035] Distance D3 is the sum of distance d1 of the effective screw fastening area outside protrusion 1b and distance d2 of the inside of protrusion 1b (D3 = d1 + d2). Distance D4 is the sum of distance d3 of the effective screw fastening area outside protrusion 1b and distance d4 of the inside of protrusion 1b (D4 = d3 + d4). Distances d1 and d3 may be the same as each other or different from each other. Distances d1 and d3 are, for example, approximately 5 mm or more and 12 mm or less. Distances d2 and d4 may be the same as each other or different from each other. Distances d2 and d4 are, for example, approximately 0.1 mm or more and 2 mm or less.

[0036] As shown in Fig. 5, the negative electrode terminal 3 has an L-shape in plan view with the opposing portion 31 protruding toward the positive electrode terminal 2. Fig. 6 is a plan view in which the negative electrode terminal 3 in Fig. 5 is omitted and the positive electrode terminal 2 below the negative electrode terminal 3 is visible. As shown in Fig. 6, the positive electrode terminal 2 has an L-shape in plan view with the opposing portion 21 protruding toward the negative electrode terminal 3.

[0037] 7 shows a cross section parallel to the X-axis direction along line BB' passing through connection portion 2a of positive terminal 2 in FIG. 5. As shown in FIGS. 5 and 7, the semiconductor device according to the first embodiment includes an insulating circuit board 5. The upper and side surfaces of the insulating circuit board 5 are sealed in a main body portion 1a of a sealing resin 1, and the lower surface of the insulating circuit board 5 is exposed from the main body portion 1a of the sealing resin 1. The semiconductor chip 10 shown in FIG. 1 is provided on the upper surface side of the insulating circuit board 5.

[0038] The insulating circuit board 5 may be, for example, a direct copper bonding (DCB) board or an active matrix soldering (AMD) board. The insulating circuit board 5 includes an insulating plate 51, conductive plates 52a and 52b provided on the upper surface of the insulating plate 51, and a conductive plate 53 provided on the lower surface of the insulating plate 51. The insulating plate 51 is formed of, for example, a resin insulating layer using a polymer material or a ceramic plate mainly made of aluminum oxide (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), boron nitride (BN), or the like. The conductive plates 52a, 52b, and 53 are formed of, for example, a conductive material such as copper (Cu), a Cu alloy, aluminum (Al), or an Al alloy.

[0039] 5 and 7, the positive electrode terminal 2 is flat from the outside to the inside of the main body 1a of the sealing resin 1, and the inside end of the positive electrode terminal 2 is joined to the conductive plate 52a. The cross-sectional shape of the positive electrode terminal 2 shown in FIG. 7 is not particularly limited. For example, the inside end of the positive electrode terminal 2 may be bent with a bent portion such as an L-shape and joined to the conductive plate 52a.

[0040] FIG. 8 shows a cross section parallel to the X-axis direction along line CC′ passing through the connection portion 3a of the negative electrode terminal 3 in FIG. 5. As shown in FIGS. 5 and 8, the inner end of the negative electrode terminal 3 is bent at an L-shaped bend and joined to a conductive plate 52b. The cross-sectional shape of the negative electrode terminal 3 shown in FIG. 8 is not particularly limited. For example, as shown in FIG. 9, the negative electrode terminal 3 may be flat from the outside to the inside of the main body 1a of the sealing resin 1, and the inner end of the negative electrode terminal 3 may be joined to the conductive plate 52b via a conductor 3b such as a copper block.

[0041] FIG. 10 shows an equivalent circuit of the semiconductor device according to the first embodiment. As shown in FIG. 10, the semiconductor device according to the first embodiment constitutes part of a three-phase bridge circuit. The drain electrode of the upper arm transistor T1 is connected to the positive terminal P, and the source electrode of the lower arm transistor T2 is connected to the negative terminal N. The source electrode of the transistor T1 and the drain electrode of the transistor T2 are connected to the output terminal U and the auxiliary source terminal S1, respectively. The auxiliary source terminal S2 is connected to the source electrode of the transistor T2. The gate electrodes of the transistors T1 and T2 are connected to the gate control terminals G1 and G2. The transistors T1 and T2 have built-in body diodes D11 and D12 connected in anti-parallel and serving as freewheeling diodes (FWD).

[0042] The positive terminal P, the negative terminal N, and the output terminal U shown in Fig. 10 correspond to the positive terminal 2, the negative terminal 3, and the output terminal 4 shown in Figs. 1 to 9. The transistors T1 and T2 and the body diodes D11 and D12 shown in Fig. 10 correspond to the semiconductor chip 10 shown in Fig. 1. The configurations corresponding to the gate control terminals G1 and G2 and the auxiliary source terminals S1 and S2 shown in Fig. 10 are not shown in Figs. 1 to 9.

[0043] <Method of manufacturing a semiconductor device> Next, an example of a manufacturing method (assembly method) of the semiconductor device according to the first embodiment will be described. The semiconductor chip 10, output terminal 4, positive terminal 2, and negative terminal 3 are bonded to the upper surface of the insulating circuit board 5 using a bonding material such as solder or a sintered material. The insulating circuit board 5, semiconductor chip 10, output terminal 4, positive terminal 2, and negative terminal 3 are electrically connected using a bonding wire (not shown), a lead frame (not shown), a printed circuit board (not shown), or the like. The insulating circuit board 5 and semiconductor chip 10 are then sealed with sealing resin 1 by transfer molding, and the positive terminal 2, negative terminal 3, and portions of the output terminal 4 are also sealed with sealing resin 1. This completes the semiconductor device according to the first embodiment.

[0044] <First Comparative Example> Next, a semiconductor device according to a first comparative example will be described. Fig. 11 is a cross-sectional view of the semiconductor device according to the first comparative example, and corresponds to the cross-sectional view of the semiconductor device according to the first embodiment in Fig. 3. Fig. 12 is a plan view of the semiconductor device according to the first comparative example, and corresponds to the plan view of the semiconductor device according to the first embodiment in Fig. 5. As shown in Figs. 11 and 12, the semiconductor device according to the first comparative example differs from the semiconductor device according to the first embodiment in that the positive electrode terminal 2 and the negative electrode terminal 3 are spaced apart from each other in the Y-axis direction.

[0045] Next-generation structures require not only smaller size / lower height and lower inductance, but also a structure that allows terminal connections to be made by either screw fastening or laser welding. The semiconductor device according to the first comparative example allows for a lower height, but the positive terminal 2 and the negative terminal 3 do not have opposing portions, resulting in higher inductance. In contrast, the semiconductor device according to the first embodiment has an opposing region A1 where the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other, as shown in FIGS. 3 and 5 , thereby enabling a lower height and reducing inductance.

[0046] <Second Comparative Example> Next, a semiconductor device according to a second comparative example will be described. Fig. 13 is a plan view of the semiconductor device according to the second comparative example, which corresponds to the plan view of the semiconductor device according to the first embodiment in Fig. 5. As shown in Fig. 13, the semiconductor device according to the second comparative example differs from the semiconductor device according to the first embodiment in that the positive electrode terminal 2 and the negative electrode terminal 3 are arranged in close proximity to each other (laminated arrangement), and the end of the positive electrode terminal 2 is arranged to protrude outward beyond the end of the negative electrode terminal 3 in the X-axis direction.

[0047] In the semiconductor device according to the second comparative example, the positive terminal 2 and the negative terminal 3 face each other, enabling low inductance. However, the positive terminal 2 and the negative terminal 3 cannot be fastened to external components with screws and must be connected by laser welding. Laser welding increases the module size to ensure the effective area and terminal thickness, and strict tolerance control is required to prevent terminal penetration, reducing productivity. In contrast, in the semiconductor device according to the first embodiment, as shown in FIGS. 3 and 5 , the facing region A1 between the facing portion 21 of the positive terminal 2 and the facing portion 31 of the negative terminal 3 is located between the connection portions 2a and 3a. This allows low inductance while enabling screw fastening to the positive terminal 2 and the negative terminal 3. This allows the connection between the positive terminal 2 and the negative terminal 3 to be connected by either screw fastening or laser welding.

[0048] <Example> 14 shows simulation results of inductance (unit: nH) for an example and a comparative example of the semiconductor device according to the first embodiment, where the laminate width and fastening point distance are changed while the other conditions are kept the same. In addition to the inductance value, Fig. 14 also shows a schematic representation of the positional relationship between the positive terminal 2 and the negative terminal 3 depending on the laminate width and fastening point distance.

[0049] The two comparative examples in FIG. 14 correspond to the configuration of the semiconductor device according to the first comparative example shown in FIGS. 11 and 12, in which the positive terminal 2 and the negative terminal 3 are spaced apart. Negative values for the laminate width indicate the distance between the positive terminal 2 and the negative terminal 3. As a comparative example, when the laminate width is −3 mm and the fastening point distance is 17.5 mm, the inductance is 11.64 nH. Also, when the laminate width is −1 mm and the fastening point distance is 17.5 mm, the inductance is 10.15 nH.

[0050] On the other hand, in the working example, when the laminate width is 1 mm and the fastening point distance is 13.5 mm, the inductance is 7.45 nH. When the laminate width is 1 mm and the fastening point distance is 17.5 mm, the inductance is 7.97 nH. When the laminate width is 5 mm and the fastening point distance is 17.5 mm, the inductance is 7.05 nH. When the laminate width is 9 mm and the fastening point distance is 21.5 mm, the inductance is 7.60 nH. When the laminate width is 13 mm and the fastening point distance is 25.5 mm, the inductance is 8.41 nH. As such, in all working examples, the inductance was reduced compared to the comparative example.

[0051] Fig. 15 shows the simulation results of inductance (unit: nH) when the distance D1 between the facing portion 21 of the positive terminal 2 and the facing portion 31 of the negative terminal 3 (PN distance) is changed to 0.2 mm, 0.5 mm, 1.0 mm, 2.0 mm, and 4.0 mm for one of the examples in Fig. 14, where the laminate width is 5 mm and the fastening point distance is 17.5 mm. Fig. 15 shows that the smaller the PN distance, the more the inductance is reduced.

[0052] As described above, according to the semiconductor device of the first embodiment, there is an opposing area A1 between the connection portion 2a of the positive terminal 2 and the connection portion 3a of the negative terminal 3, where the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other, thereby making it possible to screw-fasten the positive terminal 2 and the negative terminal 3 to an external member while achieving low inductance.

[0053] (Second embodiment) 16 is a perspective view of a semiconductor device according to a second embodiment, which corresponds to the perspective view of the semiconductor device according to the first embodiment in FIG. 2. FIG. 17 is a cross-sectional view of the semiconductor device according to the second embodiment, which corresponds to the cross-sectional view of the semiconductor device according to the first embodiment in FIG. 3. As shown in FIGS. 16 and 17, the semiconductor device according to the second embodiment differs from the semiconductor device according to the first embodiment in that the positive electrode terminal 2 and the negative electrode terminal 3 are bent in the Z-axis direction at positions close to each other, and have an opposing region A2 where the opposing portion 21 of the positive electrode terminal 2 and the opposing portion 31 of the negative electrode terminal 3 face each other in the Y-axis direction.

[0054] 16 and 17, the facing portion 21 of the positive terminal 2 and the facing portion 31 of the negative terminal 3 are bent in the same direction in the negative direction of the Z axis. The distance D5 in the X axis direction between the facing portion 21 of the positive terminal 2 and the facing portion 31 of the negative terminal 3 shown in Fig. 17 is set to be the same as the distance D1 in the Y axis direction between the facing portion 21 of the positive terminal 2 and the facing portion 31 of the negative terminal 3 of the semiconductor device according to the first embodiment. The laminate width W5 in the Z axis direction of the facing region A2 where the facing portion 21 of the positive terminal 2 and the facing portion 31 of the negative terminal 3 face each other is set to be the same as the laminate width W1 in the Y axis direction of the facing region A1 of the semiconductor device according to the first embodiment.

[0055] 16 shows only the main body 1a of the sealing resin 1, and does not show the protruding portion 1b protruding from the main body 1a. As shown in Fig. 17, the protruding portion 1b of the sealing resin 1 is provided so as to cover the opposing portion 21 of the positive electrode terminal 2 and the opposing portion 31 of the negative electrode terminal 3. The other configuration of the semiconductor device according to the second embodiment is substantially the same as that of the semiconductor device according to the first embodiment, and therefore, redundant explanations will be omitted.

[0056] According to the semiconductor device of the second embodiment, there is an opposing area A2 between the connection portion 2a of the positive terminal 2 and the connection portion 3a of the negative terminal 3, where the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other, thereby making it possible to screw-fasten the positive terminal 2 and the negative terminal 3 to an external member while achieving low inductance.

[0057] Furthermore, according to the semiconductor device of the second embodiment, there is an opposing region A2 in which the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other in the Y-axis direction. Therefore, even if the laminate width W5 in the Z-axis direction is increased, the fastening point distance D6 in the Y-axis direction does not need to be increased, and therefore inductance can be further reduced.

[0058] (Third embodiment) FIG. 18 is a cross-sectional view of a semiconductor device according to a third embodiment, corresponding to the cross-sectional view of the semiconductor device according to the first embodiment in FIG. 3. As shown in FIG. 18, the semiconductor device according to the third embodiment is similar to the semiconductor device according to the second embodiment in that the positive terminal 2 and the negative terminal 3 are bent in the Z-axis direction at positions close to each other, and have an opposing region A2 where the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other in the Y-axis direction. However, the semiconductor device according to the third embodiment differs from the semiconductor device according to the second embodiment in that the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 are bent in the same direction in the positive direction of the Z-axis. Other configurations of the semiconductor device according to the third embodiment are substantially similar to those of the semiconductor device according to the second embodiment, and therefore, redundant description will be omitted.

[0059] According to the semiconductor device of the third embodiment, there is an opposing area A2 between the connection portion 2a of the positive terminal 2 and the connection portion 3a of the negative terminal 3, where the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other, thereby making it possible to screw-fasten the positive terminal 2 and the negative terminal 3 to an external member while achieving low inductance.

[0060] Furthermore, according to the semiconductor device of the third embodiment, there is an opposing region A2 in which the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other in the Y-axis direction. Therefore, even if the laminate width W5 in the Z-axis direction is increased, the fastening point distance D6 in the Y-axis direction does not need to be increased, and therefore inductance can be further reduced.

[0061] (Fourth embodiment) FIG. 19 is a cross-sectional view of a semiconductor device according to a fourth embodiment, corresponding to the cross-sectional view of the semiconductor device according to the first embodiment in FIG. 3. As shown in FIG. 19, the semiconductor device according to the fourth embodiment is similar to the semiconductor device according to the second embodiment in that the positive terminal 2 and the negative terminal 3 are bent in the Z-axis direction at positions close to each other, and have an opposing region A2 where the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other in the Y-axis direction. However, the semiconductor device according to the fourth embodiment differs from the semiconductor device according to the second embodiment in that the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 are bent in opposite directions in the positive and negative directions of the Z-axis. Other configurations of the semiconductor device according to the fourth embodiment are substantially similar to those of the semiconductor device according to the second embodiment, and therefore, redundant description will be omitted.

[0062] According to the semiconductor device of the fourth embodiment, there is an opposing area A2 between the connection portion 2a of the positive terminal 2 and the connection portion 3a of the negative terminal 3, where the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other, thereby making it possible to screw-fasten the positive terminal 2 and the negative terminal 3 to an external member while achieving low inductance.

[0063] Furthermore, according to the semiconductor device of the fourth embodiment, there is an opposing region A2 in which the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other in the Y-axis direction. Therefore, even if the laminate width W5 in the Z-axis direction is increased, the fastening point distance D6 in the Y-axis direction does not need to be increased, and therefore inductance can be further reduced.

[0064] (Fifth embodiment) FIG. 20 is a cross-sectional view of a semiconductor device according to a fifth embodiment, corresponding to the cross-sectional view of the semiconductor device according to the first embodiment in FIG. 3. As shown in FIG. 20, the semiconductor device according to the fifth embodiment is similar to the semiconductor device according to the second embodiment in that the positive terminal 2 and the negative terminal 3 are bent in the Z-axis direction at positions close to each other, and have an opposing region A2 where the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other in the Y-axis direction. However, the semiconductor device according to the fifth embodiment differs from the semiconductor device according to the second embodiment in that the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 are bent in opposite directions, in the negative and positive directions of the Z-axis. Other configurations of the semiconductor device according to the fifth embodiment are substantially similar to those of the semiconductor device according to the second embodiment, and therefore, redundant description will be omitted.

[0065] According to the semiconductor device of the fifth embodiment, there is an opposing area A2 between the connection portion 2a of the positive terminal 2 and the connection portion 3a of the negative terminal 3, where the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other, thereby making it possible to screw-fasten the positive terminal 2 and the negative terminal 3 to an external member while achieving low inductance.

[0066] Furthermore, according to the semiconductor device of the fifth embodiment, there is an opposing region A2 in which the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other in the Y-axis direction. Therefore, even if the laminate width W5 in the Z-axis direction is increased, the fastening point distance D6 in the Y-axis direction does not need to be increased, and therefore inductance can be further reduced.

[0067] (Sixth embodiment) 21 is a cross-sectional view of a semiconductor device according to a sixth embodiment, which corresponds to the cross-sectional view of the semiconductor device according to the first embodiment in FIG. 3. As shown in FIG. 21, the semiconductor device according to the sixth embodiment differs from the semiconductor device according to the first embodiment in that the positive terminal 2 and the negative terminal 3 each have an inverted N-shaped cross section. Other configurations of the semiconductor device according to the sixth embodiment are substantially the same as those of the semiconductor device according to the first embodiment, and therefore redundant explanations will be omitted.

[0068] According to the semiconductor device of the sixth embodiment, there is an opposing area A1 between the connection portion 2a of the positive terminal 2 and the connection portion 3a of the negative terminal 3, where the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other, thereby making it possible to screw the positive terminal 2 and the negative terminal 3 to an external member while achieving low inductance.

[0069] Seventh embodiment FIG. 22 is a cross-sectional view of a semiconductor device according to a seventh embodiment, and corresponds to the cross-sectional view of the semiconductor device according to the first embodiment in FIG. 3. As shown in FIG. 22, the semiconductor device according to the seventh embodiment is similar to the semiconductor device according to the sixth embodiment in that the positive terminal 2 and the negative terminal 3 have an inverted N-shaped cross section. However, the semiconductor device according to the seventh embodiment differs from the semiconductor device according to the sixth embodiment in that the positions of the connection portions 2a, 3a of the positive terminal 2 and the negative terminal 3 in the Z-axis direction are the same. Other configurations of the semiconductor device according to the seventh embodiment are substantially similar to those of the semiconductor device according to the sixth embodiment, and therefore, redundant explanations will be omitted.

[0070] According to the semiconductor device of the seventh embodiment, there is an opposing area A1 between the connection portion 2a of the positive terminal 2 and the connection portion 3a of the negative terminal 3, where the opposing portion 21 of the positive terminal 2 and the opposing portion 31 of the negative terminal 3 face each other, thereby making it possible to screw the positive terminal 2 and the negative terminal 3 to an external member while achieving low inductance.

[0071] Furthermore, according to the semiconductor device of the seventh embodiment, the cross-sectional shapes of the positive electrode terminal 2 and the negative electrode terminal 3 are identical to each other, and the positions in the Z-axis direction of the portions where the connection portions 2a, 3a of the positive electrode terminal 2 and the negative electrode terminal 3 are provided are the same, making it easy to standardize the components of the positive electrode terminal 2 and the negative electrode terminal 3.

[0072] (Other embodiments) As described above, the present disclosure has been described with reference to the first to seventh embodiments, but the descriptions and drawings that form part of this disclosure should not be understood as limiting the present disclosure. Various alternative embodiments, examples, and application techniques will become apparent to those skilled in the art from this disclosure.

[0073] For example, in the first embodiment, the positive electrode terminal 2 is provided on the lower side and the negative electrode terminal 3 is provided on the upper side in the Z-axis direction, but the positive electrode terminal 2 may be provided on the upper side and the negative electrode terminal 3 may be provided on the lower side in the Z-axis direction. Furthermore, in the sixth and seventh embodiments, the positive electrode terminal 2 and the negative electrode terminal 3 have an inverted N-shaped cross section, but the positive electrode terminal 2 and the negative electrode terminal 3 may also have an N-shaped cross section. Furthermore, in the first to seventh embodiments, the positive electrode terminal 2 and the negative electrode terminal 3 may be arranged inversely to each other.

[0074] Furthermore, the configurations disclosed in the first to seventh embodiments can be appropriately combined within a range that does not cause contradictions. As such, the present disclosure naturally includes various embodiments not described here. Therefore, the technical scope of the present disclosure is defined only by the invention-specifying matters according to the scope of the claims that are appropriate from the above description. [Explanation of symbols]

[0075] 1...Sealing resin 1a...Main body 1b...Protruding part 2...Positive terminal 2a...Connection 3...Negative terminal 3a...Connection 3b…Conductor 4...Output terminal 5...Insulated circuit board 5a, 5b...busbar 6a, 6b...washers 7a, 7b...Screws 10...Semiconductor chip 21, 31...opposing parts 51...insulating plate 52a, 52b, 53...Conductive plate A1,A2…Opposing area D1~D6…Distance D11, D12...Body diodes G1, G2...Gate control terminals L1...Laminate length N...Negative terminal P...Positive terminal P1,P2…center of gravity S1, S2: Auxiliary source terminals T1, T2...Transistors U: Output terminal W1~W5...Width d1~d4...distance d11~d13…Creepage distance

Claims

1. A semiconductor chip; a sealing resin for sealing the semiconductor chip; a first terminal protruding from the sealing resin and extending in a first direction, the first terminal having a first connection portion outside the sealing resin; a second terminal protruding from the sealing resin and extending in the first direction, the second terminal having a second connection portion outside the sealing resin; Equipped with the first terminal and the second terminal each have a rectangular opposing portion that is spaced apart and opposed to each other between the first connection portion and the second connection portion, The semiconductor device has a width of the facing portion in a second direction perpendicular to the first direction of 1 mm or more and 13 mm or less.

2. The width of the facing portion in the second direction is 9 mm or less. The semiconductor device according to claim 1 .

3. The distance between the opposing portions of the first terminal and the second terminal is 4 mm or less.

3. The semiconductor device according to claim 1.

4. The distance between the first connection portion and the second connection portion is 25.5 mm or less.

3. The semiconductor device according to claim 1.

5. the second direction is parallel to the main surfaces of the first terminal and the second terminal, the first terminal and the second terminal are shifted from each other in a third direction perpendicular to the first direction and the second direction, The facing portions of the first terminal and the second terminal face each other in a third direction perpendicular to the first direction and the second direction.

3. The semiconductor device according to claim 1.

6. the second direction is perpendicular to the main surfaces of the first terminal and the second terminal, The facing portions of the first terminal and the second terminal are bent in the second direction at positions where the first terminal and the second terminal are close to each other, and face each other in a third direction perpendicular to the first direction and the second direction.

3. The semiconductor device according to claim 1.

7. The facing portions of the first terminal and the second terminal are bent in the same direction. The semiconductor device according to claim 6.

8. The facing portions of the first terminal and the second terminal are bent in opposite directions to each other. The semiconductor device according to claim 6.

9. The sealing resin has protrusions that cover the facing portions of the first terminals and the second terminals.

3. The semiconductor device according to claim 1.

10. The protruding portion extends further outward from the sealing resin than the first terminal and the second terminal in the first direction. The semiconductor device according to claim 9 .

Images