Semiconductor device and manufacturing method thereof

Abstract

To provide a semiconductor device that has high breakdown resistance against reverse voltage and is less likely to break down even when a plurality of diodes are connected in series by equalizing the voltage share of each diode.SOLUTION: The present invention is a semiconductor device in which a plurality of positive bevel mesa diodes 111, 112, ...n are connected in series, and when comparing the breakdown voltages of the plurality of positive bevel mesa diodes 111, 112, ...n, the difference between the minimum and maximum breakdown voltages is 20% or less.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device and a manufacturing method thereof. [Background technology]

[0002] Inverter microwave ovens use high-voltage diodes. The voltage applied to these diodes is approximately 4 kV during steady-state operation, and approximately 6 kV from power-on until the magnetron starts oscillating normally. If the avalanche voltage of the high-voltage diode is lower than the applied voltage, the reverse loss of the high-voltage diode will be enormous. Therefore, an avalanche voltage greater than the applied voltage at power-on is required. Furthermore, surge overvoltages of 20 kV or more can be applied when the magnetron discharges due to abnormal operation, which can occur when powering on or when transitioning to steady-state operation. Therefore, there is a demand for a semiconductor device that has a high breakdown resistance against reverse voltage and can make breakdown less likely by equalizing the voltage distribution of each diode even when a plurality of diodes are connected in series.

[0003] The semiconductor device described above is, for example, a stacked high-voltage diode in which multiple diodes are connected in series. This diode is manufactured, for example, as follows: A plurality of semiconductor wafers each having multiple semiconductor layers are created. Next, these multiple wafers are brazed together and cut into stacked chips using a wire saw or multi-blade. Lead wires are brazed to both ends of the stacked chip. Damaged layers on the silicon cut surfaces are removed with an alkaline solution so as not to affect the lead wires. A protective film such as JCR (junction coating resin) is applied to the side of the chip, and the entire chip, including the lead wires, is covered with resin or glass to complete the product (see, for example, Patent Document 1).

[0004] In the above-mentioned manufacturing method of stacked high-voltage diodes, multiple diodes are connected in series, but because the characteristics of each chip are not known at the stacking stage, there may be variations in the characteristics of each chip in the stacked high-voltage diode. In such cases, because the chips are connected in series, high voltage is applied only to specific chips, making the element more susceptible to destruction.

[0005] Therefore, there is a demand for a high-voltage diode that makes it difficult for a particular diode to be destroyed by equalizing the voltage share of each diode when multiple diodes are connected in series. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Publication No. 63-304655 Summary of the Invention [Problem to be solved by the invention]

[0007] Various aspects of the present invention aim to provide a semiconductor device and a method for manufacturing the same that have high breakdown resistance against reverse voltage and are less likely to break down even when multiple diodes are connected in series by equalizing the voltage load of each diode. [Means for solving the problem]

[0008] Various aspects of the present invention are described below.

[0009] [1] A semiconductor device in which a plurality of positive bevel mesa diodes are connected in series, A semiconductor device characterized in that, when the breakdown voltages of the plurality of positive bevel mesa diodes are compared, the difference between the minimum and maximum breakdown voltages is 20% or less. It is preferable that the number of the plurality of positive bevel mesa diodes is two or more. In addition, in this specification, "the difference between the minimum and maximum breakdown voltages is 20% or less" means that the difference between the maximum and minimum breakdown voltages among multiple diodes is 20% or less of the maximum breakdown voltage, and means the following formula 1. {(Highest pressure resistance) - (Lowest low pressure)} / (Highest pressure resistance) x 100 ≦ 20 Formula 1

[0010] According to the semiconductor device of [1] above, which is an aspect of the present invention, since the semiconductor device is a semiconductor device in which multiple positive-bevel mesa diodes are connected in series, it is possible to increase the breakdown resistance against reverse voltage. Furthermore, when comparing the breakdown voltages of the multiple positive-bevel mesa diodes, the difference between the lowest and highest breakdown voltages is 20% or less, so the performance of the multiple mesa diodes connected in series is similar. When diodes with different breakdown voltages are connected in series, the diode with the lower breakdown voltage will break down (avalanche) at a low voltage, weakening the breakdown resistance of the series-connected semiconductor device. Conversely, if the difference in breakdown voltage between each diode is small, the voltage distribution of each diode can be equalized, thereby making the semiconductor device less susceptible to breakdown.

[0011] [2] In [1] above, each of the plurality of positive bevel mesa diodes is formed by stacking a P-type semiconductor layer, a first N-type semiconductor layer, and a second N-type semiconductor layer having an impurity concentration higher than that of the first N-type semiconductor layer in this order; A semiconductor device characterized in that an included angle (bevel angle) between an imaginary vertical line drawn at the intersection of a PN junction surface between the P-type semiconductor layer and the first N-type semiconductor layer and a side surface of the first N-type semiconductor layer and the side surface of the first N-type semiconductor layer is 0 degrees or more and 45 degrees or less.

[0012] According to the semiconductor device [2] of one aspect of the present invention, in the multiple positive bevel mesa diodes, the included angle (bevel angle) between the side surface of the first N-type semiconductor layer and an imaginary vertical line drawn at the intersection of the PN junction surface between the P-type semiconductor layer and the first N-type semiconductor layer and the side surface of the first N-type semiconductor layer is between 0 degrees and 45 degrees, resulting in a positive bevel angle, which can sufficiently increase the breakdown resistance against reverse voltage.

[0013] [3] In [1] or [2] above, a protective layer disposed on side walls surrounding the P-type semiconductor layer, the first N-type semiconductor layer, and the second N-type semiconductor layer in a plan view; The protective layer is not disposed on the lower side surface of the P-type semiconductor layer, the protective layer is disposed on an upper side surface of the P-type semiconductor layer, 10. A semiconductor device, comprising: a protection layer disposed on a side surface of the first N-type semiconductor layer and a side surface of the second N-type semiconductor layer.

[0014] According to the semiconductor device of [3] above according to one aspect of the present invention, protective layers are arranged on the side surfaces of the first N-type semiconductor layer, the side surfaces of the second N-type semiconductor layer, and the upper side surfaces of the P-type semiconductor layer of the plurality of diodes in the wafer state in an extremely clean environment. In this way, diodes in which the end portions of the PN junction surfaces between the P-type semiconductor layer and the first N-type semiconductor layer are protected by protective layers are stacked in advance in a highly clean environment, making it possible to provide a highly reliable semiconductor device.

[0015] [4] In [1] or [2] above, The semiconductor device is characterized in that each of the plurality of positive bevel mesa diodes is connected by solder.

[0016] [5] In [1] or [2] above, The semiconductor device is characterized in that the protective layer is a glass layer or a polyimide layer.

[0017] [6] Step (a) of preparing a semiconductor substrate (semiconductor wafer) in which a P-type semiconductor layer, a first N-type semiconductor layer, and a second N-type semiconductor layer having an impurity concentration higher than that of the first N-type semiconductor layer are stacked in this order; a step (b) of forming a groove in the semiconductor substrate by cutting the semiconductor substrate with a first dicing blade, the groove having a depth from the second N-type semiconductor layer side to partway through the P-type semiconductor layer; (c) disposing a protective layer on the inner wall of the groove; (d) dividing the semiconductor substrate into a plurality of positive bevel mesa diode chips by separating the protective layer and the P-type semiconductor layer along the center of the bottom of the groove; a step (e) of measuring the breakdown voltage of the plurality of positive bevel mesa diodes obtained in the step (d); a step (f) of selecting a plurality of mesa diodes having a difference between the minimum and maximum breakdown voltages of the mesa diodes measured in the step (e) of 20% or less; a step (g) of serially connecting the plurality of positive bevel mesa diodes selected in the step (f); 1. A method for manufacturing a semiconductor device, comprising:

[0018] According to one aspect of the present invention, the method for manufacturing a semiconductor device described in [6] above includes the steps of: (d) dividing the semiconductor substrate into multiple positive-bevel mesa diode chips by separating the protective layer and the P-type semiconductor layer along the center of the bottom of the groove; (e) measuring the breakdown voltage of the multiple positive-bevel mesa diodes obtained in step (d); and (g) selecting multiple mesa diodes whose breakdown voltages measured in step (e) have a difference between the lowest and highest breakdown voltages of 20% or less. Therefore, even when multiple positive-bevel mesa diodes are connected in series, their breakdown resistance against reverse voltage can be enhanced. Furthermore, when comparing the breakdown voltages of multiple positive-bevel mesa diodes, the difference between the lowest and highest breakdown voltages is 20% or less, so the performance of the multiple mesa diodes connected in series is similar. When diodes with different breakdown voltages are connected in series, the diode with the lower breakdown voltage will break down (avalanche) at a lower voltage, weakening the breakdown resistance of the series-connected semiconductor device. Conversely, if the difference in breakdown voltage between the diodes is small, the voltage distribution between the diodes can be made uniform, thereby making the semiconductor device less susceptible to breakdown.

[0019] [7] In paragraph [6] above, a bevel angle formed between a virtual vertical line drawn at an intersection of a PN junction surface between the P-type semiconductor layer and the first N-type semiconductor layer and a side surface of the first N-type semiconductor layer and the side surface of the first N-type semiconductor layer after the step (b) is 0 degrees or more and 45 degrees or less.

[0020] According to the method for manufacturing a semiconductor device [7] above, which relates to one aspect of the present invention, the bevel angle between the imaginary vertical line and the side surface of the first N-type semiconductor layer is between 0 degrees and 45 degrees, resulting in a positive bevel angle, and the breakdown resistance against reverse voltage can be sufficiently strengthened.

[0021] [8] In paragraph [7] above, a semiconductor device manufacturing method, characterized in that the protective layer in the plurality of positive bevel mesa diodes obtained in the step (c) is disposed on the peripheral sidewalls of the P-type semiconductor layer, the first N-type semiconductor layer, and the second N-type semiconductor layer in the state of the semiconductor substrate (semiconductor wafer).

[0022] [9] In any one of paragraphs [6] to [8] above: The method for manufacturing a semiconductor device is characterized in that in the step (g), the plurality of positive bevel mesa diodes are connected in series by soldering. [Effects of the Invention]

[0023] According to various aspects of the present invention, it is possible to provide a semiconductor device and a method for manufacturing the same, which has a high breakdown resistance against reverse voltage and is less likely to break down even when multiple diodes are connected in series by equalizing the voltage distribution of each diode. [Brief explanation of the drawings]

[0024] [Figure 1] FIG. 1 is a schematic cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 2] FIG. 1 is a cross-sectional view showing the bevel angle and the maximum electric field strength on the silicon surface. [Figure 3] 2 is a cross-sectional view showing a structure of a part of the semiconductor device shown in FIG. [Figure 4] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. [Figure 5] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one aspect of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0025] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be readily understood by those skilled in the art that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments shown below.

[0026] (First embodiment) Fig. 1 is a schematic cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. Fig. 2 is a cross-sectional view showing the bevel angle and the maximum electric field strength. Fig. 3 is a cross-sectional view showing the structure of a part of the mesa diode of the semiconductor device shown in Fig. 1. Note that Fig. 2 is taken from Control of electric field at the surface of PN junctions Fig. 15.

[0027] As shown in FIG. 1, the semiconductor device according to [1] of one embodiment of the present invention is a semiconductor device in which a plurality of positive-bevel mesa diodes 111, 112, ... n are connected in series. The reason for using positive-bevel mesa diodes is that, as shown in FIG. 2, the electric field strength on the silicon surface can be reduced, thereby increasing the breakdown resistance against reverse voltage. Furthermore, when comparing the breakdown voltages of the plurality of positive-bevel mesa diodes 111, 112, ... n, the difference between the minimum and maximum breakdown voltages is 20% or less. Here, "the difference between the minimum and maximum breakdown voltages is 20% or less" means that the minimum breakdown voltage value is subtracted from the maximum breakdown voltage value among the plurality of diodes, and the difference is 20% or less of the maximum breakdown voltage value, as expressed by the following formula 1: {(Highest pressure resistance) - (Lowest low pressure)} / (Highest pressure resistance) x 100 ≦ 20 Formula 1

[0028] As mentioned above, the reason why the difference between the minimum and maximum breakdown voltages is set to 20% or less is that when diodes with different breakdown voltages are connected in series, if the difference between the minimum and maximum breakdown voltages is greater than 20%, the breakdown resistance of the series-connected semiconductor devices will be weakened.

[0029] Although FIG. 1 shows a semiconductor device in which three or more positive bevel mesa diodes are stacked, the semiconductor device may also be a semiconductor device in which two or more positive bevel mesa diodes are stacked.

[0030] Each of the plurality of positive bevel mesa diodes 111, 112, . . . n has a P-type semiconductor layer (P + ) 11 and a first N-type semiconductor layer (N - ) 12 and a first N-type semiconductor layer (N - ) 12, a second N-type semiconductor layer (N + ) 13 are laminated in this order. The bevel angle 30 of each of these mesa diodes 111, 112, ... n is preferably 0 degrees or more and 45 degrees or less (see FIG. 2). This bevel angle 30 is set so that the P-type semiconductor layer (P + ) 11 and the first N-type semiconductor layer (N - ) 12 and the PN junction surface 11b of the first N-type semiconductor layer (N - A virtual vertical line X drawn at the intersection 30a of the side surface 12a of the first N-type semiconductor layer (N - ) 12 and the side 12a of the

[0031] As shown in FIG. 3, the P-type semiconductor layer (P + ) 11, the first N-type semiconductor layer (N - ) 12 and the second N-type semiconductor layer (N + A protective layer 17b is disposed on the sidewall surrounding the P-type semiconductor layer (P + The protective layer 17b is not disposed on the lower side surface 11a of the P-type semiconductor layer (P + A protective layer 17b is disposed on the upper side surface 11c of the first N-type semiconductor layer (N - ) 12 and the side surface 12a of the second N-type semiconductor layer (N +A protective layer 17b is disposed on a side surface 13a of the substrate 13. The protective layer 17b is a glass layer or a polyimide layer.

[0032] Each of the plurality of positive bevel mesa diodes 111, 112, . . . n is connected by solder 50 (see FIG. 1).

[0033] According to this embodiment, the semiconductor device has multiple positive-bevel mesa diodes 111, 112, ... n connected in series, which increases the breakdown resistance against reverse voltage. Furthermore, when comparing the breakdown voltages of the multiple positive-bevel mesa diodes 111, 112, ... n, the difference between the lowest and highest breakdown voltages is 20% or less, meaning that the performance of the multiple mesa diodes connected in series is similar. When diodes with different breakdown voltages are connected in series, the diode with the lower breakdown voltage breaks down (avalanches) at a low voltage, weakening the breakdown resistance of the series-connected semiconductor device. Conversely, if the difference in breakdown voltage between the individual diodes is small, the voltage distribution of each diode can be equalized, resulting in a semiconductor device that is less susceptible to breakdown.

[0034] Furthermore, according to this embodiment, in the plurality of positive bevel mesa diodes 111, 112, . . . n, a P-type semiconductor layer (P + ) 11 and the first N-type semiconductor layer (N - ) 12 and the PN junction surface 11b of the first N-type semiconductor layer (N - A virtual vertical line X drawn at the intersection 30a of the side surface 12a of the first N-type semiconductor layer (N - Since the bevel angle 30 between the side surface 12a of the groove 12 and the groove 12 is between 0 degrees and 45 degrees, the bevel angle is positive, and the breakdown resistance against the reverse voltage can be sufficiently increased.

[0035] (Second embodiment) 4 and 5 are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention.

[0036] The method for manufacturing a semiconductor device according to the above aspect of the present invention [6] may include the following steps (a) to (g). First, the P-type semiconductor layer (P + ) 11 and a first N-type semiconductor layer (N - ) 12 and a first N-type semiconductor layer (N - ) 12, a second N-type semiconductor layer (N + ) 13 are stacked in this order to prepare a semiconductor substrate 14 (step (a)). The semiconductor substrate 14 may be, for example, a Si wafer.

[0037] Next, a second N-type semiconductor layer (N + ) 13 side of the semiconductor substrate 14 from the surface of the P-type semiconductor layer (P + A groove 18 is formed by cutting the first dicing blade 34 to a depth that reaches halfway up the wafer 11 (step (b)). The first dicing blade 34 can dig narrow, deep grooves, which reduces the dead area of the groove. As shown in FIG. 4, the tip of the dicing blade 34 can be angled as desired, making it possible to create a positive bevel. Grooving with the first dicing blade 34 also reduces manufacturing variations, making it possible to manufacture chips that are closer to the design. Furthermore, the positive bevel reduces the surface electric field, enabling high breakdown voltages to be achieved with inexpensive wafers that have low resistance.

[0038] 4, the N-type semiconductor layer 13 is located on the N-type semiconductor layer 14 side. + Since the grooves are cut from the surface side by the first dicing blade 34, a positive bevel can be formed, and the surface electric field can be alleviated. + If the groove is cut with a dicing blade from the P-face side, which is the side of 11, a negative bevel is formed, and the effect of reducing the surface electric field cannot be obtained.

[0039] In addition, after the above step (b), the P-type semiconductor layer (P + ) 11 and the first N-type semiconductor layer (N - ) 12 and the PN junction surface 11b of the first N-type semiconductor layer (N -A virtual vertical line X drawn at the intersection 30a of the side surface 12a of the first N-type semiconductor layer (N - The groove angle (bevel angle) 30 between the groove 12 and the side surface 12a of the groove 12 is preferably 0 degrees or more and 45 degrees or less.

[0040] Furthermore, in this embodiment, the grooves 18 are formed by cutting the semiconductor substrate 14 with the first dicing blade 34, but it is believed that similar grooves can also be formed by laser processing or dry etching, and if similar grooves can be formed, similar effects can be obtained.

[0041] After forming the grooves 18, it is preferable to wet-etch the Si on the inner surface of the grooves 18. This makes it possible to remove damage caused by cutting with the first dicing blade 34, as well as damage caused by laser processing and dry etching.

[0042] 5, a protective layer 17b is then placed on the inner wall of the groove 18 (step (c)). The protective layer 17b can be a glass layer. Specifically, glass powder or a material containing glass powder, for example, a glass paste (not shown), which is a material in which glass powder is mixed with a vehicle, is applied to the inside of the groove 18. Note that, although glass paste is used in this embodiment, it is also possible to use a method of applying a resist-mixed glass in which glass powder is mixed with a resist liquid, or a method of applying only glass powder by electrophoretic deposition.

[0043] In addition, the second N-type semiconductor layer (N + If the glass layer as the protective layer 17b remains on the surface of the second N-type semiconductor layer (N) 13 in the portion that will become the electrode surface, a mask film (protective film) may be formed on the portion that will become the electrode surface before step (c), and then step (c) may be performed, after which the mask film (protective film) may be removed (not shown). + This prevents the glass layer as protective layer 17b from remaining on the surface of glass substrate 13 that will become the electrode surface.

[0044] Next, the glass powder or a material containing the glass powder is fired to form a glass layer as the protective layer 17b inside the groove 18. When using a material in which glass powder is mixed with a vehicle or resist, it is advisable to perform the glass firing after removing organic matter by burning or decomposing the material.

[0045] Next, a second N-type semiconductor layer (N + A first electrode 31 may be formed on the P-type semiconductor layer 13, and a second electrode 32 may be formed under the P-type semiconductor layer 11. The first electrode 31 may be a first Ni-plated layer, and the second electrode 32 may be a second Ni-plated layer.

[0046] Next, solder 50 is formed on each of the first electrodes 31, and solder 50 is formed under each of the second electrodes 32 (see FIG. 1). Note that the first electrodes 31 and second electrodes 32 are not shown in FIG. 1. In particular, the first and second solders 31, 32 may be formed by printing a solder paste onto the first and second electrodes 31, 32 on both sides of the semiconductor substrate 14 by screen printing.

[0047] Next, the protective layer 17b and the P-type semiconductor layer (P + ) 11 is separated to divide the semiconductor substrate 14 into chips of a plurality of positive bevel mesa diodes 111, 112, . . . n shown in FIG. 1 (step (d)). In detail, the semiconductor substrate 14 is half-cut with the second dicing blade 23 and then separated into chips by a breaking process, or a groove for dividing the chips may be formed with a laser from the P-type semiconductor layer 11 side of the semiconductor substrate 14 toward the center of the groove 18, and then the chips may be separated by a breaking process. Note that the second dicing blade 23 has a width narrower than that of the first dicing blade 34.

[0048] Furthermore, the protective layer 17b of the plurality of positive bevel mesa diodes 111, 112, . . . n obtained in the above step (c) is a P-type semiconductor layer (P + ) 11, the first N-type semiconductor layer (N- ) 12 and the second N-type semiconductor layer (N + )13 are arranged on the side walls around the

[0049] The breakdown voltage of the plurality of positive bevel mesa diodes 111, 112, . . . n obtained in the above step (d) is measured (step (e)).

[0050] Then, a plurality of mesa diodes are selected, each having a breakdown voltage value measured in the above step (e) such that the difference between the minimum and maximum breakdown voltages is 20% or less (step (f)).

[0051] Next, the plurality of positive bevel mesa diodes 111, 112, . . . n selected in the above step (f) are connected in series (step (g)).

[0052] In the above step (g), a plurality of positive bevel mesa diodes 111, 112, ... n may be connected in series with solder 50. This forms a stacked chip (semiconductor device) in which a plurality of chips are stacked. 1, the solder 50 on the first electrode 31 of each of the plurality of positive bevel mesa diodes 111, 112, ... n is joined to the solder 50 under the second electrode 32. This connects the plurality of positive bevel mesa diodes 111, 112, ... n in series. The solder 50 on the first electrode 31 of the topmost mesa diode 111 is connected to a first terminal 51, and the solder 50 under the second electrode 32 of the bottommost mesa diode n is connected to a second terminal 52.

[0053] According to this embodiment, the process includes the steps of: (d) dividing the semiconductor substrate into chips of multiple positive-bevel mesa diodes 111, 112, ... n by separating the protective layer 17b and the P-type semiconductor layer 11 along the center of the bottom of the groove 18; (e) measuring the breakdown voltages of the multiple positive-bevel mesa diodes 111, 112, ... n obtained in step (d); and (g) selecting multiple mesa diodes whose breakdown voltages measured in step (e) have a difference between the lowest and highest breakdown voltages of 20% or less. Therefore, even when multiple positive-bevel mesa diodes 111, 112, ... n are connected in series, the breakdown voltage against reverse voltage can be increased. Furthermore, when comparing the breakdown voltages of the multiple positive-bevel mesa diodes 111, 112, ... n, the difference between the lowest and highest breakdown voltages is 20% or less, so the performance of the multiple mesa diodes connected in series is similar. When diodes with different breakdown voltages are connected in series, the diode with the lower breakdown voltage will break down (avalanche) at a lower voltage, weakening the breakdown resistance of the semiconductor device connected in series. Conversely, if the difference in breakdown voltage between the diodes is small, the voltage distribution of each diode can be made uniform, resulting in a semiconductor device that is less susceptible to breakdown.

[0054] Furthermore, according to this embodiment, in an extremely clean environment, the protective layer 17b is disposed on the side surface 12a of the first N-type semiconductor layer 12, the side surface 13a of the second N-type semiconductor layer 13, and the upper side surface 11c of the P-type semiconductor layer 11 of the plurality of diodes 111, 112, ... n in the state of the wafer 14. In this way, diodes in which the end portions of the PN junction surfaces 11b between the P-type semiconductor layer 11 and the first N-type semiconductor layer 12 are protected by the protective layer 17b are stacked in advance in an environment with a high level of cleanliness, and therefore a highly reliable semiconductor device can be manufactured.

[0055] In addition, in this embodiment, as shown in FIG. 3, the included angle (bevel angle) 30 between the imaginary vertical line X and the side surface 12a of the first N-type semiconductor layer 12 is equal to or greater than 0 degrees and equal to or less than 45 degrees, which results in a positive bevel angle, and therefore the breakdown resistance against the reverse voltage can be sufficiently strengthened. [Explanation of symbols]

[0056] 11 P-type semiconductor layer (P + ) 11a Lower side surface of P-type semiconductor layer 11c Upper side of P-type semiconductor layer 12 First N-type semiconductor layer (N - ) 12a Side surface of first N-type semiconductor layer 13 Second N-type semiconductor layer (N + ) 13a Side surface of second N-type semiconductor layer 14 Semiconductor substrate (semiconductor wafer) 17b Protective layer 18 groove 30 Bevel angle 30a Intersection of the PN junction surface and the side surface of the first N-type semiconductor layer 34 No. 1 dicing blade 50 solder 111,112,···n Positive bevel mesa diode X Imaginary vertical line

Claims

1. A semiconductor device in which a plurality of positive bevel mesa diodes are connected in series, A semiconductor device characterized in that, when the breakdown voltages of the plurality of positive bevel mesa diodes are compared, the difference between the minimum and maximum breakdown voltages is 20% or less.

2. In claim 1, each of the plurality of positive bevel mesa diodes is formed by stacking a P-type semiconductor layer, a first N-type semiconductor layer, and a second N-type semiconductor layer having an impurity concentration higher than that of the first N-type semiconductor layer in this order; A semiconductor device characterized in that an included angle (bevel angle) between a virtual vertical line drawn at an intersection of a PN junction surface between the P-type semiconductor layer and the first N-type semiconductor layer and a side surface of the first N-type semiconductor layer and the side surface of the first N-type semiconductor layer is 0 degrees or more and 45 degrees or less.

3. In claim 1 or 2, a protection layer disposed on sidewalls around the P-type semiconductor layer, the first N-type semiconductor layer, and the second N-type semiconductor layer in a plan view; The protective layer is not disposed on a lower side surface of the P-type semiconductor layer, the protective layer is disposed on an upper side surface of the P-type semiconductor layer, The semiconductor device according to claim 1, wherein the protection layer is disposed on a side surface of the first N-type semiconductor layer and a side surface of the second N-type semiconductor layer.

4. In claim 1 or 2, The semiconductor device is characterized in that each of the plurality of positive bevel mesa diodes is connected by solder.

5. In claim 1 or 2, The semiconductor device is characterized in that the protective layer is a glass layer or a polyimide layer.

6. a step (a) of preparing a semiconductor substrate in which a P-type semiconductor layer, a first N-type semiconductor layer, and a second N-type semiconductor layer having an impurity concentration higher than that of the first N-type semiconductor layer are stacked in this order; a step (b) of forming a groove in the semiconductor substrate by cutting the semiconductor substrate with a first dicing blade, the groove having a depth from the second N-type semiconductor layer side to partway through the P-type semiconductor layer; (c) disposing a protective layer on the inner wall of the groove; (d) dividing the semiconductor substrate into a plurality of positive bevel mesa diode chips by separating the protective layer and the P-type semiconductor layer along the center of the bottom of the groove; a step (e) of measuring the breakdown voltage of the plurality of positive bevel mesa diodes obtained in the step (d); a step (f) of selecting a plurality of mesa diodes having a difference between the minimum and maximum breakdown voltages of the mesa diodes measured in the step (e) of 20% or less; a step (g) of serially connecting the plurality of positive bevel mesa diodes selected in the step (f); 1. A method for manufacturing a semiconductor device, comprising:

7. In claim 6, a bevel angle formed by a virtual vertical line drawn at an intersection of a PN junction surface between the P-type semiconductor layer and the first N-type semiconductor layer and a side surface of the first N-type semiconductor layer after the step (b), and the side surface of the first N-type semiconductor layer is equal to or greater than 0 degrees and equal to or less than 45 degrees.

8. In claim 7, a semiconductor device manufacturing method, characterized in that the protective layer in the plurality of positive bevel mesa diodes obtained in the step (c) is disposed on the peripheral sidewalls of the P-type semiconductor layer, the first N-type semiconductor layer, and the second N-type semiconductor layer in the state of the semiconductor substrate (semiconductor wafer).

9. In any one of claims 6 to 8, In the step (g), the plurality of positive bevel mesa diodes are connected in series by soldering.

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